Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F7/stm32f7xx_hal_uart.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
83:a036322b8637
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /**
bogdanm 0:9b334a45a8ff 2 ******************************************************************************
bogdanm 0:9b334a45a8ff 3 * @file stm32f7xx_hal_uart.c
bogdanm 0:9b334a45a8ff 4 * @author MCD Application Team
bogdanm 0:9b334a45a8ff 5 * @version V1.0.1
bogdanm 0:9b334a45a8ff 6 * @date 25-June-2015
bogdanm 0:9b334a45a8ff 7 * @brief UART HAL module driver.
bogdanm 0:9b334a45a8ff 8 * This file provides firmware functions to manage the following
bogdanm 0:9b334a45a8ff 9 * functionalities of the Universal Asynchronous Receiver Transmitter (UART) peripheral:
bogdanm 0:9b334a45a8ff 10 * + Initialization and de-initialization functions
bogdanm 0:9b334a45a8ff 11 * + IO operation functions
bogdanm 0:9b334a45a8ff 12 * + Peripheral Control functions
bogdanm 0:9b334a45a8ff 13 * + Peripheral State and Errors functions
bogdanm 0:9b334a45a8ff 14 *
bogdanm 0:9b334a45a8ff 15 @verbatim
bogdanm 0:9b334a45a8ff 16 ==============================================================================
bogdanm 0:9b334a45a8ff 17 ##### How to use this driver #####
bogdanm 0:9b334a45a8ff 18 ==============================================================================
bogdanm 0:9b334a45a8ff 19 [..]
bogdanm 0:9b334a45a8ff 20 The UART HAL driver can be used as follows:
bogdanm 0:9b334a45a8ff 21
bogdanm 0:9b334a45a8ff 22 (#) Declare a UART_HandleTypeDef handle structure.
bogdanm 0:9b334a45a8ff 23
bogdanm 0:9b334a45a8ff 24 (#) Initialize the UART low level resources by implementing the HAL_UART_MspInit() API:
bogdanm 0:9b334a45a8ff 25 (##) Enable the USARTx interface clock.
bogdanm 0:9b334a45a8ff 26 (##) UART pins configuration:
bogdanm 0:9b334a45a8ff 27 (+++) Enable the clock for the UART GPIOs.
bogdanm 0:9b334a45a8ff 28 (+++) Configure these UART pins as alternate function pull-up.
bogdanm 0:9b334a45a8ff 29 (##) NVIC configuration if you need to use interrupt process (HAL_UART_Transmit_IT()
bogdanm 0:9b334a45a8ff 30 and HAL_UART_Receive_IT() APIs):
bogdanm 0:9b334a45a8ff 31 (+++) Configure the USARTx interrupt priority.
bogdanm 0:9b334a45a8ff 32 (+++) Enable the NVIC USART IRQ handle.
bogdanm 0:9b334a45a8ff 33 (##) DMA Configuration if you need to use DMA process (HAL_UART_Transmit_DMA()
bogdanm 0:9b334a45a8ff 34 and HAL_UART_Receive_DMA() APIs):
bogdanm 0:9b334a45a8ff 35 (+++) Declare a DMA handle structure for the Tx/Rx stream.
bogdanm 0:9b334a45a8ff 36 (+++) Enable the DMAx interface clock.
bogdanm 0:9b334a45a8ff 37 (+++) Configure the declared DMA handle structure with the required
bogdanm 0:9b334a45a8ff 38 Tx/Rx parameters.
bogdanm 0:9b334a45a8ff 39 (+++) Configure the DMA Tx/Rx Stream.
bogdanm 0:9b334a45a8ff 40 (+++) Associate the initialized DMA handle to the UART DMA Tx/Rx handle.
bogdanm 0:9b334a45a8ff 41 (+++) Configure the priority and enable the NVIC for the transfer complete
bogdanm 0:9b334a45a8ff 42 interrupt on the DMA Tx/Rx Stream.
bogdanm 0:9b334a45a8ff 43
bogdanm 0:9b334a45a8ff 44 (#) Program the Baud Rate, Word Length, Stop Bit, Parity, Hardware
bogdanm 0:9b334a45a8ff 45 flow control and Mode(Receiver/Transmitter) in the Init structure.
bogdanm 0:9b334a45a8ff 46
bogdanm 0:9b334a45a8ff 47 (#) For the UART asynchronous mode, initialize the UART registers by calling
bogdanm 0:9b334a45a8ff 48 the HAL_UART_Init() API.
bogdanm 0:9b334a45a8ff 49
bogdanm 0:9b334a45a8ff 50 (#) For the UART Half duplex mode, initialize the UART registers by calling
bogdanm 0:9b334a45a8ff 51 the HAL_HalfDuplex_Init() API.
bogdanm 0:9b334a45a8ff 52
bogdanm 0:9b334a45a8ff 53 (#) For the LIN mode, initialize the UART registers by calling the HAL_LIN_Init() API.
bogdanm 0:9b334a45a8ff 54
bogdanm 0:9b334a45a8ff 55 (#) For the Multi-Processor mode, initialize the UART registers by calling
bogdanm 0:9b334a45a8ff 56 the HAL_MultiProcessor_Init() API.
bogdanm 0:9b334a45a8ff 57
bogdanm 0:9b334a45a8ff 58 [..]
bogdanm 0:9b334a45a8ff 59 (@) The specific UART interrupts (Transmission complete interrupt,
bogdanm 0:9b334a45a8ff 60 RXNE interrupt and Error Interrupts) will be managed using the macros
bogdanm 0:9b334a45a8ff 61 __HAL_UART_ENABLE_IT() and __HAL_UART_DISABLE_IT() inside the transmit
bogdanm 0:9b334a45a8ff 62 and receive process.
bogdanm 0:9b334a45a8ff 63
bogdanm 0:9b334a45a8ff 64 [..]
bogdanm 0:9b334a45a8ff 65 (@) These APIs (HAL_UART_Init() and HAL_HalfDuplex_Init()) configure also the
bogdanm 0:9b334a45a8ff 66 low level Hardware GPIO, CLOCK, CORTEX...etc) by calling the customized
bogdanm 0:9b334a45a8ff 67 HAL_UART_MspInit() API.
bogdanm 0:9b334a45a8ff 68
bogdanm 0:9b334a45a8ff 69 [..]
bogdanm 0:9b334a45a8ff 70 Three operation modes are available within this driver :
bogdanm 0:9b334a45a8ff 71
bogdanm 0:9b334a45a8ff 72 *** Polling mode IO operation ***
bogdanm 0:9b334a45a8ff 73 =================================
bogdanm 0:9b334a45a8ff 74 [..]
bogdanm 0:9b334a45a8ff 75 (+) Send an amount of data in blocking mode using HAL_UART_Transmit()
bogdanm 0:9b334a45a8ff 76 (+) Receive an amount of data in blocking mode using HAL_UART_Receive()
bogdanm 0:9b334a45a8ff 77
bogdanm 0:9b334a45a8ff 78 *** Interrupt mode IO operation ***
bogdanm 0:9b334a45a8ff 79 ===================================
bogdanm 0:9b334a45a8ff 80 [..]
bogdanm 0:9b334a45a8ff 81 (+) Send an amount of data in non blocking mode using HAL_UART_Transmit_IT()
bogdanm 0:9b334a45a8ff 82 (+) At transmission end of transfer HAL_UART_TxCpltCallback is executed and user can
bogdanm 0:9b334a45a8ff 83 add his own code by customization of function pointer HAL_UART_TxCpltCallback
bogdanm 0:9b334a45a8ff 84 (+) Receive an amount of data in non blocking mode using HAL_UART_Receive_IT()
bogdanm 0:9b334a45a8ff 85 (+) At reception end of transfer HAL_UART_RxCpltCallback is executed and user can
bogdanm 0:9b334a45a8ff 86 add his own code by customization of function pointer HAL_UART_RxCpltCallback
bogdanm 0:9b334a45a8ff 87 (+) In case of transfer Error, HAL_UART_ErrorCallback() function is executed and user can
bogdanm 0:9b334a45a8ff 88 add his own code by customization of function pointer HAL_UART_ErrorCallback
bogdanm 0:9b334a45a8ff 89
bogdanm 0:9b334a45a8ff 90 *** DMA mode IO operation ***
bogdanm 0:9b334a45a8ff 91 ==============================
bogdanm 0:9b334a45a8ff 92 [..]
bogdanm 0:9b334a45a8ff 93 (+) Send an amount of data in non blocking mode (DMA) using HAL_UART_Transmit_DMA()
bogdanm 0:9b334a45a8ff 94 (+) At transmission end of half transfer HAL_UART_TxHalfCpltCallback is executed and user can
bogdanm 0:9b334a45a8ff 95 add his own code by customization of function pointer HAL_UART_TxHalfCpltCallback
bogdanm 0:9b334a45a8ff 96 (+) At transmission end of transfer HAL_UART_TxCpltCallback is executed and user can
bogdanm 0:9b334a45a8ff 97 add his own code by customization of function pointer HAL_UART_TxCpltCallback
bogdanm 0:9b334a45a8ff 98 (+) Receive an amount of data in non blocking mode (DMA) using HAL_UART_Receive_DMA()
bogdanm 0:9b334a45a8ff 99 (+) At reception end of half transfer HAL_UART_RxHalfCpltCallback is executed and user can
bogdanm 0:9b334a45a8ff 100 add his own code by customization of function pointer HAL_UART_RxHalfCpltCallback
bogdanm 0:9b334a45a8ff 101 (+) At reception end of transfer HAL_UART_RxCpltCallback is executed and user can
bogdanm 0:9b334a45a8ff 102 add his own code by customization of function pointer HAL_UART_RxCpltCallback
bogdanm 0:9b334a45a8ff 103 (+) In case of transfer Error, HAL_UART_ErrorCallback() function is executed and user can
bogdanm 0:9b334a45a8ff 104 add his own code by customization of function pointer HAL_UART_ErrorCallback
bogdanm 0:9b334a45a8ff 105 (+) Pause the DMA Transfer using HAL_UART_DMAPause()
bogdanm 0:9b334a45a8ff 106 (+) Resume the DMA Transfer using HAL_UART_DMAResume()
bogdanm 0:9b334a45a8ff 107 (+) Stop the DMA Transfer using HAL_UART_DMAStop()
bogdanm 0:9b334a45a8ff 108
bogdanm 0:9b334a45a8ff 109 *** UART HAL driver macros list ***
bogdanm 0:9b334a45a8ff 110 =============================================
bogdanm 0:9b334a45a8ff 111 [..]
bogdanm 0:9b334a45a8ff 112 Below the list of most used macros in UART HAL driver.
bogdanm 0:9b334a45a8ff 113
bogdanm 0:9b334a45a8ff 114 (+) __HAL_UART_ENABLE: Enable the UART peripheral
bogdanm 0:9b334a45a8ff 115 (+) __HAL_UART_DISABLE: Disable the UART peripheral
bogdanm 0:9b334a45a8ff 116 (+) __HAL_UART_GET_FLAG : Check whether the specified UART flag is set or not
bogdanm 0:9b334a45a8ff 117 (+) __HAL_UART_CLEAR_IT : Clears the specified UART ISR flag
bogdanm 0:9b334a45a8ff 118 (+) __HAL_UART_ENABLE_IT: Enable the specified UART interrupt
bogdanm 0:9b334a45a8ff 119 (+) __HAL_UART_DISABLE_IT: Disable the specified UART interrupt
bogdanm 0:9b334a45a8ff 120 (+) __HAL_UART_GET_IT_SOURCE: Check whether the specified UART interrupt has occurred or not
bogdanm 0:9b334a45a8ff 121
bogdanm 0:9b334a45a8ff 122 [..]
bogdanm 0:9b334a45a8ff 123 (@) You can refer to the UART HAL driver header file for more useful macros
bogdanm 0:9b334a45a8ff 124
bogdanm 0:9b334a45a8ff 125 @endverbatim
bogdanm 0:9b334a45a8ff 126 ******************************************************************************
bogdanm 0:9b334a45a8ff 127 * @attention
bogdanm 0:9b334a45a8ff 128 *
bogdanm 0:9b334a45a8ff 129 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm 0:9b334a45a8ff 130 *
bogdanm 0:9b334a45a8ff 131 * Redistribution and use in source and binary forms, with or without modification,
bogdanm 0:9b334a45a8ff 132 * are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 133 * 1. Redistributions of source code must retain the above copyright notice,
bogdanm 0:9b334a45a8ff 134 * this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 135 * 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm 0:9b334a45a8ff 136 * this list of conditions and the following disclaimer in the documentation
bogdanm 0:9b334a45a8ff 137 * and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 138 * 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm 0:9b334a45a8ff 139 * may be used to endorse or promote products derived from this software
bogdanm 0:9b334a45a8ff 140 * without specific prior written permission.
bogdanm 0:9b334a45a8ff 141 *
bogdanm 0:9b334a45a8ff 142 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 0:9b334a45a8ff 143 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 0:9b334a45a8ff 144 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 145 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm 0:9b334a45a8ff 146 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm 0:9b334a45a8ff 147 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm 0:9b334a45a8ff 148 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm 0:9b334a45a8ff 149 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm 0:9b334a45a8ff 150 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm 0:9b334a45a8ff 151 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 152 *
bogdanm 0:9b334a45a8ff 153 ******************************************************************************
bogdanm 0:9b334a45a8ff 154 */
bogdanm 0:9b334a45a8ff 155
bogdanm 0:9b334a45a8ff 156 /* Includes ------------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 157 #include "stm32f7xx_hal.h"
bogdanm 0:9b334a45a8ff 158
bogdanm 0:9b334a45a8ff 159 /** @addtogroup STM32F7xx_HAL_Driver
bogdanm 0:9b334a45a8ff 160 * @{
bogdanm 0:9b334a45a8ff 161 */
bogdanm 0:9b334a45a8ff 162
bogdanm 0:9b334a45a8ff 163 /** @defgroup UART UART
bogdanm 0:9b334a45a8ff 164 * @brief HAL UART module driver
bogdanm 0:9b334a45a8ff 165 * @{
bogdanm 0:9b334a45a8ff 166 */
bogdanm 0:9b334a45a8ff 167 #ifdef HAL_UART_MODULE_ENABLED
bogdanm 0:9b334a45a8ff 168
bogdanm 0:9b334a45a8ff 169 /* Private typedef -----------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 170 /* Private define ------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 171 #define HAL_UART_TXDMA_TIMEOUTVALUE 22000
bogdanm 0:9b334a45a8ff 172 #define UART_CR1_FIELDS ((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | \
bogdanm 0:9b334a45a8ff 173 USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8))
bogdanm 0:9b334a45a8ff 174 /* Private macro -------------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 175 /* Private variables ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 176 /* Private function prototypes -----------------------------------------------*/
bogdanm 0:9b334a45a8ff 177 static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 178 static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 179 static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 180 static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 181 static void UART_DMAError(DMA_HandleTypeDef *hdma);
bogdanm 0:9b334a45a8ff 182 static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart);
bogdanm 0:9b334a45a8ff 183 static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart);
bogdanm 0:9b334a45a8ff 184 static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart);
bogdanm 0:9b334a45a8ff 185 /* Private functions ---------------------------------------------------------*/
bogdanm 0:9b334a45a8ff 186
bogdanm 0:9b334a45a8ff 187 /** @defgroup UART_Exported_Functions UART Exported Functions
bogdanm 0:9b334a45a8ff 188 * @{
bogdanm 0:9b334a45a8ff 189 */
bogdanm 0:9b334a45a8ff 190
bogdanm 0:9b334a45a8ff 191 /** @defgroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
bogdanm 0:9b334a45a8ff 192 * @brief Initialization and Configuration functions
bogdanm 0:9b334a45a8ff 193 *
bogdanm 0:9b334a45a8ff 194 @verbatim
bogdanm 0:9b334a45a8ff 195 ===============================================================================
bogdanm 0:9b334a45a8ff 196 ##### Initialization and Configuration functions #####
bogdanm 0:9b334a45a8ff 197 ===============================================================================
bogdanm 0:9b334a45a8ff 198 [..]
bogdanm 0:9b334a45a8ff 199 This subsection provides a set of functions allowing to initialize the USARTx or the UARTy
bogdanm 0:9b334a45a8ff 200 in asynchronous mode.
bogdanm 0:9b334a45a8ff 201 (+) For the asynchronous mode only these parameters can be configured:
bogdanm 0:9b334a45a8ff 202 (++) Baud Rate
bogdanm 0:9b334a45a8ff 203 (++) Word Length
bogdanm 0:9b334a45a8ff 204 (++) Stop Bit
bogdanm 0:9b334a45a8ff 205 (++) Parity: If the parity is enabled, then the MSB bit of the data written
bogdanm 0:9b334a45a8ff 206 in the data register is transmitted but is changed by the parity bit.
bogdanm 0:9b334a45a8ff 207 Depending on the frame length defined by the M bit (8-bits or 9-bits),
bogdanm 0:9b334a45a8ff 208 please refer to Reference manual for possible UART frame formats.
bogdanm 0:9b334a45a8ff 209 (++) Hardware flow control
bogdanm 0:9b334a45a8ff 210 (++) Receiver/transmitter modes
bogdanm 0:9b334a45a8ff 211 (++) Over Sampling Method
bogdanm 0:9b334a45a8ff 212 [..]
bogdanm 0:9b334a45a8ff 213 The HAL_UART_Init(), HAL_HalfDuplex_Init(), HAL_LIN_Init() and HAL_MultiProcessor_Init() APIs
bogdanm 0:9b334a45a8ff 214 follow respectively the UART asynchronous, UART Half duplex, LIN and Multi-Processor
bogdanm 0:9b334a45a8ff 215 configuration procedures (details for the procedures are available in reference manual (RM0329)).
bogdanm 0:9b334a45a8ff 216
bogdanm 0:9b334a45a8ff 217 @endverbatim
bogdanm 0:9b334a45a8ff 218 * @{
bogdanm 0:9b334a45a8ff 219 */
bogdanm 0:9b334a45a8ff 220
bogdanm 0:9b334a45a8ff 221 /**
bogdanm 0:9b334a45a8ff 222 * @brief Initializes the UART mode according to the specified
bogdanm 0:9b334a45a8ff 223 * parameters in the UART_InitTypeDef and creates the associated handle .
bogdanm 0:9b334a45a8ff 224 * @param huart: uart handle
bogdanm 0:9b334a45a8ff 225 * @retval HAL status
bogdanm 0:9b334a45a8ff 226 */
bogdanm 0:9b334a45a8ff 227 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 228 {
bogdanm 0:9b334a45a8ff 229 /* Check the UART handle allocation */
bogdanm 0:9b334a45a8ff 230 if(huart == NULL)
bogdanm 0:9b334a45a8ff 231 {
bogdanm 0:9b334a45a8ff 232 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 233 }
bogdanm 0:9b334a45a8ff 234
bogdanm 0:9b334a45a8ff 235 if(huart->Init.HwFlowCtl != UART_HWCONTROL_NONE)
bogdanm 0:9b334a45a8ff 236 {
bogdanm 0:9b334a45a8ff 237 /* Check the parameters */
bogdanm 0:9b334a45a8ff 238 assert_param(IS_UART_HWFLOW_INSTANCE(huart->Instance));
bogdanm 0:9b334a45a8ff 239 }
bogdanm 0:9b334a45a8ff 240 else
bogdanm 0:9b334a45a8ff 241 {
bogdanm 0:9b334a45a8ff 242 /* Check the parameters */
bogdanm 0:9b334a45a8ff 243 assert_param(IS_UART_INSTANCE(huart->Instance));
bogdanm 0:9b334a45a8ff 244 }
bogdanm 0:9b334a45a8ff 245
bogdanm 0:9b334a45a8ff 246 if(huart->State == HAL_UART_STATE_RESET)
bogdanm 0:9b334a45a8ff 247 {
bogdanm 0:9b334a45a8ff 248 /* Allocate lock resource and initialize it */
bogdanm 0:9b334a45a8ff 249 huart->Lock = HAL_UNLOCKED;
bogdanm 0:9b334a45a8ff 250
bogdanm 0:9b334a45a8ff 251 /* Init the low level hardware : GPIO, CLOCK */
bogdanm 0:9b334a45a8ff 252 HAL_UART_MspInit(huart);
bogdanm 0:9b334a45a8ff 253 }
bogdanm 0:9b334a45a8ff 254
bogdanm 0:9b334a45a8ff 255 huart->State = HAL_UART_STATE_BUSY;
bogdanm 0:9b334a45a8ff 256
bogdanm 0:9b334a45a8ff 257 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 258 __HAL_UART_DISABLE(huart);
bogdanm 0:9b334a45a8ff 259
bogdanm 0:9b334a45a8ff 260 /* Set the UART Communication parameters */
bogdanm 0:9b334a45a8ff 261 if (UART_SetConfig(huart) == HAL_ERROR)
bogdanm 0:9b334a45a8ff 262 {
bogdanm 0:9b334a45a8ff 263 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 264 }
bogdanm 0:9b334a45a8ff 265
bogdanm 0:9b334a45a8ff 266 if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
bogdanm 0:9b334a45a8ff 267 {
bogdanm 0:9b334a45a8ff 268 UART_AdvFeatureConfig(huart);
bogdanm 0:9b334a45a8ff 269 }
bogdanm 0:9b334a45a8ff 270
bogdanm 0:9b334a45a8ff 271 /* In asynchronous mode, the following bits must be kept cleared:
bogdanm 0:9b334a45a8ff 272 - LINEN and CLKEN bits in the USART_CR2 register,
bogdanm 0:9b334a45a8ff 273 - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
bogdanm 0:9b334a45a8ff 274 huart->Instance->CR2 &= ~(USART_CR2_LINEN | USART_CR2_CLKEN);
bogdanm 0:9b334a45a8ff 275 huart->Instance->CR3 &= ~(USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN);
bogdanm 0:9b334a45a8ff 276
bogdanm 0:9b334a45a8ff 277 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 278 __HAL_UART_ENABLE(huart);
bogdanm 0:9b334a45a8ff 279
bogdanm 0:9b334a45a8ff 280 /* TEACK and/or REACK to check before moving huart->State to Ready */
bogdanm 0:9b334a45a8ff 281 return (UART_CheckIdleState(huart));
bogdanm 0:9b334a45a8ff 282 }
bogdanm 0:9b334a45a8ff 283
bogdanm 0:9b334a45a8ff 284 /**
bogdanm 0:9b334a45a8ff 285 * @brief Initializes the half-duplex mode according to the specified
bogdanm 0:9b334a45a8ff 286 * parameters in the UART_InitTypeDef and creates the associated handle .
bogdanm 0:9b334a45a8ff 287 * @param huart: UART handle
bogdanm 0:9b334a45a8ff 288 * @retval HAL status
bogdanm 0:9b334a45a8ff 289 */
bogdanm 0:9b334a45a8ff 290 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 291 {
bogdanm 0:9b334a45a8ff 292 /* Check the UART handle allocation */
bogdanm 0:9b334a45a8ff 293 if(huart == NULL)
bogdanm 0:9b334a45a8ff 294 {
bogdanm 0:9b334a45a8ff 295 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 296 }
bogdanm 0:9b334a45a8ff 297
bogdanm 0:9b334a45a8ff 298 if(huart->State == HAL_UART_STATE_RESET)
bogdanm 0:9b334a45a8ff 299 {
bogdanm 0:9b334a45a8ff 300 /* Allocate lock resource and initialize it */
bogdanm 0:9b334a45a8ff 301 huart->Lock = HAL_UNLOCKED;
bogdanm 0:9b334a45a8ff 302 /* Init the low level hardware : GPIO, CLOCK */
bogdanm 0:9b334a45a8ff 303 HAL_UART_MspInit(huart);
bogdanm 0:9b334a45a8ff 304 }
bogdanm 0:9b334a45a8ff 305
bogdanm 0:9b334a45a8ff 306 huart->State = HAL_UART_STATE_BUSY;
bogdanm 0:9b334a45a8ff 307
bogdanm 0:9b334a45a8ff 308 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 309 __HAL_UART_DISABLE(huart);
bogdanm 0:9b334a45a8ff 310
bogdanm 0:9b334a45a8ff 311 /* Set the UART Communication parameters */
bogdanm 0:9b334a45a8ff 312 if (UART_SetConfig(huart) == HAL_ERROR)
bogdanm 0:9b334a45a8ff 313 {
bogdanm 0:9b334a45a8ff 314 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 315 }
bogdanm 0:9b334a45a8ff 316
bogdanm 0:9b334a45a8ff 317 if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
bogdanm 0:9b334a45a8ff 318 {
bogdanm 0:9b334a45a8ff 319 UART_AdvFeatureConfig(huart);
bogdanm 0:9b334a45a8ff 320 }
bogdanm 0:9b334a45a8ff 321
bogdanm 0:9b334a45a8ff 322 /* In half-duplex mode, the following bits must be kept cleared:
bogdanm 0:9b334a45a8ff 323 - LINEN and CLKEN bits in the USART_CR2 register,
bogdanm 0:9b334a45a8ff 324 - SCEN and IREN bits in the USART_CR3 register.*/
bogdanm 0:9b334a45a8ff 325 huart->Instance->CR2 &= ~(USART_CR2_LINEN | USART_CR2_CLKEN);
bogdanm 0:9b334a45a8ff 326 huart->Instance->CR3 &= ~(USART_CR3_IREN | USART_CR3_SCEN);
bogdanm 0:9b334a45a8ff 327
bogdanm 0:9b334a45a8ff 328 /* Enable the Half-Duplex mode by setting the HDSEL bit in the CR3 register */
bogdanm 0:9b334a45a8ff 329 huart->Instance->CR3 |= USART_CR3_HDSEL;
bogdanm 0:9b334a45a8ff 330
bogdanm 0:9b334a45a8ff 331 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 332 __HAL_UART_ENABLE(huart);
bogdanm 0:9b334a45a8ff 333
bogdanm 0:9b334a45a8ff 334 /* TEACK and/or REACK to check before moving huart->State to Ready */
bogdanm 0:9b334a45a8ff 335 return (UART_CheckIdleState(huart));
bogdanm 0:9b334a45a8ff 336 }
bogdanm 0:9b334a45a8ff 337
bogdanm 0:9b334a45a8ff 338
bogdanm 0:9b334a45a8ff 339 /**
bogdanm 0:9b334a45a8ff 340 * @brief Initializes the LIN mode according to the specified
bogdanm 0:9b334a45a8ff 341 * parameters in the UART_InitTypeDef and creates the associated handle .
bogdanm 0:9b334a45a8ff 342 * @param huart: uart handle
bogdanm 0:9b334a45a8ff 343 * @param BreakDetectLength: specifies the LIN break detection length.
bogdanm 0:9b334a45a8ff 344 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 345 * @arg UART_LINBREAKDETECTLENGTH_10B: 10-bit break detection
bogdanm 0:9b334a45a8ff 346 * @arg UART_LINBREAKDETECTLENGTH_11B: 11-bit break detection
bogdanm 0:9b334a45a8ff 347 * @retval HAL status
bogdanm 0:9b334a45a8ff 348 */
bogdanm 0:9b334a45a8ff 349 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength)
bogdanm 0:9b334a45a8ff 350 {
bogdanm 0:9b334a45a8ff 351 /* Check the UART handle allocation */
bogdanm 0:9b334a45a8ff 352 if(huart == NULL)
bogdanm 0:9b334a45a8ff 353 {
bogdanm 0:9b334a45a8ff 354 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 355 }
bogdanm 0:9b334a45a8ff 356
bogdanm 0:9b334a45a8ff 357 /* Check the parameters */
bogdanm 0:9b334a45a8ff 358 assert_param(IS_UART_INSTANCE(huart->Instance));
bogdanm 0:9b334a45a8ff 359 assert_param(IS_UART_LIN_BREAK_DETECT_LENGTH(BreakDetectLength));
bogdanm 0:9b334a45a8ff 360 assert_param(IS_LIN_WORD_LENGTH(huart->Init.WordLength));
bogdanm 0:9b334a45a8ff 361
bogdanm 0:9b334a45a8ff 362 if(huart->State == HAL_UART_STATE_RESET)
bogdanm 0:9b334a45a8ff 363 {
bogdanm 0:9b334a45a8ff 364 /* Allocate lock resource and initialize it */
bogdanm 0:9b334a45a8ff 365 huart->Lock = HAL_UNLOCKED;
bogdanm 0:9b334a45a8ff 366 /* Init the low level hardware : GPIO, CLOCK */
bogdanm 0:9b334a45a8ff 367 HAL_UART_MspInit(huart);
bogdanm 0:9b334a45a8ff 368 }
bogdanm 0:9b334a45a8ff 369
bogdanm 0:9b334a45a8ff 370 huart->State = HAL_UART_STATE_BUSY;
bogdanm 0:9b334a45a8ff 371
bogdanm 0:9b334a45a8ff 372 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 373 __HAL_UART_DISABLE(huart);
bogdanm 0:9b334a45a8ff 374
bogdanm 0:9b334a45a8ff 375 /* Set the UART Communication parameters */
bogdanm 0:9b334a45a8ff 376 if (UART_SetConfig(huart) == HAL_ERROR)
bogdanm 0:9b334a45a8ff 377 {
bogdanm 0:9b334a45a8ff 378 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 379 }
bogdanm 0:9b334a45a8ff 380
bogdanm 0:9b334a45a8ff 381 if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
bogdanm 0:9b334a45a8ff 382 {
bogdanm 0:9b334a45a8ff 383 UART_AdvFeatureConfig(huart);
bogdanm 0:9b334a45a8ff 384 }
bogdanm 0:9b334a45a8ff 385
bogdanm 0:9b334a45a8ff 386 /* In LIN mode, the following bits must be kept cleared:
bogdanm 0:9b334a45a8ff 387 - LINEN and CLKEN bits in the USART_CR2 register,
bogdanm 0:9b334a45a8ff 388 - SCEN and IREN bits in the USART_CR3 register.*/
bogdanm 0:9b334a45a8ff 389 huart->Instance->CR2 &= ~(USART_CR2_CLKEN);
bogdanm 0:9b334a45a8ff 390 huart->Instance->CR3 &= ~(USART_CR3_HDSEL | USART_CR3_IREN | USART_CR3_SCEN);
bogdanm 0:9b334a45a8ff 391
bogdanm 0:9b334a45a8ff 392 /* Enable the LIN mode by setting the LINEN bit in the CR2 register */
bogdanm 0:9b334a45a8ff 393 huart->Instance->CR2 |= USART_CR2_LINEN;
bogdanm 0:9b334a45a8ff 394
bogdanm 0:9b334a45a8ff 395 /* Set the USART LIN Break detection length. */
bogdanm 0:9b334a45a8ff 396 MODIFY_REG(huart->Instance->CR2, USART_CR2_LBDL, BreakDetectLength);
bogdanm 0:9b334a45a8ff 397
bogdanm 0:9b334a45a8ff 398 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 399 __HAL_UART_ENABLE(huart);
bogdanm 0:9b334a45a8ff 400
bogdanm 0:9b334a45a8ff 401 /* TEACK and/or REACK to check before moving huart->State to Ready */
bogdanm 0:9b334a45a8ff 402 return (UART_CheckIdleState(huart));
bogdanm 0:9b334a45a8ff 403 }
bogdanm 0:9b334a45a8ff 404
bogdanm 0:9b334a45a8ff 405
bogdanm 0:9b334a45a8ff 406
bogdanm 0:9b334a45a8ff 407 /**
bogdanm 0:9b334a45a8ff 408 * @brief Initializes the multiprocessor mode according to the specified
bogdanm 0:9b334a45a8ff 409 * parameters in the UART_InitTypeDef and creates the associated handle.
bogdanm 0:9b334a45a8ff 410 * @param huart: UART handle
bogdanm 0:9b334a45a8ff 411 * @param Address: UART node address (4-, 6-, 7- or 8-bit long)
bogdanm 0:9b334a45a8ff 412 * @param WakeUpMethod: specifies the UART wakeup method.
bogdanm 0:9b334a45a8ff 413 * This parameter can be one of the following values:
bogdanm 0:9b334a45a8ff 414 * @arg UART_WAKEUPMETHOD_IDLELINE: WakeUp by an idle line detection
bogdanm 0:9b334a45a8ff 415 * @arg UART_WAKEUPMETHOD_ADDRESSMARK: WakeUp by an address mark
bogdanm 0:9b334a45a8ff 416 * @note If the user resorts to idle line detection wake up, the Address parameter
bogdanm 0:9b334a45a8ff 417 * is useless and ignored by the initialization function.
bogdanm 0:9b334a45a8ff 418 * @note If the user resorts to address mark wake up, the address length detection
bogdanm 0:9b334a45a8ff 419 * is configured by default to 4 bits only. For the UART to be able to
bogdanm 0:9b334a45a8ff 420 * manage 6-, 7- or 8-bit long addresses detection
bogdanm 0:9b334a45a8ff 421 * @retval HAL status
bogdanm 0:9b334a45a8ff 422 */
bogdanm 0:9b334a45a8ff 423 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod)
bogdanm 0:9b334a45a8ff 424 {
bogdanm 0:9b334a45a8ff 425 /* Check the UART handle allocation */
bogdanm 0:9b334a45a8ff 426 if(huart == NULL)
bogdanm 0:9b334a45a8ff 427 {
bogdanm 0:9b334a45a8ff 428 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 429 }
bogdanm 0:9b334a45a8ff 430
bogdanm 0:9b334a45a8ff 431 /* Check the wake up method parameter */
bogdanm 0:9b334a45a8ff 432 assert_param(IS_UART_WAKEUPMETHOD(WakeUpMethod));
bogdanm 0:9b334a45a8ff 433
bogdanm 0:9b334a45a8ff 434 if(huart->State == HAL_UART_STATE_RESET)
bogdanm 0:9b334a45a8ff 435 {
bogdanm 0:9b334a45a8ff 436 /* Allocate lock resource and initialize it */
bogdanm 0:9b334a45a8ff 437 huart->Lock = HAL_UNLOCKED;
bogdanm 0:9b334a45a8ff 438 /* Init the low level hardware : GPIO, CLOCK */
bogdanm 0:9b334a45a8ff 439 HAL_UART_MspInit(huart);
bogdanm 0:9b334a45a8ff 440 }
bogdanm 0:9b334a45a8ff 441
bogdanm 0:9b334a45a8ff 442 huart->State = HAL_UART_STATE_BUSY;
bogdanm 0:9b334a45a8ff 443
bogdanm 0:9b334a45a8ff 444 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 445 __HAL_UART_DISABLE(huart);
bogdanm 0:9b334a45a8ff 446
bogdanm 0:9b334a45a8ff 447 /* Set the UART Communication parameters */
bogdanm 0:9b334a45a8ff 448 if (UART_SetConfig(huart) == HAL_ERROR)
bogdanm 0:9b334a45a8ff 449 {
bogdanm 0:9b334a45a8ff 450 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 451 }
bogdanm 0:9b334a45a8ff 452
bogdanm 0:9b334a45a8ff 453 if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
bogdanm 0:9b334a45a8ff 454 {
bogdanm 0:9b334a45a8ff 455 UART_AdvFeatureConfig(huart);
bogdanm 0:9b334a45a8ff 456 }
bogdanm 0:9b334a45a8ff 457
bogdanm 0:9b334a45a8ff 458 /* In multiprocessor mode, the following bits must be kept cleared:
bogdanm 0:9b334a45a8ff 459 - LINEN and CLKEN bits in the USART_CR2 register,
bogdanm 0:9b334a45a8ff 460 - SCEN, HDSEL and IREN bits in the USART_CR3 register. */
bogdanm 0:9b334a45a8ff 461 huart->Instance->CR2 &= ~(USART_CR2_LINEN | USART_CR2_CLKEN);
bogdanm 0:9b334a45a8ff 462 huart->Instance->CR3 &= ~(USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN);
bogdanm 0:9b334a45a8ff 463
bogdanm 0:9b334a45a8ff 464 if (WakeUpMethod == UART_WAKEUPMETHOD_ADDRESSMARK)
bogdanm 0:9b334a45a8ff 465 {
bogdanm 0:9b334a45a8ff 466 /* If address mark wake up method is chosen, set the USART address node */
bogdanm 0:9b334a45a8ff 467 MODIFY_REG(huart->Instance->CR2, USART_CR2_ADD, ((uint32_t)Address << UART_CR2_ADDRESS_LSB_POS));
bogdanm 0:9b334a45a8ff 468 }
bogdanm 0:9b334a45a8ff 469
bogdanm 0:9b334a45a8ff 470 /* Set the wake up method by setting the WAKE bit in the CR1 register */
bogdanm 0:9b334a45a8ff 471 MODIFY_REG(huart->Instance->CR1, USART_CR1_WAKE, WakeUpMethod);
bogdanm 0:9b334a45a8ff 472
bogdanm 0:9b334a45a8ff 473 /* Enable the Peripheral */
bogdanm 0:9b334a45a8ff 474 __HAL_UART_ENABLE(huart);
bogdanm 0:9b334a45a8ff 475
bogdanm 0:9b334a45a8ff 476 /* TEACK and/or REACK to check before moving huart->State to Ready */
bogdanm 0:9b334a45a8ff 477 return (UART_CheckIdleState(huart));
bogdanm 0:9b334a45a8ff 478 }
bogdanm 0:9b334a45a8ff 479
bogdanm 0:9b334a45a8ff 480
bogdanm 0:9b334a45a8ff 481
bogdanm 0:9b334a45a8ff 482
bogdanm 0:9b334a45a8ff 483 /**
bogdanm 0:9b334a45a8ff 484 * @brief DeInitializes the UART peripheral
bogdanm 0:9b334a45a8ff 485 * @param huart: uart handle
bogdanm 0:9b334a45a8ff 486 * @retval HAL status
bogdanm 0:9b334a45a8ff 487 */
bogdanm 0:9b334a45a8ff 488 HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 489 {
bogdanm 0:9b334a45a8ff 490 /* Check the UART handle allocation */
bogdanm 0:9b334a45a8ff 491 if(huart == NULL)
bogdanm 0:9b334a45a8ff 492 {
bogdanm 0:9b334a45a8ff 493 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 494 }
bogdanm 0:9b334a45a8ff 495
bogdanm 0:9b334a45a8ff 496 /* Check the parameters */
bogdanm 0:9b334a45a8ff 497 assert_param(IS_UART_INSTANCE(huart->Instance));
bogdanm 0:9b334a45a8ff 498
bogdanm 0:9b334a45a8ff 499 huart->State = HAL_UART_STATE_BUSY;
bogdanm 0:9b334a45a8ff 500
bogdanm 0:9b334a45a8ff 501 /* Disable the Peripheral */
bogdanm 0:9b334a45a8ff 502 __HAL_UART_DISABLE(huart);
bogdanm 0:9b334a45a8ff 503
bogdanm 0:9b334a45a8ff 504 huart->Instance->CR1 = 0x0;
bogdanm 0:9b334a45a8ff 505 huart->Instance->CR2 = 0x0;
bogdanm 0:9b334a45a8ff 506 huart->Instance->CR3 = 0x0;
bogdanm 0:9b334a45a8ff 507
bogdanm 0:9b334a45a8ff 508 /* DeInit the low level hardware */
bogdanm 0:9b334a45a8ff 509 HAL_UART_MspDeInit(huart);
bogdanm 0:9b334a45a8ff 510
bogdanm 0:9b334a45a8ff 511 huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm 0:9b334a45a8ff 512 huart->State = HAL_UART_STATE_RESET;
bogdanm 0:9b334a45a8ff 513
bogdanm 0:9b334a45a8ff 514 /* Process Unlock */
bogdanm 0:9b334a45a8ff 515 __HAL_UNLOCK(huart);
bogdanm 0:9b334a45a8ff 516
bogdanm 0:9b334a45a8ff 517 return HAL_OK;
bogdanm 0:9b334a45a8ff 518 }
bogdanm 0:9b334a45a8ff 519
bogdanm 0:9b334a45a8ff 520 /**
bogdanm 0:9b334a45a8ff 521 * @brief UART MSP Init
bogdanm 0:9b334a45a8ff 522 * @param huart: uart handle
bogdanm 0:9b334a45a8ff 523 * @retval None
bogdanm 0:9b334a45a8ff 524 */
bogdanm 0:9b334a45a8ff 525 __weak void HAL_UART_MspInit(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 526 {
bogdanm 0:9b334a45a8ff 527 /* NOTE : This function should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 528 the HAL_UART_MspInit can be implemented in the user file
bogdanm 0:9b334a45a8ff 529 */
bogdanm 0:9b334a45a8ff 530 }
bogdanm 0:9b334a45a8ff 531
bogdanm 0:9b334a45a8ff 532 /**
bogdanm 0:9b334a45a8ff 533 * @brief UART MSP DeInit
bogdanm 0:9b334a45a8ff 534 * @param huart: uart handle
bogdanm 0:9b334a45a8ff 535 * @retval None
bogdanm 0:9b334a45a8ff 536 */
bogdanm 0:9b334a45a8ff 537 __weak void HAL_UART_MspDeInit(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 538 {
bogdanm 0:9b334a45a8ff 539 /* NOTE : This function should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 540 the HAL_UART_MspDeInit can be implemented in the user file
bogdanm 0:9b334a45a8ff 541 */
bogdanm 0:9b334a45a8ff 542 }
bogdanm 0:9b334a45a8ff 543
bogdanm 0:9b334a45a8ff 544 /**
bogdanm 0:9b334a45a8ff 545 * @}
bogdanm 0:9b334a45a8ff 546 */
bogdanm 0:9b334a45a8ff 547
bogdanm 0:9b334a45a8ff 548 /** @defgroup UART_Exported_Functions_Group2 IO operation functions
bogdanm 0:9b334a45a8ff 549 * @brief UART Transmit/Receive functions
bogdanm 0:9b334a45a8ff 550 *
bogdanm 0:9b334a45a8ff 551 @verbatim
bogdanm 0:9b334a45a8ff 552 ===============================================================================
bogdanm 0:9b334a45a8ff 553 ##### IO operation functions #####
bogdanm 0:9b334a45a8ff 554 ===============================================================================
bogdanm 0:9b334a45a8ff 555 This subsection provides a set of functions allowing to manage the UART asynchronous
bogdanm 0:9b334a45a8ff 556 and Half duplex data transfers.
bogdanm 0:9b334a45a8ff 557
bogdanm 0:9b334a45a8ff 558 (#) There are two mode of transfer:
bogdanm 0:9b334a45a8ff 559 (+) Blocking mode: The communication is performed in polling mode.
bogdanm 0:9b334a45a8ff 560 The HAL status of all data processing is returned by the same function
bogdanm 0:9b334a45a8ff 561 after finishing transfer.
bogdanm 0:9b334a45a8ff 562 (+) No-Blocking mode: The communication is performed using Interrupts
bogdanm 0:9b334a45a8ff 563 or DMA, These API's return the HAL status.
bogdanm 0:9b334a45a8ff 564 The end of the data processing will be indicated through the
bogdanm 0:9b334a45a8ff 565 dedicated UART IRQ when using Interrupt mode or the DMA IRQ when
bogdanm 0:9b334a45a8ff 566 using DMA mode.
bogdanm 0:9b334a45a8ff 567 The HAL_UART_TxCpltCallback(), HAL_UART_RxCpltCallback() user callbacks
bogdanm 0:9b334a45a8ff 568 will be executed respectively at the end of the transmit or Receive process
bogdanm 0:9b334a45a8ff 569 The HAL_UART_ErrorCallback()user callback will be executed when a communication error is detected
bogdanm 0:9b334a45a8ff 570
bogdanm 0:9b334a45a8ff 571 (#) Blocking mode API's are :
bogdanm 0:9b334a45a8ff 572 (+) HAL_UART_Transmit()
bogdanm 0:9b334a45a8ff 573 (+) HAL_UART_Receive()
bogdanm 0:9b334a45a8ff 574
bogdanm 0:9b334a45a8ff 575 (#) Non-Blocking mode API's with Interrupt are :
bogdanm 0:9b334a45a8ff 576 (+) HAL_UART_Transmit_IT()
bogdanm 0:9b334a45a8ff 577 (+) HAL_UART_Receive_IT()
bogdanm 0:9b334a45a8ff 578 (+) HAL_UART_IRQHandler()
bogdanm 0:9b334a45a8ff 579 (+) UART_Transmit_IT()
bogdanm 0:9b334a45a8ff 580 (+) UART_Receive_IT()
bogdanm 0:9b334a45a8ff 581
bogdanm 0:9b334a45a8ff 582 (#) No-Blocking mode API's with DMA are :
bogdanm 0:9b334a45a8ff 583 (+) HAL_UART_Transmit_DMA()
bogdanm 0:9b334a45a8ff 584 (+) HAL_UART_Receive_DMA()
bogdanm 0:9b334a45a8ff 585 (+) HAL_UART_DMAPause()
bogdanm 0:9b334a45a8ff 586 (+) HAL_UART_DMAResume()
bogdanm 0:9b334a45a8ff 587 (+) HAL_UART_DMAStop()
bogdanm 0:9b334a45a8ff 588
bogdanm 0:9b334a45a8ff 589 (#) A set of Transfer Complete Callbacks are provided in No_Blocking mode:
bogdanm 0:9b334a45a8ff 590 (+) HAL_UART_TxHalfCpltCallback()
bogdanm 0:9b334a45a8ff 591 (+) HAL_UART_TxCpltCallback()
bogdanm 0:9b334a45a8ff 592 (+) HAL_UART_RxHalfCpltCallback()
bogdanm 0:9b334a45a8ff 593 (+) HAL_UART_RxCpltCallback()
bogdanm 0:9b334a45a8ff 594 (+) HAL_UART_ErrorCallback()
bogdanm 0:9b334a45a8ff 595
bogdanm 0:9b334a45a8ff 596
bogdanm 0:9b334a45a8ff 597 -@- In the Half duplex communication, it is forbidden to run the transmit
bogdanm 0:9b334a45a8ff 598 and receive process in parallel, the UART state HAL_UART_STATE_BUSY_TX_RX can't be useful.
bogdanm 0:9b334a45a8ff 599
bogdanm 0:9b334a45a8ff 600 @endverbatim
bogdanm 0:9b334a45a8ff 601 * @{
bogdanm 0:9b334a45a8ff 602 */
bogdanm 0:9b334a45a8ff 603
bogdanm 0:9b334a45a8ff 604 /**
bogdanm 0:9b334a45a8ff 605 * @brief Send an amount of data in blocking mode
bogdanm 0:9b334a45a8ff 606 * @param huart: uart handle
bogdanm 0:9b334a45a8ff 607 * @param pData: pointer to data buffer
bogdanm 0:9b334a45a8ff 608 * @param Size: amount of data to be sent
bogdanm 0:9b334a45a8ff 609 * @param Timeout : Timeout duration
bogdanm 0:9b334a45a8ff 610 * @retval HAL status
bogdanm 0:9b334a45a8ff 611 */
bogdanm 0:9b334a45a8ff 612 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 613 {
bogdanm 0:9b334a45a8ff 614 uint16_t* tmp;
bogdanm 0:9b334a45a8ff 615
bogdanm 0:9b334a45a8ff 616 if((huart->State == HAL_UART_STATE_READY) || (huart->State == HAL_UART_STATE_BUSY_RX))
bogdanm 0:9b334a45a8ff 617 {
bogdanm 0:9b334a45a8ff 618 if((pData == NULL ) || (Size == 0))
bogdanm 0:9b334a45a8ff 619 {
bogdanm 0:9b334a45a8ff 620 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 621 }
bogdanm 0:9b334a45a8ff 622
bogdanm 0:9b334a45a8ff 623 /* Process Locked */
bogdanm 0:9b334a45a8ff 624 __HAL_LOCK(huart);
bogdanm 0:9b334a45a8ff 625
bogdanm 0:9b334a45a8ff 626 huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm 0:9b334a45a8ff 627 /* Check if a non-blocking receive process is ongoing or not */
bogdanm 0:9b334a45a8ff 628 if(huart->State == HAL_UART_STATE_BUSY_RX)
bogdanm 0:9b334a45a8ff 629 {
bogdanm 0:9b334a45a8ff 630 huart->State = HAL_UART_STATE_BUSY_TX_RX;
bogdanm 0:9b334a45a8ff 631 }
bogdanm 0:9b334a45a8ff 632 else
bogdanm 0:9b334a45a8ff 633 {
bogdanm 0:9b334a45a8ff 634 huart->State = HAL_UART_STATE_BUSY_TX;
bogdanm 0:9b334a45a8ff 635 }
bogdanm 0:9b334a45a8ff 636
bogdanm 0:9b334a45a8ff 637 huart->TxXferSize = Size;
bogdanm 0:9b334a45a8ff 638 huart->TxXferCount = Size;
bogdanm 0:9b334a45a8ff 639 while(huart->TxXferCount > 0)
bogdanm 0:9b334a45a8ff 640 {
bogdanm 0:9b334a45a8ff 641 huart->TxXferCount--;
bogdanm 0:9b334a45a8ff 642 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 643 {
bogdanm 0:9b334a45a8ff 644 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 645 }
bogdanm 0:9b334a45a8ff 646 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
bogdanm 0:9b334a45a8ff 647 {
bogdanm 0:9b334a45a8ff 648 tmp = (uint16_t*) pData;
bogdanm 0:9b334a45a8ff 649 huart->Instance->TDR = (*tmp & (uint16_t)0x01FF);
bogdanm 0:9b334a45a8ff 650 pData += 2;
bogdanm 0:9b334a45a8ff 651 }
bogdanm 0:9b334a45a8ff 652 else
bogdanm 0:9b334a45a8ff 653 {
bogdanm 0:9b334a45a8ff 654 huart->Instance->TDR = (*pData++ & (uint8_t)0xFF);
bogdanm 0:9b334a45a8ff 655 }
bogdanm 0:9b334a45a8ff 656 }
bogdanm 0:9b334a45a8ff 657 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 658 {
bogdanm 0:9b334a45a8ff 659 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 660 }
bogdanm 0:9b334a45a8ff 661 /* Check if a non-blocking receive Process is ongoing or not */
bogdanm 0:9b334a45a8ff 662 if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm 0:9b334a45a8ff 663 {
bogdanm 0:9b334a45a8ff 664 huart->State = HAL_UART_STATE_BUSY_RX;
bogdanm 0:9b334a45a8ff 665 }
bogdanm 0:9b334a45a8ff 666 else
bogdanm 0:9b334a45a8ff 667 {
bogdanm 0:9b334a45a8ff 668 huart->State = HAL_UART_STATE_READY;
bogdanm 0:9b334a45a8ff 669 }
bogdanm 0:9b334a45a8ff 670
bogdanm 0:9b334a45a8ff 671 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 672 __HAL_UNLOCK(huart);
bogdanm 0:9b334a45a8ff 673
bogdanm 0:9b334a45a8ff 674 return HAL_OK;
bogdanm 0:9b334a45a8ff 675 }
bogdanm 0:9b334a45a8ff 676 else
bogdanm 0:9b334a45a8ff 677 {
bogdanm 0:9b334a45a8ff 678 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 679 }
bogdanm 0:9b334a45a8ff 680 }
bogdanm 0:9b334a45a8ff 681
bogdanm 0:9b334a45a8ff 682 /**
bogdanm 0:9b334a45a8ff 683 * @brief Receive an amount of data in blocking mode
bogdanm 0:9b334a45a8ff 684 * @param huart: uart handle
bogdanm 0:9b334a45a8ff 685 * @param pData: pointer to data buffer
bogdanm 0:9b334a45a8ff 686 * @param Size: amount of data to be received
bogdanm 0:9b334a45a8ff 687 * @param Timeout : Timeout duration
bogdanm 0:9b334a45a8ff 688 * @retval HAL status
bogdanm 0:9b334a45a8ff 689 */
bogdanm 0:9b334a45a8ff 690 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 691 {
bogdanm 0:9b334a45a8ff 692 uint16_t* tmp;
bogdanm 0:9b334a45a8ff 693 uint16_t uhMask;
bogdanm 0:9b334a45a8ff 694
bogdanm 0:9b334a45a8ff 695 if((huart->State == HAL_UART_STATE_READY) || (huart->State == HAL_UART_STATE_BUSY_TX))
bogdanm 0:9b334a45a8ff 696 {
bogdanm 0:9b334a45a8ff 697 if((pData == NULL ) || (Size == 0))
bogdanm 0:9b334a45a8ff 698 {
bogdanm 0:9b334a45a8ff 699 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 700 }
bogdanm 0:9b334a45a8ff 701
bogdanm 0:9b334a45a8ff 702 /* Process Locked */
bogdanm 0:9b334a45a8ff 703 __HAL_LOCK(huart);
bogdanm 0:9b334a45a8ff 704
bogdanm 0:9b334a45a8ff 705 huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm 0:9b334a45a8ff 706 /* Check if a non-blocking transmit process is ongoing or not */
bogdanm 0:9b334a45a8ff 707 if(huart->State == HAL_UART_STATE_BUSY_TX)
bogdanm 0:9b334a45a8ff 708 {
bogdanm 0:9b334a45a8ff 709 huart->State = HAL_UART_STATE_BUSY_TX_RX;
bogdanm 0:9b334a45a8ff 710 }
bogdanm 0:9b334a45a8ff 711 else
bogdanm 0:9b334a45a8ff 712 {
bogdanm 0:9b334a45a8ff 713 huart->State = HAL_UART_STATE_BUSY_RX;
bogdanm 0:9b334a45a8ff 714 }
bogdanm 0:9b334a45a8ff 715
bogdanm 0:9b334a45a8ff 716 huart->RxXferSize = Size;
bogdanm 0:9b334a45a8ff 717 huart->RxXferCount = Size;
bogdanm 0:9b334a45a8ff 718
bogdanm 0:9b334a45a8ff 719 /* Computation of UART mask to apply to RDR register */
bogdanm 0:9b334a45a8ff 720 UART_MASK_COMPUTATION(huart);
bogdanm 0:9b334a45a8ff 721 uhMask = huart->Mask;
bogdanm 0:9b334a45a8ff 722
bogdanm 0:9b334a45a8ff 723 /* as long as data have to be received */
bogdanm 0:9b334a45a8ff 724 while(huart->RxXferCount > 0)
bogdanm 0:9b334a45a8ff 725 {
bogdanm 0:9b334a45a8ff 726 huart->RxXferCount--;
bogdanm 0:9b334a45a8ff 727 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, Timeout) != HAL_OK)
bogdanm 0:9b334a45a8ff 728 {
bogdanm 0:9b334a45a8ff 729 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 730 }
bogdanm 0:9b334a45a8ff 731 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
bogdanm 0:9b334a45a8ff 732 {
bogdanm 0:9b334a45a8ff 733 tmp = (uint16_t*) pData ;
bogdanm 0:9b334a45a8ff 734 *tmp = (uint16_t)(huart->Instance->RDR & uhMask);
bogdanm 0:9b334a45a8ff 735 pData +=2;
bogdanm 0:9b334a45a8ff 736 }
bogdanm 0:9b334a45a8ff 737 else
bogdanm 0:9b334a45a8ff 738 {
bogdanm 0:9b334a45a8ff 739 *pData++ = (uint8_t)(huart->Instance->RDR & (uint8_t)uhMask);
bogdanm 0:9b334a45a8ff 740 }
bogdanm 0:9b334a45a8ff 741 }
bogdanm 0:9b334a45a8ff 742
bogdanm 0:9b334a45a8ff 743 /* Check if a non-blocking transmit Process is ongoing or not */
bogdanm 0:9b334a45a8ff 744 if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm 0:9b334a45a8ff 745 {
bogdanm 0:9b334a45a8ff 746 huart->State = HAL_UART_STATE_BUSY_TX;
bogdanm 0:9b334a45a8ff 747 }
bogdanm 0:9b334a45a8ff 748 else
bogdanm 0:9b334a45a8ff 749 {
bogdanm 0:9b334a45a8ff 750 huart->State = HAL_UART_STATE_READY;
bogdanm 0:9b334a45a8ff 751 }
bogdanm 0:9b334a45a8ff 752 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 753 __HAL_UNLOCK(huart);
bogdanm 0:9b334a45a8ff 754
bogdanm 0:9b334a45a8ff 755 return HAL_OK;
bogdanm 0:9b334a45a8ff 756 }
bogdanm 0:9b334a45a8ff 757 else
bogdanm 0:9b334a45a8ff 758 {
bogdanm 0:9b334a45a8ff 759 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 760 }
bogdanm 0:9b334a45a8ff 761 }
bogdanm 0:9b334a45a8ff 762
bogdanm 0:9b334a45a8ff 763 /**
bogdanm 0:9b334a45a8ff 764 * @brief Send an amount of data in interrupt mode
bogdanm 0:9b334a45a8ff 765 * @param huart: uart handle
bogdanm 0:9b334a45a8ff 766 * @param pData: pointer to data buffer
bogdanm 0:9b334a45a8ff 767 * @param Size: amount of data to be sent
bogdanm 0:9b334a45a8ff 768 * @retval HAL status
bogdanm 0:9b334a45a8ff 769 */
bogdanm 0:9b334a45a8ff 770 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
bogdanm 0:9b334a45a8ff 771 {
bogdanm 0:9b334a45a8ff 772 if((huart->State == HAL_UART_STATE_READY) || (huart->State == HAL_UART_STATE_BUSY_RX))
bogdanm 0:9b334a45a8ff 773 {
bogdanm 0:9b334a45a8ff 774 if((pData == NULL ) || (Size == 0))
bogdanm 0:9b334a45a8ff 775 {
bogdanm 0:9b334a45a8ff 776 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 777 }
bogdanm 0:9b334a45a8ff 778
bogdanm 0:9b334a45a8ff 779 /* Process Locked */
bogdanm 0:9b334a45a8ff 780 __HAL_LOCK(huart);
bogdanm 0:9b334a45a8ff 781
bogdanm 0:9b334a45a8ff 782 huart->pTxBuffPtr = pData;
bogdanm 0:9b334a45a8ff 783 huart->TxXferSize = Size;
bogdanm 0:9b334a45a8ff 784 huart->TxXferCount = Size;
bogdanm 0:9b334a45a8ff 785
bogdanm 0:9b334a45a8ff 786 huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm 0:9b334a45a8ff 787 /* Check if a receive process is ongoing or not */
bogdanm 0:9b334a45a8ff 788 if(huart->State == HAL_UART_STATE_BUSY_RX)
bogdanm 0:9b334a45a8ff 789 {
bogdanm 0:9b334a45a8ff 790 huart->State = HAL_UART_STATE_BUSY_TX_RX;
bogdanm 0:9b334a45a8ff 791 }
bogdanm 0:9b334a45a8ff 792 else
bogdanm 0:9b334a45a8ff 793 {
bogdanm 0:9b334a45a8ff 794 huart->State = HAL_UART_STATE_BUSY_TX;
bogdanm 0:9b334a45a8ff 795 }
bogdanm 0:9b334a45a8ff 796
bogdanm 0:9b334a45a8ff 797 /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
bogdanm 0:9b334a45a8ff 798 __HAL_UART_ENABLE_IT(huart, UART_IT_ERR);
bogdanm 0:9b334a45a8ff 799
bogdanm 0:9b334a45a8ff 800 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 801 __HAL_UNLOCK(huart);
bogdanm 0:9b334a45a8ff 802
bogdanm 0:9b334a45a8ff 803 /* Enable the UART Transmit Data Register Empty Interrupt */
bogdanm 0:9b334a45a8ff 804 __HAL_UART_ENABLE_IT(huart, UART_IT_TXE);
bogdanm 0:9b334a45a8ff 805
bogdanm 0:9b334a45a8ff 806 return HAL_OK;
bogdanm 0:9b334a45a8ff 807 }
bogdanm 0:9b334a45a8ff 808 else
bogdanm 0:9b334a45a8ff 809 {
bogdanm 0:9b334a45a8ff 810 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 811 }
bogdanm 0:9b334a45a8ff 812 }
bogdanm 0:9b334a45a8ff 813
bogdanm 0:9b334a45a8ff 814 /**
bogdanm 0:9b334a45a8ff 815 * @brief Receive an amount of data in interrupt mode
bogdanm 0:9b334a45a8ff 816 * @param huart: uart handle
bogdanm 0:9b334a45a8ff 817 * @param pData: pointer to data buffer
bogdanm 0:9b334a45a8ff 818 * @param Size: amount of data to be received
bogdanm 0:9b334a45a8ff 819 * @retval HAL status
bogdanm 0:9b334a45a8ff 820 */
bogdanm 0:9b334a45a8ff 821 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
bogdanm 0:9b334a45a8ff 822 {
bogdanm 0:9b334a45a8ff 823 if((huart->State == HAL_UART_STATE_READY) || (huart->State == HAL_UART_STATE_BUSY_TX))
bogdanm 0:9b334a45a8ff 824 {
bogdanm 0:9b334a45a8ff 825 if((pData == NULL ) || (Size == 0))
bogdanm 0:9b334a45a8ff 826 {
bogdanm 0:9b334a45a8ff 827 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 828 }
bogdanm 0:9b334a45a8ff 829
bogdanm 0:9b334a45a8ff 830 /* Process Locked */
bogdanm 0:9b334a45a8ff 831 __HAL_LOCK(huart);
bogdanm 0:9b334a45a8ff 832
bogdanm 0:9b334a45a8ff 833 huart->pRxBuffPtr = pData;
bogdanm 0:9b334a45a8ff 834 huart->RxXferSize = Size;
bogdanm 0:9b334a45a8ff 835 huart->RxXferCount = Size;
bogdanm 0:9b334a45a8ff 836
bogdanm 0:9b334a45a8ff 837 /* Computation of UART mask to apply to RDR register */
bogdanm 0:9b334a45a8ff 838 UART_MASK_COMPUTATION(huart);
bogdanm 0:9b334a45a8ff 839
bogdanm 0:9b334a45a8ff 840 huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm 0:9b334a45a8ff 841 /* Check if a transmit process is ongoing or not */
bogdanm 0:9b334a45a8ff 842 if(huart->State == HAL_UART_STATE_BUSY_TX)
bogdanm 0:9b334a45a8ff 843 {
bogdanm 0:9b334a45a8ff 844 huart->State = HAL_UART_STATE_BUSY_TX_RX;
bogdanm 0:9b334a45a8ff 845 }
bogdanm 0:9b334a45a8ff 846 else
bogdanm 0:9b334a45a8ff 847 {
bogdanm 0:9b334a45a8ff 848 huart->State = HAL_UART_STATE_BUSY_RX;
bogdanm 0:9b334a45a8ff 849 }
bogdanm 0:9b334a45a8ff 850
bogdanm 0:9b334a45a8ff 851 /* Enable the UART Parity Error Interrupt */
bogdanm 0:9b334a45a8ff 852 __HAL_UART_ENABLE_IT(huart, UART_IT_PE);
bogdanm 0:9b334a45a8ff 853
bogdanm 0:9b334a45a8ff 854 /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
bogdanm 0:9b334a45a8ff 855 __HAL_UART_ENABLE_IT(huart, UART_IT_ERR);
bogdanm 0:9b334a45a8ff 856
bogdanm 0:9b334a45a8ff 857 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 858 __HAL_UNLOCK(huart);
bogdanm 0:9b334a45a8ff 859
bogdanm 0:9b334a45a8ff 860 /* Enable the UART Data Register not empty Interrupt */
bogdanm 0:9b334a45a8ff 861 __HAL_UART_ENABLE_IT(huart, UART_IT_RXNE);
bogdanm 0:9b334a45a8ff 862
bogdanm 0:9b334a45a8ff 863 return HAL_OK;
bogdanm 0:9b334a45a8ff 864 }
bogdanm 0:9b334a45a8ff 865 else
bogdanm 0:9b334a45a8ff 866 {
bogdanm 0:9b334a45a8ff 867 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 868 }
bogdanm 0:9b334a45a8ff 869 }
bogdanm 0:9b334a45a8ff 870
bogdanm 0:9b334a45a8ff 871 /**
bogdanm 0:9b334a45a8ff 872 * @brief Send an amount of data in DMA mode
bogdanm 0:9b334a45a8ff 873 * @param huart: uart handle
bogdanm 0:9b334a45a8ff 874 * @param pData: pointer to data buffer
bogdanm 0:9b334a45a8ff 875 * @param Size: amount of data to be sent
bogdanm 0:9b334a45a8ff 876 * @retval HAL status
bogdanm 0:9b334a45a8ff 877 */
bogdanm 0:9b334a45a8ff 878 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
bogdanm 0:9b334a45a8ff 879 {
bogdanm 0:9b334a45a8ff 880 uint32_t *tmp;
bogdanm 0:9b334a45a8ff 881
bogdanm 0:9b334a45a8ff 882 if((huart->State == HAL_UART_STATE_READY) || (huart->State == HAL_UART_STATE_BUSY_RX))
bogdanm 0:9b334a45a8ff 883 {
bogdanm 0:9b334a45a8ff 884 if((pData == NULL ) || (Size == 0))
bogdanm 0:9b334a45a8ff 885 {
bogdanm 0:9b334a45a8ff 886 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 887 }
bogdanm 0:9b334a45a8ff 888
bogdanm 0:9b334a45a8ff 889 /* Process Locked */
bogdanm 0:9b334a45a8ff 890 __HAL_LOCK(huart);
bogdanm 0:9b334a45a8ff 891
bogdanm 0:9b334a45a8ff 892 huart->pTxBuffPtr = pData;
bogdanm 0:9b334a45a8ff 893 huart->TxXferSize = Size;
bogdanm 0:9b334a45a8ff 894 huart->TxXferCount = Size;
bogdanm 0:9b334a45a8ff 895
bogdanm 0:9b334a45a8ff 896 huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm 0:9b334a45a8ff 897 /* Check if a receive process is ongoing or not */
bogdanm 0:9b334a45a8ff 898 if(huart->State == HAL_UART_STATE_BUSY_RX)
bogdanm 0:9b334a45a8ff 899 {
bogdanm 0:9b334a45a8ff 900 huart->State = HAL_UART_STATE_BUSY_TX_RX;
bogdanm 0:9b334a45a8ff 901 }
bogdanm 0:9b334a45a8ff 902 else
bogdanm 0:9b334a45a8ff 903 {
bogdanm 0:9b334a45a8ff 904 huart->State = HAL_UART_STATE_BUSY_TX;
bogdanm 0:9b334a45a8ff 905 }
bogdanm 0:9b334a45a8ff 906
bogdanm 0:9b334a45a8ff 907 /* Set the UART DMA transfer complete callback */
bogdanm 0:9b334a45a8ff 908 huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt;
bogdanm 0:9b334a45a8ff 909
bogdanm 0:9b334a45a8ff 910 /* Set the UART DMA Half transfer complete callback */
bogdanm 0:9b334a45a8ff 911 huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt;
bogdanm 0:9b334a45a8ff 912
bogdanm 0:9b334a45a8ff 913 /* Set the DMA error callback */
bogdanm 0:9b334a45a8ff 914 huart->hdmatx->XferErrorCallback = UART_DMAError;
bogdanm 0:9b334a45a8ff 915
bogdanm 0:9b334a45a8ff 916 /* Enable the UART transmit DMA channel */
bogdanm 0:9b334a45a8ff 917 tmp = (uint32_t*)&pData;
bogdanm 0:9b334a45a8ff 918 HAL_DMA_Start_IT(huart->hdmatx, *(uint32_t*)tmp, (uint32_t)&huart->Instance->TDR, Size);
bogdanm 0:9b334a45a8ff 919
bogdanm 0:9b334a45a8ff 920 /* Clear the TC flag in the SR register by writing 0 to it */
bogdanm 0:9b334a45a8ff 921 __HAL_UART_CLEAR_IT(huart, UART_FLAG_TC);
bogdanm 0:9b334a45a8ff 922
bogdanm 0:9b334a45a8ff 923
bogdanm 0:9b334a45a8ff 924 /* Enable the DMA transfer for transmit request by setting the DMAT bit
bogdanm 0:9b334a45a8ff 925 in the UART CR3 register */
bogdanm 0:9b334a45a8ff 926 huart->Instance->CR3 |= USART_CR3_DMAT;
bogdanm 0:9b334a45a8ff 927
bogdanm 0:9b334a45a8ff 928 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 929 __HAL_UNLOCK(huart);
bogdanm 0:9b334a45a8ff 930
bogdanm 0:9b334a45a8ff 931 return HAL_OK;
bogdanm 0:9b334a45a8ff 932 }
bogdanm 0:9b334a45a8ff 933 else
bogdanm 0:9b334a45a8ff 934 {
bogdanm 0:9b334a45a8ff 935 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 936 }
bogdanm 0:9b334a45a8ff 937 }
bogdanm 0:9b334a45a8ff 938
bogdanm 0:9b334a45a8ff 939 /**
bogdanm 0:9b334a45a8ff 940 * @brief Receive an amount of data in DMA mode
bogdanm 0:9b334a45a8ff 941 * @param huart: uart handle
bogdanm 0:9b334a45a8ff 942 * @param pData: pointer to data buffer
bogdanm 0:9b334a45a8ff 943 * @param Size: amount of data to be received
bogdanm 0:9b334a45a8ff 944 * @note When the UART parity is enabled (PCE = 1), the received data contain
bogdanm 0:9b334a45a8ff 945 * the parity bit (MSB position)
bogdanm 0:9b334a45a8ff 946 * @retval HAL status
bogdanm 0:9b334a45a8ff 947 */
bogdanm 0:9b334a45a8ff 948 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
bogdanm 0:9b334a45a8ff 949 {
bogdanm 0:9b334a45a8ff 950 uint32_t *tmp;
bogdanm 0:9b334a45a8ff 951
bogdanm 0:9b334a45a8ff 952 if((huart->State == HAL_UART_STATE_READY) || (huart->State == HAL_UART_STATE_BUSY_TX))
bogdanm 0:9b334a45a8ff 953 {
bogdanm 0:9b334a45a8ff 954 if((pData == NULL ) || (Size == 0))
bogdanm 0:9b334a45a8ff 955 {
bogdanm 0:9b334a45a8ff 956 return HAL_ERROR;
bogdanm 0:9b334a45a8ff 957 }
bogdanm 0:9b334a45a8ff 958
bogdanm 0:9b334a45a8ff 959 /* Process Locked */
bogdanm 0:9b334a45a8ff 960 __HAL_LOCK(huart);
bogdanm 0:9b334a45a8ff 961
bogdanm 0:9b334a45a8ff 962 huart->pRxBuffPtr = pData;
bogdanm 0:9b334a45a8ff 963 huart->RxXferSize = Size;
bogdanm 0:9b334a45a8ff 964
bogdanm 0:9b334a45a8ff 965 huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm 0:9b334a45a8ff 966 /* Check if a transmit process is ongoing or not */
bogdanm 0:9b334a45a8ff 967 if(huart->State == HAL_UART_STATE_BUSY_TX)
bogdanm 0:9b334a45a8ff 968 {
bogdanm 0:9b334a45a8ff 969 huart->State = HAL_UART_STATE_BUSY_TX_RX;
bogdanm 0:9b334a45a8ff 970 }
bogdanm 0:9b334a45a8ff 971 else
bogdanm 0:9b334a45a8ff 972 {
bogdanm 0:9b334a45a8ff 973 huart->State = HAL_UART_STATE_BUSY_RX;
bogdanm 0:9b334a45a8ff 974 }
bogdanm 0:9b334a45a8ff 975
bogdanm 0:9b334a45a8ff 976 /* Set the UART DMA transfer complete callback */
bogdanm 0:9b334a45a8ff 977 huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt;
bogdanm 0:9b334a45a8ff 978
bogdanm 0:9b334a45a8ff 979 /* Set the UART DMA Half transfer complete callback */
bogdanm 0:9b334a45a8ff 980 huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt;
bogdanm 0:9b334a45a8ff 981
bogdanm 0:9b334a45a8ff 982 /* Set the DMA error callback */
bogdanm 0:9b334a45a8ff 983 huart->hdmarx->XferErrorCallback = UART_DMAError;
bogdanm 0:9b334a45a8ff 984
bogdanm 0:9b334a45a8ff 985 /* Enable the DMA channel */
bogdanm 0:9b334a45a8ff 986 tmp = (uint32_t*)&pData;
bogdanm 0:9b334a45a8ff 987 HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->RDR, *(uint32_t*)tmp, Size);
bogdanm 0:9b334a45a8ff 988
bogdanm 0:9b334a45a8ff 989 /* Enable the DMA transfer for the receiver request by setting the DMAR bit
bogdanm 0:9b334a45a8ff 990 in the UART CR3 register */
bogdanm 0:9b334a45a8ff 991 huart->Instance->CR3 |= USART_CR3_DMAR;
bogdanm 0:9b334a45a8ff 992
bogdanm 0:9b334a45a8ff 993 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 994 __HAL_UNLOCK(huart);
bogdanm 0:9b334a45a8ff 995
bogdanm 0:9b334a45a8ff 996 return HAL_OK;
bogdanm 0:9b334a45a8ff 997 }
bogdanm 0:9b334a45a8ff 998 else
bogdanm 0:9b334a45a8ff 999 {
bogdanm 0:9b334a45a8ff 1000 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1001 }
bogdanm 0:9b334a45a8ff 1002 }
bogdanm 0:9b334a45a8ff 1003
bogdanm 0:9b334a45a8ff 1004 /**
bogdanm 0:9b334a45a8ff 1005 * @brief Pauses the DMA Transfer.
bogdanm 0:9b334a45a8ff 1006 * @param huart: UART handle
bogdanm 0:9b334a45a8ff 1007 * @retval None
bogdanm 0:9b334a45a8ff 1008 */
bogdanm 0:9b334a45a8ff 1009 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1010 {
bogdanm 0:9b334a45a8ff 1011 /* Process Locked */
bogdanm 0:9b334a45a8ff 1012 __HAL_LOCK(huart);
bogdanm 0:9b334a45a8ff 1013
bogdanm 0:9b334a45a8ff 1014 if(huart->State == HAL_UART_STATE_BUSY_TX)
bogdanm 0:9b334a45a8ff 1015 {
bogdanm 0:9b334a45a8ff 1016 /* Disable the UART DMA Tx request */
bogdanm 0:9b334a45a8ff 1017 huart->Instance->CR3 &= (uint32_t)(~USART_CR3_DMAT);
bogdanm 0:9b334a45a8ff 1018 }
bogdanm 0:9b334a45a8ff 1019 else if(huart->State == HAL_UART_STATE_BUSY_RX)
bogdanm 0:9b334a45a8ff 1020 {
bogdanm 0:9b334a45a8ff 1021 /* Disable the UART DMA Rx request */
bogdanm 0:9b334a45a8ff 1022 huart->Instance->CR3 &= (uint32_t)(~USART_CR3_DMAR);
bogdanm 0:9b334a45a8ff 1023 }
bogdanm 0:9b334a45a8ff 1024 else if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm 0:9b334a45a8ff 1025 {
bogdanm 0:9b334a45a8ff 1026 /* Disable the UART DMA Tx request */
bogdanm 0:9b334a45a8ff 1027 huart->Instance->CR3 &= (uint32_t)(~USART_CR3_DMAT);
bogdanm 0:9b334a45a8ff 1028 /* Disable the UART DMA Rx request */
bogdanm 0:9b334a45a8ff 1029 huart->Instance->CR3 &= (uint32_t)(~USART_CR3_DMAR);
bogdanm 0:9b334a45a8ff 1030 }
bogdanm 0:9b334a45a8ff 1031
bogdanm 0:9b334a45a8ff 1032 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1033 __HAL_UNLOCK(huart);
bogdanm 0:9b334a45a8ff 1034
bogdanm 0:9b334a45a8ff 1035 return HAL_OK;
bogdanm 0:9b334a45a8ff 1036 }
bogdanm 0:9b334a45a8ff 1037
bogdanm 0:9b334a45a8ff 1038 /**
bogdanm 0:9b334a45a8ff 1039 * @brief Resumes the DMA Transfer.
bogdanm 0:9b334a45a8ff 1040 * @param huart: UART handle
bogdanm 0:9b334a45a8ff 1041 * @retval None
bogdanm 0:9b334a45a8ff 1042 */
bogdanm 0:9b334a45a8ff 1043 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1044 {
bogdanm 0:9b334a45a8ff 1045 /* Process Locked */
bogdanm 0:9b334a45a8ff 1046 __HAL_LOCK(huart);
bogdanm 0:9b334a45a8ff 1047
bogdanm 0:9b334a45a8ff 1048 if(huart->State == HAL_UART_STATE_BUSY_TX)
bogdanm 0:9b334a45a8ff 1049 {
bogdanm 0:9b334a45a8ff 1050 /* Enable the UART DMA Tx request */
bogdanm 0:9b334a45a8ff 1051 huart->Instance->CR3 |= USART_CR3_DMAT;
bogdanm 0:9b334a45a8ff 1052 }
bogdanm 0:9b334a45a8ff 1053 else if(huart->State == HAL_UART_STATE_BUSY_RX)
bogdanm 0:9b334a45a8ff 1054 {
bogdanm 0:9b334a45a8ff 1055 /* Clear the Overrun flag before resuming the Rx transfer*/
bogdanm 0:9b334a45a8ff 1056 __HAL_UART_CLEAR_IT(huart, UART_CLEAR_OREF);
bogdanm 0:9b334a45a8ff 1057
bogdanm 0:9b334a45a8ff 1058 /* Enable the UART DMA Rx request */
bogdanm 0:9b334a45a8ff 1059 huart->Instance->CR3 |= USART_CR3_DMAR;
bogdanm 0:9b334a45a8ff 1060 }
bogdanm 0:9b334a45a8ff 1061 else if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm 0:9b334a45a8ff 1062 {
bogdanm 0:9b334a45a8ff 1063 /* Clear the Overrun flag before resuming the Rx transfer*/
bogdanm 0:9b334a45a8ff 1064 __HAL_UART_CLEAR_IT(huart, UART_CLEAR_OREF);
bogdanm 0:9b334a45a8ff 1065
bogdanm 0:9b334a45a8ff 1066 /* Enable the UART DMA Rx request before the DMA Tx request */
bogdanm 0:9b334a45a8ff 1067 huart->Instance->CR3 |= USART_CR3_DMAR;
bogdanm 0:9b334a45a8ff 1068
bogdanm 0:9b334a45a8ff 1069 /* Enable the UART DMA Tx request */
bogdanm 0:9b334a45a8ff 1070 huart->Instance->CR3 |= USART_CR3_DMAT;
bogdanm 0:9b334a45a8ff 1071 }
bogdanm 0:9b334a45a8ff 1072
bogdanm 0:9b334a45a8ff 1073 /* If the UART peripheral is still not enabled, enable it */
bogdanm 0:9b334a45a8ff 1074 if ((huart->Instance->CR1 & USART_CR1_UE) == 0)
bogdanm 0:9b334a45a8ff 1075 {
bogdanm 0:9b334a45a8ff 1076 /* Enable UART peripheral */
bogdanm 0:9b334a45a8ff 1077 __HAL_UART_ENABLE(huart);
bogdanm 0:9b334a45a8ff 1078 }
bogdanm 0:9b334a45a8ff 1079
bogdanm 0:9b334a45a8ff 1080 return HAL_OK;
bogdanm 0:9b334a45a8ff 1081 }
bogdanm 0:9b334a45a8ff 1082
bogdanm 0:9b334a45a8ff 1083 /**
bogdanm 0:9b334a45a8ff 1084 * @brief Stops the DMA Transfer.
bogdanm 0:9b334a45a8ff 1085 * @param huart: UART handle
bogdanm 0:9b334a45a8ff 1086 * @retval None
bogdanm 0:9b334a45a8ff 1087 */
bogdanm 0:9b334a45a8ff 1088 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1089 {
bogdanm 0:9b334a45a8ff 1090 /* The Lock is not implemented on this API to allow the user application
bogdanm 0:9b334a45a8ff 1091 to call the HAL UART API under callbacks HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback() /
bogdanm 0:9b334a45a8ff 1092 HAL_UART_TxHalfCpltCallback / HAL_UART_RxHalfCpltCallback:
bogdanm 0:9b334a45a8ff 1093 indeed, when HAL_DMA_Abort() API is called, the DMA TX/RX Transfer or Half Transfer complete
bogdanm 0:9b334a45a8ff 1094 interrupt is generated if the DMA transfer interruption occurs at the middle or at the end of
bogdanm 0:9b334a45a8ff 1095 the stream and the corresponding call back is executed. */
bogdanm 0:9b334a45a8ff 1096
bogdanm 0:9b334a45a8ff 1097 /* Disable the UART Tx/Rx DMA requests */
bogdanm 0:9b334a45a8ff 1098 huart->Instance->CR3 &= ~USART_CR3_DMAT;
bogdanm 0:9b334a45a8ff 1099 huart->Instance->CR3 &= ~USART_CR3_DMAR;
bogdanm 0:9b334a45a8ff 1100
bogdanm 0:9b334a45a8ff 1101 /* Abort the UART DMA tx channel */
bogdanm 0:9b334a45a8ff 1102 if(huart->hdmatx != NULL)
bogdanm 0:9b334a45a8ff 1103 {
bogdanm 0:9b334a45a8ff 1104 HAL_DMA_Abort(huart->hdmatx);
bogdanm 0:9b334a45a8ff 1105 }
bogdanm 0:9b334a45a8ff 1106 /* Abort the UART DMA rx channel */
bogdanm 0:9b334a45a8ff 1107 if(huart->hdmarx != NULL)
bogdanm 0:9b334a45a8ff 1108 {
bogdanm 0:9b334a45a8ff 1109 HAL_DMA_Abort(huart->hdmarx);
bogdanm 0:9b334a45a8ff 1110 }
bogdanm 0:9b334a45a8ff 1111
bogdanm 0:9b334a45a8ff 1112 huart->State = HAL_UART_STATE_READY;
bogdanm 0:9b334a45a8ff 1113
bogdanm 0:9b334a45a8ff 1114 return HAL_OK;
bogdanm 0:9b334a45a8ff 1115 }
bogdanm 0:9b334a45a8ff 1116
bogdanm 0:9b334a45a8ff 1117 /**
bogdanm 0:9b334a45a8ff 1118 * @brief This function handles UART interrupt request.
bogdanm 0:9b334a45a8ff 1119 * @param huart: uart handle
bogdanm 0:9b334a45a8ff 1120 * @retval None
bogdanm 0:9b334a45a8ff 1121 */
bogdanm 0:9b334a45a8ff 1122 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1123 {
bogdanm 0:9b334a45a8ff 1124 /* UART parity error interrupt occurred -------------------------------------*/
bogdanm 0:9b334a45a8ff 1125 if((__HAL_UART_GET_IT(huart, UART_IT_PE) != RESET) && (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_PE) != RESET))
bogdanm 0:9b334a45a8ff 1126 {
bogdanm 0:9b334a45a8ff 1127 __HAL_UART_CLEAR_PEFLAG(huart);
bogdanm 0:9b334a45a8ff 1128
bogdanm 0:9b334a45a8ff 1129 huart->ErrorCode |= HAL_UART_ERROR_PE;
bogdanm 0:9b334a45a8ff 1130 /* Set the UART state ready to be able to start again the process */
bogdanm 0:9b334a45a8ff 1131 huart->State = HAL_UART_STATE_READY;
bogdanm 0:9b334a45a8ff 1132 }
bogdanm 0:9b334a45a8ff 1133
bogdanm 0:9b334a45a8ff 1134 /* UART frame error interrupt occurred --------------------------------------*/
bogdanm 0:9b334a45a8ff 1135 if((__HAL_UART_GET_IT(huart, UART_IT_FE) != RESET) && (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_ERR) != RESET))
bogdanm 0:9b334a45a8ff 1136 {
bogdanm 0:9b334a45a8ff 1137 __HAL_UART_CLEAR_FEFLAG(huart);
bogdanm 0:9b334a45a8ff 1138
bogdanm 0:9b334a45a8ff 1139 huart->ErrorCode |= HAL_UART_ERROR_FE;
bogdanm 0:9b334a45a8ff 1140 /* Set the UART state ready to be able to start again the process */
bogdanm 0:9b334a45a8ff 1141 huart->State = HAL_UART_STATE_READY;
bogdanm 0:9b334a45a8ff 1142 }
bogdanm 0:9b334a45a8ff 1143
bogdanm 0:9b334a45a8ff 1144 /* UART noise error interrupt occurred --------------------------------------*/
bogdanm 0:9b334a45a8ff 1145 if((__HAL_UART_GET_IT(huart, UART_IT_NE) != RESET) && (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_ERR) != RESET))
bogdanm 0:9b334a45a8ff 1146 {
bogdanm 0:9b334a45a8ff 1147 __HAL_UART_CLEAR_NEFLAG(huart);
bogdanm 0:9b334a45a8ff 1148
bogdanm 0:9b334a45a8ff 1149 huart->ErrorCode |= HAL_UART_ERROR_NE;
bogdanm 0:9b334a45a8ff 1150 /* Set the UART state ready to be able to start again the process */
bogdanm 0:9b334a45a8ff 1151 huart->State = HAL_UART_STATE_READY;
bogdanm 0:9b334a45a8ff 1152 }
bogdanm 0:9b334a45a8ff 1153
bogdanm 0:9b334a45a8ff 1154 /* UART Over-Run interrupt occurred -----------------------------------------*/
bogdanm 0:9b334a45a8ff 1155 if((__HAL_UART_GET_IT(huart, UART_IT_ORE) != RESET) && (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_ERR) != RESET))
bogdanm 0:9b334a45a8ff 1156 {
bogdanm 0:9b334a45a8ff 1157 __HAL_UART_CLEAR_OREFLAG(huart);
bogdanm 0:9b334a45a8ff 1158
bogdanm 0:9b334a45a8ff 1159 huart->ErrorCode |= HAL_UART_ERROR_ORE;
bogdanm 0:9b334a45a8ff 1160 /* Set the UART state ready to be able to start again the process */
bogdanm 0:9b334a45a8ff 1161 huart->State = HAL_UART_STATE_READY;
bogdanm 0:9b334a45a8ff 1162 }
bogdanm 0:9b334a45a8ff 1163
bogdanm 0:9b334a45a8ff 1164 /* Call UART Error Call back function if need be --------------------------*/
bogdanm 0:9b334a45a8ff 1165 if(huart->ErrorCode != HAL_UART_ERROR_NONE)
bogdanm 0:9b334a45a8ff 1166 {
bogdanm 0:9b334a45a8ff 1167 HAL_UART_ErrorCallback(huart);
bogdanm 0:9b334a45a8ff 1168 }
bogdanm 0:9b334a45a8ff 1169
bogdanm 0:9b334a45a8ff 1170 /* UART in mode Receiver ---------------------------------------------------*/
bogdanm 0:9b334a45a8ff 1171 if((__HAL_UART_GET_IT(huart, UART_IT_RXNE) != RESET) && (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_RXNE) != RESET))
bogdanm 0:9b334a45a8ff 1172 {
bogdanm 0:9b334a45a8ff 1173 UART_Receive_IT(huart);
bogdanm 0:9b334a45a8ff 1174 /* Clear RXNE interrupt flag */
bogdanm 0:9b334a45a8ff 1175 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
bogdanm 0:9b334a45a8ff 1176 }
bogdanm 0:9b334a45a8ff 1177
bogdanm 0:9b334a45a8ff 1178
bogdanm 0:9b334a45a8ff 1179 /* UART in mode Transmitter ------------------------------------------------*/
bogdanm 0:9b334a45a8ff 1180 if((__HAL_UART_GET_IT(huart, UART_IT_TXE) != RESET) &&(__HAL_UART_GET_IT_SOURCE(huart, UART_IT_TXE) != RESET))
bogdanm 0:9b334a45a8ff 1181 {
bogdanm 0:9b334a45a8ff 1182 UART_Transmit_IT(huart);
bogdanm 0:9b334a45a8ff 1183 }
bogdanm 0:9b334a45a8ff 1184
bogdanm 0:9b334a45a8ff 1185 /* UART in mode Transmitter (transmission end) -----------------------------*/
bogdanm 0:9b334a45a8ff 1186 if((__HAL_UART_GET_IT(huart, UART_IT_TC) != RESET) &&(__HAL_UART_GET_IT_SOURCE(huart, UART_IT_TC) != RESET))
bogdanm 0:9b334a45a8ff 1187 {
bogdanm 0:9b334a45a8ff 1188 UART_EndTransmit_IT(huart);
bogdanm 0:9b334a45a8ff 1189 }
bogdanm 0:9b334a45a8ff 1190
bogdanm 0:9b334a45a8ff 1191 }
bogdanm 0:9b334a45a8ff 1192
bogdanm 0:9b334a45a8ff 1193
bogdanm 0:9b334a45a8ff 1194 /**
bogdanm 0:9b334a45a8ff 1195 * @brief This function handles UART Communication Timeout.
bogdanm 0:9b334a45a8ff 1196 * @param huart: UART handle
bogdanm 0:9b334a45a8ff 1197 * @param Flag: specifies the UART flag to check.
bogdanm 0:9b334a45a8ff 1198 * @param Status: The new Flag status (SET or RESET).
bogdanm 0:9b334a45a8ff 1199 * @param Timeout: Timeout duration
bogdanm 0:9b334a45a8ff 1200 * @retval HAL status
bogdanm 0:9b334a45a8ff 1201 */
bogdanm 0:9b334a45a8ff 1202 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
bogdanm 0:9b334a45a8ff 1203 {
bogdanm 0:9b334a45a8ff 1204 uint32_t tickstart = HAL_GetTick();
bogdanm 0:9b334a45a8ff 1205
bogdanm 0:9b334a45a8ff 1206 /* Wait until flag is set */
bogdanm 0:9b334a45a8ff 1207 if(Status == RESET)
bogdanm 0:9b334a45a8ff 1208 {
bogdanm 0:9b334a45a8ff 1209 while(__HAL_UART_GET_FLAG(huart, Flag) == RESET)
bogdanm 0:9b334a45a8ff 1210 {
bogdanm 0:9b334a45a8ff 1211 /* Check for the Timeout */
bogdanm 0:9b334a45a8ff 1212 if(Timeout != HAL_MAX_DELAY)
bogdanm 0:9b334a45a8ff 1213 {
bogdanm 0:9b334a45a8ff 1214 if((Timeout == 0)||((HAL_GetTick()-tickstart) >= Timeout))
bogdanm 0:9b334a45a8ff 1215 {
bogdanm 0:9b334a45a8ff 1216 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
bogdanm 0:9b334a45a8ff 1217 __HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
bogdanm 0:9b334a45a8ff 1218 __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
bogdanm 0:9b334a45a8ff 1219 __HAL_UART_DISABLE_IT(huart, UART_IT_PE);
bogdanm 0:9b334a45a8ff 1220 __HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
bogdanm 0:9b334a45a8ff 1221
bogdanm 0:9b334a45a8ff 1222 huart->State= HAL_UART_STATE_READY;
bogdanm 0:9b334a45a8ff 1223
bogdanm 0:9b334a45a8ff 1224 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1225 __HAL_UNLOCK(huart);
bogdanm 0:9b334a45a8ff 1226
bogdanm 0:9b334a45a8ff 1227 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1228 }
bogdanm 0:9b334a45a8ff 1229 }
bogdanm 0:9b334a45a8ff 1230 }
bogdanm 0:9b334a45a8ff 1231 }
bogdanm 0:9b334a45a8ff 1232 else
bogdanm 0:9b334a45a8ff 1233 {
bogdanm 0:9b334a45a8ff 1234 while(__HAL_UART_GET_FLAG(huart, Flag) != RESET)
bogdanm 0:9b334a45a8ff 1235 {
bogdanm 0:9b334a45a8ff 1236 /* Check for the Timeout */
bogdanm 0:9b334a45a8ff 1237 if(Timeout != HAL_MAX_DELAY)
bogdanm 0:9b334a45a8ff 1238 {
bogdanm 0:9b334a45a8ff 1239 if((Timeout == 0)||((HAL_GetTick()-tickstart) >= Timeout))
bogdanm 0:9b334a45a8ff 1240 {
bogdanm 0:9b334a45a8ff 1241 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
bogdanm 0:9b334a45a8ff 1242 __HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
bogdanm 0:9b334a45a8ff 1243 __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
bogdanm 0:9b334a45a8ff 1244 __HAL_UART_DISABLE_IT(huart, UART_IT_PE);
bogdanm 0:9b334a45a8ff 1245 __HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
bogdanm 0:9b334a45a8ff 1246
bogdanm 0:9b334a45a8ff 1247 huart->State= HAL_UART_STATE_READY;
bogdanm 0:9b334a45a8ff 1248
bogdanm 0:9b334a45a8ff 1249 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1250 __HAL_UNLOCK(huart);
bogdanm 0:9b334a45a8ff 1251
bogdanm 0:9b334a45a8ff 1252 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1253 }
bogdanm 0:9b334a45a8ff 1254 }
bogdanm 0:9b334a45a8ff 1255 }
bogdanm 0:9b334a45a8ff 1256 }
bogdanm 0:9b334a45a8ff 1257 return HAL_OK;
bogdanm 0:9b334a45a8ff 1258 }
bogdanm 0:9b334a45a8ff 1259
bogdanm 0:9b334a45a8ff 1260
bogdanm 0:9b334a45a8ff 1261
bogdanm 0:9b334a45a8ff 1262 /**
bogdanm 0:9b334a45a8ff 1263 * @brief DMA UART transmit process complete callback
bogdanm 0:9b334a45a8ff 1264 * @param hdma: DMA handle
bogdanm 0:9b334a45a8ff 1265 * @retval None
bogdanm 0:9b334a45a8ff 1266 */
bogdanm 0:9b334a45a8ff 1267 static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 1268 {
bogdanm 0:9b334a45a8ff 1269 UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm 0:9b334a45a8ff 1270
bogdanm 0:9b334a45a8ff 1271 /* DMA Normal mode*/
bogdanm 0:9b334a45a8ff 1272 if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0)
bogdanm 0:9b334a45a8ff 1273 {
bogdanm 0:9b334a45a8ff 1274 huart->TxXferCount = 0;
bogdanm 0:9b334a45a8ff 1275
bogdanm 0:9b334a45a8ff 1276 /* Disable the DMA transfer for transmit request by setting the DMAT bit
bogdanm 0:9b334a45a8ff 1277 in the UART CR3 register */
bogdanm 0:9b334a45a8ff 1278 huart->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_DMAT);
bogdanm 0:9b334a45a8ff 1279
bogdanm 0:9b334a45a8ff 1280 /* Enable the UART Transmit Complete Interrupt */
bogdanm 0:9b334a45a8ff 1281 __HAL_UART_ENABLE_IT(huart, UART_IT_TC);
bogdanm 0:9b334a45a8ff 1282 }
bogdanm 0:9b334a45a8ff 1283 /* DMA Circular mode */
bogdanm 0:9b334a45a8ff 1284 else
bogdanm 0:9b334a45a8ff 1285 {
bogdanm 0:9b334a45a8ff 1286 HAL_UART_TxCpltCallback(huart);
bogdanm 0:9b334a45a8ff 1287 }
bogdanm 0:9b334a45a8ff 1288 }
bogdanm 0:9b334a45a8ff 1289
bogdanm 0:9b334a45a8ff 1290 /**
bogdanm 0:9b334a45a8ff 1291 * @brief DMA UART transmit process half complete callback
bogdanm 0:9b334a45a8ff 1292 * @param hdma : DMA handle
bogdanm 0:9b334a45a8ff 1293 * @retval None
bogdanm 0:9b334a45a8ff 1294 */
bogdanm 0:9b334a45a8ff 1295 static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 1296 {
bogdanm 0:9b334a45a8ff 1297 UART_HandleTypeDef* huart = (UART_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
bogdanm 0:9b334a45a8ff 1298
bogdanm 0:9b334a45a8ff 1299 HAL_UART_TxHalfCpltCallback(huart);
bogdanm 0:9b334a45a8ff 1300 }
bogdanm 0:9b334a45a8ff 1301
bogdanm 0:9b334a45a8ff 1302 /**
bogdanm 0:9b334a45a8ff 1303 * @brief DMA UART receive process complete callback
bogdanm 0:9b334a45a8ff 1304 * @param hdma: DMA handle
bogdanm 0:9b334a45a8ff 1305 * @retval None
bogdanm 0:9b334a45a8ff 1306 */
bogdanm 0:9b334a45a8ff 1307 static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 1308 {
bogdanm 0:9b334a45a8ff 1309 UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm 0:9b334a45a8ff 1310
bogdanm 0:9b334a45a8ff 1311 /* DMA Normal mode */
bogdanm 0:9b334a45a8ff 1312 if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0)
bogdanm 0:9b334a45a8ff 1313 {
bogdanm 0:9b334a45a8ff 1314 huart->RxXferCount = 0;
bogdanm 0:9b334a45a8ff 1315
bogdanm 0:9b334a45a8ff 1316 /* Disable the DMA transfer for the receiver request by setting the DMAR bit
bogdanm 0:9b334a45a8ff 1317 in the UART CR3 register */
bogdanm 0:9b334a45a8ff 1318 huart->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_DMAR);
bogdanm 0:9b334a45a8ff 1319
bogdanm 0:9b334a45a8ff 1320 /* Check if a transmit Process is ongoing or not */
bogdanm 0:9b334a45a8ff 1321 if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm 0:9b334a45a8ff 1322 {
bogdanm 0:9b334a45a8ff 1323 huart->State = HAL_UART_STATE_BUSY_TX;
bogdanm 0:9b334a45a8ff 1324 }
bogdanm 0:9b334a45a8ff 1325 else
bogdanm 0:9b334a45a8ff 1326 {
bogdanm 0:9b334a45a8ff 1327 huart->State = HAL_UART_STATE_READY;
bogdanm 0:9b334a45a8ff 1328 }
bogdanm 0:9b334a45a8ff 1329 }
bogdanm 0:9b334a45a8ff 1330 HAL_UART_RxCpltCallback(huart);
bogdanm 0:9b334a45a8ff 1331 }
bogdanm 0:9b334a45a8ff 1332
bogdanm 0:9b334a45a8ff 1333 /**
bogdanm 0:9b334a45a8ff 1334 * @brief DMA UART receive process half complete callback
bogdanm 0:9b334a45a8ff 1335 * @param hdma : DMA handle
bogdanm 0:9b334a45a8ff 1336 * @retval None
bogdanm 0:9b334a45a8ff 1337 */
bogdanm 0:9b334a45a8ff 1338 static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 1339 {
bogdanm 0:9b334a45a8ff 1340 UART_HandleTypeDef* huart = (UART_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
bogdanm 0:9b334a45a8ff 1341
bogdanm 0:9b334a45a8ff 1342 HAL_UART_RxHalfCpltCallback(huart);
bogdanm 0:9b334a45a8ff 1343 }
bogdanm 0:9b334a45a8ff 1344
bogdanm 0:9b334a45a8ff 1345 /**
bogdanm 0:9b334a45a8ff 1346 * @brief DMA UART communication error callback
bogdanm 0:9b334a45a8ff 1347 * @param hdma: DMA handle
bogdanm 0:9b334a45a8ff 1348 * @retval None
bogdanm 0:9b334a45a8ff 1349 */
bogdanm 0:9b334a45a8ff 1350 static void UART_DMAError(DMA_HandleTypeDef *hdma)
bogdanm 0:9b334a45a8ff 1351 {
bogdanm 0:9b334a45a8ff 1352 UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
bogdanm 0:9b334a45a8ff 1353 huart->RxXferCount = 0;
bogdanm 0:9b334a45a8ff 1354 huart->TxXferCount = 0;
bogdanm 0:9b334a45a8ff 1355 huart->State= HAL_UART_STATE_READY;
bogdanm 0:9b334a45a8ff 1356 huart->ErrorCode |= HAL_UART_ERROR_DMA;
bogdanm 0:9b334a45a8ff 1357 HAL_UART_ErrorCallback(huart);
bogdanm 0:9b334a45a8ff 1358 }
bogdanm 0:9b334a45a8ff 1359
bogdanm 0:9b334a45a8ff 1360 /**
bogdanm 0:9b334a45a8ff 1361 * @brief Tx Transfer completed callbacks
bogdanm 0:9b334a45a8ff 1362 * @param huart: uart handle
bogdanm 0:9b334a45a8ff 1363 * @retval None
bogdanm 0:9b334a45a8ff 1364 */
bogdanm 0:9b334a45a8ff 1365 __weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1366 {
bogdanm 0:9b334a45a8ff 1367 /* NOTE : This function should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1368 the HAL_UART_TxCpltCallback can be implemented in the user file
bogdanm 0:9b334a45a8ff 1369 */
bogdanm 0:9b334a45a8ff 1370 }
bogdanm 0:9b334a45a8ff 1371
bogdanm 0:9b334a45a8ff 1372 /**
bogdanm 0:9b334a45a8ff 1373 * @brief Tx Half Transfer completed callbacks.
bogdanm 0:9b334a45a8ff 1374 * @param huart: UART handle
bogdanm 0:9b334a45a8ff 1375 * @retval None
bogdanm 0:9b334a45a8ff 1376 */
bogdanm 0:9b334a45a8ff 1377 __weak void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1378 {
bogdanm 0:9b334a45a8ff 1379 /* NOTE: This function should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1380 the HAL_UART_TxHalfCpltCallback can be implemented in the user file
bogdanm 0:9b334a45a8ff 1381 */
bogdanm 0:9b334a45a8ff 1382 }
bogdanm 0:9b334a45a8ff 1383
bogdanm 0:9b334a45a8ff 1384 /**
bogdanm 0:9b334a45a8ff 1385 * @brief Rx Transfer completed callbacks
bogdanm 0:9b334a45a8ff 1386 * @param huart: uart handle
bogdanm 0:9b334a45a8ff 1387 * @retval None
bogdanm 0:9b334a45a8ff 1388 */
bogdanm 0:9b334a45a8ff 1389 __weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1390 {
bogdanm 0:9b334a45a8ff 1391 /* NOTE : This function should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1392 the HAL_UART_RxCpltCallback can be implemented in the user file
bogdanm 0:9b334a45a8ff 1393 */
bogdanm 0:9b334a45a8ff 1394 }
bogdanm 0:9b334a45a8ff 1395
bogdanm 0:9b334a45a8ff 1396 /**
bogdanm 0:9b334a45a8ff 1397 * @brief Rx Half Transfer completed callbacks.
bogdanm 0:9b334a45a8ff 1398 * @param huart: UART handle
bogdanm 0:9b334a45a8ff 1399 * @retval None
bogdanm 0:9b334a45a8ff 1400 */
bogdanm 0:9b334a45a8ff 1401 __weak void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1402 {
bogdanm 0:9b334a45a8ff 1403 /* NOTE: This function should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1404 the HAL_UART_RxHalfCpltCallback can be implemented in the user file
bogdanm 0:9b334a45a8ff 1405 */
bogdanm 0:9b334a45a8ff 1406 }
bogdanm 0:9b334a45a8ff 1407
bogdanm 0:9b334a45a8ff 1408 /**
bogdanm 0:9b334a45a8ff 1409 * @brief UART error callbacks
bogdanm 0:9b334a45a8ff 1410 * @param huart: uart handle
bogdanm 0:9b334a45a8ff 1411 * @retval None
bogdanm 0:9b334a45a8ff 1412 */
bogdanm 0:9b334a45a8ff 1413 __weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1414 {
bogdanm 0:9b334a45a8ff 1415 /* NOTE : This function should not be modified, when the callback is needed,
bogdanm 0:9b334a45a8ff 1416 the HAL_UART_ErrorCallback can be implemented in the user file
bogdanm 0:9b334a45a8ff 1417 */
bogdanm 0:9b334a45a8ff 1418 }
bogdanm 0:9b334a45a8ff 1419
bogdanm 0:9b334a45a8ff 1420 /**
bogdanm 0:9b334a45a8ff 1421 * @brief Send an amount of data in interrupt mode
bogdanm 0:9b334a45a8ff 1422 * Function called under interruption only, once
bogdanm 0:9b334a45a8ff 1423 * interruptions have been enabled by HAL_UART_Transmit_IT()
bogdanm 0:9b334a45a8ff 1424 * @param huart: UART handle
bogdanm 0:9b334a45a8ff 1425 * @retval HAL status
bogdanm 0:9b334a45a8ff 1426 */
bogdanm 0:9b334a45a8ff 1427 static HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1428 {
bogdanm 0:9b334a45a8ff 1429 uint16_t* tmp;
bogdanm 0:9b334a45a8ff 1430
bogdanm 0:9b334a45a8ff 1431 if ((huart->State == HAL_UART_STATE_BUSY_TX) || (huart->State == HAL_UART_STATE_BUSY_TX_RX))
bogdanm 0:9b334a45a8ff 1432 {
bogdanm 0:9b334a45a8ff 1433
bogdanm 0:9b334a45a8ff 1434 if(huart->TxXferCount == 0)
bogdanm 0:9b334a45a8ff 1435 {
bogdanm 0:9b334a45a8ff 1436 /* Disable the UART Transmit Data Register Empty Interrupt */
bogdanm 0:9b334a45a8ff 1437 __HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
bogdanm 0:9b334a45a8ff 1438
bogdanm 0:9b334a45a8ff 1439 /* Check if a receive Process is ongoing or not */
bogdanm 0:9b334a45a8ff 1440 if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm 0:9b334a45a8ff 1441 {
bogdanm 0:9b334a45a8ff 1442 huart->State = HAL_UART_STATE_BUSY_RX;
bogdanm 0:9b334a45a8ff 1443 }
bogdanm 0:9b334a45a8ff 1444 else
bogdanm 0:9b334a45a8ff 1445 {
bogdanm 0:9b334a45a8ff 1446 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
bogdanm 0:9b334a45a8ff 1447 __HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
bogdanm 0:9b334a45a8ff 1448
bogdanm 0:9b334a45a8ff 1449 huart->State = HAL_UART_STATE_READY;
bogdanm 0:9b334a45a8ff 1450 }
bogdanm 0:9b334a45a8ff 1451
bogdanm 0:9b334a45a8ff 1452 /* Wait on TC flag to be able to start a second transfer */
bogdanm 0:9b334a45a8ff 1453 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
bogdanm 0:9b334a45a8ff 1454 {
bogdanm 0:9b334a45a8ff 1455 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1456 }
bogdanm 0:9b334a45a8ff 1457
bogdanm 0:9b334a45a8ff 1458 HAL_UART_TxCpltCallback(huart);
bogdanm 0:9b334a45a8ff 1459
bogdanm 0:9b334a45a8ff 1460 return HAL_OK;
bogdanm 0:9b334a45a8ff 1461 }
bogdanm 0:9b334a45a8ff 1462 else
bogdanm 0:9b334a45a8ff 1463 {
bogdanm 0:9b334a45a8ff 1464 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
bogdanm 0:9b334a45a8ff 1465 {
bogdanm 0:9b334a45a8ff 1466 tmp = (uint16_t*) huart->pTxBuffPtr;
bogdanm 0:9b334a45a8ff 1467 huart->Instance->TDR = (*tmp & (uint16_t)0x01FF);
bogdanm 0:9b334a45a8ff 1468 huart->pTxBuffPtr += 2;
bogdanm 0:9b334a45a8ff 1469 }
bogdanm 0:9b334a45a8ff 1470 else
bogdanm 0:9b334a45a8ff 1471 {
bogdanm 0:9b334a45a8ff 1472 huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0xFF);
bogdanm 0:9b334a45a8ff 1473 }
bogdanm 0:9b334a45a8ff 1474
bogdanm 0:9b334a45a8ff 1475 huart->TxXferCount--;
bogdanm 0:9b334a45a8ff 1476
bogdanm 0:9b334a45a8ff 1477 return HAL_OK;
bogdanm 0:9b334a45a8ff 1478 }
bogdanm 0:9b334a45a8ff 1479 }
bogdanm 0:9b334a45a8ff 1480 else
bogdanm 0:9b334a45a8ff 1481 {
bogdanm 0:9b334a45a8ff 1482 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1483 }
bogdanm 0:9b334a45a8ff 1484 }
bogdanm 0:9b334a45a8ff 1485
bogdanm 0:9b334a45a8ff 1486 /**
bogdanm 0:9b334a45a8ff 1487 * @brief Wrap up transmission in non-blocking mode.
bogdanm 0:9b334a45a8ff 1488 * @param huart: pointer to a UART_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1489 * the configuration information for the specified UART module.
bogdanm 0:9b334a45a8ff 1490 * @retval HAL status
bogdanm 0:9b334a45a8ff 1491 */
bogdanm 0:9b334a45a8ff 1492 static HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1493 {
bogdanm 0:9b334a45a8ff 1494 /* Disable the UART Transmit Complete Interrupt */
bogdanm 0:9b334a45a8ff 1495 __HAL_UART_DISABLE_IT(huart, UART_IT_TC);
bogdanm 0:9b334a45a8ff 1496
bogdanm 0:9b334a45a8ff 1497 /* Check if a receive process is ongoing or not */
bogdanm 0:9b334a45a8ff 1498 if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm 0:9b334a45a8ff 1499 {
bogdanm 0:9b334a45a8ff 1500 huart->State = HAL_UART_STATE_BUSY_RX;
bogdanm 0:9b334a45a8ff 1501 }
bogdanm 0:9b334a45a8ff 1502 else
bogdanm 0:9b334a45a8ff 1503 {
bogdanm 0:9b334a45a8ff 1504 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
bogdanm 0:9b334a45a8ff 1505 __HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
bogdanm 0:9b334a45a8ff 1506
bogdanm 0:9b334a45a8ff 1507 huart->State = HAL_UART_STATE_READY;
bogdanm 0:9b334a45a8ff 1508 }
bogdanm 0:9b334a45a8ff 1509
bogdanm 0:9b334a45a8ff 1510 HAL_UART_TxCpltCallback(huart);
bogdanm 0:9b334a45a8ff 1511
bogdanm 0:9b334a45a8ff 1512 return HAL_OK;
bogdanm 0:9b334a45a8ff 1513 }
bogdanm 0:9b334a45a8ff 1514
bogdanm 0:9b334a45a8ff 1515 /**
bogdanm 0:9b334a45a8ff 1516 * @brief Receive an amount of data in interrupt mode
bogdanm 0:9b334a45a8ff 1517 * Function called under interruption only, once
bogdanm 0:9b334a45a8ff 1518 * interruptions have been enabled by HAL_UART_Receive_IT()
bogdanm 0:9b334a45a8ff 1519 * @param huart: UART handle
bogdanm 0:9b334a45a8ff 1520 * @retval HAL status
bogdanm 0:9b334a45a8ff 1521 */
bogdanm 0:9b334a45a8ff 1522 static HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1523 {
bogdanm 0:9b334a45a8ff 1524 uint16_t* tmp;
bogdanm 0:9b334a45a8ff 1525 uint16_t uhMask = huart->Mask;
bogdanm 0:9b334a45a8ff 1526
bogdanm 0:9b334a45a8ff 1527 if((huart->State == HAL_UART_STATE_BUSY_RX) || (huart->State == HAL_UART_STATE_BUSY_TX_RX))
bogdanm 0:9b334a45a8ff 1528 {
bogdanm 0:9b334a45a8ff 1529
bogdanm 0:9b334a45a8ff 1530 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
bogdanm 0:9b334a45a8ff 1531 {
bogdanm 0:9b334a45a8ff 1532 tmp = (uint16_t*) huart->pRxBuffPtr ;
bogdanm 0:9b334a45a8ff 1533 *tmp = (uint16_t)(huart->Instance->RDR & uhMask);
bogdanm 0:9b334a45a8ff 1534 huart->pRxBuffPtr +=2;
bogdanm 0:9b334a45a8ff 1535 }
bogdanm 0:9b334a45a8ff 1536 else
bogdanm 0:9b334a45a8ff 1537 {
bogdanm 0:9b334a45a8ff 1538 *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->RDR & (uint8_t)uhMask);
bogdanm 0:9b334a45a8ff 1539 }
bogdanm 0:9b334a45a8ff 1540
bogdanm 0:9b334a45a8ff 1541 if(--huart->RxXferCount == 0)
bogdanm 0:9b334a45a8ff 1542 {
bogdanm 0:9b334a45a8ff 1543 __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
bogdanm 0:9b334a45a8ff 1544
bogdanm 0:9b334a45a8ff 1545 /* Check if a transmit Process is ongoing or not */
bogdanm 0:9b334a45a8ff 1546 if(huart->State == HAL_UART_STATE_BUSY_TX_RX)
bogdanm 0:9b334a45a8ff 1547 {
bogdanm 0:9b334a45a8ff 1548 huart->State = HAL_UART_STATE_BUSY_TX;
bogdanm 0:9b334a45a8ff 1549 }
bogdanm 0:9b334a45a8ff 1550 else
bogdanm 0:9b334a45a8ff 1551 {
bogdanm 0:9b334a45a8ff 1552 /* Disable the UART Parity Error Interrupt */
bogdanm 0:9b334a45a8ff 1553 __HAL_UART_DISABLE_IT(huart, UART_IT_PE);
bogdanm 0:9b334a45a8ff 1554
bogdanm 0:9b334a45a8ff 1555 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
bogdanm 0:9b334a45a8ff 1556 __HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
bogdanm 0:9b334a45a8ff 1557
bogdanm 0:9b334a45a8ff 1558 huart->State = HAL_UART_STATE_READY;
bogdanm 0:9b334a45a8ff 1559 }
bogdanm 0:9b334a45a8ff 1560
bogdanm 0:9b334a45a8ff 1561 HAL_UART_RxCpltCallback(huart);
bogdanm 0:9b334a45a8ff 1562
bogdanm 0:9b334a45a8ff 1563 return HAL_OK;
bogdanm 0:9b334a45a8ff 1564 }
bogdanm 0:9b334a45a8ff 1565
bogdanm 0:9b334a45a8ff 1566 return HAL_OK;
bogdanm 0:9b334a45a8ff 1567 }
bogdanm 0:9b334a45a8ff 1568 else
bogdanm 0:9b334a45a8ff 1569 {
bogdanm 0:9b334a45a8ff 1570 return HAL_BUSY;
bogdanm 0:9b334a45a8ff 1571 }
bogdanm 0:9b334a45a8ff 1572 }
bogdanm 0:9b334a45a8ff 1573
bogdanm 0:9b334a45a8ff 1574 /**
bogdanm 0:9b334a45a8ff 1575 * @}
bogdanm 0:9b334a45a8ff 1576 */
bogdanm 0:9b334a45a8ff 1577
bogdanm 0:9b334a45a8ff 1578 /** @defgroup UART_Exported_Functions_Group3 Peripheral Control functions
bogdanm 0:9b334a45a8ff 1579 * @brief UART control functions
bogdanm 0:9b334a45a8ff 1580 *
bogdanm 0:9b334a45a8ff 1581 @verbatim
bogdanm 0:9b334a45a8ff 1582 ===============================================================================
bogdanm 0:9b334a45a8ff 1583 ##### Peripheral Control functions #####
bogdanm 0:9b334a45a8ff 1584 ===============================================================================
bogdanm 0:9b334a45a8ff 1585 [..]
bogdanm 0:9b334a45a8ff 1586 This subsection provides a set of functions allowing to control the UART.
bogdanm 0:9b334a45a8ff 1587 (+) HAL_UART_GetState() API is helpful to check in run-time the state of the UART peripheral.
bogdanm 0:9b334a45a8ff 1588 (+) HAL_MultiProcessor_EnableMuteMode() API enables mute mode
bogdanm 0:9b334a45a8ff 1589 (+) HAL_MultiProcessor_DisableMuteMode() API disables mute mode
bogdanm 0:9b334a45a8ff 1590 (+) HAL_MultiProcessor_EnterMuteMode() API enters mute mode
bogdanm 0:9b334a45a8ff 1591 (+) HAL_MultiProcessor_EnableMuteMode() API enables mute mode
bogdanm 0:9b334a45a8ff 1592 (+) UART_SetConfig() API configures the UART peripheral
bogdanm 0:9b334a45a8ff 1593 (+) UART_AdvFeatureConfig() API optionally configures the UART advanced features
bogdanm 0:9b334a45a8ff 1594 (+) UART_CheckIdleState() API ensures that TEACK and/or REACK are set after initialization
bogdanm 0:9b334a45a8ff 1595 (+) HAL_HalfDuplex_EnableTransmitter() API disables receiver and enables transmitter
bogdanm 0:9b334a45a8ff 1596 (+) HAL_HalfDuplex_EnableReceiver() API disables transmitter and enables receiver
bogdanm 0:9b334a45a8ff 1597 (+) HAL_LIN_SendBreak() API transmits the break characters
bogdanm 0:9b334a45a8ff 1598 @endverbatim
bogdanm 0:9b334a45a8ff 1599 * @{
bogdanm 0:9b334a45a8ff 1600 */
bogdanm 0:9b334a45a8ff 1601
bogdanm 0:9b334a45a8ff 1602 /**
bogdanm 0:9b334a45a8ff 1603 * @brief Enable UART in mute mode (doesn't mean UART enters mute mode;
bogdanm 0:9b334a45a8ff 1604 * to enter mute mode, HAL_MultiProcessor_EnterMuteMode() API must be called)
bogdanm 0:9b334a45a8ff 1605 * @param huart: UART handle
bogdanm 0:9b334a45a8ff 1606 * @retval HAL status
bogdanm 0:9b334a45a8ff 1607 */
bogdanm 0:9b334a45a8ff 1608 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1609 {
bogdanm 0:9b334a45a8ff 1610 /* Process Locked */
bogdanm 0:9b334a45a8ff 1611 __HAL_LOCK(huart);
bogdanm 0:9b334a45a8ff 1612
bogdanm 0:9b334a45a8ff 1613 huart->State = HAL_UART_STATE_BUSY;
bogdanm 0:9b334a45a8ff 1614
bogdanm 0:9b334a45a8ff 1615 /* Enable USART mute mode by setting the MME bit in the CR1 register */
bogdanm 0:9b334a45a8ff 1616 huart->Instance->CR1 |= USART_CR1_MME;
bogdanm 0:9b334a45a8ff 1617
bogdanm 0:9b334a45a8ff 1618 huart->State = HAL_UART_STATE_READY;
bogdanm 0:9b334a45a8ff 1619
bogdanm 0:9b334a45a8ff 1620 return (UART_CheckIdleState(huart));
bogdanm 0:9b334a45a8ff 1621 }
bogdanm 0:9b334a45a8ff 1622
bogdanm 0:9b334a45a8ff 1623 /**
bogdanm 0:9b334a45a8ff 1624 * @brief Disable UART mute mode (doesn't mean it actually wakes up the software,
bogdanm 0:9b334a45a8ff 1625 * as it may not have been in mute mode at this very moment).
bogdanm 0:9b334a45a8ff 1626 * @param huart: uart handle
bogdanm 0:9b334a45a8ff 1627 * @retval HAL status
bogdanm 0:9b334a45a8ff 1628 */
bogdanm 0:9b334a45a8ff 1629 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1630 {
bogdanm 0:9b334a45a8ff 1631 /* Process Locked */
bogdanm 0:9b334a45a8ff 1632 __HAL_LOCK(huart);
bogdanm 0:9b334a45a8ff 1633
bogdanm 0:9b334a45a8ff 1634 huart->State = HAL_UART_STATE_BUSY;
bogdanm 0:9b334a45a8ff 1635
bogdanm 0:9b334a45a8ff 1636 /* Disable USART mute mode by clearing the MME bit in the CR1 register */
bogdanm 0:9b334a45a8ff 1637 huart->Instance->CR1 &= ~(USART_CR1_MME);
bogdanm 0:9b334a45a8ff 1638
bogdanm 0:9b334a45a8ff 1639 huart->State = HAL_UART_STATE_READY;
bogdanm 0:9b334a45a8ff 1640
bogdanm 0:9b334a45a8ff 1641 return (UART_CheckIdleState(huart));
bogdanm 0:9b334a45a8ff 1642 }
bogdanm 0:9b334a45a8ff 1643
bogdanm 0:9b334a45a8ff 1644 /**
bogdanm 0:9b334a45a8ff 1645 * @brief Enter UART mute mode (means UART actually enters mute mode).
bogdanm 0:9b334a45a8ff 1646 * To exit from mute mode, HAL_MultiProcessor_DisableMuteMode() API must be called.
bogdanm 0:9b334a45a8ff 1647 * @param huart: uart handle
bogdanm 0:9b334a45a8ff 1648 * @retval HAL status
bogdanm 0:9b334a45a8ff 1649 */
bogdanm 0:9b334a45a8ff 1650 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1651 {
bogdanm 0:9b334a45a8ff 1652 __HAL_UART_SEND_REQ(huart, UART_MUTE_MODE_REQUEST);
bogdanm 0:9b334a45a8ff 1653 }
bogdanm 0:9b334a45a8ff 1654
bogdanm 0:9b334a45a8ff 1655
bogdanm 0:9b334a45a8ff 1656
bogdanm 0:9b334a45a8ff 1657 /**
bogdanm 0:9b334a45a8ff 1658 * @brief return the UART state
bogdanm 0:9b334a45a8ff 1659 * @param huart: uart handle
bogdanm 0:9b334a45a8ff 1660 * @retval HAL state
bogdanm 0:9b334a45a8ff 1661 */
bogdanm 0:9b334a45a8ff 1662 HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1663 {
bogdanm 0:9b334a45a8ff 1664 return huart->State;
bogdanm 0:9b334a45a8ff 1665 }
bogdanm 0:9b334a45a8ff 1666
bogdanm 0:9b334a45a8ff 1667 /**
bogdanm 0:9b334a45a8ff 1668 * @brief Return the UART error code
bogdanm 0:9b334a45a8ff 1669 * @param huart : pointer to a UART_HandleTypeDef structure that contains
bogdanm 0:9b334a45a8ff 1670 * the configuration information for the specified UART.
bogdanm 0:9b334a45a8ff 1671 * @retval UART Error Code
bogdanm 0:9b334a45a8ff 1672 */
bogdanm 0:9b334a45a8ff 1673 uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1674 {
bogdanm 0:9b334a45a8ff 1675 return huart->ErrorCode;
bogdanm 0:9b334a45a8ff 1676 }
bogdanm 0:9b334a45a8ff 1677
bogdanm 0:9b334a45a8ff 1678 /**
bogdanm 0:9b334a45a8ff 1679 * @brief Configure the UART peripheral
bogdanm 0:9b334a45a8ff 1680 * @param huart: uart handle
bogdanm 0:9b334a45a8ff 1681 * @retval None
bogdanm 0:9b334a45a8ff 1682 */
bogdanm 0:9b334a45a8ff 1683 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1684 {
bogdanm 0:9b334a45a8ff 1685 uint32_t tmpreg = 0x00000000;
bogdanm 0:9b334a45a8ff 1686 UART_ClockSourceTypeDef clocksource = UART_CLOCKSOURCE_UNDEFINED;
bogdanm 0:9b334a45a8ff 1687 uint16_t brrtemp = 0x0000;
bogdanm 0:9b334a45a8ff 1688 uint16_t usartdiv = 0x0000;
bogdanm 0:9b334a45a8ff 1689 HAL_StatusTypeDef ret = HAL_OK;
bogdanm 0:9b334a45a8ff 1690
bogdanm 0:9b334a45a8ff 1691 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1692 assert_param(IS_UART_BAUDRATE(huart->Init.BaudRate));
bogdanm 0:9b334a45a8ff 1693 assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
bogdanm 0:9b334a45a8ff 1694 assert_param(IS_UART_STOPBITS(huart->Init.StopBits));
bogdanm 0:9b334a45a8ff 1695 assert_param(IS_UART_PARITY(huart->Init.Parity));
bogdanm 0:9b334a45a8ff 1696 assert_param(IS_UART_MODE(huart->Init.Mode));
bogdanm 0:9b334a45a8ff 1697 assert_param(IS_UART_HARDWARE_FLOW_CONTROL(huart->Init.HwFlowCtl));
bogdanm 0:9b334a45a8ff 1698 assert_param(IS_UART_ONE_BIT_SAMPLE(huart->Init.OneBitSampling));
bogdanm 0:9b334a45a8ff 1699
bogdanm 0:9b334a45a8ff 1700
bogdanm 0:9b334a45a8ff 1701 /*-------------------------- USART CR1 Configuration -----------------------*/
bogdanm 0:9b334a45a8ff 1702 /* Clear M, PCE, PS, TE, RE and OVER8 bits and configure
bogdanm 0:9b334a45a8ff 1703 * the UART Word Length, Parity, Mode and oversampling:
bogdanm 0:9b334a45a8ff 1704 * set the M bits according to huart->Init.WordLength value
bogdanm 0:9b334a45a8ff 1705 * set PCE and PS bits according to huart->Init.Parity value
bogdanm 0:9b334a45a8ff 1706 * set TE and RE bits according to huart->Init.Mode value
bogdanm 0:9b334a45a8ff 1707 * set OVER8 bit according to huart->Init.OverSampling value */
bogdanm 0:9b334a45a8ff 1708 tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ;
bogdanm 0:9b334a45a8ff 1709 MODIFY_REG(huart->Instance->CR1, UART_CR1_FIELDS, tmpreg);
bogdanm 0:9b334a45a8ff 1710
bogdanm 0:9b334a45a8ff 1711 /*-------------------------- USART CR2 Configuration -----------------------*/
bogdanm 0:9b334a45a8ff 1712 /* Configure the UART Stop Bits: Set STOP[13:12] bits according
bogdanm 0:9b334a45a8ff 1713 * to huart->Init.StopBits value */
bogdanm 0:9b334a45a8ff 1714 MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
bogdanm 0:9b334a45a8ff 1715
bogdanm 0:9b334a45a8ff 1716 /*-------------------------- USART CR3 Configuration -----------------------*/
bogdanm 0:9b334a45a8ff 1717 /* Configure
bogdanm 0:9b334a45a8ff 1718 * - UART HardWare Flow Control: set CTSE and RTSE bits according
bogdanm 0:9b334a45a8ff 1719 * to huart->Init.HwFlowCtl value
bogdanm 0:9b334a45a8ff 1720 * - one-bit sampling method versus three samples' majority rule according
bogdanm 0:9b334a45a8ff 1721 * to huart->Init.OneBitSampling */
bogdanm 0:9b334a45a8ff 1722 tmpreg = (uint32_t)huart->Init.HwFlowCtl | huart->Init.OneBitSampling ;
bogdanm 0:9b334a45a8ff 1723 MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE | USART_CR3_ONEBIT), tmpreg);
bogdanm 0:9b334a45a8ff 1724
bogdanm 0:9b334a45a8ff 1725 /*-------------------------- USART BRR Configuration -----------------------*/
bogdanm 0:9b334a45a8ff 1726 UART_GETCLOCKSOURCE(huart, clocksource);
bogdanm 0:9b334a45a8ff 1727
bogdanm 0:9b334a45a8ff 1728 /* Check UART Over Sampling to set Baud Rate Register */
bogdanm 0:9b334a45a8ff 1729 if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
bogdanm 0:9b334a45a8ff 1730 {
bogdanm 0:9b334a45a8ff 1731 switch (clocksource)
bogdanm 0:9b334a45a8ff 1732 {
bogdanm 0:9b334a45a8ff 1733 case UART_CLOCKSOURCE_PCLK1:
bogdanm 0:9b334a45a8ff 1734 usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate));
bogdanm 0:9b334a45a8ff 1735 break;
bogdanm 0:9b334a45a8ff 1736 case UART_CLOCKSOURCE_PCLK2:
bogdanm 0:9b334a45a8ff 1737 usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate));
bogdanm 0:9b334a45a8ff 1738 break;
bogdanm 0:9b334a45a8ff 1739 case UART_CLOCKSOURCE_HSI:
bogdanm 0:9b334a45a8ff 1740 usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HSI_VALUE, huart->Init.BaudRate));
bogdanm 0:9b334a45a8ff 1741 break;
bogdanm 0:9b334a45a8ff 1742 case UART_CLOCKSOURCE_SYSCLK:
bogdanm 0:9b334a45a8ff 1743 usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate));
bogdanm 0:9b334a45a8ff 1744 break;
bogdanm 0:9b334a45a8ff 1745 case UART_CLOCKSOURCE_LSE:
bogdanm 0:9b334a45a8ff 1746 usartdiv = (uint16_t)(UART_DIV_SAMPLING8(LSE_VALUE, huart->Init.BaudRate));
bogdanm 0:9b334a45a8ff 1747 break;
bogdanm 0:9b334a45a8ff 1748 case UART_CLOCKSOURCE_UNDEFINED:
bogdanm 0:9b334a45a8ff 1749 default:
bogdanm 0:9b334a45a8ff 1750 ret = HAL_ERROR;
bogdanm 0:9b334a45a8ff 1751 break;
bogdanm 0:9b334a45a8ff 1752 }
bogdanm 0:9b334a45a8ff 1753
bogdanm 0:9b334a45a8ff 1754 brrtemp = usartdiv & 0xFFF0;
bogdanm 0:9b334a45a8ff 1755 brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000F) >> 1U);
bogdanm 0:9b334a45a8ff 1756 huart->Instance->BRR = brrtemp;
bogdanm 0:9b334a45a8ff 1757 }
bogdanm 0:9b334a45a8ff 1758 else
bogdanm 0:9b334a45a8ff 1759 {
bogdanm 0:9b334a45a8ff 1760 switch (clocksource)
bogdanm 0:9b334a45a8ff 1761 {
bogdanm 0:9b334a45a8ff 1762 case UART_CLOCKSOURCE_PCLK1:
bogdanm 0:9b334a45a8ff 1763 huart->Instance->BRR = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate));
bogdanm 0:9b334a45a8ff 1764 break;
bogdanm 0:9b334a45a8ff 1765 case UART_CLOCKSOURCE_PCLK2:
bogdanm 0:9b334a45a8ff 1766 huart->Instance->BRR = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetPCLK2Freq(), huart->Init.BaudRate));
bogdanm 0:9b334a45a8ff 1767 break;
bogdanm 0:9b334a45a8ff 1768 case UART_CLOCKSOURCE_HSI:
bogdanm 0:9b334a45a8ff 1769 huart->Instance->BRR = (uint16_t)(UART_DIV_SAMPLING16(HSI_VALUE, huart->Init.BaudRate));
bogdanm 0:9b334a45a8ff 1770 break;
bogdanm 0:9b334a45a8ff 1771 case UART_CLOCKSOURCE_SYSCLK:
bogdanm 0:9b334a45a8ff 1772 huart->Instance->BRR = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate));
bogdanm 0:9b334a45a8ff 1773 break;
bogdanm 0:9b334a45a8ff 1774 case UART_CLOCKSOURCE_LSE:
bogdanm 0:9b334a45a8ff 1775 huart->Instance->BRR = (uint16_t)(UART_DIV_SAMPLING16(LSE_VALUE, huart->Init.BaudRate));
bogdanm 0:9b334a45a8ff 1776 break;
bogdanm 0:9b334a45a8ff 1777 case UART_CLOCKSOURCE_UNDEFINED:
bogdanm 0:9b334a45a8ff 1778 default:
bogdanm 0:9b334a45a8ff 1779 ret = HAL_ERROR;
bogdanm 0:9b334a45a8ff 1780 break;
bogdanm 0:9b334a45a8ff 1781 }
bogdanm 0:9b334a45a8ff 1782 }
bogdanm 0:9b334a45a8ff 1783
bogdanm 0:9b334a45a8ff 1784 return ret;
bogdanm 0:9b334a45a8ff 1785
bogdanm 0:9b334a45a8ff 1786 }
bogdanm 0:9b334a45a8ff 1787
bogdanm 0:9b334a45a8ff 1788
bogdanm 0:9b334a45a8ff 1789 /**
bogdanm 0:9b334a45a8ff 1790 * @brief Configure the UART peripheral advanced features
bogdanm 0:9b334a45a8ff 1791 * @param huart: uart handle
bogdanm 0:9b334a45a8ff 1792 * @retval None
bogdanm 0:9b334a45a8ff 1793 */
bogdanm 0:9b334a45a8ff 1794 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1795 {
bogdanm 0:9b334a45a8ff 1796 /* Check whether the set of advanced features to configure is properly set */
bogdanm 0:9b334a45a8ff 1797 assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit));
bogdanm 0:9b334a45a8ff 1798
bogdanm 0:9b334a45a8ff 1799 /* if required, configure TX pin active level inversion */
bogdanm 0:9b334a45a8ff 1800 if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT))
bogdanm 0:9b334a45a8ff 1801 {
bogdanm 0:9b334a45a8ff 1802 assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert));
bogdanm 0:9b334a45a8ff 1803 MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert);
bogdanm 0:9b334a45a8ff 1804 }
bogdanm 0:9b334a45a8ff 1805
bogdanm 0:9b334a45a8ff 1806 /* if required, configure RX pin active level inversion */
bogdanm 0:9b334a45a8ff 1807 if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT))
bogdanm 0:9b334a45a8ff 1808 {
bogdanm 0:9b334a45a8ff 1809 assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert));
bogdanm 0:9b334a45a8ff 1810 MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert);
bogdanm 0:9b334a45a8ff 1811 }
bogdanm 0:9b334a45a8ff 1812
bogdanm 0:9b334a45a8ff 1813 /* if required, configure data inversion */
bogdanm 0:9b334a45a8ff 1814 if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT))
bogdanm 0:9b334a45a8ff 1815 {
bogdanm 0:9b334a45a8ff 1816 assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert));
bogdanm 0:9b334a45a8ff 1817 MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert);
bogdanm 0:9b334a45a8ff 1818 }
bogdanm 0:9b334a45a8ff 1819
bogdanm 0:9b334a45a8ff 1820 /* if required, configure RX/TX pins swap */
bogdanm 0:9b334a45a8ff 1821 if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT))
bogdanm 0:9b334a45a8ff 1822 {
bogdanm 0:9b334a45a8ff 1823 assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap));
bogdanm 0:9b334a45a8ff 1824 MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap);
bogdanm 0:9b334a45a8ff 1825 }
bogdanm 0:9b334a45a8ff 1826
bogdanm 0:9b334a45a8ff 1827 /* if required, configure RX overrun detection disabling */
bogdanm 0:9b334a45a8ff 1828 if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT))
bogdanm 0:9b334a45a8ff 1829 {
bogdanm 0:9b334a45a8ff 1830 assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable));
bogdanm 0:9b334a45a8ff 1831 MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable);
bogdanm 0:9b334a45a8ff 1832 }
bogdanm 0:9b334a45a8ff 1833
bogdanm 0:9b334a45a8ff 1834 /* if required, configure DMA disabling on reception error */
bogdanm 0:9b334a45a8ff 1835 if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT))
bogdanm 0:9b334a45a8ff 1836 {
bogdanm 0:9b334a45a8ff 1837 assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError));
bogdanm 0:9b334a45a8ff 1838 MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError);
bogdanm 0:9b334a45a8ff 1839 }
bogdanm 0:9b334a45a8ff 1840
bogdanm 0:9b334a45a8ff 1841 /* if required, configure auto Baud rate detection scheme */
bogdanm 0:9b334a45a8ff 1842 if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT))
bogdanm 0:9b334a45a8ff 1843 {
bogdanm 0:9b334a45a8ff 1844 assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable));
bogdanm 0:9b334a45a8ff 1845 MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable);
bogdanm 0:9b334a45a8ff 1846 /* set auto Baudrate detection parameters if detection is enabled */
bogdanm 0:9b334a45a8ff 1847 if(huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)
bogdanm 0:9b334a45a8ff 1848 {
bogdanm 0:9b334a45a8ff 1849 assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode));
bogdanm 0:9b334a45a8ff 1850 MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode);
bogdanm 0:9b334a45a8ff 1851 }
bogdanm 0:9b334a45a8ff 1852 }
bogdanm 0:9b334a45a8ff 1853
bogdanm 0:9b334a45a8ff 1854 /* if required, configure MSB first on communication line */
bogdanm 0:9b334a45a8ff 1855 if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT))
bogdanm 0:9b334a45a8ff 1856 {
bogdanm 0:9b334a45a8ff 1857 assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst));
bogdanm 0:9b334a45a8ff 1858 MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst);
bogdanm 0:9b334a45a8ff 1859 }
bogdanm 0:9b334a45a8ff 1860 }
bogdanm 0:9b334a45a8ff 1861
bogdanm 0:9b334a45a8ff 1862
bogdanm 0:9b334a45a8ff 1863
bogdanm 0:9b334a45a8ff 1864 /**
bogdanm 0:9b334a45a8ff 1865 * @brief Check the UART Idle State
bogdanm 0:9b334a45a8ff 1866 * @param huart: uart handle
bogdanm 0:9b334a45a8ff 1867 * @retval HAL status
bogdanm 0:9b334a45a8ff 1868 */
bogdanm 0:9b334a45a8ff 1869 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1870 {
bogdanm 0:9b334a45a8ff 1871 /* Initialize the UART ErrorCode */
bogdanm 0:9b334a45a8ff 1872 huart->ErrorCode = HAL_UART_ERROR_NONE;
bogdanm 0:9b334a45a8ff 1873
bogdanm 0:9b334a45a8ff 1874 /* Check if the Transmitter is enabled */
bogdanm 0:9b334a45a8ff 1875 if((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
bogdanm 0:9b334a45a8ff 1876 {
bogdanm 0:9b334a45a8ff 1877 /* Wait until TEACK flag is set */
bogdanm 0:9b334a45a8ff 1878 if(UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
bogdanm 0:9b334a45a8ff 1879 {
bogdanm 0:9b334a45a8ff 1880 /* Timeout Occurred */
bogdanm 0:9b334a45a8ff 1881 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1882 }
bogdanm 0:9b334a45a8ff 1883 }
bogdanm 0:9b334a45a8ff 1884 /* Check if the Receiver is enabled */
bogdanm 0:9b334a45a8ff 1885 if((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
bogdanm 0:9b334a45a8ff 1886 {
bogdanm 0:9b334a45a8ff 1887 /* Wait until REACK flag is set */
bogdanm 0:9b334a45a8ff 1888 if(UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, HAL_UART_TIMEOUT_VALUE) != HAL_OK)
bogdanm 0:9b334a45a8ff 1889 {
bogdanm 0:9b334a45a8ff 1890 /* Timeout Occurred */
bogdanm 0:9b334a45a8ff 1891 return HAL_TIMEOUT;
bogdanm 0:9b334a45a8ff 1892 }
bogdanm 0:9b334a45a8ff 1893 }
bogdanm 0:9b334a45a8ff 1894
bogdanm 0:9b334a45a8ff 1895 /* Initialize the UART State */
bogdanm 0:9b334a45a8ff 1896 huart->State= HAL_UART_STATE_READY;
bogdanm 0:9b334a45a8ff 1897
bogdanm 0:9b334a45a8ff 1898 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1899 __HAL_UNLOCK(huart);
bogdanm 0:9b334a45a8ff 1900
bogdanm 0:9b334a45a8ff 1901 return HAL_OK;
bogdanm 0:9b334a45a8ff 1902 }
bogdanm 0:9b334a45a8ff 1903
bogdanm 0:9b334a45a8ff 1904 /**
bogdanm 0:9b334a45a8ff 1905 * @brief Enables the UART transmitter and disables the UART receiver.
bogdanm 0:9b334a45a8ff 1906 * @param huart: UART handle
bogdanm 0:9b334a45a8ff 1907 * @retval HAL status
bogdanm 0:9b334a45a8ff 1908 * @retval None
bogdanm 0:9b334a45a8ff 1909 */
bogdanm 0:9b334a45a8ff 1910 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1911 {
bogdanm 0:9b334a45a8ff 1912 /* Process Locked */
bogdanm 0:9b334a45a8ff 1913 __HAL_LOCK(huart);
bogdanm 0:9b334a45a8ff 1914 huart->State = HAL_UART_STATE_BUSY;
bogdanm 0:9b334a45a8ff 1915
bogdanm 0:9b334a45a8ff 1916 /* Clear TE and RE bits */
bogdanm 0:9b334a45a8ff 1917 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE));
bogdanm 0:9b334a45a8ff 1918 /* Enable the USART's transmit interface by setting the TE bit in the USART CR1 register */
bogdanm 0:9b334a45a8ff 1919 SET_BIT(huart->Instance->CR1, USART_CR1_TE);
bogdanm 0:9b334a45a8ff 1920
bogdanm 0:9b334a45a8ff 1921 huart->State= HAL_UART_STATE_READY;
bogdanm 0:9b334a45a8ff 1922 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1923 __HAL_UNLOCK(huart);
bogdanm 0:9b334a45a8ff 1924
bogdanm 0:9b334a45a8ff 1925 return HAL_OK;
bogdanm 0:9b334a45a8ff 1926 }
bogdanm 0:9b334a45a8ff 1927
bogdanm 0:9b334a45a8ff 1928 /**
bogdanm 0:9b334a45a8ff 1929 * @brief Enables the UART receiver and disables the UART transmitter.
bogdanm 0:9b334a45a8ff 1930 * @param huart: UART handle
bogdanm 0:9b334a45a8ff 1931 * @retval HAL status
bogdanm 0:9b334a45a8ff 1932 */
bogdanm 0:9b334a45a8ff 1933 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1934 {
bogdanm 0:9b334a45a8ff 1935 /* Process Locked */
bogdanm 0:9b334a45a8ff 1936 __HAL_LOCK(huart);
bogdanm 0:9b334a45a8ff 1937 huart->State = HAL_UART_STATE_BUSY;
bogdanm 0:9b334a45a8ff 1938
bogdanm 0:9b334a45a8ff 1939 /* Clear TE and RE bits */
bogdanm 0:9b334a45a8ff 1940 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE));
bogdanm 0:9b334a45a8ff 1941 /* Enable the USART's receive interface by setting the RE bit in the USART CR1 register */
bogdanm 0:9b334a45a8ff 1942 SET_BIT(huart->Instance->CR1, USART_CR1_RE);
bogdanm 0:9b334a45a8ff 1943
bogdanm 0:9b334a45a8ff 1944 huart->State = HAL_UART_STATE_READY;
bogdanm 0:9b334a45a8ff 1945 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1946 __HAL_UNLOCK(huart);
bogdanm 0:9b334a45a8ff 1947
bogdanm 0:9b334a45a8ff 1948 return HAL_OK;
bogdanm 0:9b334a45a8ff 1949 }
bogdanm 0:9b334a45a8ff 1950
bogdanm 0:9b334a45a8ff 1951
bogdanm 0:9b334a45a8ff 1952 /**
bogdanm 0:9b334a45a8ff 1953 * @brief Transmits break characters.
bogdanm 0:9b334a45a8ff 1954 * @param huart: UART handle
bogdanm 0:9b334a45a8ff 1955 * @retval HAL status
bogdanm 0:9b334a45a8ff 1956 */
bogdanm 0:9b334a45a8ff 1957 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart)
bogdanm 0:9b334a45a8ff 1958 {
bogdanm 0:9b334a45a8ff 1959 /* Check the parameters */
bogdanm 0:9b334a45a8ff 1960 assert_param(IS_UART_INSTANCE(huart->Instance));
bogdanm 0:9b334a45a8ff 1961
bogdanm 0:9b334a45a8ff 1962 /* Process Locked */
bogdanm 0:9b334a45a8ff 1963 __HAL_LOCK(huart);
bogdanm 0:9b334a45a8ff 1964
bogdanm 0:9b334a45a8ff 1965 huart->State = HAL_UART_STATE_BUSY;
bogdanm 0:9b334a45a8ff 1966
bogdanm 0:9b334a45a8ff 1967 /* Send break characters */
bogdanm 0:9b334a45a8ff 1968 huart->Instance->RQR |= UART_SENDBREAK_REQUEST;
bogdanm 0:9b334a45a8ff 1969
bogdanm 0:9b334a45a8ff 1970 huart->State = HAL_UART_STATE_READY;
bogdanm 0:9b334a45a8ff 1971
bogdanm 0:9b334a45a8ff 1972 /* Process Unlocked */
bogdanm 0:9b334a45a8ff 1973 __HAL_UNLOCK(huart);
bogdanm 0:9b334a45a8ff 1974
bogdanm 0:9b334a45a8ff 1975 return HAL_OK;
bogdanm 0:9b334a45a8ff 1976 }
bogdanm 0:9b334a45a8ff 1977
bogdanm 0:9b334a45a8ff 1978
bogdanm 0:9b334a45a8ff 1979 /**
bogdanm 0:9b334a45a8ff 1980 * @}
bogdanm 0:9b334a45a8ff 1981 */
bogdanm 0:9b334a45a8ff 1982
bogdanm 0:9b334a45a8ff 1983 /**
bogdanm 0:9b334a45a8ff 1984 * @}
bogdanm 0:9b334a45a8ff 1985 */
bogdanm 0:9b334a45a8ff 1986
bogdanm 0:9b334a45a8ff 1987 #endif /* HAL_UART_MODULE_ENABLED */
bogdanm 0:9b334a45a8ff 1988 /**
bogdanm 0:9b334a45a8ff 1989 * @}
bogdanm 0:9b334a45a8ff 1990 */
bogdanm 0:9b334a45a8ff 1991
bogdanm 0:9b334a45a8ff 1992 /**
bogdanm 0:9b334a45a8ff 1993 * @}
bogdanm 0:9b334a45a8ff 1994 */
bogdanm 0:9b334a45a8ff 1995
bogdanm 0:9b334a45a8ff 1996 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/