Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_Maxim/TARGET_MAX32600/afe_regs.h@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /*******************************************************************************
bogdanm 0:9b334a45a8ff 2 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Permission is hereby granted, free of charge, to any person obtaining a
bogdanm 0:9b334a45a8ff 5 * copy of this software and associated documentation files (the "Software"),
bogdanm 0:9b334a45a8ff 6 * to deal in the Software without restriction, including without limitation
bogdanm 0:9b334a45a8ff 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
bogdanm 0:9b334a45a8ff 8 * and/or sell copies of the Software, and to permit persons to whom the
bogdanm 0:9b334a45a8ff 9 * Software is furnished to do so, subject to the following conditions:
bogdanm 0:9b334a45a8ff 10 *
bogdanm 0:9b334a45a8ff 11 * The above copyright notice and this permission notice shall be included
bogdanm 0:9b334a45a8ff 12 * in all copies or substantial portions of the Software.
bogdanm 0:9b334a45a8ff 13 *
bogdanm 0:9b334a45a8ff 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
bogdanm 0:9b334a45a8ff 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
bogdanm 0:9b334a45a8ff 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
bogdanm 0:9b334a45a8ff 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
bogdanm 0:9b334a45a8ff 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
bogdanm 0:9b334a45a8ff 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
bogdanm 0:9b334a45a8ff 20 * OTHER DEALINGS IN THE SOFTWARE.
bogdanm 0:9b334a45a8ff 21 *
bogdanm 0:9b334a45a8ff 22 * Except as contained in this notice, the name of Maxim Integrated
bogdanm 0:9b334a45a8ff 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
bogdanm 0:9b334a45a8ff 24 * Products, Inc. Branding Policy.
bogdanm 0:9b334a45a8ff 25 *
bogdanm 0:9b334a45a8ff 26 * The mere transfer of this software does not imply any licenses
bogdanm 0:9b334a45a8ff 27 * of trade secrets, proprietary technology, copyrights, patents,
bogdanm 0:9b334a45a8ff 28 * trademarks, maskwork rights, or any other form of intellectual
bogdanm 0:9b334a45a8ff 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
bogdanm 0:9b334a45a8ff 30 * ownership rights.
bogdanm 0:9b334a45a8ff 31 *******************************************************************************
bogdanm 0:9b334a45a8ff 32 */
bogdanm 0:9b334a45a8ff 33
bogdanm 0:9b334a45a8ff 34 #ifndef _MXC_AFE_REGS_H
bogdanm 0:9b334a45a8ff 35 #define _MXC_AFE_REGS_H
bogdanm 0:9b334a45a8ff 36
bogdanm 0:9b334a45a8ff 37 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 38 extern "C" {
bogdanm 0:9b334a45a8ff 39 #endif
bogdanm 0:9b334a45a8ff 40
bogdanm 0:9b334a45a8ff 41 #include <stdint.h>
bogdanm 0:9b334a45a8ff 42
bogdanm 0:9b334a45a8ff 43 /**
bogdanm 0:9b334a45a8ff 44 * @file afe_regs.h
bogdanm 0:9b334a45a8ff 45 * @addtogroup afe AFE
bogdanm 0:9b334a45a8ff 46 * @{
bogdanm 0:9b334a45a8ff 47 */
bogdanm 0:9b334a45a8ff 48
bogdanm 0:9b334a45a8ff 49 /**
bogdanm 0:9b334a45a8ff 50 * @brief Defines Configure Options for the LED Ports.
bogdanm 0:9b334a45a8ff 51 */
bogdanm 0:9b334a45a8ff 52 typedef enum {
bogdanm 0:9b334a45a8ff 53 /** LED Sink Port 0 with OpAmp A, LED Sink Port 1 with OpAmp C */
bogdanm 0:9b334a45a8ff 54 MXC_E_AFE_LED_CFG_PORT_OPAMP_A_C = 0,
bogdanm 0:9b334a45a8ff 55 /** LED Sink Port 0 with OpAmp B, LED Sink Port 1 with OpAmp D */
bogdanm 0:9b334a45a8ff 56 MXC_E_AFE_LED_CFG_PORT_OPAMP_B_D,
bogdanm 0:9b334a45a8ff 57 /** Disable LED Sink Port 0,Disable LED Sink Port 1 */
bogdanm 0:9b334a45a8ff 58 MXC_E_AFE_LED_CFG_PORT_DISABLED,
bogdanm 0:9b334a45a8ff 59 } mxc_afe_led_cfg_port_t;
bogdanm 0:9b334a45a8ff 60
bogdanm 0:9b334a45a8ff 61 /**
bogdanm 0:9b334a45a8ff 62 * @brief Setup of Wake Up Detector for LPCs.
bogdanm 0:9b334a45a8ff 63 */
bogdanm 0:9b334a45a8ff 64 typedef enum {
bogdanm 0:9b334a45a8ff 65 /** IDLE */
bogdanm 0:9b334a45a8ff 66 MXC_E_AFE_EN_WUD_COMP_IDLE = 0,
bogdanm 0:9b334a45a8ff 67 /** Activate WUD for falling edges */
bogdanm 0:9b334a45a8ff 68 MXC_E_AFE_EN_WUD_COMP_FALLING_EDGE = 2,
bogdanm 0:9b334a45a8ff 69 /** Activate WUD for rising edges */
bogdanm 0:9b334a45a8ff 70 MXC_E_AFE_EN_WUD_COMP_RISING_EDGE = 3
bogdanm 0:9b334a45a8ff 71 } mxc_afe_en_wud_comp_t;
bogdanm 0:9b334a45a8ff 72
bogdanm 0:9b334a45a8ff 73 /**
bogdanm 0:9b334a45a8ff 74 * @brief LPC InMode.
bogdanm 0:9b334a45a8ff 75 */
bogdanm 0:9b334a45a8ff 76 typedef enum {
bogdanm 0:9b334a45a8ff 77 /** InMode: both Nch and Pch */
bogdanm 0:9b334a45a8ff 78 MXC_E_AFE_IN_MODE_COMP_NCH_PCH = 0,
bogdanm 0:9b334a45a8ff 79 /** InMode: only Nch */
bogdanm 0:9b334a45a8ff 80 MXC_E_AFE_IN_MODE_COMP_NCH,
bogdanm 0:9b334a45a8ff 81 /** InMode: only Pch */
bogdanm 0:9b334a45a8ff 82 MXC_E_AFE_IN_MODE_COMP_PCH,
bogdanm 0:9b334a45a8ff 83 } mxc_afe_in_mode_comp_t;
bogdanm 0:9b334a45a8ff 84
bogdanm 0:9b334a45a8ff 85 /**
bogdanm 0:9b334a45a8ff 86 * @brief LPC Bias.
bogdanm 0:9b334a45a8ff 87 */
bogdanm 0:9b334a45a8ff 88 typedef enum {
bogdanm 0:9b334a45a8ff 89 /** BIAS 0.52uA Delay 4.0us */
bogdanm 0:9b334a45a8ff 90 MXC_E_AFE_BIAS_MODE_COMP_0 = 0,
bogdanm 0:9b334a45a8ff 91 /** BIAS 1.4uA Delay 1.7us */
bogdanm 0:9b334a45a8ff 92 MXC_E_AFE_BIAS_MODE_COMP_1,
bogdanm 0:9b334a45a8ff 93 /** BIAS 2.8uA Delay 1.1us */
bogdanm 0:9b334a45a8ff 94 MXC_E_AFE_BIAS_MODE_COMP_2,
bogdanm 0:9b334a45a8ff 95 /** BIAS 5.1uA Delay 0.7us */
bogdanm 0:9b334a45a8ff 96 MXC_E_AFE_BIAS_MODE_COMP_3
bogdanm 0:9b334a45a8ff 97 } mxc_afe_bias_mode_comp_t;
bogdanm 0:9b334a45a8ff 98
bogdanm 0:9b334a45a8ff 99 /**
bogdanm 0:9b334a45a8ff 100 * @brief TMON Current Value.
bogdanm 0:9b334a45a8ff 101 */
bogdanm 0:9b334a45a8ff 102 typedef enum {
bogdanm 0:9b334a45a8ff 103 /** TMON Current 4uA */
bogdanm 0:9b334a45a8ff 104 MXC_E_AFE_TMON_CURRENT_VAL_0 = 0,
bogdanm 0:9b334a45a8ff 105 /** TMON Current 60uA */
bogdanm 0:9b334a45a8ff 106 MXC_E_AFE_TMON_CURRENT_VAL_1,
bogdanm 0:9b334a45a8ff 107 /** TMON Current 64uA */
bogdanm 0:9b334a45a8ff 108 MXC_E_AFE_TMON_CURRENT_VAL_2,
bogdanm 0:9b334a45a8ff 109 /** TMON Current 120uA */
bogdanm 0:9b334a45a8ff 110 MXC_E_AFE_TMON_CURRENT_VAL_3
bogdanm 0:9b334a45a8ff 111 } mxc_afe_tmon_current_t;
bogdanm 0:9b334a45a8ff 112
bogdanm 0:9b334a45a8ff 113 /**
bogdanm 0:9b334a45a8ff 114 * @brief REFADC and REFDAC Voltage Select.
bogdanm 0:9b334a45a8ff 115 */
bogdanm 0:9b334a45a8ff 116 typedef enum {
bogdanm 0:9b334a45a8ff 117 /** Voltage Reference = 1.024 V */
bogdanm 0:9b334a45a8ff 118 MXC_E_AFE_REF_VOLT_SEL_1024 = 0,
bogdanm 0:9b334a45a8ff 119 /** Voltage Reference = 1.5 V */
bogdanm 0:9b334a45a8ff 120 MXC_E_AFE_REF_VOLT_SEL_1500,
bogdanm 0:9b334a45a8ff 121 /** Voltage Reference = 2.048 V */
bogdanm 0:9b334a45a8ff 122 MXC_E_AFE_REF_VOLT_SEL_2048,
bogdanm 0:9b334a45a8ff 123 /** Voltage Reference = 2.5 V */
bogdanm 0:9b334a45a8ff 124 MXC_E_AFE_REF_VOLT_SEL_2500
bogdanm 0:9b334a45a8ff 125 } mxc_afe_ref_volt_sel_t;
bogdanm 0:9b334a45a8ff 126
bogdanm 0:9b334a45a8ff 127 /**
bogdanm 0:9b334a45a8ff 128 * @brief Selection for DAC VOltage Reference, REFADC or REFDAC.
bogdanm 0:9b334a45a8ff 129 */
bogdanm 0:9b334a45a8ff 130 typedef enum {
bogdanm 0:9b334a45a8ff 131 /** DAC Voltage Reference = REFADC */
bogdanm 0:9b334a45a8ff 132 MXC_E_AFE_DAC_REF_REFADC = 0,
bogdanm 0:9b334a45a8ff 133 /** DAC Voltage Reference = REFDAC */
bogdanm 0:9b334a45a8ff 134 MXC_E_AFE_DAC_REF_REFDAC
bogdanm 0:9b334a45a8ff 135 } mxc_afe_dac_ref_t;
bogdanm 0:9b334a45a8ff 136
bogdanm 0:9b334a45a8ff 137 /**
bogdanm 0:9b334a45a8ff 138 * @brief Selection for LPC Hysteresis.
bogdanm 0:9b334a45a8ff 139 */
bogdanm 0:9b334a45a8ff 140 typedef enum {
bogdanm 0:9b334a45a8ff 141 /** LPC Hysteresis = 0 mV */
bogdanm 0:9b334a45a8ff 142 MXC_E_AFE_HYST_COMP_0 = 0,
bogdanm 0:9b334a45a8ff 143 /** LPC Hysteresis = 7.5 mV */
bogdanm 0:9b334a45a8ff 144 MXC_E_AFE_HYST_COMP_1,
bogdanm 0:9b334a45a8ff 145 /** LPC Hysteresis = 15 mV */
bogdanm 0:9b334a45a8ff 146 MXC_E_AFE_HYST_COMP_2,
bogdanm 0:9b334a45a8ff 147 /** LPC Hysteresis = 30 mV */
bogdanm 0:9b334a45a8ff 148 MXC_E_AFE_HYST_COMP_3
bogdanm 0:9b334a45a8ff 149 } mxc_afe_hyst_comp_t;
bogdanm 0:9b334a45a8ff 150
bogdanm 0:9b334a45a8ff 151 /**
bogdanm 0:9b334a45a8ff 152 * @brief Selection for MUX for SCM_or_sel.
bogdanm 0:9b334a45a8ff 153 */
bogdanm 0:9b334a45a8ff 154 typedef enum {
bogdanm 0:9b334a45a8ff 155 /** SCM_or = HIZ */
bogdanm 0:9b334a45a8ff 156 MXC_E_AFE_SCM_OR_SEL_HIZ = 0,
bogdanm 0:9b334a45a8ff 157 /** SCM_or = SCM0 */
bogdanm 0:9b334a45a8ff 158 MXC_E_AFE_SCM_OR_SEL_SCM0,
bogdanm 0:9b334a45a8ff 159 /** SCM_or = SCM1 */
bogdanm 0:9b334a45a8ff 160 MXC_E_AFE_SCM_OR_SEL_SCM1,
bogdanm 0:9b334a45a8ff 161 /** SCM_or = SCM2 */
bogdanm 0:9b334a45a8ff 162 MXC_E_AFE_SCM_OR_SEL_SCM2,
bogdanm 0:9b334a45a8ff 163 /** SCM_or = SCM3 */
bogdanm 0:9b334a45a8ff 164 MXC_E_AFE_SCM_OR_SEL_SCM3
bogdanm 0:9b334a45a8ff 165 } mxc_afe_scm_or_sel_t;
bogdanm 0:9b334a45a8ff 166
bogdanm 0:9b334a45a8ff 167 /**
bogdanm 0:9b334a45a8ff 168 * @brief Selection for MUX for SNO_or_sel.
bogdanm 0:9b334a45a8ff 169 */
bogdanm 0:9b334a45a8ff 170 typedef enum {
bogdanm 0:9b334a45a8ff 171 /** SNO_or = HIZ */
bogdanm 0:9b334a45a8ff 172 MXC_E_AFE_SNO_OR_SEL_HIZ = 0,
bogdanm 0:9b334a45a8ff 173 /** SNO_or = SNO0 */
bogdanm 0:9b334a45a8ff 174 MXC_E_AFE_SNO_OR_SEL_SNO0,
bogdanm 0:9b334a45a8ff 175 /** SNO_or = SNO1 */
bogdanm 0:9b334a45a8ff 176 MXC_E_AFE_SNO_OR_SEL_SNO1,
bogdanm 0:9b334a45a8ff 177 /** SNO_or = SNO2 */
bogdanm 0:9b334a45a8ff 178 MXC_E_AFE_SNO_OR_SEL_SNO2,
bogdanm 0:9b334a45a8ff 179 /** SNO_or = SNO3 */
bogdanm 0:9b334a45a8ff 180 MXC_E_AFE_SNO_OR_SEL_SNO3
bogdanm 0:9b334a45a8ff 181 } mxc_afe_sno_or_sel_t;
bogdanm 0:9b334a45a8ff 182
bogdanm 0:9b334a45a8ff 183 /**
bogdanm 0:9b334a45a8ff 184 * @brief Selection for MUX DACx_sel.
bogdanm 0:9b334a45a8ff 185 */
bogdanm 0:9b334a45a8ff 186 typedef enum {
bogdanm 0:9b334a45a8ff 187 /** dacx = DACOP */
bogdanm 0:9b334a45a8ff 188 MXC_E_AFE_DACX_SEL_P = 0,
bogdanm 0:9b334a45a8ff 189 /** dacx = DACON */
bogdanm 0:9b334a45a8ff 190 MXC_E_AFE_DACX_SEL_N
bogdanm 0:9b334a45a8ff 191 } mxc_afe_dacx_sel_t;
bogdanm 0:9b334a45a8ff 192
bogdanm 0:9b334a45a8ff 193 /**
bogdanm 0:9b334a45a8ff 194 * @brief Selection for state of Switch.
bogdanm 0:9b334a45a8ff 195 */
bogdanm 0:9b334a45a8ff 196 typedef enum {
bogdanm 0:9b334a45a8ff 197 /** Switch is OPEN */
bogdanm 0:9b334a45a8ff 198 MXC_E_AFE_CLOSE_SPST_SWITCH_OPEN = 0,
bogdanm 0:9b334a45a8ff 199 /** Switch is CLOSED */
bogdanm 0:9b334a45a8ff 200 MXC_E_AFE_CLOSE_SPST_SWITCH_CLOSE
bogdanm 0:9b334a45a8ff 201 } mxc_afe_close_spst_t;
bogdanm 0:9b334a45a8ff 202
bogdanm 0:9b334a45a8ff 203 /**
bogdanm 0:9b334a45a8ff 204 * @brief Switch to Connect Positive Pad to GND.
bogdanm 0:9b334a45a8ff 205 */
bogdanm 0:9b334a45a8ff 206 typedef enum {
bogdanm 0:9b334a45a8ff 207 /** Positive Pad GND Switch OPEN */
bogdanm 0:9b334a45a8ff 208 MXC_E_AFE_GND_SEL_OPAMP_SWITCH_OPEN = 0,
bogdanm 0:9b334a45a8ff 209 /** Positive Pad GND Switch CLOSED */
bogdanm 0:9b334a45a8ff 210 MXC_E_AFE_GND_SEL_OPAMP_SWITCH_CLOSED
bogdanm 0:9b334a45a8ff 211 } mxc_afe_gnd_sel_opamp_t;
bogdanm 0:9b334a45a8ff 212
bogdanm 0:9b334a45a8ff 213 /**
bogdanm 0:9b334a45a8ff 214 * @brief MUX Selection for OpPsel.
bogdanm 0:9b334a45a8ff 215 */
bogdanm 0:9b334a45a8ff 216 typedef enum {
bogdanm 0:9b334a45a8ff 217 /** OpPsel = INx+ */
bogdanm 0:9b334a45a8ff 218 MXC_E_AFE_P_IN_SEL_OPAMP_INPLUS = 0,
bogdanm 0:9b334a45a8ff 219 /** OpPsel = DAC_or */
bogdanm 0:9b334a45a8ff 220 MXC_E_AFE_P_IN_SEL_OPAMP_DAC_OR,
bogdanm 0:9b334a45a8ff 221 /** OpPsel = SNO_or */
bogdanm 0:9b334a45a8ff 222 MXC_E_AFE_P_IN_SEL_OPAMP_SNO_OR,
bogdanm 0:9b334a45a8ff 223 /** OpPsel = DAC_or also output on INx+ */
bogdanm 0:9b334a45a8ff 224 MXC_E_AFE_P_IN_SEL_OPAMP_DAC_OR_AND_INPLUS
bogdanm 0:9b334a45a8ff 225 } mxc_afe_p_in_sel_opamp_t;
bogdanm 0:9b334a45a8ff 226
bogdanm 0:9b334a45a8ff 227 /**
bogdanm 0:9b334a45a8ff 228 * @brief MUX Selection for OpNsel.
bogdanm 0:9b334a45a8ff 229 */
bogdanm 0:9b334a45a8ff 230 typedef enum {
bogdanm 0:9b334a45a8ff 231 /** OpNsel = INx- */
bogdanm 0:9b334a45a8ff 232 MXC_E_AFE_N_IN_SEL_OPAMP_INMINUS = 0,
bogdanm 0:9b334a45a8ff 233 /** OpNsel = OUTx */
bogdanm 0:9b334a45a8ff 234 MXC_E_AFE_N_IN_SEL_OPAMP_OUT,
bogdanm 0:9b334a45a8ff 235 /** OpNsel = SCM_or */
bogdanm 0:9b334a45a8ff 236 MXC_E_AFE_N_IN_SEL_OPAMP_SCM_OR,
bogdanm 0:9b334a45a8ff 237 /**OpNsel = SCM_or also output on INx- */
bogdanm 0:9b334a45a8ff 238 MXC_E_AFE_N_IN_SEL_OPAMP_SCM_OR_AND_INMINUS,
bogdanm 0:9b334a45a8ff 239 } mxc_afe_n_in_sel_opamp_t;
bogdanm 0:9b334a45a8ff 240
bogdanm 0:9b334a45a8ff 241 /**
bogdanm 0:9b334a45a8ff 242 * @brief MUX Selection for DAC_sel.
bogdanm 0:9b334a45a8ff 243 */
bogdanm 0:9b334a45a8ff 244 typedef enum {
bogdanm 0:9b334a45a8ff 245 /** DAC_or = DAC0 */
bogdanm 0:9b334a45a8ff 246 MXC_E_AFE_DAC_SEL_DAC0 = 0,
bogdanm 0:9b334a45a8ff 247 /** DAC_or = DAC1 */
bogdanm 0:9b334a45a8ff 248 MXC_E_AFE_DAC_SEL_DAC1,
bogdanm 0:9b334a45a8ff 249 /** DAC_or = DAC2P */
bogdanm 0:9b334a45a8ff 250 MXC_E_AFE_DAC_SEL_DAC2P,
bogdanm 0:9b334a45a8ff 251 /** DAC_or = DAC3P */
bogdanm 0:9b334a45a8ff 252 MXC_E_AFE_DAC_SEL_DAC3P
bogdanm 0:9b334a45a8ff 253 } mxc_afe_dac_sel_t;
bogdanm 0:9b334a45a8ff 254
bogdanm 0:9b334a45a8ff 255 /**
bogdanm 0:9b334a45a8ff 256 * @brief MUX Selection for NPAD_sel.
bogdanm 0:9b334a45a8ff 257 */
bogdanm 0:9b334a45a8ff 258 typedef enum {
bogdanm 0:9b334a45a8ff 259 /** NPAD_Sel = HIZ */
bogdanm 0:9b334a45a8ff 260 MXC_E_AFE_NPAD_SEL_HIZ = 0,
bogdanm 0:9b334a45a8ff 261 /** NPAD_Sel = LED Observe Port */
bogdanm 0:9b334a45a8ff 262 MXC_E_AFE_NPAD_SEL_LED_OBS_PORT,
bogdanm 0:9b334a45a8ff 263 /** NPAD_Sel = DAC_or */
bogdanm 0:9b334a45a8ff 264 MXC_E_AFE_NPAD_SEL_DAC_OR,
bogdanm 0:9b334a45a8ff 265 /** NPAD_Sel = DAC_or and LED Observe Port */
bogdanm 0:9b334a45a8ff 266 MXC_E_AFE_NPAD_SEL_DAC_OR_AND_LED_OBS_PORT
bogdanm 0:9b334a45a8ff 267 } mxc_afe_npad_sel_t;
bogdanm 0:9b334a45a8ff 268
bogdanm 0:9b334a45a8ff 269 /**
bogdanm 0:9b334a45a8ff 270 * @brief MUX Selection for CmpPSel.
bogdanm 0:9b334a45a8ff 271 */
bogdanm 0:9b334a45a8ff 272 typedef enum {
bogdanm 0:9b334a45a8ff 273 /** CmpPSel = INx+ */
bogdanm 0:9b334a45a8ff 274 MXC_E_AFE_POS_IN_SEL_COMP_INPLUS = 0,
bogdanm 0:9b334a45a8ff 275 /** CmpPSel = SCM */
bogdanm 0:9b334a45a8ff 276 MXC_E_AFE_POS_IN_SEL_COMP_SCM,
bogdanm 0:9b334a45a8ff 277 /** CmpPSel = dac1 */
bogdanm 0:9b334a45a8ff 278 MXC_E_AFE_POS_IN_SEL_COMP_DAC1,
bogdanm 0:9b334a45a8ff 279 /** CmpPSel = DAC3P */
bogdanm 0:9b334a45a8ff 280 MXC_E_AFE_POS_IN_SEL_COMP_DAC3P,
bogdanm 0:9b334a45a8ff 281 /** CmpPSel = LED Observe Port */
bogdanm 0:9b334a45a8ff 282 MXC_E_AFE_POS_IN_SEL_COMP_LED_OBS_PORT,
bogdanm 0:9b334a45a8ff 283 /** CmpPSel = dac1 also output on INx+ */
bogdanm 0:9b334a45a8ff 284 MXC_E_AFE_POS_IN_SEL_COMP_DAC1_AND_INPLUS,
bogdanm 0:9b334a45a8ff 285 /** CmpPSel = DAC3P also output on INx+ */
bogdanm 0:9b334a45a8ff 286 MXC_E_AFE_POS_IN_SEL_COMP_DAC3P_AND_INPLUS,
bogdanm 0:9b334a45a8ff 287 /** CmpPSel = dac1 also output on SCM */
bogdanm 0:9b334a45a8ff 288 MXC_E_AFE_POS_IN_SEL_COMP_DAC1_AND_SCM
bogdanm 0:9b334a45a8ff 289 } mxc_afe_pos_in_sel_comp_t;
bogdanm 0:9b334a45a8ff 290
bogdanm 0:9b334a45a8ff 291 /**
bogdanm 0:9b334a45a8ff 292 * @brief MUX Selection for CmpNSel.
bogdanm 0:9b334a45a8ff 293 */
bogdanm 0:9b334a45a8ff 294 typedef enum {
bogdanm 0:9b334a45a8ff 295 /** CmpNSel = INx- */
bogdanm 0:9b334a45a8ff 296 MXC_E_AFE_NEG_IN_SEL_COMP_INMINUS = 0,
bogdanm 0:9b334a45a8ff 297 /** CmpNSel = SNO */
bogdanm 0:9b334a45a8ff 298 MXC_E_AFE_NEG_IN_SEL_COMP_SNO,
bogdanm 0:9b334a45a8ff 299 /** CmpNSel = dac0 */
bogdanm 0:9b334a45a8ff 300 MXC_E_AFE_NEG_IN_SEL_COMP_DAC0,
bogdanm 0:9b334a45a8ff 301 /** CmpNSel = DAC2P */
bogdanm 0:9b334a45a8ff 302 MXC_E_AFE_NEG_IN_SEL_COMP_DAC2P,
bogdanm 0:9b334a45a8ff 303 /** CmpNSel = LED Observation Port */
bogdanm 0:9b334a45a8ff 304 MXC_E_AFE_NEG_IN_SEL_COMP_LED_OBS_PORT,
bogdanm 0:9b334a45a8ff 305 /** CmpNSel = dac0 also output on INx- */
bogdanm 0:9b334a45a8ff 306 MXC_E_AFE_NEG_IN_SEL_COMP_DAC0_AND_INMINUS,
bogdanm 0:9b334a45a8ff 307 /** CmpNSel = DAC2 also output on INx- */
bogdanm 0:9b334a45a8ff 308 MXC_E_AFE_NEG_IN_SEL_COMP_DAC2P_AND_INMINUS,
bogdanm 0:9b334a45a8ff 309 /** CmpNSel = DAC2 also output on SNO */
bogdanm 0:9b334a45a8ff 310 MXC_E_AFE_NEG_IN_SEL_COMP_DAC2P_AND_SNO
bogdanm 0:9b334a45a8ff 311 } mxc_afe_neg_in_sel_comp_t;
bogdanm 0:9b334a45a8ff 312
bogdanm 0:9b334a45a8ff 313 /* Offset Register Description
bogdanm 0:9b334a45a8ff 314 ====== ==================================================== */
bogdanm 0:9b334a45a8ff 315 typedef struct {
bogdanm 0:9b334a45a8ff 316 __IO uint32_t intr; /* 0x0000 Analog Front End Interrupt Flags and Enable/Disable */
bogdanm 0:9b334a45a8ff 317 __IO uint32_t ctrl0; /* 0x0004 Analog Front End Control 0 */
bogdanm 0:9b334a45a8ff 318 __IO uint32_t ctrl1; /* 0x0008 Analog Front End Control 1 */
bogdanm 0:9b334a45a8ff 319 __IO uint32_t ctrl2; /* 0x000C Analog Front End Control 2 */
bogdanm 0:9b334a45a8ff 320 __IO uint32_t ctrl3; /* 0x0010 Analog Front End Control 3 */
bogdanm 0:9b334a45a8ff 321 __IO uint32_t ctrl4; /* 0x0014 Analog Front End Control 4 */
bogdanm 0:9b334a45a8ff 322 __IO uint32_t ctrl5; /* 0x0018 Analog Front End Control 5 */
bogdanm 0:9b334a45a8ff 323 } mxc_afe_regs_t;
bogdanm 0:9b334a45a8ff 324
bogdanm 0:9b334a45a8ff 325 /*
bogdanm 0:9b334a45a8ff 326 Register offsets for module AFE.
bogdanm 0:9b334a45a8ff 327 */
bogdanm 0:9b334a45a8ff 328 #define MXC_R_AFE_OFFS_INTR ((uint32_t)0x00000000UL)
bogdanm 0:9b334a45a8ff 329 #define MXC_R_AFE_OFFS_CTRL0 ((uint32_t)0x00000004UL)
bogdanm 0:9b334a45a8ff 330 #define MXC_R_AFE_OFFS_CTRL1 ((uint32_t)0x00000008UL)
bogdanm 0:9b334a45a8ff 331 #define MXC_R_AFE_OFFS_CTRL2 ((uint32_t)0x0000000CUL)
bogdanm 0:9b334a45a8ff 332 #define MXC_R_AFE_OFFS_CTRL3 ((uint32_t)0x00000010UL)
bogdanm 0:9b334a45a8ff 333 #define MXC_R_AFE_OFFS_CTRL4 ((uint32_t)0x00000014UL)
bogdanm 0:9b334a45a8ff 334 #define MXC_R_AFE_OFFS_CTRL5 ((uint32_t)0x00000018UL)
bogdanm 0:9b334a45a8ff 335
bogdanm 0:9b334a45a8ff 336 /*
bogdanm 0:9b334a45a8ff 337 Field positions and masks for module AFE.
bogdanm 0:9b334a45a8ff 338 */
bogdanm 0:9b334a45a8ff 339 #define MXC_F_AFE_INTR_OP_COMP0_IF_POS 0
bogdanm 0:9b334a45a8ff 340 #define MXC_F_AFE_INTR_OP_COMP0_IF ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP0_IF_POS))
bogdanm 0:9b334a45a8ff 341 #define MXC_F_AFE_INTR_OP_COMP1_IF_POS 1
bogdanm 0:9b334a45a8ff 342 #define MXC_F_AFE_INTR_OP_COMP1_IF ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP1_IF_POS))
bogdanm 0:9b334a45a8ff 343 #define MXC_F_AFE_INTR_OP_COMP2_IF_POS 2
bogdanm 0:9b334a45a8ff 344 #define MXC_F_AFE_INTR_OP_COMP2_IF ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP2_IF_POS))
bogdanm 0:9b334a45a8ff 345 #define MXC_F_AFE_INTR_OP_COMP3_IF_POS 3
bogdanm 0:9b334a45a8ff 346 #define MXC_F_AFE_INTR_OP_COMP3_IF ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP3_IF_POS))
bogdanm 0:9b334a45a8ff 347 #define MXC_F_AFE_INTR_LP_COMP0_IF_POS 4
bogdanm 0:9b334a45a8ff 348 #define MXC_F_AFE_INTR_LP_COMP0_IF ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP0_IF_POS))
bogdanm 0:9b334a45a8ff 349 #define MXC_F_AFE_INTR_LP_COMP1_IF_POS 5
bogdanm 0:9b334a45a8ff 350 #define MXC_F_AFE_INTR_LP_COMP1_IF ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP1_IF_POS))
bogdanm 0:9b334a45a8ff 351 #define MXC_F_AFE_INTR_LP_COMP2_IF_POS 6
bogdanm 0:9b334a45a8ff 352 #define MXC_F_AFE_INTR_LP_COMP2_IF ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP2_IF_POS))
bogdanm 0:9b334a45a8ff 353 #define MXC_F_AFE_INTR_LP_COMP3_IF_POS 7
bogdanm 0:9b334a45a8ff 354 #define MXC_F_AFE_INTR_LP_COMP3_IF ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP3_IF_POS))
bogdanm 0:9b334a45a8ff 355 #define MXC_F_AFE_INTR_OP_COMP0_NMI_PMU_POS 8
bogdanm 0:9b334a45a8ff 356 #define MXC_F_AFE_INTR_OP_COMP0_NMI_PMU ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP0_NMI_PMU_POS))
bogdanm 0:9b334a45a8ff 357 #define MXC_F_AFE_INTR_OP_COMP1_NMI_PMU_POS 9
bogdanm 0:9b334a45a8ff 358 #define MXC_F_AFE_INTR_OP_COMP1_NMI_PMU ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP1_NMI_PMU_POS))
bogdanm 0:9b334a45a8ff 359 #define MXC_F_AFE_INTR_OP_COMP2_NMI_PMU_POS 10
bogdanm 0:9b334a45a8ff 360 #define MXC_F_AFE_INTR_OP_COMP2_NMI_PMU ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP2_NMI_PMU_POS))
bogdanm 0:9b334a45a8ff 361 #define MXC_F_AFE_INTR_OP_COMP3_NMI_PMU_POS 11
bogdanm 0:9b334a45a8ff 362 #define MXC_F_AFE_INTR_OP_COMP3_NMI_PMU ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP3_NMI_PMU_POS))
bogdanm 0:9b334a45a8ff 363 #define MXC_F_AFE_INTR_LP_COMP0_NMI_PMU_POS 12
bogdanm 0:9b334a45a8ff 364 #define MXC_F_AFE_INTR_LP_COMP0_NMI_PMU ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP0_NMI_PMU_POS))
bogdanm 0:9b334a45a8ff 365 #define MXC_F_AFE_INTR_LP_COMP1_NMI_PMU_POS 13
bogdanm 0:9b334a45a8ff 366 #define MXC_F_AFE_INTR_LP_COMP1_NMI_PMU ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP1_NMI_PMU_POS))
bogdanm 0:9b334a45a8ff 367 #define MXC_F_AFE_INTR_LP_COMP2_NMI_PMU_POS 14
bogdanm 0:9b334a45a8ff 368 #define MXC_F_AFE_INTR_LP_COMP2_NMI_PMU ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP2_NMI_PMU_POS))
bogdanm 0:9b334a45a8ff 369 #define MXC_F_AFE_INTR_LP_COMP3_NMI_PMU_POS 15
bogdanm 0:9b334a45a8ff 370 #define MXC_F_AFE_INTR_LP_COMP3_NMI_PMU ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP3_NMI_PMU_POS))
bogdanm 0:9b334a45a8ff 371 #define MXC_F_AFE_INTR_OP_COMP0_POL_POS 16
bogdanm 0:9b334a45a8ff 372 #define MXC_F_AFE_INTR_OP_COMP0_POL ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP0_POL_POS))
bogdanm 0:9b334a45a8ff 373 #define MXC_F_AFE_INTR_OP_COMP1_POL_POS 17
bogdanm 0:9b334a45a8ff 374 #define MXC_F_AFE_INTR_OP_COMP1_POL ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP1_POL_POS))
bogdanm 0:9b334a45a8ff 375 #define MXC_F_AFE_INTR_OP_COMP2_POL_POS 18
bogdanm 0:9b334a45a8ff 376 #define MXC_F_AFE_INTR_OP_COMP2_POL ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP2_POL_POS))
bogdanm 0:9b334a45a8ff 377 #define MXC_F_AFE_INTR_OP_COMP3_POL_POS 19
bogdanm 0:9b334a45a8ff 378 #define MXC_F_AFE_INTR_OP_COMP3_POL ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP3_POL_POS))
bogdanm 0:9b334a45a8ff 379 #define MXC_F_AFE_INTR_LP_COMP0_POL_POS 20
bogdanm 0:9b334a45a8ff 380 #define MXC_F_AFE_INTR_LP_COMP0_POL ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP0_POL_POS))
bogdanm 0:9b334a45a8ff 381 #define MXC_F_AFE_INTR_LP_COMP1_POL_POS 21
bogdanm 0:9b334a45a8ff 382 #define MXC_F_AFE_INTR_LP_COMP1_POL ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP1_POL_POS))
bogdanm 0:9b334a45a8ff 383 #define MXC_F_AFE_INTR_LP_COMP2_POL_POS 22
bogdanm 0:9b334a45a8ff 384 #define MXC_F_AFE_INTR_LP_COMP2_POL ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP2_POL_POS))
bogdanm 0:9b334a45a8ff 385 #define MXC_F_AFE_INTR_LP_COMP3_POL_POS 23
bogdanm 0:9b334a45a8ff 386 #define MXC_F_AFE_INTR_LP_COMP3_POL ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP3_POL_POS))
bogdanm 0:9b334a45a8ff 387 #define MXC_F_AFE_INTR_OP_COMP0_IE_POS 24
bogdanm 0:9b334a45a8ff 388 #define MXC_F_AFE_INTR_OP_COMP0_IE ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP0_IE_POS))
bogdanm 0:9b334a45a8ff 389 #define MXC_F_AFE_INTR_OP_COMP1_IE_POS 25
bogdanm 0:9b334a45a8ff 390 #define MXC_F_AFE_INTR_OP_COMP1_IE ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP1_IE_POS))
bogdanm 0:9b334a45a8ff 391 #define MXC_F_AFE_INTR_OP_COMP2_IE_POS 26
bogdanm 0:9b334a45a8ff 392 #define MXC_F_AFE_INTR_OP_COMP2_IE ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP2_IE_POS))
bogdanm 0:9b334a45a8ff 393 #define MXC_F_AFE_INTR_OP_COMP3_IE_POS 27
bogdanm 0:9b334a45a8ff 394 #define MXC_F_AFE_INTR_OP_COMP3_IE ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_OP_COMP3_IE_POS))
bogdanm 0:9b334a45a8ff 395 #define MXC_F_AFE_INTR_LP_COMP0_IE_POS 28
bogdanm 0:9b334a45a8ff 396 #define MXC_F_AFE_INTR_LP_COMP0_IE ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP0_IE_POS))
bogdanm 0:9b334a45a8ff 397 #define MXC_F_AFE_INTR_LP_COMP1_IE_POS 29
bogdanm 0:9b334a45a8ff 398 #define MXC_F_AFE_INTR_LP_COMP1_IE ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP1_IE_POS))
bogdanm 0:9b334a45a8ff 399 #define MXC_F_AFE_INTR_LP_COMP2_IE_POS 30
bogdanm 0:9b334a45a8ff 400 #define MXC_F_AFE_INTR_LP_COMP2_IE ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP2_IE_POS))
bogdanm 0:9b334a45a8ff 401 #define MXC_F_AFE_INTR_LP_COMP3_IE_POS 31
bogdanm 0:9b334a45a8ff 402 #define MXC_F_AFE_INTR_LP_COMP3_IE ((uint32_t)(0x00000001UL << MXC_F_AFE_INTR_LP_COMP3_IE_POS))
bogdanm 0:9b334a45a8ff 403
bogdanm 0:9b334a45a8ff 404 #define MXC_F_AFE_CTRL0_LED_CFG_POS 0
bogdanm 0:9b334a45a8ff 405 #define MXC_F_AFE_CTRL0_LED_CFG ((uint32_t)(0x0000000FUL << MXC_F_AFE_CTRL0_LED_CFG_POS))
bogdanm 0:9b334a45a8ff 406 #define MXC_F_AFE_CTRL0_CLEAR_WUD_COMP0_POS 4
bogdanm 0:9b334a45a8ff 407 #define MXC_F_AFE_CTRL0_CLEAR_WUD_COMP0 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL0_CLEAR_WUD_COMP0_POS))
bogdanm 0:9b334a45a8ff 408 #define MXC_F_AFE_CTRL0_CLEAR_WUD_COMP1_POS 5
bogdanm 0:9b334a45a8ff 409 #define MXC_F_AFE_CTRL0_CLEAR_WUD_COMP1 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL0_CLEAR_WUD_COMP1_POS))
bogdanm 0:9b334a45a8ff 410 #define MXC_F_AFE_CTRL0_CLEAR_WUD_COMP2_POS 6
bogdanm 0:9b334a45a8ff 411 #define MXC_F_AFE_CTRL0_CLEAR_WUD_COMP2 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL0_CLEAR_WUD_COMP2_POS))
bogdanm 0:9b334a45a8ff 412 #define MXC_F_AFE_CTRL0_CLEAR_WUD_COMP3_POS 7
bogdanm 0:9b334a45a8ff 413 #define MXC_F_AFE_CTRL0_CLEAR_WUD_COMP3 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL0_CLEAR_WUD_COMP3_POS))
bogdanm 0:9b334a45a8ff 414 #define MXC_F_AFE_CTRL0_EN_WUD_COMP0_POS 8
bogdanm 0:9b334a45a8ff 415 #define MXC_F_AFE_CTRL0_EN_WUD_COMP0 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_EN_WUD_COMP0_POS))
bogdanm 0:9b334a45a8ff 416 #define MXC_F_AFE_CTRL0_EN_WUD_COMP1_POS 10
bogdanm 0:9b334a45a8ff 417 #define MXC_F_AFE_CTRL0_EN_WUD_COMP1 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_EN_WUD_COMP1_POS))
bogdanm 0:9b334a45a8ff 418 #define MXC_F_AFE_CTRL0_EN_WUD_COMP2_POS 12
bogdanm 0:9b334a45a8ff 419 #define MXC_F_AFE_CTRL0_EN_WUD_COMP2 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_EN_WUD_COMP2_POS))
bogdanm 0:9b334a45a8ff 420 #define MXC_F_AFE_CTRL0_EN_WUD_COMP3_POS 14
bogdanm 0:9b334a45a8ff 421 #define MXC_F_AFE_CTRL0_EN_WUD_COMP3 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_EN_WUD_COMP3_POS))
bogdanm 0:9b334a45a8ff 422 #define MXC_F_AFE_CTRL0_IN_MODE_COMP0_POS 16
bogdanm 0:9b334a45a8ff 423 #define MXC_F_AFE_CTRL0_IN_MODE_COMP0 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_IN_MODE_COMP0_POS))
bogdanm 0:9b334a45a8ff 424 #define MXC_F_AFE_CTRL0_IN_MODE_COMP1_POS 18
bogdanm 0:9b334a45a8ff 425 #define MXC_F_AFE_CTRL0_IN_MODE_COMP1 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_IN_MODE_COMP1_POS))
bogdanm 0:9b334a45a8ff 426 #define MXC_F_AFE_CTRL0_IN_MODE_COMP2_POS 20
bogdanm 0:9b334a45a8ff 427 #define MXC_F_AFE_CTRL0_IN_MODE_COMP2 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_IN_MODE_COMP2_POS))
bogdanm 0:9b334a45a8ff 428 #define MXC_F_AFE_CTRL0_IN_MODE_COMP3_POS 22
bogdanm 0:9b334a45a8ff 429 #define MXC_F_AFE_CTRL0_IN_MODE_COMP3 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_IN_MODE_COMP3_POS))
bogdanm 0:9b334a45a8ff 430 #define MXC_F_AFE_CTRL0_BIAS_MODE_COMP0_POS 24
bogdanm 0:9b334a45a8ff 431 #define MXC_F_AFE_CTRL0_BIAS_MODE_COMP0 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_BIAS_MODE_COMP0_POS))
bogdanm 0:9b334a45a8ff 432 #define MXC_F_AFE_CTRL0_BIAS_MODE_COMP1_POS 26
bogdanm 0:9b334a45a8ff 433 #define MXC_F_AFE_CTRL0_BIAS_MODE_COMP1 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_BIAS_MODE_COMP1_POS))
bogdanm 0:9b334a45a8ff 434 #define MXC_F_AFE_CTRL0_BIAS_MODE_COMP2_POS 28
bogdanm 0:9b334a45a8ff 435 #define MXC_F_AFE_CTRL0_BIAS_MODE_COMP2 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_BIAS_MODE_COMP2_POS))
bogdanm 0:9b334a45a8ff 436 #define MXC_F_AFE_CTRL0_BIAS_MODE_COMP3_POS 30
bogdanm 0:9b334a45a8ff 437 #define MXC_F_AFE_CTRL0_BIAS_MODE_COMP3 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL0_BIAS_MODE_COMP3_POS))
bogdanm 0:9b334a45a8ff 438
bogdanm 0:9b334a45a8ff 439 #define MXC_F_AFE_CTRL1_TEMP_SENSE_CURRENT_EN_POS 0
bogdanm 0:9b334a45a8ff 440 #define MXC_F_AFE_CTRL1_TEMP_SENSE_CURRENT_EN ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_TEMP_SENSE_CURRENT_EN_POS))
bogdanm 0:9b334a45a8ff 441 #define MXC_F_AFE_CTRL1_TEMP_SENSE_CURRENT_SEL_POS 1
bogdanm 0:9b334a45a8ff 442 #define MXC_F_AFE_CTRL1_TEMP_SENSE_CURRENT_SEL ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL1_TEMP_SENSE_CURRENT_SEL_POS))
bogdanm 0:9b334a45a8ff 443 #define MXC_F_AFE_CTRL1_REF_DAC_FAST_PWRDN_EN_POS 3
bogdanm 0:9b334a45a8ff 444 #define MXC_F_AFE_CTRL1_REF_DAC_FAST_PWRDN_EN ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_REF_DAC_FAST_PWRDN_EN_POS))
bogdanm 0:9b334a45a8ff 445 #define MXC_F_AFE_CTRL1_REF_ADC_FAST_PWRDN_EN_POS 4
bogdanm 0:9b334a45a8ff 446 #define MXC_F_AFE_CTRL1_REF_ADC_FAST_PWRDN_EN ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_REF_ADC_FAST_PWRDN_EN_POS))
bogdanm 0:9b334a45a8ff 447 #define MXC_F_AFE_CTRL1_REF_BANDGAP_SEL_POS 5
bogdanm 0:9b334a45a8ff 448 #define MXC_F_AFE_CTRL1_REF_BANDGAP_SEL ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_REF_BANDGAP_SEL_POS))
bogdanm 0:9b334a45a8ff 449 #define MXC_F_AFE_CTRL1_REF_ADC_VOLT_SEL_POS 6
bogdanm 0:9b334a45a8ff 450 #define MXC_F_AFE_CTRL1_REF_ADC_VOLT_SEL ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL1_REF_ADC_VOLT_SEL_POS))
bogdanm 0:9b334a45a8ff 451 #define MXC_F_AFE_CTRL1_REF_DAC_VOLT_SEL_POS 8
bogdanm 0:9b334a45a8ff 452 #define MXC_F_AFE_CTRL1_REF_DAC_VOLT_SEL ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL1_REF_DAC_VOLT_SEL_POS))
bogdanm 0:9b334a45a8ff 453 #define MXC_F_AFE_CTRL1_REF_SEL_POS 10
bogdanm 0:9b334a45a8ff 454 #define MXC_F_AFE_CTRL1_REF_SEL ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_REF_SEL_POS))
bogdanm 0:9b334a45a8ff 455 #define MXC_F_AFE_CTRL1_REF_ADC_POWERUP_POS 11
bogdanm 0:9b334a45a8ff 456 #define MXC_F_AFE_CTRL1_REF_ADC_POWERUP ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_REF_ADC_POWERUP_POS))
bogdanm 0:9b334a45a8ff 457 #define MXC_F_AFE_CTRL1_REF_DAC_POWERUP_POS 12
bogdanm 0:9b334a45a8ff 458 #define MXC_F_AFE_CTRL1_REF_DAC_POWERUP ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_REF_DAC_POWERUP_POS))
bogdanm 0:9b334a45a8ff 459 #define MXC_F_AFE_CTRL1_REF_BLK_POWERUP_POS 13
bogdanm 0:9b334a45a8ff 460 #define MXC_F_AFE_CTRL1_REF_BLK_POWERUP ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_REF_BLK_POWERUP_POS))
bogdanm 0:9b334a45a8ff 461 #define MXC_F_AFE_CTRL1_REF_ADC_COMP_POS 14
bogdanm 0:9b334a45a8ff 462 #define MXC_F_AFE_CTRL1_REF_ADC_COMP ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_REF_ADC_COMP_POS))
bogdanm 0:9b334a45a8ff 463 #define MXC_F_AFE_CTRL1_REF_DAC_COMP_POS 15
bogdanm 0:9b334a45a8ff 464 #define MXC_F_AFE_CTRL1_REF_DAC_COMP ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_REF_DAC_COMP_POS))
bogdanm 0:9b334a45a8ff 465 #define MXC_F_AFE_CTRL1_REF_ADC_TEST_GAIN_POS 16
bogdanm 0:9b334a45a8ff 466 #define MXC_F_AFE_CTRL1_REF_ADC_TEST_GAIN ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL1_REF_ADC_TEST_GAIN_POS))
bogdanm 0:9b334a45a8ff 467 #define MXC_F_AFE_CTRL1_REF_DAC_TEST_GAIN_POS 18
bogdanm 0:9b334a45a8ff 468 #define MXC_F_AFE_CTRL1_REF_DAC_TEST_GAIN ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL1_REF_DAC_TEST_GAIN_POS))
bogdanm 0:9b334a45a8ff 469 #define MXC_F_AFE_CTRL1_ABUS_PAGE_2_0_POS 20
bogdanm 0:9b334a45a8ff 470 #define MXC_F_AFE_CTRL1_ABUS_PAGE_2_0 ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL1_ABUS_PAGE_2_0_POS))
bogdanm 0:9b334a45a8ff 471 #define MXC_F_AFE_CTRL1_PLL_TST_EN_POS 23
bogdanm 0:9b334a45a8ff 472 #define MXC_F_AFE_CTRL1_PLL_TST_EN ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_PLL_TST_EN_POS))
bogdanm 0:9b334a45a8ff 473 #define MXC_F_AFE_CTRL1_V1EXTADJ_POS 25
bogdanm 0:9b334a45a8ff 474 #define MXC_F_AFE_CTRL1_V1EXTADJ ((uint32_t)(0x0000001FUL << MXC_F_AFE_CTRL1_V1EXTADJ_POS))
bogdanm 0:9b334a45a8ff 475 #define MXC_F_AFE_CTRL1_TMON_CUR_SEL_POS 30
bogdanm 0:9b334a45a8ff 476 #define MXC_F_AFE_CTRL1_TMON_CUR_SEL ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL1_TMON_CUR_SEL_POS))
bogdanm 0:9b334a45a8ff 477
bogdanm 0:9b334a45a8ff 478 #define MXC_F_AFE_CTRL2_HYST_COMP0_POS 0
bogdanm 0:9b334a45a8ff 479 #define MXC_F_AFE_CTRL2_HYST_COMP0 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL2_HYST_COMP0_POS))
bogdanm 0:9b334a45a8ff 480 #define MXC_F_AFE_CTRL2_HYST_COMP1_POS 2
bogdanm 0:9b334a45a8ff 481 #define MXC_F_AFE_CTRL2_HYST_COMP1 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL2_HYST_COMP1_POS))
bogdanm 0:9b334a45a8ff 482 #define MXC_F_AFE_CTRL2_HYST_COMP2_POS 4
bogdanm 0:9b334a45a8ff 483 #define MXC_F_AFE_CTRL2_HYST_COMP2 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL2_HYST_COMP2_POS))
bogdanm 0:9b334a45a8ff 484 #define MXC_F_AFE_CTRL2_HYST_COMP3_POS 6
bogdanm 0:9b334a45a8ff 485 #define MXC_F_AFE_CTRL2_HYST_COMP3 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL2_HYST_COMP3_POS))
bogdanm 0:9b334a45a8ff 486 #define MXC_F_AFE_CTRL2_HY_POL_COMP0_POS 8
bogdanm 0:9b334a45a8ff 487 #define MXC_F_AFE_CTRL2_HY_POL_COMP0 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_HY_POL_COMP0_POS))
bogdanm 0:9b334a45a8ff 488 #define MXC_F_AFE_CTRL2_HY_POL_COMP1_POS 9
bogdanm 0:9b334a45a8ff 489 #define MXC_F_AFE_CTRL2_HY_POL_COMP1 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_HY_POL_COMP1_POS))
bogdanm 0:9b334a45a8ff 490 #define MXC_F_AFE_CTRL2_HY_POL_COMP2_POS 10
bogdanm 0:9b334a45a8ff 491 #define MXC_F_AFE_CTRL2_HY_POL_COMP2 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_HY_POL_COMP2_POS))
bogdanm 0:9b334a45a8ff 492 #define MXC_F_AFE_CTRL2_HY_POL_COMP3_POS 11
bogdanm 0:9b334a45a8ff 493 #define MXC_F_AFE_CTRL2_HY_POL_COMP3 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_HY_POL_COMP3_POS))
bogdanm 0:9b334a45a8ff 494 #define MXC_F_AFE_CTRL2_POWERUP_COMP0_POS 12
bogdanm 0:9b334a45a8ff 495 #define MXC_F_AFE_CTRL2_POWERUP_COMP0 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_POWERUP_COMP0_POS))
bogdanm 0:9b334a45a8ff 496 #define MXC_F_AFE_CTRL2_POWERUP_COMP1_POS 13
bogdanm 0:9b334a45a8ff 497 #define MXC_F_AFE_CTRL2_POWERUP_COMP1 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_POWERUP_COMP1_POS))
bogdanm 0:9b334a45a8ff 498 #define MXC_F_AFE_CTRL2_POWERUP_COMP2_POS 14
bogdanm 0:9b334a45a8ff 499 #define MXC_F_AFE_CTRL2_POWERUP_COMP2 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_POWERUP_COMP2_POS))
bogdanm 0:9b334a45a8ff 500 #define MXC_F_AFE_CTRL2_POWERUP_COMP3_POS 15
bogdanm 0:9b334a45a8ff 501 #define MXC_F_AFE_CTRL2_POWERUP_COMP3 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_POWERUP_COMP3_POS))
bogdanm 0:9b334a45a8ff 502 #define MXC_F_AFE_CTRL2_DACOUT_EN0_POS 16
bogdanm 0:9b334a45a8ff 503 #define MXC_F_AFE_CTRL2_DACOUT_EN0 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_DACOUT_EN0_POS))
bogdanm 0:9b334a45a8ff 504 #define MXC_F_AFE_CTRL2_DACOUT_EN1_POS 17
bogdanm 0:9b334a45a8ff 505 #define MXC_F_AFE_CTRL2_DACOUT_EN1 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_DACOUT_EN1_POS))
bogdanm 0:9b334a45a8ff 506 #define MXC_F_AFE_CTRL2_DACOUT_EN2_POS 18
bogdanm 0:9b334a45a8ff 507 #define MXC_F_AFE_CTRL2_DACOUT_EN2 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_DACOUT_EN2_POS))
bogdanm 0:9b334a45a8ff 508 #define MXC_F_AFE_CTRL2_DACOUT_EN3_POS 19
bogdanm 0:9b334a45a8ff 509 #define MXC_F_AFE_CTRL2_DACOUT_EN3 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_DACOUT_EN3_POS))
bogdanm 0:9b334a45a8ff 510 #define MXC_F_AFE_CTRL2_SCM_OR_SEL_POS 20
bogdanm 0:9b334a45a8ff 511 #define MXC_F_AFE_CTRL2_SCM_OR_SEL ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL2_SCM_OR_SEL_POS))
bogdanm 0:9b334a45a8ff 512 #define MXC_F_AFE_CTRL2_SNO_OR_SEL_POS 23
bogdanm 0:9b334a45a8ff 513 #define MXC_F_AFE_CTRL2_SNO_OR_SEL ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL2_SNO_OR_SEL_POS))
bogdanm 0:9b334a45a8ff 514 #define MXC_F_AFE_CTRL2_DAC0_SEL_POS 26
bogdanm 0:9b334a45a8ff 515 #define MXC_F_AFE_CTRL2_DAC0_SEL ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_DAC0_SEL_POS))
bogdanm 0:9b334a45a8ff 516 #define MXC_F_AFE_CTRL2_DAC1_SEL_POS 27
bogdanm 0:9b334a45a8ff 517 #define MXC_F_AFE_CTRL2_DAC1_SEL ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL2_DAC1_SEL_POS))
bogdanm 0:9b334a45a8ff 518
bogdanm 0:9b334a45a8ff 519 #define MXC_F_AFE_CTRL3_POWERUP_OPAMP0_POS 12
bogdanm 0:9b334a45a8ff 520 #define MXC_F_AFE_CTRL3_POWERUP_OPAMP0 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_POWERUP_OPAMP0_POS))
bogdanm 0:9b334a45a8ff 521 #define MXC_F_AFE_CTRL3_POWERUP_OPAMP1_POS 13
bogdanm 0:9b334a45a8ff 522 #define MXC_F_AFE_CTRL3_POWERUP_OPAMP1 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_POWERUP_OPAMP1_POS))
bogdanm 0:9b334a45a8ff 523 #define MXC_F_AFE_CTRL3_POWERUP_OPAMP2_POS 14
bogdanm 0:9b334a45a8ff 524 #define MXC_F_AFE_CTRL3_POWERUP_OPAMP2 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_POWERUP_OPAMP2_POS))
bogdanm 0:9b334a45a8ff 525 #define MXC_F_AFE_CTRL3_POWERUP_OPAMP3_POS 15
bogdanm 0:9b334a45a8ff 526 #define MXC_F_AFE_CTRL3_POWERUP_OPAMP3 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_POWERUP_OPAMP3_POS))
bogdanm 0:9b334a45a8ff 527 #define MXC_F_AFE_CTRL3_GND_SEL_OPAMP0_POS 16
bogdanm 0:9b334a45a8ff 528 #define MXC_F_AFE_CTRL3_GND_SEL_OPAMP0 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_GND_SEL_OPAMP0_POS))
bogdanm 0:9b334a45a8ff 529 #define MXC_F_AFE_CTRL3_GND_SEL_OPAMP1_POS 17
bogdanm 0:9b334a45a8ff 530 #define MXC_F_AFE_CTRL3_GND_SEL_OPAMP1 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_GND_SEL_OPAMP1_POS))
bogdanm 0:9b334a45a8ff 531 #define MXC_F_AFE_CTRL3_GND_SEL_OPAMP2_POS 18
bogdanm 0:9b334a45a8ff 532 #define MXC_F_AFE_CTRL3_GND_SEL_OPAMP2 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_GND_SEL_OPAMP2_POS))
bogdanm 0:9b334a45a8ff 533 #define MXC_F_AFE_CTRL3_GND_SEL_OPAMP3_POS 19
bogdanm 0:9b334a45a8ff 534 #define MXC_F_AFE_CTRL3_GND_SEL_OPAMP3 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_GND_SEL_OPAMP3_POS))
bogdanm 0:9b334a45a8ff 535 #define MXC_F_AFE_CTRL3_CLOSE_SPST0_POS 20
bogdanm 0:9b334a45a8ff 536 #define MXC_F_AFE_CTRL3_CLOSE_SPST0 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_CLOSE_SPST0_POS))
bogdanm 0:9b334a45a8ff 537 #define MXC_F_AFE_CTRL3_CLOSE_SPST1_POS 21
bogdanm 0:9b334a45a8ff 538 #define MXC_F_AFE_CTRL3_CLOSE_SPST1 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_CLOSE_SPST1_POS))
bogdanm 0:9b334a45a8ff 539 #define MXC_F_AFE_CTRL3_CLOSE_SPST2_POS 22
bogdanm 0:9b334a45a8ff 540 #define MXC_F_AFE_CTRL3_CLOSE_SPST2 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_CLOSE_SPST2_POS))
bogdanm 0:9b334a45a8ff 541 #define MXC_F_AFE_CTRL3_CLOSE_SPST3_POS 23
bogdanm 0:9b334a45a8ff 542 #define MXC_F_AFE_CTRL3_CLOSE_SPST3 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_CLOSE_SPST3_POS))
bogdanm 0:9b334a45a8ff 543 #define MXC_F_AFE_CTRL3_EN_PCH_OPAMP0_POS 24
bogdanm 0:9b334a45a8ff 544 #define MXC_F_AFE_CTRL3_EN_PCH_OPAMP0 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_EN_PCH_OPAMP0_POS))
bogdanm 0:9b334a45a8ff 545 #define MXC_F_AFE_CTRL3_EN_PCH_OPAMP1_POS 25
bogdanm 0:9b334a45a8ff 546 #define MXC_F_AFE_CTRL3_EN_PCH_OPAMP1 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_EN_PCH_OPAMP1_POS))
bogdanm 0:9b334a45a8ff 547 #define MXC_F_AFE_CTRL3_EN_PCH_OPAMP2_POS 26
bogdanm 0:9b334a45a8ff 548 #define MXC_F_AFE_CTRL3_EN_PCH_OPAMP2 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_EN_PCH_OPAMP2_POS))
bogdanm 0:9b334a45a8ff 549 #define MXC_F_AFE_CTRL3_EN_PCH_OPAMP3_POS 27
bogdanm 0:9b334a45a8ff 550 #define MXC_F_AFE_CTRL3_EN_PCH_OPAMP3 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_EN_PCH_OPAMP3_POS))
bogdanm 0:9b334a45a8ff 551 #define MXC_F_AFE_CTRL3_EN_NCH_OPAMP0_POS 28
bogdanm 0:9b334a45a8ff 552 #define MXC_F_AFE_CTRL3_EN_NCH_OPAMP0 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_EN_NCH_OPAMP0_POS))
bogdanm 0:9b334a45a8ff 553 #define MXC_F_AFE_CTRL3_EN_NCH_OPAMP1_POS 29
bogdanm 0:9b334a45a8ff 554 #define MXC_F_AFE_CTRL3_EN_NCH_OPAMP1 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_EN_NCH_OPAMP1_POS))
bogdanm 0:9b334a45a8ff 555 #define MXC_F_AFE_CTRL3_EN_NCH_OPAMP2_POS 30
bogdanm 0:9b334a45a8ff 556 #define MXC_F_AFE_CTRL3_EN_NCH_OPAMP2 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_EN_NCH_OPAMP2_POS))
bogdanm 0:9b334a45a8ff 557 #define MXC_F_AFE_CTRL3_EN_NCH_OPAMP3_POS 31
bogdanm 0:9b334a45a8ff 558 #define MXC_F_AFE_CTRL3_EN_NCH_OPAMP3 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL3_EN_NCH_OPAMP3_POS))
bogdanm 0:9b334a45a8ff 559
bogdanm 0:9b334a45a8ff 560 #define MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP0_POS 0
bogdanm 0:9b334a45a8ff 561 #define MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP0 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP0_POS))
bogdanm 0:9b334a45a8ff 562 #define MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP1_POS 2
bogdanm 0:9b334a45a8ff 563 #define MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP1 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP1_POS))
bogdanm 0:9b334a45a8ff 564 #define MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP2_POS 4
bogdanm 0:9b334a45a8ff 565 #define MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP2 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP2_POS))
bogdanm 0:9b334a45a8ff 566 #define MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP3_POS 6
bogdanm 0:9b334a45a8ff 567 #define MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP3 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_P_IN_SEL_OPAMP3_POS))
bogdanm 0:9b334a45a8ff 568 #define MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP0_POS 8
bogdanm 0:9b334a45a8ff 569 #define MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP0 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP0_POS))
bogdanm 0:9b334a45a8ff 570 #define MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP1_POS 10
bogdanm 0:9b334a45a8ff 571 #define MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP1 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP1_POS))
bogdanm 0:9b334a45a8ff 572 #define MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP2_POS 12
bogdanm 0:9b334a45a8ff 573 #define MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP2 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP2_POS))
bogdanm 0:9b334a45a8ff 574 #define MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP3_POS 14
bogdanm 0:9b334a45a8ff 575 #define MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP3 ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_N_IN_SEL_OPAMP3_POS))
bogdanm 0:9b334a45a8ff 576 #define MXC_F_AFE_CTRL4_DAC_SEL_A_POS 16
bogdanm 0:9b334a45a8ff 577 #define MXC_F_AFE_CTRL4_DAC_SEL_A ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_DAC_SEL_A_POS))
bogdanm 0:9b334a45a8ff 578 #define MXC_F_AFE_CTRL4_DAC_SEL_B_POS 18
bogdanm 0:9b334a45a8ff 579 #define MXC_F_AFE_CTRL4_DAC_SEL_B ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_DAC_SEL_B_POS))
bogdanm 0:9b334a45a8ff 580 #define MXC_F_AFE_CTRL4_DAC_SEL_C_POS 20
bogdanm 0:9b334a45a8ff 581 #define MXC_F_AFE_CTRL4_DAC_SEL_C ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_DAC_SEL_C_POS))
bogdanm 0:9b334a45a8ff 582 #define MXC_F_AFE_CTRL4_DAC_SEL_D_POS 22
bogdanm 0:9b334a45a8ff 583 #define MXC_F_AFE_CTRL4_DAC_SEL_D ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_DAC_SEL_D_POS))
bogdanm 0:9b334a45a8ff 584 #define MXC_F_AFE_CTRL4_NPAD_SEL_A_POS 24
bogdanm 0:9b334a45a8ff 585 #define MXC_F_AFE_CTRL4_NPAD_SEL_A ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_NPAD_SEL_A_POS))
bogdanm 0:9b334a45a8ff 586 #define MXC_F_AFE_CTRL4_NPAD_SEL_B_POS 26
bogdanm 0:9b334a45a8ff 587 #define MXC_F_AFE_CTRL4_NPAD_SEL_B ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_NPAD_SEL_B_POS))
bogdanm 0:9b334a45a8ff 588 #define MXC_F_AFE_CTRL4_NPAD_SEL_C_POS 28
bogdanm 0:9b334a45a8ff 589 #define MXC_F_AFE_CTRL4_NPAD_SEL_C ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_NPAD_SEL_C_POS))
bogdanm 0:9b334a45a8ff 590 #define MXC_F_AFE_CTRL4_NPAD_SEL_D_POS 30
bogdanm 0:9b334a45a8ff 591 #define MXC_F_AFE_CTRL4_NPAD_SEL_D ((uint32_t)(0x00000003UL << MXC_F_AFE_CTRL4_NPAD_SEL_D_POS))
bogdanm 0:9b334a45a8ff 592
bogdanm 0:9b334a45a8ff 593 #define MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP0_POS 0
bogdanm 0:9b334a45a8ff 594 #define MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP0 ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP0_POS))
bogdanm 0:9b334a45a8ff 595 #define MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP1_POS 3
bogdanm 0:9b334a45a8ff 596 #define MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP1 ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP1_POS))
bogdanm 0:9b334a45a8ff 597 #define MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP2_POS 6
bogdanm 0:9b334a45a8ff 598 #define MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP2 ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP2_POS))
bogdanm 0:9b334a45a8ff 599 #define MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP3_POS 9
bogdanm 0:9b334a45a8ff 600 #define MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP3 ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL5_P_IN_SEL_LP_COMP3_POS))
bogdanm 0:9b334a45a8ff 601 #define MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP0_POS 12
bogdanm 0:9b334a45a8ff 602 #define MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP0 ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP0_POS))
bogdanm 0:9b334a45a8ff 603 #define MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP1_POS 15
bogdanm 0:9b334a45a8ff 604 #define MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP1 ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP1_POS))
bogdanm 0:9b334a45a8ff 605 #define MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP2_POS 18
bogdanm 0:9b334a45a8ff 606 #define MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP2 ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP2_POS))
bogdanm 0:9b334a45a8ff 607 #define MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP3_POS 21
bogdanm 0:9b334a45a8ff 608 #define MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP3 ((uint32_t)(0x00000007UL << MXC_F_AFE_CTRL5_N_IN_SEL_LP_COMP3_POS))
bogdanm 0:9b334a45a8ff 609 #define MXC_F_AFE_CTRL5_OP_CMP0_POS 24
bogdanm 0:9b334a45a8ff 610 #define MXC_F_AFE_CTRL5_OP_CMP0 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL5_OP_CMP0_POS))
bogdanm 0:9b334a45a8ff 611 #define MXC_F_AFE_CTRL5_OP_CMP1_POS 25
bogdanm 0:9b334a45a8ff 612 #define MXC_F_AFE_CTRL5_OP_CMP1 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL5_OP_CMP1_POS))
bogdanm 0:9b334a45a8ff 613 #define MXC_F_AFE_CTRL5_OP_CMP2_POS 26
bogdanm 0:9b334a45a8ff 614 #define MXC_F_AFE_CTRL5_OP_CMP2 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL5_OP_CMP2_POS))
bogdanm 0:9b334a45a8ff 615 #define MXC_F_AFE_CTRL5_OP_CMP3_POS 27
bogdanm 0:9b334a45a8ff 616 #define MXC_F_AFE_CTRL5_OP_CMP3 ((uint32_t)(0x00000001UL << MXC_F_AFE_CTRL5_OP_CMP3_POS))
bogdanm 0:9b334a45a8ff 617
bogdanm 0:9b334a45a8ff 618 #ifdef __cplusplus
bogdanm 0:9b334a45a8ff 619 }
bogdanm 0:9b334a45a8ff 620 #endif
bogdanm 0:9b334a45a8ff 621
bogdanm 0:9b334a45a8ff 622 /**
bogdanm 0:9b334a45a8ff 623 * @}
bogdanm 0:9b334a45a8ff 624 */
bogdanm 0:9b334a45a8ff 625
bogdanm 0:9b334a45a8ff 626 #endif /* _MXC_AFE_REGS_H_ */