Johannes Stratmann / mbed-dev

added prescaler for 16 bit pwm in LPC1347 target

Fork of mbed-dev by mbed official

targets/cmsis/TARGET_Freescale/TARGET_MCU_K64F/TOOLCHAIN_GCC_ARM/startup_MK64F12.S@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* K64F startup ARM GCC
bogdanm 0:9b334a45a8ff 2 * Purpose: startup file for Cortex-M4 devices. Should use with
bogdanm 0:9b334a45a8ff 3 * GCC for ARM Embedded Processors
bogdanm 0:9b334a45a8ff 4 * Version: V1.2
bogdanm 0:9b334a45a8ff 5 * Date: 15 Nov 2011
bogdanm 0:9b334a45a8ff 6 *
bogdanm 0:9b334a45a8ff 7 * Copyright (c) 2011, ARM Limited
bogdanm 0:9b334a45a8ff 8 * All rights reserved.
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Redistribution and use in source and binary forms, with or without
bogdanm 0:9b334a45a8ff 11 * modification, are permitted provided that the following conditions are met:
bogdanm 0:9b334a45a8ff 12 * Redistributions of source code must retain the above copyright
bogdanm 0:9b334a45a8ff 13 notice, this list of conditions and the following disclaimer.
bogdanm 0:9b334a45a8ff 14 * Redistributions in binary form must reproduce the above copyright
bogdanm 0:9b334a45a8ff 15 notice, this list of conditions and the following disclaimer in the
bogdanm 0:9b334a45a8ff 16 documentation and/or other materials provided with the distribution.
bogdanm 0:9b334a45a8ff 17 * Neither the name of the ARM Limited nor the
bogdanm 0:9b334a45a8ff 18 names of its contributors may be used to endorse or promote products
bogdanm 0:9b334a45a8ff 19 derived from this software without specific prior written permission.
bogdanm 0:9b334a45a8ff 20 *
bogdanm 0:9b334a45a8ff 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
bogdanm 0:9b334a45a8ff 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
bogdanm 0:9b334a45a8ff 23 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm 0:9b334a45a8ff 24 * DISCLAIMED. IN NO EVENT SHALL ARM LIMITED BE LIABLE FOR ANY
bogdanm 0:9b334a45a8ff 25 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
bogdanm 0:9b334a45a8ff 26 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
bogdanm 0:9b334a45a8ff 27 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
bogdanm 0:9b334a45a8ff 28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
bogdanm 0:9b334a45a8ff 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
bogdanm 0:9b334a45a8ff 30 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm 0:9b334a45a8ff 31 */
bogdanm 0:9b334a45a8ff 32 .syntax unified
bogdanm 0:9b334a45a8ff 33 .arch armv7-m
bogdanm 0:9b334a45a8ff 34
bogdanm 0:9b334a45a8ff 35 /* Memory Model
bogdanm 0:9b334a45a8ff 36 The HEAP starts at the end of the DATA section and grows upward.
bogdanm 0:9b334a45a8ff 37
bogdanm 0:9b334a45a8ff 38 The STACK starts at the end of the RAM and grows downward.
bogdanm 0:9b334a45a8ff 39
bogdanm 0:9b334a45a8ff 40 The HEAP and stack STACK are only checked at compile time:
bogdanm 0:9b334a45a8ff 41 (DATA_SIZE + HEAP_SIZE + STACK_SIZE) < RAM_SIZE
bogdanm 0:9b334a45a8ff 42
bogdanm 0:9b334a45a8ff 43 This is just a check for the bare minimum for the Heap+Stack area before
bogdanm 0:9b334a45a8ff 44 aborting compilation, it is not the run time limit:
bogdanm 0:9b334a45a8ff 45 Heap_Size + Stack_Size = 0x80 + 0x80 = 0x100
bogdanm 0:9b334a45a8ff 46 */
bogdanm 0:9b334a45a8ff 47 .section .stack
bogdanm 0:9b334a45a8ff 48 .align 3
bogdanm 0:9b334a45a8ff 49 #ifdef __STACK_SIZE
bogdanm 0:9b334a45a8ff 50 .equ Stack_Size, __STACK_SIZE
bogdanm 0:9b334a45a8ff 51 #else
bogdanm 0:9b334a45a8ff 52 .equ Stack_Size, 0xC00
bogdanm 0:9b334a45a8ff 53 #endif
bogdanm 0:9b334a45a8ff 54 .globl __StackTop
bogdanm 0:9b334a45a8ff 55 .globl __StackLimit
bogdanm 0:9b334a45a8ff 56 __StackLimit:
bogdanm 0:9b334a45a8ff 57 .space Stack_Size
bogdanm 0:9b334a45a8ff 58 .size __StackLimit, . - __StackLimit
bogdanm 0:9b334a45a8ff 59 __StackTop:
bogdanm 0:9b334a45a8ff 60 .size __StackTop, . - __StackTop
bogdanm 0:9b334a45a8ff 61
bogdanm 0:9b334a45a8ff 62 .section .heap
bogdanm 0:9b334a45a8ff 63 .align 3
bogdanm 0:9b334a45a8ff 64 #ifdef __HEAP_SIZE
bogdanm 0:9b334a45a8ff 65 .equ Heap_Size, __HEAP_SIZE
bogdanm 0:9b334a45a8ff 66 #else
bogdanm 0:9b334a45a8ff 67 .equ Heap_Size, 0x400
bogdanm 0:9b334a45a8ff 68 #endif
bogdanm 0:9b334a45a8ff 69 .globl __HeapBase
bogdanm 0:9b334a45a8ff 70 .globl __HeapLimit
bogdanm 0:9b334a45a8ff 71 __HeapBase:
bogdanm 0:9b334a45a8ff 72 .space Heap_Size
bogdanm 0:9b334a45a8ff 73 .size __HeapBase, . - __HeapBase
bogdanm 0:9b334a45a8ff 74 __HeapLimit:
bogdanm 0:9b334a45a8ff 75 .size __HeapLimit, . - __HeapLimit
bogdanm 0:9b334a45a8ff 76
bogdanm 0:9b334a45a8ff 77 .section .vector_table,"a",%progbits
bogdanm 0:9b334a45a8ff 78 .align 2
bogdanm 0:9b334a45a8ff 79 .globl __isr_vector
bogdanm 0:9b334a45a8ff 80 __isr_vector:
bogdanm 0:9b334a45a8ff 81 .long __StackTop /* Top of Stack */
bogdanm 0:9b334a45a8ff 82 .long Reset_Handler /* Reset Handler */
bogdanm 0:9b334a45a8ff 83 .long NMI_Handler /* NMI Handler */
bogdanm 0:9b334a45a8ff 84 .long HardFault_Handler /* Hard Fault Handler */
bogdanm 0:9b334a45a8ff 85 .long MemManage_Handler /* MPU Fault Handler */
bogdanm 0:9b334a45a8ff 86 .long BusFault_Handler /* Bus Fault Handler */
bogdanm 0:9b334a45a8ff 87 .long UsageFault_Handler /* Usage Fault Handler */
bogdanm 0:9b334a45a8ff 88 .long 0 /* Reserved */
bogdanm 0:9b334a45a8ff 89 .long 0 /* Reserved */
bogdanm 0:9b334a45a8ff 90 .long 0 /* Reserved */
bogdanm 0:9b334a45a8ff 91 .long 0 /* Reserved */
bogdanm 0:9b334a45a8ff 92 .long SVC_Handler /* SVCall Handler */
bogdanm 0:9b334a45a8ff 93 .long DebugMon_Handler /* Debug Monitor Handler */
bogdanm 0:9b334a45a8ff 94 .long 0 /* Reserved */
bogdanm 0:9b334a45a8ff 95 .long PendSV_Handler /* PendSV Handler */
bogdanm 0:9b334a45a8ff 96 .long SysTick_Handler /* SysTick Handler */
bogdanm 0:9b334a45a8ff 97
bogdanm 0:9b334a45a8ff 98 /* External Interrupts */
bogdanm 0:9b334a45a8ff 99 .long DMA0_IRQHandler /* DMA Channel 0 Transfer Complete */
bogdanm 0:9b334a45a8ff 100 .long DMA1_IRQHandler /* DMA Channel 1 Transfer Complete */
bogdanm 0:9b334a45a8ff 101 .long DMA2_IRQHandler /* DMA Channel 2 Transfer Complete */
bogdanm 0:9b334a45a8ff 102 .long DMA3_IRQHandler /* DMA Channel 3 Transfer Complete */
bogdanm 0:9b334a45a8ff 103 .long DMA4_IRQHandler /* DMA Channel 4 Transfer Complete */
bogdanm 0:9b334a45a8ff 104 .long DMA5_IRQHandler /* DMA Channel 5 Transfer Complete */
bogdanm 0:9b334a45a8ff 105 .long DMA6_IRQHandler /* DMA Channel 6 Transfer Complete */
bogdanm 0:9b334a45a8ff 106 .long DMA7_IRQHandler /* DMA Channel 7 Transfer Complete */
bogdanm 0:9b334a45a8ff 107 .long DMA8_IRQHandler /* DMA Channel 8 Transfer Complete */
bogdanm 0:9b334a45a8ff 108 .long DMA9_IRQHandler /* DMA Channel 9 Transfer Complete */
bogdanm 0:9b334a45a8ff 109 .long DMA10_IRQHandler /* DMA Channel 10 Transfer Complete */
bogdanm 0:9b334a45a8ff 110 .long DMA11_IRQHandler /* DMA Channel 11 Transfer Complete */
bogdanm 0:9b334a45a8ff 111 .long DMA12_IRQHandler /* DMA Channel 12 Transfer Complete */
bogdanm 0:9b334a45a8ff 112 .long DMA13_IRQHandler /* DMA Channel 13 Transfer Complete */
bogdanm 0:9b334a45a8ff 113 .long DMA14_IRQHandler /* DMA Channel 14 Transfer Complete */
bogdanm 0:9b334a45a8ff 114 .long DMA15_IRQHandler /* DMA Channel 15 Transfer Complete */
bogdanm 0:9b334a45a8ff 115 .long DMA_Error_IRQHandler /* DMA Error Interrupt */
bogdanm 0:9b334a45a8ff 116 .long MCM_IRQHandler /* Normal Interrupt */
bogdanm 0:9b334a45a8ff 117 .long FTFE_IRQHandler /* FTFE Command complete interrupt */
bogdanm 0:9b334a45a8ff 118 .long Read_Collision_IRQHandler /* Read Collision Interrupt */
bogdanm 0:9b334a45a8ff 119 .long LVD_LVW_IRQHandler /* Low Voltage Detect, Low Voltage Warning */
bogdanm 0:9b334a45a8ff 120 .long LLW_IRQHandler /* Low Leakage Wakeup */
bogdanm 0:9b334a45a8ff 121 .long Watchdog_IRQHandler /* WDOG Interrupt */
bogdanm 0:9b334a45a8ff 122 .long RNG_IRQHandler /* RNG Interrupt */
bogdanm 0:9b334a45a8ff 123 .long I2C0_IRQHandler /* I2C0 interrupt */
bogdanm 0:9b334a45a8ff 124 .long I2C1_IRQHandler /* I2C1 interrupt */
bogdanm 0:9b334a45a8ff 125 .long SPI0_IRQHandler /* SPI0 Interrupt */
bogdanm 0:9b334a45a8ff 126 .long SPI1_IRQHandler /* SPI1 Interrupt */
bogdanm 0:9b334a45a8ff 127 .long I2S0_Tx_IRQHandler /* I2S0 transmit interrupt */
bogdanm 0:9b334a45a8ff 128 .long I2S0_Rx_IRQHandler /* I2S0 receive interrupt */
bogdanm 0:9b334a45a8ff 129 .long UART0_LON_IRQHandler /* UART0 LON interrupt */
bogdanm 0:9b334a45a8ff 130 .long UART0_RX_TX_IRQHandler /* UART0 Receive/Transmit interrupt */
bogdanm 0:9b334a45a8ff 131 .long UART0_ERR_IRQHandler /* UART0 Error interrupt */
bogdanm 0:9b334a45a8ff 132 .long UART1_RX_TX_IRQHandler /* UART1 Receive/Transmit interrupt */
bogdanm 0:9b334a45a8ff 133 .long UART1_ERR_IRQHandler /* UART1 Error interrupt */
bogdanm 0:9b334a45a8ff 134 .long UART2_RX_TX_IRQHandler /* UART2 Receive/Transmit interrupt */
bogdanm 0:9b334a45a8ff 135 .long UART2_ERR_IRQHandler /* UART2 Error interrupt */
bogdanm 0:9b334a45a8ff 136 .long UART3_RX_TX_IRQHandler /* UART3 Receive/Transmit interrupt */
bogdanm 0:9b334a45a8ff 137 .long UART3_ERR_IRQHandler /* UART3 Error interrupt */
bogdanm 0:9b334a45a8ff 138 .long ADC0_IRQHandler /* ADC0 interrupt */
bogdanm 0:9b334a45a8ff 139 .long CMP0_IRQHandler /* CMP0 interrupt */
bogdanm 0:9b334a45a8ff 140 .long CMP1_IRQHandler /* CMP1 interrupt */
bogdanm 0:9b334a45a8ff 141 .long FTM0_IRQHandler /* FTM0 fault, overflow and channels interrupt */
bogdanm 0:9b334a45a8ff 142 .long FTM1_IRQHandler /* FTM1 fault, overflow and channels interrupt */
bogdanm 0:9b334a45a8ff 143 .long FTM2_IRQHandler /* FTM2 fault, overflow and channels interrupt */
bogdanm 0:9b334a45a8ff 144 .long CMT_IRQHandler /* CMT interrupt */
bogdanm 0:9b334a45a8ff 145 .long RTC_IRQHandler /* RTC interrupt */
bogdanm 0:9b334a45a8ff 146 .long RTC_Seconds_IRQHandler /* RTC seconds interrupt */
bogdanm 0:9b334a45a8ff 147 .long PIT0_IRQHandler /* PIT timer channel 0 interrupt */
bogdanm 0:9b334a45a8ff 148 .long PIT1_IRQHandler /* PIT timer channel 1 interrupt */
bogdanm 0:9b334a45a8ff 149 .long PIT2_IRQHandler /* PIT timer channel 2 interrupt */
bogdanm 0:9b334a45a8ff 150 .long PIT3_IRQHandler /* PIT timer channel 3 interrupt */
bogdanm 0:9b334a45a8ff 151 .long PDB0_IRQHandler /* PDB0 Interrupt */
bogdanm 0:9b334a45a8ff 152 .long USB0_IRQHandler /* USB0 interrupt */
bogdanm 0:9b334a45a8ff 153 .long USBDCD_IRQHandler /* USBDCD Interrupt */
bogdanm 0:9b334a45a8ff 154 .long Reserved71_IRQHandler /* Reserved interrupt 71 */
bogdanm 0:9b334a45a8ff 155 .long DAC0_IRQHandler /* DAC0 interrupt */
bogdanm 0:9b334a45a8ff 156 .long MCG_IRQHandler /* MCG Interrupt */
bogdanm 0:9b334a45a8ff 157 .long LPTimer_IRQHandler /* LPTimer interrupt */
bogdanm 0:9b334a45a8ff 158 .long PORTA_IRQHandler /* Port A interrupt */
bogdanm 0:9b334a45a8ff 159 .long PORTB_IRQHandler /* Port B interrupt */
bogdanm 0:9b334a45a8ff 160 .long PORTC_IRQHandler /* Port C interrupt */
bogdanm 0:9b334a45a8ff 161 .long PORTD_IRQHandler /* Port D interrupt */
bogdanm 0:9b334a45a8ff 162 .long PORTE_IRQHandler /* Port E interrupt */
bogdanm 0:9b334a45a8ff 163 .long SWI_IRQHandler /* Software interrupt */
bogdanm 0:9b334a45a8ff 164 .long SPI2_IRQHandler /* SPI2 Interrupt */
bogdanm 0:9b334a45a8ff 165 .long UART4_RX_TX_IRQHandler /* UART4 Receive/Transmit interrupt */
bogdanm 0:9b334a45a8ff 166 .long UART4_ERR_IRQHandler /* UART4 Error interrupt */
bogdanm 0:9b334a45a8ff 167 .long UART5_RX_TX_IRQHandler /* UART5 Receive/Transmit interrupt */
bogdanm 0:9b334a45a8ff 168 .long UART5_ERR_IRQHandler /* UART5 Error interrupt */
bogdanm 0:9b334a45a8ff 169 .long CMP2_IRQHandler /* CMP2 interrupt */
bogdanm 0:9b334a45a8ff 170 .long FTM3_IRQHandler /* FTM3 fault, overflow and channels interrupt */
bogdanm 0:9b334a45a8ff 171 .long DAC1_IRQHandler /* DAC1 interrupt */
bogdanm 0:9b334a45a8ff 172 .long ADC1_IRQHandler /* ADC1 interrupt */
bogdanm 0:9b334a45a8ff 173 .long I2C2_IRQHandler /* I2C2 interrupt */
bogdanm 0:9b334a45a8ff 174 .long CAN0_ORed_Message_buffer_IRQHandler /* CAN0 OR'd message buffers interrupt */
bogdanm 0:9b334a45a8ff 175 .long CAN0_Bus_Off_IRQHandler /* CAN0 bus off interrupt */
bogdanm 0:9b334a45a8ff 176 .long CAN0_Error_IRQHandler /* CAN0 error interrupt */
bogdanm 0:9b334a45a8ff 177 .long CAN0_Tx_Warning_IRQHandler /* CAN0 Tx warning interrupt */
bogdanm 0:9b334a45a8ff 178 .long CAN0_Rx_Warning_IRQHandler /* CAN0 Rx warning interrupt */
bogdanm 0:9b334a45a8ff 179 .long CAN0_Wake_Up_IRQHandler /* CAN0 wake up interrupt */
bogdanm 0:9b334a45a8ff 180 .long SDHC_IRQHandler /* SDHC interrupt */
bogdanm 0:9b334a45a8ff 181 .long ENET_1588_Timer_IRQHandler /* Ethernet MAC IEEE 1588 Timer Interrupt */
bogdanm 0:9b334a45a8ff 182 .long ENET_Transmit_IRQHandler /* Ethernet MAC Transmit Interrupt */
bogdanm 0:9b334a45a8ff 183 .long ENET_Receive_IRQHandler /* Ethernet MAC Receive Interrupt */
bogdanm 0:9b334a45a8ff 184 .long ENET_Error_IRQHandler /* Ethernet MAC Error and miscelaneous Interrupt */
bogdanm 0:9b334a45a8ff 185
bogdanm 0:9b334a45a8ff 186 .size __isr_vector, . - __isr_vector
bogdanm 0:9b334a45a8ff 187
bogdanm 0:9b334a45a8ff 188 .section .text.Reset_Handler
bogdanm 0:9b334a45a8ff 189 .thumb
bogdanm 0:9b334a45a8ff 190 .thumb_func
bogdanm 0:9b334a45a8ff 191 .align 2
bogdanm 0:9b334a45a8ff 192 .globl Reset_Handler
bogdanm 0:9b334a45a8ff 193 .type Reset_Handler, %function
bogdanm 0:9b334a45a8ff 194 Reset_Handler:
bogdanm 0:9b334a45a8ff 195 /* Loop to copy data from read only memory to RAM. The ranges
bogdanm 0:9b334a45a8ff 196 * of copy from/to are specified by following symbols evaluated in
bogdanm 0:9b334a45a8ff 197 * linker script.
bogdanm 0:9b334a45a8ff 198 * __etext: End of code section, i.e., begin of data sections to copy from.
bogdanm 0:9b334a45a8ff 199 * __data_start__/__data_end__: RAM address range that data should be
bogdanm 0:9b334a45a8ff 200 * copied to. Both must be aligned to 4 bytes boundary. */
bogdanm 0:9b334a45a8ff 201
bogdanm 0:9b334a45a8ff 202 disable_watchdog:
bogdanm 0:9b334a45a8ff 203 /* unlock */
bogdanm 0:9b334a45a8ff 204 ldr r1, =0x4005200e
bogdanm 0:9b334a45a8ff 205 ldr r0, =0xc520
bogdanm 0:9b334a45a8ff 206 strh r0, [r1]
bogdanm 0:9b334a45a8ff 207 ldr r0, =0xd928
bogdanm 0:9b334a45a8ff 208 strh r0, [r1]
bogdanm 0:9b334a45a8ff 209 /* disable */
bogdanm 0:9b334a45a8ff 210 ldr r1, =0x40052000
bogdanm 0:9b334a45a8ff 211 ldr r0, =0x01d2
bogdanm 0:9b334a45a8ff 212 strh r0, [r1]
bogdanm 0:9b334a45a8ff 213
bogdanm 0:9b334a45a8ff 214 ldr r1, =__etext
bogdanm 0:9b334a45a8ff 215 ldr r2, =__data_start__
bogdanm 0:9b334a45a8ff 216 ldr r3, =__data_end__
bogdanm 0:9b334a45a8ff 217
bogdanm 0:9b334a45a8ff 218 subs r3, r2
bogdanm 0:9b334a45a8ff 219 ble .Lflash_to_ram_loop_end
bogdanm 0:9b334a45a8ff 220
bogdanm 0:9b334a45a8ff 221 movs r4, 0
bogdanm 0:9b334a45a8ff 222 .Lflash_to_ram_loop:
bogdanm 0:9b334a45a8ff 223 ldr r0, [r1,r4]
bogdanm 0:9b334a45a8ff 224 str r0, [r2,r4]
bogdanm 0:9b334a45a8ff 225 adds r4, 4
bogdanm 0:9b334a45a8ff 226 cmp r4, r3
bogdanm 0:9b334a45a8ff 227 blt .Lflash_to_ram_loop
bogdanm 0:9b334a45a8ff 228 .Lflash_to_ram_loop_end:
bogdanm 0:9b334a45a8ff 229
bogdanm 0:9b334a45a8ff 230 ldr r0, =SystemInit
bogdanm 0:9b334a45a8ff 231 blx r0
bogdanm 0:9b334a45a8ff 232 ldr r0, =_start
bogdanm 0:9b334a45a8ff 233 bx r0
bogdanm 0:9b334a45a8ff 234 .pool
bogdanm 0:9b334a45a8ff 235 .size Reset_Handler, . - Reset_Handler
bogdanm 0:9b334a45a8ff 236
bogdanm 0:9b334a45a8ff 237 .text
bogdanm 0:9b334a45a8ff 238 /* Macro to define default handlers. Default handler
bogdanm 0:9b334a45a8ff 239 * will be weak symbol and just dead loops. They can be
bogdanm 0:9b334a45a8ff 240 * overwritten by other handlers */
bogdanm 0:9b334a45a8ff 241 .macro def_default_handler handler_name
bogdanm 0:9b334a45a8ff 242 .align 1
bogdanm 0:9b334a45a8ff 243 .thumb_func
bogdanm 0:9b334a45a8ff 244 .weak \handler_name
bogdanm 0:9b334a45a8ff 245 .type \handler_name, %function
bogdanm 0:9b334a45a8ff 246 \handler_name :
bogdanm 0:9b334a45a8ff 247 b .
bogdanm 0:9b334a45a8ff 248 .size \handler_name, . - \handler_name
bogdanm 0:9b334a45a8ff 249 .endm
bogdanm 0:9b334a45a8ff 250
bogdanm 0:9b334a45a8ff 251 /* Exception Handlers */
bogdanm 0:9b334a45a8ff 252
bogdanm 0:9b334a45a8ff 253 def_default_handler NMI_Handler
bogdanm 0:9b334a45a8ff 254 def_default_handler HardFault_Handler
bogdanm 0:9b334a45a8ff 255 def_default_handler MemManage_Handler
bogdanm 0:9b334a45a8ff 256 def_default_handler BusFault_Handler
bogdanm 0:9b334a45a8ff 257 def_default_handler UsageFault_Handler
bogdanm 0:9b334a45a8ff 258 def_default_handler SVC_Handler
bogdanm 0:9b334a45a8ff 259 def_default_handler DebugMon_Handler
bogdanm 0:9b334a45a8ff 260 def_default_handler PendSV_Handler
bogdanm 0:9b334a45a8ff 261 def_default_handler SysTick_Handler
bogdanm 0:9b334a45a8ff 262 def_default_handler Default_Handler
bogdanm 0:9b334a45a8ff 263
bogdanm 0:9b334a45a8ff 264 .macro def_irq_default_handler handler_name
bogdanm 0:9b334a45a8ff 265 .weak \handler_name
bogdanm 0:9b334a45a8ff 266 .set \handler_name, Default_Handler
bogdanm 0:9b334a45a8ff 267 .endm
bogdanm 0:9b334a45a8ff 268
bogdanm 0:9b334a45a8ff 269 /* IRQ Handlers */
bogdanm 0:9b334a45a8ff 270 def_irq_default_handler DMA0_IRQHandler
bogdanm 0:9b334a45a8ff 271 def_irq_default_handler DMA1_IRQHandler
bogdanm 0:9b334a45a8ff 272 def_irq_default_handler DMA2_IRQHandler
bogdanm 0:9b334a45a8ff 273 def_irq_default_handler DMA3_IRQHandler
bogdanm 0:9b334a45a8ff 274 def_irq_default_handler DMA4_IRQHandler
bogdanm 0:9b334a45a8ff 275 def_irq_default_handler DMA5_IRQHandler
bogdanm 0:9b334a45a8ff 276 def_irq_default_handler DMA6_IRQHandler
bogdanm 0:9b334a45a8ff 277 def_irq_default_handler DMA7_IRQHandler
bogdanm 0:9b334a45a8ff 278 def_irq_default_handler DMA8_IRQHandler
bogdanm 0:9b334a45a8ff 279 def_irq_default_handler DMA9_IRQHandler
bogdanm 0:9b334a45a8ff 280 def_irq_default_handler DMA10_IRQHandler
bogdanm 0:9b334a45a8ff 281 def_irq_default_handler DMA11_IRQHandler
bogdanm 0:9b334a45a8ff 282 def_irq_default_handler DMA12_IRQHandler
bogdanm 0:9b334a45a8ff 283 def_irq_default_handler DMA13_IRQHandler
bogdanm 0:9b334a45a8ff 284 def_irq_default_handler DMA14_IRQHandler
bogdanm 0:9b334a45a8ff 285 def_irq_default_handler DMA15_IRQHandler
bogdanm 0:9b334a45a8ff 286 def_irq_default_handler DMA_Error_IRQHandler
bogdanm 0:9b334a45a8ff 287 def_irq_default_handler MCM_IRQHandler
bogdanm 0:9b334a45a8ff 288 def_irq_default_handler FTFE_IRQHandler
bogdanm 0:9b334a45a8ff 289 def_irq_default_handler Read_Collision_IRQHandler
bogdanm 0:9b334a45a8ff 290 def_irq_default_handler LVD_LVW_IRQHandler
bogdanm 0:9b334a45a8ff 291 def_irq_default_handler LLW_IRQHandler
bogdanm 0:9b334a45a8ff 292 def_irq_default_handler Watchdog_IRQHandler
bogdanm 0:9b334a45a8ff 293 def_irq_default_handler RNG_IRQHandler
bogdanm 0:9b334a45a8ff 294 def_irq_default_handler I2C0_IRQHandler
bogdanm 0:9b334a45a8ff 295 def_irq_default_handler I2C1_IRQHandler
bogdanm 0:9b334a45a8ff 296 def_irq_default_handler SPI0_IRQHandler
bogdanm 0:9b334a45a8ff 297 def_irq_default_handler SPI1_IRQHandler
bogdanm 0:9b334a45a8ff 298 def_irq_default_handler I2S0_Tx_IRQHandler
bogdanm 0:9b334a45a8ff 299 def_irq_default_handler I2S0_Rx_IRQHandler
bogdanm 0:9b334a45a8ff 300 def_irq_default_handler UART0_LON_IRQHandler
bogdanm 0:9b334a45a8ff 301 def_irq_default_handler UART0_RX_TX_IRQHandler
bogdanm 0:9b334a45a8ff 302 def_irq_default_handler UART0_ERR_IRQHandler
bogdanm 0:9b334a45a8ff 303 def_irq_default_handler UART1_RX_TX_IRQHandler
bogdanm 0:9b334a45a8ff 304 def_irq_default_handler UART1_ERR_IRQHandler
bogdanm 0:9b334a45a8ff 305 def_irq_default_handler UART2_RX_TX_IRQHandler
bogdanm 0:9b334a45a8ff 306 def_irq_default_handler UART2_ERR_IRQHandler
bogdanm 0:9b334a45a8ff 307 def_irq_default_handler UART3_RX_TX_IRQHandler
bogdanm 0:9b334a45a8ff 308 def_irq_default_handler UART3_ERR_IRQHandler
bogdanm 0:9b334a45a8ff 309 def_irq_default_handler ADC0_IRQHandler
bogdanm 0:9b334a45a8ff 310 def_irq_default_handler CMP0_IRQHandler
bogdanm 0:9b334a45a8ff 311 def_irq_default_handler CMP1_IRQHandler
bogdanm 0:9b334a45a8ff 312 def_irq_default_handler FTM0_IRQHandler
bogdanm 0:9b334a45a8ff 313 def_irq_default_handler FTM1_IRQHandler
bogdanm 0:9b334a45a8ff 314 def_irq_default_handler FTM2_IRQHandler
bogdanm 0:9b334a45a8ff 315 def_irq_default_handler CMT_IRQHandler
bogdanm 0:9b334a45a8ff 316 def_irq_default_handler RTC_IRQHandler
bogdanm 0:9b334a45a8ff 317 def_irq_default_handler RTC_Seconds_IRQHandler
bogdanm 0:9b334a45a8ff 318 def_irq_default_handler PIT0_IRQHandler
bogdanm 0:9b334a45a8ff 319 def_irq_default_handler PIT1_IRQHandler
bogdanm 0:9b334a45a8ff 320 def_irq_default_handler PIT2_IRQHandler
bogdanm 0:9b334a45a8ff 321 def_irq_default_handler PIT3_IRQHandler
bogdanm 0:9b334a45a8ff 322 def_irq_default_handler PDB0_IRQHandler
bogdanm 0:9b334a45a8ff 323 def_irq_default_handler USB0_IRQHandler
bogdanm 0:9b334a45a8ff 324 def_irq_default_handler USBDCD_IRQHandler
bogdanm 0:9b334a45a8ff 325 def_irq_default_handler Reserved71_IRQHandler
bogdanm 0:9b334a45a8ff 326 def_irq_default_handler DAC0_IRQHandler
bogdanm 0:9b334a45a8ff 327 def_irq_default_handler MCG_IRQHandler
bogdanm 0:9b334a45a8ff 328 def_irq_default_handler LPTimer_IRQHandler
bogdanm 0:9b334a45a8ff 329 def_irq_default_handler PORTA_IRQHandler
bogdanm 0:9b334a45a8ff 330 def_irq_default_handler PORTB_IRQHandler
bogdanm 0:9b334a45a8ff 331 def_irq_default_handler PORTC_IRQHandler
bogdanm 0:9b334a45a8ff 332 def_irq_default_handler PORTD_IRQHandler
bogdanm 0:9b334a45a8ff 333 def_irq_default_handler PORTE_IRQHandler
bogdanm 0:9b334a45a8ff 334 def_irq_default_handler SWI_IRQHandler
bogdanm 0:9b334a45a8ff 335 def_irq_default_handler SPI2_IRQHandler
bogdanm 0:9b334a45a8ff 336 def_irq_default_handler UART4_RX_TX_IRQHandler
bogdanm 0:9b334a45a8ff 337 def_irq_default_handler UART4_ERR_IRQHandler
bogdanm 0:9b334a45a8ff 338 def_irq_default_handler UART5_RX_TX_IRQHandler
bogdanm 0:9b334a45a8ff 339 def_irq_default_handler UART5_ERR_IRQHandler
bogdanm 0:9b334a45a8ff 340 def_irq_default_handler CMP2_IRQHandler
bogdanm 0:9b334a45a8ff 341 def_irq_default_handler FTM3_IRQHandler
bogdanm 0:9b334a45a8ff 342 def_irq_default_handler DAC1_IRQHandler
bogdanm 0:9b334a45a8ff 343 def_irq_default_handler ADC1_IRQHandler
bogdanm 0:9b334a45a8ff 344 def_irq_default_handler I2C2_IRQHandler
bogdanm 0:9b334a45a8ff 345 def_irq_default_handler CAN0_ORed_Message_buffer_IRQHandler
bogdanm 0:9b334a45a8ff 346 def_irq_default_handler CAN0_Bus_Off_IRQHandler
bogdanm 0:9b334a45a8ff 347 def_irq_default_handler CAN0_Error_IRQHandler
bogdanm 0:9b334a45a8ff 348 def_irq_default_handler CAN0_Tx_Warning_IRQHandler
bogdanm 0:9b334a45a8ff 349 def_irq_default_handler CAN0_Rx_Warning_IRQHandler
bogdanm 0:9b334a45a8ff 350 def_irq_default_handler CAN0_Wake_Up_IRQHandler
bogdanm 0:9b334a45a8ff 351 def_irq_default_handler SDHC_IRQHandler
bogdanm 0:9b334a45a8ff 352 def_irq_default_handler ENET_1588_Timer_IRQHandler
bogdanm 0:9b334a45a8ff 353 def_irq_default_handler ENET_Transmit_IRQHandler
bogdanm 0:9b334a45a8ff 354 def_irq_default_handler ENET_Receive_IRQHandler
bogdanm 0:9b334a45a8ff 355 def_irq_default_handler ENET_Error_IRQHandler
bogdanm 0:9b334a45a8ff 356 def_irq_default_handler DefaultISR
bogdanm 0:9b334a45a8ff 357
bogdanm 0:9b334a45a8ff 358 /* Flash protection region, placed at 0x400 */
bogdanm 0:9b334a45a8ff 359 .text
bogdanm 0:9b334a45a8ff 360 .thumb
bogdanm 0:9b334a45a8ff 361 .align 2
bogdanm 0:9b334a45a8ff 362 .section .kinetis_flash_config_field,"a",%progbits
bogdanm 0:9b334a45a8ff 363 kinetis_flash_config:
bogdanm 0:9b334a45a8ff 364 .long 0xffffffff
bogdanm 0:9b334a45a8ff 365 .long 0xffffffff
bogdanm 0:9b334a45a8ff 366 .long 0xffffffff
bogdanm 0:9b334a45a8ff 367 .long 0xfffffdfe
bogdanm 0:9b334a45a8ff 368
bogdanm 0:9b334a45a8ff 369 .end