Fast SPI write, added LPC812 Target

Dependents:   wsDrive

Fork of BurstSPI by Erik -

Committer:
JojoS
Date:
Sat Dec 10 14:30:26 2016 +0000
Revision:
15:8241b7d84ad2
Parent:
13:bc069279eb37
support for STM32F4

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Sissors 13:bc069279eb37 1 #if defined(TARGET_STM32F4)
Sissors 13:bc069279eb37 2 #include "BurstSPI.h"
JojoS 15:8241b7d84ad2 3
JojoS 15:8241b7d84ad2 4 #if DEVICE_SPI_ASYNCH
JojoS 15:8241b7d84ad2 5 #define SPI_INST(obj) ((SPI_TypeDef *)((obj)->spi.spi))
JojoS 15:8241b7d84ad2 6 #else
JojoS 15:8241b7d84ad2 7 #define SPI_INST(obj) ((SPI_TypeDef *)((obj)->spi))
JojoS 15:8241b7d84ad2 8 #endif
JojoS 15:8241b7d84ad2 9
Sissors 13:bc069279eb37 10 void BurstSPI::fastWrite(int data) {
JojoS 15:8241b7d84ad2 11 SPI_TypeDef *spi = SPI_INST(&_spi);
Sissors 13:bc069279eb37 12 // Check if data is transmitted
Sissors 13:bc069279eb37 13 while ((spi->SR & SPI_SR_TXE) == 0);
Sissors 13:bc069279eb37 14 spi->DR = data;
Sissors 13:bc069279eb37 15 }
Sissors 13:bc069279eb37 16
Sissors 13:bc069279eb37 17 void BurstSPI::clearRX( void ) {
Sissors 13:bc069279eb37 18 //Check if the RX buffer is busy
JojoS 15:8241b7d84ad2 19 SPI_TypeDef *spi = SPI_INST(&_spi);
Sissors 13:bc069279eb37 20 //While busy, keep checking
Sissors 13:bc069279eb37 21 while (spi->SR & SPI_SR_BSY){
Sissors 13:bc069279eb37 22 // Check RX buffer readable
Sissors 13:bc069279eb37 23 while ((spi->SR & SPI_SR_RXNE) == 0);
Sissors 13:bc069279eb37 24 int dummy = spi->DR;
Sissors 13:bc069279eb37 25 }
Sissors 13:bc069279eb37 26 }
Sissors 13:bc069279eb37 27 #endif
Sissors 13:bc069279eb37 28