Fast SPI write, added LPC812 Target
Fork of BurstSPI by
BurstSPI.h@15:8241b7d84ad2, 2016-12-10 (annotated)
- Committer:
- JojoS
- Date:
- Sat Dec 10 14:30:26 2016 +0000
- Revision:
- 15:8241b7d84ad2
- Parent:
- 14:83e3b8ba3f43
support for STM32F4
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
Sissors | 0:600eecd89a78 | 1 | #ifndef BURSTSPI_H |
Sissors | 0:600eecd89a78 | 2 | #define BURSTSPI_H |
Sissors | 0:600eecd89a78 | 3 | |
Sissors | 0:600eecd89a78 | 4 | #include "mbed.h" |
Sissors | 0:600eecd89a78 | 5 | |
JojoS | 14:83e3b8ba3f43 | 6 | // this define is for compatibility of LPC15xx or LPC8xx SPI |
JojoS | 14:83e3b8ba3f43 | 7 | // if not defined, the fastWrite() sets the EOT flag after transmission. Then the MOSI line is set high (or high Imp?) |
JojoS | 14:83e3b8ba3f43 | 8 | // This is not the same behaviour as with older SPI hardware. |
JojoS | 14:83e3b8ba3f43 | 9 | // For use in standard SPI this may be ok, for use as NRZ driver as in wsLib (driver for WS2812 LED) the EOT must not be set. |
JojoS | 14:83e3b8ba3f43 | 10 | #define NO_EOT_AFTER_WRITE |
Sissors | 0:600eecd89a78 | 11 | |
Sissors | 0:600eecd89a78 | 12 | /** An SPI Master, used for communicating with SPI slave devices at very high speeds |
Sissors | 0:600eecd89a78 | 13 | * |
frankvnk | 2:a8e55f7cbfee | 14 | * The default mbed SPI class allows for communication via the SPI bus at high clock frequencies, |
frankvnk | 2:a8e55f7cbfee | 15 | * however at these frequencies there is alot of overhead from the mbed code. |
frankvnk | 2:a8e55f7cbfee | 16 | * While this code makes sure your code is alot more robust, it is also relative slow. |
frankvnk | 2:a8e55f7cbfee | 17 | * This library adds to your default SPI commands some extra commands to transmit data rapidly with |
frankvnk | 2:a8e55f7cbfee | 18 | * very little overhead. Downsides are that currently it is TX only (all RX packets are discarded), |
frankvnk | 2:a8e55f7cbfee | 19 | * and it requires some extra commands. |
Sissors | 0:600eecd89a78 | 20 | * |
Sissors | 0:600eecd89a78 | 21 | * Example: |
Sissors | 0:600eecd89a78 | 22 | * @code |
Sissors | 0:600eecd89a78 | 23 | * //Send 1000 SPI packets as fast as possible |
Sissors | 0:600eecd89a78 | 24 | * spi.setFormat(); |
Sissors | 0:600eecd89a78 | 25 | * for (int i = 0; i<1000; i++) |
Sissors | 0:600eecd89a78 | 26 | * spi.fastWrite(data[i]); |
Sissors | 0:600eecd89a78 | 27 | * spi.clearRX(); |
Sissors | 0:600eecd89a78 | 28 | * @endcode |
Sissors | 0:600eecd89a78 | 29 | * |
frankvnk | 2:a8e55f7cbfee | 30 | * As an example, writing 76,800 16-bit data packets to an LCD screen at 48MHz requires 111ms with |
frankvnk | 2:a8e55f7cbfee | 31 | * the normal mbed library. With this library it takes 25ms, which is also the theoretical |
Sissors | 0:600eecd89a78 | 32 | * amount of time it should take. If you are running at 1MHz this will do alot less. |
Sissors | 0:600eecd89a78 | 33 | */ |
Sissors | 3:7d9b64d67b22 | 34 | class BurstSPI : public SPI |
Sissors | 3:7d9b64d67b22 | 35 | { |
Sissors | 0:600eecd89a78 | 36 | public: |
Sissors | 0:600eecd89a78 | 37 | /** Create a SPI master connected to the specified pins |
Sissors | 0:600eecd89a78 | 38 | * |
Sissors | 0:600eecd89a78 | 39 | * Pin Options: |
Sissors | 0:600eecd89a78 | 40 | * (5, 6, 7) or (11, 12, 13) |
Sissors | 0:600eecd89a78 | 41 | * |
Sissors | 0:600eecd89a78 | 42 | * mosi or miso can be specfied as NC if not used |
Sissors | 0:600eecd89a78 | 43 | * |
Sissors | 0:600eecd89a78 | 44 | * @param mosi SPI Master Out, Slave In pin |
Sissors | 0:600eecd89a78 | 45 | * @param miso SPI Master In, Slave Out pin |
Sissors | 0:600eecd89a78 | 46 | * @param sclk SPI Clock pin |
Sissors | 0:600eecd89a78 | 47 | */ |
Sissors | 3:7d9b64d67b22 | 48 | BurstSPI(PinName mosi, PinName miso, PinName sclk) : SPI(mosi, miso, sclk) {}; |
Sissors | 0:600eecd89a78 | 49 | |
Sissors | 0:600eecd89a78 | 50 | /** Put data packet in the SPI TX FIFO buffer |
Sissors | 0:600eecd89a78 | 51 | * |
frankvnk | 2:a8e55f7cbfee | 52 | * If there is no space in the FIFO buffer it will block until there is space. |
frankvnk | 2:a8e55f7cbfee | 53 | * The FIFO buffer will automatically send the packets. There is no receiving here, only transmitting. |
Sissors | 0:600eecd89a78 | 54 | * |
Sissors | 0:600eecd89a78 | 55 | * @param data Data to be sent to the SPI slave |
Sissors | 0:600eecd89a78 | 56 | */ |
Sissors | 0:600eecd89a78 | 57 | void fastWrite(int data); |
Sissors | 3:7d9b64d67b22 | 58 | |
Sissors | 0:600eecd89a78 | 59 | /** Use this function before fastWrite to set the correct settings |
Sissors | 3:7d9b64d67b22 | 60 | * |
frankvnk | 2:a8e55f7cbfee | 61 | * It is not needed to use this if the last SPI commands were either normal SPI transmissions, |
frankvnk | 2:a8e55f7cbfee | 62 | * or setting different format/frequency for this object. It is required to call this |
frankvnk | 2:a8e55f7cbfee | 63 | * function when several SPI objects use the same peripheral, and your last transmission was |
frankvnk | 2:a8e55f7cbfee | 64 | * from a different object with different settings. Not sure if you should use it? |
Sissors | 0:600eecd89a78 | 65 | * Use it, it takes very little time to execute, so can't hurt. |
Sissors | 0:600eecd89a78 | 66 | */ |
Sissors | 3:7d9b64d67b22 | 67 | void setFormat( void ) { |
Sissors | 3:7d9b64d67b22 | 68 | format(_bits, _mode); |
Sissors | 3:7d9b64d67b22 | 69 | frequency(_hz); |
Sissors | 3:7d9b64d67b22 | 70 | } |
Sissors | 3:7d9b64d67b22 | 71 | |
Sissors | 0:600eecd89a78 | 72 | /** After you are done with fastWrite, call this function |
Sissors | 0:600eecd89a78 | 73 | * |
frankvnk | 2:a8e55f7cbfee | 74 | * FastWrite simply fills the SPI's (SSP's actually) TX FIFO buffer as fast as it can, |
frankvnk | 2:a8e55f7cbfee | 75 | * and that is the only thing it does. It doesn't do anything with received packages (currently, may change), |
frankvnk | 2:a8e55f7cbfee | 76 | * so the the RX buffer is full with unneeded packets. This function waits until transmission is finished, |
frankvnk | 2:a8e55f7cbfee | 77 | * and clears the RX buffer. You always have to call this before you want to receive |
Sissors | 0:600eecd89a78 | 78 | * SPI data after using fastWrite. |
Sissors | 3:7d9b64d67b22 | 79 | */ |
Sissors | 0:600eecd89a78 | 80 | void clearRX( void ); |
Sissors | 3:7d9b64d67b22 | 81 | |
Sissors | 3:7d9b64d67b22 | 82 | |
Sissors | 0:600eecd89a78 | 83 | //Just for documentation: |
Sissors | 3:7d9b64d67b22 | 84 | #if 0 |
Sissors | 0:600eecd89a78 | 85 | /** Configure the data transmission format |
Sissors | 0:600eecd89a78 | 86 | * |
Sissors | 0:600eecd89a78 | 87 | * @param bits Number of bits per SPI frame (4 - 16) |
Sissors | 0:600eecd89a78 | 88 | * @param mode Clock polarity and phase mode (0 - 3) |
Sissors | 0:600eecd89a78 | 89 | * |
Sissors | 0:600eecd89a78 | 90 | * @code |
Sissors | 3:7d9b64d67b22 | 91 | * mode | POL PHA |
Sissors | 3:7d9b64d67b22 | 92 | * -----+-------- |
Sissors | 3:7d9b64d67b22 | 93 | * 0 | 0 0 |
Sissors | 0:600eecd89a78 | 94 | * 1 | 0 1 |
Sissors | 3:7d9b64d67b22 | 95 | * 2 | 1 0 |
Sissors | 0:600eecd89a78 | 96 | * 3 | 1 1 |
Sissors | 0:600eecd89a78 | 97 | * @endcode |
Sissors | 0:600eecd89a78 | 98 | */ |
Sissors | 0:600eecd89a78 | 99 | void format(int bits, int mode = 0); |
Sissors | 3:7d9b64d67b22 | 100 | |
Sissors | 0:600eecd89a78 | 101 | /** Set the spi bus clock frequency |
Sissors | 0:600eecd89a78 | 102 | * |
Sissors | 0:600eecd89a78 | 103 | * @param hz SCLK frequency in hz (default = 1MHz) |
Sissors | 0:600eecd89a78 | 104 | */ |
Sissors | 0:600eecd89a78 | 105 | void frequency(int hz = 1000000); |
Sissors | 3:7d9b64d67b22 | 106 | |
Sissors | 0:600eecd89a78 | 107 | /** Write to the SPI Slave and return the response |
Sissors | 0:600eecd89a78 | 108 | * |
Sissors | 0:600eecd89a78 | 109 | * @param value Data to be sent to the SPI slave |
Sissors | 0:600eecd89a78 | 110 | * |
Sissors | 0:600eecd89a78 | 111 | * @returns |
Sissors | 0:600eecd89a78 | 112 | * Response from the SPI slave |
Sissors | 0:600eecd89a78 | 113 | */ |
Sissors | 0:600eecd89a78 | 114 | virtual int write(int value); |
Sissors | 3:7d9b64d67b22 | 115 | #endif |
Sissors | 0:600eecd89a78 | 116 | |
Sissors | 0:600eecd89a78 | 117 | }; |
Sissors | 0:600eecd89a78 | 118 | |
Sissors | 0:600eecd89a78 | 119 | #endif |