Jasper Lee / mbed_helloworld

change some io settings for TWR-K22F-120M

Dependents:   twr_helloworld

TARGET_K64F/system_MK64F12.h@0:b16d94660a33, 2014-12-23 (annotated)

Committer:
Jasper_lee
Date:
Tue Dec 23 03:35:08 2014 +0000
Revision:
0:b16d94660a33
change some io setting used in TWR-K22F120M

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Jasper_lee 0:b16d94660a33 1 /*
Jasper_lee 0:b16d94660a33 2 ** ###################################################################
Jasper_lee 0:b16d94660a33 3 ** Processor: MK64FN1M0VMD12
Jasper_lee 0:b16d94660a33 4 ** Compilers: Keil ARM C/C++ Compiler
Jasper_lee 0:b16d94660a33 5 ** Freescale C/C++ for Embedded ARM
Jasper_lee 0:b16d94660a33 6 ** GNU C Compiler
Jasper_lee 0:b16d94660a33 7 ** GNU C Compiler - CodeSourcery Sourcery G++
Jasper_lee 0:b16d94660a33 8 ** IAR ANSI C/C++ Compiler for ARM
Jasper_lee 0:b16d94660a33 9 **
Jasper_lee 0:b16d94660a33 10 ** Reference manual: K64P144M120SF5RM, Rev.2, January 2014
Jasper_lee 0:b16d94660a33 11 ** Version: rev. 2.5, 2014-02-10
Jasper_lee 0:b16d94660a33 12 ** Build: b140611
Jasper_lee 0:b16d94660a33 13 **
Jasper_lee 0:b16d94660a33 14 ** Abstract:
Jasper_lee 0:b16d94660a33 15 ** Provides a system configuration function and a global variable that
Jasper_lee 0:b16d94660a33 16 ** contains the system frequency. It configures the device and initializes
Jasper_lee 0:b16d94660a33 17 ** the oscillator (PLL) that is part of the microcontroller device.
Jasper_lee 0:b16d94660a33 18 **
Jasper_lee 0:b16d94660a33 19 ** Copyright (c) 2014 Freescale Semiconductor, Inc.
Jasper_lee 0:b16d94660a33 20 ** All rights reserved.
Jasper_lee 0:b16d94660a33 21 **
Jasper_lee 0:b16d94660a33 22 ** Redistribution and use in source and binary forms, with or without modification,
Jasper_lee 0:b16d94660a33 23 ** are permitted provided that the following conditions are met:
Jasper_lee 0:b16d94660a33 24 **
Jasper_lee 0:b16d94660a33 25 ** o Redistributions of source code must retain the above copyright notice, this list
Jasper_lee 0:b16d94660a33 26 ** of conditions and the following disclaimer.
Jasper_lee 0:b16d94660a33 27 **
Jasper_lee 0:b16d94660a33 28 ** o Redistributions in binary form must reproduce the above copyright notice, this
Jasper_lee 0:b16d94660a33 29 ** list of conditions and the following disclaimer in the documentation and/or
Jasper_lee 0:b16d94660a33 30 ** other materials provided with the distribution.
Jasper_lee 0:b16d94660a33 31 **
Jasper_lee 0:b16d94660a33 32 ** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
Jasper_lee 0:b16d94660a33 33 ** contributors may be used to endorse or promote products derived from this
Jasper_lee 0:b16d94660a33 34 ** software without specific prior written permission.
Jasper_lee 0:b16d94660a33 35 **
Jasper_lee 0:b16d94660a33 36 ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
Jasper_lee 0:b16d94660a33 37 ** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
Jasper_lee 0:b16d94660a33 38 ** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Jasper_lee 0:b16d94660a33 39 ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
Jasper_lee 0:b16d94660a33 40 ** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
Jasper_lee 0:b16d94660a33 41 ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
Jasper_lee 0:b16d94660a33 42 ** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
Jasper_lee 0:b16d94660a33 43 ** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
Jasper_lee 0:b16d94660a33 44 ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
Jasper_lee 0:b16d94660a33 45 ** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Jasper_lee 0:b16d94660a33 46 **
Jasper_lee 0:b16d94660a33 47 ** http: www.freescale.com
Jasper_lee 0:b16d94660a33 48 ** mail: support@freescale.com
Jasper_lee 0:b16d94660a33 49 **
Jasper_lee 0:b16d94660a33 50 ** Revisions:
Jasper_lee 0:b16d94660a33 51 ** - rev. 1.0 (2013-08-12)
Jasper_lee 0:b16d94660a33 52 ** Initial version.
Jasper_lee 0:b16d94660a33 53 ** - rev. 2.0 (2013-10-29)
Jasper_lee 0:b16d94660a33 54 ** Register accessor macros added to the memory map.
Jasper_lee 0:b16d94660a33 55 ** Symbols for Processor Expert memory map compatibility added to the memory map.
Jasper_lee 0:b16d94660a33 56 ** Startup file for gcc has been updated according to CMSIS 3.2.
Jasper_lee 0:b16d94660a33 57 ** System initialization updated.
Jasper_lee 0:b16d94660a33 58 ** MCG - registers updated.
Jasper_lee 0:b16d94660a33 59 ** PORTA, PORTB, PORTC, PORTE - registers for digital filter removed.
Jasper_lee 0:b16d94660a33 60 ** - rev. 2.1 (2013-10-30)
Jasper_lee 0:b16d94660a33 61 ** Definition of BITBAND macros updated to support peripherals with 32-bit acces disabled.
Jasper_lee 0:b16d94660a33 62 ** - rev. 2.2 (2013-12-09)
Jasper_lee 0:b16d94660a33 63 ** DMA - EARS register removed.
Jasper_lee 0:b16d94660a33 64 ** AIPS0, AIPS1 - MPRA register updated.
Jasper_lee 0:b16d94660a33 65 ** - rev. 2.3 (2014-01-24)
Jasper_lee 0:b16d94660a33 66 ** Update according to reference manual rev. 2
Jasper_lee 0:b16d94660a33 67 ** ENET, MCG, MCM, SIM, USB - registers updated
Jasper_lee 0:b16d94660a33 68 ** - rev. 2.4 (2014-02-10)
Jasper_lee 0:b16d94660a33 69 ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
Jasper_lee 0:b16d94660a33 70 ** Update of SystemInit() and SystemCoreClockUpdate() functions.
Jasper_lee 0:b16d94660a33 71 ** - rev. 2.5 (2014-02-10)
Jasper_lee 0:b16d94660a33 72 ** The declaration of clock configurations has been moved to separate header file system_MK64F12.h
Jasper_lee 0:b16d94660a33 73 ** Update of SystemInit() and SystemCoreClockUpdate() functions.
Jasper_lee 0:b16d94660a33 74 ** Module access macro module_BASES replaced by module_BASE_PTRS.
Jasper_lee 0:b16d94660a33 75 **
Jasper_lee 0:b16d94660a33 76 ** ###################################################################
Jasper_lee 0:b16d94660a33 77 */
Jasper_lee 0:b16d94660a33 78
Jasper_lee 0:b16d94660a33 79 /*!
Jasper_lee 0:b16d94660a33 80 * @file MK64F12
Jasper_lee 0:b16d94660a33 81 * @version 2.5
Jasper_lee 0:b16d94660a33 82 * @date 2014-02-10
Jasper_lee 0:b16d94660a33 83 * @brief Device specific configuration file for MK64F12 (header file)
Jasper_lee 0:b16d94660a33 84 *
Jasper_lee 0:b16d94660a33 85 * Provides a system configuration function and a global variable that contains
Jasper_lee 0:b16d94660a33 86 * the system frequency. It configures the device and initializes the oscillator
Jasper_lee 0:b16d94660a33 87 * (PLL) that is part of the microcontroller device.
Jasper_lee 0:b16d94660a33 88 */
Jasper_lee 0:b16d94660a33 89
Jasper_lee 0:b16d94660a33 90 #ifndef SYSTEM_MK64F12_H_
Jasper_lee 0:b16d94660a33 91 #define SYSTEM_MK64F12_H_ /**< Symbol preventing repeated inclusion */
Jasper_lee 0:b16d94660a33 92
Jasper_lee 0:b16d94660a33 93 #ifdef __cplusplus
Jasper_lee 0:b16d94660a33 94 extern "C" {
Jasper_lee 0:b16d94660a33 95 #endif
Jasper_lee 0:b16d94660a33 96
Jasper_lee 0:b16d94660a33 97 #include <stdint.h>
Jasper_lee 0:b16d94660a33 98
Jasper_lee 0:b16d94660a33 99
Jasper_lee 0:b16d94660a33 100 #define DISABLE_WDOG 1
Jasper_lee 0:b16d94660a33 101
Jasper_lee 0:b16d94660a33 102 #ifndef CLOCK_SETUP
Jasper_lee 0:b16d94660a33 103 #define CLOCK_SETUP 4
Jasper_lee 0:b16d94660a33 104 #endif
Jasper_lee 0:b16d94660a33 105
Jasper_lee 0:b16d94660a33 106 /* MCG mode constants */
Jasper_lee 0:b16d94660a33 107
Jasper_lee 0:b16d94660a33 108 #define MCG_MODE_FEI 0U
Jasper_lee 0:b16d94660a33 109 #define MCG_MODE_FBI 1U
Jasper_lee 0:b16d94660a33 110 #define MCG_MODE_BLPI 2U
Jasper_lee 0:b16d94660a33 111 #define MCG_MODE_FEE 3U
Jasper_lee 0:b16d94660a33 112 #define MCG_MODE_FBE 4U
Jasper_lee 0:b16d94660a33 113 #define MCG_MODE_BLPE 5U
Jasper_lee 0:b16d94660a33 114 #define MCG_MODE_PBE 6U
Jasper_lee 0:b16d94660a33 115 #define MCG_MODE_PEE 7U
Jasper_lee 0:b16d94660a33 116
Jasper_lee 0:b16d94660a33 117 /* Predefined clock setups
Jasper_lee 0:b16d94660a33 118 0 ... Default part configuration
Jasper_lee 0:b16d94660a33 119 Multipurpose Clock Generator (MCG) in FEI mode.
Jasper_lee 0:b16d94660a33 120 Reference clock source for MCG module: Slow internal reference clock
Jasper_lee 0:b16d94660a33 121 Core clock = 20.97152MHz
Jasper_lee 0:b16d94660a33 122 Bus clock = 20.97152MHz
Jasper_lee 0:b16d94660a33 123 1 ... Maximum achievable clock frequency configuration
Jasper_lee 0:b16d94660a33 124 Multipurpose Clock Generator (MCG) in PEE mode.
Jasper_lee 0:b16d94660a33 125 Reference clock source for MCG module: System oscillator 0 reference clock
Jasper_lee 0:b16d94660a33 126 Core clock = 120MHz
Jasper_lee 0:b16d94660a33 127 Bus clock = 60MHz
Jasper_lee 0:b16d94660a33 128 2 ... Chip internaly clocked, ready for Very Low Power Run mode.
Jasper_lee 0:b16d94660a33 129 Multipurpose Clock Generator (MCG) in BLPI mode.
Jasper_lee 0:b16d94660a33 130 Reference clock source for MCG module: Fast internal reference clock
Jasper_lee 0:b16d94660a33 131 Core clock = 4MHz
Jasper_lee 0:b16d94660a33 132 Bus clock = 4MHz
Jasper_lee 0:b16d94660a33 133 3 ... Chip externally clocked, ready for Very Low Power Run mode.
Jasper_lee 0:b16d94660a33 134 Multipurpose Clock Generator (MCG) in BLPE mode.
Jasper_lee 0:b16d94660a33 135 Reference clock source for MCG module: RTC oscillator reference clock
Jasper_lee 0:b16d94660a33 136 Core clock = 0.032768MHz
Jasper_lee 0:b16d94660a33 137 Bus clock = 0.032768MHz
Jasper_lee 0:b16d94660a33 138 4 ... USB clock setup
Jasper_lee 0:b16d94660a33 139 Multipurpose Clock Generator (MCG) in PEE mode.
Jasper_lee 0:b16d94660a33 140 Reference clock source for MCG module: System oscillator 0 reference clock
Jasper_lee 0:b16d94660a33 141 Core clock = 120MHz
Jasper_lee 0:b16d94660a33 142 Bus clock = 60MHz
Jasper_lee 0:b16d94660a33 143 */
Jasper_lee 0:b16d94660a33 144
Jasper_lee 0:b16d94660a33 145 /* Define clock source values */
Jasper_lee 0:b16d94660a33 146
Jasper_lee 0:b16d94660a33 147 #define CPU_XTAL_CLK_HZ 50000000u /* Value of the external crystal or oscillator clock frequency in Hz */
Jasper_lee 0:b16d94660a33 148 #define CPU_XTAL32k_CLK_HZ 32768u /* Value of the external 32k crystal or oscillator clock frequency in Hz */
Jasper_lee 0:b16d94660a33 149 #define CPU_INT_SLOW_CLK_HZ 32768u /* Value of the slow internal oscillator clock frequency in Hz */
Jasper_lee 0:b16d94660a33 150 #define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz */
Jasper_lee 0:b16d94660a33 151 #define CPU_INT_IRC_CLK_HZ 48000000u /* Value of the 48M internal oscillator clock frequency in Hz */
Jasper_lee 0:b16d94660a33 152
Jasper_lee 0:b16d94660a33 153 /* RTC oscillator setting */
Jasper_lee 0:b16d94660a33 154 /* RTC_CR: SC2P=0,SC4P=0,SC8P=0,SC16P=0,CLKO=1,OSCE=1,WPS=0,UM=0,SUP=0,WPE=0,SWR=0 */
Jasper_lee 0:b16d94660a33 155 #define SYSTEM_RTC_CR_VALUE 0x0300U /* RTC_CR */
Jasper_lee 0:b16d94660a33 156
Jasper_lee 0:b16d94660a33 157 /* Low power mode enable */
Jasper_lee 0:b16d94660a33 158 /* SMC_PMPROT: AVLP=1,ALLS=1,AVLLS=1 */
Jasper_lee 0:b16d94660a33 159 #define SYSTEM_SMC_PMPROT_VALUE 0x2AU /* SMC_PMPROT */
Jasper_lee 0:b16d94660a33 160
Jasper_lee 0:b16d94660a33 161 /* Internal reference clock trim */
Jasper_lee 0:b16d94660a33 162 /* #undef SLOW_TRIM_ADDRESS */ /* Slow oscillator not trimmed. Commented out for MISRA compliance. */
Jasper_lee 0:b16d94660a33 163 /* #undef SLOW_FINE_TRIM_ADDRESS */ /* Slow oscillator not trimmed. Commented out for MISRA compliance. */
Jasper_lee 0:b16d94660a33 164 /* #undef FAST_TRIM_ADDRESS */ /* Fast oscillator not trimmed. Commented out for MISRA compliance. */
Jasper_lee 0:b16d94660a33 165 /* #undef FAST_FINE_TRIM_ADDRESS */ /* Fast oscillator not trimmed. Commented out for MISRA compliance. */
Jasper_lee 0:b16d94660a33 166
Jasper_lee 0:b16d94660a33 167 #if (CLOCK_SETUP == 0)
Jasper_lee 0:b16d94660a33 168 #define DEFAULT_SYSTEM_CLOCK 20971520u /* Default System clock value */
Jasper_lee 0:b16d94660a33 169 #define MCG_MODE MCG_MODE_FEI /* Clock generator mode */
Jasper_lee 0:b16d94660a33 170 /* MCG_C1: CLKS=0,FRDIV=0,IREFS=1,IRCLKEN=1,IREFSTEN=0 */
Jasper_lee 0:b16d94660a33 171 #define SYSTEM_MCG_C1_VALUE 0x06U /* MCG_C1 */
Jasper_lee 0:b16d94660a33 172 /* MCG_C2: LOCRE0=0,FCFTRIM=0,RANGE=2,HGO=0,EREFS=0,LP=0,IRCS=0 */
Jasper_lee 0:b16d94660a33 173 #define SYSTEM_MCG_C2_VALUE 0x20U /* MCG_C2 */
Jasper_lee 0:b16d94660a33 174 /* MCG_C4: DMX32=0,DRST_DRS=0,FCTRIM=0,SCFTRIM=0 */
Jasper_lee 0:b16d94660a33 175 #define SYSTEM_MCG_C4_VALUE 0x00U /* MCG_C4 */
Jasper_lee 0:b16d94660a33 176 /* MCG_SC: ATME=0,ATMS=0,ATMF=0,FLTPRSRV=0,FCRDIV=0,LOCS0=0 */
Jasper_lee 0:b16d94660a33 177 #define SYSTEM_MCG_SC_VALUE 0x00U /* MCG_SC */
Jasper_lee 0:b16d94660a33 178 /* MCG_C5: PLLCLKEN0=0,PLLSTEN0=0,PRDIV0=0 */
Jasper_lee 0:b16d94660a33 179 #define SYSTEM_MCG_C5_VALUE 0x00U /* MCG_C5 */
Jasper_lee 0:b16d94660a33 180 /* MCG_C6: LOLIE0=0,PLLS=0,CME0=0,VDIV0=0 */
Jasper_lee 0:b16d94660a33 181 #define SYSTEM_MCG_C6_VALUE 0x00U /* MCG_C6 */
Jasper_lee 0:b16d94660a33 182 /* MCG_C7: OSCSEL=0 */
Jasper_lee 0:b16d94660a33 183 #define SYSTEM_MCG_C7_VALUE 0x00U /* MCG_C7 */
Jasper_lee 0:b16d94660a33 184 /* OSC_CR: ERCLKEN=0,EREFSTEN=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */
Jasper_lee 0:b16d94660a33 185 #define SYSTEM_OSC_CR_VALUE 0x00U /* OSC_CR */
Jasper_lee 0:b16d94660a33 186 /* SMC_PMCTRL: LPWUI=0,RUNM=0,STOPA=0,STOPM=0 */
Jasper_lee 0:b16d94660a33 187 #define SYSTEM_SMC_PMCTRL_VALUE 0x00U /* SMC_PMCTRL */
Jasper_lee 0:b16d94660a33 188 /* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=0,OUTDIV3=1,OUTDIV4=1 */
Jasper_lee 0:b16d94660a33 189 #define SYSTEM_SIM_CLKDIV1_VALUE 0x00110000U /* SIM_CLKDIV1 */
Jasper_lee 0:b16d94660a33 190 /* SIM_SOPT1: USBREGEN=0,USBSSTBY=0,USBVSTBY=0,OSC32KSEL=2,RAMSIZE=0 */
Jasper_lee 0:b16d94660a33 191 #define SYSTEM_SIM_SOPT1_VALUE 0x00080000U /* SIM_SOPT1 */
Jasper_lee 0:b16d94660a33 192 /* SIM_SOPT2: SDHCSRC=0,TIMESRC=0,RMIISRC=0,USBSRC=0,PLLFLLSEL=0,TRACECLKSEL=0,PTD7PAD=0,FBSL=0,CLKOUTSEL=0,RTCCLKOUTSEL=0 */
Jasper_lee 0:b16d94660a33 193 #define SYSTEM_SIM_SOPT2_VALUE 0x00U /* SIM_SOPT2 */
Jasper_lee 0:b16d94660a33 194 #elif (CLOCK_SETUP == 1)
Jasper_lee 0:b16d94660a33 195 #define DEFAULT_SYSTEM_CLOCK 120000000u /* Default System clock value */
Jasper_lee 0:b16d94660a33 196 #define MCG_MODE MCG_MODE_PEE /* Clock generator mode */
Jasper_lee 0:b16d94660a33 197 /* MCG_C1: CLKS=0,FRDIV=7,IREFS=0,IRCLKEN=1,IREFSTEN=0 */
Jasper_lee 0:b16d94660a33 198 #define SYSTEM_MCG_C1_VALUE 0x3AU /* MCG_C1 */
Jasper_lee 0:b16d94660a33 199 /* MCG_C2: LOCRE0=0,FCFTRIM=0,RANGE=2,HGO=0,EREFS=0,LP=0,IRCS=0 */
Jasper_lee 0:b16d94660a33 200 #define SYSTEM_MCG_C2_VALUE 0x20U /* MCG_C2 */
Jasper_lee 0:b16d94660a33 201 /* MCG_C4: DMX32=0,DRST_DRS=0,FCTRIM=0,SCFTRIM=0 */
Jasper_lee 0:b16d94660a33 202 #define SYSTEM_MCG_C4_VALUE 0x00U /* MCG_C4 */
Jasper_lee 0:b16d94660a33 203 /* MCG_SC: ATME=0,ATMS=0,ATMF=0,FLTPRSRV=0,FCRDIV=0,LOCS0=0 */
Jasper_lee 0:b16d94660a33 204 #define SYSTEM_MCG_SC_VALUE 0x00U /* MCG_SC */
Jasper_lee 0:b16d94660a33 205 /* MCG_C5: PLLCLKEN0=0,PLLSTEN0=0,PRDIV0=0x13 */
Jasper_lee 0:b16d94660a33 206 #define SYSTEM_MCG_C5_VALUE 0x13U /* MCG_C5 */
Jasper_lee 0:b16d94660a33 207 /* MCG_C6: LOLIE0=0,PLLS=1,CME0=0,VDIV0=0x18 */
Jasper_lee 0:b16d94660a33 208 #define SYSTEM_MCG_C6_VALUE 0x58U /* MCG_C6 */
Jasper_lee 0:b16d94660a33 209 /* MCG_C7: OSCSEL=0 */
Jasper_lee 0:b16d94660a33 210 #define SYSTEM_MCG_C7_VALUE 0x00U /* MCG_C7 */
Jasper_lee 0:b16d94660a33 211 /* OSC_CR: ERCLKEN=1,EREFSTEN=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */
Jasper_lee 0:b16d94660a33 212 #define SYSTEM_OSC_CR_VALUE 0x80U /* OSC_CR */
Jasper_lee 0:b16d94660a33 213 /* SMC_PMCTRL: LPWUI=0,RUNM=0,STOPA=0,STOPM=0 */
Jasper_lee 0:b16d94660a33 214 #define SYSTEM_SMC_PMCTRL_VALUE 0x00U /* SMC_PMCTRL */
Jasper_lee 0:b16d94660a33 215 /* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=1,OUTDIV3=1,OUTDIV4=4 */
Jasper_lee 0:b16d94660a33 216 #define SYSTEM_SIM_CLKDIV1_VALUE 0x01140000U /* SIM_CLKDIV1 */
Jasper_lee 0:b16d94660a33 217 /* SIM_SOPT1: USBREGEN=0,USBSSTBY=0,USBVSTBY=0,OSC32KSEL=2,RAMSIZE=0 */
Jasper_lee 0:b16d94660a33 218 #define SYSTEM_SIM_SOPT1_VALUE 0x00080000U /* SIM_SOPT1 */
Jasper_lee 0:b16d94660a33 219 /* SIM_SOPT2: SDHCSRC=0,TIMESRC=0,RMIISRC=0,USBSRC=0,PLLFLLSEL=1,TRACECLKSEL=0,PTD7PAD=0,FBSL=0,CLKOUTSEL=0,RTCCLKOUTSEL=0 */
Jasper_lee 0:b16d94660a33 220 #define SYSTEM_SIM_SOPT2_VALUE 0x00010000U /* SIM_SOPT2 */
Jasper_lee 0:b16d94660a33 221 #elif (CLOCK_SETUP == 2)
Jasper_lee 0:b16d94660a33 222 #define DEFAULT_SYSTEM_CLOCK 4000000u /* Default System clock value */
Jasper_lee 0:b16d94660a33 223 #define MCG_MODE MCG_MODE_BLPI /* Clock generator mode */
Jasper_lee 0:b16d94660a33 224 /* MCG_C1: CLKS=1,FRDIV=0,IREFS=1,IRCLKEN=1,IREFSTEN=0 */
Jasper_lee 0:b16d94660a33 225 #define SYSTEM_MCG_C1_VALUE 0x46U /* MCG_C1 */
Jasper_lee 0:b16d94660a33 226 /* MCG_C2: LOCRE0=0,FCFTRIM=0,RANGE=2,HGO=0,EREFS=0,LP=1,IRCS=1 */
Jasper_lee 0:b16d94660a33 227 #define SYSTEM_MCG_C2_VALUE 0x23U /* MCG_C2 */
Jasper_lee 0:b16d94660a33 228 /* MCG_C4: DMX32=0,DRST_DRS=0,FCTRIM=0,SCFTRIM=0 */
Jasper_lee 0:b16d94660a33 229 #define SYSTEM_MCG_C4_VALUE 0x00U /* MCG_C4 */
Jasper_lee 0:b16d94660a33 230 /* MCG_SC: ATME=0,ATMS=0,ATMF=0,FLTPRSRV=0,FCRDIV=0,LOCS0=0 */
Jasper_lee 0:b16d94660a33 231 #define SYSTEM_MCG_SC_VALUE 0x00U /* MCG_SC */
Jasper_lee 0:b16d94660a33 232 /* MCG_C5: PLLCLKEN0=0,PLLSTEN0=0,PRDIV0=0 */
Jasper_lee 0:b16d94660a33 233 #define SYSTEM_MCG_C5_VALUE 0x00U /* MCG_C5 */
Jasper_lee 0:b16d94660a33 234 /* MCG_C6: LOLIE0=0,PLLS=0,CME0=0,VDIV0=0 */
Jasper_lee 0:b16d94660a33 235 #define SYSTEM_MCG_C6_VALUE 0x00U /* MCG_C6 */
Jasper_lee 0:b16d94660a33 236 /* MCG_C7: OSCSEL=0 */
Jasper_lee 0:b16d94660a33 237 #define SYSTEM_MCG_C7_VALUE 0x00U /* MCG_C7 */
Jasper_lee 0:b16d94660a33 238 /* OSC_CR: ERCLKEN=1,EREFSTEN=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */
Jasper_lee 0:b16d94660a33 239 #define SYSTEM_OSC_CR_VALUE 0x80U /* OSC_CR */
Jasper_lee 0:b16d94660a33 240 /* SMC_PMCTRL: LPWUI=0,RUNM=0,STOPA=0,STOPM=0 */
Jasper_lee 0:b16d94660a33 241 #define SYSTEM_SMC_PMCTRL_VALUE 0x00U /* SMC_PMCTRL */
Jasper_lee 0:b16d94660a33 242 /* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=0,OUTDIV3=0,OUTDIV4=4 */
Jasper_lee 0:b16d94660a33 243 #define SYSTEM_SIM_CLKDIV1_VALUE 0x00040000U /* SIM_CLKDIV1 */
Jasper_lee 0:b16d94660a33 244 /* SIM_SOPT1: USBREGEN=0,USBSSTBY=0,USBVSTBY=0,OSC32KSEL=2,RAMSIZE=0 */
Jasper_lee 0:b16d94660a33 245 #define SYSTEM_SIM_SOPT1_VALUE 0x00080000U /* SIM_SOPT1 */
Jasper_lee 0:b16d94660a33 246 /* SIM_SOPT2: SDHCSRC=0,TIMESRC=0,RMIISRC=0,USBSRC=0,PLLFLLSEL=3,TRACECLKSEL=0,PTD7PAD=0,FBSL=0,CLKOUTSEL=0,RTCCLKOUTSEL=0 */
Jasper_lee 0:b16d94660a33 247 #define SYSTEM_SIM_SOPT2_VALUE 0x00030000U /* SIM_SOPT2 */
Jasper_lee 0:b16d94660a33 248 #elif (CLOCK_SETUP == 3)
Jasper_lee 0:b16d94660a33 249 #define DEFAULT_SYSTEM_CLOCK 32768u /* Default System clock value */
Jasper_lee 0:b16d94660a33 250 #define MCG_MODE MCG_MODE_BLPE /* Clock generator mode */
Jasper_lee 0:b16d94660a33 251 /* MCG_C1: CLKS=2,FRDIV=0,IREFS=0,IRCLKEN=1,IREFSTEN=0 */
Jasper_lee 0:b16d94660a33 252 #define SYSTEM_MCG_C1_VALUE 0x82U /* MCG_C1 */
Jasper_lee 0:b16d94660a33 253 /* MCG_C2: LOCRE0=0,FCFTRIM=0,RANGE=2,HGO=0,EREFS=0,LP=1,IRCS=1 */
Jasper_lee 0:b16d94660a33 254 #define SYSTEM_MCG_C2_VALUE 0x23U /* MCG_C2 */
Jasper_lee 0:b16d94660a33 255 /* MCG_C4: DMX32=0,DRST_DRS=0,FCTRIM=0,SCFTRIM=0 */
Jasper_lee 0:b16d94660a33 256 #define SYSTEM_MCG_C4_VALUE 0x00U /* MCG_C4 */
Jasper_lee 0:b16d94660a33 257 /* MCG_SC: ATME=0,ATMS=0,ATMF=0,FLTPRSRV=0,FCRDIV=1,LOCS0=0 */
Jasper_lee 0:b16d94660a33 258 #define SYSTEM_MCG_SC_VALUE 0x02U /* MCG_SC */
Jasper_lee 0:b16d94660a33 259 /* MCG_C5: PLLCLKEN0=0,PLLSTEN0=0,PRDIV0=0 */
Jasper_lee 0:b16d94660a33 260 #define SYSTEM_MCG_C5_VALUE 0x00U /* MCG_C5 */
Jasper_lee 0:b16d94660a33 261 /* MCG_C6: LOLIE0=0,PLLS=0,CME0=0,VDIV0=0 */
Jasper_lee 0:b16d94660a33 262 #define SYSTEM_MCG_C6_VALUE 0x00U /* MCG_C6 */
Jasper_lee 0:b16d94660a33 263 /* MCG_C7: OSCSEL=1 */
Jasper_lee 0:b16d94660a33 264 #define SYSTEM_MCG_C7_VALUE 0x01U /* MCG_C7 */
Jasper_lee 0:b16d94660a33 265 /* OSC_CR: ERCLKEN=0,EREFSTEN=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */
Jasper_lee 0:b16d94660a33 266 #define SYSTEM_OSC_CR_VALUE 0x00U /* OSC_CR */
Jasper_lee 0:b16d94660a33 267 /* SMC_PMCTRL: LPWUI=0,RUNM=0,STOPA=0,STOPM=0 */
Jasper_lee 0:b16d94660a33 268 #define SYSTEM_SMC_PMCTRL_VALUE 0x00U /* SMC_PMCTRL */
Jasper_lee 0:b16d94660a33 269 /* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=0,OUTDIV3=0,OUTDIV4=0 */
Jasper_lee 0:b16d94660a33 270 #define SYSTEM_SIM_CLKDIV1_VALUE 0x00U /* SIM_CLKDIV1 */
Jasper_lee 0:b16d94660a33 271 /* SIM_SOPT1: USBREGEN=0,USBSSTBY=0,USBVSTBY=0,OSC32KSEL=2,RAMSIZE=0 */
Jasper_lee 0:b16d94660a33 272 #define SYSTEM_SIM_SOPT1_VALUE 0x00080000U /* SIM_SOPT1 */
Jasper_lee 0:b16d94660a33 273 /* SIM_SOPT2: SDHCSRC=0,TIMESRC=0,RMIISRC=0,USBSRC=0,PLLFLLSEL=3,TRACECLKSEL=0,PTD7PAD=0,FBSL=0,CLKOUTSEL=0,RTCCLKOUTSEL=0 */
Jasper_lee 0:b16d94660a33 274 #define SYSTEM_SIM_SOPT2_VALUE 0x00030000U /* SIM_SOPT2 */
Jasper_lee 0:b16d94660a33 275 #elif (CLOCK_SETUP == 4)
Jasper_lee 0:b16d94660a33 276 #define DEFAULT_SYSTEM_CLOCK 120000000u /* Default System clock value */
Jasper_lee 0:b16d94660a33 277 #define MCG_MODE MCG_MODE_PEE /* Clock generator mode */
Jasper_lee 0:b16d94660a33 278 /* MCG_C1: CLKS=0,FRDIV=7,IREFS=0,IRCLKEN=1,IREFSTEN=0 */
Jasper_lee 0:b16d94660a33 279 #define SYSTEM_MCG_C1_VALUE 0x3AU /* MCG_C1 */
Jasper_lee 0:b16d94660a33 280 /* MCG_C2: LOCRE0=0,FCFTRIM=0,RANGE=2,HGO=0,EREFS=0,LP=0,IRCS=0 */
Jasper_lee 0:b16d94660a33 281 #define SYSTEM_MCG_C2_VALUE 0x20U /* MCG_C2 */
Jasper_lee 0:b16d94660a33 282 /* MCG_C4: DMX32=0,DRST_DRS=0,FCTRIM=0,SCFTRIM=0 */
Jasper_lee 0:b16d94660a33 283 #define SYSTEM_MCG_C4_VALUE 0x00U /* MCG_C4 */
Jasper_lee 0:b16d94660a33 284 /* MCG_SC: ATME=0,ATMS=0,ATMF=0,FLTPRSRV=0,FCRDIV=0,LOCS0=0 */
Jasper_lee 0:b16d94660a33 285 #define SYSTEM_MCG_SC_VALUE 0x00U /* MCG_SC */
Jasper_lee 0:b16d94660a33 286 /* MCG_C5: PLLCLKEN0=0,PLLSTEN0=0,PRDIV0=0x13 */
Jasper_lee 0:b16d94660a33 287 #define SYSTEM_MCG_C5_VALUE 0x13U /* MCG_C5 */
Jasper_lee 0:b16d94660a33 288 /* MCG_C6: LOLIE0=0,PLLS=1,CME0=0,VDIV0=0x18 */
Jasper_lee 0:b16d94660a33 289 #define SYSTEM_MCG_C6_VALUE 0x58U /* MCG_C6 */
Jasper_lee 0:b16d94660a33 290 /* MCG_C7: OSCSEL=0 */
Jasper_lee 0:b16d94660a33 291 #define SYSTEM_MCG_C7_VALUE 0x00U /* MCG_C7 */
Jasper_lee 0:b16d94660a33 292 /* OSC_CR: ERCLKEN=1,EREFSTEN=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */
Jasper_lee 0:b16d94660a33 293 #define SYSTEM_OSC_CR_VALUE 0x80U /* OSC_CR */
Jasper_lee 0:b16d94660a33 294 /* SMC_PMCTRL: LPWUI=0,RUNM=0,STOPA=0,STOPM=0 */
Jasper_lee 0:b16d94660a33 295 #define SYSTEM_SMC_PMCTRL_VALUE 0x00U /* SMC_PMCTRL */
Jasper_lee 0:b16d94660a33 296 /* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=1,OUTDIV3=1,OUTDIV4=4 */
Jasper_lee 0:b16d94660a33 297 #define SYSTEM_SIM_CLKDIV1_VALUE 0x01140000U /* SIM_CLKDIV1 */
Jasper_lee 0:b16d94660a33 298 /* SIM_CLKDIV2: USBDIV=4,USBFRAC=1 */
Jasper_lee 0:b16d94660a33 299 #define SYSTEM_SIM_CLKDIV2_VALUE 0x09U /* SIM_CLKDIV2 */
Jasper_lee 0:b16d94660a33 300 /* SIM_SOPT1: USBREGEN=0,USBSSTBY=0,USBVSTBY=0,OSC32KSEL=2,RAMSIZE=0 */
Jasper_lee 0:b16d94660a33 301 #define SYSTEM_SIM_SOPT1_VALUE 0x00080000U /* SIM_SOPT1 */
Jasper_lee 0:b16d94660a33 302 /* SIM_SOPT2: SDHCSRC=0,TIMESRC=0,RMIISRC=0,USBSRC=0,PLLFLLSEL=1,TRACECLKSEL=0,PTD7PAD=0,FBSL=0,CLKOUTSEL=0,RTCCLKOUTSEL=0 */
Jasper_lee 0:b16d94660a33 303 #define SYSTEM_SIM_SOPT2_VALUE 0x00010000U /* SIM_SOPT2 */
Jasper_lee 0:b16d94660a33 304 #endif
Jasper_lee 0:b16d94660a33 305
Jasper_lee 0:b16d94660a33 306 /**
Jasper_lee 0:b16d94660a33 307 * @brief System clock frequency (core clock)
Jasper_lee 0:b16d94660a33 308 *
Jasper_lee 0:b16d94660a33 309 * The system clock frequency supplied to the SysTick timer and the processor
Jasper_lee 0:b16d94660a33 310 * core clock. This variable can be used by the user application to setup the
Jasper_lee 0:b16d94660a33 311 * SysTick timer or configure other parameters. It may also be used by debugger to
Jasper_lee 0:b16d94660a33 312 * query the frequency of the debug timer or configure the trace clock speed
Jasper_lee 0:b16d94660a33 313 * SystemCoreClock is initialized with a correct predefined value.
Jasper_lee 0:b16d94660a33 314 */
Jasper_lee 0:b16d94660a33 315 extern uint32_t SystemCoreClock;
Jasper_lee 0:b16d94660a33 316
Jasper_lee 0:b16d94660a33 317 /**
Jasper_lee 0:b16d94660a33 318 * @brief Setup the microcontroller system.
Jasper_lee 0:b16d94660a33 319 *
Jasper_lee 0:b16d94660a33 320 * Typically this function configures the oscillator (PLL) that is part of the
Jasper_lee 0:b16d94660a33 321 * microcontroller device. For systems with variable clock speed it also updates
Jasper_lee 0:b16d94660a33 322 * the variable SystemCoreClock. SystemInit is called from startup_device file.
Jasper_lee 0:b16d94660a33 323 */
Jasper_lee 0:b16d94660a33 324 void SystemInit (void);
Jasper_lee 0:b16d94660a33 325
Jasper_lee 0:b16d94660a33 326 /**
Jasper_lee 0:b16d94660a33 327 * @brief Updates the SystemCoreClock variable.
Jasper_lee 0:b16d94660a33 328 *
Jasper_lee 0:b16d94660a33 329 * It must be called whenever the core clock is changed during program
Jasper_lee 0:b16d94660a33 330 * execution. SystemCoreClockUpdate() evaluates the clock register settings and calculates
Jasper_lee 0:b16d94660a33 331 * the current core clock.
Jasper_lee 0:b16d94660a33 332 */
Jasper_lee 0:b16d94660a33 333 void SystemCoreClockUpdate (void);
Jasper_lee 0:b16d94660a33 334
Jasper_lee 0:b16d94660a33 335 #ifdef __cplusplus
Jasper_lee 0:b16d94660a33 336 }
Jasper_lee 0:b16d94660a33 337 #endif
Jasper_lee 0:b16d94660a33 338
Jasper_lee 0:b16d94660a33 339 #endif /* #if !defined(SYSTEM_MK64F12_H_) */