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Dependents: FreeMASTER_HelloWorld FreeMASTER_HelloWorld2 FreeMASTER_HelloWorld3
Fork of freemaster_lib by
freemaster.h@12:15696acfeebe, 2014-06-19 (annotated)
- Committer:
- JardaPajskr
- Date:
- Thu Jun 19 16:45:50 2014 +0000
- Revision:
- 12:15696acfeebe
- Parent:
- 9:61b2beb811bf
- Child:
- 13:62ef0bfeb036
changed freemaster header file to Kxx
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| JardaPajskr | 0:fb135bf60f82 | 1 | /******************************************************************************* |
| JardaPajskr | 0:fb135bf60f82 | 2 | * |
| JardaPajskr | 0:fb135bf60f82 | 3 | * Copyright 2004-2014 Freescale Semiconductor, Inc. |
| JardaPajskr | 0:fb135bf60f82 | 4 | * |
| JardaPajskr | 0:fb135bf60f82 | 5 | * This software is owned or controlled by Freescale Semiconductor. |
| JardaPajskr | 0:fb135bf60f82 | 6 | * Use of this software is governed by the Freescale FreeMASTER License |
| JardaPajskr | 0:fb135bf60f82 | 7 | * distributed with this Material. |
| JardaPajskr | 12:15696acfeebe | 8 | * See the LICENSE file distributed for more details. |
| JardaPajskr | 0:fb135bf60f82 | 9 | * |
| JardaPajskr | 0:fb135bf60f82 | 10 | ****************************************************************************//*! |
| JardaPajskr | 0:fb135bf60f82 | 11 | * |
| JardaPajskr | 12:15696acfeebe | 12 | * @brief FreeMASTER Driver hardware dependent stuff |
| JardaPajskr | 0:fb135bf60f82 | 13 | * |
| JardaPajskr | 0:fb135bf60f82 | 14 | *******************************************************************************/ |
| JardaPajskr | 0:fb135bf60f82 | 15 | |
| JardaPajskr | 12:15696acfeebe | 16 | #ifndef __FREEMASTER_KXX_H |
| JardaPajskr | 12:15696acfeebe | 17 | #define __FREEMASTER_KXX_H |
| JardaPajskr | 0:fb135bf60f82 | 18 | |
| JardaPajskr | 12:15696acfeebe | 19 | /****************************************************************************** |
| JardaPajskr | 12:15696acfeebe | 20 | * Supress warnings generated by compilers |
| JardaPajskr | 12:15696acfeebe | 21 | ******************************************************************************/ |
| JardaPajskr | 12:15696acfeebe | 22 | #if defined(__ICCARM__) |
| JardaPajskr | 12:15696acfeebe | 23 | #pragma diag_suppress=Pe174 |
| JardaPajskr | 12:15696acfeebe | 24 | #pragma diag_suppress=Pe177 |
| JardaPajskr | 12:15696acfeebe | 25 | #pragma diag_suppress=Pe550 |
| JardaPajskr | 12:15696acfeebe | 26 | #elif defined(__CC_ARM) |
| JardaPajskr | 12:15696acfeebe | 27 | #pragma diag_suppress=174 |
| JardaPajskr | 12:15696acfeebe | 28 | #pragma diag_suppress=177 |
| JardaPajskr | 12:15696acfeebe | 29 | #pragma diag_suppress=550 |
| JardaPajskr | 12:15696acfeebe | 30 | #endif |
| JardaPajskr | 0:fb135bf60f82 | 31 | |
| JardaPajskr | 0:fb135bf60f82 | 32 | /****************************************************************************** |
| JardaPajskr | 12:15696acfeebe | 33 | * platform-specific default configuration |
| JardaPajskr | 12:15696acfeebe | 34 | ******************************************************************************/ |
| JardaPajskr | 12:15696acfeebe | 35 | |
| JardaPajskr | 12:15696acfeebe | 36 | /* use 32-bit (EX) commands by default */ |
| JardaPajskr | 12:15696acfeebe | 37 | #ifndef FMSTR_USE_EX_CMDS |
| JardaPajskr | 12:15696acfeebe | 38 | #define FMSTR_USE_EX_CMDS 1 |
| JardaPajskr | 12:15696acfeebe | 39 | #endif |
| JardaPajskr | 0:fb135bf60f82 | 40 | |
| JardaPajskr | 12:15696acfeebe | 41 | /* do not use 16-bit (no-EX) commands by default */ |
| JardaPajskr | 12:15696acfeebe | 42 | #ifndef FMSTR_USE_NOEX_CMDS |
| JardaPajskr | 12:15696acfeebe | 43 | #define FMSTR_USE_NOEX_CMDS 0 |
| JardaPajskr | 0:fb135bf60f82 | 44 | #endif |
| JardaPajskr | 12:15696acfeebe | 45 | |
| JardaPajskr | 12:15696acfeebe | 46 | /* at least one of EX or no-EX command handling must be enabled */ |
| JardaPajskr | 12:15696acfeebe | 47 | #if !FMSTR_USE_EX_CMDS && !FMSTR_USE_NOEX_CMDS |
| JardaPajskr | 12:15696acfeebe | 48 | #error At least one of EX or no-EX command handling must be enabled (please set FMSTR_USE_EX_CMDS) |
| JardaPajskr | 12:15696acfeebe | 49 | #undef FMSTR_USE_EX_CMDS |
| JardaPajskr | 12:15696acfeebe | 50 | #define FMSTR_USE_EX_CMDS 1 |
| JardaPajskr | 0:fb135bf60f82 | 51 | #endif |
| JardaPajskr | 0:fb135bf60f82 | 52 | |
| JardaPajskr | 0:fb135bf60f82 | 53 | /***************************************************************************** |
| JardaPajskr | 12:15696acfeebe | 54 | * Board configuration information |
| JardaPajskr | 12:15696acfeebe | 55 | ******************************************************************************/ |
| JardaPajskr | 12:15696acfeebe | 56 | |
| JardaPajskr | 12:15696acfeebe | 57 | #define FMSTR_PROT_VER 3 /* protocol version 3 */ |
| JardaPajskr | 12:15696acfeebe | 58 | #define FMSTR_CFG_FLAGS FMSTR_CFG_REC_LARGE_MODE /* board info flags */ |
| JardaPajskr | 12:15696acfeebe | 59 | #define FMSTR_CFG_BUS_WIDTH 1 /* data bus width */ |
| JardaPajskr | 12:15696acfeebe | 60 | #define FMSTR_GLOB_VERSION_MAJOR 2 /* driver version */ |
| JardaPajskr | 12:15696acfeebe | 61 | #define FMSTR_GLOB_VERSION_MINOR 0 |
| JardaPajskr | 12:15696acfeebe | 62 | #define FMSTR_IDT_STRING "Kxx FreeMASTER" |
| JardaPajskr | 12:15696acfeebe | 63 | #define FMSTR_TSA_FLAGS 0 |
| JardaPajskr | 12:15696acfeebe | 64 | |
| JardaPajskr | 12:15696acfeebe | 65 | /****************************************************************************** |
| JardaPajskr | 12:15696acfeebe | 66 | * platform-specific types |
| JardaPajskr | 12:15696acfeebe | 67 | ******************************************************************************/ |
| JardaPajskr | 12:15696acfeebe | 68 | |
| JardaPajskr | 12:15696acfeebe | 69 | typedef unsigned char FMSTR_U8; /* smallest memory entity */ |
| JardaPajskr | 12:15696acfeebe | 70 | typedef unsigned short FMSTR_U16; /* 16bit value */ |
| JardaPajskr | 12:15696acfeebe | 71 | typedef unsigned long FMSTR_U32; /* 32bit value */ |
| JardaPajskr | 12:15696acfeebe | 72 | |
| JardaPajskr | 12:15696acfeebe | 73 | typedef signed char FMSTR_S8; /* signed 8bit value */ |
| JardaPajskr | 12:15696acfeebe | 74 | typedef signed short FMSTR_S16; /* signed 16bit value */ |
| JardaPajskr | 12:15696acfeebe | 75 | typedef signed long FMSTR_S32; /* signed 32bit value */ |
| JardaPajskr | 12:15696acfeebe | 76 | |
| JardaPajskr | 12:15696acfeebe | 77 | #if FMSTR_REC_FLOAT_TRIG |
| JardaPajskr | 12:15696acfeebe | 78 | typedef float FMSTR_FLOAT; /* float value */ |
| JardaPajskr | 12:15696acfeebe | 79 | #endif |
| JardaPajskr | 12:15696acfeebe | 80 | |
| JardaPajskr | 12:15696acfeebe | 81 | typedef unsigned char FMSTR_FLAGS; /* type to be union-ed with flags (at least 8 bits) */ |
| JardaPajskr | 12:15696acfeebe | 82 | typedef unsigned char FMSTR_SIZE8; /* one-byte size value */ |
| JardaPajskr | 12:15696acfeebe | 83 | typedef signed short FMSTR_INDEX; /* general for-loop index (must be signed) */ |
| JardaPajskr | 12:15696acfeebe | 84 | |
| JardaPajskr | 12:15696acfeebe | 85 | typedef unsigned char FMSTR_BCHR; /* type of a single character in comm.buffer */ |
| JardaPajskr | 12:15696acfeebe | 86 | typedef unsigned char* FMSTR_BPTR; /* pointer within a communication buffer */ |
| JardaPajskr | 12:15696acfeebe | 87 | |
| JardaPajskr | 12:15696acfeebe | 88 | typedef unsigned char FMSTR_SCISR; /* data type to store SCI status register */ |
| JardaPajskr | 12:15696acfeebe | 89 | |
| JardaPajskr | 12:15696acfeebe | 90 | /****************************************************************************** |
| JardaPajskr | 12:15696acfeebe | 91 | * communication buffer access functions |
| JardaPajskr | 0:fb135bf60f82 | 92 | ******************************************************************************/ |
| JardaPajskr | 12:15696acfeebe | 93 | |
| JardaPajskr | 12:15696acfeebe | 94 | void FMSTR_CopyMemory(FMSTR_ADDR nDestAddr, FMSTR_ADDR nSrcAddr, FMSTR_SIZE8 nSize); |
| JardaPajskr | 12:15696acfeebe | 95 | FMSTR_BPTR FMSTR_CopyToBuffer(FMSTR_BPTR pDestBuff, FMSTR_ADDR nSrcAddr, FMSTR_SIZE8 nSize); |
| JardaPajskr | 12:15696acfeebe | 96 | FMSTR_BPTR FMSTR_CopyFromBuffer(FMSTR_ADDR nDestAddr, FMSTR_BPTR pSrcBuff, FMSTR_SIZE8 nSize); |
| JardaPajskr | 12:15696acfeebe | 97 | void FMSTR_CopyFromBufferWithMask(FMSTR_ADDR nDestAddr, FMSTR_BPTR pSrcBuff, FMSTR_SIZE8 nSize); |
| JardaPajskr | 12:15696acfeebe | 98 | |
| JardaPajskr | 12:15696acfeebe | 99 | /* mixed EX and non-EX commands may occur */ |
| JardaPajskr | 12:15696acfeebe | 100 | #if (FMSTR_USE_EX_CMDS) && (FMSTR_USE_NOEX_CMDS) || (FMSTR_BYTE_BUFFER_ACCESS) |
| JardaPajskr | 12:15696acfeebe | 101 | void FMSTR_SetExAddr(FMSTR_BOOL bNextAddrIsEx); |
| JardaPajskr | 12:15696acfeebe | 102 | #else |
| JardaPajskr | 12:15696acfeebe | 103 | /* otherwise, we always know what addresses are used, (ignore FMSTR_SetExAddr) */ |
| JardaPajskr | 12:15696acfeebe | 104 | #define FMSTR_SetExAddr(bNextAddrIsEx) |
| JardaPajskr | 12:15696acfeebe | 105 | #endif |
| JardaPajskr | 12:15696acfeebe | 106 | |
| JardaPajskr | 12:15696acfeebe | 107 | #if (FMSTR_BYTE_BUFFER_ACCESS) |
| JardaPajskr | 12:15696acfeebe | 108 | FMSTR_BPTR FMSTR_ValueFromBuffer16(FMSTR_U16* pDest, FMSTR_BPTR pSrc); |
| JardaPajskr | 12:15696acfeebe | 109 | FMSTR_BPTR FMSTR_ValueFromBuffer32(FMSTR_U32* pDest, FMSTR_BPTR pSrc); |
| JardaPajskr | 12:15696acfeebe | 110 | FMSTR_BPTR FMSTR_ValueToBuffer16(FMSTR_BPTR pDest, FMSTR_U16 src); |
| JardaPajskr | 12:15696acfeebe | 111 | FMSTR_BPTR FMSTR_ValueToBuffer32(FMSTR_BPTR pDest, FMSTR_U32 src); |
| JardaPajskr | 12:15696acfeebe | 112 | #endif |
| JardaPajskr | 12:15696acfeebe | 113 | |
| JardaPajskr | 12:15696acfeebe | 114 | /********************************************************************************* |
| JardaPajskr | 12:15696acfeebe | 115 | * communication buffer access functions. Most of them are trivial simple on KXX |
| JardaPajskr | 12:15696acfeebe | 116 | *********************************************************************************/ |
| JardaPajskr | 12:15696acfeebe | 117 | |
| JardaPajskr | 12:15696acfeebe | 118 | #define FMSTR_ValueFromBuffer8(pDest, pSrc) \ |
| JardaPajskr | 12:15696acfeebe | 119 | ( (*((FMSTR_U8*)(pDest)) = *(FMSTR_U8*)(pSrc)), (((FMSTR_BPTR)(pSrc))+1) ) |
| JardaPajskr | 12:15696acfeebe | 120 | |
| JardaPajskr | 12:15696acfeebe | 121 | #if !(FMSTR_BYTE_BUFFER_ACCESS) |
| JardaPajskr | 12:15696acfeebe | 122 | #define FMSTR_ValueFromBuffer16(pDest, pSrc) \ |
| JardaPajskr | 12:15696acfeebe | 123 | ( (*((FMSTR_U16*)(pDest)) = *(FMSTR_U16*)(pSrc)), (((FMSTR_BPTR)(pSrc))+2) ) |
| JardaPajskr | 12:15696acfeebe | 124 | |
| JardaPajskr | 12:15696acfeebe | 125 | #define FMSTR_ValueFromBuffer32(pDest, pSrc) \ |
| JardaPajskr | 12:15696acfeebe | 126 | ( (*((FMSTR_U32*)(pDest)) = *(FMSTR_U32*)(pSrc)), (((FMSTR_BPTR)(pSrc))+4) ) |
| JardaPajskr | 12:15696acfeebe | 127 | #endif |
| JardaPajskr | 12:15696acfeebe | 128 | |
| JardaPajskr | 12:15696acfeebe | 129 | #define FMSTR_ValueToBuffer8(pDest, src) \ |
| JardaPajskr | 12:15696acfeebe | 130 | ( (*((FMSTR_U8*)(pDest)) = (FMSTR_U8)(src)), (((FMSTR_BPTR)(pDest))+1) ) |
| JardaPajskr | 12:15696acfeebe | 131 | |
| JardaPajskr | 12:15696acfeebe | 132 | #if !(FMSTR_BYTE_BUFFER_ACCESS) |
| JardaPajskr | 12:15696acfeebe | 133 | #define FMSTR_ValueToBuffer16(pDest, src) \ |
| JardaPajskr | 12:15696acfeebe | 134 | ( (*((FMSTR_U16*)(pDest)) = (FMSTR_U16)(src)), (((FMSTR_BPTR)(pDest))+2) ) |
| JardaPajskr | 12:15696acfeebe | 135 | |
| JardaPajskr | 12:15696acfeebe | 136 | #define FMSTR_ValueToBuffer32(pDest, src) \ |
| JardaPajskr | 12:15696acfeebe | 137 | ( (*((FMSTR_U32*)(pDest)) = (FMSTR_U32)(src)), (((FMSTR_BPTR)(pDest))+4) ) |
| JardaPajskr | 12:15696acfeebe | 138 | #endif |
| JardaPajskr | 12:15696acfeebe | 139 | |
| JardaPajskr | 12:15696acfeebe | 140 | #define FMSTR_SkipInBuffer(pDest, nSize) \ |
| JardaPajskr | 12:15696acfeebe | 141 | ( ((FMSTR_BPTR)(pDest)) + (nSize) ) |
| JardaPajskr | 12:15696acfeebe | 142 | |
| JardaPajskr | 12:15696acfeebe | 143 | |
| JardaPajskr | 12:15696acfeebe | 144 | #define FMSTR_ConstToBuffer8 FMSTR_ValueToBuffer8 |
| JardaPajskr | 12:15696acfeebe | 145 | #define FMSTR_ConstToBuffer16 FMSTR_ValueToBuffer16 |
| JardaPajskr | 12:15696acfeebe | 146 | |
| JardaPajskr | 12:15696acfeebe | 147 | /* EX address used only: fetching 32bit word */ |
| JardaPajskr | 12:15696acfeebe | 148 | #if (FMSTR_USE_EX_CMDS) && !(FMSTR_USE_NOEX_CMDS) && !(FMSTR_BYTE_BUFFER_ACCESS) |
| JardaPajskr | 12:15696acfeebe | 149 | #define FMSTR_AddressFromBuffer(pDest, pSrc) \ |
| JardaPajskr | 12:15696acfeebe | 150 | FMSTR_ValueFromBuffer32(pDest, pSrc) |
| JardaPajskr | 12:15696acfeebe | 151 | #define FMSTR_AddressToBuffer(pDest, nAddr) \ |
| JardaPajskr | 12:15696acfeebe | 152 | FMSTR_ValueToBuffer32(pDest, nAddr) |
| JardaPajskr | 12:15696acfeebe | 153 | |
| JardaPajskr | 12:15696acfeebe | 154 | /* no-EX address used only: fetching 16bit word */ |
| JardaPajskr | 12:15696acfeebe | 155 | #elif !(FMSTR_USE_EX_CMDS) && (FMSTR_USE_NOEX_CMDS) && !(FMSTR_BYTE_BUFFER_ACCESS) |
| JardaPajskr | 12:15696acfeebe | 156 | #define FMSTR_AddressFromBuffer(pDest, pSrc) \ |
| JardaPajskr | 12:15696acfeebe | 157 | FMSTR_ValueFromBuffer16(pDest, pSrc) |
| JardaPajskr | 12:15696acfeebe | 158 | #define FMSTR_AddressToBuffer(pDest, nAddr) \ |
| JardaPajskr | 12:15696acfeebe | 159 | FMSTR_ValueToBuffer16(pDest, nAddr) |
| JardaPajskr | 12:15696acfeebe | 160 | |
| JardaPajskr | 12:15696acfeebe | 161 | /* mixed addresses used, need to process it programatically */ |
| JardaPajskr | 12:15696acfeebe | 162 | #else |
| JardaPajskr | 12:15696acfeebe | 163 | FMSTR_BPTR FMSTR_AddressFromBuffer(FMSTR_ADDR* pAddr, FMSTR_BPTR pSrc); |
| JardaPajskr | 12:15696acfeebe | 164 | FMSTR_BPTR FMSTR_AddressToBuffer(FMSTR_BPTR pDest, FMSTR_ADDR nAddr); |
| JardaPajskr | 12:15696acfeebe | 165 | #endif |
| JardaPajskr | 12:15696acfeebe | 166 | |
| JardaPajskr | 12:15696acfeebe | 167 | #define FMSTR_GetS8(addr) ( *(FMSTR_S8*)(addr) ) |
| JardaPajskr | 12:15696acfeebe | 168 | #define FMSTR_GetU8(addr) ( *(FMSTR_U8*)(addr) ) |
| JardaPajskr | 12:15696acfeebe | 169 | #define FMSTR_GetS16(addr) ( *(FMSTR_S16*)(addr) ) |
| JardaPajskr | 12:15696acfeebe | 170 | #define FMSTR_GetU16(addr) ( *(FMSTR_U16*)(addr) ) |
| JardaPajskr | 12:15696acfeebe | 171 | #define FMSTR_GetS32(addr) ( *(FMSTR_S32*)(addr) ) |
| JardaPajskr | 12:15696acfeebe | 172 | #define FMSTR_GetU32(addr) ( *(FMSTR_U32*)(addr) ) |
| JardaPajskr | 12:15696acfeebe | 173 | |
| JardaPajskr | 12:15696acfeebe | 174 | #if FMSTR_REC_FLOAT_TRIG |
| JardaPajskr | 12:15696acfeebe | 175 | #define FMSTR_GetFloat(addr) ( *(FMSTR_FLOAT*)(addr) ) |
| JardaPajskr | 0:fb135bf60f82 | 176 | #endif |
| JardaPajskr | 0:fb135bf60f82 | 177 | |
| JardaPajskr | 12:15696acfeebe | 178 | /**************************************************************************************** |
| JardaPajskr | 12:15696acfeebe | 179 | * Other helper macros |
| JardaPajskr | 12:15696acfeebe | 180 | *****************************************************************************************/ |
| JardaPajskr | 12:15696acfeebe | 181 | |
| JardaPajskr | 12:15696acfeebe | 182 | /* This macro assigns C pointer to FMSTR_ADDR-typed variable */ |
| JardaPajskr | 12:15696acfeebe | 183 | #define FMSTR_PTR2ADDR(tmpAddr,ptr) ( tmpAddr = (FMSTR_ADDR) (FMSTR_U8*) ptr ) |
| JardaPajskr | 12:15696acfeebe | 184 | #define FMSTR_ARR2ADDR FMSTR_PTR2ADDR |
| JardaPajskr | 12:15696acfeebe | 185 | |
| JardaPajskr | 12:15696acfeebe | 186 | /**************************************************************************************** |
| JardaPajskr | 12:15696acfeebe | 187 | * Platform-specific configuration |
| JardaPajskr | 12:15696acfeebe | 188 | *****************************************************************************************/ |
| JardaPajskr | 12:15696acfeebe | 189 | |
| JardaPajskr | 12:15696acfeebe | 190 | /* FlexCAN functionality tested on KXX */ |
| JardaPajskr | 12:15696acfeebe | 191 | #define FMSTR_CANHW_FLEXCAN 1 |
| JardaPajskr | 12:15696acfeebe | 192 | |
| JardaPajskr | 12:15696acfeebe | 193 | /**************************************************************************************** |
| JardaPajskr | 12:15696acfeebe | 194 | * General peripheral space access macros |
| JardaPajskr | 12:15696acfeebe | 195 | *****************************************************************************************/ |
| JardaPajskr | 12:15696acfeebe | 196 | |
| JardaPajskr | 12:15696acfeebe | 197 | #define FMSTR_SETREG8(base, offset, value) (*(volatile FMSTR_U8*)(((FMSTR_U32)(base))+(offset)) = value) |
| JardaPajskr | 12:15696acfeebe | 198 | #define FMSTR_GETREG8(base, offset) (*(volatile FMSTR_U8*)(((FMSTR_U32)(base))+(offset))) |
| JardaPajskr | 12:15696acfeebe | 199 | #define FMSTR_SETBIT8(base, offset, bit) (*(volatile FMSTR_U8*)(((FMSTR_U32)(base))+(offset)) |= bit) |
| JardaPajskr | 12:15696acfeebe | 200 | #define FMSTR_CLRBIT8(base, offset, bit) (*(volatile FMSTR_U8*)(((FMSTR_U32)(base))+(offset)) &= (FMSTR_U16)~((FMSTR_U16)(bit))) |
| JardaPajskr | 12:15696acfeebe | 201 | #define FMSTR_SETREG16(base, offset, value) (*(volatile FMSTR_U16*)(((FMSTR_U32)(base))+(offset)) = value) |
| JardaPajskr | 12:15696acfeebe | 202 | #define FMSTR_GETREG16(base, offset) (*(volatile FMSTR_U16*)(((FMSTR_U32)(base))+(offset))) |
| JardaPajskr | 12:15696acfeebe | 203 | #define FMSTR_SETBIT16(base, offset, bit) (*(volatile FMSTR_U16*)(((FMSTR_U32)(base))+(offset)) |= bit) |
| JardaPajskr | 12:15696acfeebe | 204 | #define FMSTR_CLRBIT16(base, offset, bit) (*(volatile FMSTR_U16*)(((FMSTR_U32)(base))+(offset)) &= (FMSTR_U16)~((FMSTR_U16)(bit))) |
| JardaPajskr | 12:15696acfeebe | 205 | #define FMSTR_TSTBIT16(base, offset, bit) (*(volatile FMSTR_U16*)(((FMSTR_U32)(base))+(offset)) & (bit)) |
| JardaPajskr | 12:15696acfeebe | 206 | #define FMSTR_SETREG32(base, offset, value) (*(volatile FMSTR_U32*)(((FMSTR_U32)(base))+(offset)) = value) |
| JardaPajskr | 12:15696acfeebe | 207 | #define FMSTR_GETREG32(base, offset) (*(volatile FMSTR_U32*)(((FMSTR_U32)(base))+(offset))) |
| JardaPajskr | 12:15696acfeebe | 208 | #define FMSTR_SETBIT32(base, offset, bit) ((*(volatile FMSTR_U32*)(((FMSTR_U32)(base))+(offset))) |= bit) |
| JardaPajskr | 12:15696acfeebe | 209 | #define FMSTR_CLRBIT32(base, offset, bit) ((*(volatile FMSTR_U32*)(((FMSTR_U32)(base))+(offset))) &= ~(bit)) |
| JardaPajskr | 12:15696acfeebe | 210 | #define FMSTR_TSTBIT32(base, offset, bit) (*(volatile FMSTR_U32*)(((FMSTR_U32)(base))+(offset)) & (bit)) |
| JardaPajskr | 12:15696acfeebe | 211 | |
| JardaPajskr | 12:15696acfeebe | 212 | /**************************************************************************************** |
| JardaPajskr | 12:15696acfeebe | 213 | * SCI module constants |
| JardaPajskr | 12:15696acfeebe | 214 | *****************************************************************************************/ |
| JardaPajskr | 0:fb135bf60f82 | 215 | |
| JardaPajskr | 12:15696acfeebe | 216 | /* SCI module registers */ |
| JardaPajskr | 12:15696acfeebe | 217 | #define FMSTR_SCIBDH_OFFSET 0 |
| JardaPajskr | 12:15696acfeebe | 218 | #define FMSTR_SCIBDL_OFFSET 1 |
| JardaPajskr | 12:15696acfeebe | 219 | #define FMSTR_SCIC1_OFFSET 2 |
| JardaPajskr | 12:15696acfeebe | 220 | #define FMSTR_SCIC2_OFFSET 3 |
| JardaPajskr | 12:15696acfeebe | 221 | #define FMSTR_SCIS1_OFFSET 4 |
| JardaPajskr | 12:15696acfeebe | 222 | #define FMSTR_SCIS2_OFFSET 5 |
| JardaPajskr | 12:15696acfeebe | 223 | #define FMSTR_SCIC3_OFFSET 6 |
| JardaPajskr | 12:15696acfeebe | 224 | #define FMSTR_SCIDR_OFFSET 7 |
| JardaPajskr | 12:15696acfeebe | 225 | |
| JardaPajskr | 12:15696acfeebe | 226 | /* SCI Control Register bits */ |
| JardaPajskr | 12:15696acfeebe | 227 | #define FMSTR_SCIC1_LOOPS 0x80 |
| JardaPajskr | 12:15696acfeebe | 228 | #define FMSTR_SCIC1_SWAI 0x40 |
| JardaPajskr | 12:15696acfeebe | 229 | #define FMSTR_SCIC1_RSRC 0x20 |
| JardaPajskr | 12:15696acfeebe | 230 | #define FMSTR_SCIC1_M 0x10 |
| JardaPajskr | 12:15696acfeebe | 231 | #define FMSTR_SCIC1_WAKE 0x08 |
| JardaPajskr | 12:15696acfeebe | 232 | #define FMSTR_SCIC1_ILT 0x04 |
| JardaPajskr | 12:15696acfeebe | 233 | #define FMSTR_SCIC1_PE 0x02 |
| JardaPajskr | 12:15696acfeebe | 234 | #define FMSTR_SCIC1_PT 0x01 |
| JardaPajskr | 12:15696acfeebe | 235 | #define FMSTR_SCIC2_TIE 0x80 |
| JardaPajskr | 12:15696acfeebe | 236 | #define FMSTR_SCIC2_TCIE 0x40 |
| JardaPajskr | 12:15696acfeebe | 237 | #define FMSTR_SCIC2_RIE 0x20 |
| JardaPajskr | 12:15696acfeebe | 238 | #define FMSTR_SCIC2_ILIE 0x10 |
| JardaPajskr | 12:15696acfeebe | 239 | #define FMSTR_SCIC2_TE 0x08 |
| JardaPajskr | 12:15696acfeebe | 240 | #define FMSTR_SCIC2_RE 0x04 |
| JardaPajskr | 12:15696acfeebe | 241 | #define FMSTR_SCIC2_RWU 0x02 |
| JardaPajskr | 12:15696acfeebe | 242 | #define FMSTR_SCIC2_SBK 0x01 |
| JardaPajskr | 12:15696acfeebe | 243 | |
| JardaPajskr | 12:15696acfeebe | 244 | /* SCI Status registers bits */ |
| JardaPajskr | 12:15696acfeebe | 245 | #define FMSTR_SCISR_TDRE 0x80 |
| JardaPajskr | 12:15696acfeebe | 246 | #define FMSTR_SCISR_TC 0x40 |
| JardaPajskr | 12:15696acfeebe | 247 | #define FMSTR_SCISR_RDRF 0x20 |
| JardaPajskr | 12:15696acfeebe | 248 | #define FMSTR_SCISR_IDLE 0x10 |
| JardaPajskr | 12:15696acfeebe | 249 | #define FMSTR_SCISR_OR 0x08 |
| JardaPajskr | 12:15696acfeebe | 250 | #define FMSTR_SCISR_NF 0x04 |
| JardaPajskr | 12:15696acfeebe | 251 | #define FMSTR_SCISR_FE 0x02 |
| JardaPajskr | 12:15696acfeebe | 252 | #define FMSTR_SCISR_PF 0x01 |
| JardaPajskr | 12:15696acfeebe | 253 | #define FMSTR_SCISR2_BRK13 0x04 |
| JardaPajskr | 12:15696acfeebe | 254 | #define FMSTR_SCISR2_TXDIR 0x02 |
| JardaPajskr | 12:15696acfeebe | 255 | #define FMSTR_SCISR2_RAF 0x01 |
| JardaPajskr | 0:fb135bf60f82 | 256 | |
| JardaPajskr | 12:15696acfeebe | 257 | /* SCI module registers */ |
| JardaPajskr | 12:15696acfeebe | 258 | #define FMSTR_SCIBAUD_OFFSET 0 |
| JardaPajskr | 12:15696acfeebe | 259 | #define FMSTR_SCISTATUS_OFFSET 4 |
| JardaPajskr | 12:15696acfeebe | 260 | #define FMSTR_SCICTRL_OFFSET 8 |
| JardaPajskr | 12:15696acfeebe | 261 | #define FMSTR_SCIDATA_OFFSET 12 |
| JardaPajskr | 12:15696acfeebe | 262 | |
| JardaPajskr | 12:15696acfeebe | 263 | /* SCI Control Register bits */ |
| JardaPajskr | 12:15696acfeebe | 264 | #define FMSTR_SCICTRL_TE 0x080000 |
| JardaPajskr | 12:15696acfeebe | 265 | #define FMSTR_SCICTRL_RE 0x040000 |
| JardaPajskr | 12:15696acfeebe | 266 | #define FMSTR_SCICTRL_TIE 0x800000 |
| JardaPajskr | 12:15696acfeebe | 267 | #define FMSTR_SCICTRL_TCIE 0x400000 |
| JardaPajskr | 12:15696acfeebe | 268 | #define FMSTR_SCICTRL_RIE 0x200000 |
| JardaPajskr | 12:15696acfeebe | 269 | |
| JardaPajskr | 12:15696acfeebe | 270 | |
| JardaPajskr | 12:15696acfeebe | 271 | /******************************************************************************************* |
| JardaPajskr | 12:15696acfeebe | 272 | * SCI access macros |
| JardaPajskr | 12:15696acfeebe | 273 | *****************************************************************************************/ |
| JardaPajskr | 12:15696acfeebe | 274 | |
| JardaPajskr | 12:15696acfeebe | 275 | #if FMSTR_USE_LPUART |
| JardaPajskr | 12:15696acfeebe | 276 | |
| JardaPajskr | 12:15696acfeebe | 277 | /* transmitter enable/disable */ |
| JardaPajskr | 12:15696acfeebe | 278 | #define FMSTR_SCI_TE() FMSTR_SETBIT32(FMSTR_SCI_BASE, FMSTR_SCICTRL_OFFSET, FMSTR_SCICTRL_TE) |
| JardaPajskr | 12:15696acfeebe | 279 | #define FMSTR_SCI_TD() FMSTR_CLRBIT32(FMSTR_SCI_BASE, FMSTR_SCICTRL_OFFSET, FMSTR_SCICTRL_TE) |
| JardaPajskr | 12:15696acfeebe | 280 | |
| JardaPajskr | 12:15696acfeebe | 281 | /* receiver enable/disable */ |
| JardaPajskr | 12:15696acfeebe | 282 | #define FMSTR_SCI_RE() FMSTR_SETBIT32(FMSTR_SCI_BASE, FMSTR_SCICTRL_OFFSET, FMSTR_SCICTRL_RE) |
| JardaPajskr | 12:15696acfeebe | 283 | #define FMSTR_SCI_RD() FMSTR_CLRBIT32(FMSTR_SCI_BASE, FMSTR_SCICTRL_OFFSET, FMSTR_SCICTRL_RE) |
| JardaPajskr | 12:15696acfeebe | 284 | |
| JardaPajskr | 12:15696acfeebe | 285 | #define FMSTR_SCI_TE_RE() FMSTR_SETBIT32(FMSTR_SCI_BASE, FMSTR_SCICTRL_OFFSET, FMSTR_SCICTRL_RE | FMSTR_SCICTRL_TE) |
| JardaPajskr | 12:15696acfeebe | 286 | |
| JardaPajskr | 12:15696acfeebe | 287 | /* Transmitter-empty interrupt enable/disable */ |
| JardaPajskr | 12:15696acfeebe | 288 | #define FMSTR_SCI_ETXI() FMSTR_SETBIT32(FMSTR_SCI_BASE, FMSTR_SCICTRL_OFFSET, FMSTR_SCICTRL_TIE) |
| JardaPajskr | 12:15696acfeebe | 289 | #define FMSTR_SCI_DTXI() FMSTR_CLRBIT32(FMSTR_SCI_BASE, FMSTR_SCICTRL_OFFSET, FMSTR_SCICTRL_TIE) |
| JardaPajskr | 12:15696acfeebe | 290 | |
| JardaPajskr | 12:15696acfeebe | 291 | /* Receiver-full interrupt enable/disable */ |
| JardaPajskr | 12:15696acfeebe | 292 | #define FMSTR_SCI_ERXI() FMSTR_SETBIT32(FMSTR_SCI_BASE, FMSTR_SCICTRL_OFFSET, FMSTR_SCICTRL_RIE) |
| JardaPajskr | 12:15696acfeebe | 293 | #define FMSTR_SCI_DRXI() FMSTR_CLRBIT32(FMSTR_SCI_BASE, FMSTR_SCICTRL_OFFSET, FMSTR_SCICTRL_RIE) |
| JardaPajskr | 12:15696acfeebe | 294 | |
| JardaPajskr | 12:15696acfeebe | 295 | /* Tranmsit character */ |
| JardaPajskr | 12:15696acfeebe | 296 | #define FMSTR_SCI_PUTCHAR(ch) FMSTR_SETREG8(FMSTR_SCI_BASE, FMSTR_SCIDATA_OFFSET, ch) |
| JardaPajskr | 12:15696acfeebe | 297 | |
| JardaPajskr | 12:15696acfeebe | 298 | /* Get received character */ |
| JardaPajskr | 12:15696acfeebe | 299 | #define FMSTR_SCI_GETCHAR() FMSTR_GETREG8(FMSTR_SCI_BASE, FMSTR_SCIDATA_OFFSET) |
| JardaPajskr | 0:fb135bf60f82 | 300 | |
| JardaPajskr | 12:15696acfeebe | 301 | /* read status register */ |
| JardaPajskr | 12:15696acfeebe | 302 | #define FMSTR_SCI_GETSR() FMSTR_GETREG32(FMSTR_SCI_BASE, FMSTR_SCISTATUS_OFFSET) |
| JardaPajskr | 12:15696acfeebe | 303 | |
| JardaPajskr | 12:15696acfeebe | 304 | /* read & clear status register */ |
| JardaPajskr | 12:15696acfeebe | 305 | /*#define FMSTR_SCI_RDCLRSR() do{\ |
| JardaPajskr | 12:15696acfeebe | 306 | unsigned long st = FMSTR_GETREG32(FMSTR_SCI_BASE, FMSTR_SCISTATUS_OFFSET);\ |
| JardaPajskr | 12:15696acfeebe | 307 | FMSTR_SETREG32(FMSTR_SCI_BASE, FMSTR_SCISTATUS_OFFSET, st);\ |
| JardaPajskr | 12:15696acfeebe | 308 | }while(0)*/ |
| JardaPajskr | 12:15696acfeebe | 309 | #define FMSTR_SCI_RDCLRSR() (FMSTR_GETREG32(FMSTR_SCI_BASE, FMSTR_SCISTATUS_OFFSET)>>16);\ |
| JardaPajskr | 12:15696acfeebe | 310 | FMSTR_SETREG32(FMSTR_SCI_BASE, FMSTR_SCISTATUS_OFFSET, FMSTR_GETREG32(FMSTR_SCI_BASE, FMSTR_SCISTATUS_OFFSET)); |
| JardaPajskr | 12:15696acfeebe | 311 | |
| JardaPajskr | 12:15696acfeebe | 312 | #else |
| JardaPajskr | 12:15696acfeebe | 313 | |
| JardaPajskr | 12:15696acfeebe | 314 | /* transmitter enable/disable */ |
| JardaPajskr | 12:15696acfeebe | 315 | #define FMSTR_SCI_TE() FMSTR_SETBIT8(FMSTR_SCI_BASE, FMSTR_SCIC2_OFFSET, FMSTR_SCIC2_TE) |
| JardaPajskr | 12:15696acfeebe | 316 | #define FMSTR_SCI_TD() FMSTR_CLRBIT8(FMSTR_SCI_BASE, FMSTR_SCIC2_OFFSET, FMSTR_SCIC2_TE) |
| JardaPajskr | 12:15696acfeebe | 317 | |
| JardaPajskr | 12:15696acfeebe | 318 | /* receiver enable/disable */ |
| JardaPajskr | 12:15696acfeebe | 319 | #define FMSTR_SCI_RE() FMSTR_SETBIT8(FMSTR_SCI_BASE, FMSTR_SCIC2_OFFSET, FMSTR_SCIC2_RE) |
| JardaPajskr | 12:15696acfeebe | 320 | #define FMSTR_SCI_RD() FMSTR_CLRBIT8(FMSTR_SCI_BASE, FMSTR_SCIC2_OFFSET, FMSTR_SCIC2_RE) |
| JardaPajskr | 0:fb135bf60f82 | 321 | |
| JardaPajskr | 12:15696acfeebe | 322 | #define FMSTR_SCI_TE_RE() FMSTR_SETBIT8(FMSTR_SCI_BASE, FMSTR_SCIC2_OFFSET, FMSTR_SCIC2_RE | FMSTR_SCIC2_TE) |
| JardaPajskr | 12:15696acfeebe | 323 | |
| JardaPajskr | 12:15696acfeebe | 324 | /* Transmitter-empty interrupt enable/disable */ |
| JardaPajskr | 12:15696acfeebe | 325 | #define FMSTR_SCI_ETXI() FMSTR_SETBIT8(FMSTR_SCI_BASE, FMSTR_SCIC2_OFFSET, FMSTR_SCIC2_TIE) |
| JardaPajskr | 12:15696acfeebe | 326 | #define FMSTR_SCI_DTXI() FMSTR_CLRBIT8(FMSTR_SCI_BASE, FMSTR_SCIC2_OFFSET, FMSTR_SCIC2_TIE) |
| JardaPajskr | 12:15696acfeebe | 327 | |
| JardaPajskr | 12:15696acfeebe | 328 | /* Receiver-full interrupt enable/disable */ |
| JardaPajskr | 12:15696acfeebe | 329 | #define FMSTR_SCI_ERXI() FMSTR_SETBIT8(FMSTR_SCI_BASE, FMSTR_SCIC2_OFFSET, FMSTR_SCIC2_RIE) |
| JardaPajskr | 12:15696acfeebe | 330 | #define FMSTR_SCI_DRXI() FMSTR_CLRBIT8(FMSTR_SCI_BASE, FMSTR_SCIC2_OFFSET, FMSTR_SCIC2_RIE) |
| JardaPajskr | 0:fb135bf60f82 | 331 | |
| JardaPajskr | 12:15696acfeebe | 332 | /* Tranmsit character */ |
| JardaPajskr | 12:15696acfeebe | 333 | #define FMSTR_SCI_PUTCHAR(ch) FMSTR_SETREG8(FMSTR_SCI_BASE, FMSTR_SCIDR_OFFSET, ch) |
| JardaPajskr | 12:15696acfeebe | 334 | |
| JardaPajskr | 12:15696acfeebe | 335 | /* Get received character */ |
| JardaPajskr | 12:15696acfeebe | 336 | #define FMSTR_SCI_GETCHAR() FMSTR_GETREG8(FMSTR_SCI_BASE, FMSTR_SCIDR_OFFSET) |
| JardaPajskr | 12:15696acfeebe | 337 | |
| JardaPajskr | 12:15696acfeebe | 338 | /* read status register */ |
| JardaPajskr | 12:15696acfeebe | 339 | #define FMSTR_SCI_GETSR() FMSTR_GETREG8(FMSTR_SCI_BASE, FMSTR_SCIS1_OFFSET) |
| JardaPajskr | 12:15696acfeebe | 340 | |
| JardaPajskr | 12:15696acfeebe | 341 | /* read & clear status register */ |
| JardaPajskr | 12:15696acfeebe | 342 | #define FMSTR_SCI_RDCLRSR() FMSTR_GETREG8(FMSTR_SCI_BASE, FMSTR_SCIS1_OFFSET) |
| JardaPajskr | 12:15696acfeebe | 343 | |
| JardaPajskr | 0:fb135bf60f82 | 344 | #endif |
| JardaPajskr | 0:fb135bf60f82 | 345 | |
| JardaPajskr | 12:15696acfeebe | 346 | /**************************************************************************************** |
| JardaPajskr | 12:15696acfeebe | 347 | * FCAN module constants |
| JardaPajskr | 12:15696acfeebe | 348 | *****************************************************************************************/ |
| JardaPajskr | 12:15696acfeebe | 349 | |
| JardaPajskr | 12:15696acfeebe | 350 | /* FCAN module MB CODEs */ |
| JardaPajskr | 12:15696acfeebe | 351 | #define FMSTR_FCANMB_CODE_MASK 0x0F /* defines mask of codes */ |
| JardaPajskr | 12:15696acfeebe | 352 | |
| JardaPajskr | 12:15696acfeebe | 353 | #define FMSTR_FCANMB_CRXVOID 0x00 /* buffer void after received data read-out */ |
| JardaPajskr | 12:15696acfeebe | 354 | #define FMSTR_FCANMB_CRXEMPTY 0x04 /* active and empty */ |
| JardaPajskr | 12:15696acfeebe | 355 | |
| JardaPajskr | 12:15696acfeebe | 356 | #define FMSTR_FCANMB_CTXTRANS_ONCE 0x0C /* Initialize transmitting data from buffer */ |
| JardaPajskr | 12:15696acfeebe | 357 | #define FMSTR_FCANMB_CTXREADY 0x08 /* Message buffer not ready for transmit */ |
| JardaPajskr | 12:15696acfeebe | 358 | |
| JardaPajskr | 12:15696acfeebe | 359 | /* FCAN module registers offsets */ |
| JardaPajskr | 12:15696acfeebe | 360 | #define FMSTR_FCANTMR_OFFSET 0x08 |
| JardaPajskr | 12:15696acfeebe | 361 | #define FMSTR_FCANIER2_OFFSET 0x24 |
| JardaPajskr | 12:15696acfeebe | 362 | #define FMSTR_FCANIER1_OFFSET 0x28 |
| JardaPajskr | 12:15696acfeebe | 363 | #define FMSTR_FCANIFR2_OFFSET 0x2C |
| JardaPajskr | 12:15696acfeebe | 364 | #define FMSTR_FCANIFR1_OFFSET 0x30 |
| JardaPajskr | 12:15696acfeebe | 365 | #define FMSTR_FCANRXFG_OFFSET (0x80 + ((FMSTR_FLEXCAN_RXMB) * 0x10)) |
| JardaPajskr | 12:15696acfeebe | 366 | #define FMSTR_FCANTXFG_OFFSET (0x80 + ((FMSTR_FLEXCAN_TXMB) * 0x10)) |
| JardaPajskr | 12:15696acfeebe | 367 | |
| JardaPajskr | 12:15696acfeebe | 368 | /* FCAN MB registers offsets (must also add FCANxxFG_OFFSET) */ |
| JardaPajskr | 12:15696acfeebe | 369 | #define FMSTR_FCMBCSR 0x00 |
| JardaPajskr | 12:15696acfeebe | 370 | #define FMSTR_FCMBIDR0 0x04 |
| JardaPajskr | 12:15696acfeebe | 371 | #define FMSTR_FCMBIDR1 0x05 |
| JardaPajskr | 12:15696acfeebe | 372 | #define FMSTR_FCMBIDR2 0x06 |
| JardaPajskr | 12:15696acfeebe | 373 | #define FMSTR_FCMBIDR3 0x07 |
| JardaPajskr | 12:15696acfeebe | 374 | #define FMSTR_FCMBDSR0 0x0B |
| JardaPajskr | 12:15696acfeebe | 375 | #define FMSTR_FCMBDSR1 0x0A |
| JardaPajskr | 12:15696acfeebe | 376 | #define FMSTR_FCMBDSR2 0x09 |
| JardaPajskr | 12:15696acfeebe | 377 | #define FMSTR_FCMBDSR3 0x08 |
| JardaPajskr | 12:15696acfeebe | 378 | #define FMSTR_FCMBDSR4 0x0F |
| JardaPajskr | 12:15696acfeebe | 379 | #define FMSTR_FCMBDSR5 0x0E |
| JardaPajskr | 12:15696acfeebe | 380 | #define FMSTR_FCMBDSR6 0x0D |
| JardaPajskr | 12:15696acfeebe | 381 | #define FMSTR_FCMBDSR7 0x0C |
| JardaPajskr | 12:15696acfeebe | 382 | |
| JardaPajskr | 12:15696acfeebe | 383 | /* FCAN CANMSCSR */ |
| JardaPajskr | 12:15696acfeebe | 384 | #define FMSTR_FCANCTRL_IDE 0x20 |
| JardaPajskr | 12:15696acfeebe | 385 | #define FMSTR_FCANCTRL_STD_RTR 0x10 |
| JardaPajskr | 12:15696acfeebe | 386 | #define FMSTR_FCANCTRL_EXT_RTR 0x10 |
| JardaPajskr | 12:15696acfeebe | 387 | #define FMSTR_FCANCTRL_EXT_SRR 0x40 |
| JardaPajskr | 12:15696acfeebe | 388 | |
| JardaPajskr | 12:15696acfeebe | 389 | /* FCAN ID flags */ |
| JardaPajskr | 12:15696acfeebe | 390 | #define FMSTR_FCANID0_EXT_FLG 0x80 |
| JardaPajskr | 12:15696acfeebe | 391 | |
| JardaPajskr | 12:15696acfeebe | 392 | /* FCAN: enable/disable CAN RX/TX interrupts */ |
| JardaPajskr | 12:15696acfeebe | 393 | #define FMSTR_FCAN_ETXI() ( ((FMSTR_FLEXCAN_TXMB)&0x20) ? \ |
| JardaPajskr | 12:15696acfeebe | 394 | FMSTR_SETBIT32(FMSTR_CAN_BASE, FMSTR_FCANIER2_OFFSET, (1<<((FMSTR_FLEXCAN_TXMB)-32))):\ |
| JardaPajskr | 12:15696acfeebe | 395 | FMSTR_SETBIT32(FMSTR_CAN_BASE, FMSTR_FCANIER1_OFFSET, (1<<(FMSTR_FLEXCAN_TXMB))) ) |
| JardaPajskr | 12:15696acfeebe | 396 | #define FMSTR_FCAN_DTXI() ( ((FMSTR_FLEXCAN_TXMB)&0x20) ? \ |
| JardaPajskr | 12:15696acfeebe | 397 | FMSTR_CLRBIT32(FMSTR_CAN_BASE, FMSTR_FCANIER2_OFFSET, (1<<((FMSTR_FLEXCAN_TXMB)-32))):\ |
| JardaPajskr | 12:15696acfeebe | 398 | FMSTR_CLRBIT32(FMSTR_CAN_BASE, FMSTR_FCANIER1_OFFSET, (1<<(FMSTR_FLEXCAN_TXMB))) ) |
| JardaPajskr | 12:15696acfeebe | 399 | #define FMSTR_FCAN_ERXI() ( ((FMSTR_FLEXCAN_RXMB)&0x20) ? \ |
| JardaPajskr | 12:15696acfeebe | 400 | FMSTR_SETBIT32(FMSTR_CAN_BASE, FMSTR_FCANIER2_OFFSET, (1<<((FMSTR_FLEXCAN_RXMB)-32))):\ |
| JardaPajskr | 12:15696acfeebe | 401 | FMSTR_SETBIT32(FMSTR_CAN_BASE, FMSTR_FCANIER1_OFFSET, (1<<(FMSTR_FLEXCAN_RXMB))) ) |
| JardaPajskr | 12:15696acfeebe | 402 | #define FMSTR_FCAN_DRXI() ( ((FMSTR_FLEXCAN_RXMB)&0x20) ? \ |
| JardaPajskr | 12:15696acfeebe | 403 | FMSTR_CLRBIT32(FMSTR_CAN_BASE, FMSTR_FCANIER2_OFFSET, (1<<((FMSTR_FLEXCAN_RXMB)-32))):\ |
| JardaPajskr | 12:15696acfeebe | 404 | FMSTR_CLRBIT32(FMSTR_CAN_BASE, FMSTR_FCANIER1_OFFSET, (1<<(FMSTR_FLEXCAN_RXMB))) ) |
| JardaPajskr | 12:15696acfeebe | 405 | |
| JardaPajskr | 12:15696acfeebe | 406 | /* FCAN: read RX status register */ |
| JardaPajskr | 12:15696acfeebe | 407 | #define FMSTR_FCAN_TEST_RXFLG() ( ((FMSTR_FLEXCAN_RXMB)&0x20) ? \ |
| JardaPajskr | 12:15696acfeebe | 408 | FMSTR_TSTBIT32(FMSTR_CAN_BASE, FMSTR_FCANIFR2_OFFSET, (1<<((FMSTR_FLEXCAN_RXMB)-32))):\ |
| JardaPajskr | 12:15696acfeebe | 409 | FMSTR_TSTBIT32(FMSTR_CAN_BASE, FMSTR_FCANIFR1_OFFSET, (1<<(FMSTR_FLEXCAN_RXMB))) ) |
| JardaPajskr | 12:15696acfeebe | 410 | #define FMSTR_FCAN_CLEAR_RXFLG() ( ((FMSTR_FLEXCAN_RXMB)&0x20) ? \ |
| JardaPajskr | 12:15696acfeebe | 411 | FMSTR_SETREG32(FMSTR_CAN_BASE, FMSTR_FCANIFR2_OFFSET, (1<<((FMSTR_FLEXCAN_RXMB)-32))):\ |
| JardaPajskr | 12:15696acfeebe | 412 | FMSTR_SETREG32(FMSTR_CAN_BASE, FMSTR_FCANIFR1_OFFSET, (1<<(FMSTR_FLEXCAN_RXMB))) ) |
| JardaPajskr | 12:15696acfeebe | 413 | |
| JardaPajskr | 12:15696acfeebe | 414 | /* FCAN: read TX status register */ |
| JardaPajskr | 12:15696acfeebe | 415 | #define FMSTR_FCAN_TEST_TXFLG() ( ((FMSTR_FLEXCAN_TXMB)&0x20) ? \ |
| JardaPajskr | 12:15696acfeebe | 416 | FMSTR_TSTBIT32(FMSTR_CAN_BASE, FMSTR_FCANIFR2_OFFSET, (1<<((FMSTR_FLEXCAN_TXMB)-32))):\ |
| JardaPajskr | 12:15696acfeebe | 417 | FMSTR_TSTBIT32(FMSTR_CAN_BASE, FMSTR_FCANIFR1_OFFSET, (1<<(FMSTR_FLEXCAN_TXMB))) ) |
| JardaPajskr | 12:15696acfeebe | 418 | |
| JardaPajskr | 12:15696acfeebe | 419 | /* FCAN: read TX MB status register */ |
| JardaPajskr | 12:15696acfeebe | 420 | #define FMSTR_FCAN_GET_MBSTATUS() (FMSTR_GETREG8(FMSTR_CAN_BASE, FMSTR_FCANTXFG_OFFSET + FMSTR_FCMBCSR + 3)&FMSTR_FCANMB_CODE_MASK) |
| JardaPajskr | 12:15696acfeebe | 421 | |
| JardaPajskr | 12:15696acfeebe | 422 | /* FCAN: id to idr translation */ |
| JardaPajskr | 12:15696acfeebe | 423 | #define FMSTR_FCAN_MAKEIDR0(id) ((FMSTR_U8)( ((id)&FMSTR_CAN_EXTID) ? ((((id)>>24)&0x1f) | FMSTR_FCANID0_EXT_FLG) : (((id)>>6)&0x1f) )) |
| JardaPajskr | 12:15696acfeebe | 424 | #define FMSTR_FCAN_MAKEIDR1(id) ((FMSTR_U8)( ((id)&FMSTR_CAN_EXTID) ? ((id)>>16) : ((id)<<2) )) |
| JardaPajskr | 12:15696acfeebe | 425 | #define FMSTR_FCAN_MAKEIDR2(id) ((FMSTR_U8)( ((id)&FMSTR_CAN_EXTID) ? ((id)>>8) : 0 )) |
| JardaPajskr | 12:15696acfeebe | 426 | #define FMSTR_FCAN_MAKEIDR3(id) ((FMSTR_U8)( ((id)&FMSTR_CAN_EXTID) ? (id) : 0 )) |
| JardaPajskr | 0:fb135bf60f82 | 427 | |
| JardaPajskr | 12:15696acfeebe | 428 | /* FCAN reception, configuring the buffer, just once at the initialization phase */ |
| JardaPajskr | 12:15696acfeebe | 429 | #define FMSTR_FCAN_RINIT(idr0, idr1, idr2, idr3) \ |
| JardaPajskr | 12:15696acfeebe | 430 | FMSTR_MACROCODE_BEGIN() \ |
| JardaPajskr | 12:15696acfeebe | 431 | (((idr0)&FMSTR_FCANID0_EXT_FLG) ? \ |
| JardaPajskr | 12:15696acfeebe | 432 | (FMSTR_SETREG16(FMSTR_CAN_BASE, FMSTR_FCANRXFG_OFFSET + FMSTR_FCMBCSR + 2, (FMSTR_FCANMB_CRXVOID<<8 | FMSTR_FCANCTRL_IDE | FMSTR_FCANCTRL_EXT_SRR))) : \ |
| JardaPajskr | 12:15696acfeebe | 433 | (FMSTR_SETREG16(FMSTR_CAN_BASE, FMSTR_FCANRXFG_OFFSET + FMSTR_FCMBCSR + 2, (FMSTR_FCANMB_CRXVOID<<8 | FMSTR_FCANCTRL_EXT_SRR))));\ |
| JardaPajskr | 12:15696acfeebe | 434 | FMSTR_SETREG32(FMSTR_CAN_BASE, FMSTR_FCANRXFG_OFFSET + FMSTR_FCMBIDR0, ((idr0)<<24) | ((idr1)<<16) | ((idr2)<<8) | (idr3) );\ |
| JardaPajskr | 12:15696acfeebe | 435 | FMSTR_MACROCODE_END() |
| JardaPajskr | 12:15696acfeebe | 436 | |
| JardaPajskr | 12:15696acfeebe | 437 | /* FCAN transmission, configuring the buffer, just once at the initialization phase */ |
| JardaPajskr | 12:15696acfeebe | 438 | #define FMSTR_FCAN_TINIT(idr0, idr1, idr2, idr3) \ |
| JardaPajskr | 12:15696acfeebe | 439 | FMSTR_MACROCODE_BEGIN() \ |
| JardaPajskr | 12:15696acfeebe | 440 | (((idr0)&FMSTR_FCANID0_EXT_FLG) ? \ |
| JardaPajskr | 12:15696acfeebe | 441 | (FMSTR_SETREG16(FMSTR_CAN_BASE, FMSTR_FCANTXFG_OFFSET + FMSTR_FCMBCSR + 2, (FMSTR_FCANMB_CTXREADY<<8 | FMSTR_FCANCTRL_IDE))) : \ |
| JardaPajskr | 12:15696acfeebe | 442 | (FMSTR_SETREG16(FMSTR_CAN_BASE, FMSTR_FCANTXFG_OFFSET + FMSTR_FCMBCSR + 2, (FMSTR_FCANMB_CTXREADY<<8 ))));\ |
| JardaPajskr | 12:15696acfeebe | 443 | FMSTR_MACROCODE_END() |
| JardaPajskr | 12:15696acfeebe | 444 | |
| JardaPajskr | 12:15696acfeebe | 445 | /* FCAN reception, configuring the buffer for receiving (each time receiver is re-enabled) */ |
| JardaPajskr | 12:15696acfeebe | 446 | #define FMSTR_FCAN_RCFG() \ |
| JardaPajskr | 12:15696acfeebe | 447 | FMSTR_SETREG8(FMSTR_CAN_BASE, FMSTR_FCANRXFG_OFFSET + FMSTR_FCMBCSR + 3, FMSTR_FCANMB_CRXEMPTY) |
| JardaPajskr | 12:15696acfeebe | 448 | |
| JardaPajskr | 12:15696acfeebe | 449 | /* FCAN: CAN transmission */ |
| JardaPajskr | 12:15696acfeebe | 450 | typedef struct |
| JardaPajskr | 12:15696acfeebe | 451 | { |
| JardaPajskr | 12:15696acfeebe | 452 | FMSTR_U8 nDataIx; |
| JardaPajskr | 12:15696acfeebe | 453 | } FMSTR_FCAN_TCTX; |
| JardaPajskr | 12:15696acfeebe | 454 | |
| JardaPajskr | 12:15696acfeebe | 455 | /* FCAN transmission, put one data byte into buffer */ |
| JardaPajskr | 12:15696acfeebe | 456 | #define FMSTR_FCAN_TLEN(pctx, len) \ |
| JardaPajskr | 12:15696acfeebe | 457 | FMSTR_SETREG8(FMSTR_CAN_BASE, FMSTR_FCANTXFG_OFFSET+FMSTR_FCMBCSR+2, (FMSTR_U8)((len & 0x0f) | \ |
| JardaPajskr | 12:15696acfeebe | 458 | (FMSTR_GETREG8(FMSTR_CAN_BASE, FMSTR_FCANTXFG_OFFSET+FMSTR_FCMBCSR+2)&(FMSTR_FCANCTRL_IDE | FMSTR_FCANCTRL_EXT_SRR | FMSTR_FCANCTRL_EXT_RTR)))) |
| JardaPajskr | 12:15696acfeebe | 459 | |
| JardaPajskr | 12:15696acfeebe | 460 | /* FCAN transmission, put one data byte into buffer */ |
| JardaPajskr | 12:15696acfeebe | 461 | #define FMSTR_FCAN_PUTBYTE(pctx, dataByte) \ |
| JardaPajskr | 12:15696acfeebe | 462 | FMSTR_MACROCODE_BEGIN() \ |
| JardaPajskr | 12:15696acfeebe | 463 | FMSTR_SETREG8(FMSTR_CAN_BASE, (FMSTR_FCANTXFG_OFFSET + FMSTR_FCMBDSR0) - (0x3&((pctx)->nDataIx)) + (0x4&((pctx)->nDataIx)), (dataByte) ); \ |
| JardaPajskr | 12:15696acfeebe | 464 | (pctx)->nDataIx++; \ |
| JardaPajskr | 12:15696acfeebe | 465 | FMSTR_MACROCODE_END() |
| JardaPajskr | 12:15696acfeebe | 466 | |
| JardaPajskr | 12:15696acfeebe | 467 | /* FCAN: CAN transmission, configuring the buffer before each transmission */ |
| JardaPajskr | 12:15696acfeebe | 468 | #define FMSTR_FCAN_TCFG(pctx) \ |
| JardaPajskr | 12:15696acfeebe | 469 | FMSTR_MACROCODE_BEGIN() \ |
| JardaPajskr | 12:15696acfeebe | 470 | (pctx)->nDataIx = 0; \ |
| JardaPajskr | 12:15696acfeebe | 471 | FMSTR_MACROCODE_END() |
| JardaPajskr | 12:15696acfeebe | 472 | |
| JardaPajskr | 12:15696acfeebe | 473 | /* FCAN: CAN transmission, preparing the buffer before each transmission */ |
| JardaPajskr | 12:15696acfeebe | 474 | #define FMSTR_FCAN_TID(pctx, idr0, idr1, idr2, idr3) \ |
| JardaPajskr | 12:15696acfeebe | 475 | FMSTR_MACROCODE_BEGIN() \ |
| JardaPajskr | 12:15696acfeebe | 476 | FMSTR_SETREG32(FMSTR_CAN_BASE, FMSTR_FCANTXFG_OFFSET+FMSTR_FCMBIDR0, ((idr0)<<24) | ((idr1)<<16) | ((idr2)<<8) | (idr3) ); \ |
| JardaPajskr | 12:15696acfeebe | 477 | FMSTR_MACROCODE_END() |
| JardaPajskr | 12:15696acfeebe | 478 | |
| JardaPajskr | 12:15696acfeebe | 479 | /* FCAN transmission, set transmit priority */ |
| JardaPajskr | 12:15696acfeebe | 480 | #define FMSTR_FCAN_TPRI(pctx, txPri) /* in FCAN module is not implemented */ |
| JardaPajskr | 12:15696acfeebe | 481 | |
| JardaPajskr | 12:15696acfeebe | 482 | /* FCAN transmission, final firing of the buffer */ |
| JardaPajskr | 12:15696acfeebe | 483 | #define FMSTR_FCAN_TX(pctx) \ |
| JardaPajskr | 12:15696acfeebe | 484 | FMSTR_SETREG8(FMSTR_CAN_BASE, FMSTR_FCANTXFG_OFFSET + FMSTR_FCMBCSR + 3, (FMSTR_FCANMB_CTXTRANS_ONCE & 0x0f) ) |
| JardaPajskr | 12:15696acfeebe | 485 | |
| JardaPajskr | 12:15696acfeebe | 486 | /* FCAN reception */ |
| JardaPajskr | 12:15696acfeebe | 487 | typedef struct |
| JardaPajskr | 12:15696acfeebe | 488 | { |
| JardaPajskr | 12:15696acfeebe | 489 | FMSTR_U8 nDataIx; |
| JardaPajskr | 12:15696acfeebe | 490 | } FMSTR_FCAN_RCTX; |
| JardaPajskr | 12:15696acfeebe | 491 | |
| JardaPajskr | 12:15696acfeebe | 492 | /* FCAN reception, lock frame */ |
| JardaPajskr | 12:15696acfeebe | 493 | #define FMSTR_FCAN_RX(pctx) \ |
| JardaPajskr | 12:15696acfeebe | 494 | (pctx)->nDataIx = 0; |
| JardaPajskr | 12:15696acfeebe | 495 | |
| JardaPajskr | 12:15696acfeebe | 496 | /* FCAN reception, test if received message ID matches the one given, TRUE if matching */ |
| JardaPajskr | 12:15696acfeebe | 497 | #define FMSTR_FCAN_TEST_RIDR(pctx, idr0, idr1, idr2, idr3) \ |
| JardaPajskr | 12:15696acfeebe | 498 | ( (idr0 & FMSTR_FCANID0_EXT_FLG) ? \ |
| JardaPajskr | 12:15696acfeebe | 499 | /* ext id compare */ \ |
| JardaPajskr | 12:15696acfeebe | 500 | ( ((((idr0)<<24) | ((idr1)<<16) | ((idr2)<<8) | (idr3))&0x1f000000)==((FMSTR_GETREG32(FMSTR_CAN_BASE, FMSTR_FCANRXFG_OFFSET+FMSTR_FCMBIDR0))&0x1f000000) ) : \ |
| JardaPajskr | 12:15696acfeebe | 501 | /* std id compare */ \ |
| JardaPajskr | 12:15696acfeebe | 502 | ( (((idr0)<<8) | (idr1))==((FMSTR_GETREG16(FMSTR_CAN_BASE, FMSTR_FCANRXFG_OFFSET+FMSTR_FCMBIDR0+2))&0x1ffc) ) ) |
| JardaPajskr | 12:15696acfeebe | 503 | |
| JardaPajskr | 12:15696acfeebe | 504 | /* FCAN reception, get received frame length */ |
| JardaPajskr | 12:15696acfeebe | 505 | #define FMSTR_FCAN_RLEN(pctx) \ |
| JardaPajskr | 12:15696acfeebe | 506 | (FMSTR_GETREG8(FMSTR_CAN_BASE, FMSTR_FCANRXFG_OFFSET+FMSTR_FCMBCSR+2) & 0x0f) |
| JardaPajskr | 12:15696acfeebe | 507 | |
| JardaPajskr | 12:15696acfeebe | 508 | /* FCAN reception, get one received byte */ |
| JardaPajskr | 12:15696acfeebe | 509 | #define FMSTR_FCAN_GETBYTE(pctx) \ |
| JardaPajskr | 12:15696acfeebe | 510 | ((FMSTR_U8) (FMSTR_GETREG8(FMSTR_CAN_BASE, (FMSTR_FCANRXFG_OFFSET + FMSTR_FCMBDSR0) - (0x3&((pctx)->nDataIx)) + (0x4&((pctx)->nDataIx)) ))); \ |
| JardaPajskr | 12:15696acfeebe | 511 | (pctx)->nDataIx++ |
| JardaPajskr | 12:15696acfeebe | 512 | |
| JardaPajskr | 12:15696acfeebe | 513 | /* FCAN reception, unlock the buffer */ |
| JardaPajskr | 12:15696acfeebe | 514 | #define FMSTR_FCAN_RFINISH(pctx) \ |
| JardaPajskr | 12:15696acfeebe | 515 | FMSTR_SETBIT16(FMSTR_CAN_BASE, FMSTR_FCANTMR_OFFSET, 0) |
| JardaPajskr | 12:15696acfeebe | 516 | |
| JardaPajskr | 12:15696acfeebe | 517 | #endif /* __FREEMASTER_KXX_H */ |
| JardaPajskr | 12:15696acfeebe | 518 |
