Thiago .
/
testesPortasLogicasOr
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Revision 0:681952e2ac94, committed 2015-09-02
- Comitter:
- Jamess
- Date:
- Wed Sep 02 18:54:20 2015 +0000
- Commit message:
- testing an OR logic gate;
Changed in this revision
| main.cpp | Show annotated file Show diff for this revision Revisions of this file |
| mbed.bld | Show annotated file Show diff for this revision Revisions of this file |
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/main.cpp Wed Sep 02 18:54:20 2015 +0000
@@ -0,0 +1,43 @@
+//testando o funcionamento de uma porta OR 74HC32na placa , VCC em 3v3 e GND em GND PTE0 nas entrada A e PTE1 nas entradas B
+
+#include "mbed.h"
+
+DigitalOut pte0(PTE0);
+DigitalOut pte1(PTE1);
+
+Serial pc(USBTX,USBRX);
+
+
+void setStatePins(bool a,bool b);
+
+int main() {
+ while(1) {
+
+ wait(5);
+ setStatePins(0,0);
+ pc.printf(" 0 0 ");
+
+ wait(5);
+ setStatePins(0,1);
+ pc.printf(" 0 1 ");
+
+ wait(5);
+ setStatePins(1,0);
+ pc.printf(" 1 0 ");
+
+ wait(5);
+ setStatePins(1,1);
+ pc.printf(" 1 1 ");
+
+
+ }
+}
+
+
+void setStatePins(bool a,bool b){
+
+ pte0 = a;
+
+ pte1 = b;
+
+ }
\ No newline at end of file
--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/mbed.bld Wed Sep 02 18:54:20 2015 +0000 @@ -0,0 +1,1 @@ +http://mbed.org/users/mbed_official/code/mbed/builds/ba1f97679dad \ No newline at end of file