A library for interfacing to ST EEPROM memory M95***
M95256.h@0:1a2ef0cae812, 2019-02-16 (annotated)
- Committer:
- JamesStockton
- Date:
- Sat Feb 16 15:08:51 2019 +0000
- Revision:
- 0:1a2ef0cae812
Basic start to the library for ST EEPROM
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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JamesStockton | 0:1a2ef0cae812 | 1 | /* Library for interfacing to the M95*** SPI EEPROM module |
JamesStockton | 0:1a2ef0cae812 | 2 | |
JamesStockton | 0:1a2ef0cae812 | 3 | - 13/02/19 - Basic Start |
JamesStockton | 0:1a2ef0cae812 | 4 | |
JamesStockton | 0:1a2ef0cae812 | 5 | |
JamesStockton | 0:1a2ef0cae812 | 6 | |
JamesStockton | 0:1a2ef0cae812 | 7 | |
JamesStockton | 0:1a2ef0cae812 | 8 | |
JamesStockton | 0:1a2ef0cae812 | 9 | |
JamesStockton | 0:1a2ef0cae812 | 10 | Enjoy |
JamesStockton | 0:1a2ef0cae812 | 11 | */ |
JamesStockton | 0:1a2ef0cae812 | 12 | |
JamesStockton | 0:1a2ef0cae812 | 13 | |
JamesStockton | 0:1a2ef0cae812 | 14 | #ifndef M95256_H |
JamesStockton | 0:1a2ef0cae812 | 15 | #define M95256_H |
JamesStockton | 0:1a2ef0cae812 | 16 | |
JamesStockton | 0:1a2ef0cae812 | 17 | #include "mbed.h" |
JamesStockton | 0:1a2ef0cae812 | 18 | |
JamesStockton | 0:1a2ef0cae812 | 19 | |
JamesStockton | 0:1a2ef0cae812 | 20 | |
JamesStockton | 0:1a2ef0cae812 | 21 | #define WREN 0x06 |
JamesStockton | 0:1a2ef0cae812 | 22 | #define WRDI 0x04 |
JamesStockton | 0:1a2ef0cae812 | 23 | #define RDSR 0x05 |
JamesStockton | 0:1a2ef0cae812 | 24 | #define WRSR 0x01 |
JamesStockton | 0:1a2ef0cae812 | 25 | #define READ 0x03 |
JamesStockton | 0:1a2ef0cae812 | 26 | #define WRITE 0x02 |
JamesStockton | 0:1a2ef0cae812 | 27 | |
JamesStockton | 0:1a2ef0cae812 | 28 | |
JamesStockton | 0:1a2ef0cae812 | 29 | //WRITE | 16 bit address | 8 bit data |
JamesStockton | 0:1a2ef0cae812 | 30 | //READ | 16 bit address returns | 8 bit data |
JamesStockton | 0:1a2ef0cae812 | 31 | |
JamesStockton | 0:1a2ef0cae812 | 32 | |
JamesStockton | 0:1a2ef0cae812 | 33 | class M95256: public SPI { |
JamesStockton | 0:1a2ef0cae812 | 34 | public: |
JamesStockton | 0:1a2ef0cae812 | 35 | |
JamesStockton | 0:1a2ef0cae812 | 36 | // _spi - pointer to SPI |
JamesStockton | 0:1a2ef0cae812 | 37 | // memsize - size of memory in KB |
JamesStockton | 0:1a2ef0cae812 | 38 | M95256(PinName mosi, PinName miso, PinName sckl, PinName cs, uint16_t memsize, int freq = 1000000) : SPI(mosi, miso, sckl, cs) { |
JamesStockton | 0:1a2ef0cae812 | 39 | SPI::frequency(freq); |
JamesStockton | 0:1a2ef0cae812 | 40 | memorysize = memsize; |
JamesStockton | 0:1a2ef0cae812 | 41 | } |
JamesStockton | 0:1a2ef0cae812 | 42 | |
JamesStockton | 0:1a2ef0cae812 | 43 | bool writeRegister(uint16_t reg, uint8_t val) { |
JamesStockton | 0:1a2ef0cae812 | 44 | writeEnable(); |
JamesStockton | 0:1a2ef0cae812 | 45 | |
JamesStockton | 0:1a2ef0cae812 | 46 | SPI::lock(); |
JamesStockton | 0:1a2ef0cae812 | 47 | SPI::write(WRITE); |
JamesStockton | 0:1a2ef0cae812 | 48 | SPI::write(reg); |
JamesStockton | 0:1a2ef0cae812 | 49 | SPI::write(val); |
JamesStockton | 0:1a2ef0cae812 | 50 | SPI::unlock(); |
JamesStockton | 0:1a2ef0cae812 | 51 | |
JamesStockton | 0:1a2ef0cae812 | 52 | writeDisable(); |
JamesStockton | 0:1a2ef0cae812 | 53 | return 1; |
JamesStockton | 0:1a2ef0cae812 | 54 | } |
JamesStockton | 0:1a2ef0cae812 | 55 | |
JamesStockton | 0:1a2ef0cae812 | 56 | uint8_t readRegister(uint16_t reg) { |
JamesStockton | 0:1a2ef0cae812 | 57 | uint8_t readBuf; |
JamesStockton | 0:1a2ef0cae812 | 58 | |
JamesStockton | 0:1a2ef0cae812 | 59 | SPI::lock(); |
JamesStockton | 0:1a2ef0cae812 | 60 | SPI::write(READ); |
JamesStockton | 0:1a2ef0cae812 | 61 | readBuf = SPI::write(reg); |
JamesStockton | 0:1a2ef0cae812 | 62 | SPI::unlock(); |
JamesStockton | 0:1a2ef0cae812 | 63 | |
JamesStockton | 0:1a2ef0cae812 | 64 | return readBuf; |
JamesStockton | 0:1a2ef0cae812 | 65 | } |
JamesStockton | 0:1a2ef0cae812 | 66 | |
JamesStockton | 0:1a2ef0cae812 | 67 | |
JamesStockton | 0:1a2ef0cae812 | 68 | protected: |
JamesStockton | 0:1a2ef0cae812 | 69 | void writeEnable(void) { |
JamesStockton | 0:1a2ef0cae812 | 70 | SPI::lock(); |
JamesStockton | 0:1a2ef0cae812 | 71 | SPI::write(WREN); |
JamesStockton | 0:1a2ef0cae812 | 72 | SPI::unlock(); |
JamesStockton | 0:1a2ef0cae812 | 73 | } |
JamesStockton | 0:1a2ef0cae812 | 74 | |
JamesStockton | 0:1a2ef0cae812 | 75 | void writeDisable(void) { |
JamesStockton | 0:1a2ef0cae812 | 76 | SPI::lock(); |
JamesStockton | 0:1a2ef0cae812 | 77 | SPI::write(WRDI); |
JamesStockton | 0:1a2ef0cae812 | 78 | SPI::unlock(); |
JamesStockton | 0:1a2ef0cae812 | 79 | } |
JamesStockton | 0:1a2ef0cae812 | 80 | |
JamesStockton | 0:1a2ef0cae812 | 81 | private: |
JamesStockton | 0:1a2ef0cae812 | 82 | uint16_t memorysize; |
JamesStockton | 0:1a2ef0cae812 | 83 | }; |
JamesStockton | 0:1a2ef0cae812 | 84 | |
JamesStockton | 0:1a2ef0cae812 | 85 | #endif |