Diff: Memory/sdram.cpp

Revision:

10:1ac4b213f0f7

Parent:

9:a33326afd686

Child:

30:a97015441bb4

--- a/Memory/sdram.cpp	Thu Dec 11 18:23:07 2014 +0000
+++ b/Memory/sdram.cpp	Fri Dec 19 09:03:25 2014 +0100
@@ -406,6 +406,36 @@
   return (cnt / 10);
 }
 
+static void allowExecutionOfCodeInSDRAM(void)
+{
+  //----- Adjust MPU to allow execution of code from SDRAM
+  
+  /* Disable MPU */
+  MPU->CTRL = 0x00;
+  
+  /* Select to use the default memory map as base and only modify parts */
+  MPU->CTRL = 0x04; // PRIVDEFENA=1
+  
+#define _RBAR(_ADDR, _VALID, _REGION) \
+    ((_ADDR) | ((_VALID) << 4) | (_REGION))
+
+#define _RASR(_XN, _AP, _TYPE, _SRD, _SIZE, _ENABLE) \
+    (((_XN) << 28) | ((_AP) << 24) | ((_TYPE) << 16) | ((_SRD) << 8) | ((_SIZE) << 1) | (_ENABLE))
+
+#define AP_RW         0x03 // 011 = Full Access
+#define MEM_TYPE_ERAM 0x07 // Normal, Sharable, Cached, Buffered, write-back & write allocate
+#define SIZE_32M      0x18 // Region size in bytes = 2^(0x18+1) = 32MB
+
+  /* Setup MPU Region 4 for the SDRAM (0xA0000000 - 0xA1FFFFFF*/
+  MPU->RBAR = _RBAR(0xA0000000, 1, 4);
+  MPU->RASR = _RASR(0, AP_RW, MEM_TYPE_ERAM, 0, SIZE_32M, 1);
+
+  /* (Re-)Enable MPU */
+  MPU->CTRL |= 0x01;
+  
+  //----- End of MPU adjustments
+}
+
 /******************************************************************************
  * Public Functions
  *****************************************************************************/
@@ -583,6 +613,8 @@
 
   adjust_timing();
   
+  allowExecutionOfCodeInSDRAM();
+  
   initialized = true;
 
   return 0;//TRUE;