JST 2011 / ClockControl

clock control library written by Michael Wei

Dependents:   IsuProject_LPC1768 int555 Gemini_Soloist_LPC1768 OSCtoCVConverter

ClockControl.cpp@1:a6d100de3aee, 2013-10-11 (annotated)

Committer:
JST2011
Date:
Fri Oct 11 02:59:39 2013 +0000
Revision:
1:a6d100de3aee
Parent:
0:bf8849c9b21a 
*change "LPC1768/ARM/LPC17xx.h" to "TARGET_LPC1768/LPC17xx.h" for mbed lib(13/10/11) ; *see also :http://mbed.org/users/mbed_official/code/mbed/file/a9913a65894f/TARGET_LPC1768

Who changed what in which revision?

UserRevisionLine numberNew contents of line
JST2011 0:bf8849c9b21a 1 #include "ClockControl.h"
JST2011 0:bf8849c9b21a 2
JST2011 0:bf8849c9b21a 3 void setPLL0Frequency(unsigned char clkSrc, unsigned short cfg_m, unsigned char cfg_n)
JST2011 0:bf8849c9b21a 4 {
JST2011 0:bf8849c9b21a 5 LPC_SC->CLKSRCSEL = clkSrc;
JST2011 0:bf8849c9b21a 6 LPC_SC->PLL0CFG = (((unsigned int)cfg_n-1) << 16) | cfg_m-1;
JST2011 0:bf8849c9b21a 7 LPC_SC->PLL0CON = 0x01;
JST2011 0:bf8849c9b21a 8 LPC_SC->PLL0FEED = 0xAA;
JST2011 0:bf8849c9b21a 9 LPC_SC->PLL0FEED = 0x55;
JST2011 0:bf8849c9b21a 10 while (!(LPC_SC->PLL0STAT & (1<<26)));
JST2011 0:bf8849c9b21a 11
JST2011 0:bf8849c9b21a 12 LPC_SC->PLL0CON = 0x03;
JST2011 0:bf8849c9b21a 13 LPC_SC->PLL0FEED = 0xAA;
JST2011 0:bf8849c9b21a 14 LPC_SC->PLL0FEED = 0x55;
JST2011 0:bf8849c9b21a 15 }
JST2011 0:bf8849c9b21a 16
JST2011 0:bf8849c9b21a 17 void setPLL1Frequency(unsigned char clkSrc, unsigned short cfg_m, unsigned char cfg_n)
JST2011 0:bf8849c9b21a 18 {
JST2011 0:bf8849c9b21a 19 LPC_SC->CLKSRCSEL = clkSrc;
JST2011 0:bf8849c9b21a 20 LPC_SC->PLL1CFG = (((unsigned int)cfg_n-1) << 16) | cfg_m-1;
JST2011 0:bf8849c9b21a 21 LPC_SC->PLL1CON = 0x01;
JST2011 0:bf8849c9b21a 22 LPC_SC->PLL1FEED = 0xAA;
JST2011 0:bf8849c9b21a 23 LPC_SC->PLL1FEED = 0x55;
JST2011 0:bf8849c9b21a 24 while (!(LPC_SC->PLL1STAT & (1<<26)));
JST2011 0:bf8849c9b21a 25
JST2011 0:bf8849c9b21a 26 LPC_SC->PLL1CON = 0x03;
JST2011 0:bf8849c9b21a 27 LPC_SC->PLL1FEED = 0xAA;
JST2011 0:bf8849c9b21a 28 LPC_SC->PLL1FEED = 0x55;
JST2011 0:bf8849c9b21a 29 }
JST2011 0:bf8849c9b21a 30
JST2011 0:bf8849c9b21a 31 unsigned int setSystemFrequency(unsigned char clkDivider, unsigned char clkSrc, unsigned short cfg_m, unsigned char cfg_n)
JST2011 0:bf8849c9b21a 32 {
JST2011 0:bf8849c9b21a 33 setPLL0Frequency(clkSrc, cfg_m, cfg_n);
JST2011 0:bf8849c9b21a 34 LPC_SC->CCLKCFG = clkDivider - 1;
JST2011 0:bf8849c9b21a 35 SystemCoreClockUpdate();
JST2011 0:bf8849c9b21a 36 return SystemCoreClock;
JST2011 0:bf8849c9b21a 37 }