NanostackRfPhyAtmel.cpp

00001 /*
00002  * Copyright (c) 2014-2015 ARM Limited. All rights reserved.
00003  * SPDX-License-Identifier: Apache-2.0
00004  * Licensed under the Apache License, Version 2.0 (the License); you may
00005  * not use this file except in compliance with the License.
00006  * You may obtain a copy of the License at
00007  *
00008  * http://www.apache.org/licenses/LICENSE-2.0
00009  *
00010  * Unless required by applicable law or agreed to in writing, software
00011  * distributed under the License is distributed on an AS IS BASIS, WITHOUT
00012  * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
00013  * See the License for the specific language governing permissions and
00014  * limitations under the License.
00015  */
00016 #include <string.h>
00017 
00018 #ifdef MBED_CONF_NANOSTACK_CONFIGURATION
00019 
00020 #include "platform/arm_hal_interrupt.h"
00021 #include "nanostack/platform/arm_hal_phy.h"
00022 #include "ns_types.h"
00023 #include "NanostackRfPhyAtmel.h"
00024 #include "randLIB.h"
00025 #include "AT86RFReg.h"
00026 #include "nanostack/platform/arm_hal_phy.h"
00027 #include "mbed_trace.h"
00028 #include "mbed_toolchain.h"
00029 
00030 #define TRACE_GROUP "AtRF"
00031 
00032 /*Worst case sensitivity*/
00033 #define RF_DEFAULT_SENSITIVITY -88
00034 /*Run calibration every 5 minutes*/
00035 #define RF_CALIBRATION_INTERVAL 6000000
00036 /*Wait ACK for 2.5ms*/
00037 #define RF_ACK_WAIT_DEFAULT_TIMEOUT 50
00038 /*Base CCA backoff (50us units) - substitutes for Inter-Frame Spacing*/
00039 #define RF_CCA_BASE_BACKOFF 13 /* 650us */
00040 /*CCA random backoff (50us units)*/
00041 #define RF_CCA_RANDOM_BACKOFF 51 /* 2550us */
00042 
00043 #define RF_MTU 127
00044 
00045 #define RF_PHY_MODE OQPSK_SIN_250
00046 
00047 /*Radio RX and TX state definitions*/
00048 #define RFF_ON 0x01
00049 #define RFF_RX 0x02
00050 #define RFF_TX 0x04
00051 #define RFF_CCA 0x08
00052 
00053 typedef enum
00054 {
00055     RF_MODE_NORMAL = 0,
00056     RF_MODE_SNIFFER = 1,
00057     RF_MODE_ED = 2
00058 }rf_mode_t;
00059 
00060 /*Atmel RF Part Type*/
00061 typedef enum
00062 {
00063     ATMEL_UNKNOW_DEV = 0,
00064     ATMEL_AT86RF212,
00065     ATMEL_AT86RF231, // No longer supported (doesn't give ED+status on frame read)
00066     ATMEL_AT86RF233
00067 }rf_trx_part_e;
00068 
00069 /*Atmel RF states*/
00070 typedef enum
00071 {
00072     NOP = 0x00,
00073     BUSY_RX = 0x01,
00074     BUSY_TX = 0x02,
00075     RF_TX_START = 0x02,
00076     FORCE_TRX_OFF = 0x03,
00077     FORCE_PLL_ON = 0x04,
00078     RX_ON = 0x06,
00079     TRX_OFF = 0x08,
00080     PLL_ON = 0x09,
00081     BUSY_RX_AACK = 0x11,
00082     SLEEP = 0x0F,
00083     RX_AACK_ON = 0x16,
00084     TX_ARET_ON = 0x19,
00085     STATE_TRANSITION_IN_PROGRESS = 0x1F
00086 }rf_trx_states_t;
00087 
00088 static const uint8_t *rf_tx_data; // Points to Nanostack's buffer
00089 static uint8_t rf_tx_length;
00090 /*ACK wait duration changes depending on data rate*/
00091 static uint16_t rf_ack_wait_duration = RF_ACK_WAIT_DEFAULT_TIMEOUT;
00092 
00093 static int8_t rf_sensitivity = RF_DEFAULT_SENSITIVITY;
00094 static rf_mode_t rf_mode = RF_MODE_NORMAL;
00095 static uint8_t radio_tx_power = 0x00;   // Default to +4dBm
00096 static uint8_t rf_phy_channel = 12;
00097 static uint8_t rf_tuned = 1;
00098 static uint8_t rf_use_antenna_diversity = 0;
00099 static int16_t expected_ack_sequence = -1;
00100 static uint8_t rf_rx_mode = 0;
00101 static uint8_t rf_flags = 0;
00102 static int8_t rf_radio_driver_id = -1;
00103 static phy_device_driver_s device_driver;
00104 static uint8_t mac_tx_handle = 0;
00105 static uint8_t xah_ctrl_1;
00106 
00107 /* Channel configurations for 2.4 and sub-GHz */
00108 static const phy_rf_channel_configuration_s phy_24ghz = {2405000000U, 5000000U, 250000U, 16U, M_OQPSK};
00109 static const phy_rf_channel_configuration_s phy_subghz = {868300000U, 2000000U, 250000U, 11U, M_OQPSK};
00110 
00111 static const phy_device_channel_page_s phy_channel_pages[] = {
00112         { CHANNEL_PAGE_0, &phy_24ghz},
00113         { CHANNEL_PAGE_2, &phy_subghz},
00114         { CHANNEL_PAGE_0, NULL}
00115 };
00116 
00117 /**
00118  *  RF output power write
00119  *
00120  * \brief TX power has to be set before network start.
00121  *
00122  * \param power
00123  *              AT86RF233
00124  *              0 = 4 dBm
00125  *              1 = 3.7 dBm
00126  *              2 = 3.4 dBm
00127  *              3 = 3 dBm
00128  *              4 = 2.5 dBm
00129  *              5 = 2 dBm
00130  *              6 = 1 dBm
00131  *              7 = 0 dBm
00132  *              8 = -1 dBm
00133  *              9 = -2 dBm
00134  *              10 = -3 dBm
00135  *              11 = -4 dBm
00136  *              12 = -6 dBm
00137  *              13 = -8 dBm
00138  *              14 = -12 dBm
00139  *              15 = -17 dBm
00140  *
00141  *              AT86RF212B
00142  *              See datasheet for TX power settings
00143  *
00144  * \return 0, Supported Value
00145  * \return -1, Not Supported Value
00146  */
00147 static rf_trx_part_e rf_radio_type_read(void);
00148 static void rf_ack_wait_timer_start(uint16_t slots);
00149 static void rf_handle_cca_ed_done(uint8_t full_trx_status);
00150 static void rf_handle_tx_end(rf_trx_states_t trx_status);
00151 static void rf_handle_rx_end(rf_trx_states_t trx_status);
00152 static void rf_on(void);
00153 static void rf_give_up_on_ack(void);
00154 static void rf_receive(rf_trx_states_t trx_status = STATE_TRANSITION_IN_PROGRESS);
00155 static rf_trx_states_t rf_poll_trx_state_change(rf_trx_states_t trx_state);
00156 static void rf_init(void);
00157 static int8_t rf_device_register(const uint8_t *mac_addr);
00158 static void rf_device_unregister(void);
00159 static int8_t rf_start_cca(uint8_t *data_ptr, uint16_t data_length, uint8_t tx_handle, data_protocol_e data_protocol );
00160 static void rf_cca_abort(void);
00161 static void rf_calibration_cb(void);
00162 static void rf_init_phy_mode(void);
00163 static void rf_ack_wait_timer_interrupt(void);
00164 static void rf_calibration_timer_interrupt(void);
00165 static void rf_calibration_timer_start(uint32_t slots);
00166 static void rf_cca_timer_interrupt(void);
00167 static void rf_cca_timer_start(uint32_t slots);
00168 static uint8_t rf_scale_lqi(int8_t rssi);
00169 
00170 static int8_t rf_interface_state_control(phy_interface_state_e new_state, uint8_t rf_channel);
00171 static int8_t rf_extension(phy_extension_type_e extension_type,uint8_t *data_ptr);
00172 static int8_t rf_address_write(phy_address_type_e address_type,uint8_t *address_ptr);
00173 
00174 static void rf_if_cca_timer_start(uint32_t slots);
00175 static void rf_if_enable_promiscuous_mode(void);
00176 static void rf_if_lock(void);
00177 static void rf_if_unlock(void);
00178 static uint8_t rf_if_read_rnd(void);
00179 static void rf_if_calibration_timer_start(uint32_t slots);
00180 static void rf_if_interrupt_handler(void);
00181 static void rf_if_ack_wait_timer_start(uint16_t slots);
00182 static void rf_if_ack_wait_timer_stop(void);
00183 static void rf_if_ack_pending_ctrl(uint8_t state);
00184 static void rf_if_calibration(void);
00185 static uint8_t rf_if_read_register(uint8_t addr);
00186 static void rf_if_set_bit(uint8_t addr, uint8_t bit, uint8_t bit_mask);
00187 static void rf_if_clear_bit(uint8_t addr, uint8_t bit);
00188 static void rf_if_write_register(uint8_t addr, uint8_t data);
00189 static void rf_if_reset_radio(void);
00190 static void rf_if_enable_ant_div(void);
00191 static void rf_if_disable_ant_div(void);
00192 static void rf_if_enable_slptr(void);
00193 static void rf_if_disable_slptr(void);
00194 static void rf_if_write_antenna_diversity_settings(void);
00195 static void rf_if_write_set_tx_power_register(uint8_t value);
00196 static void rf_if_write_rf_settings(void);
00197 static rf_trx_states_t rf_if_read_trx_state(void);
00198 static uint16_t rf_if_read_packet(uint8_t data[RF_MTU], uint8_t *lqi_out, uint8_t *ed_out, bool *crc_good);
00199 static void rf_if_write_short_addr_registers(uint8_t *short_address);
00200 static uint8_t rf_if_last_acked_pending(void);
00201 static void rf_if_write_pan_id_registers(uint8_t *pan_id);
00202 static void rf_if_write_ieee_addr_registers(uint8_t *address);
00203 static void rf_if_write_frame_buffer(const uint8_t *ptr, uint8_t length);
00204 static rf_trx_states_t rf_if_change_trx_state(rf_trx_states_t trx_state);
00205 static void rf_if_start_cca_process(void);
00206 static int8_t rf_if_scale_rssi(uint8_t ed_level);
00207 static void rf_if_set_channel_register(uint8_t channel);
00208 static void rf_if_enable_promiscuous_mode(void);
00209 static void rf_if_disable_promiscuous_mode(void);
00210 static uint8_t rf_if_read_part_num(void);
00211 static void rf_if_enable_irq(void);
00212 static void rf_if_disable_irq(void);
00213 static void rf_if_spi_exchange_n(const void *tx, size_t tx_len, void *rx, size_t rx_len);
00214 
00215 static inline rf_trx_states_t rf_if_trx_status_from_full(uint8_t full_trx_status)
00216 {
00217     return (rf_trx_states_t) (full_trx_status & 0x1F);
00218 }
00219 
00220 #ifdef MBED_CONF_RTOS_PRESENT
00221 #include "mbed.h"
00222 #include "rtos.h"
00223 
00224 static void rf_if_irq_task_process_irq();
00225 
00226 #define SIG_RADIO       1
00227 #define SIG_TIMER_ACK   2
00228 #define SIG_TIMER_CAL   4
00229 #define SIG_TIMER_CCA   8
00230 
00231 #define SIG_TIMERS (SIG_TIMER_ACK|SIG_TIMER_CAL|SIG_TIMER_CCA)
00232 #define SIG_ALL (SIG_RADIO|SIG_TIMERS)
00233 #endif
00234 
00235 // HW pins to RF chip
00236 
00237 class UnlockedSPI : public SPI {
00238 public:
00239     UnlockedSPI(PinName mosi, PinName miso, PinName sclk) :
00240         SPI(mosi, miso, sclk) { }
00241     virtual void lock() { }
00242     virtual void unlock() { }
00243 };
00244 
00245 class RFBits {
00246 public:
00247     RFBits(PinName spi_mosi, PinName spi_miso,
00248            PinName spi_sclk, PinName spi_cs,
00249            PinName spi_rst, PinName spi_slp, PinName spi_irq);
00250     UnlockedSPI spi;
00251     DigitalOut CS;
00252     DigitalOut RST;
00253     DigitalOut SLP_TR;
00254     InterruptIn IRQ;
00255     Timeout ack_timer;
00256     Timeout cal_timer;
00257     Timeout cca_timer;
00258 #ifdef MBED_CONF_RTOS_PRESENT
00259     Thread irq_thread;
00260     Mutex mutex;
00261     void rf_if_irq_task();
00262 #endif
00263 };
00264 
00265 RFBits::RFBits(PinName spi_mosi, PinName spi_miso,
00266                PinName spi_sclk, PinName spi_cs,
00267                PinName spi_rst, PinName spi_slp, PinName spi_irq)
00268     :   spi(spi_mosi, spi_miso, spi_sclk),
00269         CS(spi_cs),
00270         RST(spi_rst),
00271         SLP_TR(spi_slp),
00272         IRQ(spi_irq)
00273 #ifdef MBED_CONF_RTOS_PRESENT
00274 ,irq_thread(osPriorityRealtime, 1024)
00275 #endif
00276 {
00277 #ifdef MBED_CONF_RTOS_PRESENT
00278     irq_thread.start(mbed::callback(this, &RFBits::rf_if_irq_task));
00279 #endif
00280 }
00281 
00282 static RFBits *rf;
00283 static uint8_t rf_part_num = 0;
00284 /*TODO: RSSI Base value setting*/
00285 static int8_t rf_rssi_base_val = -91;
00286 
00287 static void rf_if_lock(void)
00288 {
00289     platform_enter_critical();
00290 }
00291 
00292 static void rf_if_unlock(void)
00293 {
00294     platform_exit_critical();
00295 }
00296 
00297 #ifdef MBED_CONF_RTOS_PRESENT
00298 static void rf_if_cca_timer_signal(void)
00299 {
00300     rf->irq_thread.signal_set(SIG_TIMER_CCA);
00301 }
00302 
00303 static void rf_if_cal_timer_signal(void)
00304 {
00305     rf->irq_thread.signal_set(SIG_TIMER_CAL);
00306 }
00307 
00308 static void rf_if_ack_timer_signal(void)
00309 {
00310     rf->irq_thread.signal_set(SIG_TIMER_ACK);
00311 }
00312 #endif
00313 
00314 
00315 /* Delay functions for RF Chip SPI access */
00316 #ifdef __CC_ARM
00317 __asm static void delay_loop(uint32_t count)
00318 {
00319 1
00320   SUBS a1, a1, #1
00321   BCS  %BT1
00322   BX   lr
00323 }
00324 #elif defined (__ICCARM__)
00325 static void delay_loop(uint32_t count)
00326 {
00327   __asm volatile(
00328     "loop: \n"
00329     " SUBS %0, %0, #1 \n"
00330     " BCS.n  loop\n"
00331     : "+r" (count)
00332     :
00333     : "cc"
00334   );
00335 }
00336 #else // GCC
00337 static void delay_loop(uint32_t count)
00338 {
00339   __asm__ volatile (
00340     "%=:\n\t"
00341 #if defined(__thumb__) && !defined(__thumb2__)
00342     "SUB  %0, #1\n\t"
00343 #else
00344     "SUBS %0, %0, #1\n\t"
00345 #endif
00346     "BCS  %=b\n\t"
00347     : "+l" (count)
00348     :
00349     : "cc"
00350   );
00351 }
00352 #endif
00353 
00354 static void delay_ns(uint32_t ns)
00355 {
00356   uint32_t cycles_per_us = SystemCoreClock / 1000000;
00357   // Cortex-M0 takes 4 cycles per loop (SUB=1, BCS=3)
00358   // Cortex-M3 and M4 takes 3 cycles per loop (SUB=1, BCS=2)
00359   // Cortex-M7 - who knows?
00360   // Cortex M3-M7 have "CYCCNT" - would be better than a software loop, but M0 doesn't
00361   // Assume 3 cycles per loop for now - will be 33% slow on M0. No biggie,
00362   // as original version of code was 300% slow on M4.
00363   // [Note that this very calculation, plus call overhead, will take multiple
00364   // cycles. Could well be 100ns on its own... So round down here, startup is
00365   // worth at least one loop iteration.]
00366   uint32_t count = (cycles_per_us * ns) / 3000;
00367 
00368   delay_loop(count);
00369 }
00370 
00371 // t1 = 180ns, SEL falling edge to MISO active [SPI setup assumed slow enough to not need manual delay]
00372 #define CS_SELECT()  {rf->CS = 0; /* delay_ns(180); */}
00373  // t9 = 250ns, last clock to SEL rising edge, t8 = 250ns, SPI idle time between consecutive access
00374 #define CS_RELEASE() {delay_ns(250); rf->CS = 1; delay_ns(250);}
00375 
00376 /*
00377  * \brief Read connected radio part.
00378  *
00379  * This function only return valid information when rf_init() is called
00380  *
00381  * \return
00382  */
00383 static rf_trx_part_e rf_radio_type_read(void)
00384 {
00385   rf_trx_part_e ret_val = ATMEL_UNKNOW_DEV;
00386 
00387   switch (rf_part_num)
00388   {
00389     case PART_AT86RF212:
00390       ret_val = ATMEL_AT86RF212;
00391       break;
00392     case PART_AT86RF233:
00393       ret_val = ATMEL_AT86RF233;
00394       break;
00395     default:
00396       break;
00397   }
00398 
00399   return ret_val;
00400 }
00401 
00402 
00403 /*
00404  * \brief Function starts the ACK wait timeout.
00405  *
00406  * \param slots Given slots, resolution 50us
00407  *
00408  * \return none
00409  */
00410 static void rf_if_ack_wait_timer_start(uint16_t slots)
00411 {
00412 #ifdef MBED_CONF_RTOS_PRESENT
00413   rf->ack_timer.attach_us(rf_if_ack_timer_signal, slots*50);
00414 #else
00415   rf->ack_timer.attach_us(rf_ack_wait_timer_interrupt, slots*50);
00416 #endif
00417 }
00418 
00419 /*
00420  * \brief Function starts the calibration interval.
00421  *
00422  * \param slots Given slots, resolution 50us
00423  *
00424  * \return none
00425  */
00426 static void rf_if_calibration_timer_start(uint32_t slots)
00427 {
00428 #ifdef MBED_CONF_RTOS_PRESENT
00429   rf->cal_timer.attach_us(rf_if_cal_timer_signal, slots*50);
00430 #else
00431   rf->cal_timer.attach_us(rf_calibration_timer_interrupt, slots*50);
00432 #endif
00433 }
00434 
00435 /*
00436  * \brief Function starts the CCA interval.
00437  *
00438  * \param slots Given slots, resolution 50us
00439  *
00440  * \return none
00441  */
00442 static void rf_if_cca_timer_start(uint32_t slots)
00443 {
00444 #ifdef MBED_CONF_RTOS_PRESENT
00445   rf->cca_timer.attach_us(rf_if_cca_timer_signal, slots*50);
00446 #else
00447   rf->cca_timer.attach_us(rf_cca_timer_interrupt, slots*50);
00448 #endif
00449 }
00450 
00451 /*
00452  * \brief Function stops the CCA interval.
00453  *
00454  * \return none
00455  */
00456 static void rf_if_cca_timer_stop(void)
00457 {
00458   rf->cca_timer.detach();
00459 }
00460 
00461 /*
00462  * \brief Function stops the ACK wait timeout.
00463  *
00464  * \param none
00465  *
00466  * \return none
00467  */
00468 static void rf_if_ack_wait_timer_stop(void)
00469 {
00470   rf->ack_timer.detach();
00471 }
00472 
00473 /*
00474  * \brief Function sets bit(s) in given RF register.
00475  *
00476  * \param addr Address of the register to set
00477  * \param bit Bit(s) to set
00478  * \param bit_mask Masks the field inside the register
00479  *
00480  * \return none
00481  */
00482 static void rf_if_set_bit(uint8_t addr, uint8_t bit, uint8_t bit_mask)
00483 {
00484   uint8_t reg = rf_if_read_register(addr);
00485   reg &= ~bit_mask;
00486   reg |= bit;
00487   rf_if_write_register(addr, reg);
00488 }
00489 
00490 /*
00491  * \brief Function clears bit(s) in given RF register.
00492  *
00493  * \param addr Address of the register to clear
00494  * \param bit Bit(s) to clear
00495  *
00496  * \return none
00497  */
00498 static void rf_if_clear_bit(uint8_t addr, uint8_t bit)
00499 {
00500   rf_if_set_bit(addr, 0, bit);
00501 }
00502 
00503 /*
00504  * \brief Function writes register in RF.
00505  *
00506  * \param addr Address on the RF
00507  * \param data Written data
00508  *
00509  * \return none
00510  */
00511 static void rf_if_write_register(uint8_t addr, uint8_t data)
00512 {
00513   const uint8_t tx[2] = { static_cast<uint8_t>(0xC0 | addr), data };
00514   uint8_t rx[2];
00515   CS_SELECT();
00516   rf_if_spi_exchange_n(tx, 2, rx, 2);
00517   CS_RELEASE();
00518 }
00519 
00520 /*
00521  * \brief Function reads RF register, and also outputs PHY_STATUS
00522  *
00523  * \param addr Address on the RF
00524  * \param[out] status_out Pointer to store PHY_STATUS
00525  *
00526  * \return Read register data
00527  */
00528 static uint8_t rf_if_read_register_with_status(uint8_t addr, uint8_t *status_out)
00529 {
00530   const uint8_t tx[1] = { static_cast<uint8_t>(0x80 | addr) };
00531   uint8_t rx[2];
00532   CS_SELECT();
00533   rf_if_spi_exchange_n(tx, 1, rx, 2);
00534   CS_RELEASE();
00535   if (status_out) {
00536       *status_out = rx[0];
00537   }
00538   return rx[1];
00539 }
00540 
00541 /*
00542  * \brief Function reads RF register.
00543  *
00544  * \param addr Address on the RF
00545  *
00546  * \return Read register data
00547  */
00548 static uint8_t rf_if_read_register(uint8_t addr)
00549 {
00550   return rf_if_read_register_with_status(addr, NULL);
00551 }
00552 
00553 /*
00554  * \brief Function resets the RF.
00555  *
00556  * \param none
00557  *
00558  * \return none
00559  */
00560 static void rf_if_reset_radio(void)
00561 {
00562 #if MBED_CONF_ATMEL_RF_USE_SPI_SPACING_API
00563   rf->spi.frequency(MBED_CONF_ATMEL_RF_FULL_SPI_SPEED);
00564   int spacing = rf->spi.write_spacing(MBED_CONF_ATMEL_RF_FULL_SPI_SPEED_BYTE_SPACING);
00565   if (spacing < MBED_CONF_ATMEL_RF_FULL_SPI_SPEED_BYTE_SPACING) {
00566       rf->spi.frequency(MBED_CONF_ATMEL_RF_LOW_SPI_SPEED);
00567       rf->spi.write_spacing(0);
00568   }
00569 #elif MBED_CONF_ATMEL_RF_ASSUME_SPACED_SPI
00570   rf->spi.frequency(MBED_CONF_ATMEL_RF_FULL_SPI_SPEED);
00571 #else
00572   rf->spi.frequency(MBED_CONF_ATMEL_RF_LOW_SPI_SPEED);
00573 #endif
00574   rf->IRQ.rise(0);
00575   rf->RST = 1;
00576   wait_ms(1);
00577   rf->RST = 0;
00578   wait_ms(10);
00579   CS_RELEASE();
00580   rf->SLP_TR = 0;
00581   wait_ms(10);
00582   rf->RST = 1;
00583   wait_ms(10);
00584 
00585   rf->IRQ.rise(&rf_if_interrupt_handler);
00586 }
00587 
00588 /*
00589  * \brief Function enables the promiscuous mode.
00590  *
00591  * \param none
00592  *
00593  * \return none
00594  */
00595 static void rf_if_enable_promiscuous_mode(void)
00596 {
00597   if (!(xah_ctrl_1 & AACK_PROM_MODE)) {
00598     /*Set AACK_PROM_MODE to enable the promiscuous mode*/
00599     rf_if_write_register(XAH_CTRL_1, xah_ctrl_1 |= AACK_PROM_MODE);
00600   }
00601 }
00602 
00603 /*
00604  * \brief Function disable the promiscuous mode.
00605  *
00606  * \param none
00607  *
00608  * \return none
00609  */
00610 static void rf_if_disable_promiscuous_mode(void)
00611 {
00612   if (xah_ctrl_1 & AACK_PROM_MODE) {
00613     /*Clear AACK_PROM_MODE to disable the promiscuous mode*/
00614     rf_if_write_register(XAH_CTRL_1, xah_ctrl_1 &= ~AACK_PROM_MODE);
00615   }
00616 }
00617 
00618 /*
00619  * \brief Function enables the Antenna diversity usage.
00620  *
00621  * \param none
00622  *
00623  * \return none
00624  */
00625 static void rf_if_enable_ant_div(void)
00626 {
00627   /*Set ANT_EXT_SW_EN to enable controlling of antenna diversity*/
00628   rf_if_set_bit(ANT_DIV, ANT_EXT_SW_EN, ANT_EXT_SW_EN);
00629 }
00630 
00631 /*
00632  * \brief Function disables the Antenna diversity usage.
00633  *
00634  * \param none
00635  *
00636  * \return none
00637  */
00638 static void rf_if_disable_ant_div(void)
00639 {
00640   rf_if_clear_bit(ANT_DIV, ANT_EXT_SW_EN);
00641 }
00642 
00643 /*
00644  * \brief Function sets the SLP TR pin.
00645  *
00646  * \param none
00647  *
00648  * \return none
00649  */
00650 static void rf_if_enable_slptr(void)
00651 {
00652   rf->SLP_TR = 1;
00653 }
00654 
00655 /*
00656  * \brief Function clears the SLP TR pin.
00657  *
00658  * \param none
00659  *
00660  * \return none
00661  */
00662 static void rf_if_disable_slptr(void)
00663 {
00664   rf->SLP_TR = 0;
00665 }
00666 
00667 /*
00668  * \brief Function writes the antenna diversity settings.
00669  *
00670  * \param none
00671  *
00672  * \return none
00673  */
00674 static void rf_if_write_antenna_diversity_settings(void)
00675 {
00676   /*Recommended setting of PDT_THRES is 3 when antenna diversity is used*/
00677   rf_if_set_bit(RX_CTRL, 0x03, 0x0f);
00678   rf_if_write_register(ANT_DIV, ANT_DIV_EN | ANT_EXT_SW_EN | ANT_CTRL_DEFAULT);
00679 }
00680 
00681 /*
00682  * \brief Function writes the TX output power register.
00683  *
00684  * \param value Given register value
00685  *
00686  * \return none
00687  */
00688 static void rf_if_write_set_tx_power_register(uint8_t value)
00689 {
00690   rf_if_write_register(PHY_TX_PWR, value);
00691 }
00692 
00693 /*
00694  * \brief Function returns the RF part number.
00695  *
00696  * \param none
00697  *
00698  * \return part number
00699  */
00700 static uint8_t rf_if_read_part_num(void)
00701 {
00702   return rf_if_read_register(PART_NUM);
00703 }
00704 
00705 /*
00706  * \brief Function writes the RF settings and initialises SPI interface.
00707  *
00708  * \param none
00709  *
00710  * \return none
00711  */
00712 static void rf_if_write_rf_settings(void)
00713 {
00714   /*Reset RF module*/
00715   rf_if_reset_radio();
00716 
00717   rf_part_num = rf_if_read_part_num();
00718 
00719   rf_if_write_register(XAH_CTRL_0,0);
00720 
00721   /* Auto CRC on, IRQ status shows unmasked only, TRX_STATUS output on all accesses */
00722   rf_if_write_register(TRX_CTRL_1, TX_AUTO_CRC_ON | SPI_CMD_MODE_TRX_STATUS);
00723 
00724   rf_if_write_register(IRQ_MASK, CCA_ED_DONE | TRX_END | TRX_UR);
00725 
00726   xah_ctrl_1 = rf_if_read_register(XAH_CTRL_1);
00727 
00728   /*Read transceiver PART_NUM*/
00729   rf_part_num = rf_if_read_register(PART_NUM);
00730 
00731   /*Sub-GHz RF settings*/
00732   if(rf_part_num == PART_AT86RF212)
00733   {
00734     /*GC_TX_OFFS mode-dependent setting - OQPSK*/
00735     rf_if_write_register(RF_CTRL_0, 0x32);
00736 
00737     if(rf_if_read_register(VERSION_NUM) == VERSION_AT86RF212B)
00738     {
00739       /*TX Output Power setting - 0 dBm North American Band*/
00740       rf_if_write_register(PHY_TX_PWR, 0x03);
00741     }
00742     else
00743     {
00744       /*TX Output Power setting - 0 dBm North American Band*/
00745       rf_if_write_register(PHY_TX_PWR, 0x24);
00746     }
00747 
00748     /*PHY Mode: IEEE 802.15.4-2006/2011 - OQPSK-SIN-250*/
00749     rf_if_write_register(TRX_CTRL_2, RX_SAFE_MODE | RF_PHY_MODE);
00750     /*Based on receiver Characteristics. See AT86RF212B Datasheet where RSSI BASE VALUE in range -97 - -100 dBm*/
00751     rf_rssi_base_val = -98;
00752   }
00753   /*2.4GHz RF settings*/
00754   else
00755   {
00756 #if 0
00757     /* Disable power saving functions for now - can only impact reliability,
00758      * and don't have any users demanding it. */
00759     /*Set RPC register*/
00760     rf_if_write_register(TRX_RPC, RX_RPC_CTRL|RX_RPC_EN|PLL_RPC_EN|XAH_TX_RPC_EN|IPAN_RPC_EN|TRX_RPC_RSVD_1);
00761 #endif
00762     /*PHY Mode: IEEE 802.15.4 - Data Rate 250 kb/s*/
00763     rf_if_write_register(TRX_CTRL_2, RX_SAFE_MODE);
00764     rf_rssi_base_val = -91;
00765   }
00766 }
00767 
00768 /*
00769  * \brief Function returns the RF state
00770  *
00771  * \param none
00772  *
00773  * \return RF state
00774  */
00775 static rf_trx_states_t rf_if_read_trx_state(void)
00776 {
00777   return rf_if_trx_status_from_full(rf_if_read_register(TRX_STATUS));
00778 }
00779 
00780 /*
00781  * \brief Function reads packet buffer.
00782  *
00783  * \param data_out Output buffer
00784  * \param lqi_out LQI output
00785  * \param ed_out ED output
00786  * \param crc_good CRC good indication
00787  *
00788  * \return PSDU length [0..RF_MTU]
00789  */
00790 static uint16_t rf_if_read_packet(uint8_t data_out[RF_MTU], uint8_t *lqi_out, uint8_t *ed_out, bool *crc_good)
00791 {
00792   CS_SELECT();
00793   const uint8_t tx[1] = { 0x20 };
00794   uint8_t rx[3];
00795   rf_if_spi_exchange_n(tx, 1, rx, 2);
00796   uint8_t len = rx[1] & 0x7F;
00797   rf_if_spi_exchange_n(NULL, 0, data_out, len);
00798   rf_if_spi_exchange_n(NULL, 0, rx, 3);
00799   *lqi_out = rx[0];
00800   *ed_out = rx[1];
00801   *crc_good = rx[2] & 0x80;
00802   CS_RELEASE();
00803 
00804   return len;
00805 }
00806 
00807 /*
00808  * \brief Function writes RF short address registers
00809  *
00810  * \param short_address Given short address
00811  *
00812  * \return none
00813  */
00814 static void rf_if_write_short_addr_registers(uint8_t *short_address)
00815 {
00816   rf_if_write_register(SHORT_ADDR_1, *short_address++);
00817   rf_if_write_register(SHORT_ADDR_0, *short_address);
00818 }
00819 
00820 /*
00821  * \brief Function sets the frame pending in ACK message
00822  *
00823  * \param state Given frame pending state
00824  *
00825  * \return none
00826  */
00827 static void rf_if_ack_pending_ctrl(uint8_t state)
00828 {
00829   rf_if_lock();
00830   if(state)
00831   {
00832     rf_if_set_bit(CSMA_SEED_1, (1 << AACK_SET_PD), (1 << AACK_SET_PD));
00833   }
00834   else
00835   {
00836     rf_if_clear_bit(CSMA_SEED_1, (1 << AACK_SET_PD));
00837   }
00838   rf_if_unlock();
00839 }
00840 
00841 /*
00842  * \brief Function returns the state of frame pending control
00843  *
00844  * \param none
00845  *
00846  * \return Frame pending state
00847  */
00848 static uint8_t rf_if_last_acked_pending(void)
00849 {
00850   uint8_t last_acked_data_pending;
00851 
00852   rf_if_lock();
00853   if(rf_if_read_register(CSMA_SEED_1) & (1 << AACK_SET_PD))
00854     last_acked_data_pending = 1;
00855   else
00856     last_acked_data_pending = 0;
00857   rf_if_unlock();
00858 
00859   return last_acked_data_pending;
00860 }
00861 
00862 /*
00863  * \brief Function calibrates the RF part.
00864  *
00865  * \param none
00866  *
00867  * \return none
00868  */
00869 static void rf_if_calibration(void)
00870 {
00871   rf_if_set_bit(FTN_CTRL, FTN_START, FTN_START);
00872   /*Wait while calibration is running*/
00873   while(rf_if_read_register(FTN_CTRL) & FTN_START);
00874 }
00875 
00876 /*
00877  * \brief Function writes RF PAN Id registers
00878  *
00879  * \param pan_id Given PAN Id
00880  *
00881  * \return none
00882  */
00883 static void rf_if_write_pan_id_registers(uint8_t *pan_id)
00884 {
00885   rf_if_write_register(PAN_ID_1, *pan_id++);
00886   rf_if_write_register(PAN_ID_0, *pan_id);
00887 }
00888 
00889 /*
00890  * \brief Function writes RF IEEE Address registers
00891  *
00892  * \param address Given IEEE Address
00893  *
00894  * \return none
00895  */
00896 static void rf_if_write_ieee_addr_registers(uint8_t *address)
00897 {
00898   uint8_t i;
00899   uint8_t temp = IEEE_ADDR_0;
00900 
00901   for(i=0; i<8; i++)
00902     rf_if_write_register(temp++, address[7-i]);
00903 }
00904 
00905 /*
00906  * \brief Function writes data in RF frame buffer.
00907  *
00908  * \param ptr Pointer to data (PSDU, except FCS)
00909  * \param length Pointer to length (PSDU length, minus 2 for FCS)
00910  *
00911  * \return none
00912  */
00913 static void rf_if_write_frame_buffer(const uint8_t *ptr, uint8_t length)
00914 {
00915   const uint8_t cmd[2] = { 0x60, static_cast<uint8_t>(length + 2) };
00916 
00917   CS_SELECT();
00918   rf_if_spi_exchange_n(cmd, 2, NULL, 0);
00919   rf_if_spi_exchange_n(ptr, length, NULL, 0);
00920   CS_RELEASE();
00921 }
00922 
00923 /*
00924  * \brief Function returns 8-bit random value.
00925  *
00926  * \param none
00927  *
00928  * \return random value
00929  */
00930 static uint8_t rf_if_read_rnd(void)
00931 {
00932   uint8_t temp;
00933   uint8_t tmp_rpc_val = 0;
00934   /*RPC must be disabled while reading the random number*/
00935   if(rf_part_num == PART_AT86RF233)
00936   {
00937     tmp_rpc_val = rf_if_read_register(TRX_RPC);
00938     rf_if_write_register(TRX_RPC, RX_RPC_CTRL|TRX_RPC_RSVD_1);
00939   }
00940 
00941   wait_ms(1);
00942   temp = ((rf_if_read_register(PHY_RSSI)>>5) << 6);
00943   wait_ms(1);
00944   temp |= ((rf_if_read_register(PHY_RSSI)>>5) << 4);
00945   wait_ms(1);
00946   temp |= ((rf_if_read_register(PHY_RSSI)>>5) << 2);
00947   wait_ms(1);
00948   temp |= ((rf_if_read_register(PHY_RSSI)>>5));
00949   wait_ms(1);
00950   if(rf_part_num == PART_AT86RF233)
00951     rf_if_write_register(TRX_RPC, tmp_rpc_val);
00952   return temp;
00953 }
00954 
00955 /*
00956  * \brief Function changes the state of the RF.
00957  *
00958  * \param trx_state Given RF state
00959  *
00960  * \return none
00961  */
00962 static rf_trx_states_t rf_if_change_trx_state(rf_trx_states_t trx_state)
00963 {
00964   rf_if_write_register(TRX_STATE, trx_state);
00965   /*Wait while not in desired state*/
00966   return rf_poll_trx_state_change(trx_state);
00967 }
00968 
00969 /*
00970  * \brief Function starts the CCA process
00971  *
00972  * \param none
00973  *
00974  * \return none
00975  */
00976 static void rf_if_start_cca_process(void)
00977 {
00978   rf_if_write_register(PHY_CC_CCA, CCA_REQUEST | CCA_MODE_3A | rf_phy_channel);
00979 }
00980 
00981 /*
00982  * \brief Function scales RSSI
00983  *
00984  * \param ed_level ED level read from chip
00985  *
00986  * \return appropriately scaled RSSI dBm
00987  */
00988 static int8_t rf_if_scale_rssi(uint8_t ed_level)
00989 {
00990   if (rf_part_num == PART_AT86RF212) {
00991     /* Data sheet says to multiply by 1.03 - this is 1.03125, rounding down */
00992     ed_level += ed_level >> 5;
00993   }
00994   return rf_rssi_base_val + ed_level;
00995 }
00996 
00997 /*
00998  * \brief Function sets the RF channel field
00999  *
01000  * \param Given channel
01001  *
01002  * \return none
01003  */
01004 static void rf_if_set_channel_register(uint8_t channel)
01005 {
01006   rf_if_set_bit(PHY_CC_CCA, channel, CCA_CHANNEL_MASK);
01007 }
01008 
01009 /*
01010  * \brief Function enables RF irq pin interrupts in RF interface.
01011  *
01012  * \param none
01013  *
01014  * \return none
01015  */
01016 static void rf_if_enable_irq(void)
01017 {
01018   rf->IRQ.enable_irq();
01019 }
01020 
01021 /*
01022  * \brief Function disables RF irq pin interrupts in RF interface.
01023  *
01024  * \param none
01025  *
01026  * \return none
01027  */
01028 static void rf_if_disable_irq(void)
01029 {
01030   rf->IRQ.disable_irq();
01031 }
01032 
01033 #ifdef MBED_CONF_RTOS_PRESENT
01034 static void rf_if_interrupt_handler(void)
01035 {
01036     rf->irq_thread.signal_set(SIG_RADIO);
01037 }
01038 
01039 // Started during construction of rf, so variable
01040 // rf isn't set at the start. Uses 'this' instead.
01041 void RFBits::rf_if_irq_task(void)
01042 {
01043     for (;;) {
01044         osEvent event = irq_thread.signal_wait(0);
01045         if (event.status != osEventSignal) {
01046             continue;
01047         }
01048         rf_if_lock();
01049         if (event.value.signals & SIG_RADIO) {
01050             rf_if_irq_task_process_irq();
01051         }
01052         if (event.value.signals & SIG_TIMER_ACK) {
01053             rf_ack_wait_timer_interrupt();
01054         }
01055         if (event.value.signals & SIG_TIMER_CCA) {
01056             rf_cca_timer_interrupt();
01057         }
01058         if (event.value.signals & SIG_TIMER_CAL) {
01059             rf_calibration_timer_interrupt();
01060         }
01061         rf_if_unlock();
01062     }
01063 }
01064 
01065 static void rf_if_irq_task_process_irq(void)
01066 #else
01067 /*
01068  * \brief Function is a RF interrupt vector. End of frame in RX and TX are handled here as well as CCA process interrupt.
01069  *
01070  * \param none
01071  *
01072  * \return none
01073  */
01074 static void rf_if_interrupt_handler(void)
01075 #endif
01076 {
01077   static uint8_t last_is, last_ts;
01078   uint8_t irq_status, full_trx_status;
01079   uint8_t orig_xah_ctrl_1 = xah_ctrl_1;
01080 
01081   /*Read and clear interrupt flag, and pick up trx_status*/
01082   irq_status = rf_if_read_register_with_status(IRQ_STATUS, &full_trx_status);
01083   uint8_t orig_flags = rf_flags;
01084 
01085   /*Frame end interrupt (RX and TX)*/
01086   if(irq_status & TRX_END)
01087   {
01088     /*TX done interrupt*/
01089     rf_trx_states_t trx_status = rf_if_trx_status_from_full(full_trx_status);
01090     if(trx_status == PLL_ON || trx_status == TX_ARET_ON)
01091     {
01092       rf_handle_tx_end(trx_status);
01093     }
01094     /*Frame received interrupt*/
01095     else
01096     {
01097       rf_handle_rx_end(trx_status);
01098     }
01099   }
01100   if(irq_status & CCA_ED_DONE)
01101   {
01102     rf_handle_cca_ed_done(full_trx_status);
01103   }
01104   if (irq_status & TRX_UR)
01105   {
01106     tr_error("Radio underrun is %x->%x ts %x->%x fl %x->%x x1 %x", last_is, irq_status, last_ts, full_trx_status, orig_flags, rf_flags, orig_xah_ctrl_1);
01107   }
01108   last_is = irq_status;
01109   last_ts = full_trx_status;
01110 }
01111 
01112 /*
01113  * \brief Function writes/read data in SPI interface
01114  */
01115 static void rf_if_spi_exchange_n(const void *tx, size_t tx_len, void *rx, size_t rx_len)
01116 {
01117 #if 1
01118   rf->spi.write(static_cast<const char *>(tx), tx_len,
01119                 static_cast<char *>(rx), rx_len);
01120 #else
01121   const uint8_t *txb = static_cast<const uint8_t *>(tx);
01122   uint8_t *rxb = static_cast<uint8_t *>(rx);
01123   while (tx_len > 0 || rx_len > 0) {
01124       uint8_t b;
01125       if (tx_len) {
01126           tx_len--;
01127           b = *txb++;
01128       } else {
01129           b = 0xFF;
01130       }
01131       b = rf->spi.write(b);
01132       if (rx_len) {
01133           rx_len--;
01134           *rxb++ = b;
01135       }
01136   }
01137 #endif
01138 }
01139 
01140 /*
01141  * \brief Function sets given RF flag on.
01142  *
01143  * \param x Given RF flag
01144  *
01145  * \return none
01146  */
01147 static void rf_flags_set(uint8_t x)
01148 {
01149     rf_flags |= x;
01150 }
01151 
01152 /*
01153  * \brief Function clears given RF flag on.
01154  *
01155  * \param x Given RF flag
01156  *
01157  * \return none
01158  */
01159 static void rf_flags_clear(uint8_t x)
01160 {
01161     rf_flags &= ~x;
01162 }
01163 
01164 /*
01165  * \brief Function checks if given RF flag is on.
01166  *
01167  * \param x Given RF flag
01168  *
01169  * \return states of the given flags
01170  */
01171 static uint8_t rf_flags_check(uint8_t x)
01172 {
01173     return (rf_flags & x);
01174 }
01175 
01176 /*
01177  * \brief Function clears all RF flags.
01178  *
01179  * \param none
01180  *
01181  * \return none
01182  */
01183 static void rf_flags_reset(void)
01184 {
01185     rf_flags = 0;
01186 }
01187 
01188 /*
01189  * \brief Function initialises and registers the RF driver.
01190  *
01191  * \param none
01192  *
01193  * \return rf_radio_driver_id Driver ID given by NET library
01194  */
01195 static int8_t rf_device_register(const uint8_t *mac_addr)
01196 {
01197     rf_trx_part_e radio_type;
01198 
01199     rf_init();
01200 
01201     radio_type = rf_radio_type_read();
01202     if(radio_type != ATMEL_UNKNOW_DEV)
01203     {
01204         /*Set pointer to MAC address*/
01205         device_driver.PHY_MAC = (uint8_t *)mac_addr;
01206         device_driver.driver_description = (char*)"ATMEL_MAC";
01207         //Create setup Used Radio chips
01208         if(radio_type == ATMEL_AT86RF212)
01209         {
01210             device_driver.link_type = PHY_LINK_15_4_SUBGHZ_TYPE;
01211         }
01212         else
01213         {
01214             device_driver.link_type = PHY_LINK_15_4_2_4GHZ_TYPE;
01215         }
01216         device_driver.phy_channel_pages = phy_channel_pages;
01217         /*Maximum size of payload is 127*/
01218         device_driver.phy_MTU = 127;
01219         /*No header in PHY*/
01220         device_driver.phy_header_length = 0;
01221         /*No tail in PHY*/
01222         device_driver.phy_tail_length = 0;
01223         /*Set address write function*/
01224         device_driver.address_write = &rf_address_write;
01225         /*Set RF extension function*/
01226         device_driver.extension = &rf_extension;
01227         /*Set RF state control function*/
01228         device_driver.state_control = &rf_interface_state_control;
01229         /*Set transmit function*/
01230         device_driver.tx = &rf_start_cca;
01231         /*NULLIFY rx and tx_done callbacks*/
01232         device_driver.phy_rx_cb = NULL;
01233         device_driver.phy_tx_done_cb = NULL;
01234         /*Register device driver*/
01235         rf_radio_driver_id = arm_net_phy_register(&device_driver);
01236     } else {
01237         rf_if_disable_irq();
01238     }
01239     return rf_radio_driver_id;
01240 }
01241 
01242 /*
01243  * \brief Function unregisters the RF driver.
01244  *
01245  * \param none
01246  *
01247  * \return none
01248  */
01249 static void rf_device_unregister()
01250 {
01251     if (rf_radio_driver_id >= 0) {
01252         arm_net_phy_unregister(rf_radio_driver_id);
01253         rf_radio_driver_id = -1;
01254     }
01255 }
01256 
01257 
01258 /*
01259  * \brief Function is a call back for ACK wait timeout.
01260  *
01261  * \param none
01262  *
01263  * \return none
01264  */
01265 static void rf_ack_wait_timer_interrupt(void)
01266 {
01267     rf_if_lock();
01268     rf_give_up_on_ack();
01269     rf_if_unlock();
01270 }
01271 
01272 /*
01273  * \brief Function is a call back for calibration interval timer.
01274  *
01275  * \param none
01276  *
01277  * \return none
01278  */
01279 static void rf_calibration_timer_interrupt(void)
01280 {
01281     /*Calibrate RF*/
01282     rf_calibration_cb();
01283     /*Start new calibration timeout*/
01284     rf_calibration_timer_start(RF_CALIBRATION_INTERVAL);
01285 }
01286 
01287 /*
01288  * \brief Function is a call back for cca interval timer.
01289  *
01290  * \param none
01291  *
01292  * \return none
01293  */
01294 static void rf_cca_timer_interrupt(void)
01295 {
01296     rf_flags_set(RFF_CCA);
01297     /*Start CCA process*/
01298     rf_if_start_cca_process();
01299 }
01300 
01301 /*
01302  * \brief Function starts the ACK wait timeout.
01303  *
01304  * \param slots Given slots, resolution 50us
01305  *
01306  * \return none
01307  */
01308 static void rf_ack_wait_timer_start(uint16_t slots)
01309 {
01310     rf_if_ack_wait_timer_start(slots);
01311 }
01312 
01313 /*
01314  * \brief Function starts the calibration interval.
01315  *
01316  * \param slots Given slots, resolution 50us
01317  *
01318  * \return none
01319  */
01320 static void rf_calibration_timer_start(uint32_t slots)
01321 {
01322     rf_if_calibration_timer_start(slots);
01323 }
01324 
01325 /*
01326  * \brief Function starts the CCA backoff.
01327  *
01328  * \param slots Given slots, resolution 50us
01329  *
01330  * \return none
01331  */
01332 static void rf_cca_timer_start(uint32_t slots)
01333 {
01334     rf_if_cca_timer_start(slots);
01335 }
01336 
01337 /*
01338  * \brief Function stops the CCA backoff.
01339  *
01340  * \return none
01341  */
01342 static void rf_cca_timer_stop(void)
01343 {
01344     rf_if_cca_timer_stop();
01345 }
01346 
01347 /*
01348  * \brief Function writes various RF settings in startup.
01349  *
01350  * \param none
01351  *
01352  * \return none
01353  */
01354 static void rf_write_settings(void)
01355 {
01356     rf_if_lock();
01357     rf_if_write_rf_settings();
01358     /*Set output power*/
01359     rf_if_write_set_tx_power_register(radio_tx_power);
01360     /*Initialise Antenna Diversity*/
01361     if(rf_use_antenna_diversity)
01362         rf_if_write_antenna_diversity_settings();
01363     rf_if_unlock();
01364 }
01365 
01366 /*
01367  * \brief Function writes 16-bit address in RF address filter.
01368  *
01369  * \param short_address Given short address
01370  *
01371  * \return none
01372  */
01373 static void rf_set_short_adr(uint8_t * short_address)
01374 {
01375     rf_if_lock();
01376     /*Wake up RF if sleeping*/
01377     if(rf_flags_check(RFF_ON) == 0)
01378     {
01379         rf_if_disable_slptr();
01380         rf_poll_trx_state_change(TRX_OFF);
01381     }
01382     /*Write address filter registers*/
01383     rf_if_write_short_addr_registers(short_address);
01384     /*RF back to sleep*/
01385     if(rf_flags_check(RFF_ON) == 0)
01386     {
01387         rf_if_enable_slptr();
01388     }
01389     rf_if_unlock();
01390 }
01391 
01392 /*
01393  * \brief Function writes PAN Id in RF PAN Id filter.
01394  *
01395  * \param pan_id Given PAN Id
01396  *
01397  * \return none
01398  */
01399 static void rf_set_pan_id(uint8_t *pan_id)
01400 {
01401     rf_if_lock();
01402     /*Wake up RF if sleeping*/
01403     if(rf_flags_check(RFF_ON) == 0)
01404     {
01405         rf_if_disable_slptr();
01406         rf_poll_trx_state_change(TRX_OFF);
01407     }
01408     /*Write address filter registers*/
01409     rf_if_write_pan_id_registers(pan_id);
01410     /*RF back to sleep*/
01411     if(rf_flags_check(RFF_ON) == 0)
01412     {
01413         rf_if_enable_slptr();
01414     }
01415     rf_if_unlock();
01416 }
01417 
01418 /*
01419  * \brief Function writes 64-bit address in RF address filter.
01420  *
01421  * \param address Given 64-bit address
01422  *
01423  * \return none
01424  */
01425 static void rf_set_address(uint8_t *address)
01426 {
01427     rf_if_lock();
01428     /*Wake up RF if sleeping*/
01429     if(rf_flags_check(RFF_ON) == 0)
01430     {
01431         rf_if_disable_slptr();
01432         rf_poll_trx_state_change(TRX_OFF);
01433     }
01434     /*Write address filter registers*/
01435     rf_if_write_ieee_addr_registers(address);
01436     /*RF back to sleep*/
01437     if(rf_flags_check(RFF_ON) == 0)
01438     {
01439         rf_if_enable_slptr();
01440     }
01441     rf_if_unlock();
01442 }
01443 
01444 /*
01445  * \brief Function sets the RF channel.
01446  *
01447  * \param ch New channel
01448  *
01449  * \return none
01450  */
01451 static void rf_channel_set(uint8_t ch)
01452 {
01453     rf_if_lock();
01454     rf_phy_channel = ch;
01455     if(ch < 0x1f)
01456         rf_if_set_channel_register(ch);
01457     rf_if_unlock();
01458 }
01459 
01460 
01461 /*
01462  * \brief Function initialises the radio driver and resets the radio.
01463  *
01464  * \param none
01465  *
01466  * \return none
01467  */
01468 static void rf_init(void)
01469 {
01470     rf_if_lock();
01471 
01472     /*Write RF settings*/
01473     rf_write_settings();
01474     /*Initialise PHY mode*/
01475     rf_init_phy_mode();
01476     /*Clear RF flags*/
01477     rf_flags_reset();
01478     /*Set RF in TRX OFF state*/
01479     rf_if_change_trx_state(TRX_OFF);
01480     /*Set RF in PLL_ON state*/
01481     rf_trx_states_t trx_status = rf_if_change_trx_state(PLL_ON);
01482     /*Start receiver*/
01483     rf_receive(trx_status);
01484     /*Read randomness, and add to seed*/
01485     randLIB_add_seed(rf_if_read_rnd());
01486     /*Start RF calibration timer*/
01487     rf_calibration_timer_start(RF_CALIBRATION_INTERVAL);
01488 
01489     rf_if_unlock();
01490 }
01491 
01492 /**
01493  * \brief Function gets called when MAC is setting radio off.
01494  *
01495  * \param none
01496  *
01497  * \return none
01498  */
01499 static void rf_off(void)
01500 {
01501     if(rf_flags_check(RFF_ON))
01502     {
01503         rf_if_lock();
01504         rf_cca_abort();
01505         uint16_t while_counter = 0;
01506         /*Wait while receiving*/
01507         while(rf_if_read_trx_state() == BUSY_RX_AACK)
01508         {
01509             while_counter++;
01510             if(while_counter == 0xffff)
01511                 break;
01512         }
01513         /*RF state change: RX_AACK_ON->PLL_ON->TRX_OFF->SLEEP*/
01514         if(rf_if_read_trx_state() == RX_AACK_ON)
01515         {
01516             rf_if_change_trx_state(PLL_ON);
01517         }
01518         rf_if_change_trx_state(TRX_OFF);
01519         rf_if_enable_slptr();
01520 
01521         /*Disable Antenna Diversity*/
01522         if(rf_use_antenna_diversity)
01523             rf_if_disable_ant_div();
01524         rf_if_unlock();
01525     }
01526 
01527     /*Clears all flags*/
01528     rf_flags_reset();
01529 }
01530 
01531 /*
01532  * \brief Function polls the RF state until it has changed to desired state.
01533  *
01534  * \param trx_state RF state
01535  *
01536  * \return none
01537  */
01538 static rf_trx_states_t rf_poll_trx_state_change(rf_trx_states_t trx_state)
01539 {
01540     uint16_t while_counter = 0;
01541 
01542     if(trx_state == FORCE_PLL_ON)
01543         trx_state = PLL_ON;
01544     else if(trx_state == FORCE_TRX_OFF)
01545         trx_state = TRX_OFF;
01546 
01547     rf_trx_states_t state_out;
01548     while((state_out = rf_if_read_trx_state()) != trx_state)
01549     {
01550         while_counter++;
01551         if(while_counter == 0x1ff)
01552             break;
01553     }
01554 
01555     return state_out;
01556 }
01557 
01558 /*
01559  * \brief Function polls the RF state until it is no longer transitioning.
01560  *
01561  * \param trx_state RF state
01562  *
01563  * \return none
01564  */
01565 static rf_trx_states_t rf_poll_for_state(void)
01566 {
01567     rf_trx_states_t state_out;
01568     while((state_out = rf_if_read_trx_state()) == STATE_TRANSITION_IN_PROGRESS)
01569     {
01570     }
01571 
01572     return state_out;
01573 }
01574 
01575 /*
01576  * \brief Function starts the CCA process before starting data transmission and copies the data to RF TX FIFO.
01577  *
01578  * \param data_ptr Pointer to TX data (excluding FCS)
01579  * \param data_length Length of the TX data (excluding FCS)
01580  * \param tx_handle Handle to transmission
01581  * \return 0 Success
01582  * \return -1 Busy
01583  */
01584 static int8_t rf_start_cca(uint8_t *data_ptr, uint16_t data_length, uint8_t tx_handle, data_protocol_e data_protocol )
01585 {
01586     (void)data_protocol;
01587     rf_if_lock();
01588     /*Check if transmitter is busy*/
01589     rf_trx_states_t trx_state = rf_if_read_trx_state();
01590     if(trx_state == BUSY_RX || trx_state == BUSY_RX_AACK || data_length > RF_MTU - 2)
01591     {
01592         rf_if_unlock();
01593         /*Return busy*/
01594         return -1;
01595     }
01596     else
01597     {
01598         rf_give_up_on_ack();
01599 
01600         /*Nanostack has a static TX buffer, which will remain valid until we*/
01601         /*generate a callback, so we just note the pointer for reading later.*/
01602         rf_tx_data = data_ptr;
01603         rf_tx_length = data_length;
01604         /*Start CCA timeout*/
01605         rf_cca_timer_start(RF_CCA_BASE_BACKOFF + randLIB_get_random_in_range(0, RF_CCA_RANDOM_BACKOFF));
01606         /*Store TX handle*/
01607         mac_tx_handle = tx_handle;
01608         rf_if_unlock();
01609     }
01610 
01611     /*Return success*/
01612     return 0;
01613 }
01614 
01615 /*
01616  * \brief Function aborts CCA process.
01617  *
01618  * \param none
01619  *
01620  * \return none
01621  */
01622 static void rf_cca_abort(void)
01623 {
01624     rf_cca_timer_stop();
01625     rf_flags_clear(RFF_CCA);
01626 }
01627 
01628 /*
01629  * \brief Function starts the transmission of the frame.
01630  *
01631  * \param none
01632  *
01633  * \return none
01634  */
01635 static bool rf_start_tx()
01636 {
01637     /* Attempt change to PLL_ON */
01638     rf_if_write_register(TRX_STATE, PLL_ON);
01639 
01640     // It appears that if radio is busy, rather than ignoring the state change,
01641     // the state change happens when it stops being busy - eg
01642     // after address match fail or finishing reception. If this happens, we do
01643     // not want to transmit - our channel clear check is stale (either someone is
01644     // still transmitting, or it's a long time since we checked). So wait for the
01645     // PLL_ON change and then go to receive mode without trying to transmit.
01646     rf_trx_states_t state = rf_poll_for_state();
01647     int poll_count = 0;
01648     while (state != PLL_ON) {
01649         /* Change didn't work (yet) - must be busy - assume it will eventually change */
01650         state = rf_poll_for_state();
01651         poll_count++;
01652     }
01653 
01654     rf_flags_clear(RFF_RX);
01655     // Check whether we saw any delay in the PLL_ON transition.
01656     if (poll_count > 0) {
01657         tr_warning("PLL_ON delayed, retry count: %d", poll_count);
01658         // let's get back to the receiving state.
01659         rf_receive(state);
01660         return false;
01661     }
01662 
01663     rf_flags_set(RFF_TX);
01664     /*RF state change: SLP_TR pulse triggers PLL_ON->BUSY_TX*/
01665     rf_if_enable_slptr();
01666     /*Chip permits us to write frame buffer while it is transmitting*/
01667     /*As long as first byte of data is in within 176us of TX start, we're good */
01668     rf_if_write_frame_buffer(rf_tx_data, rf_tx_length);
01669     rf_if_disable_slptr();
01670     return true;
01671 }
01672 
01673 /*
01674  * \brief Function sets the RF in RX state.
01675  *
01676  * \param none
01677  *
01678  * \return none
01679  */
01680 static void rf_receive(rf_trx_states_t trx_status)
01681 {
01682     uint16_t while_counter = 0;
01683     if(rf_flags_check(RFF_ON) == 0)
01684     {
01685         rf_on();
01686         rf_channel_set(rf_phy_channel);
01687         trx_status = TRX_OFF;
01688     }
01689     /*If not yet in RX state set it*/
01690     if(rf_flags_check(RFF_RX) == 0)
01691     {
01692         /*Wait while receiving data. Just making sure, usually this shouldn't happen. */
01693         while(trx_status == BUSY_RX || trx_status == BUSY_RX_AACK || trx_status == STATE_TRANSITION_IN_PROGRESS)
01694         {
01695             while_counter++;
01696             if(while_counter == 0xffff)
01697             {
01698                 break;
01699             }
01700             trx_status = rf_if_read_trx_state();
01701         }
01702 
01703         if((rf_mode == RF_MODE_SNIFFER) || (rf_mode == RF_MODE_ED))
01704         {
01705             if (trx_status != RX_ON) {
01706                 trx_status = rf_if_change_trx_state(RX_ON);
01707             }
01708         }
01709         else
01710         {
01711             /*ACK is always received in promiscuous mode to bypass address filters*/
01712             if(rf_rx_mode)
01713             {
01714                 rf_rx_mode = 0;
01715                 rf_if_enable_promiscuous_mode();
01716             }
01717             else
01718             {
01719                 rf_if_disable_promiscuous_mode();
01720             }
01721             if (trx_status != RX_AACK_ON) {
01722                 trx_status = rf_if_change_trx_state(RX_AACK_ON);
01723             }
01724         }
01725         /*If calibration timer was unable to calibrate the RF, run calibration now*/
01726         if(!rf_tuned)
01727         {
01728             /*Start calibration. This can be done in states TRX_OFF, PLL_ON or in any receive state*/
01729             rf_if_calibration();
01730             /*RF is tuned now*/
01731             rf_tuned = 1;
01732         }
01733 
01734         rf_flags_set(RFF_RX);
01735     }
01736 }
01737 
01738 /*
01739  * \brief Function calibrates the radio.
01740  *
01741  * \param none
01742  *
01743  * \return none
01744  */
01745 static void rf_calibration_cb(void)
01746 {
01747     /*clear tuned flag to start tuning in rf_receive*/
01748     rf_tuned = 0;
01749     /*If RF is in default receive state, start calibration*/
01750     if(rf_if_read_trx_state() == RX_AACK_ON)
01751     {
01752         rf_if_lock();
01753         /*Set RF in PLL_ON state*/
01754         rf_if_change_trx_state(PLL_ON);
01755         /*Set RF in TRX_OFF state to start PLL tuning*/
01756         rf_if_change_trx_state(TRX_OFF);
01757         /*Set RF in RX_ON state to calibrate*/
01758         rf_trx_states_t trx_status = rf_if_change_trx_state(RX_ON);
01759         /*Calibrate FTN*/
01760         rf_if_calibration();
01761         /*RF is tuned now*/
01762         rf_tuned = 1;
01763         /*Back to default receive state*/
01764         rf_flags_clear(RFF_RX);
01765         rf_receive(trx_status);
01766         rf_if_unlock();
01767     }
01768 }
01769 
01770 /*
01771  * \brief Function sets RF_ON flag when radio is powered.
01772  *
01773  * \param none
01774  *
01775  * \return none
01776  */
01777 static void rf_on(void)
01778 {
01779     /*Set RFF_ON flag*/
01780     if(rf_flags_check(RFF_ON) == 0)
01781     {
01782         rf_if_lock();
01783         rf_flags_set(RFF_ON);
01784         /*Enable Antenna diversity*/
01785         if(rf_use_antenna_diversity)
01786             /*Set ANT_EXT_SW_EN to enable controlling of antenna diversity*/
01787             rf_if_enable_ant_div();
01788 
01789         /*Wake up from sleep state*/
01790         rf_if_disable_slptr();
01791         rf_poll_trx_state_change(TRX_OFF);
01792         rf_if_unlock();
01793     }
01794 }
01795 
01796 /*
01797  * \brief Abandon waiting for an ack frame
01798 
01799  * \return none
01800  */
01801 static void rf_give_up_on_ack(void)
01802 {
01803     if (expected_ack_sequence == -1) {
01804         return;
01805     }
01806 
01807     rf_if_disable_promiscuous_mode();
01808     rf_if_ack_wait_timer_stop();
01809     expected_ack_sequence = -1;
01810 
01811     if(device_driver.phy_tx_done_cb){
01812         device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_TX_FAIL, 0, 0);
01813     }
01814 }
01815 
01816 /*
01817  * \brief Function handles the received ACK frame.
01818  *
01819  * \param seq_number Sequence number of received ACK
01820  * \param data_pending Pending bit state in received ACK
01821  *
01822  * \return none
01823  */
01824 static void rf_handle_ack(uint8_t seq_number, uint8_t data_pending)
01825 {
01826     phy_link_tx_status_e phy_status;
01827     /*Received ACK sequence must be equal with transmitted packet sequence*/
01828     if(expected_ack_sequence == seq_number)
01829     {
01830         rf_if_disable_promiscuous_mode();
01831         rf_if_ack_wait_timer_stop();
01832         expected_ack_sequence = -1;
01833 
01834         /*When data pending bit in ACK frame is set, inform NET library*/
01835         if(data_pending)
01836             phy_status = PHY_LINK_TX_DONE_PENDING;
01837         else
01838             phy_status = PHY_LINK_TX_DONE;
01839         /*Call PHY TX Done API*/
01840         if(device_driver.phy_tx_done_cb){
01841             device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle,phy_status, 0, 0);
01842         }
01843     } else {
01844         rf_give_up_on_ack();
01845     }
01846 }
01847 
01848 /*
01849  * \brief Function is a call back for RX end interrupt.
01850  *
01851  * \param none
01852  *
01853  * \return none
01854  */
01855 static void rf_handle_rx_end(rf_trx_states_t trx_status)
01856 {
01857     /*Frame received interrupt*/
01858     if(!rf_flags_check(RFF_RX)) {
01859         return;
01860     }
01861 
01862     static uint8_t rf_buffer[RF_MTU];
01863     uint8_t rf_lqi, rf_ed;
01864     int8_t rf_rssi;
01865     bool crc_good;
01866 
01867     /*Read received packet*/
01868     uint8_t len = rf_if_read_packet(rf_buffer, &rf_lqi, &rf_ed, &crc_good);
01869 
01870     if (len < 5 || !crc_good) {
01871         rf_give_up_on_ack();
01872         return;
01873     }
01874 
01875     /* Convert raw ED to dBm value (chip-dependent) */
01876     rf_rssi = rf_if_scale_rssi(rf_ed);
01877 
01878     /* Create a virtual LQI using received RSSI, forgetting actual HW LQI */
01879     /* (should be done through PHY_EXTENSION_CONVERT_SIGNAL_INFO) */
01880     rf_lqi = rf_scale_lqi(rf_rssi);
01881 
01882     /*Handle received ACK*/
01883     if((rf_buffer[0] & 0x07) == 0x02 && rf_mode != RF_MODE_SNIFFER)
01884     {
01885         /*Check if data is pending*/
01886         bool pending = (rf_buffer[0] & 0x10);
01887 
01888         /*Send sequence number in ACK handler*/
01889         rf_handle_ack(rf_buffer[2], pending);
01890     } else {
01891         rf_give_up_on_ack();
01892         if( device_driver.phy_rx_cb ){
01893             device_driver.phy_rx_cb(rf_buffer, len - 2, rf_lqi, rf_rssi, rf_radio_driver_id);
01894         }
01895     }
01896 }
01897 
01898 /*
01899  * \brief Function is called when MAC is shutting down the radio.
01900  *
01901  * \param none
01902  *
01903  * \return none
01904  */
01905 static void rf_shutdown(void)
01906 {
01907     /*Call RF OFF*/
01908     rf_off();
01909 }
01910 
01911 /*
01912  * \brief Function is a call back for TX end interrupt.
01913  *
01914  * \param none
01915  *
01916  * \return none
01917  */
01918 static void rf_handle_tx_end(rf_trx_states_t trx_status)
01919 {
01920     rf_rx_mode = 0;
01921     /*If ACK is needed for this transmission*/
01922     if((rf_tx_data[0] & 0x20) && rf_flags_check(RFF_TX))
01923     {
01924         expected_ack_sequence = rf_tx_data[2];
01925         rf_ack_wait_timer_start(rf_ack_wait_duration);
01926         rf_rx_mode = 1;
01927     }
01928     rf_flags_clear(RFF_TX);
01929     /*Start receiver*/
01930     rf_receive(trx_status);
01931 
01932     /*Call PHY TX Done API*/
01933     if(device_driver.phy_tx_done_cb){
01934         device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_TX_SUCCESS, 0, 0);
01935     }
01936 }
01937 
01938 /*
01939  * \brief Function is a call back for CCA ED done interrupt.
01940  *
01941  * \param none
01942  *
01943  * \return none
01944  */
01945 static void rf_handle_cca_ed_done(uint8_t full_trx_status)
01946 {
01947     if (!rf_flags_check(RFF_CCA)) {
01948         return;
01949     }
01950     rf_flags_clear(RFF_CCA);
01951 
01952     bool success = false;
01953 
01954     /*Check the result of CCA process*/
01955     if((full_trx_status & CCA_STATUS) && rf_if_trx_status_from_full(full_trx_status) == RX_AACK_ON)
01956     {
01957         success = rf_start_tx();
01958     }
01959 
01960     if (!success)
01961     {
01962         /*Send CCA fail notification*/
01963         if(device_driver.phy_tx_done_cb){
01964             device_driver.phy_tx_done_cb(rf_radio_driver_id, mac_tx_handle, PHY_LINK_CCA_FAIL, 0, 0);
01965         }
01966     }
01967 }
01968 
01969 /*
01970  * \brief Function gives the control of RF states to MAC.
01971  *
01972  * \param new_state RF state
01973  * \param rf_channel RF channel
01974  *
01975  * \return 0 Success
01976  */
01977 static int8_t rf_interface_state_control(phy_interface_state_e new_state, uint8_t rf_channel)
01978 {
01979     int8_t ret_val = 0;
01980     switch (new_state)
01981     {
01982         /*Reset PHY driver and set to idle*/
01983         case PHY_INTERFACE_RESET:
01984             break;
01985         /*Disable PHY Interface driver*/
01986         case PHY_INTERFACE_DOWN:
01987             rf_shutdown();
01988             break;
01989         /*Enable PHY Interface driver*/
01990         case PHY_INTERFACE_UP:
01991             rf_if_lock();
01992             rf_mode = RF_MODE_NORMAL;
01993             rf_channel_set(rf_channel);
01994             rf_receive();
01995             rf_if_enable_irq();
01996             rf_if_unlock();
01997             break;
01998         /*Enable wireless interface ED scan mode*/
01999         case PHY_INTERFACE_RX_ENERGY_STATE:
02000             rf_mode = RF_MODE_ED;
02001             rf_channel_set(rf_channel);
02002             rf_receive();
02003             rf_if_disable_irq();
02004             // Read status to clear pending flags.
02005             rf_if_read_register(IRQ_STATUS);
02006             // ED can be initiated by writing arbitrary value to PHY_ED_LEVEL
02007             rf_if_write_register(PHY_ED_LEVEL, 0xff);
02008             break;
02009         case PHY_INTERFACE_SNIFFER_STATE:             /**< Enable Sniffer state */
02010             rf_mode = RF_MODE_SNIFFER;
02011             rf_channel_set(rf_channel);
02012             rf_flags_clear(RFF_RX);
02013             rf_receive();
02014             rf_if_enable_irq();
02015             break;
02016     }
02017     return ret_val;
02018 }
02019 
02020 /*
02021  * \brief Function controls the ACK pending, channel setting and energy detection.
02022  *
02023  * \param extension_type Type of control
02024  * \param data_ptr Data from NET library
02025  *
02026  * \return 0 Success
02027  */
02028 static int8_t rf_extension(phy_extension_type_e extension_type, uint8_t *data_ptr)
02029 {
02030     switch (extension_type)
02031     {
02032         /*Control MAC pending bit for Indirect data transmission*/
02033         case PHY_EXTENSION_CTRL_PENDING_BIT:
02034             if(*data_ptr)
02035             {
02036                 rf_if_ack_pending_ctrl(1);
02037             }
02038             else
02039             {
02040                 rf_if_ack_pending_ctrl(0);
02041             }
02042             break;
02043         /*Return frame pending status*/
02044         case PHY_EXTENSION_READ_LAST_ACK_PENDING_STATUS:
02045             *data_ptr = rf_if_last_acked_pending();
02046             break;
02047         /*Set channel*/
02048         case PHY_EXTENSION_SET_CHANNEL:
02049             break;
02050         /*Read energy on the channel*/
02051         case PHY_EXTENSION_READ_CHANNEL_ENERGY:
02052             // End of the ED measurement is indicated by CCA_ED_DONE
02053             while (!(rf_if_read_register(IRQ_STATUS) & CCA_ED_DONE));
02054             // RF input power: RSSI base level + 1[db] * PHY_ED_LEVEL
02055             *data_ptr = rf_sensitivity + rf_if_read_register(PHY_ED_LEVEL);
02056             // Read status to clear pending flags.
02057             rf_if_read_register(IRQ_STATUS);
02058             // Next ED measurement is started, next PHY_EXTENSION_READ_CHANNEL_ENERGY call will return the result.
02059             rf_if_write_register(PHY_ED_LEVEL, 0xff);
02060             break;
02061         /*Read status of the link*/
02062         case PHY_EXTENSION_READ_LINK_STATUS:
02063             break;
02064         default:
02065             break;
02066     }
02067     return 0;
02068 }
02069 
02070 /*
02071  * \brief Function sets the addresses to RF address filters.
02072  *
02073  * \param address_type Type of address
02074  * \param address_ptr Pointer to given address
02075  *
02076  * \return 0 Success
02077  */
02078 static int8_t rf_address_write(phy_address_type_e address_type, uint8_t *address_ptr)
02079 {
02080     int8_t ret_val = 0;
02081     switch (address_type)
02082     {
02083         /*Set 48-bit address*/
02084         case PHY_MAC_48BIT:
02085             break;
02086             /*Set 64-bit address*/
02087         case PHY_MAC_64BIT:
02088             rf_set_address(address_ptr);
02089             break;
02090         /*Set 16-bit address*/
02091         case PHY_MAC_16BIT:
02092             rf_set_short_adr(address_ptr);
02093             break;
02094         /*Set PAN Id*/
02095         case PHY_MAC_PANID:
02096             rf_set_pan_id(address_ptr);
02097             break;
02098     }
02099     return ret_val;
02100 }
02101 
02102 /*
02103  * \brief Function initialises the ACK wait time and returns the used PHY mode.
02104  *
02105  * \param none
02106  *
02107  * \return tmp Used PHY mode
02108  */
02109 static void rf_init_phy_mode(void)
02110 {
02111     uint8_t tmp = 0;
02112     uint8_t part = rf_if_read_part_num();
02113     /*Read used PHY Mode*/
02114     tmp = rf_if_read_register(TRX_CTRL_2);
02115     /*Set ACK wait time for used data rate*/
02116     if(part == PART_AT86RF212)
02117     {
02118         if((tmp & 0x1f) == 0x00)
02119         {
02120             rf_sensitivity = -110;
02121             rf_ack_wait_duration = 938;
02122             tmp = BPSK_20;
02123         }
02124         else if((tmp & 0x1f) == 0x04)
02125         {
02126             rf_sensitivity = -108;
02127             rf_ack_wait_duration = 469;
02128             tmp = BPSK_40;
02129         }
02130         else if((tmp & 0x1f) == 0x14)
02131         {
02132             rf_sensitivity = -108;
02133             rf_ack_wait_duration = 469;
02134             tmp = BPSK_40_ALT;
02135         }
02136         else if((tmp & 0x1f) == 0x08)
02137         {
02138             rf_sensitivity = -101;
02139             rf_ack_wait_duration = 50;
02140             tmp = OQPSK_SIN_RC_100;
02141         }
02142         else if((tmp & 0x1f) == 0x09)
02143         {
02144             rf_sensitivity = -99;
02145             rf_ack_wait_duration = 30;
02146             tmp = OQPSK_SIN_RC_200;
02147         }
02148         else if((tmp & 0x1f) == 0x18)
02149         {
02150             rf_sensitivity = -102;
02151             rf_ack_wait_duration = 50;
02152             tmp = OQPSK_RC_100;
02153         }
02154         else if((tmp & 0x1f) == 0x19)
02155         {
02156             rf_sensitivity = -100;
02157             rf_ack_wait_duration = 30;
02158             tmp = OQPSK_RC_200;
02159         }
02160         else if((tmp & 0x1f) == 0x0c)
02161         {
02162             rf_sensitivity = -100;
02163             rf_ack_wait_duration = 20;
02164             tmp = OQPSK_SIN_250;
02165         }
02166         else if((tmp & 0x1f) == 0x0d)
02167         {
02168             rf_sensitivity = -98;
02169             rf_ack_wait_duration = 25;
02170             tmp = OQPSK_SIN_500;
02171         }
02172         else if((tmp & 0x1f) == 0x0f)
02173         {
02174             rf_sensitivity = -98;
02175             rf_ack_wait_duration = 25;
02176             tmp = OQPSK_SIN_500_ALT;
02177         }
02178         else if((tmp & 0x1f) == 0x1c)
02179         {
02180             rf_sensitivity = -101;
02181             rf_ack_wait_duration = 20;
02182             tmp = OQPSK_RC_250;
02183         }
02184         else if((tmp & 0x1f) == 0x1d)
02185         {
02186             rf_sensitivity = -99;
02187             rf_ack_wait_duration = 25;
02188             tmp = OQPSK_RC_500;
02189         }
02190         else if((tmp & 0x1f) == 0x1f)
02191         {
02192             rf_sensitivity = -99;
02193             rf_ack_wait_duration = 25;
02194             tmp = OQPSK_RC_500_ALT;
02195         }
02196         else if((tmp & 0x3f) == 0x2A)
02197         {
02198             rf_sensitivity = -91;
02199             rf_ack_wait_duration = 25;
02200             tmp = OQPSK_SIN_RC_400_SCR_ON;
02201         }
02202         else if((tmp & 0x3f) == 0x0A)
02203         {
02204             rf_sensitivity = -91;
02205             rf_ack_wait_duration = 25;
02206             tmp = OQPSK_SIN_RC_400_SCR_OFF;
02207         }
02208         else if((tmp & 0x3f) == 0x3A)
02209         {
02210             rf_sensitivity = -97;
02211             rf_ack_wait_duration = 25;
02212             tmp = OQPSK_RC_400_SCR_ON;
02213         }
02214         else if((tmp & 0x3f) == 0x1A)
02215         {
02216             rf_sensitivity = -97;
02217             rf_ack_wait_duration = 25;
02218             tmp = OQPSK_RC_400_SCR_OFF;
02219         }
02220         else if((tmp & 0x3f) == 0x2E)
02221         {
02222             rf_sensitivity = -93;
02223             rf_ack_wait_duration = 13;
02224             tmp = OQPSK_SIN_1000_SCR_ON;
02225         }
02226         else if((tmp & 0x3f) == 0x0E)
02227         {
02228             rf_sensitivity = -93;
02229             rf_ack_wait_duration = 13;
02230             tmp = OQPSK_SIN_1000_SCR_OFF;
02231         }
02232         else if((tmp & 0x3f) == 0x3E)
02233         {
02234             rf_sensitivity = -95;
02235             rf_ack_wait_duration = 13;
02236             tmp = OQPSK_RC_1000_SCR_ON;
02237         }
02238         else if((tmp & 0x3f) == 0x1E)
02239         {
02240             rf_sensitivity = -95;
02241             rf_ack_wait_duration = 13;
02242             tmp = OQPSK_RC_1000_SCR_OFF;
02243         }
02244     }
02245     else
02246     {
02247         rf_sensitivity = -101;
02248         rf_ack_wait_duration = 20;
02249     }
02250     /*Board design might reduces the sensitivity*/
02251     //rf_sensitivity += RF_SENSITIVITY_CALIBRATION;
02252 }
02253 
02254 
02255 static uint8_t rf_scale_lqi(int8_t rssi)
02256 {
02257     uint8_t scaled_lqi;
02258 
02259     /*rssi < RF sensitivity*/
02260     if(rssi < rf_sensitivity)
02261         scaled_lqi=0;
02262     /*-91 dBm < rssi < -81 dBm (AT86RF233 XPro)*/
02263     /*-90 dBm < rssi < -80 dBm (AT86RF212B XPro)*/
02264     else if(rssi < (rf_sensitivity + 10))
02265         scaled_lqi=31;
02266     /*-81 dBm < rssi < -71 dBm (AT86RF233 XPro)*/
02267     /*-80 dBm < rssi < -70 dBm (AT86RF212B XPro)*/
02268     else if(rssi < (rf_sensitivity + 20))
02269         scaled_lqi=207;
02270     /*-71 dBm < rssi < -61 dBm (AT86RF233 XPro)*/
02271     /*-70 dBm < rssi < -60 dBm (AT86RF212B XPro)*/
02272     else if(rssi < (rf_sensitivity + 30))
02273         scaled_lqi=255;
02274     /*-61 dBm < rssi < -51 dBm (AT86RF233 XPro)*/
02275     /*-60 dBm < rssi < -50 dBm (AT86RF212B XPro)*/
02276     else if(rssi < (rf_sensitivity + 40))
02277         scaled_lqi=255;
02278     /*-51 dBm < rssi < -41 dBm (AT86RF233 XPro)*/
02279     /*-50 dBm < rssi < -40 dBm (AT86RF212B XPro)*/
02280     else if(rssi < (rf_sensitivity + 50))
02281         scaled_lqi=255;
02282     /*-41 dBm < rssi < -31 dBm (AT86RF233 XPro)*/
02283     /*-40 dBm < rssi < -30 dBm (AT86RF212B XPro)*/
02284     else if(rssi < (rf_sensitivity + 60))
02285         scaled_lqi=255;
02286     /*-31 dBm < rssi < -21 dBm (AT86RF233 XPro)*/
02287     /*-30 dBm < rssi < -20 dBm (AT86RF212B XPro)*/
02288     else if(rssi < (rf_sensitivity + 70))
02289         scaled_lqi=255;
02290     /*rssi > RF saturation*/
02291     else if(rssi > (rf_sensitivity + 80))
02292         scaled_lqi=111;
02293     /*-21 dBm < rssi < -11 dBm (AT86RF233 XPro)*/
02294     /*-20 dBm < rssi < -10 dBm (AT86RF212B XPro)*/
02295     else
02296         scaled_lqi=255;
02297 
02298     return scaled_lqi;
02299 }
02300 
02301 NanostackRfPhyAtmel::NanostackRfPhyAtmel(PinName spi_mosi, PinName spi_miso,
02302         PinName spi_sclk, PinName spi_cs,  PinName spi_rst, PinName spi_slp, PinName spi_irq,
02303         PinName i2c_sda, PinName i2c_scl)
02304     : _mac(i2c_sda, i2c_scl), _mac_addr(), _rf(NULL), _mac_set(false),
02305       _spi_mosi(spi_mosi), _spi_miso(spi_miso), _spi_sclk(spi_sclk),
02306       _spi_cs(spi_cs), _spi_rst(spi_rst), _spi_slp(spi_slp), _spi_irq(spi_irq)
02307 {
02308     _rf = new RFBits(_spi_mosi, _spi_miso, _spi_sclk, _spi_cs, _spi_rst, _spi_slp, _spi_irq);
02309 }
02310 
02311 NanostackRfPhyAtmel::~NanostackRfPhyAtmel()
02312 {
02313     delete _rf;
02314 }
02315 
02316 int8_t NanostackRfPhyAtmel::rf_register()
02317 {
02318     if (NULL == _rf) {
02319         return -1;
02320     }
02321 
02322     rf_if_lock();
02323 
02324     if (rf != NULL) {
02325         rf_if_unlock();
02326         error("Multiple registrations of NanostackRfPhyAtmel not supported");
02327         return -1;
02328     }
02329 
02330     // Read the mac address if it hasn't been set by a user
02331     rf = _rf;
02332     if (!_mac_set) {
02333         int ret = _mac.read_eui64((void*)_mac_addr);
02334         if (ret < 0) {
02335             rf = NULL;
02336             rf_if_unlock();
02337             return -1;
02338         }
02339     }
02340 
02341     int8_t radio_id = rf_device_register(_mac_addr);
02342     if (radio_id < 0) {
02343         rf = NULL;
02344     }
02345 
02346     rf_if_unlock();
02347     return radio_id;
02348 }
02349 
02350 void NanostackRfPhyAtmel::rf_unregister()
02351 {
02352     rf_if_lock();
02353 
02354     if (NULL == rf) {
02355         rf_if_unlock();
02356         return;
02357     }
02358 
02359     rf_device_unregister();
02360     rf = NULL;
02361 
02362     rf_if_unlock();
02363 }
02364 
02365 void NanostackRfPhyAtmel::get_mac_address(uint8_t *mac)
02366 {
02367     rf_if_lock();
02368 
02369     if (NULL == rf) {
02370         error("NanostackRfPhyAtmel Must be registered to read mac address");
02371         rf_if_unlock();
02372         return;
02373     }
02374     memcpy((void*)mac, (void*)_mac_addr, sizeof(_mac_addr));
02375 
02376     rf_if_unlock();
02377 }
02378 
02379 void NanostackRfPhyAtmel::set_mac_address(uint8_t *mac)
02380 {
02381     rf_if_lock();
02382 
02383     if (NULL != rf) {
02384         error("NanostackRfPhyAtmel cannot change mac address when running");
02385         rf_if_unlock();
02386         return;
02387     }
02388     memcpy((void*)_mac_addr, (void*)mac, sizeof(_mac_addr));
02389     _mac_set = true;
02390 
02391     rf_if_unlock();
02392 }
02393 
02394 #if MBED_CONF_ATMEL_RF_PROVIDE_DEFAULT
02395 
02396 NanostackRfPhy &NanostackRfPhy::get_default_instance()
02397 {
02398   static NanostackRfPhyAtmel rf_phy(ATMEL_SPI_MOSI, ATMEL_SPI_MISO, ATMEL_SPI_SCLK, ATMEL_SPI_CS,
02399                            ATMEL_SPI_RST, ATMEL_SPI_SLP, ATMEL_SPI_IRQ, ATMEL_I2C_SDA, ATMEL_I2C_SCL);
02400   return rf_phy;
02401 }
02402 
02403 #endif // MBED_CONF_ATMEL_RF_PROVIDE_DEFAULT
02404 
02405 #endif // MBED_CONF_NANOSTACK_CONFIGURATION