Andy Reid / Mbed 2 deprecated A2_Interface3_V_0_0

Iztech Fork

Dependencies:   mbed

Fork of A2_Interface3_V_0_0 by Roger McArdell

Pins.h@2:18608d894fc4, 2017-08-17 (annotated)

Committer:
Iztech
Date:
Thu Aug 17 13:36:28 2017 +0000
Revision:
2:18608d894fc4
Parent:
0:ea876cfd7385 
AndyR v3

Who changed what in which revision?

UserRevisionLine numberNew contents of line
rogermcardell 0:ea876cfd7385 1 /*
rogermcardell 0:ea876cfd7385 2 Programmer: Roger McArdell
rogermcardell 0:ea876cfd7385 3 Date: 02/08/2017
rogermcardell 0:ea876cfd7385 4 Version
rogermcardell 0:ea876cfd7385 5 V0.1 First version
rogermcardell 0:ea876cfd7385 6 */
rogermcardell 0:ea876cfd7385 7
rogermcardell 0:ea876cfd7385 8 #define Off 0
rogermcardell 0:ea876cfd7385 9 #define Green 0x04
rogermcardell 0:ea876cfd7385 10 #define Blue 0x08
rogermcardell 0:ea876cfd7385 11 #define Red 0x0C
rogermcardell 0:ea876cfd7385 12 #define FlashRed 0x10
rogermcardell 0:ea876cfd7385 13 #define FlashRedGreen 0x14
rogermcardell 0:ea876cfd7385 14 #define FlashGreen 0x18 //00011000
rogermcardell 0:ea876cfd7385 15 #define FlashBlue 0x1C // 00011100
rogermcardell 0:ea876cfd7385 16
rogermcardell 0:ea876cfd7385 17 #define Button1Address 0x80 //0x80
rogermcardell 0:ea876cfd7385 18 #define Button2Address 0x82 //0x82
rogermcardell 0:ea876cfd7385 19 #define Button3Address 0x84 //0x84
rogermcardell 0:ea876cfd7385 20 #define Button4Address 0x86 //0x86
rogermcardell 0:ea876cfd7385 21
rogermcardell 0:ea876cfd7385 22 #define IsOff 0
rogermcardell 0:ea876cfd7385 23 #define Laptop1 1
rogermcardell 0:ea876cfd7385 24 #define Laptop2 2
rogermcardell 0:ea876cfd7385 25 #define Laptop3 3
rogermcardell 0:ea876cfd7385 26 #define Laptop4 4
rogermcardell 0:ea876cfd7385 27
rogermcardell 0:ea876cfd7385 28 #define IsOff 0
rogermcardell 0:ea876cfd7385 29 #define IsHDMI1 1
rogermcardell 0:ea876cfd7385 30 #define IsHDMI2 2
rogermcardell 0:ea876cfd7385 31 #define IsHDMI3 3
rogermcardell 0:ea876cfd7385 32 #define IsHDMI4 4
rogermcardell 0:ea876cfd7385 33 #define IsNextBox 5
rogermcardell 0:ea876cfd7385 34 #define IsVCIdle 6
rogermcardell 0:ea876cfd7385 35 #define IsVCInCall 7
rogermcardell 0:ea876cfd7385 36 #define IsAux1 8
rogermcardell 0:ea876cfd7385 37 #define IsAux2 9
rogermcardell 0:ea876cfd7385 38 #define IsAux3 10
rogermcardell 0:ea876cfd7385 39
rogermcardell 0:ea876cfd7385 40 #define HDMI1 1
rogermcardell 0:ea876cfd7385 41 #define HDMI2 2
rogermcardell 0:ea876cfd7385 42 #define HDMI3 3
rogermcardell 0:ea876cfd7385 43 #define HDMI4 4
rogermcardell 0:ea876cfd7385 44
rogermcardell 0:ea876cfd7385 45 uint8_t SystemState = 0;
rogermcardell 0:ea876cfd7385 46 uint8_t IDNumber = 1;
rogermcardell 0:ea876cfd7385 47
rogermcardell 0:ea876cfd7385 48 bool CEC0INTFlag = 0;
rogermcardell 0:ea876cfd7385 49 bool CEC1INTFlag = 0;
rogermcardell 0:ea876cfd7385 50 bool CEC2INTFlag = 0;
rogermcardell 0:ea876cfd7385 51 bool CEC3INTFlag = 0;
rogermcardell 0:ea876cfd7385 52
rogermcardell 0:ea876cfd7385 53 // UARTS
rogermcardell 0:ea876cfd7385 54 Serial aboxPort(P0_14,P0_13); //TX, RX
rogermcardell 0:ea876cfd7385 55 Serial AUXPort(P0_19,P0_18);
rogermcardell 0:ea876cfd7385 56 Serial pc(USBTX, USBRX);
rogermcardell 0:ea876cfd7385 57
rogermcardell 0:ea876cfd7385 58 //Digital Ins
rogermcardell 0:ea876cfd7385 59 DigitalIn PSEStatus(P2_2);
rogermcardell 0:ea876cfd7385 60
rogermcardell 0:ea876cfd7385 61 //Interrupts
rogermcardell 0:ea876cfd7385 62 InterruptIn HDBaseTINT(P0_6);
rogermcardell 0:ea876cfd7385 63 InterruptIn CECINT0(P0_20);
rogermcardell 0:ea876cfd7385 64 InterruptIn CECINT1(P0_21);
rogermcardell 0:ea876cfd7385 65 InterruptIn CECINT2(P0_22);
rogermcardell 0:ea876cfd7385 66 InterruptIn CECINT3(P0_23);
rogermcardell 0:ea876cfd7385 67
rogermcardell 0:ea876cfd7385 68 //Digital Outs
rogermcardell 0:ea876cfd7385 69 DigitalOut AuxPortDIR(P2_7);
rogermcardell 0:ea876cfd7385 70 DigitalOut HDMIRST(P0_8);
rogermcardell 0:ea876cfd7385 71 DigitalOut HDBaseTUSBID(P2_5);
rogermcardell 0:ea876cfd7385 72 DigitalOut CECBoot0(P0_11);
rogermcardell 0:ea876cfd7385 73 DigitalOut CECBoot1(P0_16);
rogermcardell 0:ea876cfd7385 74 DigitalOut CECBoot2(P1_13);
rogermcardell 0:ea876cfd7385 75 DigitalOut CECBoot3(P1_21);
Iztech 2:18608d894fc4 76 //DigitalOut CECReset0(P0_12);
rogermcardell 0:ea876cfd7385 77 DigitalOut CECReset1(P0_17);
rogermcardell 0:ea876cfd7385 78 DigitalOut CECReset2(P1_20);
rogermcardell 0:ea876cfd7385 79 DigitalOut CECReset3(P1_23);
rogermcardell 0:ea876cfd7385 80
rogermcardell 0:ea876cfd7385 81 //I2C
rogermcardell 0:ea876cfd7385 82 I2C I2CHDMI(P1_24,P0_7); //SDA, SCL
rogermcardell 0:ea876cfd7385 83 I2C I2CBus(P0_5,P0_4);
rogermcardell 0:ea876cfd7385 84