Mark Harris / Mbed 2 deprecated SIEMENS_DLFEEDER_LOOP

Loop based controller for dual lane siemens siplace feeder.

Dependencies:   USBDevice mbed

Diff: partNumbers.h

Revision:
1:4d3738338cf1
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/partNumbers.h	Sat Feb 04 01:27:29 2017 +0000
@@ -0,0 +1,36 @@
+// http://www.nxp.com/documents/user_manual/UM10462.pdf Page 407-408
+#define LPC11U12FHN33_201   { 0x09, 0x5C, 0x80, 0x2B }
+#define LPC11U12FHN33_201   { 0x29, 0x5C, 0x80, 0x2B }
+#define LPC11U12FBD48_201   { 0x09, 0x5C, 0x80, 0x2B }
+#define LPC11U12FBD48_201   { 0x29, 0x5C, 0x80, 0x2B }
+#define LPC11U13FBD48_201   { 0x09, 0x7A, 0x80, 0x2B }
+#define LPC11U13FBD48_201   { 0x29, 0x7A, 0x80, 0x2B }
+#define LPC11U14FHN33_201   { 0x09, 0x98, 0x80, 0x2B }
+#define LPC11U14FHN33_201   { 0x29, 0x98, 0x80, 0x2B }
+#define LPC11U14FHI33_201   { 0x29, 0x98, 0x80, 0x2B }
+#define LPC11U14FBD48_201   { 0x09, 0x98, 0x80, 0x2B }
+#define LPC11U14FBD48_201   { 0x29, 0x98, 0x80, 0x2B }
+#define LPC11U14FET48_201   { 0x09, 0x98, 0x80, 0x2B }
+#define LPC11U14FET48_201   { 0x29, 0x98, 0x80, 0x2B }
+#define LPC11U22FBD48_301   { 0x29, 0x54, 0x40, 0x2B }
+#define LPC11U23FBD48_301   { 0x29, 0x72, 0x40, 0x2B }
+#define LPC11U24FHI33_301   { 0x29, 0x88, 0x40, 0x2B }
+#define LPC11U24FBD48_301   { 0x29, 0x88, 0x40, 0x2B }
+#define LPC11U24FET48_301   { 0x29, 0x88, 0x40, 0x2B }
+#define LPC11U24FHN33_401   { 0x29, 0x80, 0x00, 0x2B }
+#define LPC11U24FBD48_401   { 0x29, 0x80, 0x00, 0x2B }
+#define LPC11U24FBD64_401   { 0x29, 0x80, 0x00, 0x2B }
+#define LPC11U34FHN33_311   { 0x00, 0x03, 0xD4, 0x40 }
+#define LPC11U34FBD48_311   { 0x00, 0x03, 0xD4, 0x40 }
+#define LPC11U34FHN33_421   { 0x00, 0x01, 0xCC, 0x40 }
+#define LPC11U34FBD48_421   { 0x00, 0x01, 0xCC, 0x40 }
+#define LPC11U35FHN33_401   { 0x00, 0x01, 0xBC, 0x40 }
+#define LPC11U35FBD48_401   { 0x00, 0x01, 0xBC, 0x40 }
+#define LPC11U35FBD64_401   { 0x00, 0x01, 0xBC, 0x40 }
+#define LPC11U35FHI33_501   { 0x00, 0x00, 0xBC, 0x40 }
+#define LPC11U35FET48_501   { 0x00, 0x00, 0xBC, 0x40 }
+#define LPC11U36FBD48_401   { 0x00, 0x01, 0x9C, 0x40 }
+#define LPC11U36FBD64_401   { 0x00, 0x01, 0x9C, 0x40 }
+#define LPC11U37FBD48_401   { 0x00, 0x01, 0x7C, 0x40 }
+#define LPC11U37HFBD64_401  { 0x00, 0x00, 0x7C, 0x44 }
+#define LPC11U37FBD64_501   { 0x00, 0x00, 0x7C, 0x40 }
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