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mbed/hal/spi_api.h@0:c88c3b616c00, 2020-03-16 (annotated)

Committer:
IKobayashi
Date:
Mon Mar 16 23:37:42 2020 +0900
Revision:
0:c88c3b616c00
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IKobayashi 0:c88c3b616c00 1
IKobayashi 0:c88c3b616c00 2 /** \addtogroup hal */
IKobayashi 0:c88c3b616c00 3 /** @{*/
IKobayashi 0:c88c3b616c00 4 /* mbed Microcontroller Library
IKobayashi 0:c88c3b616c00 5 * Copyright (c) 2006-2013 ARM Limited
IKobayashi 0:c88c3b616c00 6 *
IKobayashi 0:c88c3b616c00 7 * Licensed under the Apache License, Version 2.0 (the "License");
IKobayashi 0:c88c3b616c00 8 * you may not use this file except in compliance with the License.
IKobayashi 0:c88c3b616c00 9 * You may obtain a copy of the License at
IKobayashi 0:c88c3b616c00 10 *
IKobayashi 0:c88c3b616c00 11 * http://www.apache.org/licenses/LICENSE-2.0
IKobayashi 0:c88c3b616c00 12 *
IKobayashi 0:c88c3b616c00 13 * Unless required by applicable law or agreed to in writing, software
IKobayashi 0:c88c3b616c00 14 * distributed under the License is distributed on an "AS IS" BASIS,
IKobayashi 0:c88c3b616c00 15 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
IKobayashi 0:c88c3b616c00 16 * See the License for the specific language governing permissions and
IKobayashi 0:c88c3b616c00 17 * limitations under the License.
IKobayashi 0:c88c3b616c00 18 */
IKobayashi 0:c88c3b616c00 19 #ifndef MBED_SPI_API_H
IKobayashi 0:c88c3b616c00 20 #define MBED_SPI_API_H
IKobayashi 0:c88c3b616c00 21
IKobayashi 0:c88c3b616c00 22 #include "device.h"
IKobayashi 0:c88c3b616c00 23 #include "hal/dma_api.h"
IKobayashi 0:c88c3b616c00 24 #include "hal/buffer.h"
IKobayashi 0:c88c3b616c00 25
IKobayashi 0:c88c3b616c00 26 #if DEVICE_SPI
IKobayashi 0:c88c3b616c00 27
IKobayashi 0:c88c3b616c00 28 #define SPI_EVENT_ERROR (1 << 1)
IKobayashi 0:c88c3b616c00 29 #define SPI_EVENT_COMPLETE (1 << 2)
IKobayashi 0:c88c3b616c00 30 #define SPI_EVENT_RX_OVERFLOW (1 << 3)
IKobayashi 0:c88c3b616c00 31 #define SPI_EVENT_ALL (SPI_EVENT_ERROR | SPI_EVENT_COMPLETE | SPI_EVENT_RX_OVERFLOW)
IKobayashi 0:c88c3b616c00 32
IKobayashi 0:c88c3b616c00 33 #define SPI_EVENT_INTERNAL_TRANSFER_COMPLETE (1 << 30) // Internal flag to report that an event occurred
IKobayashi 0:c88c3b616c00 34
IKobayashi 0:c88c3b616c00 35 #define SPI_FILL_WORD (0xFFFF)
IKobayashi 0:c88c3b616c00 36
IKobayashi 0:c88c3b616c00 37 #if DEVICE_SPI_ASYNCH
IKobayashi 0:c88c3b616c00 38 /** Asynch SPI HAL structure
IKobayashi 0:c88c3b616c00 39 */
IKobayashi 0:c88c3b616c00 40 typedef struct {
IKobayashi 0:c88c3b616c00 41 struct spi_s spi; /**< Target specific SPI structure */
IKobayashi 0:c88c3b616c00 42 struct buffer_s tx_buff; /**< Tx buffer */
IKobayashi 0:c88c3b616c00 43 struct buffer_s rx_buff; /**< Rx buffer */
IKobayashi 0:c88c3b616c00 44 } spi_t;
IKobayashi 0:c88c3b616c00 45
IKobayashi 0:c88c3b616c00 46 #else
IKobayashi 0:c88c3b616c00 47 /** Non-asynch SPI HAL structure
IKobayashi 0:c88c3b616c00 48 */
IKobayashi 0:c88c3b616c00 49 typedef struct spi_s spi_t;
IKobayashi 0:c88c3b616c00 50
IKobayashi 0:c88c3b616c00 51 #endif
IKobayashi 0:c88c3b616c00 52
IKobayashi 0:c88c3b616c00 53 #ifdef __cplusplus
IKobayashi 0:c88c3b616c00 54 extern "C" {
IKobayashi 0:c88c3b616c00 55 #endif
IKobayashi 0:c88c3b616c00 56
IKobayashi 0:c88c3b616c00 57 /**
IKobayashi 0:c88c3b616c00 58 * \defgroup hal_GeneralSPI SPI Configuration Functions
IKobayashi 0:c88c3b616c00 59 * @{
IKobayashi 0:c88c3b616c00 60 */
IKobayashi 0:c88c3b616c00 61
IKobayashi 0:c88c3b616c00 62 /** Initialize the SPI peripheral
IKobayashi 0:c88c3b616c00 63 *
IKobayashi 0:c88c3b616c00 64 * Configures the pins used by SPI, sets a default format and frequency, and enables the peripheral
IKobayashi 0:c88c3b616c00 65 * @param[out] obj The SPI object to initialize
IKobayashi 0:c88c3b616c00 66 * @param[in] mosi The pin to use for MOSI
IKobayashi 0:c88c3b616c00 67 * @param[in] miso The pin to use for MISO
IKobayashi 0:c88c3b616c00 68 * @param[in] sclk The pin to use for SCLK
IKobayashi 0:c88c3b616c00 69 * @param[in] ssel The pin to use for SSEL
IKobayashi 0:c88c3b616c00 70 */
IKobayashi 0:c88c3b616c00 71 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel);
IKobayashi 0:c88c3b616c00 72
IKobayashi 0:c88c3b616c00 73 /** Release a SPI object
IKobayashi 0:c88c3b616c00 74 *
IKobayashi 0:c88c3b616c00 75 * TODO: spi_free is currently unimplemented
IKobayashi 0:c88c3b616c00 76 * This will require reference counting at the C++ level to be safe
IKobayashi 0:c88c3b616c00 77 *
IKobayashi 0:c88c3b616c00 78 * Return the pins owned by the SPI object to their reset state
IKobayashi 0:c88c3b616c00 79 * Disable the SPI peripheral
IKobayashi 0:c88c3b616c00 80 * Disable the SPI clock
IKobayashi 0:c88c3b616c00 81 * @param[in] obj The SPI object to deinitialize
IKobayashi 0:c88c3b616c00 82 */
IKobayashi 0:c88c3b616c00 83 void spi_free(spi_t *obj);
IKobayashi 0:c88c3b616c00 84
IKobayashi 0:c88c3b616c00 85 /** Configure the SPI format
IKobayashi 0:c88c3b616c00 86 *
IKobayashi 0:c88c3b616c00 87 * Set the number of bits per frame, configure clock polarity and phase, shift order and master/slave mode.
IKobayashi 0:c88c3b616c00 88 * The default bit order is MSB.
IKobayashi 0:c88c3b616c00 89 * @param[in,out] obj The SPI object to configure
IKobayashi 0:c88c3b616c00 90 * @param[in] bits The number of bits per frame
IKobayashi 0:c88c3b616c00 91 * @param[in] mode The SPI mode (clock polarity, phase, and shift direction)
IKobayashi 0:c88c3b616c00 92 * @param[in] slave Zero for master mode or non-zero for slave mode
IKobayashi 0:c88c3b616c00 93 */
IKobayashi 0:c88c3b616c00 94 void spi_format(spi_t *obj, int bits, int mode, int slave);
IKobayashi 0:c88c3b616c00 95
IKobayashi 0:c88c3b616c00 96 /** Set the SPI baud rate
IKobayashi 0:c88c3b616c00 97 *
IKobayashi 0:c88c3b616c00 98 * Actual frequency may differ from the desired frequency due to available dividers and bus clock
IKobayashi 0:c88c3b616c00 99 * Configures the SPI peripheral's baud rate
IKobayashi 0:c88c3b616c00 100 * @param[in,out] obj The SPI object to configure
IKobayashi 0:c88c3b616c00 101 * @param[in] hz The baud rate in Hz
IKobayashi 0:c88c3b616c00 102 */
IKobayashi 0:c88c3b616c00 103 void spi_frequency(spi_t *obj, int hz);
IKobayashi 0:c88c3b616c00 104
IKobayashi 0:c88c3b616c00 105 /**@}*/
IKobayashi 0:c88c3b616c00 106 /**
IKobayashi 0:c88c3b616c00 107 * \defgroup SynchSPI Synchronous SPI Hardware Abstraction Layer
IKobayashi 0:c88c3b616c00 108 * @{
IKobayashi 0:c88c3b616c00 109 */
IKobayashi 0:c88c3b616c00 110
IKobayashi 0:c88c3b616c00 111 /** Write a byte out in master mode and receive a value
IKobayashi 0:c88c3b616c00 112 *
IKobayashi 0:c88c3b616c00 113 * @param[in] obj The SPI peripheral to use for sending
IKobayashi 0:c88c3b616c00 114 * @param[in] value The value to send
IKobayashi 0:c88c3b616c00 115 * @return Returns the value received during send
IKobayashi 0:c88c3b616c00 116 */
IKobayashi 0:c88c3b616c00 117 int spi_master_write(spi_t *obj, int value);
IKobayashi 0:c88c3b616c00 118
IKobayashi 0:c88c3b616c00 119 /** Check if a value is available to read
IKobayashi 0:c88c3b616c00 120 *
IKobayashi 0:c88c3b616c00 121 * @param[in] obj The SPI peripheral to check
IKobayashi 0:c88c3b616c00 122 * @return non-zero if a value is available
IKobayashi 0:c88c3b616c00 123 */
IKobayashi 0:c88c3b616c00 124 int spi_slave_receive(spi_t *obj);
IKobayashi 0:c88c3b616c00 125
IKobayashi 0:c88c3b616c00 126 /** Get a received value out of the SPI receive buffer in slave mode
IKobayashi 0:c88c3b616c00 127 *
IKobayashi 0:c88c3b616c00 128 * Blocks until a value is available
IKobayashi 0:c88c3b616c00 129 * @param[in] obj The SPI peripheral to read
IKobayashi 0:c88c3b616c00 130 * @return The value received
IKobayashi 0:c88c3b616c00 131 */
IKobayashi 0:c88c3b616c00 132 int spi_slave_read(spi_t *obj);
IKobayashi 0:c88c3b616c00 133
IKobayashi 0:c88c3b616c00 134 /** Write a value to the SPI peripheral in slave mode
IKobayashi 0:c88c3b616c00 135 *
IKobayashi 0:c88c3b616c00 136 * Blocks until the SPI peripheral can be written to
IKobayashi 0:c88c3b616c00 137 * @param[in] obj The SPI peripheral to write
IKobayashi 0:c88c3b616c00 138 * @param[in] value The value to write
IKobayashi 0:c88c3b616c00 139 */
IKobayashi 0:c88c3b616c00 140 void spi_slave_write(spi_t *obj, int value);
IKobayashi 0:c88c3b616c00 141
IKobayashi 0:c88c3b616c00 142 /** Checks if the specified SPI peripheral is in use
IKobayashi 0:c88c3b616c00 143 *
IKobayashi 0:c88c3b616c00 144 * @param[in] obj The SPI peripheral to check
IKobayashi 0:c88c3b616c00 145 * @return non-zero if the peripheral is currently transmitting
IKobayashi 0:c88c3b616c00 146 */
IKobayashi 0:c88c3b616c00 147 int spi_busy(spi_t *obj);
IKobayashi 0:c88c3b616c00 148
IKobayashi 0:c88c3b616c00 149 /** Get the module number
IKobayashi 0:c88c3b616c00 150 *
IKobayashi 0:c88c3b616c00 151 * @param[in] obj The SPI peripheral to check
IKobayashi 0:c88c3b616c00 152 * @return The module number
IKobayashi 0:c88c3b616c00 153 */
IKobayashi 0:c88c3b616c00 154 uint8_t spi_get_module(spi_t *obj);
IKobayashi 0:c88c3b616c00 155
IKobayashi 0:c88c3b616c00 156 /**@}*/
IKobayashi 0:c88c3b616c00 157
IKobayashi 0:c88c3b616c00 158 #if DEVICE_SPI_ASYNCH
IKobayashi 0:c88c3b616c00 159 /**
IKobayashi 0:c88c3b616c00 160 * \defgroup AsynchSPI Asynchronous SPI Hardware Abstraction Layer
IKobayashi 0:c88c3b616c00 161 * @{
IKobayashi 0:c88c3b616c00 162 */
IKobayashi 0:c88c3b616c00 163
IKobayashi 0:c88c3b616c00 164 /** Begin the SPI transfer. Buffer pointers and lengths are specified in tx_buff and rx_buff
IKobayashi 0:c88c3b616c00 165 *
IKobayashi 0:c88c3b616c00 166 * @param[in] obj The SPI object that holds the transfer information
IKobayashi 0:c88c3b616c00 167 * @param[in] tx The transmit buffer
IKobayashi 0:c88c3b616c00 168 * @param[in] tx_length The number of bytes to transmit
IKobayashi 0:c88c3b616c00 169 * @param[in] rx The receive buffer
IKobayashi 0:c88c3b616c00 170 * @param[in] rx_length The number of bytes to receive
IKobayashi 0:c88c3b616c00 171 * @param[in] bit_width The bit width of buffer words
IKobayashi 0:c88c3b616c00 172 * @param[in] event The logical OR of events to be registered
IKobayashi 0:c88c3b616c00 173 * @param[in] handler SPI interrupt handler
IKobayashi 0:c88c3b616c00 174 * @param[in] hint A suggestion for how to use DMA with this transfer
IKobayashi 0:c88c3b616c00 175 */
IKobayashi 0:c88c3b616c00 176 void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint8_t bit_width, uint32_t handler, uint32_t event, DMAUsage hint);
IKobayashi 0:c88c3b616c00 177
IKobayashi 0:c88c3b616c00 178 /** The asynchronous IRQ handler
IKobayashi 0:c88c3b616c00 179 *
IKobayashi 0:c88c3b616c00 180 * Reads the received values out of the RX FIFO, writes values into the TX FIFO and checks for transfer termination
IKobayashi 0:c88c3b616c00 181 * conditions, such as buffer overflows or transfer complete.
IKobayashi 0:c88c3b616c00 182 * @param[in] obj The SPI object that holds the transfer information
IKobayashi 0:c88c3b616c00 183 * @return Event flags if a transfer termination condition was met; otherwise 0.
IKobayashi 0:c88c3b616c00 184 */
IKobayashi 0:c88c3b616c00 185 uint32_t spi_irq_handler_asynch(spi_t *obj);
IKobayashi 0:c88c3b616c00 186
IKobayashi 0:c88c3b616c00 187 /** Attempts to determine if the SPI peripheral is already in use
IKobayashi 0:c88c3b616c00 188 *
IKobayashi 0:c88c3b616c00 189 * If a temporary DMA channel has been allocated, peripheral is in use.
IKobayashi 0:c88c3b616c00 190 * If a permanent DMA channel has been allocated, check if the DMA channel is in use. If not, proceed as though no DMA
IKobayashi 0:c88c3b616c00 191 * channel were allocated.
IKobayashi 0:c88c3b616c00 192 * If no DMA channel is allocated, check whether tx and rx buffers have been assigned. For each assigned buffer, check
IKobayashi 0:c88c3b616c00 193 * if the corresponding buffer position is less than the buffer length. If buffers do not indicate activity, check if
IKobayashi 0:c88c3b616c00 194 * there are any bytes in the FIFOs.
IKobayashi 0:c88c3b616c00 195 * @param[in] obj The SPI object to check for activity
IKobayashi 0:c88c3b616c00 196 * @return Non-zero if the SPI port is active or zero if it is not.
IKobayashi 0:c88c3b616c00 197 */
IKobayashi 0:c88c3b616c00 198 uint8_t spi_active(spi_t *obj);
IKobayashi 0:c88c3b616c00 199
IKobayashi 0:c88c3b616c00 200 /** Abort an SPI transfer
IKobayashi 0:c88c3b616c00 201 *
IKobayashi 0:c88c3b616c00 202 * @param obj The SPI peripheral to stop
IKobayashi 0:c88c3b616c00 203 */
IKobayashi 0:c88c3b616c00 204 void spi_abort_asynch(spi_t *obj);
IKobayashi 0:c88c3b616c00 205
IKobayashi 0:c88c3b616c00 206
IKobayashi 0:c88c3b616c00 207 #endif
IKobayashi 0:c88c3b616c00 208
IKobayashi 0:c88c3b616c00 209 /**@}*/
IKobayashi 0:c88c3b616c00 210
IKobayashi 0:c88c3b616c00 211 #ifdef __cplusplus
IKobayashi 0:c88c3b616c00 212 }
IKobayashi 0:c88c3b616c00 213 #endif // __cplusplus
IKobayashi 0:c88c3b616c00 214
IKobayashi 0:c88c3b616c00 215 #endif // SPI_DEVICE
IKobayashi 0:c88c3b616c00 216
IKobayashi 0:c88c3b616c00 217 #endif // MBED_SPI_API_H
IKobayashi 0:c88c3b616c00 218
IKobayashi 0:c88c3b616c00 219 /** @}*/