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mbed/TARGET_LPC1768/core_ca_mmu.h@0:c88c3b616c00, 2020-03-16 (annotated)

Committer:
IKobayashi
Date:
Mon Mar 16 23:37:42 2020 +0900
Revision:
0:c88c3b616c00
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IKobayashi 0:c88c3b616c00 1 ;/**************************************************************************//**
IKobayashi 0:c88c3b616c00 2 ; * @file core_ca_mmu.h
IKobayashi 0:c88c3b616c00 3 ; * @brief MMU Startup File for A9_MP Device Series
IKobayashi 0:c88c3b616c00 4 ; * @version V1.01
IKobayashi 0:c88c3b616c00 5 ; * @date 10 Sept 2014
IKobayashi 0:c88c3b616c00 6 ; *
IKobayashi 0:c88c3b616c00 7 ; * @note
IKobayashi 0:c88c3b616c00 8 ; *
IKobayashi 0:c88c3b616c00 9 ; ******************************************************************************/
IKobayashi 0:c88c3b616c00 10 ;/* Copyright (c) 2012-2014 ARM LIMITED
IKobayashi 0:c88c3b616c00 11 ;
IKobayashi 0:c88c3b616c00 12 ; All rights reserved.
IKobayashi 0:c88c3b616c00 13 ; Redistribution and use in source and binary forms, with or without
IKobayashi 0:c88c3b616c00 14 ; modification, are permitted provided that the following conditions are met:
IKobayashi 0:c88c3b616c00 15 ; - Redistributions of source code must retain the above copyright
IKobayashi 0:c88c3b616c00 16 ; notice, this list of conditions and the following disclaimer.
IKobayashi 0:c88c3b616c00 17 ; - Redistributions in binary form must reproduce the above copyright
IKobayashi 0:c88c3b616c00 18 ; notice, this list of conditions and the following disclaimer in the
IKobayashi 0:c88c3b616c00 19 ; documentation and/or other materials provided with the distribution.
IKobayashi 0:c88c3b616c00 20 ; - Neither the name of ARM nor the names of its contributors may be used
IKobayashi 0:c88c3b616c00 21 ; to endorse or promote products derived from this software without
IKobayashi 0:c88c3b616c00 22 ; specific prior written permission.
IKobayashi 0:c88c3b616c00 23 ; *
IKobayashi 0:c88c3b616c00 24 ; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
IKobayashi 0:c88c3b616c00 25 ; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IKobayashi 0:c88c3b616c00 26 ; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
IKobayashi 0:c88c3b616c00 27 ; ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
IKobayashi 0:c88c3b616c00 28 ; LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
IKobayashi 0:c88c3b616c00 29 ; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
IKobayashi 0:c88c3b616c00 30 ; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
IKobayashi 0:c88c3b616c00 31 ; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
IKobayashi 0:c88c3b616c00 32 ; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
IKobayashi 0:c88c3b616c00 33 ; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
IKobayashi 0:c88c3b616c00 34 ; POSSIBILITY OF SUCH DAMAGE.
IKobayashi 0:c88c3b616c00 35 ; ---------------------------------------------------------------------------*/
IKobayashi 0:c88c3b616c00 36
IKobayashi 0:c88c3b616c00 37 #ifdef __cplusplus
IKobayashi 0:c88c3b616c00 38 extern "C" {
IKobayashi 0:c88c3b616c00 39 #endif
IKobayashi 0:c88c3b616c00 40
IKobayashi 0:c88c3b616c00 41 #ifndef _MMU_FUNC_H
IKobayashi 0:c88c3b616c00 42 #define _MMU_FUNC_H
IKobayashi 0:c88c3b616c00 43
IKobayashi 0:c88c3b616c00 44 #define SECTION_DESCRIPTOR (0x2)
IKobayashi 0:c88c3b616c00 45 #define SECTION_MASK (0xFFFFFFFC)
IKobayashi 0:c88c3b616c00 46
IKobayashi 0:c88c3b616c00 47 #define SECTION_TEXCB_MASK (0xFFFF8FF3)
IKobayashi 0:c88c3b616c00 48 #define SECTION_B_SHIFT (2)
IKobayashi 0:c88c3b616c00 49 #define SECTION_C_SHIFT (3)
IKobayashi 0:c88c3b616c00 50 #define SECTION_TEX0_SHIFT (12)
IKobayashi 0:c88c3b616c00 51 #define SECTION_TEX1_SHIFT (13)
IKobayashi 0:c88c3b616c00 52 #define SECTION_TEX2_SHIFT (14)
IKobayashi 0:c88c3b616c00 53
IKobayashi 0:c88c3b616c00 54 #define SECTION_XN_MASK (0xFFFFFFEF)
IKobayashi 0:c88c3b616c00 55 #define SECTION_XN_SHIFT (4)
IKobayashi 0:c88c3b616c00 56
IKobayashi 0:c88c3b616c00 57 #define SECTION_DOMAIN_MASK (0xFFFFFE1F)
IKobayashi 0:c88c3b616c00 58 #define SECTION_DOMAIN_SHIFT (5)
IKobayashi 0:c88c3b616c00 59
IKobayashi 0:c88c3b616c00 60 #define SECTION_P_MASK (0xFFFFFDFF)
IKobayashi 0:c88c3b616c00 61 #define SECTION_P_SHIFT (9)
IKobayashi 0:c88c3b616c00 62
IKobayashi 0:c88c3b616c00 63 #define SECTION_AP_MASK (0xFFFF73FF)
IKobayashi 0:c88c3b616c00 64 #define SECTION_AP_SHIFT (10)
IKobayashi 0:c88c3b616c00 65 #define SECTION_AP2_SHIFT (15)
IKobayashi 0:c88c3b616c00 66
IKobayashi 0:c88c3b616c00 67 #define SECTION_S_MASK (0xFFFEFFFF)
IKobayashi 0:c88c3b616c00 68 #define SECTION_S_SHIFT (16)
IKobayashi 0:c88c3b616c00 69
IKobayashi 0:c88c3b616c00 70 #define SECTION_NG_MASK (0xFFFDFFFF)
IKobayashi 0:c88c3b616c00 71 #define SECTION_NG_SHIFT (17)
IKobayashi 0:c88c3b616c00 72
IKobayashi 0:c88c3b616c00 73 #define SECTION_NS_MASK (0xFFF7FFFF)
IKobayashi 0:c88c3b616c00 74 #define SECTION_NS_SHIFT (19)
IKobayashi 0:c88c3b616c00 75
IKobayashi 0:c88c3b616c00 76
IKobayashi 0:c88c3b616c00 77 #define PAGE_L1_DESCRIPTOR (0x1)
IKobayashi 0:c88c3b616c00 78 #define PAGE_L1_MASK (0xFFFFFFFC)
IKobayashi 0:c88c3b616c00 79
IKobayashi 0:c88c3b616c00 80 #define PAGE_L2_4K_DESC (0x2)
IKobayashi 0:c88c3b616c00 81 #define PAGE_L2_4K_MASK (0xFFFFFFFD)
IKobayashi 0:c88c3b616c00 82
IKobayashi 0:c88c3b616c00 83 #define PAGE_L2_64K_DESC (0x1)
IKobayashi 0:c88c3b616c00 84 #define PAGE_L2_64K_MASK (0xFFFFFFFC)
IKobayashi 0:c88c3b616c00 85
IKobayashi 0:c88c3b616c00 86 #define PAGE_4K_TEXCB_MASK (0xFFFFFE33)
IKobayashi 0:c88c3b616c00 87 #define PAGE_4K_B_SHIFT (2)
IKobayashi 0:c88c3b616c00 88 #define PAGE_4K_C_SHIFT (3)
IKobayashi 0:c88c3b616c00 89 #define PAGE_4K_TEX0_SHIFT (6)
IKobayashi 0:c88c3b616c00 90 #define PAGE_4K_TEX1_SHIFT (7)
IKobayashi 0:c88c3b616c00 91 #define PAGE_4K_TEX2_SHIFT (8)
IKobayashi 0:c88c3b616c00 92
IKobayashi 0:c88c3b616c00 93 #define PAGE_64K_TEXCB_MASK (0xFFFF8FF3)
IKobayashi 0:c88c3b616c00 94 #define PAGE_64K_B_SHIFT (2)
IKobayashi 0:c88c3b616c00 95 #define PAGE_64K_C_SHIFT (3)
IKobayashi 0:c88c3b616c00 96 #define PAGE_64K_TEX0_SHIFT (12)
IKobayashi 0:c88c3b616c00 97 #define PAGE_64K_TEX1_SHIFT (13)
IKobayashi 0:c88c3b616c00 98 #define PAGE_64K_TEX2_SHIFT (14)
IKobayashi 0:c88c3b616c00 99
IKobayashi 0:c88c3b616c00 100 #define PAGE_TEXCB_MASK (0xFFFF8FF3)
IKobayashi 0:c88c3b616c00 101 #define PAGE_B_SHIFT (2)
IKobayashi 0:c88c3b616c00 102 #define PAGE_C_SHIFT (3)
IKobayashi 0:c88c3b616c00 103 #define PAGE_TEX_SHIFT (12)
IKobayashi 0:c88c3b616c00 104
IKobayashi 0:c88c3b616c00 105 #define PAGE_XN_4K_MASK (0xFFFFFFFE)
IKobayashi 0:c88c3b616c00 106 #define PAGE_XN_4K_SHIFT (0)
IKobayashi 0:c88c3b616c00 107 #define PAGE_XN_64K_MASK (0xFFFF7FFF)
IKobayashi 0:c88c3b616c00 108 #define PAGE_XN_64K_SHIFT (15)
IKobayashi 0:c88c3b616c00 109
IKobayashi 0:c88c3b616c00 110
IKobayashi 0:c88c3b616c00 111 #define PAGE_DOMAIN_MASK (0xFFFFFE1F)
IKobayashi 0:c88c3b616c00 112 #define PAGE_DOMAIN_SHIFT (5)
IKobayashi 0:c88c3b616c00 113
IKobayashi 0:c88c3b616c00 114 #define PAGE_P_MASK (0xFFFFFDFF)
IKobayashi 0:c88c3b616c00 115 #define PAGE_P_SHIFT (9)
IKobayashi 0:c88c3b616c00 116
IKobayashi 0:c88c3b616c00 117 #define PAGE_AP_MASK (0xFFFFFDCF)
IKobayashi 0:c88c3b616c00 118 #define PAGE_AP_SHIFT (4)
IKobayashi 0:c88c3b616c00 119 #define PAGE_AP2_SHIFT (9)
IKobayashi 0:c88c3b616c00 120
IKobayashi 0:c88c3b616c00 121 #define PAGE_S_MASK (0xFFFFFBFF)
IKobayashi 0:c88c3b616c00 122 #define PAGE_S_SHIFT (10)
IKobayashi 0:c88c3b616c00 123
IKobayashi 0:c88c3b616c00 124 #define PAGE_NG_MASK (0xFFFFF7FF)
IKobayashi 0:c88c3b616c00 125 #define PAGE_NG_SHIFT (11)
IKobayashi 0:c88c3b616c00 126
IKobayashi 0:c88c3b616c00 127 #define PAGE_NS_MASK (0xFFFFFFF7)
IKobayashi 0:c88c3b616c00 128 #define PAGE_NS_SHIFT (3)
IKobayashi 0:c88c3b616c00 129
IKobayashi 0:c88c3b616c00 130 #define OFFSET_1M (0x00100000)
IKobayashi 0:c88c3b616c00 131 #define OFFSET_64K (0x00010000)
IKobayashi 0:c88c3b616c00 132 #define OFFSET_4K (0x00001000)
IKobayashi 0:c88c3b616c00 133
IKobayashi 0:c88c3b616c00 134 #define DESCRIPTOR_FAULT (0x00000000)
IKobayashi 0:c88c3b616c00 135
IKobayashi 0:c88c3b616c00 136 /* ########################### MMU Function Access ########################### */
IKobayashi 0:c88c3b616c00 137 /** \ingroup MMU_FunctionInterface
IKobayashi 0:c88c3b616c00 138 \defgroup MMU_Functions MMU Functions Interface
IKobayashi 0:c88c3b616c00 139 @{
IKobayashi 0:c88c3b616c00 140 */
IKobayashi 0:c88c3b616c00 141
IKobayashi 0:c88c3b616c00 142 /* Attributes enumerations */
IKobayashi 0:c88c3b616c00 143
IKobayashi 0:c88c3b616c00 144 /* Region size attributes */
IKobayashi 0:c88c3b616c00 145 typedef enum
IKobayashi 0:c88c3b616c00 146 {
IKobayashi 0:c88c3b616c00 147 SECTION,
IKobayashi 0:c88c3b616c00 148 PAGE_4k,
IKobayashi 0:c88c3b616c00 149 PAGE_64k,
IKobayashi 0:c88c3b616c00 150 } mmu_region_size_Type;
IKobayashi 0:c88c3b616c00 151
IKobayashi 0:c88c3b616c00 152 /* Region type attributes */
IKobayashi 0:c88c3b616c00 153 typedef enum
IKobayashi 0:c88c3b616c00 154 {
IKobayashi 0:c88c3b616c00 155 NORMAL,
IKobayashi 0:c88c3b616c00 156 DEVICE,
IKobayashi 0:c88c3b616c00 157 SHARED_DEVICE,
IKobayashi 0:c88c3b616c00 158 NON_SHARED_DEVICE,
IKobayashi 0:c88c3b616c00 159 STRONGLY_ORDERED
IKobayashi 0:c88c3b616c00 160 } mmu_memory_Type;
IKobayashi 0:c88c3b616c00 161
IKobayashi 0:c88c3b616c00 162 /* Region cacheability attributes */
IKobayashi 0:c88c3b616c00 163 typedef enum
IKobayashi 0:c88c3b616c00 164 {
IKobayashi 0:c88c3b616c00 165 NON_CACHEABLE,
IKobayashi 0:c88c3b616c00 166 WB_WA,
IKobayashi 0:c88c3b616c00 167 WT,
IKobayashi 0:c88c3b616c00 168 WB_NO_WA,
IKobayashi 0:c88c3b616c00 169 } mmu_cacheability_Type;
IKobayashi 0:c88c3b616c00 170
IKobayashi 0:c88c3b616c00 171 /* Region parity check attributes */
IKobayashi 0:c88c3b616c00 172 typedef enum
IKobayashi 0:c88c3b616c00 173 {
IKobayashi 0:c88c3b616c00 174 ECC_DISABLED,
IKobayashi 0:c88c3b616c00 175 ECC_ENABLED,
IKobayashi 0:c88c3b616c00 176 } mmu_ecc_check_Type;
IKobayashi 0:c88c3b616c00 177
IKobayashi 0:c88c3b616c00 178 /* Region execution attributes */
IKobayashi 0:c88c3b616c00 179 typedef enum
IKobayashi 0:c88c3b616c00 180 {
IKobayashi 0:c88c3b616c00 181 EXECUTE,
IKobayashi 0:c88c3b616c00 182 NON_EXECUTE,
IKobayashi 0:c88c3b616c00 183 } mmu_execute_Type;
IKobayashi 0:c88c3b616c00 184
IKobayashi 0:c88c3b616c00 185 /* Region global attributes */
IKobayashi 0:c88c3b616c00 186 typedef enum
IKobayashi 0:c88c3b616c00 187 {
IKobayashi 0:c88c3b616c00 188 GLOBAL,
IKobayashi 0:c88c3b616c00 189 NON_GLOBAL,
IKobayashi 0:c88c3b616c00 190 } mmu_global_Type;
IKobayashi 0:c88c3b616c00 191
IKobayashi 0:c88c3b616c00 192 /* Region shareability attributes */
IKobayashi 0:c88c3b616c00 193 typedef enum
IKobayashi 0:c88c3b616c00 194 {
IKobayashi 0:c88c3b616c00 195 NON_SHARED,
IKobayashi 0:c88c3b616c00 196 SHARED,
IKobayashi 0:c88c3b616c00 197 } mmu_shared_Type;
IKobayashi 0:c88c3b616c00 198
IKobayashi 0:c88c3b616c00 199 /* Region security attributes */
IKobayashi 0:c88c3b616c00 200 typedef enum
IKobayashi 0:c88c3b616c00 201 {
IKobayashi 0:c88c3b616c00 202 SECURE,
IKobayashi 0:c88c3b616c00 203 NON_SECURE,
IKobayashi 0:c88c3b616c00 204 } mmu_secure_Type;
IKobayashi 0:c88c3b616c00 205
IKobayashi 0:c88c3b616c00 206 /* Region access attributes */
IKobayashi 0:c88c3b616c00 207 typedef enum
IKobayashi 0:c88c3b616c00 208 {
IKobayashi 0:c88c3b616c00 209 NO_ACCESS,
IKobayashi 0:c88c3b616c00 210 RW,
IKobayashi 0:c88c3b616c00 211 READ,
IKobayashi 0:c88c3b616c00 212 } mmu_access_Type;
IKobayashi 0:c88c3b616c00 213
IKobayashi 0:c88c3b616c00 214 /* Memory Region definition */
IKobayashi 0:c88c3b616c00 215 typedef struct RegionStruct {
IKobayashi 0:c88c3b616c00 216 mmu_region_size_Type rg_t;
IKobayashi 0:c88c3b616c00 217 mmu_memory_Type mem_t;
IKobayashi 0:c88c3b616c00 218 uint8_t domain;
IKobayashi 0:c88c3b616c00 219 mmu_cacheability_Type inner_norm_t;
IKobayashi 0:c88c3b616c00 220 mmu_cacheability_Type outer_norm_t;
IKobayashi 0:c88c3b616c00 221 mmu_ecc_check_Type e_t;
IKobayashi 0:c88c3b616c00 222 mmu_execute_Type xn_t;
IKobayashi 0:c88c3b616c00 223 mmu_global_Type g_t;
IKobayashi 0:c88c3b616c00 224 mmu_secure_Type sec_t;
IKobayashi 0:c88c3b616c00 225 mmu_access_Type priv_t;
IKobayashi 0:c88c3b616c00 226 mmu_access_Type user_t;
IKobayashi 0:c88c3b616c00 227 mmu_shared_Type sh_t;
IKobayashi 0:c88c3b616c00 228
IKobayashi 0:c88c3b616c00 229 } mmu_region_attributes_Type;
IKobayashi 0:c88c3b616c00 230
IKobayashi 0:c88c3b616c00 231 /** \brief Set section execution-never attribute
IKobayashi 0:c88c3b616c00 232
IKobayashi 0:c88c3b616c00 233 The function sets section execution-never attribute
IKobayashi 0:c88c3b616c00 234
IKobayashi 0:c88c3b616c00 235 \param [out] descriptor_l1 L1 descriptor.
IKobayashi 0:c88c3b616c00 236 \param [in] xn Section execution-never attribute : EXECUTE , NON_EXECUTE.
IKobayashi 0:c88c3b616c00 237
IKobayashi 0:c88c3b616c00 238 \return 0
IKobayashi 0:c88c3b616c00 239 */
IKobayashi 0:c88c3b616c00 240 __STATIC_INLINE int __xn_section(uint32_t *descriptor_l1, mmu_execute_Type xn)
IKobayashi 0:c88c3b616c00 241 {
IKobayashi 0:c88c3b616c00 242 *descriptor_l1 &= SECTION_XN_MASK;
IKobayashi 0:c88c3b616c00 243 *descriptor_l1 |= ((xn & 0x1) << SECTION_XN_SHIFT);
IKobayashi 0:c88c3b616c00 244 return 0;
IKobayashi 0:c88c3b616c00 245 }
IKobayashi 0:c88c3b616c00 246
IKobayashi 0:c88c3b616c00 247 /** \brief Set section domain
IKobayashi 0:c88c3b616c00 248
IKobayashi 0:c88c3b616c00 249 The function sets section domain
IKobayashi 0:c88c3b616c00 250
IKobayashi 0:c88c3b616c00 251 \param [out] descriptor_l1 L1 descriptor.
IKobayashi 0:c88c3b616c00 252 \param [in] domain Section domain
IKobayashi 0:c88c3b616c00 253
IKobayashi 0:c88c3b616c00 254 \return 0
IKobayashi 0:c88c3b616c00 255 */
IKobayashi 0:c88c3b616c00 256 __STATIC_INLINE int __domain_section(uint32_t *descriptor_l1, uint8_t domain)
IKobayashi 0:c88c3b616c00 257 {
IKobayashi 0:c88c3b616c00 258 *descriptor_l1 &= SECTION_DOMAIN_MASK;
IKobayashi 0:c88c3b616c00 259 *descriptor_l1 |= ((domain & 0xF) << SECTION_DOMAIN_SHIFT);
IKobayashi 0:c88c3b616c00 260 return 0;
IKobayashi 0:c88c3b616c00 261 }
IKobayashi 0:c88c3b616c00 262
IKobayashi 0:c88c3b616c00 263 /** \brief Set section parity check
IKobayashi 0:c88c3b616c00 264
IKobayashi 0:c88c3b616c00 265 The function sets section parity check
IKobayashi 0:c88c3b616c00 266
IKobayashi 0:c88c3b616c00 267 \param [out] descriptor_l1 L1 descriptor.
IKobayashi 0:c88c3b616c00 268 \param [in] p_bit Parity check: ECC_DISABLED, ECC_ENABLED
IKobayashi 0:c88c3b616c00 269
IKobayashi 0:c88c3b616c00 270 \return 0
IKobayashi 0:c88c3b616c00 271 */
IKobayashi 0:c88c3b616c00 272 __STATIC_INLINE int __p_section(uint32_t *descriptor_l1, mmu_ecc_check_Type p_bit)
IKobayashi 0:c88c3b616c00 273 {
IKobayashi 0:c88c3b616c00 274 *descriptor_l1 &= SECTION_P_MASK;
IKobayashi 0:c88c3b616c00 275 *descriptor_l1 |= ((p_bit & 0x1) << SECTION_P_SHIFT);
IKobayashi 0:c88c3b616c00 276 return 0;
IKobayashi 0:c88c3b616c00 277 }
IKobayashi 0:c88c3b616c00 278
IKobayashi 0:c88c3b616c00 279 /** \brief Set section access privileges
IKobayashi 0:c88c3b616c00 280
IKobayashi 0:c88c3b616c00 281 The function sets section access privileges
IKobayashi 0:c88c3b616c00 282
IKobayashi 0:c88c3b616c00 283 \param [out] descriptor_l1 L1 descriptor.
IKobayashi 0:c88c3b616c00 284 \param [in] user User Level Access: NO_ACCESS, RW, READ
IKobayashi 0:c88c3b616c00 285 \param [in] priv Privilege Level Access: NO_ACCESS, RW, READ
IKobayashi 0:c88c3b616c00 286 \param [in] afe Access flag enable
IKobayashi 0:c88c3b616c00 287
IKobayashi 0:c88c3b616c00 288 \return 0
IKobayashi 0:c88c3b616c00 289 */
IKobayashi 0:c88c3b616c00 290 __STATIC_INLINE int __ap_section(uint32_t *descriptor_l1, mmu_access_Type user, mmu_access_Type priv, uint32_t afe)
IKobayashi 0:c88c3b616c00 291 {
IKobayashi 0:c88c3b616c00 292 uint32_t ap = 0;
IKobayashi 0:c88c3b616c00 293
IKobayashi 0:c88c3b616c00 294 if (afe == 0) { //full access
IKobayashi 0:c88c3b616c00 295 if ((priv == NO_ACCESS) && (user == NO_ACCESS)) { ap = 0x0; }
IKobayashi 0:c88c3b616c00 296 else if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; }
IKobayashi 0:c88c3b616c00 297 else if ((priv == RW) && (user == READ)) { ap = 0x2; }
IKobayashi 0:c88c3b616c00 298 else if ((priv == RW) && (user == RW)) { ap = 0x3; }
IKobayashi 0:c88c3b616c00 299 else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }
IKobayashi 0:c88c3b616c00 300 else if ((priv == READ) && (user == READ)) { ap = 0x7; }
IKobayashi 0:c88c3b616c00 301 }
IKobayashi 0:c88c3b616c00 302
IKobayashi 0:c88c3b616c00 303 else { //Simplified access
IKobayashi 0:c88c3b616c00 304 if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; }
IKobayashi 0:c88c3b616c00 305 else if ((priv == RW) && (user == RW)) { ap = 0x3; }
IKobayashi 0:c88c3b616c00 306 else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }
IKobayashi 0:c88c3b616c00 307 else if ((priv == READ) && (user == READ)) { ap = 0x7; }
IKobayashi 0:c88c3b616c00 308 }
IKobayashi 0:c88c3b616c00 309
IKobayashi 0:c88c3b616c00 310 *descriptor_l1 &= SECTION_AP_MASK;
IKobayashi 0:c88c3b616c00 311 *descriptor_l1 |= (ap & 0x3) << SECTION_AP_SHIFT;
IKobayashi 0:c88c3b616c00 312 *descriptor_l1 |= ((ap & 0x4)>>2) << SECTION_AP2_SHIFT;
IKobayashi 0:c88c3b616c00 313
IKobayashi 0:c88c3b616c00 314 return 0;
IKobayashi 0:c88c3b616c00 315 }
IKobayashi 0:c88c3b616c00 316
IKobayashi 0:c88c3b616c00 317 /** \brief Set section shareability
IKobayashi 0:c88c3b616c00 318
IKobayashi 0:c88c3b616c00 319 The function sets section shareability
IKobayashi 0:c88c3b616c00 320
IKobayashi 0:c88c3b616c00 321 \param [out] descriptor_l1 L1 descriptor.
IKobayashi 0:c88c3b616c00 322 \param [in] s_bit Section shareability: NON_SHARED, SHARED
IKobayashi 0:c88c3b616c00 323
IKobayashi 0:c88c3b616c00 324 \return 0
IKobayashi 0:c88c3b616c00 325 */
IKobayashi 0:c88c3b616c00 326 __STATIC_INLINE int __shared_section(uint32_t *descriptor_l1, mmu_shared_Type s_bit)
IKobayashi 0:c88c3b616c00 327 {
IKobayashi 0:c88c3b616c00 328 *descriptor_l1 &= SECTION_S_MASK;
IKobayashi 0:c88c3b616c00 329 *descriptor_l1 |= ((s_bit & 0x1) << SECTION_S_SHIFT);
IKobayashi 0:c88c3b616c00 330 return 0;
IKobayashi 0:c88c3b616c00 331 }
IKobayashi 0:c88c3b616c00 332
IKobayashi 0:c88c3b616c00 333 /** \brief Set section Global attribute
IKobayashi 0:c88c3b616c00 334
IKobayashi 0:c88c3b616c00 335 The function sets section Global attribute
IKobayashi 0:c88c3b616c00 336
IKobayashi 0:c88c3b616c00 337 \param [out] descriptor_l1 L1 descriptor.
IKobayashi 0:c88c3b616c00 338 \param [in] g_bit Section attribute: GLOBAL, NON_GLOBAL
IKobayashi 0:c88c3b616c00 339
IKobayashi 0:c88c3b616c00 340 \return 0
IKobayashi 0:c88c3b616c00 341 */
IKobayashi 0:c88c3b616c00 342 __STATIC_INLINE int __global_section(uint32_t *descriptor_l1, mmu_global_Type g_bit)
IKobayashi 0:c88c3b616c00 343 {
IKobayashi 0:c88c3b616c00 344 *descriptor_l1 &= SECTION_NG_MASK;
IKobayashi 0:c88c3b616c00 345 *descriptor_l1 |= ((g_bit & 0x1) << SECTION_NG_SHIFT);
IKobayashi 0:c88c3b616c00 346 return 0;
IKobayashi 0:c88c3b616c00 347 }
IKobayashi 0:c88c3b616c00 348
IKobayashi 0:c88c3b616c00 349 /** \brief Set section Security attribute
IKobayashi 0:c88c3b616c00 350
IKobayashi 0:c88c3b616c00 351 The function sets section Global attribute
IKobayashi 0:c88c3b616c00 352
IKobayashi 0:c88c3b616c00 353 \param [out] descriptor_l1 L1 descriptor.
IKobayashi 0:c88c3b616c00 354 \param [in] s_bit Section Security attribute: SECURE, NON_SECURE
IKobayashi 0:c88c3b616c00 355
IKobayashi 0:c88c3b616c00 356 \return 0
IKobayashi 0:c88c3b616c00 357 */
IKobayashi 0:c88c3b616c00 358 __STATIC_INLINE int __secure_section(uint32_t *descriptor_l1, mmu_secure_Type s_bit)
IKobayashi 0:c88c3b616c00 359 {
IKobayashi 0:c88c3b616c00 360 *descriptor_l1 &= SECTION_NS_MASK;
IKobayashi 0:c88c3b616c00 361 *descriptor_l1 |= ((s_bit & 0x1) << SECTION_NS_SHIFT);
IKobayashi 0:c88c3b616c00 362 return 0;
IKobayashi 0:c88c3b616c00 363 }
IKobayashi 0:c88c3b616c00 364
IKobayashi 0:c88c3b616c00 365 /* Page 4k or 64k */
IKobayashi 0:c88c3b616c00 366 /** \brief Set 4k/64k page execution-never attribute
IKobayashi 0:c88c3b616c00 367
IKobayashi 0:c88c3b616c00 368 The function sets 4k/64k page execution-never attribute
IKobayashi 0:c88c3b616c00 369
IKobayashi 0:c88c3b616c00 370 \param [out] descriptor_l2 L2 descriptor.
IKobayashi 0:c88c3b616c00 371 \param [in] xn Page execution-never attribute : EXECUTE , NON_EXECUTE.
IKobayashi 0:c88c3b616c00 372 \param [in] page Page size: PAGE_4k, PAGE_64k,
IKobayashi 0:c88c3b616c00 373
IKobayashi 0:c88c3b616c00 374 \return 0
IKobayashi 0:c88c3b616c00 375 */
IKobayashi 0:c88c3b616c00 376 __STATIC_INLINE int __xn_page(uint32_t *descriptor_l2, mmu_execute_Type xn, mmu_region_size_Type page)
IKobayashi 0:c88c3b616c00 377 {
IKobayashi 0:c88c3b616c00 378 if (page == PAGE_4k)
IKobayashi 0:c88c3b616c00 379 {
IKobayashi 0:c88c3b616c00 380 *descriptor_l2 &= PAGE_XN_4K_MASK;
IKobayashi 0:c88c3b616c00 381 *descriptor_l2 |= ((xn & 0x1) << PAGE_XN_4K_SHIFT);
IKobayashi 0:c88c3b616c00 382 }
IKobayashi 0:c88c3b616c00 383 else
IKobayashi 0:c88c3b616c00 384 {
IKobayashi 0:c88c3b616c00 385 *descriptor_l2 &= PAGE_XN_64K_MASK;
IKobayashi 0:c88c3b616c00 386 *descriptor_l2 |= ((xn & 0x1) << PAGE_XN_64K_SHIFT);
IKobayashi 0:c88c3b616c00 387 }
IKobayashi 0:c88c3b616c00 388 return 0;
IKobayashi 0:c88c3b616c00 389 }
IKobayashi 0:c88c3b616c00 390
IKobayashi 0:c88c3b616c00 391 /** \brief Set 4k/64k page domain
IKobayashi 0:c88c3b616c00 392
IKobayashi 0:c88c3b616c00 393 The function sets 4k/64k page domain
IKobayashi 0:c88c3b616c00 394
IKobayashi 0:c88c3b616c00 395 \param [out] descriptor_l1 L1 descriptor.
IKobayashi 0:c88c3b616c00 396 \param [in] domain Page domain
IKobayashi 0:c88c3b616c00 397
IKobayashi 0:c88c3b616c00 398 \return 0
IKobayashi 0:c88c3b616c00 399 */
IKobayashi 0:c88c3b616c00 400 __STATIC_INLINE int __domain_page(uint32_t *descriptor_l1, uint8_t domain)
IKobayashi 0:c88c3b616c00 401 {
IKobayashi 0:c88c3b616c00 402 *descriptor_l1 &= PAGE_DOMAIN_MASK;
IKobayashi 0:c88c3b616c00 403 *descriptor_l1 |= ((domain & 0xf) << PAGE_DOMAIN_SHIFT);
IKobayashi 0:c88c3b616c00 404 return 0;
IKobayashi 0:c88c3b616c00 405 }
IKobayashi 0:c88c3b616c00 406
IKobayashi 0:c88c3b616c00 407 /** \brief Set 4k/64k page parity check
IKobayashi 0:c88c3b616c00 408
IKobayashi 0:c88c3b616c00 409 The function sets 4k/64k page parity check
IKobayashi 0:c88c3b616c00 410
IKobayashi 0:c88c3b616c00 411 \param [out] descriptor_l1 L1 descriptor.
IKobayashi 0:c88c3b616c00 412 \param [in] p_bit Parity check: ECC_DISABLED, ECC_ENABLED
IKobayashi 0:c88c3b616c00 413
IKobayashi 0:c88c3b616c00 414 \return 0
IKobayashi 0:c88c3b616c00 415 */
IKobayashi 0:c88c3b616c00 416 __STATIC_INLINE int __p_page(uint32_t *descriptor_l1, mmu_ecc_check_Type p_bit)
IKobayashi 0:c88c3b616c00 417 {
IKobayashi 0:c88c3b616c00 418 *descriptor_l1 &= SECTION_P_MASK;
IKobayashi 0:c88c3b616c00 419 *descriptor_l1 |= ((p_bit & 0x1) << SECTION_P_SHIFT);
IKobayashi 0:c88c3b616c00 420 return 0;
IKobayashi 0:c88c3b616c00 421 }
IKobayashi 0:c88c3b616c00 422
IKobayashi 0:c88c3b616c00 423 /** \brief Set 4k/64k page access privileges
IKobayashi 0:c88c3b616c00 424
IKobayashi 0:c88c3b616c00 425 The function sets 4k/64k page access privileges
IKobayashi 0:c88c3b616c00 426
IKobayashi 0:c88c3b616c00 427 \param [out] descriptor_l2 L2 descriptor.
IKobayashi 0:c88c3b616c00 428 \param [in] user User Level Access: NO_ACCESS, RW, READ
IKobayashi 0:c88c3b616c00 429 \param [in] priv Privilege Level Access: NO_ACCESS, RW, READ
IKobayashi 0:c88c3b616c00 430 \param [in] afe Access flag enable
IKobayashi 0:c88c3b616c00 431
IKobayashi 0:c88c3b616c00 432 \return 0
IKobayashi 0:c88c3b616c00 433 */
IKobayashi 0:c88c3b616c00 434 __STATIC_INLINE int __ap_page(uint32_t *descriptor_l2, mmu_access_Type user, mmu_access_Type priv, uint32_t afe)
IKobayashi 0:c88c3b616c00 435 {
IKobayashi 0:c88c3b616c00 436 uint32_t ap = 0;
IKobayashi 0:c88c3b616c00 437
IKobayashi 0:c88c3b616c00 438 if (afe == 0) { //full access
IKobayashi 0:c88c3b616c00 439 if ((priv == NO_ACCESS) && (user == NO_ACCESS)) { ap = 0x0; }
IKobayashi 0:c88c3b616c00 440 else if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; }
IKobayashi 0:c88c3b616c00 441 else if ((priv == RW) && (user == READ)) { ap = 0x2; }
IKobayashi 0:c88c3b616c00 442 else if ((priv == RW) && (user == RW)) { ap = 0x3; }
IKobayashi 0:c88c3b616c00 443 else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }
IKobayashi 0:c88c3b616c00 444 else if ((priv == READ) && (user == READ)) { ap = 0x6; }
IKobayashi 0:c88c3b616c00 445 }
IKobayashi 0:c88c3b616c00 446
IKobayashi 0:c88c3b616c00 447 else { //Simplified access
IKobayashi 0:c88c3b616c00 448 if ((priv == RW) && (user == NO_ACCESS)) { ap = 0x1; }
IKobayashi 0:c88c3b616c00 449 else if ((priv == RW) && (user == RW)) { ap = 0x3; }
IKobayashi 0:c88c3b616c00 450 else if ((priv == READ) && (user == NO_ACCESS)) { ap = 0x5; }
IKobayashi 0:c88c3b616c00 451 else if ((priv == READ) && (user == READ)) { ap = 0x7; }
IKobayashi 0:c88c3b616c00 452 }
IKobayashi 0:c88c3b616c00 453
IKobayashi 0:c88c3b616c00 454 *descriptor_l2 &= PAGE_AP_MASK;
IKobayashi 0:c88c3b616c00 455 *descriptor_l2 |= (ap & 0x3) << PAGE_AP_SHIFT;
IKobayashi 0:c88c3b616c00 456 *descriptor_l2 |= ((ap & 0x4)>>2) << PAGE_AP2_SHIFT;
IKobayashi 0:c88c3b616c00 457
IKobayashi 0:c88c3b616c00 458 return 0;
IKobayashi 0:c88c3b616c00 459 }
IKobayashi 0:c88c3b616c00 460
IKobayashi 0:c88c3b616c00 461 /** \brief Set 4k/64k page shareability
IKobayashi 0:c88c3b616c00 462
IKobayashi 0:c88c3b616c00 463 The function sets 4k/64k page shareability
IKobayashi 0:c88c3b616c00 464
IKobayashi 0:c88c3b616c00 465 \param [out] descriptor_l2 L2 descriptor.
IKobayashi 0:c88c3b616c00 466 \param [in] s_bit 4k/64k page shareability: NON_SHARED, SHARED
IKobayashi 0:c88c3b616c00 467
IKobayashi 0:c88c3b616c00 468 \return 0
IKobayashi 0:c88c3b616c00 469 */
IKobayashi 0:c88c3b616c00 470 __STATIC_INLINE int __shared_page(uint32_t *descriptor_l2, mmu_shared_Type s_bit)
IKobayashi 0:c88c3b616c00 471 {
IKobayashi 0:c88c3b616c00 472 *descriptor_l2 &= PAGE_S_MASK;
IKobayashi 0:c88c3b616c00 473 *descriptor_l2 |= ((s_bit & 0x1) << PAGE_S_SHIFT);
IKobayashi 0:c88c3b616c00 474 return 0;
IKobayashi 0:c88c3b616c00 475 }
IKobayashi 0:c88c3b616c00 476
IKobayashi 0:c88c3b616c00 477 /** \brief Set 4k/64k page Global attribute
IKobayashi 0:c88c3b616c00 478
IKobayashi 0:c88c3b616c00 479 The function sets 4k/64k page Global attribute
IKobayashi 0:c88c3b616c00 480
IKobayashi 0:c88c3b616c00 481 \param [out] descriptor_l2 L2 descriptor.
IKobayashi 0:c88c3b616c00 482 \param [in] g_bit 4k/64k page attribute: GLOBAL, NON_GLOBAL
IKobayashi 0:c88c3b616c00 483
IKobayashi 0:c88c3b616c00 484 \return 0
IKobayashi 0:c88c3b616c00 485 */
IKobayashi 0:c88c3b616c00 486 __STATIC_INLINE int __global_page(uint32_t *descriptor_l2, mmu_global_Type g_bit)
IKobayashi 0:c88c3b616c00 487 {
IKobayashi 0:c88c3b616c00 488 *descriptor_l2 &= PAGE_NG_MASK;
IKobayashi 0:c88c3b616c00 489 *descriptor_l2 |= ((g_bit & 0x1) << PAGE_NG_SHIFT);
IKobayashi 0:c88c3b616c00 490 return 0;
IKobayashi 0:c88c3b616c00 491 }
IKobayashi 0:c88c3b616c00 492
IKobayashi 0:c88c3b616c00 493 /** \brief Set 4k/64k page Security attribute
IKobayashi 0:c88c3b616c00 494
IKobayashi 0:c88c3b616c00 495 The function sets 4k/64k page Global attribute
IKobayashi 0:c88c3b616c00 496
IKobayashi 0:c88c3b616c00 497 \param [out] descriptor_l1 L1 descriptor.
IKobayashi 0:c88c3b616c00 498 \param [in] s_bit 4k/64k page Security attribute: SECURE, NON_SECURE
IKobayashi 0:c88c3b616c00 499
IKobayashi 0:c88c3b616c00 500 \return 0
IKobayashi 0:c88c3b616c00 501 */
IKobayashi 0:c88c3b616c00 502 __STATIC_INLINE int __secure_page(uint32_t *descriptor_l1, mmu_secure_Type s_bit)
IKobayashi 0:c88c3b616c00 503 {
IKobayashi 0:c88c3b616c00 504 *descriptor_l1 &= PAGE_NS_MASK;
IKobayashi 0:c88c3b616c00 505 *descriptor_l1 |= ((s_bit & 0x1) << PAGE_NS_SHIFT);
IKobayashi 0:c88c3b616c00 506 return 0;
IKobayashi 0:c88c3b616c00 507 }
IKobayashi 0:c88c3b616c00 508
IKobayashi 0:c88c3b616c00 509
IKobayashi 0:c88c3b616c00 510 /** \brief Set Section memory attributes
IKobayashi 0:c88c3b616c00 511
IKobayashi 0:c88c3b616c00 512 The function sets section memory attributes
IKobayashi 0:c88c3b616c00 513
IKobayashi 0:c88c3b616c00 514 \param [out] descriptor_l1 L1 descriptor.
IKobayashi 0:c88c3b616c00 515 \param [in] mem Section memory type: NORMAL, DEVICE, SHARED_DEVICE, NON_SHARED_DEVICE, STRONGLY_ORDERED
IKobayashi 0:c88c3b616c00 516 \param [in] outer Outer cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,
IKobayashi 0:c88c3b616c00 517 \param [in] inner Inner cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,
IKobayashi 0:c88c3b616c00 518
IKobayashi 0:c88c3b616c00 519 \return 0
IKobayashi 0:c88c3b616c00 520 */
IKobayashi 0:c88c3b616c00 521 __STATIC_INLINE int __memory_section(uint32_t *descriptor_l1, mmu_memory_Type mem, mmu_cacheability_Type outer, mmu_cacheability_Type inner)
IKobayashi 0:c88c3b616c00 522 {
IKobayashi 0:c88c3b616c00 523 *descriptor_l1 &= SECTION_TEXCB_MASK;
IKobayashi 0:c88c3b616c00 524
IKobayashi 0:c88c3b616c00 525 if (STRONGLY_ORDERED == mem)
IKobayashi 0:c88c3b616c00 526 {
IKobayashi 0:c88c3b616c00 527 return 0;
IKobayashi 0:c88c3b616c00 528 }
IKobayashi 0:c88c3b616c00 529 else if (SHARED_DEVICE == mem)
IKobayashi 0:c88c3b616c00 530 {
IKobayashi 0:c88c3b616c00 531 *descriptor_l1 |= (1 << SECTION_B_SHIFT);
IKobayashi 0:c88c3b616c00 532 }
IKobayashi 0:c88c3b616c00 533 else if (NON_SHARED_DEVICE == mem)
IKobayashi 0:c88c3b616c00 534 {
IKobayashi 0:c88c3b616c00 535 *descriptor_l1 |= (1 << SECTION_TEX1_SHIFT);
IKobayashi 0:c88c3b616c00 536 }
IKobayashi 0:c88c3b616c00 537 else if (NORMAL == mem)
IKobayashi 0:c88c3b616c00 538 {
IKobayashi 0:c88c3b616c00 539 *descriptor_l1 |= 1 << SECTION_TEX2_SHIFT;
IKobayashi 0:c88c3b616c00 540 switch(inner)
IKobayashi 0:c88c3b616c00 541 {
IKobayashi 0:c88c3b616c00 542 case NON_CACHEABLE:
IKobayashi 0:c88c3b616c00 543 break;
IKobayashi 0:c88c3b616c00 544 case WB_WA:
IKobayashi 0:c88c3b616c00 545 *descriptor_l1 |= (1 << SECTION_B_SHIFT);
IKobayashi 0:c88c3b616c00 546 break;
IKobayashi 0:c88c3b616c00 547 case WT:
IKobayashi 0:c88c3b616c00 548 *descriptor_l1 |= 1 << SECTION_C_SHIFT;
IKobayashi 0:c88c3b616c00 549 break;
IKobayashi 0:c88c3b616c00 550 case WB_NO_WA:
IKobayashi 0:c88c3b616c00 551 *descriptor_l1 |= (1 << SECTION_B_SHIFT) | (1 << SECTION_C_SHIFT);
IKobayashi 0:c88c3b616c00 552 break;
IKobayashi 0:c88c3b616c00 553 }
IKobayashi 0:c88c3b616c00 554 switch(outer)
IKobayashi 0:c88c3b616c00 555 {
IKobayashi 0:c88c3b616c00 556 case NON_CACHEABLE:
IKobayashi 0:c88c3b616c00 557 break;
IKobayashi 0:c88c3b616c00 558 case WB_WA:
IKobayashi 0:c88c3b616c00 559 *descriptor_l1 |= (1 << SECTION_TEX0_SHIFT);
IKobayashi 0:c88c3b616c00 560 break;
IKobayashi 0:c88c3b616c00 561 case WT:
IKobayashi 0:c88c3b616c00 562 *descriptor_l1 |= 1 << SECTION_TEX1_SHIFT;
IKobayashi 0:c88c3b616c00 563 break;
IKobayashi 0:c88c3b616c00 564 case WB_NO_WA:
IKobayashi 0:c88c3b616c00 565 *descriptor_l1 |= (1 << SECTION_TEX0_SHIFT) | (1 << SECTION_TEX0_SHIFT);
IKobayashi 0:c88c3b616c00 566 break;
IKobayashi 0:c88c3b616c00 567 }
IKobayashi 0:c88c3b616c00 568 }
IKobayashi 0:c88c3b616c00 569
IKobayashi 0:c88c3b616c00 570 return 0;
IKobayashi 0:c88c3b616c00 571 }
IKobayashi 0:c88c3b616c00 572
IKobayashi 0:c88c3b616c00 573 /** \brief Set 4k/64k page memory attributes
IKobayashi 0:c88c3b616c00 574
IKobayashi 0:c88c3b616c00 575 The function sets 4k/64k page memory attributes
IKobayashi 0:c88c3b616c00 576
IKobayashi 0:c88c3b616c00 577 \param [out] descriptor_l2 L2 descriptor.
IKobayashi 0:c88c3b616c00 578 \param [in] mem 4k/64k page memory type: NORMAL, DEVICE, SHARED_DEVICE, NON_SHARED_DEVICE, STRONGLY_ORDERED
IKobayashi 0:c88c3b616c00 579 \param [in] outer Outer cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,
IKobayashi 0:c88c3b616c00 580 \param [in] inner Inner cacheability: NON_CACHEABLE, WB_WA, WT, WB_NO_WA,
IKobayashi 0:c88c3b616c00 581
IKobayashi 0:c88c3b616c00 582 \return 0
IKobayashi 0:c88c3b616c00 583 */
IKobayashi 0:c88c3b616c00 584 __STATIC_INLINE int __memory_page(uint32_t *descriptor_l2, mmu_memory_Type mem, mmu_cacheability_Type outer, mmu_cacheability_Type inner, mmu_region_size_Type page)
IKobayashi 0:c88c3b616c00 585 {
IKobayashi 0:c88c3b616c00 586 *descriptor_l2 &= PAGE_4K_TEXCB_MASK;
IKobayashi 0:c88c3b616c00 587
IKobayashi 0:c88c3b616c00 588 if (page == PAGE_64k)
IKobayashi 0:c88c3b616c00 589 {
IKobayashi 0:c88c3b616c00 590 //same as section
IKobayashi 0:c88c3b616c00 591 __memory_section(descriptor_l2, mem, outer, inner);
IKobayashi 0:c88c3b616c00 592 }
IKobayashi 0:c88c3b616c00 593 else
IKobayashi 0:c88c3b616c00 594 {
IKobayashi 0:c88c3b616c00 595 if (STRONGLY_ORDERED == mem)
IKobayashi 0:c88c3b616c00 596 {
IKobayashi 0:c88c3b616c00 597 return 0;
IKobayashi 0:c88c3b616c00 598 }
IKobayashi 0:c88c3b616c00 599 else if (SHARED_DEVICE == mem)
IKobayashi 0:c88c3b616c00 600 {
IKobayashi 0:c88c3b616c00 601 *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT);
IKobayashi 0:c88c3b616c00 602 }
IKobayashi 0:c88c3b616c00 603 else if (NON_SHARED_DEVICE == mem)
IKobayashi 0:c88c3b616c00 604 {
IKobayashi 0:c88c3b616c00 605 *descriptor_l2 |= (1 << PAGE_4K_TEX1_SHIFT);
IKobayashi 0:c88c3b616c00 606 }
IKobayashi 0:c88c3b616c00 607 else if (NORMAL == mem)
IKobayashi 0:c88c3b616c00 608 {
IKobayashi 0:c88c3b616c00 609 *descriptor_l2 |= 1 << PAGE_4K_TEX2_SHIFT;
IKobayashi 0:c88c3b616c00 610 switch(inner)
IKobayashi 0:c88c3b616c00 611 {
IKobayashi 0:c88c3b616c00 612 case NON_CACHEABLE:
IKobayashi 0:c88c3b616c00 613 break;
IKobayashi 0:c88c3b616c00 614 case WB_WA:
IKobayashi 0:c88c3b616c00 615 *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT);
IKobayashi 0:c88c3b616c00 616 break;
IKobayashi 0:c88c3b616c00 617 case WT:
IKobayashi 0:c88c3b616c00 618 *descriptor_l2 |= 1 << PAGE_4K_C_SHIFT;
IKobayashi 0:c88c3b616c00 619 break;
IKobayashi 0:c88c3b616c00 620 case WB_NO_WA:
IKobayashi 0:c88c3b616c00 621 *descriptor_l2 |= (1 << PAGE_4K_B_SHIFT) | (1 << PAGE_4K_C_SHIFT);
IKobayashi 0:c88c3b616c00 622 break;
IKobayashi 0:c88c3b616c00 623 }
IKobayashi 0:c88c3b616c00 624 switch(outer)
IKobayashi 0:c88c3b616c00 625 {
IKobayashi 0:c88c3b616c00 626 case NON_CACHEABLE:
IKobayashi 0:c88c3b616c00 627 break;
IKobayashi 0:c88c3b616c00 628 case WB_WA:
IKobayashi 0:c88c3b616c00 629 *descriptor_l2 |= (1 << PAGE_4K_TEX0_SHIFT);
IKobayashi 0:c88c3b616c00 630 break;
IKobayashi 0:c88c3b616c00 631 case WT:
IKobayashi 0:c88c3b616c00 632 *descriptor_l2 |= 1 << PAGE_4K_TEX1_SHIFT;
IKobayashi 0:c88c3b616c00 633 break;
IKobayashi 0:c88c3b616c00 634 case WB_NO_WA:
IKobayashi 0:c88c3b616c00 635 *descriptor_l2 |= (1 << PAGE_4K_TEX0_SHIFT) | (1 << PAGE_4K_TEX0_SHIFT);
IKobayashi 0:c88c3b616c00 636 break;
IKobayashi 0:c88c3b616c00 637 }
IKobayashi 0:c88c3b616c00 638 }
IKobayashi 0:c88c3b616c00 639 }
IKobayashi 0:c88c3b616c00 640
IKobayashi 0:c88c3b616c00 641 return 0;
IKobayashi 0:c88c3b616c00 642 }
IKobayashi 0:c88c3b616c00 643
IKobayashi 0:c88c3b616c00 644 /** \brief Create a L1 section descriptor
IKobayashi 0:c88c3b616c00 645
IKobayashi 0:c88c3b616c00 646 The function creates a section descriptor.
IKobayashi 0:c88c3b616c00 647
IKobayashi 0:c88c3b616c00 648 Assumptions:
IKobayashi 0:c88c3b616c00 649 - 16MB super sections not supported
IKobayashi 0:c88c3b616c00 650 - TEX remap disabled, so memory type and attributes are described directly by bits in the descriptor
IKobayashi 0:c88c3b616c00 651 - Functions always return 0
IKobayashi 0:c88c3b616c00 652
IKobayashi 0:c88c3b616c00 653 \param [out] descriptor L1 descriptor
IKobayashi 0:c88c3b616c00 654 \param [out] descriptor2 L2 descriptor
IKobayashi 0:c88c3b616c00 655 \param [in] reg Section attributes
IKobayashi 0:c88c3b616c00 656
IKobayashi 0:c88c3b616c00 657 \return 0
IKobayashi 0:c88c3b616c00 658 */
IKobayashi 0:c88c3b616c00 659 __STATIC_INLINE int __get_section_descriptor(uint32_t *descriptor, mmu_region_attributes_Type reg)
IKobayashi 0:c88c3b616c00 660 {
IKobayashi 0:c88c3b616c00 661 *descriptor = 0;
IKobayashi 0:c88c3b616c00 662
IKobayashi 0:c88c3b616c00 663 __memory_section(descriptor, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t);
IKobayashi 0:c88c3b616c00 664 __xn_section(descriptor,reg.xn_t);
IKobayashi 0:c88c3b616c00 665 __domain_section(descriptor, reg.domain);
IKobayashi 0:c88c3b616c00 666 __p_section(descriptor, reg.e_t);
IKobayashi 0:c88c3b616c00 667 __ap_section(descriptor, reg.priv_t, reg.user_t, 1);
IKobayashi 0:c88c3b616c00 668 __shared_section(descriptor,reg.sh_t);
IKobayashi 0:c88c3b616c00 669 __global_section(descriptor,reg.g_t);
IKobayashi 0:c88c3b616c00 670 __secure_section(descriptor,reg.sec_t);
IKobayashi 0:c88c3b616c00 671 *descriptor &= SECTION_MASK;
IKobayashi 0:c88c3b616c00 672 *descriptor |= SECTION_DESCRIPTOR;
IKobayashi 0:c88c3b616c00 673
IKobayashi 0:c88c3b616c00 674 return 0;
IKobayashi 0:c88c3b616c00 675
IKobayashi 0:c88c3b616c00 676 }
IKobayashi 0:c88c3b616c00 677
IKobayashi 0:c88c3b616c00 678
IKobayashi 0:c88c3b616c00 679 /** \brief Create a L1 and L2 4k/64k page descriptor
IKobayashi 0:c88c3b616c00 680
IKobayashi 0:c88c3b616c00 681 The function creates a 4k/64k page descriptor.
IKobayashi 0:c88c3b616c00 682 Assumptions:
IKobayashi 0:c88c3b616c00 683 - TEX remap disabled, so memory type and attributes are described directly by bits in the descriptor
IKobayashi 0:c88c3b616c00 684 - Functions always return 0
IKobayashi 0:c88c3b616c00 685
IKobayashi 0:c88c3b616c00 686 \param [out] descriptor L1 descriptor
IKobayashi 0:c88c3b616c00 687 \param [out] descriptor2 L2 descriptor
IKobayashi 0:c88c3b616c00 688 \param [in] reg 4k/64k page attributes
IKobayashi 0:c88c3b616c00 689
IKobayashi 0:c88c3b616c00 690 \return 0
IKobayashi 0:c88c3b616c00 691 */
IKobayashi 0:c88c3b616c00 692 __STATIC_INLINE int __get_page_descriptor(uint32_t *descriptor, uint32_t *descriptor2, mmu_region_attributes_Type reg)
IKobayashi 0:c88c3b616c00 693 {
IKobayashi 0:c88c3b616c00 694 *descriptor = 0;
IKobayashi 0:c88c3b616c00 695 *descriptor2 = 0;
IKobayashi 0:c88c3b616c00 696
IKobayashi 0:c88c3b616c00 697 switch (reg.rg_t)
IKobayashi 0:c88c3b616c00 698 {
IKobayashi 0:c88c3b616c00 699 case PAGE_4k:
IKobayashi 0:c88c3b616c00 700 __memory_page(descriptor2, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t, PAGE_4k);
IKobayashi 0:c88c3b616c00 701 __xn_page(descriptor2, reg.xn_t, PAGE_4k);
IKobayashi 0:c88c3b616c00 702 __domain_page(descriptor, reg.domain);
IKobayashi 0:c88c3b616c00 703 __p_page(descriptor, reg.e_t);
IKobayashi 0:c88c3b616c00 704 __ap_page(descriptor2, reg.priv_t, reg.user_t, 1);
IKobayashi 0:c88c3b616c00 705 __shared_page(descriptor2,reg.sh_t);
IKobayashi 0:c88c3b616c00 706 __global_page(descriptor2,reg.g_t);
IKobayashi 0:c88c3b616c00 707 __secure_page(descriptor,reg.sec_t);
IKobayashi 0:c88c3b616c00 708 *descriptor &= PAGE_L1_MASK;
IKobayashi 0:c88c3b616c00 709 *descriptor |= PAGE_L1_DESCRIPTOR;
IKobayashi 0:c88c3b616c00 710 *descriptor2 &= PAGE_L2_4K_MASK;
IKobayashi 0:c88c3b616c00 711 *descriptor2 |= PAGE_L2_4K_DESC;
IKobayashi 0:c88c3b616c00 712 break;
IKobayashi 0:c88c3b616c00 713
IKobayashi 0:c88c3b616c00 714 case PAGE_64k:
IKobayashi 0:c88c3b616c00 715 __memory_page(descriptor2, reg.mem_t, reg.outer_norm_t, reg.inner_norm_t, PAGE_64k);
IKobayashi 0:c88c3b616c00 716 __xn_page(descriptor2, reg.xn_t, PAGE_64k);
IKobayashi 0:c88c3b616c00 717 __domain_page(descriptor, reg.domain);
IKobayashi 0:c88c3b616c00 718 __p_page(descriptor, reg.e_t);
IKobayashi 0:c88c3b616c00 719 __ap_page(descriptor2, reg.priv_t, reg.user_t, 1);
IKobayashi 0:c88c3b616c00 720 __shared_page(descriptor2,reg.sh_t);
IKobayashi 0:c88c3b616c00 721 __global_page(descriptor2,reg.g_t);
IKobayashi 0:c88c3b616c00 722 __secure_page(descriptor,reg.sec_t);
IKobayashi 0:c88c3b616c00 723 *descriptor &= PAGE_L1_MASK;
IKobayashi 0:c88c3b616c00 724 *descriptor |= PAGE_L1_DESCRIPTOR;
IKobayashi 0:c88c3b616c00 725 *descriptor2 &= PAGE_L2_64K_MASK;
IKobayashi 0:c88c3b616c00 726 *descriptor2 |= PAGE_L2_64K_DESC;
IKobayashi 0:c88c3b616c00 727 break;
IKobayashi 0:c88c3b616c00 728
IKobayashi 0:c88c3b616c00 729 case SECTION:
IKobayashi 0:c88c3b616c00 730 //error
IKobayashi 0:c88c3b616c00 731 break;
IKobayashi 0:c88c3b616c00 732
IKobayashi 0:c88c3b616c00 733 }
IKobayashi 0:c88c3b616c00 734
IKobayashi 0:c88c3b616c00 735 return 0;
IKobayashi 0:c88c3b616c00 736
IKobayashi 0:c88c3b616c00 737 }
IKobayashi 0:c88c3b616c00 738
IKobayashi 0:c88c3b616c00 739 /** \brief Create a 1MB Section
IKobayashi 0:c88c3b616c00 740
IKobayashi 0:c88c3b616c00 741 \param [in] ttb Translation table base address
IKobayashi 0:c88c3b616c00 742 \param [in] base_address Section base address
IKobayashi 0:c88c3b616c00 743 \param [in] count Number of sections to create
IKobayashi 0:c88c3b616c00 744 \param [in] descriptor_l1 L1 descriptor (region attributes)
IKobayashi 0:c88c3b616c00 745
IKobayashi 0:c88c3b616c00 746 */
IKobayashi 0:c88c3b616c00 747 __STATIC_INLINE void __TTSection(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1)
IKobayashi 0:c88c3b616c00 748 {
IKobayashi 0:c88c3b616c00 749 uint32_t offset;
IKobayashi 0:c88c3b616c00 750 uint32_t entry;
IKobayashi 0:c88c3b616c00 751 uint32_t i;
IKobayashi 0:c88c3b616c00 752
IKobayashi 0:c88c3b616c00 753 offset = base_address >> 20;
IKobayashi 0:c88c3b616c00 754 entry = (base_address & 0xFFF00000) | descriptor_l1;
IKobayashi 0:c88c3b616c00 755
IKobayashi 0:c88c3b616c00 756 //4 bytes aligned
IKobayashi 0:c88c3b616c00 757 ttb = ttb + offset;
IKobayashi 0:c88c3b616c00 758
IKobayashi 0:c88c3b616c00 759 for (i = 0; i < count; i++ )
IKobayashi 0:c88c3b616c00 760 {
IKobayashi 0:c88c3b616c00 761 //4 bytes aligned
IKobayashi 0:c88c3b616c00 762 *ttb++ = entry;
IKobayashi 0:c88c3b616c00 763 entry += OFFSET_1M;
IKobayashi 0:c88c3b616c00 764 }
IKobayashi 0:c88c3b616c00 765 }
IKobayashi 0:c88c3b616c00 766
IKobayashi 0:c88c3b616c00 767 /** \brief Create a 4k page entry
IKobayashi 0:c88c3b616c00 768
IKobayashi 0:c88c3b616c00 769 \param [in] ttb L1 table base address
IKobayashi 0:c88c3b616c00 770 \param [in] base_address 4k base address
IKobayashi 0:c88c3b616c00 771 \param [in] count Number of 4k pages to create
IKobayashi 0:c88c3b616c00 772 \param [in] descriptor_l1 L1 descriptor (region attributes)
IKobayashi 0:c88c3b616c00 773 \param [in] ttb_l2 L2 table base address
IKobayashi 0:c88c3b616c00 774 \param [in] descriptor_l2 L2 descriptor (region attributes)
IKobayashi 0:c88c3b616c00 775
IKobayashi 0:c88c3b616c00 776 */
IKobayashi 0:c88c3b616c00 777 __STATIC_INLINE void __TTPage_4k(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1, uint32_t *ttb_l2, uint32_t descriptor_l2 )
IKobayashi 0:c88c3b616c00 778 {
IKobayashi 0:c88c3b616c00 779
IKobayashi 0:c88c3b616c00 780 uint32_t offset, offset2;
IKobayashi 0:c88c3b616c00 781 uint32_t entry, entry2;
IKobayashi 0:c88c3b616c00 782 uint32_t i;
IKobayashi 0:c88c3b616c00 783
IKobayashi 0:c88c3b616c00 784
IKobayashi 0:c88c3b616c00 785 offset = base_address >> 20;
IKobayashi 0:c88c3b616c00 786 entry = ((int)ttb_l2 & 0xFFFFFC00) | descriptor_l1;
IKobayashi 0:c88c3b616c00 787
IKobayashi 0:c88c3b616c00 788 //4 bytes aligned
IKobayashi 0:c88c3b616c00 789 ttb += offset;
IKobayashi 0:c88c3b616c00 790 //create l1_entry
IKobayashi 0:c88c3b616c00 791 *ttb = entry;
IKobayashi 0:c88c3b616c00 792
IKobayashi 0:c88c3b616c00 793 offset2 = (base_address & 0xff000) >> 12;
IKobayashi 0:c88c3b616c00 794 ttb_l2 += offset2;
IKobayashi 0:c88c3b616c00 795 entry2 = (base_address & 0xFFFFF000) | descriptor_l2;
IKobayashi 0:c88c3b616c00 796 for (i = 0; i < count; i++ )
IKobayashi 0:c88c3b616c00 797 {
IKobayashi 0:c88c3b616c00 798 //4 bytes aligned
IKobayashi 0:c88c3b616c00 799 *ttb_l2++ = entry2;
IKobayashi 0:c88c3b616c00 800 entry2 += OFFSET_4K;
IKobayashi 0:c88c3b616c00 801 }
IKobayashi 0:c88c3b616c00 802 }
IKobayashi 0:c88c3b616c00 803
IKobayashi 0:c88c3b616c00 804 /** \brief Create a 64k page entry
IKobayashi 0:c88c3b616c00 805
IKobayashi 0:c88c3b616c00 806 \param [in] ttb L1 table base address
IKobayashi 0:c88c3b616c00 807 \param [in] base_address 64k base address
IKobayashi 0:c88c3b616c00 808 \param [in] count Number of 64k pages to create
IKobayashi 0:c88c3b616c00 809 \param [in] descriptor_l1 L1 descriptor (region attributes)
IKobayashi 0:c88c3b616c00 810 \param [in] ttb_l2 L2 table base address
IKobayashi 0:c88c3b616c00 811 \param [in] descriptor_l2 L2 descriptor (region attributes)
IKobayashi 0:c88c3b616c00 812
IKobayashi 0:c88c3b616c00 813 */
IKobayashi 0:c88c3b616c00 814 __STATIC_INLINE void __TTPage_64k(uint32_t *ttb, uint32_t base_address, uint32_t count, uint32_t descriptor_l1, uint32_t *ttb_l2, uint32_t descriptor_l2 )
IKobayashi 0:c88c3b616c00 815 {
IKobayashi 0:c88c3b616c00 816 uint32_t offset, offset2;
IKobayashi 0:c88c3b616c00 817 uint32_t entry, entry2;
IKobayashi 0:c88c3b616c00 818 uint32_t i,j;
IKobayashi 0:c88c3b616c00 819
IKobayashi 0:c88c3b616c00 820
IKobayashi 0:c88c3b616c00 821 offset = base_address >> 20;
IKobayashi 0:c88c3b616c00 822 entry = ((int)ttb_l2 & 0xFFFFFC00) | descriptor_l1;
IKobayashi 0:c88c3b616c00 823
IKobayashi 0:c88c3b616c00 824 //4 bytes aligned
IKobayashi 0:c88c3b616c00 825 ttb += offset;
IKobayashi 0:c88c3b616c00 826 //create l1_entry
IKobayashi 0:c88c3b616c00 827 *ttb = entry;
IKobayashi 0:c88c3b616c00 828
IKobayashi 0:c88c3b616c00 829 offset2 = (base_address & 0xff000) >> 12;
IKobayashi 0:c88c3b616c00 830 ttb_l2 += offset2;
IKobayashi 0:c88c3b616c00 831 entry2 = (base_address & 0xFFFF0000) | descriptor_l2;
IKobayashi 0:c88c3b616c00 832 for (i = 0; i < count; i++ )
IKobayashi 0:c88c3b616c00 833 {
IKobayashi 0:c88c3b616c00 834 //create 16 entries
IKobayashi 0:c88c3b616c00 835 for (j = 0; j < 16; j++)
IKobayashi 0:c88c3b616c00 836 //4 bytes aligned
IKobayashi 0:c88c3b616c00 837 *ttb_l2++ = entry2;
IKobayashi 0:c88c3b616c00 838 entry2 += OFFSET_64K;
IKobayashi 0:c88c3b616c00 839 }
IKobayashi 0:c88c3b616c00 840 }
IKobayashi 0:c88c3b616c00 841
IKobayashi 0:c88c3b616c00 842 /*@} end of MMU_Functions */
IKobayashi 0:c88c3b616c00 843 #endif
IKobayashi 0:c88c3b616c00 844
IKobayashi 0:c88c3b616c00 845 #ifdef __cplusplus
IKobayashi 0:c88c3b616c00 846 }
IKobayashi 0:c88c3b616c00 847 #endif