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mbed/TARGET_LPC1768/core_ca9.h@0:c88c3b616c00, 2020-03-16 (annotated)

Committer:
IKobayashi
Date:
Mon Mar 16 23:37:42 2020 +0900
Revision:
0:c88c3b616c00
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IKobayashi 0:c88c3b616c00 1 /**************************************************************************//**
IKobayashi 0:c88c3b616c00 2 * @file core_ca9.h
IKobayashi 0:c88c3b616c00 3 * @brief CMSIS Cortex-A9 Core Peripheral Access Layer Header File
IKobayashi 0:c88c3b616c00 4 * @version
IKobayashi 0:c88c3b616c00 5 * @date 25 March 2013
IKobayashi 0:c88c3b616c00 6 *
IKobayashi 0:c88c3b616c00 7 * @note
IKobayashi 0:c88c3b616c00 8 *
IKobayashi 0:c88c3b616c00 9 ******************************************************************************/
IKobayashi 0:c88c3b616c00 10 /* Copyright (c) 2009 - 2012 ARM LIMITED
IKobayashi 0:c88c3b616c00 11
IKobayashi 0:c88c3b616c00 12 All rights reserved.
IKobayashi 0:c88c3b616c00 13 Redistribution and use in source and binary forms, with or without
IKobayashi 0:c88c3b616c00 14 modification, are permitted provided that the following conditions are met:
IKobayashi 0:c88c3b616c00 15 - Redistributions of source code must retain the above copyright
IKobayashi 0:c88c3b616c00 16 notice, this list of conditions and the following disclaimer.
IKobayashi 0:c88c3b616c00 17 - Redistributions in binary form must reproduce the above copyright
IKobayashi 0:c88c3b616c00 18 notice, this list of conditions and the following disclaimer in the
IKobayashi 0:c88c3b616c00 19 documentation and/or other materials provided with the distribution.
IKobayashi 0:c88c3b616c00 20 - Neither the name of ARM nor the names of its contributors may be used
IKobayashi 0:c88c3b616c00 21 to endorse or promote products derived from this software without
IKobayashi 0:c88c3b616c00 22 specific prior written permission.
IKobayashi 0:c88c3b616c00 23 *
IKobayashi 0:c88c3b616c00 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
IKobayashi 0:c88c3b616c00 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
IKobayashi 0:c88c3b616c00 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
IKobayashi 0:c88c3b616c00 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
IKobayashi 0:c88c3b616c00 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
IKobayashi 0:c88c3b616c00 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
IKobayashi 0:c88c3b616c00 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
IKobayashi 0:c88c3b616c00 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
IKobayashi 0:c88c3b616c00 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
IKobayashi 0:c88c3b616c00 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
IKobayashi 0:c88c3b616c00 34 POSSIBILITY OF SUCH DAMAGE.
IKobayashi 0:c88c3b616c00 35 ---------------------------------------------------------------------------*/
IKobayashi 0:c88c3b616c00 36
IKobayashi 0:c88c3b616c00 37
IKobayashi 0:c88c3b616c00 38 #if defined ( __ICCARM__ )
IKobayashi 0:c88c3b616c00 39 #pragma system_include /* treat file as system include file for MISRA check */
IKobayashi 0:c88c3b616c00 40 #endif
IKobayashi 0:c88c3b616c00 41
IKobayashi 0:c88c3b616c00 42 #ifdef __cplusplus
IKobayashi 0:c88c3b616c00 43 extern "C" {
IKobayashi 0:c88c3b616c00 44 #endif
IKobayashi 0:c88c3b616c00 45
IKobayashi 0:c88c3b616c00 46 #ifndef __CORE_CA9_H_GENERIC
IKobayashi 0:c88c3b616c00 47 #define __CORE_CA9_H_GENERIC
IKobayashi 0:c88c3b616c00 48
IKobayashi 0:c88c3b616c00 49
IKobayashi 0:c88c3b616c00 50 /** \page CMSIS_MISRA_Exceptions MISRA-C:2004 Compliance Exceptions
IKobayashi 0:c88c3b616c00 51 CMSIS violates the following MISRA-C:2004 rules:
IKobayashi 0:c88c3b616c00 52
IKobayashi 0:c88c3b616c00 53 \li Required Rule 8.5, object/function definition in header file.<br>
IKobayashi 0:c88c3b616c00 54 Function definitions in header files are used to allow 'inlining'.
IKobayashi 0:c88c3b616c00 55
IKobayashi 0:c88c3b616c00 56 \li Required Rule 18.4, declaration of union type or object of union type: '{...}'.<br>
IKobayashi 0:c88c3b616c00 57 Unions are used for effective representation of core registers.
IKobayashi 0:c88c3b616c00 58
IKobayashi 0:c88c3b616c00 59 \li Advisory Rule 19.7, Function-like macro defined.<br>
IKobayashi 0:c88c3b616c00 60 Function-like macros are used to allow more efficient code.
IKobayashi 0:c88c3b616c00 61 */
IKobayashi 0:c88c3b616c00 62
IKobayashi 0:c88c3b616c00 63
IKobayashi 0:c88c3b616c00 64 /*******************************************************************************
IKobayashi 0:c88c3b616c00 65 * CMSIS definitions
IKobayashi 0:c88c3b616c00 66 ******************************************************************************/
IKobayashi 0:c88c3b616c00 67 /** \ingroup Cortex_A9
IKobayashi 0:c88c3b616c00 68 @{
IKobayashi 0:c88c3b616c00 69 */
IKobayashi 0:c88c3b616c00 70
IKobayashi 0:c88c3b616c00 71 /* CMSIS CA9 definitions */
IKobayashi 0:c88c3b616c00 72 #define __CA9_CMSIS_VERSION_MAIN (0x03) /*!< [31:16] CMSIS HAL main version */
IKobayashi 0:c88c3b616c00 73 #define __CA9_CMSIS_VERSION_SUB (0x10) /*!< [15:0] CMSIS HAL sub version */
IKobayashi 0:c88c3b616c00 74 #define __CA9_CMSIS_VERSION ((__CA9_CMSIS_VERSION_MAIN << 16) | \
IKobayashi 0:c88c3b616c00 75 __CA9_CMSIS_VERSION_SUB ) /*!< CMSIS HAL version number */
IKobayashi 0:c88c3b616c00 76
IKobayashi 0:c88c3b616c00 77 #define __CORTEX_A (0x09) /*!< Cortex-A Core */
IKobayashi 0:c88c3b616c00 78
IKobayashi 0:c88c3b616c00 79
IKobayashi 0:c88c3b616c00 80 #if defined ( __CC_ARM )
IKobayashi 0:c88c3b616c00 81 #define __ASM __asm /*!< asm keyword for ARM Compiler */
IKobayashi 0:c88c3b616c00 82 #define __INLINE __inline /*!< inline keyword for ARM Compiler */
IKobayashi 0:c88c3b616c00 83 #define __STATIC_INLINE static __inline
IKobayashi 0:c88c3b616c00 84 #define __STATIC_ASM static __asm
IKobayashi 0:c88c3b616c00 85
IKobayashi 0:c88c3b616c00 86 #elif defined ( __ICCARM__ )
IKobayashi 0:c88c3b616c00 87 #define __ASM __asm /*!< asm keyword for IAR Compiler */
IKobayashi 0:c88c3b616c00 88 #define __INLINE inline /*!< inline keyword for IAR Compiler. Only available in High optimization mode! */
IKobayashi 0:c88c3b616c00 89 #define __STATIC_INLINE static inline
IKobayashi 0:c88c3b616c00 90 #define __STATIC_ASM static __asm
IKobayashi 0:c88c3b616c00 91
IKobayashi 0:c88c3b616c00 92 #include <stdint.h>
IKobayashi 0:c88c3b616c00 93 inline uint32_t __get_PSR(void) {
IKobayashi 0:c88c3b616c00 94 __ASM("mrs r0, cpsr");
IKobayashi 0:c88c3b616c00 95 }
IKobayashi 0:c88c3b616c00 96
IKobayashi 0:c88c3b616c00 97 #elif defined ( __TMS470__ )
IKobayashi 0:c88c3b616c00 98 #define __ASM __asm /*!< asm keyword for TI CCS Compiler */
IKobayashi 0:c88c3b616c00 99 #define __STATIC_INLINE static inline
IKobayashi 0:c88c3b616c00 100 #define __STATIC_ASM static __asm
IKobayashi 0:c88c3b616c00 101
IKobayashi 0:c88c3b616c00 102 #elif defined ( __GNUC__ )
IKobayashi 0:c88c3b616c00 103 #define __ASM __asm /*!< asm keyword for GNU Compiler */
IKobayashi 0:c88c3b616c00 104 #define __INLINE inline /*!< inline keyword for GNU Compiler */
IKobayashi 0:c88c3b616c00 105 #define __STATIC_INLINE static inline
IKobayashi 0:c88c3b616c00 106 #define __STATIC_ASM static __asm
IKobayashi 0:c88c3b616c00 107
IKobayashi 0:c88c3b616c00 108 #elif defined ( __TASKING__ )
IKobayashi 0:c88c3b616c00 109 #define __ASM __asm /*!< asm keyword for TASKING Compiler */
IKobayashi 0:c88c3b616c00 110 #define __INLINE inline /*!< inline keyword for TASKING Compiler */
IKobayashi 0:c88c3b616c00 111 #define __STATIC_INLINE static inline
IKobayashi 0:c88c3b616c00 112 #define __STATIC_ASM static __asm
IKobayashi 0:c88c3b616c00 113
IKobayashi 0:c88c3b616c00 114 #endif
IKobayashi 0:c88c3b616c00 115
IKobayashi 0:c88c3b616c00 116 /** __FPU_USED indicates whether an FPU is used or not. For this, __FPU_PRESENT has to be checked prior to making use of FPU specific registers and functions.
IKobayashi 0:c88c3b616c00 117 */
IKobayashi 0:c88c3b616c00 118 #if defined ( __CC_ARM )
IKobayashi 0:c88c3b616c00 119 #if defined __TARGET_FPU_VFP
IKobayashi 0:c88c3b616c00 120 #if (__FPU_PRESENT == 1)
IKobayashi 0:c88c3b616c00 121 #define __FPU_USED 1
IKobayashi 0:c88c3b616c00 122 #else
IKobayashi 0:c88c3b616c00 123 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
IKobayashi 0:c88c3b616c00 124 #define __FPU_USED 0
IKobayashi 0:c88c3b616c00 125 #endif
IKobayashi 0:c88c3b616c00 126 #else
IKobayashi 0:c88c3b616c00 127 #define __FPU_USED 0
IKobayashi 0:c88c3b616c00 128 #endif
IKobayashi 0:c88c3b616c00 129
IKobayashi 0:c88c3b616c00 130 #elif defined ( __ICCARM__ )
IKobayashi 0:c88c3b616c00 131 #if defined __ARMVFP__
IKobayashi 0:c88c3b616c00 132 #if (__FPU_PRESENT == 1)
IKobayashi 0:c88c3b616c00 133 #define __FPU_USED 1
IKobayashi 0:c88c3b616c00 134 #else
IKobayashi 0:c88c3b616c00 135 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
IKobayashi 0:c88c3b616c00 136 #define __FPU_USED 0
IKobayashi 0:c88c3b616c00 137 #endif
IKobayashi 0:c88c3b616c00 138 #else
IKobayashi 0:c88c3b616c00 139 #define __FPU_USED 0
IKobayashi 0:c88c3b616c00 140 #endif
IKobayashi 0:c88c3b616c00 141
IKobayashi 0:c88c3b616c00 142 #elif defined ( __TMS470__ )
IKobayashi 0:c88c3b616c00 143 #if defined __TI_VFP_SUPPORT__
IKobayashi 0:c88c3b616c00 144 #if (__FPU_PRESENT == 1)
IKobayashi 0:c88c3b616c00 145 #define __FPU_USED 1
IKobayashi 0:c88c3b616c00 146 #else
IKobayashi 0:c88c3b616c00 147 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
IKobayashi 0:c88c3b616c00 148 #define __FPU_USED 0
IKobayashi 0:c88c3b616c00 149 #endif
IKobayashi 0:c88c3b616c00 150 #else
IKobayashi 0:c88c3b616c00 151 #define __FPU_USED 0
IKobayashi 0:c88c3b616c00 152 #endif
IKobayashi 0:c88c3b616c00 153
IKobayashi 0:c88c3b616c00 154 #elif defined ( __GNUC__ )
IKobayashi 0:c88c3b616c00 155 #if defined (__VFP_FP__) && !defined(__SOFTFP__)
IKobayashi 0:c88c3b616c00 156 #if (__FPU_PRESENT == 1)
IKobayashi 0:c88c3b616c00 157 #define __FPU_USED 1
IKobayashi 0:c88c3b616c00 158 #else
IKobayashi 0:c88c3b616c00 159 #warning "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
IKobayashi 0:c88c3b616c00 160 #define __FPU_USED 0
IKobayashi 0:c88c3b616c00 161 #endif
IKobayashi 0:c88c3b616c00 162 #else
IKobayashi 0:c88c3b616c00 163 #define __FPU_USED 0
IKobayashi 0:c88c3b616c00 164 #endif
IKobayashi 0:c88c3b616c00 165
IKobayashi 0:c88c3b616c00 166 #elif defined ( __TASKING__ )
IKobayashi 0:c88c3b616c00 167 #if defined __FPU_VFP__
IKobayashi 0:c88c3b616c00 168 #if (__FPU_PRESENT == 1)
IKobayashi 0:c88c3b616c00 169 #define __FPU_USED 1
IKobayashi 0:c88c3b616c00 170 #else
IKobayashi 0:c88c3b616c00 171 #error "Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)"
IKobayashi 0:c88c3b616c00 172 #define __FPU_USED 0
IKobayashi 0:c88c3b616c00 173 #endif
IKobayashi 0:c88c3b616c00 174 #else
IKobayashi 0:c88c3b616c00 175 #define __FPU_USED 0
IKobayashi 0:c88c3b616c00 176 #endif
IKobayashi 0:c88c3b616c00 177 #endif
IKobayashi 0:c88c3b616c00 178
IKobayashi 0:c88c3b616c00 179 #include <stdint.h> /*!< standard types definitions */
IKobayashi 0:c88c3b616c00 180 #include "core_caInstr.h" /*!< Core Instruction Access */
IKobayashi 0:c88c3b616c00 181 #include "core_caFunc.h" /*!< Core Function Access */
IKobayashi 0:c88c3b616c00 182 #include "core_cm4_simd.h" /*!< Compiler specific SIMD Intrinsics */
IKobayashi 0:c88c3b616c00 183
IKobayashi 0:c88c3b616c00 184 #endif /* __CORE_CA9_H_GENERIC */
IKobayashi 0:c88c3b616c00 185
IKobayashi 0:c88c3b616c00 186 #ifndef __CMSIS_GENERIC
IKobayashi 0:c88c3b616c00 187
IKobayashi 0:c88c3b616c00 188 #ifndef __CORE_CA9_H_DEPENDANT
IKobayashi 0:c88c3b616c00 189 #define __CORE_CA9_H_DEPENDANT
IKobayashi 0:c88c3b616c00 190
IKobayashi 0:c88c3b616c00 191 /* check device defines and use defaults */
IKobayashi 0:c88c3b616c00 192 #if defined __CHECK_DEVICE_DEFINES
IKobayashi 0:c88c3b616c00 193 #ifndef __CA9_REV
IKobayashi 0:c88c3b616c00 194 #define __CA9_REV 0x0000
IKobayashi 0:c88c3b616c00 195 #warning "__CA9_REV not defined in device header file; using default!"
IKobayashi 0:c88c3b616c00 196 #endif
IKobayashi 0:c88c3b616c00 197
IKobayashi 0:c88c3b616c00 198 #ifndef __FPU_PRESENT
IKobayashi 0:c88c3b616c00 199 #define __FPU_PRESENT 1
IKobayashi 0:c88c3b616c00 200 #warning "__FPU_PRESENT not defined in device header file; using default!"
IKobayashi 0:c88c3b616c00 201 #endif
IKobayashi 0:c88c3b616c00 202
IKobayashi 0:c88c3b616c00 203 #ifndef __Vendor_SysTickConfig
IKobayashi 0:c88c3b616c00 204 #define __Vendor_SysTickConfig 1
IKobayashi 0:c88c3b616c00 205 #endif
IKobayashi 0:c88c3b616c00 206
IKobayashi 0:c88c3b616c00 207 #if __Vendor_SysTickConfig == 0
IKobayashi 0:c88c3b616c00 208 #error "__Vendor_SysTickConfig set to 0, but vendor systick timer must be supplied for Cortex-A9"
IKobayashi 0:c88c3b616c00 209 #endif
IKobayashi 0:c88c3b616c00 210 #endif
IKobayashi 0:c88c3b616c00 211
IKobayashi 0:c88c3b616c00 212 /* IO definitions (access restrictions to peripheral registers) */
IKobayashi 0:c88c3b616c00 213 /**
IKobayashi 0:c88c3b616c00 214 \defgroup CMSIS_glob_defs CMSIS Global Defines
IKobayashi 0:c88c3b616c00 215
IKobayashi 0:c88c3b616c00 216 <strong>IO Type Qualifiers</strong> are used
IKobayashi 0:c88c3b616c00 217 \li to specify the access to peripheral variables.
IKobayashi 0:c88c3b616c00 218 \li for automatic generation of peripheral register debug information.
IKobayashi 0:c88c3b616c00 219 */
IKobayashi 0:c88c3b616c00 220 #ifdef __cplusplus
IKobayashi 0:c88c3b616c00 221 #define __I volatile /*!< Defines 'read only' permissions */
IKobayashi 0:c88c3b616c00 222 #else
IKobayashi 0:c88c3b616c00 223 #define __I volatile const /*!< Defines 'read only' permissions */
IKobayashi 0:c88c3b616c00 224 #endif
IKobayashi 0:c88c3b616c00 225 #define __O volatile /*!< Defines 'write only' permissions */
IKobayashi 0:c88c3b616c00 226 #define __IO volatile /*!< Defines 'read / write' permissions */
IKobayashi 0:c88c3b616c00 227
IKobayashi 0:c88c3b616c00 228 /*@} end of group Cortex_A9 */
IKobayashi 0:c88c3b616c00 229
IKobayashi 0:c88c3b616c00 230
IKobayashi 0:c88c3b616c00 231 /*******************************************************************************
IKobayashi 0:c88c3b616c00 232 * Register Abstraction
IKobayashi 0:c88c3b616c00 233 ******************************************************************************/
IKobayashi 0:c88c3b616c00 234 /** \defgroup CMSIS_core_register Defines and Type Definitions
IKobayashi 0:c88c3b616c00 235 \brief Type definitions and defines for Cortex-A processor based devices.
IKobayashi 0:c88c3b616c00 236 */
IKobayashi 0:c88c3b616c00 237
IKobayashi 0:c88c3b616c00 238 /** \ingroup CMSIS_core_register
IKobayashi 0:c88c3b616c00 239 \defgroup CMSIS_CORE Status and Control Registers
IKobayashi 0:c88c3b616c00 240 \brief Core Register type definitions.
IKobayashi 0:c88c3b616c00 241 @{
IKobayashi 0:c88c3b616c00 242 */
IKobayashi 0:c88c3b616c00 243
IKobayashi 0:c88c3b616c00 244 /** \brief Union type to access the Application Program Status Register (APSR).
IKobayashi 0:c88c3b616c00 245 */
IKobayashi 0:c88c3b616c00 246 typedef union
IKobayashi 0:c88c3b616c00 247 {
IKobayashi 0:c88c3b616c00 248 struct
IKobayashi 0:c88c3b616c00 249 {
IKobayashi 0:c88c3b616c00 250 uint32_t _reserved0:16; /*!< bit: 0..15 Reserved */
IKobayashi 0:c88c3b616c00 251 uint32_t GE:4; /*!< bit: 16..19 Greater than or Equal flags */
IKobayashi 0:c88c3b616c00 252 uint32_t reserved1:7; /*!< bit: 20..23 Reserved */
IKobayashi 0:c88c3b616c00 253 uint32_t Q:1; /*!< bit: 27 Saturation condition flag */
IKobayashi 0:c88c3b616c00 254 uint32_t V:1; /*!< bit: 28 Overflow condition code flag */
IKobayashi 0:c88c3b616c00 255 uint32_t C:1; /*!< bit: 29 Carry condition code flag */
IKobayashi 0:c88c3b616c00 256 uint32_t Z:1; /*!< bit: 30 Zero condition code flag */
IKobayashi 0:c88c3b616c00 257 uint32_t N:1; /*!< bit: 31 Negative condition code flag */
IKobayashi 0:c88c3b616c00 258 } b; /*!< Structure used for bit access */
IKobayashi 0:c88c3b616c00 259 uint32_t w; /*!< Type used for word access */
IKobayashi 0:c88c3b616c00 260 } APSR_Type;
IKobayashi 0:c88c3b616c00 261
IKobayashi 0:c88c3b616c00 262
IKobayashi 0:c88c3b616c00 263 /*@} end of group CMSIS_CORE */
IKobayashi 0:c88c3b616c00 264
IKobayashi 0:c88c3b616c00 265 /*@} end of CMSIS_Core_FPUFunctions */
IKobayashi 0:c88c3b616c00 266
IKobayashi 0:c88c3b616c00 267
IKobayashi 0:c88c3b616c00 268 #endif /* __CORE_CA9_H_GENERIC */
IKobayashi 0:c88c3b616c00 269
IKobayashi 0:c88c3b616c00 270 #endif /* __CMSIS_GENERIC */
IKobayashi 0:c88c3b616c00 271
IKobayashi 0:c88c3b616c00 272 #ifdef __cplusplus
IKobayashi 0:c88c3b616c00 273 }
IKobayashi 0:c88c3b616c00 274
IKobayashi 0:c88c3b616c00 275
IKobayashi 0:c88c3b616c00 276 #endif