Helmut Tschemernjak / USBDeviceHT

A copy of the mbed USBDevice with USBSerial library

Dependents:   STM32L0_LoRa Smartage STM32L0_LoRa Turtle_RadioShuttle

targets/TARGET_STM/USBHAL_STM32F4.cpp@7:8a5cc0d9bfa2, 2019-01-31 (annotated)

Committer:
Helmut Tschemernjak
Date:
Thu Jan 31 20:56:55 2019 +0100
Revision:
7:8a5cc0d9bfa2
Parent:
2:195554780c9b 
fixed compiler warnings

Who changed what in which revision?

UserRevisionLine numberNew contents of line
Helmut Tschemernjak 2:195554780c9b 1 #include "mbed.h"
Helmut Tschemernjak 2:195554780c9b 2 #include "PinMap.h"
Helmut Tschemernjak 2:195554780c9b 3
Helmut Tschemernjak 2:195554780c9b 4 #ifdef FEATURE_USBSERIAL
Helmut Tschemernjak 2:195554780c9b 5
Helmut64 0:a3ea811f80f2 6 /* Copyright (c) 2010-2011 mbed.org, MIT License
Helmut64 0:a3ea811f80f2 7 *
Helmut64 0:a3ea811f80f2 8 * Permission is hereby granted, free of charge, to any person obtaining a copy of this software
Helmut64 0:a3ea811f80f2 9 * and associated documentation files (the "Software"), to deal in the Software without
Helmut64 0:a3ea811f80f2 10 * restriction, including without limitation the rights to use, copy, modify, merge, publish,
Helmut64 0:a3ea811f80f2 11 * distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
Helmut64 0:a3ea811f80f2 12 * Software is furnished to do so, subject to the following conditions:
Helmut64 0:a3ea811f80f2 13 *
Helmut64 0:a3ea811f80f2 14 * The above copyright notice and this permission notice shall be included in all copies or
Helmut64 0:a3ea811f80f2 15 * substantial portions of the Software.
Helmut64 0:a3ea811f80f2 16 *
Helmut64 0:a3ea811f80f2 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
Helmut64 0:a3ea811f80f2 18 * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
Helmut64 0:a3ea811f80f2 19 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
Helmut64 0:a3ea811f80f2 20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
Helmut64 0:a3ea811f80f2 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
Helmut64 0:a3ea811f80f2 22 */
Helmut64 0:a3ea811f80f2 23
Helmut64 0:a3ea811f80f2 24 #if defined(TARGET_STM32F4) && !defined(USB_STM_HAL)
Helmut64 0:a3ea811f80f2 25
Helmut64 0:a3ea811f80f2 26 #include "USBHAL.h"
Helmut64 0:a3ea811f80f2 27 #include "USBRegs_STM32.h"
Helmut64 0:a3ea811f80f2 28 #include "pinmap.h"
Helmut64 0:a3ea811f80f2 29
Helmut64 0:a3ea811f80f2 30 USBHAL * USBHAL::instance;
Helmut64 0:a3ea811f80f2 31
Helmut64 0:a3ea811f80f2 32 static volatile int epComplete = 0;
Helmut64 0:a3ea811f80f2 33
Helmut64 0:a3ea811f80f2 34 static uint32_t bufferEnd = 0;
Helmut64 0:a3ea811f80f2 35 static const uint32_t rxFifoSize = 512;
Helmut64 0:a3ea811f80f2 36 static uint32_t rxFifoCount = 0;
Helmut64 0:a3ea811f80f2 37
Helmut64 0:a3ea811f80f2 38 static uint32_t setupBuffer[MAX_PACKET_SIZE_EP0 >> 2];
Helmut64 0:a3ea811f80f2 39
Helmut64 0:a3ea811f80f2 40 uint32_t USBHAL::endpointReadcore(uint8_t endpoint, uint8_t *buffer) {
Helmut64 0:a3ea811f80f2 41 return 0;
Helmut64 0:a3ea811f80f2 42 }
Helmut64 0:a3ea811f80f2 43
Helmut64 0:a3ea811f80f2 44 USBHAL::USBHAL(void) {
Helmut64 0:a3ea811f80f2 45 NVIC_DisableIRQ(OTG_FS_IRQn);
Helmut64 0:a3ea811f80f2 46 epCallback[0] = &USBHAL::EP1_OUT_callback;
Helmut64 0:a3ea811f80f2 47 epCallback[1] = &USBHAL::EP1_IN_callback;
Helmut64 0:a3ea811f80f2 48 epCallback[2] = &USBHAL::EP2_OUT_callback;
Helmut64 0:a3ea811f80f2 49 epCallback[3] = &USBHAL::EP2_IN_callback;
Helmut64 0:a3ea811f80f2 50 epCallback[4] = &USBHAL::EP3_OUT_callback;
Helmut64 0:a3ea811f80f2 51 epCallback[5] = &USBHAL::EP3_IN_callback;
Helmut64 0:a3ea811f80f2 52
Helmut64 0:a3ea811f80f2 53 // Enable power and clocking
Helmut64 0:a3ea811f80f2 54 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOAEN;
Helmut64 0:a3ea811f80f2 55
Helmut64 0:a3ea811f80f2 56 #if defined(TARGET_STM32F407VG) || defined(TARGET_STM32F401RE) || defined(TARGET_STM32F411RE) || defined(TARGET_STM32F412ZG) || defined(TARGET_STM32F429ZI)
Helmut64 0:a3ea811f80f2 57 pin_function(PA_8, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS));
Helmut64 0:a3ea811f80f2 58 pin_function(PA_9, STM_PIN_DATA(STM_MODE_INPUT, GPIO_PULLDOWN, GPIO_AF10_OTG_FS));
Helmut64 0:a3ea811f80f2 59 pin_function(PA_10, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS));
Helmut64 0:a3ea811f80f2 60 pin_function(PA_11, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS));
Helmut64 0:a3ea811f80f2 61 pin_function(PA_12, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF10_OTG_FS));
Helmut64 0:a3ea811f80f2 62 #else
Helmut64 0:a3ea811f80f2 63 pin_function(PA_8, STM_PIN_DATA(2, 10));
Helmut64 0:a3ea811f80f2 64 pin_function(PA_9, STM_PIN_DATA(0, 0));
Helmut64 0:a3ea811f80f2 65 pin_function(PA_10, STM_PIN_DATA(2, 10));
Helmut64 0:a3ea811f80f2 66 pin_function(PA_11, STM_PIN_DATA(2, 10));
Helmut64 0:a3ea811f80f2 67 pin_function(PA_12, STM_PIN_DATA(2, 10));
Helmut64 0:a3ea811f80f2 68
Helmut64 0:a3ea811f80f2 69 // Set ID pin to open drain with pull-up resistor
Helmut64 0:a3ea811f80f2 70 pin_mode(PA_10, OpenDrain);
Helmut64 0:a3ea811f80f2 71 GPIOA->PUPDR &= ~(0x3 << 20);
Helmut64 0:a3ea811f80f2 72 GPIOA->PUPDR |= 1 << 20;
Helmut64 0:a3ea811f80f2 73
Helmut64 0:a3ea811f80f2 74 // Set VBUS pin to open drain
Helmut64 0:a3ea811f80f2 75 pin_mode(PA_9, OpenDrain);
Helmut64 0:a3ea811f80f2 76 #endif
Helmut64 0:a3ea811f80f2 77
Helmut64 0:a3ea811f80f2 78 RCC->AHB2ENR |= RCC_AHB2ENR_OTGFSEN;
Helmut64 0:a3ea811f80f2 79
Helmut64 0:a3ea811f80f2 80 // Enable interrupts
Helmut64 0:a3ea811f80f2 81 OTG_FS->GREGS.GAHBCFG |= (1 << 0);
Helmut64 0:a3ea811f80f2 82
Helmut64 0:a3ea811f80f2 83 // Turnaround time to maximum value - too small causes packet loss
Helmut64 0:a3ea811f80f2 84 OTG_FS->GREGS.GUSBCFG |= (0xF << 10);
Helmut64 0:a3ea811f80f2 85
Helmut64 0:a3ea811f80f2 86 // Unmask global interrupts
Helmut64 0:a3ea811f80f2 87 OTG_FS->GREGS.GINTMSK |= (1 << 3) | // SOF
Helmut64 0:a3ea811f80f2 88 (1 << 4) | // RX FIFO not empty
Helmut64 0:a3ea811f80f2 89 (1 << 12); // USB reset
Helmut64 0:a3ea811f80f2 90
Helmut64 0:a3ea811f80f2 91 OTG_FS->DREGS.DCFG |= (0x3 << 0) | // Full speed
Helmut64 0:a3ea811f80f2 92 (1 << 2); // Non-zero-length status OUT handshake
Helmut64 0:a3ea811f80f2 93
Helmut64 0:a3ea811f80f2 94 OTG_FS->GREGS.GCCFG |= (1 << 19) | // Enable VBUS sensing
Helmut64 0:a3ea811f80f2 95 (1 << 16); // Power Up
Helmut64 0:a3ea811f80f2 96
Helmut64 0:a3ea811f80f2 97 instance = this;
Helmut64 0:a3ea811f80f2 98 NVIC_SetVector(OTG_FS_IRQn, (uint32_t)&_usbisr);
Helmut64 0:a3ea811f80f2 99 NVIC_SetPriority(OTG_FS_IRQn, 1);
Helmut64 0:a3ea811f80f2 100 }
Helmut64 0:a3ea811f80f2 101
Helmut64 0:a3ea811f80f2 102 USBHAL::~USBHAL(void) {
Helmut64 0:a3ea811f80f2 103 }
Helmut64 0:a3ea811f80f2 104
Helmut64 0:a3ea811f80f2 105 void USBHAL::connect(void) {
Helmut64 0:a3ea811f80f2 106 NVIC_EnableIRQ(OTG_FS_IRQn);
Helmut64 0:a3ea811f80f2 107 }
Helmut64 0:a3ea811f80f2 108
Helmut64 0:a3ea811f80f2 109 void USBHAL::disconnect(void) {
Helmut64 0:a3ea811f80f2 110 NVIC_DisableIRQ(OTG_FS_IRQn);
Helmut64 0:a3ea811f80f2 111 }
Helmut64 0:a3ea811f80f2 112
Helmut64 0:a3ea811f80f2 113 void USBHAL::configureDevice(void) {
Helmut64 0:a3ea811f80f2 114 // Not needed
Helmut64 0:a3ea811f80f2 115 }
Helmut64 0:a3ea811f80f2 116
Helmut64 0:a3ea811f80f2 117 void USBHAL::unconfigureDevice(void) {
Helmut64 0:a3ea811f80f2 118 // Not needed
Helmut64 0:a3ea811f80f2 119 }
Helmut64 0:a3ea811f80f2 120
Helmut64 0:a3ea811f80f2 121 void USBHAL::setAddress(uint8_t address) {
Helmut64 0:a3ea811f80f2 122 OTG_FS->DREGS.DCFG |= (address << 4);
Helmut64 0:a3ea811f80f2 123 EP0write(0, 0);
Helmut64 0:a3ea811f80f2 124 }
Helmut64 0:a3ea811f80f2 125
Helmut64 0:a3ea811f80f2 126 bool USBHAL::realiseEndpoint(uint8_t endpoint, uint32_t maxPacket,
Helmut64 0:a3ea811f80f2 127 uint32_t flags) {
Helmut64 0:a3ea811f80f2 128 uint32_t epIndex = endpoint >> 1;
Helmut64 0:a3ea811f80f2 129
Helmut64 0:a3ea811f80f2 130 uint32_t type;
Helmut64 0:a3ea811f80f2 131 switch (endpoint) {
Helmut64 0:a3ea811f80f2 132 case EP0IN:
Helmut64 0:a3ea811f80f2 133 case EP0OUT:
Helmut64 0:a3ea811f80f2 134 type = 0;
Helmut64 0:a3ea811f80f2 135 break;
Helmut64 0:a3ea811f80f2 136 case EPISO_IN:
Helmut64 0:a3ea811f80f2 137 case EPISO_OUT:
Helmut64 0:a3ea811f80f2 138 type = 1;
Helmut64 0:a3ea811f80f2 139 case EPBULK_IN:
Helmut64 0:a3ea811f80f2 140 case EPBULK_OUT:
Helmut64 0:a3ea811f80f2 141 type = 2;
Helmut64 0:a3ea811f80f2 142 break;
Helmut64 0:a3ea811f80f2 143 case EPINT_IN:
Helmut64 0:a3ea811f80f2 144 case EPINT_OUT:
Helmut64 0:a3ea811f80f2 145 type = 3;
Helmut64 0:a3ea811f80f2 146 break;
Helmut64 0:a3ea811f80f2 147 }
Helmut64 0:a3ea811f80f2 148
Helmut64 0:a3ea811f80f2 149 // Generic in or out EP controls
Helmut64 0:a3ea811f80f2 150 uint32_t control = (maxPacket << 0) | // Packet size
Helmut64 0:a3ea811f80f2 151 (1 << 15) | // Active endpoint
Helmut64 0:a3ea811f80f2 152 (type << 18); // Endpoint type
Helmut64 0:a3ea811f80f2 153
Helmut64 0:a3ea811f80f2 154 if (endpoint & 0x1) { // In Endpoint
Helmut64 0:a3ea811f80f2 155 // Set up the Tx FIFO
Helmut64 0:a3ea811f80f2 156 if (endpoint == EP0IN) {
Helmut64 0:a3ea811f80f2 157 OTG_FS->GREGS.DIEPTXF0_HNPTXFSIZ = ((maxPacket >> 2) << 16) |
Helmut64 0:a3ea811f80f2 158 (bufferEnd << 0);
Helmut64 0:a3ea811f80f2 159 }
Helmut64 0:a3ea811f80f2 160 else {
Helmut64 0:a3ea811f80f2 161 OTG_FS->GREGS.DIEPTXF[epIndex - 1] = ((maxPacket >> 2) << 16) |
Helmut64 0:a3ea811f80f2 162 (bufferEnd << 0);
Helmut64 0:a3ea811f80f2 163 }
Helmut64 0:a3ea811f80f2 164 bufferEnd += maxPacket >> 2;
Helmut64 0:a3ea811f80f2 165
Helmut64 0:a3ea811f80f2 166 // Set the In EP specific control settings
Helmut64 0:a3ea811f80f2 167 if (endpoint != EP0IN) {
Helmut64 0:a3ea811f80f2 168 control |= (1 << 28); // SD0PID
Helmut64 0:a3ea811f80f2 169 }
Helmut64 0:a3ea811f80f2 170
Helmut64 0:a3ea811f80f2 171 control |= (epIndex << 22) | // TxFIFO index
Helmut64 0:a3ea811f80f2 172 (1 << 27); // SNAK
Helmut64 0:a3ea811f80f2 173 OTG_FS->INEP_REGS[epIndex].DIEPCTL = control;
Helmut64 0:a3ea811f80f2 174
Helmut64 0:a3ea811f80f2 175 // Unmask the interrupt
Helmut64 0:a3ea811f80f2 176 OTG_FS->DREGS.DAINTMSK |= (1 << epIndex);
Helmut64 0:a3ea811f80f2 177 }
Helmut64 0:a3ea811f80f2 178 else { // Out endpoint
Helmut64 0:a3ea811f80f2 179 // Set the out EP specific control settings
Helmut64 0:a3ea811f80f2 180 control |= (1 << 26); // CNAK
Helmut64 0:a3ea811f80f2 181 OTG_FS->OUTEP_REGS[epIndex].DOEPCTL = control;
Helmut64 0:a3ea811f80f2 182
Helmut64 0:a3ea811f80f2 183 // Unmask the interrupt
Helmut64 0:a3ea811f80f2 184 OTG_FS->DREGS.DAINTMSK |= (1 << (epIndex + 16));
Helmut64 0:a3ea811f80f2 185 }
Helmut64 0:a3ea811f80f2 186 return true;
Helmut64 0:a3ea811f80f2 187 }
Helmut64 0:a3ea811f80f2 188
Helmut64 0:a3ea811f80f2 189 // read setup packet
Helmut64 0:a3ea811f80f2 190 void USBHAL::EP0setup(uint8_t *buffer) {
Helmut64 0:a3ea811f80f2 191 memcpy(buffer, setupBuffer, MAX_PACKET_SIZE_EP0);
Helmut64 0:a3ea811f80f2 192 }
Helmut64 0:a3ea811f80f2 193
Helmut64 0:a3ea811f80f2 194 void USBHAL::EP0readStage(void) {
Helmut64 0:a3ea811f80f2 195 }
Helmut64 0:a3ea811f80f2 196
Helmut64 0:a3ea811f80f2 197 void USBHAL::EP0read(void) {
Helmut64 0:a3ea811f80f2 198 }
Helmut64 0:a3ea811f80f2 199
Helmut64 0:a3ea811f80f2 200 uint32_t USBHAL::EP0getReadResult(uint8_t *buffer) {
Helmut64 0:a3ea811f80f2 201 uint32_t* buffer32 = (uint32_t *) buffer;
Helmut64 0:a3ea811f80f2 202 uint32_t length = rxFifoCount;
Helmut64 0:a3ea811f80f2 203 for (uint32_t i = 0; i < length; i += 4) {
Helmut64 0:a3ea811f80f2 204 buffer32[i >> 2] = OTG_FS->FIFO[0][0];
Helmut64 0:a3ea811f80f2 205 }
Helmut64 0:a3ea811f80f2 206
Helmut64 0:a3ea811f80f2 207 rxFifoCount = 0;
Helmut64 0:a3ea811f80f2 208 return length;
Helmut64 0:a3ea811f80f2 209 }
Helmut64 0:a3ea811f80f2 210
Helmut64 0:a3ea811f80f2 211 void USBHAL::EP0write(uint8_t *buffer, uint32_t size) {
Helmut64 0:a3ea811f80f2 212 endpointWrite(0, buffer, size);
Helmut64 0:a3ea811f80f2 213 }
Helmut64 0:a3ea811f80f2 214
Helmut64 0:a3ea811f80f2 215 void USBHAL::EP0getWriteResult(void) {
Helmut64 0:a3ea811f80f2 216 }
Helmut64 0:a3ea811f80f2 217
Helmut64 0:a3ea811f80f2 218 void USBHAL::EP0stall(void) {
Helmut64 0:a3ea811f80f2 219 // If we stall the out endpoint here then we have problems transferring
Helmut64 0:a3ea811f80f2 220 // and setup requests after the (stalled) get device qualifier requests.
Helmut64 0:a3ea811f80f2 221 // TODO: Find out if this is correct behavior, or whether we are doing
Helmut64 0:a3ea811f80f2 222 // something else wrong
Helmut64 0:a3ea811f80f2 223 stallEndpoint(EP0IN);
Helmut64 0:a3ea811f80f2 224 // stallEndpoint(EP0OUT);
Helmut64 0:a3ea811f80f2 225 }
Helmut64 0:a3ea811f80f2 226
Helmut64 0:a3ea811f80f2 227 EP_STATUS USBHAL::endpointRead(uint8_t endpoint, uint32_t maximumSize) {
Helmut64 0:a3ea811f80f2 228 uint32_t epIndex = endpoint >> 1;
Helmut64 0:a3ea811f80f2 229 uint32_t size = (1 << 19) | // 1 packet
Helmut64 0:a3ea811f80f2 230 (maximumSize << 0); // Packet size
Helmut64 0:a3ea811f80f2 231 // if (endpoint == EP0OUT) {
Helmut64 0:a3ea811f80f2 232 size |= (1 << 29); // 1 setup packet
Helmut64 0:a3ea811f80f2 233 // }
Helmut64 0:a3ea811f80f2 234 OTG_FS->OUTEP_REGS[epIndex].DOEPTSIZ = size;
Helmut64 0:a3ea811f80f2 235 OTG_FS->OUTEP_REGS[epIndex].DOEPCTL |= (1 << 31) | // Enable endpoint
Helmut64 0:a3ea811f80f2 236 (1 << 26); // Clear NAK
Helmut64 0:a3ea811f80f2 237
Helmut64 0:a3ea811f80f2 238 epComplete &= ~(1 << endpoint);
Helmut64 0:a3ea811f80f2 239 return EP_PENDING;
Helmut64 0:a3ea811f80f2 240 }
Helmut64 0:a3ea811f80f2 241
Helmut64 0:a3ea811f80f2 242 EP_STATUS USBHAL::endpointReadResult(uint8_t endpoint, uint8_t * buffer, uint32_t *bytesRead) {
Helmut64 0:a3ea811f80f2 243 if (!(epComplete & (1 << endpoint))) {
Helmut64 0:a3ea811f80f2 244 return EP_PENDING;
Helmut64 0:a3ea811f80f2 245 }
Helmut64 0:a3ea811f80f2 246
Helmut64 0:a3ea811f80f2 247 uint32_t* buffer32 = (uint32_t *) buffer;
Helmut64 0:a3ea811f80f2 248 uint32_t length = rxFifoCount;
Helmut64 0:a3ea811f80f2 249 for (uint32_t i = 0; i < length; i += 4) {
Helmut64 0:a3ea811f80f2 250 buffer32[i >> 2] = OTG_FS->FIFO[endpoint >> 1][0];
Helmut64 0:a3ea811f80f2 251 }
Helmut64 0:a3ea811f80f2 252 rxFifoCount = 0;
Helmut64 0:a3ea811f80f2 253 *bytesRead = length;
Helmut64 0:a3ea811f80f2 254 return EP_COMPLETED;
Helmut64 0:a3ea811f80f2 255 }
Helmut64 0:a3ea811f80f2 256
Helmut64 0:a3ea811f80f2 257 EP_STATUS USBHAL::endpointWrite(uint8_t endpoint, uint8_t *data, uint32_t size) {
Helmut64 0:a3ea811f80f2 258 uint32_t epIndex = endpoint >> 1;
Helmut64 0:a3ea811f80f2 259 OTG_FS->INEP_REGS[epIndex].DIEPTSIZ = (1 << 19) | // 1 packet
Helmut64 0:a3ea811f80f2 260 (size << 0); // Size of packet
Helmut64 0:a3ea811f80f2 261 OTG_FS->INEP_REGS[epIndex].DIEPCTL |= (1 << 31) | // Enable endpoint
Helmut64 0:a3ea811f80f2 262 (1 << 26); // CNAK
Helmut64 0:a3ea811f80f2 263 OTG_FS->DREGS.DIEPEMPMSK = (1 << epIndex);
Helmut64 0:a3ea811f80f2 264
Helmut64 0:a3ea811f80f2 265 while ((OTG_FS->INEP_REGS[epIndex].DTXFSTS & 0XFFFF) < ((size + 3) >> 2));
Helmut64 0:a3ea811f80f2 266
Helmut64 0:a3ea811f80f2 267 for (uint32_t i=0; i<(size + 3) >> 2; i++, data+=4) {
Helmut64 0:a3ea811f80f2 268 OTG_FS->FIFO[epIndex][0] = *(uint32_t *)data;
Helmut64 0:a3ea811f80f2 269 }
Helmut64 0:a3ea811f80f2 270
Helmut64 0:a3ea811f80f2 271 epComplete &= ~(1 << endpoint);
Helmut64 0:a3ea811f80f2 272
Helmut64 0:a3ea811f80f2 273 return EP_PENDING;
Helmut64 0:a3ea811f80f2 274 }
Helmut64 0:a3ea811f80f2 275
Helmut64 0:a3ea811f80f2 276 EP_STATUS USBHAL::endpointWriteResult(uint8_t endpoint) {
Helmut64 0:a3ea811f80f2 277 if (epComplete & (1 << endpoint)) {
Helmut64 0:a3ea811f80f2 278 epComplete &= ~(1 << endpoint);
Helmut64 0:a3ea811f80f2 279 return EP_COMPLETED;
Helmut64 0:a3ea811f80f2 280 }
Helmut64 0:a3ea811f80f2 281
Helmut64 0:a3ea811f80f2 282 return EP_PENDING;
Helmut64 0:a3ea811f80f2 283 }
Helmut64 0:a3ea811f80f2 284
Helmut64 0:a3ea811f80f2 285 void USBHAL::stallEndpoint(uint8_t endpoint) {
Helmut64 0:a3ea811f80f2 286 if (endpoint & 0x1) { // In EP
Helmut64 0:a3ea811f80f2 287 OTG_FS->INEP_REGS[endpoint >> 1].DIEPCTL |= (1 << 30) | // Disable
Helmut64 0:a3ea811f80f2 288 (1 << 21); // Stall
Helmut64 0:a3ea811f80f2 289 }
Helmut64 0:a3ea811f80f2 290 else { // Out EP
Helmut64 0:a3ea811f80f2 291 OTG_FS->DREGS.DCTL |= (1 << 9); // Set global out NAK
Helmut64 0:a3ea811f80f2 292 OTG_FS->OUTEP_REGS[endpoint >> 1].DOEPCTL |= (1 << 30) | // Disable
Helmut64 0:a3ea811f80f2 293 (1 << 21); // Stall
Helmut64 0:a3ea811f80f2 294 }
Helmut64 0:a3ea811f80f2 295 }
Helmut64 0:a3ea811f80f2 296
Helmut64 0:a3ea811f80f2 297 void USBHAL::unstallEndpoint(uint8_t endpoint) {
Helmut64 0:a3ea811f80f2 298
Helmut64 0:a3ea811f80f2 299 }
Helmut64 0:a3ea811f80f2 300
Helmut64 0:a3ea811f80f2 301 bool USBHAL::getEndpointStallState(uint8_t endpoint) {
Helmut64 0:a3ea811f80f2 302 return false;
Helmut64 0:a3ea811f80f2 303 }
Helmut64 0:a3ea811f80f2 304
Helmut64 0:a3ea811f80f2 305 void USBHAL::remoteWakeup(void) {
Helmut64 0:a3ea811f80f2 306 }
Helmut64 0:a3ea811f80f2 307
Helmut64 0:a3ea811f80f2 308
Helmut64 0:a3ea811f80f2 309 void USBHAL::_usbisr(void) {
Helmut64 0:a3ea811f80f2 310 instance->usbisr();
Helmut64 0:a3ea811f80f2 311 }
Helmut64 0:a3ea811f80f2 312
Helmut64 0:a3ea811f80f2 313
Helmut64 0:a3ea811f80f2 314 void USBHAL::usbisr(void) {
Helmut64 0:a3ea811f80f2 315 if (OTG_FS->GREGS.GINTSTS & (1 << 11)) { // USB Suspend
Helmut64 0:a3ea811f80f2 316 suspendStateChanged(1);
Helmut64 0:a3ea811f80f2 317 };
Helmut64 0:a3ea811f80f2 318
Helmut64 0:a3ea811f80f2 319 if (OTG_FS->GREGS.GINTSTS & (1 << 12)) { // USB Reset
Helmut64 0:a3ea811f80f2 320 suspendStateChanged(0);
Helmut64 0:a3ea811f80f2 321
Helmut64 0:a3ea811f80f2 322 // Set SNAK bits
Helmut64 0:a3ea811f80f2 323 OTG_FS->OUTEP_REGS[0].DOEPCTL |= (1 << 27);
Helmut64 0:a3ea811f80f2 324 OTG_FS->OUTEP_REGS[1].DOEPCTL |= (1 << 27);
Helmut64 0:a3ea811f80f2 325 OTG_FS->OUTEP_REGS[2].DOEPCTL |= (1 << 27);
Helmut64 0:a3ea811f80f2 326 OTG_FS->OUTEP_REGS[3].DOEPCTL |= (1 << 27);
Helmut64 0:a3ea811f80f2 327
Helmut64 0:a3ea811f80f2 328 OTG_FS->DREGS.DIEPMSK = (1 << 0);
Helmut64 0:a3ea811f80f2 329
Helmut64 0:a3ea811f80f2 330 bufferEnd = 0;
Helmut64 0:a3ea811f80f2 331
Helmut64 0:a3ea811f80f2 332 // Set the receive FIFO size
Helmut64 0:a3ea811f80f2 333 OTG_FS->GREGS.GRXFSIZ = rxFifoSize >> 2;
Helmut64 0:a3ea811f80f2 334 bufferEnd += rxFifoSize >> 2;
Helmut64 0:a3ea811f80f2 335
Helmut64 0:a3ea811f80f2 336 // Create the endpoints, and wait for setup packets on out EP0
Helmut64 0:a3ea811f80f2 337 realiseEndpoint(EP0IN, MAX_PACKET_SIZE_EP0, 0);
Helmut64 0:a3ea811f80f2 338 realiseEndpoint(EP0OUT, MAX_PACKET_SIZE_EP0, 0);
Helmut64 0:a3ea811f80f2 339 endpointRead(EP0OUT, MAX_PACKET_SIZE_EP0);
Helmut64 0:a3ea811f80f2 340
Helmut64 0:a3ea811f80f2 341 OTG_FS->GREGS.GINTSTS = (1 << 12);
Helmut64 0:a3ea811f80f2 342 }
Helmut64 0:a3ea811f80f2 343
Helmut64 0:a3ea811f80f2 344 if (OTG_FS->GREGS.GINTSTS & (1 << 4)) { // RX FIFO not empty
Helmut64 0:a3ea811f80f2 345 uint32_t status = OTG_FS->GREGS.GRXSTSP;
Helmut64 0:a3ea811f80f2 346
Helmut64 0:a3ea811f80f2 347 uint32_t endpoint = (status & 0xF) << 1;
Helmut64 0:a3ea811f80f2 348 uint32_t length = (status >> 4) & 0x7FF;
Helmut64 0:a3ea811f80f2 349 uint32_t type = (status >> 17) & 0xF;
Helmut64 0:a3ea811f80f2 350
Helmut64 0:a3ea811f80f2 351 rxFifoCount = length;
Helmut64 0:a3ea811f80f2 352
Helmut64 0:a3ea811f80f2 353 if (type == 0x6) {
Helmut64 0:a3ea811f80f2 354 // Setup packet
Helmut64 0:a3ea811f80f2 355 for (uint32_t i=0; i<length; i+=4) {
Helmut64 0:a3ea811f80f2 356 setupBuffer[i >> 2] = OTG_FS->FIFO[0][i >> 2];
Helmut64 0:a3ea811f80f2 357 }
Helmut64 0:a3ea811f80f2 358 rxFifoCount = 0;
Helmut64 0:a3ea811f80f2 359 }
Helmut64 0:a3ea811f80f2 360
Helmut64 0:a3ea811f80f2 361 if (type == 0x4) {
Helmut64 0:a3ea811f80f2 362 // Setup complete
Helmut64 0:a3ea811f80f2 363 EP0setupCallback();
Helmut64 0:a3ea811f80f2 364 endpointRead(EP0OUT, MAX_PACKET_SIZE_EP0);
Helmut64 0:a3ea811f80f2 365 }
Helmut64 0:a3ea811f80f2 366
Helmut64 0:a3ea811f80f2 367 if (type == 0x2) {
Helmut64 0:a3ea811f80f2 368 // Out packet
Helmut64 0:a3ea811f80f2 369 if (endpoint == EP0OUT) {
Helmut64 0:a3ea811f80f2 370 EP0out();
Helmut64 0:a3ea811f80f2 371 }
Helmut64 0:a3ea811f80f2 372 else {
Helmut64 0:a3ea811f80f2 373 epComplete |= (1 << endpoint);
Helmut64 0:a3ea811f80f2 374 if ((instance->*(epCallback[endpoint - 2]))()) {
Helmut64 0:a3ea811f80f2 375 epComplete &= ~(1 << endpoint);
Helmut64 0:a3ea811f80f2 376 }
Helmut64 0:a3ea811f80f2 377 }
Helmut64 0:a3ea811f80f2 378 }
Helmut64 0:a3ea811f80f2 379
Helmut64 0:a3ea811f80f2 380 for (uint32_t i=0; i<rxFifoCount; i+=4) {
Helmut64 0:a3ea811f80f2 381 (void) OTG_FS->FIFO[0][0];
Helmut64 0:a3ea811f80f2 382 }
Helmut64 0:a3ea811f80f2 383 OTG_FS->GREGS.GINTSTS = (1 << 4);
Helmut64 0:a3ea811f80f2 384 }
Helmut64 0:a3ea811f80f2 385
Helmut64 0:a3ea811f80f2 386 if (OTG_FS->GREGS.GINTSTS & (1 << 18)) { // In endpoint interrupt
Helmut64 0:a3ea811f80f2 387 // Loop through the in endpoints
Helmut64 0:a3ea811f80f2 388 for (uint32_t i=0; i<4; i++) {
Helmut64 0:a3ea811f80f2 389 if (OTG_FS->DREGS.DAINT & (1 << i)) { // Interrupt is on endpoint
Helmut64 0:a3ea811f80f2 390
Helmut64 0:a3ea811f80f2 391 if (OTG_FS->INEP_REGS[i].DIEPINT & (1 << 7)) {// Tx FIFO empty
Helmut64 0:a3ea811f80f2 392 // If the Tx FIFO is empty on EP0 we need to send a further
Helmut64 0:a3ea811f80f2 393 // packet, so call EP0in()
Helmut64 0:a3ea811f80f2 394 if (i == 0) {
Helmut64 0:a3ea811f80f2 395 EP0in();
Helmut64 0:a3ea811f80f2 396 }
Helmut64 0:a3ea811f80f2 397 // Clear the interrupt
Helmut64 0:a3ea811f80f2 398 OTG_FS->INEP_REGS[i].DIEPINT = (1 << 7);
Helmut64 0:a3ea811f80f2 399 // Stop firing Tx empty interrupts
Helmut64 0:a3ea811f80f2 400 // Will get turned on again if another write is called
Helmut64 0:a3ea811f80f2 401 OTG_FS->DREGS.DIEPEMPMSK &= ~(1 << i);
Helmut64 0:a3ea811f80f2 402 }
Helmut64 0:a3ea811f80f2 403
Helmut64 0:a3ea811f80f2 404 // If the transfer is complete
Helmut64 0:a3ea811f80f2 405 if (OTG_FS->INEP_REGS[i].DIEPINT & (1 << 0)) { // Tx Complete
Helmut64 0:a3ea811f80f2 406 epComplete |= (1 << (1 + (i << 1)));
Helmut64 0:a3ea811f80f2 407 OTG_FS->INEP_REGS[i].DIEPINT = (1 << 0);
Helmut64 0:a3ea811f80f2 408 }
Helmut64 0:a3ea811f80f2 409 }
Helmut64 0:a3ea811f80f2 410 }
Helmut64 0:a3ea811f80f2 411 OTG_FS->GREGS.GINTSTS = (1 << 18);
Helmut64 0:a3ea811f80f2 412 }
Helmut64 0:a3ea811f80f2 413
Helmut64 0:a3ea811f80f2 414 if (OTG_FS->GREGS.GINTSTS & (1 << 3)) { // Start of frame
Helmut64 0:a3ea811f80f2 415 SOF((OTG_FS->GREGS.GRXSTSR >> 17) & 0xF);
Helmut64 0:a3ea811f80f2 416 OTG_FS->GREGS.GINTSTS = (1 << 3);
Helmut64 0:a3ea811f80f2 417 }
Helmut64 0:a3ea811f80f2 418 }
Helmut64 0:a3ea811f80f2 419
Helmut64 0:a3ea811f80f2 420
Helmut64 0:a3ea811f80f2 421 #endif
Helmut Tschemernjak 2:195554780c9b 422
Helmut Tschemernjak 2:195554780c9b 423 #endif // FEATURE_USBSERIAL