![](/media/cache/profiles/ce7206100d5cf8e7bb691376c7d73526.jpg.50x50_q85.jpg)
An example project for the Heltec Turtle LoRa board (STM32L4 and SX1276 chips). The projects is only supported for the Nucleo-L432KC board platform in the mbed online and offline compiler environment. Visit www.radioshuttle.de (choose Turtle board) for instructions. Note that most source files and libraries are open source, however some files especially the RadioShuttle core protocol is copyrighted work. Check header for details.
Dependencies: mbed BufferedSerial SX1276GenericLib OLED_SSD1306 HELIOS_Si7021 NVProperty RadioShuttle-STM32L4 USBDeviceHT
Utils/mbed-util.s
- Committer:
- Helmut Tschemernjak
- Date:
- 2019-06-06
- Revision:
- 62:86aaaf9fa55d
- Parent:
- 44:cda7bca43f3b
File content as of revision 62:86aaaf9fa55d:
#ifdef __ARMCC_VERSION ; generated by Component: ARM Compiler 5.06 update 4 (build 422) Tool: armcc [4d3604] ; commandline armcc [--cpp --split_sections -c -S --gnu -oBUILD\NUCLEO_L432KC\ARM\mbed-util.o --depend=BUILD\NUCLEO_L432KC\ARM\mbed-util.d --cpu=Cortex-M4.fp --apcs=interwork -O3 -Otime --preinclude=.\BUILD\NUCLEO_L432KC\ARM\mbed_config.h -I. -I./BulkSerial -I./ESP -I./FATFileSystem -I./FATFileSystem/ChaN -I./Flash -I./Flash/MD5 -I./Hardware-STM -I./NVProperty -I./Power -I./RadioShuttleLib -I./RadioShuttleLib/examples -I./RadioShuttleLib/examples/PMSensorRadio -I./RadioShuttleLib/examples/RadioTest -I./RadioShuttleLib/util -I./STM_MEMS -I./SX1276GenericLib -I./SX1276GenericLib/radio -I./SX1276GenericLib/registers -I./SX1276GenericLib/sx1276 -I./USBDeviceHT -I./USBDeviceHT/USBDevice -I./USBDeviceHT/USBSerial -I./USBDeviceHT/USBSerialBuffered -I./USBDeviceHT/targets/TARGET_STM -I./WIZnetInterface -I./WIZnetInterface/Socket -I./WIZnetInterface/arch -I./WIZnetInterface/arch/ext -I./WIZnetInterface/arch/int -I./WakeUpRTC -I./WakeUpRTC/Device -I./WakeUpRTC/Device/LPC1114_WakeInterruptIn -I./ZModem -I./mbed -I./mbed/e95d10626187 -I./mbed/e95d10626187/TARGET_NUCLEO_L432KC -I./mbed/e95d10626187/TARGET_NUCLEO_L432KC/TARGET_STM -I./mbed/e95d10626187/TARGET_NUCLEO_L432KC/TARGET_STM/TARGET_STM32L4 -I./mbed/e95d10626187/TARGET_NUCLEO_L432KC/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC -I./mbed/e95d10626187/TARGET_NUCLEO_L432KC/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/TARGET_NUCLEO_L432KC -I./mbed/e95d10626187/TARGET_NUCLEO_L432KC/TARGET_STM/TARGET_STM32L4/TARGET_STM32L432xC/device -I./mbed/e95d10626187/TARGET_NUCLEO_L432KC/TARGET_STM/TARGET_STM32L4/device -I./mbed/e95d10626187/drivers -I./mbed/e95d10626187/hal -I./mbed/e95d10626187/platform -D__ASSERT_MSG -DMBED_ROM_START=0x8000000 -DMBED_ROM_SIZE=0x40000 -DDEVICE_CRC=1 -D__MBED__=1 -DDEVICE_I2CSLAVE=1 -D__FPU_PRESENT=1 -DDEVICE_PORTOUT=1 -DDEVICE_PORTINOUT=1 -DTARGET_RTOS_M4_M7 -DDEVICE_RTC=1 -DDEVICE_SERIAL_ASYNCH=1 -D__CMSIS_RTOS -DDEVICE_USTICKER=1 -DDEVICE_CAN=1 -DTARGET_CORTEX_M -DDEVICE_I2C_ASYNCH=1 -DTARGET_LIKE_CORTEX_M4 -DDEVICE_ANALOGOUT=1 -DTARGET_M4 -DARM_MATH_CM4 -DTARGET_STM32L4 -DDEVICE_SPI_ASYNCH=1 -DDEVICE_LPTICKER=1 -DDEVICE_PWMOUT=1 -DTARGET_STM32L432xC -DMBED_BUILD_TIMESTAMP=1548340964.1 -DTARGET_CORTEX -DDEVICE_I2C=1 -DTRANSACTION_QUEUE_SIZE_SPI=2 -D__CORTEX_M4 -DDEVICE_STDIO_MESSAGES=1 -DTARGET_FAMILY_STM32 -DTARGET_FF_ARDUINO -DDEVICE_PORTIN=1 -DTARGET_RELEASE -DTARGET_STM -DTARGET_STM32L432KC -DDEVICE_SERIAL_FC=1 -DDEVICE_TRNG=1 -DTARGET_LIKE_MBED -D__MBED_CMSIS_RTOS_CM -DDEVICE_SLEEP=1 -DDEVICE_SPI=1 -DDEVICE_INTERRUPTIN=1 -DDEVICE_SPISLAVE=1 -DDEVICE_ANALOGIN=1 -DDEVICE_SERIAL=1 -DDEVICE_FLASH=1 -DTARGET_NUCLEO_L432KC -DTOOLCHAIN_ARM -DTOOLCHAIN_ARM_STD --no_vla --multibyte_chars --brief_diagnostics --no_depend_system_headers --restrict --no_rtti .\mbed-util.cpp] THUMB REQUIRE8 PRESERVE8 AREA ||i._Z14BatteryVoltagev||, CODE, READONLY, ALIGN=3 _Z14BatteryVoltagev PROC PUSH {r4-r7,lr} LDR r5,|L0.328| VPUSH {d8} SUB sp,sp,#0x84 LDR r0,[r5,#0x4c] ORR r0,r0,#0x2000 STR r0,[r5,#0x4c] LDR r0,[r5,#0x4c] AND r0,r0,#0x2000 STR r0,[sp,#0x80] LDR r0,[r5,#0x88] ORR r0,r0,#0x30000000 STR r0,[r5,#0x88] LDR r6,|L0.332| MOV r0,sp STR r6,[sp,#0] BL HAL_ADC_DeInit CMP r0,#0 ITTTT NE VMOVNE.F32 s0,#1.00000000 ADDNE sp,sp,#0x84 VPOPNE {d8} POPNE {r4-r7,pc} MOVS r4,#0 MOVS r7,#4 STRD r4,r7,[sp,#0x10] STR r4,[sp,#4] STR r4,[sp,#8] STR r4,[sp,#0xc] MOVS r0,#1 STR r4,[sp,#0x18] STRD r4,r0,[sp,#0x1c] STRD r4,r0,[sp,#0x24] STR r4,[sp,#0x2c] LSLS r0,r0,#12 STR r4,[sp,#0x30] STRD r4,r0,[sp,#0x34] MOV r0,sp STR r4,[sp,#0x3c] BL HAL_ADC_Init CMP r0,#0 ITTTT NE VMOVNE.F32 s0,#2.00000000 ADDNE sp,sp,#0x84 VPOPNE {d8} POPNE {r4-r7,pc} LDR r0,|L0.336| STR r0,[sp,#0x68] MOVS r0,#6 STR r0,[sp,#0x6c] MOVS r0,#7 STR r0,[sp,#0x70] MOVS r0,#0x7f STR r4,[sp,#0x7c] STRD r0,r7,[sp,#0x74] ADD r1,sp,#0x68 MOV r0,sp BL HAL_ADC_ConfigChannel CMP r0,#0 ITTTT NE VMOVNE.F32 s0,#3.00000000 ADDNE sp,sp,#0x84 VPOPNE {d8} POPNE {r4-r7,pc} MOVS r1,#0x7f MOV r0,sp BL HAL_ADCEx_Calibration_Start CMP r0,#0 ITTTT NE VMOVNE.F32 s0,#4.00000000 ADDNE sp,sp,#0x84 VPOPNE {d8} POPNE {r4-r7,pc} MOV r0,sp BL HAL_ADC_Start CMP r0,#0 ITTTT NE VMOVNE.F32 s0,#5.00000000 ADDNE sp,sp,#0x84 VPOPNE {d8} POPNE {r4-r7,pc} MOVS r1,#0xa MOV r0,sp BL HAL_ADC_PollForConversion CMP r0,#0 ITTTT NE VMOVNE.F32 s0,#6.00000000 ADDNE sp,sp,#0x84 VPOPNE {d8} POPNE {r4-r7,pc} MOV r0,sp BL HAL_ADC_GetValue LDR r1,|L0.340| UDIV r0,r1,r0 BL __aeabi_ui2d VLDR d1,|L0.344| VMOV r2,r3,d1 BL __aeabi_ddiv BL __aeabi_d2f VMOV s16,r0 MOV r0,sp BL ADC_Disable MOV r0,sp BL HAL_ADC_DeInit LDR r0,[r5,#0x88] BIC r0,r0,#0x30000000 STR r0,[r5,#0x88] LDR r0,[r5,#0x4c] BIC r0,r0,#0x2000 STR r0,[r5,#0x4c] LDR r0,[r6,#8] BIC r0,r0,#0x1800000 STR r0,[r6,#8] ADD sp,sp,#0x84 VMOV.F32 s0,s16 VPOP {d8} POP {r4-r7,pc} ENDP DCW 0x0000 |L0.328| DCD 0x40021000 |L0.332| DCD 0x50040000 |L0.336| DCD 0x80000001 |L0.340| DCD 0x004afb50 |L0.344| DCFD 0x408f400000000000 ; 1000 AREA ||i._Z5CPUIDPhij||, CODE, READONLY, ALIGN=2 _Z5CPUIDPhij PROC LDR r3,|L1.48| CMP r1,#0x10 ITT LT MOVLT r0,#0 BXLT lr EOR r1,r3,r2 LDR r2,[r1,#0] STR r2,[r0,#0] LDR r2,[r1,#4] STR r2,[r0,#4] LDR r1,[r1,#8] STR r1,[r0,#8] LDR r1,|L1.52| LDR r2,|L1.56| LDRB r1,[r1,#0] LDRH r2,[r2,#0] AND r1,r1,#0x1f ORR r1,r1,r2,LSL #16 STR r1,[r0,#0xc] MOVS r0,#0x10 BX lr ENDP |L1.48| DCD 0x4aaa20c5 |L1.52| DCD 0x1fff7500 |L1.56| DCD 0x1fff75e0 AREA ||i._Z8OTPWritePhPKvj||, CODE, READONLY, ALIGN=1 _Z8OTPWritePhPKvj PROC PUSH {r4-r6,lr} SUB sp,sp,#8 MOV r6,r2 MOV r4,r1 MOV r5,r0 BL HAL_FLASH_Unlock CBZ r6,|L2.84| |L2.16| LDRB r0,[r4,#0] STRB r0,[sp,#0] LDRB r0,[r4,#1] STRB r0,[sp,#1] LDRB r0,[r4,#2] STRB r0,[sp,#2] LDRB r0,[r4,#3] STRB r0,[sp,#3] LDRB r0,[r4,#4] STRB r0,[sp,#4] LDRB r0,[r4,#5] STRB r0,[sp,#5] LDRB r0,[r4,#6] STRB r0,[sp,#6] LDRB r0,[r4,#7] STRB r0,[sp,#7] LDRD r2,r3,[sp,#0] MOV r1,r5 MOVS r0,#0 BL HAL_FLASH_Program ADDS r4,r4,#8 ADDS r5,r5,#8 SUBS r6,r6,#8 BNE |L2.16| |L2.84| ADD sp,sp,#8 POP {r4-r6,lr} B.W HAL_FLASH_Lock ENDP AREA ||.ARM.exidx||, LINKORDER=||i._Z5CPUIDPhij||, DATA, READONLY, SECTYPE={SHT_ARM_EXIDX}, ALIGN=2 DCD 0x00000000 RELOC 42, ||i._Z5CPUIDPhij|| DCD 0x00000001 AREA ||area_number.4||, LINKORDER=||i._Z14BatteryVoltagev||, DATA, READONLY, SECTYPE={SHT_ARM_EXIDX}, ALIGN=2 EXPORTAS ||area_number.4||, ||.ARM.exidx|| DCD 0x00000000 RELOC 42, ||i._Z14BatteryVoltagev|| DCD 0x00000001 AREA ||area_number.5||, LINKORDER=||i._Z8OTPWritePhPKvj||, DATA, READONLY, SECTYPE={SHT_ARM_EXIDX}, ALIGN=2 EXPORTAS ||area_number.5||, ||.ARM.exidx|| DCD 0x00000000 RELOC 42, ||i._Z8OTPWritePhPKvj|| DCD 0x00000001 AREA ||.arm_vfe_header||, DATA, READONLY, NOALLOC, ALIGN=2 DCD 0x00000000 ;*** Start embedded assembler *** #line 1 ".\\mbed-util.cpp" AREA ||.rev16_text||, CODE THUMB EXPORT |__asm___13_mbed_util_cpp_f390ad65___Z7__REV16j| #line 468 "./mbed/e95d10626187/TARGET_NUCLEO_L432KC/cmsis_armcc.h" |__asm___13_mbed_util_cpp_f390ad65___Z7__REV16j| PROC #line 469 rev16 r0, r0 bx lr ENDP AREA ||.revsh_text||, CODE THUMB EXPORT |__asm___13_mbed_util_cpp_f390ad65___Z7__REVSHs| #line 483 |__asm___13_mbed_util_cpp_f390ad65___Z7__REVSHs| PROC #line 484 revsh r0, r0 bx lr ENDP AREA ||.rrx_text||, CODE THUMB EXPORT |__asm___13_mbed_util_cpp_f390ad65___Z5__RRXj| #line 670 |__asm___13_mbed_util_cpp_f390ad65___Z5__RRXj| PROC #line 671 rrx r0, r0 bx lr ENDP ;*** End embedded assembler *** EXPORT _Z14BatteryVoltagev [CODE] EXPORT _Z5CPUIDPhij [CODE] EXPORT _Z8OTPWritePhPKvj [CODE] IMPORT ||Lib$$Request$$armlib|| [CODE,WEAK] IMPORT ||Lib$$Request$$cpplib|| [CODE,WEAK] IMPORT HAL_ADC_DeInit [CODE] IMPORT HAL_ADC_Init [CODE] IMPORT HAL_ADC_ConfigChannel [CODE] IMPORT HAL_ADCEx_Calibration_Start [CODE] IMPORT HAL_ADC_Start [CODE] IMPORT HAL_ADC_PollForConversion [CODE] IMPORT HAL_ADC_GetValue [CODE] IMPORT __aeabi_ui2d [CODE] IMPORT __aeabi_ddiv [CODE] IMPORT __aeabi_d2f [CODE] IMPORT ADC_Disable [CODE] IMPORT HAL_FLASH_Unlock [CODE] IMPORT HAL_FLASH_Program [CODE] IMPORT HAL_FLASH_Lock [CODE] ATTR FILESCOPE ATTR SETVALUE Tag_ABI_PCS_wchar_t,2 ATTR SETVALUE Tag_ABI_enum_size,1 ATTR SETVALUE Tag_ABI_optimization_goals,2 ATTR SETSTRING Tag_conformance,"2.09" ATTR SETVALUE AV,6,0 ATTR SETVALUE AV,18,1 ASSERT {ENDIAN} = "little" ASSERT {INTER} = {TRUE} ASSERT {ROPI} = {FALSE} ASSERT {RWPI} = {FALSE} ASSERT {IEEE_FULL} = {FALSE} ASSERT {IEEE_PART} = {FALSE} ASSERT {IEEE_JAVA} = {FALSE} END #elif defined(__GNUC__) .cpu cortex-m4 .eabi_attribute 27, 1 .eabi_attribute 20, 1 .eabi_attribute 21, 1 .eabi_attribute 23, 3 .eabi_attribute 24, 1 .eabi_attribute 25, 1 .eabi_attribute 26, 1 .eabi_attribute 30, 4 .eabi_attribute 34, 1 .eabi_attribute 18, 4 .file "mbed-util.cpp" .text .Ltext0: .cfi_sections .debug_frame .section .text._Z5CPUIDPhim,"ax",%progbits .align 1 .global _Z5CPUIDPhim .arch armv7e-m .syntax unified .thumb .thumb_func .fpu fpv4-sp-d16 .type _Z5CPUIDPhim, %function _Z5CPUIDPhim: .LFB2093: .file 1 "./mbed-util.cpp" .loc 1 22 1 .cfi_startproc @ args = 0, pretend = 0, frame = 8 @ frame_needed = 0, uses_anonymous_args = 0 .LBB2: .loc 1 28 5 cmp r1, #15 .LBE2: .loc 1 22 1 push {r0, r1, r2, lr} .cfi_def_cfa_offset 16 .cfi_offset 14, -4 .loc 1 22 1 mov r3, r0 .LBB5: .loc 1 28 5 ble .L4 .LBB3: .loc 1 30 21 ldr r1, .L6 eors r1, r1, r2 adds r0, r0, #12 subs r1, r1, r3 .L3: .LBB4: .loc 1 34 19 discriminator 2 ldrb r2, [r3, r1] @ zero_extendqisi2 .loc 1 34 17 discriminator 2 strb r2, [r3], #1 .loc 1 33 27 discriminator 2 cmp r0, r3 bne .L3 .LBE4: .loc 1 36 19 ldr r3, .L6+4 ldrh r2, [r3] .loc 1 36 64 subs r3, r3, #224 .loc 1 36 101 ldrh r3, [r3] and r3, r3, #31 .loc 1 36 60 orr r3, r3, r2, lsl #16 .loc 1 37 9 movs r2, #4 add r1, sp, r2 .loc 1 36 12 str r3, [sp, #4] .loc 1 37 9 bl memcpy .loc 1 39 16 movs r0, #16 .L1: .LBE3: .LBE5: .loc 1 42 1 add sp, sp, #12 .cfi_remember_state .cfi_def_cfa_offset 4 @ sp needed ldr pc, [sp], #4 .L4: .cfi_restore_state .loc 1 41 12 movs r0, #0 b .L1 .L7: .align 2 .L6: .word 1252663493 .word 536835552 .cfi_endproc .LFE2093: .size _Z5CPUIDPhim, .-_Z5CPUIDPhim .global __aeabi_ui2d .global __aeabi_ddiv .global __aeabi_d2f .section .text._Z14BatteryVoltagev,"ax",%progbits .align 1 .global _Z14BatteryVoltagev .syntax unified .thumb .thumb_func .fpu fpv4-sp-d16 .type _Z14BatteryVoltagev, %function _Z14BatteryVoltagev: .LFB2094: .loc 1 48 1 .cfi_startproc @ args = 0, pretend = 0, frame = 136 @ frame_needed = 0, uses_anonymous_args = 0 push {r4, r5, r6, r7, lr} .cfi_def_cfa_offset 20 .cfi_offset 4, -20 .cfi_offset 5, -16 .cfi_offset 6, -12 .cfi_offset 7, -8 .cfi_offset 14, -4 .LBB6: .loc 1 60 5 ldr r4, .L16 .LBE6: .loc 1 66 24 ldr r6, .L16+4 .LBB7: .loc 1 60 5 ldr r3, [r4, #76] orr r3, r3, #8192 str r3, [r4, #76] ldr r3, [r4, #76] .LBE7: .loc 1 48 1 sub sp, sp, #140 .cfi_def_cfa_offset 160 .LBB8: .loc 1 60 5 and r3, r3, #8192 str r3, [sp, #4] ldr r3, [sp, #4] .LBE8: .loc 1 62 5 ldr r3, [r4, #136] orr r3, r3, #805306368 str r3, [r4, #136] .loc 1 67 23 add r0, sp, #32 .loc 1 66 24 str r6, [sp, #32] .loc 1 67 23 bl HAL_ADC_DeInit .loc 1 67 5 cmp r0, #0 bne .L10 .loc 1 77 42 movs r3, #1 .loc 1 78 42 strd r3, r0, [sp, #64] .loc 1 80 42 strd r3, r0, [sp, #72] .loc 1 74 42 movs r7, #4 .loc 1 83 42 mov r3, #4096 .loc 1 71 42 strd r0, r0, [sp, #36] .loc 1 73 42 strd r0, r0, [sp, #44] .loc 1 75 42 strd r7, r0, [sp, #52] .loc 1 76 42 str r0, [sp, #60] .loc 1 82 42 strd r0, r0, [sp, #80] .loc 1 84 42 strd r3, r0, [sp, #88] .loc 1 86 21 add r0, sp, #32 bl HAL_ADC_Init .loc 1 86 5 cmp r0, #0 bne .L11 .loc 1 92 26 ldr r2, .L16+8 movs r3, #6 strd r2, r3, [sp, #8] .loc 1 94 26 movs r5, #127 movs r3, #7 .loc 1 96 20 strd r7, r0, [sp, #24] .loc 1 98 30 add r1, sp, #8 add r0, sp, #32 .loc 1 94 26 strd r3, r5, [sp, #16] .loc 1 98 30 bl HAL_ADC_ConfigChannel .loc 1 98 5 cmp r0, #0 bne .L12 .loc 1 117 36 mov r1, r5 add r0, sp, #32 bl HAL_ADCEx_Calibration_Start .loc 1 117 5 cmp r0, #0 bne .L13 .loc 1 123 22 add r0, sp, #32 bl HAL_ADC_Start .loc 1 123 5 cmp r0, #0 bne .L14 .loc 1 132 34 movs r1, #10 add r0, sp, #32 bl HAL_ADC_PollForConversion .loc 1 132 5 cmp r0, #0 bne .L15 .loc 1 141 38 add r0, sp, #32 bl HAL_ADC_GetValue .loc 1 147 54 ldr r3, .L16+12 udiv r0, r3, r0 bl __aeabi_ui2d ldr r3, .L16+16 movs r2, #0 bl __aeabi_ddiv .loc 1 147 11 bl __aeabi_d2f mov r5, r0 @ float .loc 1 149 16 add r0, sp, #32 bl ADC_Disable .loc 1 150 19 add r0, sp, #32 bl HAL_ADC_DeInit .loc 1 159 5 ldr r3, [r4, #136] bic r3, r3, #805306368 str r3, [r4, #136] .loc 1 160 5 ldr r3, [r4, #76] bic r3, r3, #8192 str r3, [r4, #76] .loc 1 163 14 ldr r3, [r6, #8] bic r3, r3, #25165824 str r3, [r6, #8] .L8: .loc 1 169 1 mov r0, r5 @ float add sp, sp, #140 .cfi_remember_state .cfi_def_cfa_offset 20 @ sp needed pop {r4, r5, r6, r7, pc} .L10: .cfi_restore_state .loc 1 68 16 mov r5, #1065353216 b .L8 .L11: .loc 1 87 16 mov r5, #1073741824 b .L8 .L12: .loc 1 99 16 ldr r5, .L16+20 b .L8 .L13: .loc 1 119 16 mov r5, #1082130432 b .L8 .L14: .loc 1 125 16 ldr r5, .L16+24 b .L8 .L15: .loc 1 134 16 ldr r5, .L16+28 b .L8 .L17: .align 2 .L16: .word 1073876992 .word 1342439424 .word -2147483647 .word 4914000 .word 1083129856 .word 1077936128 .word 1084227584 .word 1086324736 .cfi_endproc .LFE2094: .size _Z14BatteryVoltagev, .-_Z14BatteryVoltagev .section .text._Z8OTPWritePhPKvj,"ax",%progbits .align 1 .global _Z8OTPWritePhPKvj .syntax unified .thumb .thumb_func .fpu fpv4-sp-d16 .type _Z8OTPWritePhPKvj, %function _Z8OTPWritePhPKvj: .LFB2095: .loc 1 174 1 .cfi_startproc @ args = 0, pretend = 0, frame = 8 @ frame_needed = 0, uses_anonymous_args = 0 push {r0, r1, r2, r4, r5, r6, r7, lr} .cfi_def_cfa_offset 32 .cfi_offset 4, -20 .cfi_offset 5, -16 .cfi_offset 6, -12 .cfi_offset 7, -8 .cfi_offset 14, -4 .loc 1 174 1 mov r5, r0 mov r6, r1 mov r7, r2 .loc 1 179 18 bl HAL_FLASH_Unlock movs r4, #0 .L21: .loc 1 180 16 cmn r7, r4 sub r0, r6, r4 sub r1, r5, r4 beq .L19 movs r3, #0 .L20: .LBB9: .LBB10: .loc 1 182 33 discriminator 2 ldrb r2, [r0, r3] @ zero_extendqisi2 strb r2, [sp, r3] adds r3, r3, #1 .loc 1 181 25 discriminator 2 cmp r3, #8 bne .L20 .LBE10: .loc 1 184 23 ldrd r2, [sp] movs r0, #0 bl HAL_FLASH_Program subs r4, r4, #8 .LBE9: .loc 1 180 2 b .L21 .L19: .loc 1 189 19 bl HAL_FLASH_Lock .loc 1 190 1 add sp, sp, #12 .cfi_def_cfa_offset 20 @ sp needed pop {r4, r5, r6, r7, pc} .cfi_endproc .LFE2095: .size _Z8OTPWritePhPKvj, .-_Z8OTPWritePhPKvj .text .Letext0: .section .debug_info,"",%progbits .Ldebug_info0: .4byte 0x64 .2byte 0x4 .4byte .Ldebug_abbrev0 .byte 0x4 .uleb128 0x1 .4byte .LASF6 .byte 0x4 .4byte .LASF7 .4byte .LASF8 .4byte .Ldebug_ranges0+0 .4byte 0 .4byte .Ldebug_line0 .uleb128 0x2 .4byte .LASF0 .byte 0x1 .byte 0xad .byte 0x6 .4byte .LASF2 .4byte .LFB2095 .4byte .LFE2095-.LFB2095 .uleb128 0x1 .byte 0x9c .uleb128 0x2 .4byte .LASF1 .byte 0x1 .byte 0x2f .byte 0x1 .4byte .LASF3 .4byte .LFB2094 .4byte .LFE2094-.LFB2094 .uleb128 0x1 .byte 0x9c .uleb128 0x2 .4byte .LASF4 .byte 0x1 .byte 0x15 .byte 0x1 .4byte .LASF5 .4byte .LFB2093 .4byte .LFE2093-.LFB2093 .uleb128 0x1 .byte 0x9c .byte 0 .section .debug_abbrev,"",%progbits .Ldebug_abbrev0: .uleb128 0x1 .uleb128 0x11 .byte 0x1 .uleb128 0x25 .uleb128 0xe .uleb128 0x13 .uleb128 0xb .uleb128 0x3 .uleb128 0xe .uleb128 0x1b .uleb128 0xe .uleb128 0x55 .uleb128 0x17 .uleb128 0x11 .uleb128 0x1 .uleb128 0x10 .uleb128 0x17 .byte 0 .byte 0 .uleb128 0x2 .uleb128 0x2e .byte 0 .uleb128 0x3f .uleb128 0x19 .uleb128 0x3 .uleb128 0xe .uleb128 0x3a .uleb128 0xb .uleb128 0x3b .uleb128 0xb .uleb128 0x39 .uleb128 0xb .uleb128 0x6e .uleb128 0xe .uleb128 0x11 .uleb128 0x1 .uleb128 0x12 .uleb128 0x6 .uleb128 0x40 .uleb128 0x18 .uleb128 0x2116 .uleb128 0x19 .byte 0 .byte 0 .byte 0 .section .debug_aranges,"",%progbits .4byte 0x2c .2byte 0x2 .4byte .Ldebug_info0 .byte 0x4 .byte 0 .2byte 0 .2byte 0 .4byte .LFB2093 .4byte .LFE2093-.LFB2093 .4byte .LFB2094 .4byte .LFE2094-.LFB2094 .4byte .LFB2095 .4byte .LFE2095-.LFB2095 .4byte 0 .4byte 0 .section .debug_ranges,"",%progbits .Ldebug_ranges0: .4byte .LFB2093 .4byte .LFE2093 .4byte .LFB2094 .4byte .LFE2094 .4byte .LFB2095 .4byte .LFE2095 .4byte 0 .4byte 0 .section .debug_line,"",%progbits .Ldebug_line0: .section .debug_str,"MS",%progbits,1 .LASF8: .ascii "/Volumes/Data/work/mbed-work/Turtle_RadioShuttle\000" .LASF7: .ascii "./mbed-util.cpp\000" .LASF0: .ascii "OTPWrite\000" .LASF5: .ascii "_Z5CPUIDPhim\000" .LASF4: .ascii "CPUID\000" .LASF3: .ascii "_Z14BatteryVoltagev\000" .LASF6: .ascii "GNU C++98 8.2.1 20181213 (release) [gcc-8-branch re" .ascii "vision 267074] -mcpu=cortex-m4 -mthumb -mfpu=fpv4-s" .ascii "p-d16 -mfloat-abi=softfp -march=armv7e-m+fp -g1 -Os" .ascii " -std=gnu++98 -fno-rtti -fmessage-length=0 -fno-exc" .ascii "eptions -fno-builtin -ffunction-sections -fdata-sec" .ascii "tions -funsigned-char -fno-delete-null-pointer-chec" .ascii "ks -fomit-frame-pointer\000" .LASF1: .ascii "BatteryVoltage\000" .LASF2: .ascii "_Z8OTPWritePhPKvj\000" .ident "GCC: (GNU Tools for Arm Embedded Processors 8-2018-q4-major) 8.2.1 20181213 (release) [gcc-8-branch revision 267074]" #endif