Hideharu Tsunemoto / Mbed 2 deprecated SmallDoseMeter_Single_AE_LPC11U35

LPC11U35 ADC Tick & USBSerial

Dependencies:   mbed

Dependents:   SmallDoseMeter_SingleCH_AE_lpc11u35_V1_00

mbed/SPI.h@1:b1a3be5f48ab, 2018-02-19 (annotated)

Committer:
H_Tsunemoto
Date:
Mon Feb 19 09:09:52 2018 +0000
Revision:
1:b1a3be5f48ab
Parent:
0:871ab6846b18 
test

Who changed what in which revision?

UserRevisionLine numberNew contents of line
H_Tsunemoto 0:871ab6846b18 1 /* mbed Microcontroller Library
H_Tsunemoto 0:871ab6846b18 2 * Copyright (c) 2006-2013 ARM Limited
H_Tsunemoto 0:871ab6846b18 3 *
H_Tsunemoto 0:871ab6846b18 4 * Licensed under the Apache License, Version 2.0 (the "License");
H_Tsunemoto 0:871ab6846b18 5 * you may not use this file except in compliance with the License.
H_Tsunemoto 0:871ab6846b18 6 * You may obtain a copy of the License at
H_Tsunemoto 0:871ab6846b18 7 *
H_Tsunemoto 0:871ab6846b18 8 * http://www.apache.org/licenses/LICENSE-2.0
H_Tsunemoto 0:871ab6846b18 9 *
H_Tsunemoto 0:871ab6846b18 10 * Unless required by applicable law or agreed to in writing, software
H_Tsunemoto 0:871ab6846b18 11 * distributed under the License is distributed on an "AS IS" BASIS,
H_Tsunemoto 0:871ab6846b18 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
H_Tsunemoto 0:871ab6846b18 13 * See the License for the specific language governing permissions and
H_Tsunemoto 0:871ab6846b18 14 * limitations under the License.
H_Tsunemoto 0:871ab6846b18 15 */
H_Tsunemoto 0:871ab6846b18 16 #ifndef MBED_SPI_H
H_Tsunemoto 0:871ab6846b18 17 #define MBED_SPI_H
H_Tsunemoto 0:871ab6846b18 18
H_Tsunemoto 0:871ab6846b18 19 #include "platform.h"
H_Tsunemoto 0:871ab6846b18 20
H_Tsunemoto 0:871ab6846b18 21 #if DEVICE_SPI
H_Tsunemoto 0:871ab6846b18 22
H_Tsunemoto 0:871ab6846b18 23 #include "spi_api.h"
H_Tsunemoto 0:871ab6846b18 24
H_Tsunemoto 0:871ab6846b18 25 namespace mbed {
H_Tsunemoto 0:871ab6846b18 26
H_Tsunemoto 0:871ab6846b18 27 /** A SPI Master, used for communicating with SPI slave devices
H_Tsunemoto 0:871ab6846b18 28 *
H_Tsunemoto 0:871ab6846b18 29 * The default format is set to 8-bits, mode 0, and a clock frequency of 1MHz
H_Tsunemoto 0:871ab6846b18 30 *
H_Tsunemoto 0:871ab6846b18 31 * Most SPI devices will also require Chip Select and Reset signals. These
H_Tsunemoto 0:871ab6846b18 32 * can be controlled using <DigitalOut> pins
H_Tsunemoto 0:871ab6846b18 33 *
H_Tsunemoto 0:871ab6846b18 34 * Example:
H_Tsunemoto 0:871ab6846b18 35 * @code
H_Tsunemoto 0:871ab6846b18 36 * // Send a byte to a SPI slave, and record the response
H_Tsunemoto 0:871ab6846b18 37 *
H_Tsunemoto 0:871ab6846b18 38 * #include "mbed.h"
H_Tsunemoto 0:871ab6846b18 39 *
H_Tsunemoto 0:871ab6846b18 40 * SPI device(p5, p6, p7); // mosi, miso, sclk
H_Tsunemoto 0:871ab6846b18 41 *
H_Tsunemoto 0:871ab6846b18 42 * int main() {
H_Tsunemoto 0:871ab6846b18 43 * int response = device.write(0xFF);
H_Tsunemoto 0:871ab6846b18 44 * }
H_Tsunemoto 0:871ab6846b18 45 * @endcode
H_Tsunemoto 0:871ab6846b18 46 */
H_Tsunemoto 0:871ab6846b18 47 class SPI {
H_Tsunemoto 0:871ab6846b18 48
H_Tsunemoto 0:871ab6846b18 49 public:
H_Tsunemoto 0:871ab6846b18 50
H_Tsunemoto 0:871ab6846b18 51 /** Create a SPI master connected to the specified pins
H_Tsunemoto 0:871ab6846b18 52 *
H_Tsunemoto 0:871ab6846b18 53 * Pin Options:
H_Tsunemoto 0:871ab6846b18 54 * (5, 6, 7) or (11, 12, 13)
H_Tsunemoto 0:871ab6846b18 55 *
H_Tsunemoto 0:871ab6846b18 56 * mosi or miso can be specfied as NC if not used
H_Tsunemoto 0:871ab6846b18 57 *
H_Tsunemoto 0:871ab6846b18 58 * @param mosi SPI Master Out, Slave In pin
H_Tsunemoto 0:871ab6846b18 59 * @param miso SPI Master In, Slave Out pin
H_Tsunemoto 0:871ab6846b18 60 * @param sclk SPI Clock pin
H_Tsunemoto 0:871ab6846b18 61 */
H_Tsunemoto 0:871ab6846b18 62 SPI(PinName mosi, PinName miso, PinName sclk, PinName _unused=NC);
H_Tsunemoto 0:871ab6846b18 63
H_Tsunemoto 0:871ab6846b18 64 /** Configure the data transmission format
H_Tsunemoto 0:871ab6846b18 65 *
H_Tsunemoto 0:871ab6846b18 66 * @param bits Number of bits per SPI frame (4 - 16)
H_Tsunemoto 0:871ab6846b18 67 * @param mode Clock polarity and phase mode (0 - 3)
H_Tsunemoto 0:871ab6846b18 68 *
H_Tsunemoto 0:871ab6846b18 69 * @code
H_Tsunemoto 0:871ab6846b18 70 * mode | POL PHA
H_Tsunemoto 0:871ab6846b18 71 * -----+--------
H_Tsunemoto 0:871ab6846b18 72 * 0 | 0 0
H_Tsunemoto 0:871ab6846b18 73 * 1 | 0 1
H_Tsunemoto 0:871ab6846b18 74 * 2 | 1 0
H_Tsunemoto 0:871ab6846b18 75 * 3 | 1 1
H_Tsunemoto 0:871ab6846b18 76 * @endcode
H_Tsunemoto 0:871ab6846b18 77 */
H_Tsunemoto 0:871ab6846b18 78 void format(int bits, int mode = 0);
H_Tsunemoto 0:871ab6846b18 79
H_Tsunemoto 0:871ab6846b18 80 /** Set the spi bus clock frequency
H_Tsunemoto 0:871ab6846b18 81 *
H_Tsunemoto 0:871ab6846b18 82 * @param hz SCLK frequency in hz (default = 1MHz)
H_Tsunemoto 0:871ab6846b18 83 */
H_Tsunemoto 0:871ab6846b18 84 void frequency(int hz = 1000000);
H_Tsunemoto 0:871ab6846b18 85
H_Tsunemoto 0:871ab6846b18 86 /** Write to the SPI Slave and return the response
H_Tsunemoto 0:871ab6846b18 87 *
H_Tsunemoto 0:871ab6846b18 88 * @param value Data to be sent to the SPI slave
H_Tsunemoto 0:871ab6846b18 89 *
H_Tsunemoto 0:871ab6846b18 90 * @returns
H_Tsunemoto 0:871ab6846b18 91 * Response from the SPI slave
H_Tsunemoto 0:871ab6846b18 92 */
H_Tsunemoto 0:871ab6846b18 93 virtual int write(int value);
H_Tsunemoto 0:871ab6846b18 94
H_Tsunemoto 0:871ab6846b18 95 public:
H_Tsunemoto 0:871ab6846b18 96 virtual ~SPI() {
H_Tsunemoto 0:871ab6846b18 97 }
H_Tsunemoto 0:871ab6846b18 98
H_Tsunemoto 0:871ab6846b18 99 protected:
H_Tsunemoto 0:871ab6846b18 100 spi_t _spi;
H_Tsunemoto 0:871ab6846b18 101
H_Tsunemoto 0:871ab6846b18 102 void aquire(void);
H_Tsunemoto 0:871ab6846b18 103 static SPI *_owner;
H_Tsunemoto 0:871ab6846b18 104 int _bits;
H_Tsunemoto 0:871ab6846b18 105 int _mode;
H_Tsunemoto 0:871ab6846b18 106 int _hz;
H_Tsunemoto 0:871ab6846b18 107 };
H_Tsunemoto 0:871ab6846b18 108
H_Tsunemoto 0:871ab6846b18 109 } // namespace mbed
H_Tsunemoto 0:871ab6846b18 110
H_Tsunemoto 0:871ab6846b18 111 #endif
H_Tsunemoto 0:871ab6846b18 112
H_Tsunemoto 0:871ab6846b18 113 #endif