Hideharu Tsunemoto
/
MBED_TestPulse_Xray_Cont_20180517
MBED_LPC1768_Test Pulse msec/usec Interval Output P29/P30 & Input P21 Status Send USB Serial Log
MODDMA/example2.h@0:47c1b6a0c166, 2018-05-29 (annotated)
- Committer:
- H_Tsunemoto
- Date:
- Tue May 29 02:41:54 2018 +0000
- Revision:
- 0:47c1b6a0c166
Pulse On/OFF OutPut P29/P30 & Rep Input P21 Status Output USBSerial;
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
H_Tsunemoto | 0:47c1b6a0c166 | 1 | /* |
H_Tsunemoto | 0:47c1b6a0c166 | 2 | * This example was provided to support Mbed forum thread:- |
H_Tsunemoto | 0:47c1b6a0c166 | 3 | * http://mbed.org/forum/mbed/topic/1798 |
H_Tsunemoto | 0:47c1b6a0c166 | 4 | */ |
H_Tsunemoto | 0:47c1b6a0c166 | 5 | |
H_Tsunemoto | 0:47c1b6a0c166 | 6 | #include "mbed.h" |
H_Tsunemoto | 0:47c1b6a0c166 | 7 | #include "MODDMA.h" |
H_Tsunemoto | 0:47c1b6a0c166 | 8 | |
H_Tsunemoto | 0:47c1b6a0c166 | 9 | #define SAMPLE_BUFFER_LENGTH 32 |
H_Tsunemoto | 0:47c1b6a0c166 | 10 | |
H_Tsunemoto | 0:47c1b6a0c166 | 11 | DigitalOut led1(LED1); |
H_Tsunemoto | 0:47c1b6a0c166 | 12 | DigitalOut led2(LED2); |
H_Tsunemoto | 0:47c1b6a0c166 | 13 | |
H_Tsunemoto | 0:47c1b6a0c166 | 14 | MODDMA dma; |
H_Tsunemoto | 0:47c1b6a0c166 | 15 | Serial pc(USBTX, USBRX); |
H_Tsunemoto | 0:47c1b6a0c166 | 16 | |
H_Tsunemoto | 0:47c1b6a0c166 | 17 | // ISR set's this when transfer complete. |
H_Tsunemoto | 0:47c1b6a0c166 | 18 | bool dmaTransferComplete = false; |
H_Tsunemoto | 0:47c1b6a0c166 | 19 | |
H_Tsunemoto | 0:47c1b6a0c166 | 20 | // Function prototypes for IRQ callbacks. |
H_Tsunemoto | 0:47c1b6a0c166 | 21 | // See definitions following main() below. |
H_Tsunemoto | 0:47c1b6a0c166 | 22 | void TC0_callback(void); |
H_Tsunemoto | 0:47c1b6a0c166 | 23 | void ERR0_callback(void); |
H_Tsunemoto | 0:47c1b6a0c166 | 24 | |
H_Tsunemoto | 0:47c1b6a0c166 | 25 | int main() { |
H_Tsunemoto | 0:47c1b6a0c166 | 26 | |
H_Tsunemoto | 0:47c1b6a0c166 | 27 | // Create a buffer to hold the ADC samples and clear it. |
H_Tsunemoto | 0:47c1b6a0c166 | 28 | // Note, we are going to sample two ADC inputs so they |
H_Tsunemoto | 0:47c1b6a0c166 | 29 | // end up in this buffer "interleaved". So you will want |
H_Tsunemoto | 0:47c1b6a0c166 | 30 | // a buffer twice this size to a real life given sample |
H_Tsunemoto | 0:47c1b6a0c166 | 31 | // frequency. See the printf() output for details. |
H_Tsunemoto | 0:47c1b6a0c166 | 32 | uint32_t adcInputBuffer[SAMPLE_BUFFER_LENGTH]; |
H_Tsunemoto | 0:47c1b6a0c166 | 33 | memset(adcInputBuffer, 0, sizeof(adcInputBuffer)); |
H_Tsunemoto | 0:47c1b6a0c166 | 34 | |
H_Tsunemoto | 0:47c1b6a0c166 | 35 | // We use the ADC irq to trigger DMA and the manual says |
H_Tsunemoto | 0:47c1b6a0c166 | 36 | // that in this case the NVIC for ADC must be disabled. |
H_Tsunemoto | 0:47c1b6a0c166 | 37 | NVIC_DisableIRQ(ADC_IRQn); |
H_Tsunemoto | 0:47c1b6a0c166 | 38 | |
H_Tsunemoto | 0:47c1b6a0c166 | 39 | // Power up the ADC and set PCLK |
H_Tsunemoto | 0:47c1b6a0c166 | 40 | LPC_SC->PCONP |= (1UL << 12); |
H_Tsunemoto | 0:47c1b6a0c166 | 41 | LPC_SC->PCLKSEL0 &= ~(3UL << 24); // PCLK = CCLK/4 96M/4 = 24MHz |
H_Tsunemoto | 0:47c1b6a0c166 | 42 | |
H_Tsunemoto | 0:47c1b6a0c166 | 43 | // Enable the ADC, 12MHz, ADC0.0 & .1 |
H_Tsunemoto | 0:47c1b6a0c166 | 44 | LPC_ADC->ADCR = (1UL << 21) | (1UL << 8) | (3UL << 0); |
H_Tsunemoto | 0:47c1b6a0c166 | 45 | |
H_Tsunemoto | 0:47c1b6a0c166 | 46 | // Set the pin functions to ADC |
H_Tsunemoto | 0:47c1b6a0c166 | 47 | LPC_PINCON->PINSEL1 &= ~(3UL << 14); /* P0.23, Mbed p15. */ |
H_Tsunemoto | 0:47c1b6a0c166 | 48 | LPC_PINCON->PINSEL1 |= (1UL << 14); |
H_Tsunemoto | 0:47c1b6a0c166 | 49 | LPC_PINCON->PINSEL1 &= ~(3UL << 16); /* P0.24, Mbed p16. */ |
H_Tsunemoto | 0:47c1b6a0c166 | 50 | LPC_PINCON->PINSEL1 |= (1UL << 16); |
H_Tsunemoto | 0:47c1b6a0c166 | 51 | |
H_Tsunemoto | 0:47c1b6a0c166 | 52 | // Setup the serial port to print out results. |
H_Tsunemoto | 0:47c1b6a0c166 | 53 | pc.baud(115200); |
H_Tsunemoto | 0:47c1b6a0c166 | 54 | pc.printf("ADC with DMA example\n"); |
H_Tsunemoto | 0:47c1b6a0c166 | 55 | pc.printf("====================\n"); |
H_Tsunemoto | 0:47c1b6a0c166 | 56 | |
H_Tsunemoto | 0:47c1b6a0c166 | 57 | // Prepare an ADC configuration. |
H_Tsunemoto | 0:47c1b6a0c166 | 58 | MODDMA_Config *conf = new MODDMA_Config; |
H_Tsunemoto | 0:47c1b6a0c166 | 59 | conf |
H_Tsunemoto | 0:47c1b6a0c166 | 60 | ->channelNum ( MODDMA::Channel_0 ) |
H_Tsunemoto | 0:47c1b6a0c166 | 61 | ->srcMemAddr ( 0 ) |
H_Tsunemoto | 0:47c1b6a0c166 | 62 | ->dstMemAddr ( (uint32_t)adcInputBuffer ) |
H_Tsunemoto | 0:47c1b6a0c166 | 63 | ->transferSize ( SAMPLE_BUFFER_LENGTH ) |
H_Tsunemoto | 0:47c1b6a0c166 | 64 | ->transferType ( MODDMA::p2m ) |
H_Tsunemoto | 0:47c1b6a0c166 | 65 | ->transferWidth ( MODDMA::word ) |
H_Tsunemoto | 0:47c1b6a0c166 | 66 | ->srcConn ( MODDMA::ADC ) |
H_Tsunemoto | 0:47c1b6a0c166 | 67 | ->dstConn ( 0 ) |
H_Tsunemoto | 0:47c1b6a0c166 | 68 | ->dmaLLI ( 0 ) |
H_Tsunemoto | 0:47c1b6a0c166 | 69 | ->attach_tc ( &TC0_callback ) |
H_Tsunemoto | 0:47c1b6a0c166 | 70 | ->attach_err ( &ERR0_callback ) |
H_Tsunemoto | 0:47c1b6a0c166 | 71 | ; // end conf. |
H_Tsunemoto | 0:47c1b6a0c166 | 72 | |
H_Tsunemoto | 0:47c1b6a0c166 | 73 | // Prepare configuration. |
H_Tsunemoto | 0:47c1b6a0c166 | 74 | dma.Setup( conf ); |
H_Tsunemoto | 0:47c1b6a0c166 | 75 | |
H_Tsunemoto | 0:47c1b6a0c166 | 76 | // Enable configuration. |
H_Tsunemoto | 0:47c1b6a0c166 | 77 | dma.Enable( conf ); |
H_Tsunemoto | 0:47c1b6a0c166 | 78 | |
H_Tsunemoto | 0:47c1b6a0c166 | 79 | // Enable ADC irq flag (to DMA). |
H_Tsunemoto | 0:47c1b6a0c166 | 80 | // Note, don't set the individual flags, |
H_Tsunemoto | 0:47c1b6a0c166 | 81 | // just set the global flag. |
H_Tsunemoto | 0:47c1b6a0c166 | 82 | LPC_ADC->ADINTEN = 0x100; |
H_Tsunemoto | 0:47c1b6a0c166 | 83 | |
H_Tsunemoto | 0:47c1b6a0c166 | 84 | // Enable burst mode on inputs 0 and 1. |
H_Tsunemoto | 0:47c1b6a0c166 | 85 | LPC_ADC->ADCR |= (1UL << 16); |
H_Tsunemoto | 0:47c1b6a0c166 | 86 | |
H_Tsunemoto | 0:47c1b6a0c166 | 87 | while (1) { |
H_Tsunemoto | 0:47c1b6a0c166 | 88 | // When transfer complete do this block. |
H_Tsunemoto | 0:47c1b6a0c166 | 89 | if (dmaTransferComplete) { |
H_Tsunemoto | 0:47c1b6a0c166 | 90 | delete conf; // No memory leaks, delete the configuration. |
H_Tsunemoto | 0:47c1b6a0c166 | 91 | dmaTransferComplete = false; |
H_Tsunemoto | 0:47c1b6a0c166 | 92 | for (int i = 0; i < SAMPLE_BUFFER_LENGTH; i++) { |
H_Tsunemoto | 0:47c1b6a0c166 | 93 | int channel = (adcInputBuffer[i] >> 24) & 0x7; |
H_Tsunemoto | 0:47c1b6a0c166 | 94 | int iVal = (adcInputBuffer[i] >> 4) & 0xFFF; |
H_Tsunemoto | 0:47c1b6a0c166 | 95 | double fVal = 3.3 * (double)((double)iVal) / ((double)0x1000); // scale to 0v to 3.3v |
H_Tsunemoto | 0:47c1b6a0c166 | 96 | pc.printf("Array index %02d : ADC input channel %d = 0x%03x %01.3f volts\n", i, channel, iVal, fVal); |
H_Tsunemoto | 0:47c1b6a0c166 | 97 | } |
H_Tsunemoto | 0:47c1b6a0c166 | 98 | } |
H_Tsunemoto | 0:47c1b6a0c166 | 99 | |
H_Tsunemoto | 0:47c1b6a0c166 | 100 | // Just flash LED1 for something to do. |
H_Tsunemoto | 0:47c1b6a0c166 | 101 | led1 = !led1; |
H_Tsunemoto | 0:47c1b6a0c166 | 102 | wait(0.25); |
H_Tsunemoto | 0:47c1b6a0c166 | 103 | } |
H_Tsunemoto | 0:47c1b6a0c166 | 104 | } |
H_Tsunemoto | 0:47c1b6a0c166 | 105 | |
H_Tsunemoto | 0:47c1b6a0c166 | 106 | // Configuration callback on TC |
H_Tsunemoto | 0:47c1b6a0c166 | 107 | void TC0_callback(void) { |
H_Tsunemoto | 0:47c1b6a0c166 | 108 | |
H_Tsunemoto | 0:47c1b6a0c166 | 109 | MODDMA_Config *config = dma.getConfig(); |
H_Tsunemoto | 0:47c1b6a0c166 | 110 | |
H_Tsunemoto | 0:47c1b6a0c166 | 111 | // Disbale burst mode and switch off the IRQ flag. |
H_Tsunemoto | 0:47c1b6a0c166 | 112 | LPC_ADC->ADCR &= ~(1UL << 16); |
H_Tsunemoto | 0:47c1b6a0c166 | 113 | LPC_ADC->ADINTEN = 0; |
H_Tsunemoto | 0:47c1b6a0c166 | 114 | |
H_Tsunemoto | 0:47c1b6a0c166 | 115 | // Finish the DMA cycle by shutting down the channel. |
H_Tsunemoto | 0:47c1b6a0c166 | 116 | dma.haltAndWaitChannelComplete( (MODDMA::CHANNELS)config->channelNum()); |
H_Tsunemoto | 0:47c1b6a0c166 | 117 | dma.Disable( (MODDMA::CHANNELS)config->channelNum() ); |
H_Tsunemoto | 0:47c1b6a0c166 | 118 | |
H_Tsunemoto | 0:47c1b6a0c166 | 119 | // Tell main() while(1) loop to print the results. |
H_Tsunemoto | 0:47c1b6a0c166 | 120 | dmaTransferComplete = true; |
H_Tsunemoto | 0:47c1b6a0c166 | 121 | |
H_Tsunemoto | 0:47c1b6a0c166 | 122 | // Switch on LED2 to show transfer complete. |
H_Tsunemoto | 0:47c1b6a0c166 | 123 | led2 = 1; |
H_Tsunemoto | 0:47c1b6a0c166 | 124 | |
H_Tsunemoto | 0:47c1b6a0c166 | 125 | // Clear DMA IRQ flags. |
H_Tsunemoto | 0:47c1b6a0c166 | 126 | if (dma.irqType() == MODDMA::TcIrq) dma.clearTcIrq(); |
H_Tsunemoto | 0:47c1b6a0c166 | 127 | if (dma.irqType() == MODDMA::ErrIrq) dma.clearErrIrq(); |
H_Tsunemoto | 0:47c1b6a0c166 | 128 | } |
H_Tsunemoto | 0:47c1b6a0c166 | 129 | |
H_Tsunemoto | 0:47c1b6a0c166 | 130 | // Configuration callback on Error |
H_Tsunemoto | 0:47c1b6a0c166 | 131 | void ERR0_callback(void) { |
H_Tsunemoto | 0:47c1b6a0c166 | 132 | // Switch off burst conversions. |
H_Tsunemoto | 0:47c1b6a0c166 | 133 | LPC_ADC->ADCR |= ~(1UL << 16); |
H_Tsunemoto | 0:47c1b6a0c166 | 134 | LPC_ADC->ADINTEN = 0; |
H_Tsunemoto | 0:47c1b6a0c166 | 135 | error("Oh no! My Mbed EXPLODED! :( Only kidding, go find the problem"); |
H_Tsunemoto | 0:47c1b6a0c166 | 136 | } |
H_Tsunemoto | 0:47c1b6a0c166 | 137 |