Gonzalo Brusco
Real Time FIR Filter - Distinctive Excellence award winner :)
dma.c@0:b3e50e98acac, 2011-08-13 (annotated)
- Committer:
- Gonzakpo
- Date:
- Sat Aug 13 17:35:52 2011 +0000
- Revision:
- 0:b3e50e98acac
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| Gonzakpo | 0:b3e50e98acac | 1 | |
| Gonzakpo | 0:b3e50e98acac | 2 | #include "dma.h" |
| Gonzakpo | 0:b3e50e98acac | 3 | |
| Gonzakpo | 0:b3e50e98acac | 4 | bool_t BufferTransferCompleted = FALSE; |
| Gonzakpo | 0:b3e50e98acac | 5 | pingpong_t BufferToProcess = PONG; |
| Gonzakpo | 0:b3e50e98acac | 6 | |
| Gonzakpo | 0:b3e50e98acac | 7 | /* Interrupcion del DMA */ |
| Gonzakpo | 0:b3e50e98acac | 8 | /* Se encarga de informar que se termino de leer un bloque desde el ADC */ |
| Gonzakpo | 0:b3e50e98acac | 9 | extern "C" void DMA_IRQHandler(void) |
| Gonzakpo | 0:b3e50e98acac | 10 | { |
| Gonzakpo | 0:b3e50e98acac | 11 | /* Aquí llega cuando se produce una interrupcion del DMA. |
| Gonzakpo | 0:b3e50e98acac | 12 | * Dicha interrupcion se genera cada vez que se llena uno de los dos |
| Gonzakpo | 0:b3e50e98acac | 13 | * buffers de entrada de datos del ADC. Como esto tambien esta sincronizado |
| Gonzakpo | 0:b3e50e98acac | 14 | * con el DAC, la interrupcion tambien coincide con el cambio de buffer del |
| Gonzakpo | 0:b3e50e98acac | 15 | * DAC. |
| Gonzakpo | 0:b3e50e98acac | 16 | */ |
| Gonzakpo | 0:b3e50e98acac | 17 | |
| Gonzakpo | 0:b3e50e98acac | 18 | /* Limpio flag de interrupcion */ |
| Gonzakpo | 0:b3e50e98acac | 19 | LPC_GPDMA->DMACIntTCClear = (1 << 0); |
| Gonzakpo | 0:b3e50e98acac | 20 | |
| Gonzakpo | 0:b3e50e98acac | 21 | /* Informo la aparicion de la interrupcion */ |
| Gonzakpo | 0:b3e50e98acac | 22 | BufferTransferCompleted = TRUE; |
| Gonzakpo | 0:b3e50e98acac | 23 | |
| Gonzakpo | 0:b3e50e98acac | 24 | /* Verifico que buffer corresponde procesar */ |
| Gonzakpo | 0:b3e50e98acac | 25 | /* Recordar que los buffers PING y PONG se procesan alternadamente */ |
| Gonzakpo | 0:b3e50e98acac | 26 | if(BufferToProcess == PONG) |
| Gonzakpo | 0:b3e50e98acac | 27 | { |
| Gonzakpo | 0:b3e50e98acac | 28 | BufferToProcess = PING; |
| Gonzakpo | 0:b3e50e98acac | 29 | } |
| Gonzakpo | 0:b3e50e98acac | 30 | else |
| Gonzakpo | 0:b3e50e98acac | 31 | { |
| Gonzakpo | 0:b3e50e98acac | 32 | BufferToProcess = PONG; |
| Gonzakpo | 0:b3e50e98acac | 33 | } |
| Gonzakpo | 0:b3e50e98acac | 34 | |
| Gonzakpo | 0:b3e50e98acac | 35 | } |
| Gonzakpo | 0:b3e50e98acac | 36 | |
| Gonzakpo | 0:b3e50e98acac | 37 | |
| Gonzakpo | 0:b3e50e98acac | 38 | void initDMAs(dmaLinkedListNode * pListADC, dmaLinkedListNode * pListDAC) |
| Gonzakpo | 0:b3e50e98acac | 39 | { |
| Gonzakpo | 0:b3e50e98acac | 40 | LPC_SC->PCONP |= (1UL << 29); /* Enciendo modulo DMA */ |
| Gonzakpo | 0:b3e50e98acac | 41 | |
| Gonzakpo | 0:b3e50e98acac | 42 | LPC_GPDMA->DMACConfig = 1; /* Habilito el DMA */ |
| Gonzakpo | 0:b3e50e98acac | 43 | |
| Gonzakpo | 0:b3e50e98acac | 44 | LPC_GPDMA->DMACIntTCClear = 0xFF; /* Limpio cualquier interrupcion previa*/ |
| Gonzakpo | 0:b3e50e98acac | 45 | LPC_GPDMA->DMACIntErrClr = 0xFF; |
| Gonzakpo | 0:b3e50e98acac | 46 | NVIC_EnableIRQ(DMA_IRQn); |
| Gonzakpo | 0:b3e50e98acac | 47 | |
| Gonzakpo | 0:b3e50e98acac | 48 | LPC_SC->RESERVED9 |= 1; /* Selecciono a MAT0.0 como fuente de DMA request (RESERVED9 == DMAREQSEL) */ |
| Gonzakpo | 0:b3e50e98acac | 49 | |
| Gonzakpo | 0:b3e50e98acac | 50 | /* Inicializo el canal 0 con el primer nodo de la lista del ADC */ |
| Gonzakpo | 0:b3e50e98acac | 51 | LPC_GPDMACH0->DMACCSrcAddr = pListADC->sourceAddr; |
| Gonzakpo | 0:b3e50e98acac | 52 | LPC_GPDMACH0->DMACCDestAddr = pListADC->destAddr; |
| Gonzakpo | 0:b3e50e98acac | 53 | LPC_GPDMACH0->DMACCControl = pListADC->dmaControl; |
| Gonzakpo | 0:b3e50e98acac | 54 | LPC_GPDMACH0->DMACCLLI = pListADC->nextNode; |
| Gonzakpo | 0:b3e50e98acac | 55 | |
| Gonzakpo | 0:b3e50e98acac | 56 | /* Configuro el canal 0 del DMA: |
| Gonzakpo | 0:b3e50e98acac | 57 | SrcPeripheral = MAT0.0 = 8 |
| Gonzakpo | 0:b3e50e98acac | 58 | DestPeripheral = 0 |
| Gonzakpo | 0:b3e50e98acac | 59 | Transfer Type = Peripheral to Memory = 2 |
| Gonzakpo | 0:b3e50e98acac | 60 | IE = 0 (sin interrupciones de error) |
| Gonzakpo | 0:b3e50e98acac | 61 | ITC = 1 (con interrupciones de transferencia completa) |
| Gonzakpo | 0:b3e50e98acac | 62 | Halt = 0 (acepta DMA requests) |
| Gonzakpo | 0:b3e50e98acac | 63 | */ |
| Gonzakpo | 0:b3e50e98acac | 64 | LPC_GPDMACH0->DMACCConfig = (0x8 << 1) | (0x2 << 11) | (0x1 << 15); |
| Gonzakpo | 0:b3e50e98acac | 65 | |
| Gonzakpo | 0:b3e50e98acac | 66 | /* Inicializo el canal 1 con el primer nodo de la lista del DAC */ |
| Gonzakpo | 0:b3e50e98acac | 67 | LPC_GPDMACH1->DMACCSrcAddr = pListDAC->sourceAddr; |
| Gonzakpo | 0:b3e50e98acac | 68 | LPC_GPDMACH1->DMACCDestAddr = pListDAC->destAddr; |
| Gonzakpo | 0:b3e50e98acac | 69 | LPC_GPDMACH1->DMACCControl = pListDAC->dmaControl; |
| Gonzakpo | 0:b3e50e98acac | 70 | LPC_GPDMACH1->DMACCLLI = pListDAC->nextNode; /*Segun el user manual (pg 601) los dos bits menos significativos deben ser ceros*/ |
| Gonzakpo | 0:b3e50e98acac | 71 | /*Seguramente sea porque la memoria esta alineada de cierta forma que sea imposible |
| Gonzakpo | 0:b3e50e98acac | 72 | * que estos dos bits no sean cero. En la note de aplicacion de DMA multiplican por |
| Gonzakpo | 0:b3e50e98acac | 73 | * 0xFFFFFFFC para asegurarse de eso. No creo que sea necesario y no tiene sentido.*/ |
| Gonzakpo | 0:b3e50e98acac | 74 | |
| Gonzakpo | 0:b3e50e98acac | 75 | /* Configuro el canal 1 del DMA: |
| Gonzakpo | 0:b3e50e98acac | 76 | SrcPeripheral = 0 |
| Gonzakpo | 0:b3e50e98acac | 77 | DestPeripheral = MAT0.0 = 8 |
| Gonzakpo | 0:b3e50e98acac | 78 | Transfer Type = Memory to Peripheral = 1 |
| Gonzakpo | 0:b3e50e98acac | 79 | IE = 0 (sin interrupciones de error) |
| Gonzakpo | 0:b3e50e98acac | 80 | ITC = 0 (sin interrupciones de transferencia completa) |
| Gonzakpo | 0:b3e50e98acac | 81 | Halt = 0 (acepta DMA requests) |
| Gonzakpo | 0:b3e50e98acac | 82 | */ |
| Gonzakpo | 0:b3e50e98acac | 83 | LPC_GPDMACH1->DMACCConfig = (0x8 << 6) | (0x1 << 11); |
| Gonzakpo | 0:b3e50e98acac | 84 | |
| Gonzakpo | 0:b3e50e98acac | 85 | /*Listo, habilito los canales DMA apropiados*/ |
| Gonzakpo | 0:b3e50e98acac | 86 | LPC_GPDMACH0->DMACCConfig |= (1 << 0); |
| Gonzakpo | 0:b3e50e98acac | 87 | LPC_GPDMACH1->DMACCConfig |= (1 << 0); |
| Gonzakpo | 0:b3e50e98acac | 88 | |
| Gonzakpo | 0:b3e50e98acac | 89 | } |