try19_pwm_tim20_comple

Dependencies:   mbed FastPWM

Committer:
GiJeongKim
Date:
Mon Aug 12 09:15:22 2019 +0000
Revision:
0:8a1dc1fdba10
Child:
1:27f1640d930d
pwm;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
GiJeongKim 0:8a1dc1fdba10 1 #include "mbed.h"
GiJeongKim 0:8a1dc1fdba10 2 #include "FastPWM.h"
GiJeongKim 0:8a1dc1fdba10 3
GiJeongKim 0:8a1dc1fdba10 4 #define PIN_U PA_10
GiJeongKim 0:8a1dc1fdba10 5 #define PIN_V PA_9
GiJeongKim 0:8a1dc1fdba10 6 #define PIN_W PA_8
GiJeongKim 0:8a1dc1fdba10 7 #define PWM_ARR 0x8CA /// timer autoreload value
GiJeongKim 0:8a1dc1fdba10 8
GiJeongKim 0:8a1dc1fdba10 9 float dtc_u=0.1;
GiJeongKim 0:8a1dc1fdba10 10 float dtc_v=0.2;
GiJeongKim 0:8a1dc1fdba10 11 float dtc_w=0.6;
GiJeongKim 0:8a1dc1fdba10 12 void Init_PWM();
GiJeongKim 0:8a1dc1fdba10 13
GiJeongKim 0:8a1dc1fdba10 14 extern "C" void TIM1_UP_TIM10_IRQHandler(void) {
GiJeongKim 0:8a1dc1fdba10 15 if (TIM1->SR & TIM_SR_UIF ) {
GiJeongKim 0:8a1dc1fdba10 16 TIM1->CCR3 = (PWM_ARR)*(1.0f-dtc_u); // Write duty cycles
GiJeongKim 0:8a1dc1fdba10 17 TIM1->CCR2 = (PWM_ARR)*(1.0f-dtc_v);
GiJeongKim 0:8a1dc1fdba10 18 TIM1->CCR1 = (PWM_ARR)*(1.0f-dtc_w); // CCR1 = channel 1
GiJeongKim 0:8a1dc1fdba10 19 }
GiJeongKim 0:8a1dc1fdba10 20 TIM1->SR = 0x0; // reset the status register
GiJeongKim 0:8a1dc1fdba10 21 }
GiJeongKim 0:8a1dc1fdba10 22
GiJeongKim 0:8a1dc1fdba10 23
GiJeongKim 0:8a1dc1fdba10 24 int main(){
GiJeongKim 0:8a1dc1fdba10 25 Init_PWM();
GiJeongKim 0:8a1dc1fdba10 26 TIM1->CR1 ^= TIM_CR1_UDIS;
GiJeongKim 0:8a1dc1fdba10 27 while(1);
GiJeongKim 0:8a1dc1fdba10 28 }
GiJeongKim 0:8a1dc1fdba10 29
GiJeongKim 0:8a1dc1fdba10 30
GiJeongKim 0:8a1dc1fdba10 31
GiJeongKim 0:8a1dc1fdba10 32 void Init_PWM(){
GiJeongKim 0:8a1dc1fdba10 33
GiJeongKim 0:8a1dc1fdba10 34 RCC->AHB1ENR |= RCC_AHB1ENR_GPIOCEN; // enable the clock to GPIOC
GiJeongKim 0:8a1dc1fdba10 35 RCC->APB1ENR |= 0x00000001; // enable TIM2 clock
GiJeongKim 0:8a1dc1fdba10 36 RCC->APB2ENR |= RCC_APB2ENR_TIM1EN; // enable TIM1 clock
GiJeongKim 0:8a1dc1fdba10 37
GiJeongKim 0:8a1dc1fdba10 38 GPIOC->MODER |= (1 << 10); // set pin 5 to be general purpose output for LED
GiJeongKim 0:8a1dc1fdba10 39 // gpio->enable = new DigitalOut(ENABLE_PIN);
GiJeongKim 0:8a1dc1fdba10 40 // gpio->pwm_u = new FastPWM(PIN_U);
GiJeongKim 0:8a1dc1fdba10 41 // gpio->pwm_v = new FastPWM(PIN_V);
GiJeongKim 0:8a1dc1fdba10 42 // gpio->pwm_w = new FastPWM(PIN_W);
GiJeongKim 0:8a1dc1fdba10 43 FastPWM pwm_u(PIN_U); // 단순히 핀 설정용
GiJeongKim 0:8a1dc1fdba10 44 FastPWM pwm_v(PIN_V);
GiJeongKim 0:8a1dc1fdba10 45 FastPWM pwm_w(PIN_W);
GiJeongKim 0:8a1dc1fdba10 46
GiJeongKim 0:8a1dc1fdba10 47 //ISR Setup
GiJeongKim 0:8a1dc1fdba10 48
GiJeongKim 0:8a1dc1fdba10 49 NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn); //Enable TIM1 IRQ
GiJeongKim 0:8a1dc1fdba10 50
GiJeongKim 0:8a1dc1fdba10 51 TIM1->DIER |= TIM_DIER_UIE; // enable update interrupt
GiJeongKim 0:8a1dc1fdba10 52 TIM1->CR1 = 0x40; // CMS = 10, interrupt only when counting up // Center-aligned mode
GiJeongKim 0:8a1dc1fdba10 53 TIM1->CR1 |= TIM_CR1_UDIS;
GiJeongKim 0:8a1dc1fdba10 54 TIM1->CR1 |= TIM_CR1_ARPE; // autoreload on,
GiJeongKim 0:8a1dc1fdba10 55 TIM1->RCR |= 0x001; // update event once per up/down count of tim1
GiJeongKim 0:8a1dc1fdba10 56 TIM1->EGR |= TIM_EGR_UG;
GiJeongKim 0:8a1dc1fdba10 57
GiJeongKim 0:8a1dc1fdba10 58 //PWM Setup
GiJeongKim 0:8a1dc1fdba10 59
GiJeongKim 0:8a1dc1fdba10 60 TIM1->PSC = 0x0; // no prescaler, timer counts up in sync with the peripheral clock
GiJeongKim 0:8a1dc1fdba10 61 TIM1->ARR = PWM_ARR; // set auto reload, 40 khz
GiJeongKim 0:8a1dc1fdba10 62 TIM1->CCER |= ~(TIM_CCER_CC1NP); // Interupt when low side is on.
GiJeongKim 0:8a1dc1fdba10 63 TIM1->CR1 |= TIM_CR1_CEN; // enable TIM1
GiJeongKim 0:8a1dc1fdba10 64
GiJeongKim 0:8a1dc1fdba10 65 }