Kim GiJeong / Mbed 2 deprecated try19_pwm_tim20_comple

try19_pwm_tim20_comple

Dependencies:   mbed FastPWM

main.cpp@1:27f1640d930d, 2019-08-21 (annotated)

Committer:
GiJeongKim
Date:
Wed Aug 21 05:18:06 2019 +0000
Revision:
1:27f1640d930d
Parent:
0:8a1dc1fdba10 
pwm complementary

Who changed what in which revision?

UserRevisionLine numberNew contents of line
GiJeongKim 0:8a1dc1fdba10 1 #include "mbed.h"
GiJeongKim 0:8a1dc1fdba10 2 #include "FastPWM.h"
GiJeongKim 0:8a1dc1fdba10 3
GiJeongKim 1:27f1640d930d 4 #define PIN_A PA_8 // channel 1
GiJeongKim 1:27f1640d930d 5 #define PIN_B PA_7 // complementary
GiJeongKim 1:27f1640d930d 6 #define PWM_ARR 0x8CA /// timer autoreload value 40k loop, 40k pwm
GiJeongKim 0:8a1dc1fdba10 7
GiJeongKim 1:27f1640d930d 8 float dtc_a=0.1;
GiJeongKim 1:27f1640d930d 9 float dtc_b=0.2;
GiJeongKim 0:8a1dc1fdba10 10 void Init_PWM();
GiJeongKim 1:27f1640d930d 11 DigitalOut check(PC_9);
GiJeongKim 1:27f1640d930d 12 DigitalIn a1(PB_7);
GiJeongKim 1:27f1640d930d 13 DigitalIn a2(PB_6);
GiJeongKim 1:27f1640d930d 14
GiJeongKim 0:8a1dc1fdba10 15
GiJeongKim 0:8a1dc1fdba10 16 extern "C" void TIM1_UP_TIM10_IRQHandler(void) {
GiJeongKim 0:8a1dc1fdba10 17 if (TIM1->SR & TIM_SR_UIF ) {
GiJeongKim 1:27f1640d930d 18 check=1;
GiJeongKim 1:27f1640d930d 19 TIM1->CCR1 = (PWM_ARR)*(1.0f-dtc_a); // Write duty cycles
GiJeongKim 1:27f1640d930d 20 check=0;
GiJeongKim 0:8a1dc1fdba10 21 }
GiJeongKim 0:8a1dc1fdba10 22 TIM1->SR = 0x0; // reset the status register
GiJeongKim 0:8a1dc1fdba10 23 }
GiJeongKim 0:8a1dc1fdba10 24
GiJeongKim 0:8a1dc1fdba10 25
GiJeongKim 0:8a1dc1fdba10 26 int main(){
GiJeongKim 1:27f1640d930d 27 check=1;
GiJeongKim 0:8a1dc1fdba10 28 Init_PWM();
GiJeongKim 0:8a1dc1fdba10 29 TIM1->CR1 ^= TIM_CR1_UDIS;
GiJeongKim 0:8a1dc1fdba10 30 while(1);
GiJeongKim 0:8a1dc1fdba10 31 }
GiJeongKim 0:8a1dc1fdba10 32
GiJeongKim 0:8a1dc1fdba10 33
GiJeongKim 0:8a1dc1fdba10 34
GiJeongKim 0:8a1dc1fdba10 35 void Init_PWM(){
GiJeongKim 0:8a1dc1fdba10 36
GiJeongKim 0:8a1dc1fdba10 37 RCC->APB2ENR |= RCC_APB2ENR_TIM1EN; // enable TIM1 clock
GiJeongKim 0:8a1dc1fdba10 38
GiJeongKim 1:27f1640d930d 39 FastPWM pwm_a(PIN_A); // 단순히 핀 설정용
GiJeongKim 1:27f1640d930d 40 FastPWM pwm_b(PIN_B);
GiJeongKim 0:8a1dc1fdba10 41
GiJeongKim 0:8a1dc1fdba10 42 //ISR Setup
GiJeongKim 0:8a1dc1fdba10 43
GiJeongKim 0:8a1dc1fdba10 44 NVIC_EnableIRQ(TIM1_UP_TIM10_IRQn); //Enable TIM1 IRQ
GiJeongKim 0:8a1dc1fdba10 45
GiJeongKim 0:8a1dc1fdba10 46 TIM1->DIER |= TIM_DIER_UIE; // enable update interrupt
GiJeongKim 0:8a1dc1fdba10 47 TIM1->CR1 = 0x40; // CMS = 10, interrupt only when counting up // Center-aligned mode
GiJeongKim 0:8a1dc1fdba10 48 TIM1->CR1 |= TIM_CR1_UDIS;
GiJeongKim 0:8a1dc1fdba10 49 TIM1->CR1 |= TIM_CR1_ARPE; // autoreload on,
GiJeongKim 0:8a1dc1fdba10 50 TIM1->RCR |= 0x001; // update event once per up/down count of tim1
GiJeongKim 0:8a1dc1fdba10 51 TIM1->EGR |= TIM_EGR_UG;
GiJeongKim 1:27f1640d930d 52
GiJeongKim 1:27f1640d930d 53
GiJeongKim 0:8a1dc1fdba10 54
GiJeongKim 0:8a1dc1fdba10 55 //PWM Setup
GiJeongKim 0:8a1dc1fdba10 56
GiJeongKim 0:8a1dc1fdba10 57 TIM1->PSC = 0x0; // no prescaler, timer counts up in sync with the peripheral clock
GiJeongKim 0:8a1dc1fdba10 58 TIM1->ARR = PWM_ARR; // set auto reload, 40 khz
GiJeongKim 1:27f1640d930d 59 // TIM1->CCER |= ~(TIM_CCER_CC1NP); // Interupt when low side is on.
GiJeongKim 0:8a1dc1fdba10 60 TIM1->CR1 |= TIM_CR1_CEN; // enable TIM1
GiJeongKim 0:8a1dc1fdba10 61
GiJeongKim 1:27f1640d930d 62 // for complementary
GiJeongKim 1:27f1640d930d 63 TIM1->CCER|=0b1111;
GiJeongKim 0:8a1dc1fdba10 64 }