Geremia G / mbed-src

- fix F411 F334 systeminit when HSI used - portinout always read IDR regardless of port direction

Fork of mbed-src by mbed official

targets/hal/TARGET_NXP/TARGET_LPC176X/PeripheralNames.h@332:e299ae530e63, 2014-09-27 (annotated)

Committer:
Geremia
Date:
Sat Sep 27 11:16:28 2014 +0000
Revision:
332:e299ae530e63
Parent:
50:b08ceb75017d 
- fix F411 F334 systeminit when HSI used; - STMs PortInOut port.read() always read input data register (real external pin state) even if direction is output (same as other platforms)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 13:0645d8841f51 1 /* mbed Microcontroller Library
bogdanm 13:0645d8841f51 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 13:0645d8841f51 3 *
bogdanm 13:0645d8841f51 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 13:0645d8841f51 5 * you may not use this file except in compliance with the License.
bogdanm 13:0645d8841f51 6 * You may obtain a copy of the License at
bogdanm 13:0645d8841f51 7 *
bogdanm 13:0645d8841f51 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 13:0645d8841f51 9 *
bogdanm 13:0645d8841f51 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 13:0645d8841f51 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 13:0645d8841f51 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 13:0645d8841f51 13 * See the License for the specific language governing permissions and
bogdanm 13:0645d8841f51 14 * limitations under the License.
bogdanm 13:0645d8841f51 15 */
bogdanm 13:0645d8841f51 16 #ifndef MBED_PERIPHERALNAMES_H
bogdanm 13:0645d8841f51 17 #define MBED_PERIPHERALNAMES_H
bogdanm 13:0645d8841f51 18
bogdanm 13:0645d8841f51 19 #include "cmsis.h"
mbed_official 50:b08ceb75017d 20 #include "PinNames.h"
bogdanm 13:0645d8841f51 21
bogdanm 13:0645d8841f51 22 #ifdef __cplusplus
bogdanm 13:0645d8841f51 23 extern "C" {
bogdanm 13:0645d8841f51 24 #endif
bogdanm 13:0645d8841f51 25
bogdanm 13:0645d8841f51 26 typedef enum {
bogdanm 13:0645d8841f51 27 UART_0 = (int)LPC_UART0_BASE,
bogdanm 13:0645d8841f51 28 UART_1 = (int)LPC_UART1_BASE,
bogdanm 13:0645d8841f51 29 UART_2 = (int)LPC_UART2_BASE,
bogdanm 13:0645d8841f51 30 UART_3 = (int)LPC_UART3_BASE
bogdanm 13:0645d8841f51 31 } UARTName;
bogdanm 13:0645d8841f51 32
bogdanm 13:0645d8841f51 33 typedef enum {
bogdanm 13:0645d8841f51 34 ADC0_0 = 0,
bogdanm 13:0645d8841f51 35 ADC0_1,
bogdanm 13:0645d8841f51 36 ADC0_2,
bogdanm 13:0645d8841f51 37 ADC0_3,
bogdanm 13:0645d8841f51 38 ADC0_4,
bogdanm 13:0645d8841f51 39 ADC0_5,
bogdanm 13:0645d8841f51 40 ADC0_6,
bogdanm 13:0645d8841f51 41 ADC0_7
bogdanm 13:0645d8841f51 42 } ADCName;
bogdanm 13:0645d8841f51 43
bogdanm 13:0645d8841f51 44 typedef enum {
bogdanm 13:0645d8841f51 45 DAC_0 = 0
bogdanm 13:0645d8841f51 46 } DACName;
bogdanm 13:0645d8841f51 47
bogdanm 13:0645d8841f51 48 typedef enum {
bogdanm 13:0645d8841f51 49 SPI_0 = (int)LPC_SSP0_BASE,
bogdanm 13:0645d8841f51 50 SPI_1 = (int)LPC_SSP1_BASE
bogdanm 13:0645d8841f51 51 } SPIName;
bogdanm 13:0645d8841f51 52
bogdanm 13:0645d8841f51 53 typedef enum {
bogdanm 13:0645d8841f51 54 I2C_0 = (int)LPC_I2C0_BASE,
bogdanm 13:0645d8841f51 55 I2C_1 = (int)LPC_I2C1_BASE,
bogdanm 13:0645d8841f51 56 I2C_2 = (int)LPC_I2C2_BASE
bogdanm 13:0645d8841f51 57 } I2CName;
bogdanm 13:0645d8841f51 58
bogdanm 13:0645d8841f51 59 typedef enum {
bogdanm 13:0645d8841f51 60 PWM_1 = 1,
bogdanm 13:0645d8841f51 61 PWM_2,
bogdanm 13:0645d8841f51 62 PWM_3,
bogdanm 13:0645d8841f51 63 PWM_4,
bogdanm 13:0645d8841f51 64 PWM_5,
bogdanm 13:0645d8841f51 65 PWM_6
bogdanm 13:0645d8841f51 66 } PWMName;
bogdanm 13:0645d8841f51 67
bogdanm 13:0645d8841f51 68 typedef enum {
bogdanm 13:0645d8841f51 69 CAN_1 = (int)LPC_CAN1_BASE,
bogdanm 13:0645d8841f51 70 CAN_2 = (int)LPC_CAN2_BASE
bogdanm 13:0645d8841f51 71 } CANName;
bogdanm 13:0645d8841f51 72
bogdanm 13:0645d8841f51 73 #define STDIO_UART_TX USBTX
bogdanm 13:0645d8841f51 74 #define STDIO_UART_RX USBRX
bogdanm 13:0645d8841f51 75 #define STDIO_UART UART_0
bogdanm 13:0645d8841f51 76
mbed_official 50:b08ceb75017d 77 // Default peripherals
mbed_official 50:b08ceb75017d 78 #define MBED_SPI0 p5, p6, p7, p8
mbed_official 50:b08ceb75017d 79 #define MBED_SPI1 p11, p12, p13, p14
mbed_official 50:b08ceb75017d 80
mbed_official 50:b08ceb75017d 81 #define MBED_UART0 p9, p10
mbed_official 50:b08ceb75017d 82 #define MBED_UART1 p13, p14
mbed_official 50:b08ceb75017d 83 #define MBED_UART2 p28, p27
mbed_official 50:b08ceb75017d 84 #define MBED_UARTUSB USBTX, USBRX
mbed_official 50:b08ceb75017d 85
mbed_official 50:b08ceb75017d 86 #define MBED_I2C0 p28, p27
mbed_official 50:b08ceb75017d 87 #define MBED_I2C1 p9, p10
mbed_official 50:b08ceb75017d 88
mbed_official 50:b08ceb75017d 89 #define MBED_CAN0 p30, p29
mbed_official 50:b08ceb75017d 90
mbed_official 50:b08ceb75017d 91 #define MBED_ANALOGOUT0 p18
mbed_official 50:b08ceb75017d 92
mbed_official 50:b08ceb75017d 93 #define MBED_ANALOGIN0 p15
mbed_official 50:b08ceb75017d 94 #define MBED_ANALOGIN1 p16
mbed_official 50:b08ceb75017d 95 #define MBED_ANALOGIN2 p17
mbed_official 50:b08ceb75017d 96 #define MBED_ANALOGIN3 p18
mbed_official 50:b08ceb75017d 97 #define MBED_ANALOGIN4 p19
mbed_official 50:b08ceb75017d 98 #define MBED_ANALOGIN5 p20
mbed_official 50:b08ceb75017d 99
mbed_official 50:b08ceb75017d 100 #define MBED_PWMOUT0 p26
mbed_official 50:b08ceb75017d 101 #define MBED_PWMOUT1 p25
mbed_official 50:b08ceb75017d 102 #define MBED_PWMOUT2 p24
mbed_official 50:b08ceb75017d 103 #define MBED_PWMOUT3 p23
mbed_official 50:b08ceb75017d 104 #define MBED_PWMOUT4 p22
mbed_official 50:b08ceb75017d 105 #define MBED_PWMOUT5 p21
mbed_official 50:b08ceb75017d 106
bogdanm 13:0645d8841f51 107 #ifdef __cplusplus
bogdanm 13:0645d8841f51 108 }
bogdanm 13:0645d8841f51 109 #endif
bogdanm 13:0645d8841f51 110
bogdanm 13:0645d8841f51 111 #endif