Geremia G / mbed-src

- fix F411 F334 systeminit when HSI used - portinout always read IDR regardless of port direction

Fork of mbed-src by mbed official

targets/hal/TARGET_Freescale/TARGET_K20D50M/PeripheralNames.h@332:e299ae530e63, 2014-09-27 (annotated)

Committer:
Geremia
Date:
Sat Sep 27 11:16:28 2014 +0000
Revision:
332:e299ae530e63
Parent:
255:20b371a9491b 
- fix F411 F334 systeminit when HSI used; - STMs PortInOut port.read() always read input data register (real external pin state) even if direction is output (same as other platforms)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 68:41613245dfd7 1 /* mbed Microcontroller Library
mbed_official 68:41613245dfd7 2 * Copyright (c) 2006-2013 ARM Limited
mbed_official 68:41613245dfd7 3 *
mbed_official 68:41613245dfd7 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 68:41613245dfd7 5 * you may not use this file except in compliance with the License.
mbed_official 68:41613245dfd7 6 * You may obtain a copy of the License at
mbed_official 68:41613245dfd7 7 *
mbed_official 68:41613245dfd7 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 68:41613245dfd7 9 *
mbed_official 68:41613245dfd7 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 68:41613245dfd7 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 68:41613245dfd7 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 68:41613245dfd7 13 * See the License for the specific language governing permissions and
mbed_official 68:41613245dfd7 14 * limitations under the License.
mbed_official 68:41613245dfd7 15 */
mbed_official 68:41613245dfd7 16 #ifndef MBED_PERIPHERALNAMES_H
mbed_official 68:41613245dfd7 17 #define MBED_PERIPHERALNAMES_H
mbed_official 68:41613245dfd7 18
mbed_official 68:41613245dfd7 19 #include "cmsis.h"
mbed_official 68:41613245dfd7 20
mbed_official 68:41613245dfd7 21 #ifdef __cplusplus
mbed_official 68:41613245dfd7 22 extern "C" {
mbed_official 68:41613245dfd7 23 #endif
mbed_official 68:41613245dfd7 24
mbed_official 68:41613245dfd7 25 typedef enum {
mbed_official 68:41613245dfd7 26 UART_0 = (int)UART0_BASE,
mbed_official 68:41613245dfd7 27 UART_1 = (int)UART1_BASE,
mbed_official 68:41613245dfd7 28 UART_2 = (int)UART2_BASE
mbed_official 68:41613245dfd7 29 } UARTName;
mbed_official 68:41613245dfd7 30 #define STDIO_UART_TX USBTX
mbed_official 68:41613245dfd7 31 #define STDIO_UART_RX USBRX
mbed_official 68:41613245dfd7 32 #define STDIO_UART UART_0
mbed_official 68:41613245dfd7 33
mbed_official 68:41613245dfd7 34 typedef enum {
mbed_official 68:41613245dfd7 35 I2C_0 = (int)I2C0_BASE,
mbed_official 68:41613245dfd7 36 } I2CName;
mbed_official 68:41613245dfd7 37
mbed_official 68:41613245dfd7 38 #define TPM_SHIFT 8
mbed_official 68:41613245dfd7 39 typedef enum {
mbed_official 68:41613245dfd7 40 PWM_1 = (0 << TPM_SHIFT) | (0), // FTM0 CH0
mbed_official 68:41613245dfd7 41 PWM_2 = (0 << TPM_SHIFT) | (1), // FTM0 CH1
mbed_official 68:41613245dfd7 42 PWM_3 = (0 << TPM_SHIFT) | (2), // FTM0 CH2
mbed_official 68:41613245dfd7 43 PWM_4 = (0 << TPM_SHIFT) | (3), // FTM0 CH3
mbed_official 68:41613245dfd7 44 PWM_5 = (0 << TPM_SHIFT) | (4), // FTM0 CH4
mbed_official 68:41613245dfd7 45 PWM_6 = (0 << TPM_SHIFT) | (5), // FTM0 CH5
mbed_official 68:41613245dfd7 46 PWM_7 = (0 << TPM_SHIFT) | (6), // FTM0 CH6
mbed_official 68:41613245dfd7 47 PWM_8 = (0 << TPM_SHIFT) | (7), // FTM0 CH7
mbed_official 68:41613245dfd7 48 PWM_9 = (1 << TPM_SHIFT) | (0), // FTM1 CH0
mbed_official 68:41613245dfd7 49 PWM_10 = (1 << TPM_SHIFT) | (1), // FTM1 CH1
mbed_official 68:41613245dfd7 50 } PWMName;
mbed_official 68:41613245dfd7 51
mbed_official 68:41613245dfd7 52 typedef enum {
mbed_official 68:41613245dfd7 53 ADC0_SE4b = 4,
mbed_official 68:41613245dfd7 54 ADC0_SE5b = 5,
mbed_official 68:41613245dfd7 55 ADC0_SE6b = 6,
mbed_official 68:41613245dfd7 56 ADC0_SE7b = 7,
mbed_official 68:41613245dfd7 57 ADC0_SE8 = 8,
mbed_official 68:41613245dfd7 58 ADC0_SE9 = 9,
mbed_official 68:41613245dfd7 59 ADC0_SE12 = 12,
mbed_official 68:41613245dfd7 60 ADC0_SE13 = 13,
mbed_official 68:41613245dfd7 61 ADC0_SE14 = 14,
mbed_official 68:41613245dfd7 62 ADC0_SE15 = 15
mbed_official 68:41613245dfd7 63 } ADCName;
mbed_official 68:41613245dfd7 64
mbed_official 68:41613245dfd7 65 typedef enum {
mbed_official 68:41613245dfd7 66 DAC_0 = 0
mbed_official 68:41613245dfd7 67 } DACName;
mbed_official 68:41613245dfd7 68
mbed_official 68:41613245dfd7 69
mbed_official 68:41613245dfd7 70 typedef enum {
mbed_official 68:41613245dfd7 71 SPI_0 = (int)SPI0_BASE,
mbed_official 68:41613245dfd7 72 } SPIName;
mbed_official 68:41613245dfd7 73
mbed_official 68:41613245dfd7 74 #ifdef __cplusplus
mbed_official 68:41613245dfd7 75 }
mbed_official 68:41613245dfd7 76 #endif
mbed_official 68:41613245dfd7 77
mbed_official 68:41613245dfd7 78 #endif