- fix F411 F334 systeminit when HSI used - portinout always read IDR regardless of port direction

Fork of mbed-src by mbed official

Committer:
Geremia
Date:
Sat Sep 27 11:16:28 2014 +0000
Revision:
332:e299ae530e63
Parent:
13:0645d8841f51
- fix F411 F334 systeminit when HSI used; - STMs PortInOut port.read() always read input data register (real external pin state) even if direction is output (same as other platforms)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 13:0645d8841f51 1 /**************************************************************************//**
bogdanm 13:0645d8841f51 2 * @file core_cmFunc.h
bogdanm 13:0645d8841f51 3 * @brief CMSIS Cortex-M Core Function Access Header File
bogdanm 13:0645d8841f51 4 * @version V3.20
bogdanm 13:0645d8841f51 5 * @date 25. February 2013
bogdanm 13:0645d8841f51 6 *
bogdanm 13:0645d8841f51 7 * @note
bogdanm 13:0645d8841f51 8 *
bogdanm 13:0645d8841f51 9 ******************************************************************************/
bogdanm 13:0645d8841f51 10 /* Copyright (c) 2009 - 2013 ARM LIMITED
bogdanm 13:0645d8841f51 11
bogdanm 13:0645d8841f51 12 All rights reserved.
bogdanm 13:0645d8841f51 13 Redistribution and use in source and binary forms, with or without
bogdanm 13:0645d8841f51 14 modification, are permitted provided that the following conditions are met:
bogdanm 13:0645d8841f51 15 - Redistributions of source code must retain the above copyright
bogdanm 13:0645d8841f51 16 notice, this list of conditions and the following disclaimer.
bogdanm 13:0645d8841f51 17 - Redistributions in binary form must reproduce the above copyright
bogdanm 13:0645d8841f51 18 notice, this list of conditions and the following disclaimer in the
bogdanm 13:0645d8841f51 19 documentation and/or other materials provided with the distribution.
bogdanm 13:0645d8841f51 20 - Neither the name of ARM nor the names of its contributors may be used
bogdanm 13:0645d8841f51 21 to endorse or promote products derived from this software without
bogdanm 13:0645d8841f51 22 specific prior written permission.
bogdanm 13:0645d8841f51 23 *
bogdanm 13:0645d8841f51 24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm 13:0645d8841f51 25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm 13:0645d8841f51 26 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
bogdanm 13:0645d8841f51 27 ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
bogdanm 13:0645d8841f51 28 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
bogdanm 13:0645d8841f51 29 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
bogdanm 13:0645d8841f51 30 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
bogdanm 13:0645d8841f51 31 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
bogdanm 13:0645d8841f51 32 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
bogdanm 13:0645d8841f51 33 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
bogdanm 13:0645d8841f51 34 POSSIBILITY OF SUCH DAMAGE.
bogdanm 13:0645d8841f51 35 ---------------------------------------------------------------------------*/
bogdanm 13:0645d8841f51 36
bogdanm 13:0645d8841f51 37
bogdanm 13:0645d8841f51 38 #ifndef __CORE_CMFUNC_H
bogdanm 13:0645d8841f51 39 #define __CORE_CMFUNC_H
bogdanm 13:0645d8841f51 40
bogdanm 13:0645d8841f51 41
bogdanm 13:0645d8841f51 42 /* ########################### Core Function Access ########################### */
bogdanm 13:0645d8841f51 43 /** \ingroup CMSIS_Core_FunctionInterface
bogdanm 13:0645d8841f51 44 \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
bogdanm 13:0645d8841f51 45 @{
bogdanm 13:0645d8841f51 46 */
bogdanm 13:0645d8841f51 47
bogdanm 13:0645d8841f51 48 #if defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
bogdanm 13:0645d8841f51 49 /* ARM armcc specific functions */
bogdanm 13:0645d8841f51 50
bogdanm 13:0645d8841f51 51 #if (__ARMCC_VERSION < 400677)
bogdanm 13:0645d8841f51 52 #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
bogdanm 13:0645d8841f51 53 #endif
bogdanm 13:0645d8841f51 54
bogdanm 13:0645d8841f51 55 /* intrinsic void __enable_irq(); */
bogdanm 13:0645d8841f51 56 /* intrinsic void __disable_irq(); */
bogdanm 13:0645d8841f51 57
bogdanm 13:0645d8841f51 58 /** \brief Get Control Register
bogdanm 13:0645d8841f51 59
bogdanm 13:0645d8841f51 60 This function returns the content of the Control Register.
bogdanm 13:0645d8841f51 61
bogdanm 13:0645d8841f51 62 \return Control Register value
bogdanm 13:0645d8841f51 63 */
bogdanm 13:0645d8841f51 64 __STATIC_INLINE uint32_t __get_CONTROL(void)
bogdanm 13:0645d8841f51 65 {
bogdanm 13:0645d8841f51 66 register uint32_t __regControl __ASM("control");
bogdanm 13:0645d8841f51 67 return(__regControl);
bogdanm 13:0645d8841f51 68 }
bogdanm 13:0645d8841f51 69
bogdanm 13:0645d8841f51 70
bogdanm 13:0645d8841f51 71 /** \brief Set Control Register
bogdanm 13:0645d8841f51 72
bogdanm 13:0645d8841f51 73 This function writes the given value to the Control Register.
bogdanm 13:0645d8841f51 74
bogdanm 13:0645d8841f51 75 \param [in] control Control Register value to set
bogdanm 13:0645d8841f51 76 */
bogdanm 13:0645d8841f51 77 __STATIC_INLINE void __set_CONTROL(uint32_t control)
bogdanm 13:0645d8841f51 78 {
bogdanm 13:0645d8841f51 79 register uint32_t __regControl __ASM("control");
bogdanm 13:0645d8841f51 80 __regControl = control;
bogdanm 13:0645d8841f51 81 }
bogdanm 13:0645d8841f51 82
bogdanm 13:0645d8841f51 83
bogdanm 13:0645d8841f51 84 /** \brief Get IPSR Register
bogdanm 13:0645d8841f51 85
bogdanm 13:0645d8841f51 86 This function returns the content of the IPSR Register.
bogdanm 13:0645d8841f51 87
bogdanm 13:0645d8841f51 88 \return IPSR Register value
bogdanm 13:0645d8841f51 89 */
bogdanm 13:0645d8841f51 90 __STATIC_INLINE uint32_t __get_IPSR(void)
bogdanm 13:0645d8841f51 91 {
bogdanm 13:0645d8841f51 92 register uint32_t __regIPSR __ASM("ipsr");
bogdanm 13:0645d8841f51 93 return(__regIPSR);
bogdanm 13:0645d8841f51 94 }
bogdanm 13:0645d8841f51 95
bogdanm 13:0645d8841f51 96
bogdanm 13:0645d8841f51 97 /** \brief Get APSR Register
bogdanm 13:0645d8841f51 98
bogdanm 13:0645d8841f51 99 This function returns the content of the APSR Register.
bogdanm 13:0645d8841f51 100
bogdanm 13:0645d8841f51 101 \return APSR Register value
bogdanm 13:0645d8841f51 102 */
bogdanm 13:0645d8841f51 103 __STATIC_INLINE uint32_t __get_APSR(void)
bogdanm 13:0645d8841f51 104 {
bogdanm 13:0645d8841f51 105 register uint32_t __regAPSR __ASM("apsr");
bogdanm 13:0645d8841f51 106 return(__regAPSR);
bogdanm 13:0645d8841f51 107 }
bogdanm 13:0645d8841f51 108
bogdanm 13:0645d8841f51 109
bogdanm 13:0645d8841f51 110 /** \brief Get xPSR Register
bogdanm 13:0645d8841f51 111
bogdanm 13:0645d8841f51 112 This function returns the content of the xPSR Register.
bogdanm 13:0645d8841f51 113
bogdanm 13:0645d8841f51 114 \return xPSR Register value
bogdanm 13:0645d8841f51 115 */
bogdanm 13:0645d8841f51 116 __STATIC_INLINE uint32_t __get_xPSR(void)
bogdanm 13:0645d8841f51 117 {
bogdanm 13:0645d8841f51 118 register uint32_t __regXPSR __ASM("xpsr");
bogdanm 13:0645d8841f51 119 return(__regXPSR);
bogdanm 13:0645d8841f51 120 }
bogdanm 13:0645d8841f51 121
bogdanm 13:0645d8841f51 122
bogdanm 13:0645d8841f51 123 /** \brief Get Process Stack Pointer
bogdanm 13:0645d8841f51 124
bogdanm 13:0645d8841f51 125 This function returns the current value of the Process Stack Pointer (PSP).
bogdanm 13:0645d8841f51 126
bogdanm 13:0645d8841f51 127 \return PSP Register value
bogdanm 13:0645d8841f51 128 */
bogdanm 13:0645d8841f51 129 __STATIC_INLINE uint32_t __get_PSP(void)
bogdanm 13:0645d8841f51 130 {
bogdanm 13:0645d8841f51 131 register uint32_t __regProcessStackPointer __ASM("psp");
bogdanm 13:0645d8841f51 132 return(__regProcessStackPointer);
bogdanm 13:0645d8841f51 133 }
bogdanm 13:0645d8841f51 134
bogdanm 13:0645d8841f51 135
bogdanm 13:0645d8841f51 136 /** \brief Set Process Stack Pointer
bogdanm 13:0645d8841f51 137
bogdanm 13:0645d8841f51 138 This function assigns the given value to the Process Stack Pointer (PSP).
bogdanm 13:0645d8841f51 139
bogdanm 13:0645d8841f51 140 \param [in] topOfProcStack Process Stack Pointer value to set
bogdanm 13:0645d8841f51 141 */
bogdanm 13:0645d8841f51 142 __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
bogdanm 13:0645d8841f51 143 {
bogdanm 13:0645d8841f51 144 register uint32_t __regProcessStackPointer __ASM("psp");
bogdanm 13:0645d8841f51 145 __regProcessStackPointer = topOfProcStack;
bogdanm 13:0645d8841f51 146 }
bogdanm 13:0645d8841f51 147
bogdanm 13:0645d8841f51 148
bogdanm 13:0645d8841f51 149 /** \brief Get Main Stack Pointer
bogdanm 13:0645d8841f51 150
bogdanm 13:0645d8841f51 151 This function returns the current value of the Main Stack Pointer (MSP).
bogdanm 13:0645d8841f51 152
bogdanm 13:0645d8841f51 153 \return MSP Register value
bogdanm 13:0645d8841f51 154 */
bogdanm 13:0645d8841f51 155 __STATIC_INLINE uint32_t __get_MSP(void)
bogdanm 13:0645d8841f51 156 {
bogdanm 13:0645d8841f51 157 register uint32_t __regMainStackPointer __ASM("msp");
bogdanm 13:0645d8841f51 158 return(__regMainStackPointer);
bogdanm 13:0645d8841f51 159 }
bogdanm 13:0645d8841f51 160
bogdanm 13:0645d8841f51 161
bogdanm 13:0645d8841f51 162 /** \brief Set Main Stack Pointer
bogdanm 13:0645d8841f51 163
bogdanm 13:0645d8841f51 164 This function assigns the given value to the Main Stack Pointer (MSP).
bogdanm 13:0645d8841f51 165
bogdanm 13:0645d8841f51 166 \param [in] topOfMainStack Main Stack Pointer value to set
bogdanm 13:0645d8841f51 167 */
bogdanm 13:0645d8841f51 168 __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
bogdanm 13:0645d8841f51 169 {
bogdanm 13:0645d8841f51 170 register uint32_t __regMainStackPointer __ASM("msp");
bogdanm 13:0645d8841f51 171 __regMainStackPointer = topOfMainStack;
bogdanm 13:0645d8841f51 172 }
bogdanm 13:0645d8841f51 173
bogdanm 13:0645d8841f51 174
bogdanm 13:0645d8841f51 175 /** \brief Get Priority Mask
bogdanm 13:0645d8841f51 176
bogdanm 13:0645d8841f51 177 This function returns the current state of the priority mask bit from the Priority Mask Register.
bogdanm 13:0645d8841f51 178
bogdanm 13:0645d8841f51 179 \return Priority Mask value
bogdanm 13:0645d8841f51 180 */
bogdanm 13:0645d8841f51 181 __STATIC_INLINE uint32_t __get_PRIMASK(void)
bogdanm 13:0645d8841f51 182 {
bogdanm 13:0645d8841f51 183 register uint32_t __regPriMask __ASM("primask");
bogdanm 13:0645d8841f51 184 return(__regPriMask);
bogdanm 13:0645d8841f51 185 }
bogdanm 13:0645d8841f51 186
bogdanm 13:0645d8841f51 187
bogdanm 13:0645d8841f51 188 /** \brief Set Priority Mask
bogdanm 13:0645d8841f51 189
bogdanm 13:0645d8841f51 190 This function assigns the given value to the Priority Mask Register.
bogdanm 13:0645d8841f51 191
bogdanm 13:0645d8841f51 192 \param [in] priMask Priority Mask
bogdanm 13:0645d8841f51 193 */
bogdanm 13:0645d8841f51 194 __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
bogdanm 13:0645d8841f51 195 {
bogdanm 13:0645d8841f51 196 register uint32_t __regPriMask __ASM("primask");
bogdanm 13:0645d8841f51 197 __regPriMask = (priMask);
bogdanm 13:0645d8841f51 198 }
bogdanm 13:0645d8841f51 199
bogdanm 13:0645d8841f51 200
bogdanm 13:0645d8841f51 201 #if (__CORTEX_M >= 0x03)
bogdanm 13:0645d8841f51 202
bogdanm 13:0645d8841f51 203 /** \brief Enable FIQ
bogdanm 13:0645d8841f51 204
bogdanm 13:0645d8841f51 205 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
bogdanm 13:0645d8841f51 206 Can only be executed in Privileged modes.
bogdanm 13:0645d8841f51 207 */
bogdanm 13:0645d8841f51 208 #define __enable_fault_irq __enable_fiq
bogdanm 13:0645d8841f51 209
bogdanm 13:0645d8841f51 210
bogdanm 13:0645d8841f51 211 /** \brief Disable FIQ
bogdanm 13:0645d8841f51 212
bogdanm 13:0645d8841f51 213 This function disables FIQ interrupts by setting the F-bit in the CPSR.
bogdanm 13:0645d8841f51 214 Can only be executed in Privileged modes.
bogdanm 13:0645d8841f51 215 */
bogdanm 13:0645d8841f51 216 #define __disable_fault_irq __disable_fiq
bogdanm 13:0645d8841f51 217
bogdanm 13:0645d8841f51 218
bogdanm 13:0645d8841f51 219 /** \brief Get Base Priority
bogdanm 13:0645d8841f51 220
bogdanm 13:0645d8841f51 221 This function returns the current value of the Base Priority register.
bogdanm 13:0645d8841f51 222
bogdanm 13:0645d8841f51 223 \return Base Priority register value
bogdanm 13:0645d8841f51 224 */
bogdanm 13:0645d8841f51 225 __STATIC_INLINE uint32_t __get_BASEPRI(void)
bogdanm 13:0645d8841f51 226 {
bogdanm 13:0645d8841f51 227 register uint32_t __regBasePri __ASM("basepri");
bogdanm 13:0645d8841f51 228 return(__regBasePri);
bogdanm 13:0645d8841f51 229 }
bogdanm 13:0645d8841f51 230
bogdanm 13:0645d8841f51 231
bogdanm 13:0645d8841f51 232 /** \brief Set Base Priority
bogdanm 13:0645d8841f51 233
bogdanm 13:0645d8841f51 234 This function assigns the given value to the Base Priority register.
bogdanm 13:0645d8841f51 235
bogdanm 13:0645d8841f51 236 \param [in] basePri Base Priority value to set
bogdanm 13:0645d8841f51 237 */
bogdanm 13:0645d8841f51 238 __STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
bogdanm 13:0645d8841f51 239 {
bogdanm 13:0645d8841f51 240 register uint32_t __regBasePri __ASM("basepri");
bogdanm 13:0645d8841f51 241 __regBasePri = (basePri & 0xff);
bogdanm 13:0645d8841f51 242 }
bogdanm 13:0645d8841f51 243
bogdanm 13:0645d8841f51 244
bogdanm 13:0645d8841f51 245 /** \brief Get Fault Mask
bogdanm 13:0645d8841f51 246
bogdanm 13:0645d8841f51 247 This function returns the current value of the Fault Mask register.
bogdanm 13:0645d8841f51 248
bogdanm 13:0645d8841f51 249 \return Fault Mask register value
bogdanm 13:0645d8841f51 250 */
bogdanm 13:0645d8841f51 251 __STATIC_INLINE uint32_t __get_FAULTMASK(void)
bogdanm 13:0645d8841f51 252 {
bogdanm 13:0645d8841f51 253 register uint32_t __regFaultMask __ASM("faultmask");
bogdanm 13:0645d8841f51 254 return(__regFaultMask);
bogdanm 13:0645d8841f51 255 }
bogdanm 13:0645d8841f51 256
bogdanm 13:0645d8841f51 257
bogdanm 13:0645d8841f51 258 /** \brief Set Fault Mask
bogdanm 13:0645d8841f51 259
bogdanm 13:0645d8841f51 260 This function assigns the given value to the Fault Mask register.
bogdanm 13:0645d8841f51 261
bogdanm 13:0645d8841f51 262 \param [in] faultMask Fault Mask value to set
bogdanm 13:0645d8841f51 263 */
bogdanm 13:0645d8841f51 264 __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
bogdanm 13:0645d8841f51 265 {
bogdanm 13:0645d8841f51 266 register uint32_t __regFaultMask __ASM("faultmask");
bogdanm 13:0645d8841f51 267 __regFaultMask = (faultMask & (uint32_t)1);
bogdanm 13:0645d8841f51 268 }
bogdanm 13:0645d8841f51 269
bogdanm 13:0645d8841f51 270 #endif /* (__CORTEX_M >= 0x03) */
bogdanm 13:0645d8841f51 271
bogdanm 13:0645d8841f51 272
bogdanm 13:0645d8841f51 273 #if (__CORTEX_M == 0x04)
bogdanm 13:0645d8841f51 274
bogdanm 13:0645d8841f51 275 /** \brief Get FPSCR
bogdanm 13:0645d8841f51 276
bogdanm 13:0645d8841f51 277 This function returns the current value of the Floating Point Status/Control register.
bogdanm 13:0645d8841f51 278
bogdanm 13:0645d8841f51 279 \return Floating Point Status/Control register value
bogdanm 13:0645d8841f51 280 */
bogdanm 13:0645d8841f51 281 __STATIC_INLINE uint32_t __get_FPSCR(void)
bogdanm 13:0645d8841f51 282 {
bogdanm 13:0645d8841f51 283 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
bogdanm 13:0645d8841f51 284 register uint32_t __regfpscr __ASM("fpscr");
bogdanm 13:0645d8841f51 285 return(__regfpscr);
bogdanm 13:0645d8841f51 286 #else
bogdanm 13:0645d8841f51 287 return(0);
bogdanm 13:0645d8841f51 288 #endif
bogdanm 13:0645d8841f51 289 }
bogdanm 13:0645d8841f51 290
bogdanm 13:0645d8841f51 291
bogdanm 13:0645d8841f51 292 /** \brief Set FPSCR
bogdanm 13:0645d8841f51 293
bogdanm 13:0645d8841f51 294 This function assigns the given value to the Floating Point Status/Control register.
bogdanm 13:0645d8841f51 295
bogdanm 13:0645d8841f51 296 \param [in] fpscr Floating Point Status/Control value to set
bogdanm 13:0645d8841f51 297 */
bogdanm 13:0645d8841f51 298 __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
bogdanm 13:0645d8841f51 299 {
bogdanm 13:0645d8841f51 300 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
bogdanm 13:0645d8841f51 301 register uint32_t __regfpscr __ASM("fpscr");
bogdanm 13:0645d8841f51 302 __regfpscr = (fpscr);
bogdanm 13:0645d8841f51 303 #endif
bogdanm 13:0645d8841f51 304 }
bogdanm 13:0645d8841f51 305
bogdanm 13:0645d8841f51 306 #endif /* (__CORTEX_M == 0x04) */
bogdanm 13:0645d8841f51 307
bogdanm 13:0645d8841f51 308
bogdanm 13:0645d8841f51 309 #elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
bogdanm 13:0645d8841f51 310 /* IAR iccarm specific functions */
bogdanm 13:0645d8841f51 311
bogdanm 13:0645d8841f51 312 #include <cmsis_iar.h>
bogdanm 13:0645d8841f51 313
bogdanm 13:0645d8841f51 314
bogdanm 13:0645d8841f51 315 #elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
bogdanm 13:0645d8841f51 316 /* TI CCS specific functions */
bogdanm 13:0645d8841f51 317
bogdanm 13:0645d8841f51 318 #include <cmsis_ccs.h>
bogdanm 13:0645d8841f51 319
bogdanm 13:0645d8841f51 320
bogdanm 13:0645d8841f51 321 #elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
bogdanm 13:0645d8841f51 322 /* GNU gcc specific functions */
bogdanm 13:0645d8841f51 323
bogdanm 13:0645d8841f51 324 /** \brief Enable IRQ Interrupts
bogdanm 13:0645d8841f51 325
bogdanm 13:0645d8841f51 326 This function enables IRQ interrupts by clearing the I-bit in the CPSR.
bogdanm 13:0645d8841f51 327 Can only be executed in Privileged modes.
bogdanm 13:0645d8841f51 328 */
bogdanm 13:0645d8841f51 329 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
bogdanm 13:0645d8841f51 330 {
bogdanm 13:0645d8841f51 331 __ASM volatile ("cpsie i" : : : "memory");
bogdanm 13:0645d8841f51 332 }
bogdanm 13:0645d8841f51 333
bogdanm 13:0645d8841f51 334
bogdanm 13:0645d8841f51 335 /** \brief Disable IRQ Interrupts
bogdanm 13:0645d8841f51 336
bogdanm 13:0645d8841f51 337 This function disables IRQ interrupts by setting the I-bit in the CPSR.
bogdanm 13:0645d8841f51 338 Can only be executed in Privileged modes.
bogdanm 13:0645d8841f51 339 */
bogdanm 13:0645d8841f51 340 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
bogdanm 13:0645d8841f51 341 {
bogdanm 13:0645d8841f51 342 __ASM volatile ("cpsid i" : : : "memory");
bogdanm 13:0645d8841f51 343 }
bogdanm 13:0645d8841f51 344
bogdanm 13:0645d8841f51 345
bogdanm 13:0645d8841f51 346 /** \brief Get Control Register
bogdanm 13:0645d8841f51 347
bogdanm 13:0645d8841f51 348 This function returns the content of the Control Register.
bogdanm 13:0645d8841f51 349
bogdanm 13:0645d8841f51 350 \return Control Register value
bogdanm 13:0645d8841f51 351 */
bogdanm 13:0645d8841f51 352 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
bogdanm 13:0645d8841f51 353 {
bogdanm 13:0645d8841f51 354 uint32_t result;
bogdanm 13:0645d8841f51 355
bogdanm 13:0645d8841f51 356 __ASM volatile ("MRS %0, control" : "=r" (result) );
bogdanm 13:0645d8841f51 357 return(result);
bogdanm 13:0645d8841f51 358 }
bogdanm 13:0645d8841f51 359
bogdanm 13:0645d8841f51 360
bogdanm 13:0645d8841f51 361 /** \brief Set Control Register
bogdanm 13:0645d8841f51 362
bogdanm 13:0645d8841f51 363 This function writes the given value to the Control Register.
bogdanm 13:0645d8841f51 364
bogdanm 13:0645d8841f51 365 \param [in] control Control Register value to set
bogdanm 13:0645d8841f51 366 */
bogdanm 13:0645d8841f51 367 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
bogdanm 13:0645d8841f51 368 {
bogdanm 13:0645d8841f51 369 __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
bogdanm 13:0645d8841f51 370 }
bogdanm 13:0645d8841f51 371
bogdanm 13:0645d8841f51 372
bogdanm 13:0645d8841f51 373 /** \brief Get IPSR Register
bogdanm 13:0645d8841f51 374
bogdanm 13:0645d8841f51 375 This function returns the content of the IPSR Register.
bogdanm 13:0645d8841f51 376
bogdanm 13:0645d8841f51 377 \return IPSR Register value
bogdanm 13:0645d8841f51 378 */
bogdanm 13:0645d8841f51 379 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
bogdanm 13:0645d8841f51 380 {
bogdanm 13:0645d8841f51 381 uint32_t result;
bogdanm 13:0645d8841f51 382
bogdanm 13:0645d8841f51 383 __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
bogdanm 13:0645d8841f51 384 return(result);
bogdanm 13:0645d8841f51 385 }
bogdanm 13:0645d8841f51 386
bogdanm 13:0645d8841f51 387
bogdanm 13:0645d8841f51 388 /** \brief Get APSR Register
bogdanm 13:0645d8841f51 389
bogdanm 13:0645d8841f51 390 This function returns the content of the APSR Register.
bogdanm 13:0645d8841f51 391
bogdanm 13:0645d8841f51 392 \return APSR Register value
bogdanm 13:0645d8841f51 393 */
bogdanm 13:0645d8841f51 394 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
bogdanm 13:0645d8841f51 395 {
bogdanm 13:0645d8841f51 396 uint32_t result;
bogdanm 13:0645d8841f51 397
bogdanm 13:0645d8841f51 398 __ASM volatile ("MRS %0, apsr" : "=r" (result) );
bogdanm 13:0645d8841f51 399 return(result);
bogdanm 13:0645d8841f51 400 }
bogdanm 13:0645d8841f51 401
bogdanm 13:0645d8841f51 402
bogdanm 13:0645d8841f51 403 /** \brief Get xPSR Register
bogdanm 13:0645d8841f51 404
bogdanm 13:0645d8841f51 405 This function returns the content of the xPSR Register.
bogdanm 13:0645d8841f51 406
bogdanm 13:0645d8841f51 407 \return xPSR Register value
bogdanm 13:0645d8841f51 408 */
bogdanm 13:0645d8841f51 409 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
bogdanm 13:0645d8841f51 410 {
bogdanm 13:0645d8841f51 411 uint32_t result;
bogdanm 13:0645d8841f51 412
bogdanm 13:0645d8841f51 413 __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
bogdanm 13:0645d8841f51 414 return(result);
bogdanm 13:0645d8841f51 415 }
bogdanm 13:0645d8841f51 416
bogdanm 13:0645d8841f51 417
bogdanm 13:0645d8841f51 418 /** \brief Get Process Stack Pointer
bogdanm 13:0645d8841f51 419
bogdanm 13:0645d8841f51 420 This function returns the current value of the Process Stack Pointer (PSP).
bogdanm 13:0645d8841f51 421
bogdanm 13:0645d8841f51 422 \return PSP Register value
bogdanm 13:0645d8841f51 423 */
bogdanm 13:0645d8841f51 424 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
bogdanm 13:0645d8841f51 425 {
bogdanm 13:0645d8841f51 426 register uint32_t result;
bogdanm 13:0645d8841f51 427
bogdanm 13:0645d8841f51 428 __ASM volatile ("MRS %0, psp\n" : "=r" (result) );
bogdanm 13:0645d8841f51 429 return(result);
bogdanm 13:0645d8841f51 430 }
bogdanm 13:0645d8841f51 431
bogdanm 13:0645d8841f51 432
bogdanm 13:0645d8841f51 433 /** \brief Set Process Stack Pointer
bogdanm 13:0645d8841f51 434
bogdanm 13:0645d8841f51 435 This function assigns the given value to the Process Stack Pointer (PSP).
bogdanm 13:0645d8841f51 436
bogdanm 13:0645d8841f51 437 \param [in] topOfProcStack Process Stack Pointer value to set
bogdanm 13:0645d8841f51 438 */
bogdanm 13:0645d8841f51 439 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
bogdanm 13:0645d8841f51 440 {
bogdanm 13:0645d8841f51 441 __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp");
bogdanm 13:0645d8841f51 442 }
bogdanm 13:0645d8841f51 443
bogdanm 13:0645d8841f51 444
bogdanm 13:0645d8841f51 445 /** \brief Get Main Stack Pointer
bogdanm 13:0645d8841f51 446
bogdanm 13:0645d8841f51 447 This function returns the current value of the Main Stack Pointer (MSP).
bogdanm 13:0645d8841f51 448
bogdanm 13:0645d8841f51 449 \return MSP Register value
bogdanm 13:0645d8841f51 450 */
bogdanm 13:0645d8841f51 451 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
bogdanm 13:0645d8841f51 452 {
bogdanm 13:0645d8841f51 453 register uint32_t result;
bogdanm 13:0645d8841f51 454
bogdanm 13:0645d8841f51 455 __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
bogdanm 13:0645d8841f51 456 return(result);
bogdanm 13:0645d8841f51 457 }
bogdanm 13:0645d8841f51 458
bogdanm 13:0645d8841f51 459
bogdanm 13:0645d8841f51 460 /** \brief Set Main Stack Pointer
bogdanm 13:0645d8841f51 461
bogdanm 13:0645d8841f51 462 This function assigns the given value to the Main Stack Pointer (MSP).
bogdanm 13:0645d8841f51 463
bogdanm 13:0645d8841f51 464 \param [in] topOfMainStack Main Stack Pointer value to set
bogdanm 13:0645d8841f51 465 */
bogdanm 13:0645d8841f51 466 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
bogdanm 13:0645d8841f51 467 {
bogdanm 13:0645d8841f51 468 __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
bogdanm 13:0645d8841f51 469 }
bogdanm 13:0645d8841f51 470
bogdanm 13:0645d8841f51 471
bogdanm 13:0645d8841f51 472 /** \brief Get Priority Mask
bogdanm 13:0645d8841f51 473
bogdanm 13:0645d8841f51 474 This function returns the current state of the priority mask bit from the Priority Mask Register.
bogdanm 13:0645d8841f51 475
bogdanm 13:0645d8841f51 476 \return Priority Mask value
bogdanm 13:0645d8841f51 477 */
bogdanm 13:0645d8841f51 478 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
bogdanm 13:0645d8841f51 479 {
bogdanm 13:0645d8841f51 480 uint32_t result;
bogdanm 13:0645d8841f51 481
bogdanm 13:0645d8841f51 482 __ASM volatile ("MRS %0, primask" : "=r" (result) );
bogdanm 13:0645d8841f51 483 return(result);
bogdanm 13:0645d8841f51 484 }
bogdanm 13:0645d8841f51 485
bogdanm 13:0645d8841f51 486
bogdanm 13:0645d8841f51 487 /** \brief Set Priority Mask
bogdanm 13:0645d8841f51 488
bogdanm 13:0645d8841f51 489 This function assigns the given value to the Priority Mask Register.
bogdanm 13:0645d8841f51 490
bogdanm 13:0645d8841f51 491 \param [in] priMask Priority Mask
bogdanm 13:0645d8841f51 492 */
bogdanm 13:0645d8841f51 493 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
bogdanm 13:0645d8841f51 494 {
bogdanm 13:0645d8841f51 495 __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
bogdanm 13:0645d8841f51 496 }
bogdanm 13:0645d8841f51 497
bogdanm 13:0645d8841f51 498
bogdanm 13:0645d8841f51 499 #if (__CORTEX_M >= 0x03)
bogdanm 13:0645d8841f51 500
bogdanm 13:0645d8841f51 501 /** \brief Enable FIQ
bogdanm 13:0645d8841f51 502
bogdanm 13:0645d8841f51 503 This function enables FIQ interrupts by clearing the F-bit in the CPSR.
bogdanm 13:0645d8841f51 504 Can only be executed in Privileged modes.
bogdanm 13:0645d8841f51 505 */
bogdanm 13:0645d8841f51 506 __attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
bogdanm 13:0645d8841f51 507 {
bogdanm 13:0645d8841f51 508 __ASM volatile ("cpsie f" : : : "memory");
bogdanm 13:0645d8841f51 509 }
bogdanm 13:0645d8841f51 510
bogdanm 13:0645d8841f51 511
bogdanm 13:0645d8841f51 512 /** \brief Disable FIQ
bogdanm 13:0645d8841f51 513
bogdanm 13:0645d8841f51 514 This function disables FIQ interrupts by setting the F-bit in the CPSR.
bogdanm 13:0645d8841f51 515 Can only be executed in Privileged modes.
bogdanm 13:0645d8841f51 516 */
bogdanm 13:0645d8841f51 517 __attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
bogdanm 13:0645d8841f51 518 {
bogdanm 13:0645d8841f51 519 __ASM volatile ("cpsid f" : : : "memory");
bogdanm 13:0645d8841f51 520 }
bogdanm 13:0645d8841f51 521
bogdanm 13:0645d8841f51 522
bogdanm 13:0645d8841f51 523 /** \brief Get Base Priority
bogdanm 13:0645d8841f51 524
bogdanm 13:0645d8841f51 525 This function returns the current value of the Base Priority register.
bogdanm 13:0645d8841f51 526
bogdanm 13:0645d8841f51 527 \return Base Priority register value
bogdanm 13:0645d8841f51 528 */
bogdanm 13:0645d8841f51 529 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
bogdanm 13:0645d8841f51 530 {
bogdanm 13:0645d8841f51 531 uint32_t result;
bogdanm 13:0645d8841f51 532
bogdanm 13:0645d8841f51 533 __ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
bogdanm 13:0645d8841f51 534 return(result);
bogdanm 13:0645d8841f51 535 }
bogdanm 13:0645d8841f51 536
bogdanm 13:0645d8841f51 537
bogdanm 13:0645d8841f51 538 /** \brief Set Base Priority
bogdanm 13:0645d8841f51 539
bogdanm 13:0645d8841f51 540 This function assigns the given value to the Base Priority register.
bogdanm 13:0645d8841f51 541
bogdanm 13:0645d8841f51 542 \param [in] basePri Base Priority value to set
bogdanm 13:0645d8841f51 543 */
bogdanm 13:0645d8841f51 544 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
bogdanm 13:0645d8841f51 545 {
bogdanm 13:0645d8841f51 546 __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
bogdanm 13:0645d8841f51 547 }
bogdanm 13:0645d8841f51 548
bogdanm 13:0645d8841f51 549
bogdanm 13:0645d8841f51 550 /** \brief Get Fault Mask
bogdanm 13:0645d8841f51 551
bogdanm 13:0645d8841f51 552 This function returns the current value of the Fault Mask register.
bogdanm 13:0645d8841f51 553
bogdanm 13:0645d8841f51 554 \return Fault Mask register value
bogdanm 13:0645d8841f51 555 */
bogdanm 13:0645d8841f51 556 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
bogdanm 13:0645d8841f51 557 {
bogdanm 13:0645d8841f51 558 uint32_t result;
bogdanm 13:0645d8841f51 559
bogdanm 13:0645d8841f51 560 __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
bogdanm 13:0645d8841f51 561 return(result);
bogdanm 13:0645d8841f51 562 }
bogdanm 13:0645d8841f51 563
bogdanm 13:0645d8841f51 564
bogdanm 13:0645d8841f51 565 /** \brief Set Fault Mask
bogdanm 13:0645d8841f51 566
bogdanm 13:0645d8841f51 567 This function assigns the given value to the Fault Mask register.
bogdanm 13:0645d8841f51 568
bogdanm 13:0645d8841f51 569 \param [in] faultMask Fault Mask value to set
bogdanm 13:0645d8841f51 570 */
bogdanm 13:0645d8841f51 571 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
bogdanm 13:0645d8841f51 572 {
bogdanm 13:0645d8841f51 573 __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
bogdanm 13:0645d8841f51 574 }
bogdanm 13:0645d8841f51 575
bogdanm 13:0645d8841f51 576 #endif /* (__CORTEX_M >= 0x03) */
bogdanm 13:0645d8841f51 577
bogdanm 13:0645d8841f51 578
bogdanm 13:0645d8841f51 579 #if (__CORTEX_M == 0x04)
bogdanm 13:0645d8841f51 580
bogdanm 13:0645d8841f51 581 /** \brief Get FPSCR
bogdanm 13:0645d8841f51 582
bogdanm 13:0645d8841f51 583 This function returns the current value of the Floating Point Status/Control register.
bogdanm 13:0645d8841f51 584
bogdanm 13:0645d8841f51 585 \return Floating Point Status/Control register value
bogdanm 13:0645d8841f51 586 */
bogdanm 13:0645d8841f51 587 __attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
bogdanm 13:0645d8841f51 588 {
bogdanm 13:0645d8841f51 589 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
bogdanm 13:0645d8841f51 590 uint32_t result;
bogdanm 13:0645d8841f51 591
bogdanm 13:0645d8841f51 592 /* Empty asm statement works as a scheduling barrier */
bogdanm 13:0645d8841f51 593 __ASM volatile ("");
bogdanm 13:0645d8841f51 594 __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
bogdanm 13:0645d8841f51 595 __ASM volatile ("");
bogdanm 13:0645d8841f51 596 return(result);
bogdanm 13:0645d8841f51 597 #else
bogdanm 13:0645d8841f51 598 return(0);
bogdanm 13:0645d8841f51 599 #endif
bogdanm 13:0645d8841f51 600 }
bogdanm 13:0645d8841f51 601
bogdanm 13:0645d8841f51 602
bogdanm 13:0645d8841f51 603 /** \brief Set FPSCR
bogdanm 13:0645d8841f51 604
bogdanm 13:0645d8841f51 605 This function assigns the given value to the Floating Point Status/Control register.
bogdanm 13:0645d8841f51 606
bogdanm 13:0645d8841f51 607 \param [in] fpscr Floating Point Status/Control value to set
bogdanm 13:0645d8841f51 608 */
bogdanm 13:0645d8841f51 609 __attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
bogdanm 13:0645d8841f51 610 {
bogdanm 13:0645d8841f51 611 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
bogdanm 13:0645d8841f51 612 /* Empty asm statement works as a scheduling barrier */
bogdanm 13:0645d8841f51 613 __ASM volatile ("");
bogdanm 13:0645d8841f51 614 __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
bogdanm 13:0645d8841f51 615 __ASM volatile ("");
bogdanm 13:0645d8841f51 616 #endif
bogdanm 13:0645d8841f51 617 }
bogdanm 13:0645d8841f51 618
bogdanm 13:0645d8841f51 619 #endif /* (__CORTEX_M == 0x04) */
bogdanm 13:0645d8841f51 620
bogdanm 13:0645d8841f51 621
bogdanm 13:0645d8841f51 622 #elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
bogdanm 13:0645d8841f51 623 /* TASKING carm specific functions */
bogdanm 13:0645d8841f51 624
bogdanm 13:0645d8841f51 625 /*
bogdanm 13:0645d8841f51 626 * The CMSIS functions have been implemented as intrinsics in the compiler.
bogdanm 13:0645d8841f51 627 * Please use "carm -?i" to get an up to date list of all instrinsics,
bogdanm 13:0645d8841f51 628 * Including the CMSIS ones.
bogdanm 13:0645d8841f51 629 */
bogdanm 13:0645d8841f51 630
bogdanm 13:0645d8841f51 631 #endif
bogdanm 13:0645d8841f51 632
bogdanm 13:0645d8841f51 633 /*@} end of CMSIS_Core_RegAccFunctions */
bogdanm 13:0645d8841f51 634
bogdanm 13:0645d8841f51 635
bogdanm 13:0645d8841f51 636 #endif /* __CORE_CMFUNC_H */