Diff: UARTDisplayer.cpp

Revision:

16:c77e34bc69bc

Parent:

15:b38d9d210e32

Child:

18:a21199781d20

--- a/UARTDisplayer.cpp	Tue Jan 17 00:06:38 2017 +0000
+++ b/UARTDisplayer.cpp	Tue Jan 17 06:01:05 2017 +0000
@@ -5,10 +5,9 @@
 #include "mbed.h" //Needed for function wait
 #include <cassert>
 
-UARTDisplayer::UARTDisplayer(PinName tx_pin) :
-    device(tx_pin)
+UARTDisplayer::UARTDisplayer()
 {
-   
+    this->device.init();
 }
 
 void UARTDisplayer::displayAngle(float angle)
@@ -55,70 +54,57 @@
     wait(0.001);
 }
 
-HomemadeUART::HomemadeUART(PinName tx_pin) :
-    tx_pin(tx_pin)
-{
-}
-
 void HomemadeUART::write(const unsigned char value)
 {
-    homemade_mbed::write_bits(reinterpret_cast<unsigned int*>(0x4000C000), 0, 7, value);
-    /*homemade_mbed::write_bits(reinterpret_cast<unsigned int*>(0x40098000), 0, 7, value);
-    homemade_mbed::write_bits(reinterpret_cast<unsigned int*>(0x4009C000), 0, 7, value);*/
+    //UART1 Transmitter Holding Register
+    homemade_mbed::write_bits(reinterpret_cast<unsigned int*>(0x40010000), 0, 7, value);
 }
 
 void HomemadeUART::init()
 {
+    //Power: In the PCONP register (Table 46), set bits PCUART1
+    //Default: enabled
+    homemade_mbed::write_bits(reinterpret_cast<unsigned int*>(0x400FC0C4), 4, 4, 0x01);
+    
+    //Peripheral clock: In the PCLKSEL0 register (Table 40), select PCLK_UART1
+    //Default: PCLK_peripheral = CCLK/4
+    homemade_mbed::write_bits(reinterpret_cast<unsigned int*>(0x400FC1A8), 8, 9, 0x00);
+    
     homemade_mbed::write_bits(reinterpret_cast<unsigned int*>(0x400FC0C4), 22, 23, 0x03);
-    //printf("set_baud_rate\r\n");
-    //printf("set_baud_rate\rmarde");
+    
+    set_lcr();
     set_baud_rate(9600);
-    //printf("fifo\r\n");
     set_fifo();
-    //printf("lcr\r\n");
-    set_lcr();
+    
+    //Pins: Select UART pins through PINSEL registers
+    //Pin Function Select Register 1 (TXD1)
+    homemade_mbed::write_bits(reinterpret_cast<unsigned int*>(0x4002C000), 30, 31, 0x01);
 }
 
 void HomemadeUART::set_baud_rate(const unsigned int baud_rate)
 {
-    const unsigned int m_value = homemade_mbed::read_bits(reinterpret_cast<unsigned int*>(0x400FC088), 0, 14) + 1;
-    const unsigned int n_value = homemade_mbed::read_bits(reinterpret_cast<unsigned int*>(0x400FC088), 16, 23) + 1;
+    const unsigned int m = homemade_mbed::read_bits(reinterpret_cast<unsigned int*>(0x400FC088), 0, 14) + 1;
+    const unsigned int n = homemade_mbed::read_bits(reinterpret_cast<unsigned int*>(0x400FC088), 16, 23) + 1;
     const unsigned int in_frequency = 4000000; //Hz
-    const unsigned int fcco = (2 * m_value * in_frequency) / n_value;
+    const unsigned int fcco = (2 * m * in_frequency) / n;
     const unsigned int x = fcco / (baud_rate * 16 * 4);
 
-    homemade_mbed::write_bits(reinterpret_cast<unsigned int*>(0x4000C00C), 7, 7, 0x01);
-    homemade_mbed::write_bits(reinterpret_cast<unsigned int*>(0x4000C000), 0, 7, x);
-    homemade_mbed::write_bits(reinterpret_cast<unsigned int*>(0x4000C00C), 7, 7, 0x00);
-    
-    /*homemade_mbed::write_bits(reinterpret_cast<unsigned int*>(0x4009800C), 7, 7, 0x01);
-    homemade_mbed::write_bits(reinterpret_cast<unsigned int*>(0x40098000), 0, 7, x);
-    homemade_mbed::write_bits(reinterpret_cast<unsigned int*>(0x4009800C), 7, 7, 0x00);
-    
-    utility::blink();
-    
-    homemade_mbed::write_bits(reinterpret_cast<unsigned int*>(0x4009C00C), 7, 7, 0x01);
-    homemade_mbed::write_bits(reinterpret_cast<unsigned int*>(0x4009C000), 0, 7, x);
-    homemade_mbed::write_bits(reinterpret_cast<unsigned int*>(0x4009C00C), 7, 7, 0x00);*/
-    
-    
-    //const unsigned char x_char = x;
-    //assert(x == x_char);
-    //printf("allo\r\n");
-    
-   // utility::blink();
+    //Baud rate: In register U1LCR (Table 298), set bit DLAB =1
+    homemade_mbed::write_bits(reinterpret_cast<unsigned int*>(0x4001000C), 7, 7, 0x01);
+    //Set the baud rate
+    homemade_mbed::write_bits(reinterpret_cast<unsigned int*>(0x40010000), 0, 7, x); //UART1 Divisor Latch LSB Register (U1DLL
+    homemade_mbed::write_bits(reinterpret_cast<unsigned int*>(0x40010004), 0, 7, 0x00); //UART1 Divisor Latch MSB Register (U1DLM)
+    //Baud rate: In register U1LCR (Table 298), set bit DLAB =0
+    homemade_mbed::write_bits(reinterpret_cast<unsigned int*>(0x4001000C), 7, 7, 0x00);
 }
 
 void HomemadeUART::set_fifo()
 {
-    homemade_mbed::write_bits(reinterpret_cast<unsigned int*>(0x4000C008), 0, 0, 0x01);
-    /*homemade_mbed::write_bits(reinterpret_cast<unsigned int*>(0x40098008), 0, 0, 0x01);
-    homemade_mbed::write_bits(reinterpret_cast<unsigned int*>(0x4007C008), 0, 0, 0x01);*/
+    //UART FIFO: Use bit FIFO enable (bit 0) in register U0FCR (Table 297) to enable FIFO
+    homemade_mbed::write_bits(reinterpret_cast<unsigned int*>(0x40010008), 0, 0, 0x01);
 }
 
 void HomemadeUART::set_lcr()
 {
-    homemade_mbed::write_bits(reinterpret_cast<unsigned int*>(0x4000C00C), 0, 1, 0x03);
-   /* homemade_mbed::write_bits(reinterpret_cast<unsigned int*>(0x4009800C), 0, 1, 0x03);
-    homemade_mbed::write_bits(reinterpret_cast<unsigned int*>(0x4009C00C), 0, 1, 0x03);*/
+    homemade_mbed::write_bits(reinterpret_cast<unsigned int*>(0x4001000C), 0, 1, 0x03);
 }
\ No newline at end of file