Giorgos Tsapparellas / SX1272Lib

Driver for the SX1272 RF Transceiver

Dependents:   LoRaWAN_mbed_lmic_agriculture_app

Fork of SX1272Lib by Semtech

sx1272/sx1272.cpp@8:60c42278731e, 2018-04-02 (annotated)

Committer:
GTsapparellas
Date:
Mon Apr 02 12:06:02 2018 +0000
Revision:
8:60c42278731e
Parent:
7:b988b60083a1 
SX1272MB2xAS LoRa shield attached on FRDM-K64F ARM mbed board.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mluis 0:45c4f0364ca4 1 /*
mluis 0:45c4f0364ca4 2 / _____) _ | |
mluis 0:45c4f0364ca4 3 ( (____ _____ ____ _| |_ _____ ____| |__
mluis 0:45c4f0364ca4 4 \____ \| ___ | (_ _) ___ |/ ___) _ \
mluis 0:45c4f0364ca4 5 _____) ) ____| | | || |_| ____( (___| | | |
mluis 0:45c4f0364ca4 6 (______/|_____)_|_|_| \__)_____)\____)_| |_|
mluis 0:45c4f0364ca4 7 (C) 2015 Semtech
mluis 0:45c4f0364ca4 8
mluis 0:45c4f0364ca4 9 Description: Actual implementation of a SX1272 radio, inherits Radio
mluis 0:45c4f0364ca4 10
mluis 0:45c4f0364ca4 11 License: Revised BSD License, see LICENSE.TXT file include in the project
mluis 0:45c4f0364ca4 12
mluis 0:45c4f0364ca4 13 Maintainers: Miguel Luis, Gregory Cristian and Nicolas Huguenin
GTsapparellas 8:60c42278731e 14 /////////////////////////////////////////////////////////////////////////////
GTsapparellas 8:60c42278731e 15
GTsapparellas 8:60c42278731e 16 Used by Giorgos Tsapparellas for Internet of Things (IoT) smart monitoring
GTsapparellas 8:60c42278731e 17 device for agriculture using LoRaWAN technology.
GTsapparellas 8:60c42278731e 18
GTsapparellas 8:60c42278731e 19 Date of issued copy: 20 January 2018
GTsapparellas 8:60c42278731e 20
GTsapparellas 8:60c42278731e 21 Modifications:
GTsapparellas 8:60c42278731e 22 - No external modifications of the existing "AS IT IS" software.
mluis 0:45c4f0364ca4 23 */
mluis 0:45c4f0364ca4 24 #include "sx1272.h"
mluis 0:45c4f0364ca4 25
mluis 0:45c4f0364ca4 26 const FskBandwidth_t SX1272::FskBandwidths[] =
mluis 7:b988b60083a1 27 {
mluis 7:b988b60083a1 28 { 2600 , 0x17 },
mluis 0:45c4f0364ca4 29 { 3100 , 0x0F },
mluis 0:45c4f0364ca4 30 { 3900 , 0x07 },
mluis 0:45c4f0364ca4 31 { 5200 , 0x16 },
mluis 0:45c4f0364ca4 32 { 6300 , 0x0E },
mluis 0:45c4f0364ca4 33 { 7800 , 0x06 },
mluis 0:45c4f0364ca4 34 { 10400 , 0x15 },
mluis 0:45c4f0364ca4 35 { 12500 , 0x0D },
mluis 0:45c4f0364ca4 36 { 15600 , 0x05 },
mluis 0:45c4f0364ca4 37 { 20800 , 0x14 },
mluis 0:45c4f0364ca4 38 { 25000 , 0x0C },
mluis 0:45c4f0364ca4 39 { 31300 , 0x04 },
mluis 0:45c4f0364ca4 40 { 41700 , 0x13 },
mluis 0:45c4f0364ca4 41 { 50000 , 0x0B },
mluis 0:45c4f0364ca4 42 { 62500 , 0x03 },
mluis 0:45c4f0364ca4 43 { 83333 , 0x12 },
mluis 0:45c4f0364ca4 44 { 100000, 0x0A },
mluis 0:45c4f0364ca4 45 { 125000, 0x02 },
mluis 0:45c4f0364ca4 46 { 166700, 0x11 },
mluis 0:45c4f0364ca4 47 { 200000, 0x09 },
mluis 0:45c4f0364ca4 48 { 250000, 0x01 },
mluis 7:b988b60083a1 49 { 300000, 0x00 }, // Invalid Bandwidth
mluis 0:45c4f0364ca4 50 };
mluis 0:45c4f0364ca4 51
mluis 0:45c4f0364ca4 52
mluis 0:45c4f0364ca4 53 SX1272::SX1272( RadioEvents_t *events,
mluis 0:45c4f0364ca4 54 PinName mosi, PinName miso, PinName sclk, PinName nss, PinName reset,
mluis 0:45c4f0364ca4 55 PinName dio0, PinName dio1, PinName dio2, PinName dio3, PinName dio4, PinName dio5 )
mluis 0:45c4f0364ca4 56 : Radio( events ),
mluis 0:45c4f0364ca4 57 spi( mosi, miso, sclk ),
mluis 0:45c4f0364ca4 58 nss( nss ),
mluis 0:45c4f0364ca4 59 reset( reset ),
mluis 0:45c4f0364ca4 60 dio0( dio0 ), dio1( dio1 ), dio2( dio2 ), dio3( dio3 ), dio4( dio4 ), dio5( dio5 ),
mluis 0:45c4f0364ca4 61 isRadioActive( false )
mluis 0:45c4f0364ca4 62 {
mluis 0:45c4f0364ca4 63 wait_ms( 10 );
mluis 7:b988b60083a1 64 this->rxtxBuffer = new uint8_t[RX_BUFFER_SIZE];
mluis 7:b988b60083a1 65
mluis 0:45c4f0364ca4 66 this->RadioEvents = events;
mluis 7:b988b60083a1 67
mluis 0:45c4f0364ca4 68 this->dioIrq = new DioIrqHandler[6];
mluis 0:45c4f0364ca4 69
mluis 0:45c4f0364ca4 70 this->dioIrq[0] = &SX1272::OnDio0Irq;
mluis 0:45c4f0364ca4 71 this->dioIrq[1] = &SX1272::OnDio1Irq;
mluis 0:45c4f0364ca4 72 this->dioIrq[2] = &SX1272::OnDio2Irq;
mluis 0:45c4f0364ca4 73 this->dioIrq[3] = &SX1272::OnDio3Irq;
mluis 0:45c4f0364ca4 74 this->dioIrq[4] = &SX1272::OnDio4Irq;
mluis 0:45c4f0364ca4 75 this->dioIrq[5] = NULL;
mluis 7:b988b60083a1 76
mluis 0:45c4f0364ca4 77 this->settings.State = RF_IDLE;
mluis 0:45c4f0364ca4 78 }
mluis 0:45c4f0364ca4 79
mluis 0:45c4f0364ca4 80 SX1272::~SX1272( )
mluis 0:45c4f0364ca4 81 {
mluis 7:b988b60083a1 82 delete this->rxtxBuffer;
mluis 0:45c4f0364ca4 83 delete this->dioIrq;
mluis 0:45c4f0364ca4 84 }
mluis 0:45c4f0364ca4 85
mluis 0:45c4f0364ca4 86 void SX1272::Init( RadioEvents_t *events )
mluis 0:45c4f0364ca4 87 {
mluis 0:45c4f0364ca4 88 this->RadioEvents = events;
mluis 0:45c4f0364ca4 89 }
mluis 0:45c4f0364ca4 90
mluis 0:45c4f0364ca4 91 RadioState SX1272::GetStatus( void )
mluis 0:45c4f0364ca4 92 {
mluis 0:45c4f0364ca4 93 return this->settings.State;
mluis 0:45c4f0364ca4 94 }
mluis 0:45c4f0364ca4 95
mluis 0:45c4f0364ca4 96 void SX1272::SetChannel( uint32_t freq )
mluis 0:45c4f0364ca4 97 {
mluis 0:45c4f0364ca4 98 this->settings.Channel = freq;
mluis 0:45c4f0364ca4 99 freq = ( uint32_t )( ( double )freq / ( double )FREQ_STEP );
mluis 0:45c4f0364ca4 100 Write( REG_FRFMSB, ( uint8_t )( ( freq >> 16 ) & 0xFF ) );
mluis 0:45c4f0364ca4 101 Write( REG_FRFMID, ( uint8_t )( ( freq >> 8 ) & 0xFF ) );
mluis 0:45c4f0364ca4 102 Write( REG_FRFLSB, ( uint8_t )( freq & 0xFF ) );
mluis 0:45c4f0364ca4 103 }
mluis 0:45c4f0364ca4 104
mluis 0:45c4f0364ca4 105 bool SX1272::IsChannelFree( RadioModems_t modem, uint32_t freq, int16_t rssiThresh )
mluis 0:45c4f0364ca4 106 {
mluis 0:45c4f0364ca4 107 int16_t rssi = 0;
mluis 7:b988b60083a1 108
mluis 0:45c4f0364ca4 109 SetModem( modem );
mluis 0:45c4f0364ca4 110
mluis 0:45c4f0364ca4 111 SetChannel( freq );
mluis 7:b988b60083a1 112
mluis 0:45c4f0364ca4 113 SetOpMode( RF_OPMODE_RECEIVER );
mluis 0:45c4f0364ca4 114
mluis 0:45c4f0364ca4 115 wait_ms( 1 );
mluis 7:b988b60083a1 116
mluis 0:45c4f0364ca4 117 rssi = GetRssi( modem );
mluis 7:b988b60083a1 118
mluis 0:45c4f0364ca4 119 Sleep( );
mluis 7:b988b60083a1 120
mluis 0:45c4f0364ca4 121 if( rssi > rssiThresh )
mluis 0:45c4f0364ca4 122 {
mluis 0:45c4f0364ca4 123 return false;
mluis 0:45c4f0364ca4 124 }
mluis 0:45c4f0364ca4 125 return true;
mluis 0:45c4f0364ca4 126 }
mluis 0:45c4f0364ca4 127
mluis 0:45c4f0364ca4 128 uint32_t SX1272::Random( void )
mluis 0:45c4f0364ca4 129 {
mluis 0:45c4f0364ca4 130 uint8_t i;
mluis 0:45c4f0364ca4 131 uint32_t rnd = 0;
mluis 0:45c4f0364ca4 132
mluis 0:45c4f0364ca4 133 /*
mluis 7:b988b60083a1 134 * Radio setup for random number generation
mluis 0:45c4f0364ca4 135 */
mluis 0:45c4f0364ca4 136 // Set LoRa modem ON
mluis 0:45c4f0364ca4 137 SetModem( MODEM_LORA );
mluis 0:45c4f0364ca4 138
mluis 0:45c4f0364ca4 139 // Disable LoRa modem interrupts
mluis 0:45c4f0364ca4 140 Write( REG_LR_IRQFLAGSMASK, RFLR_IRQFLAGS_RXTIMEOUT |
mluis 0:45c4f0364ca4 141 RFLR_IRQFLAGS_RXDONE |
mluis 0:45c4f0364ca4 142 RFLR_IRQFLAGS_PAYLOADCRCERROR |
mluis 0:45c4f0364ca4 143 RFLR_IRQFLAGS_VALIDHEADER |
mluis 0:45c4f0364ca4 144 RFLR_IRQFLAGS_TXDONE |
mluis 0:45c4f0364ca4 145 RFLR_IRQFLAGS_CADDONE |
mluis 0:45c4f0364ca4 146 RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL |
mluis 0:45c4f0364ca4 147 RFLR_IRQFLAGS_CADDETECTED );
mluis 0:45c4f0364ca4 148
mluis 0:45c4f0364ca4 149 // Set radio in continuous reception
mluis 0:45c4f0364ca4 150 SetOpMode( RF_OPMODE_RECEIVER );
mluis 0:45c4f0364ca4 151
mluis 0:45c4f0364ca4 152 for( i = 0; i < 32; i++ )
mluis 0:45c4f0364ca4 153 {
mluis 0:45c4f0364ca4 154 wait_ms( 1 );
mluis 0:45c4f0364ca4 155 // Unfiltered RSSI value reading. Only takes the LSB value
mluis 0:45c4f0364ca4 156 rnd |= ( ( uint32_t )Read( REG_LR_RSSIWIDEBAND ) & 0x01 ) << i;
mluis 0:45c4f0364ca4 157 }
mluis 0:45c4f0364ca4 158
mluis 0:45c4f0364ca4 159 Sleep( );
mluis 0:45c4f0364ca4 160
mluis 0:45c4f0364ca4 161 return rnd;
mluis 0:45c4f0364ca4 162 }
mluis 0:45c4f0364ca4 163
mluis 0:45c4f0364ca4 164 /*!
mluis 0:45c4f0364ca4 165 * Returns the known FSK bandwidth registers value
mluis 0:45c4f0364ca4 166 *
mluis 0:45c4f0364ca4 167 * \param [IN] bandwidth Bandwidth value in Hz
mluis 0:45c4f0364ca4 168 * \retval regValue Bandwidth register value.
mluis 0:45c4f0364ca4 169 */
mluis 0:45c4f0364ca4 170 uint8_t SX1272::GetFskBandwidthRegValue( uint32_t bandwidth )
mluis 0:45c4f0364ca4 171 {
mluis 0:45c4f0364ca4 172 uint8_t i;
mluis 0:45c4f0364ca4 173
mluis 0:45c4f0364ca4 174 for( i = 0; i < ( sizeof( FskBandwidths ) / sizeof( FskBandwidth_t ) ) - 1; i++ )
mluis 0:45c4f0364ca4 175 {
mluis 0:45c4f0364ca4 176 if( ( bandwidth >= FskBandwidths[i].bandwidth ) && ( bandwidth < FskBandwidths[i + 1].bandwidth ) )
mluis 0:45c4f0364ca4 177 {
mluis 0:45c4f0364ca4 178 return FskBandwidths[i].RegValue;
mluis 0:45c4f0364ca4 179 }
mluis 0:45c4f0364ca4 180 }
mluis 0:45c4f0364ca4 181 // ERROR: Value not found
mluis 0:45c4f0364ca4 182 while( 1 );
mluis 0:45c4f0364ca4 183 }
mluis 0:45c4f0364ca4 184
mluis 0:45c4f0364ca4 185 void SX1272::SetRxConfig( RadioModems_t modem, uint32_t bandwidth,
mluis 0:45c4f0364ca4 186 uint32_t datarate, uint8_t coderate,
mluis 0:45c4f0364ca4 187 uint32_t bandwidthAfc, uint16_t preambleLen,
mluis 0:45c4f0364ca4 188 uint16_t symbTimeout, bool fixLen,
mluis 0:45c4f0364ca4 189 uint8_t payloadLen,
mluis 0:45c4f0364ca4 190 bool crcOn, bool freqHopOn, uint8_t hopPeriod,
mluis 0:45c4f0364ca4 191 bool iqInverted, bool rxContinuous )
mluis 0:45c4f0364ca4 192 {
mluis 0:45c4f0364ca4 193 SetModem( modem );
mluis 0:45c4f0364ca4 194
mluis 0:45c4f0364ca4 195 switch( modem )
mluis 0:45c4f0364ca4 196 {
mluis 0:45c4f0364ca4 197 case MODEM_FSK:
mluis 0:45c4f0364ca4 198 {
mluis 0:45c4f0364ca4 199 this->settings.Fsk.Bandwidth = bandwidth;
mluis 0:45c4f0364ca4 200 this->settings.Fsk.Datarate = datarate;
mluis 0:45c4f0364ca4 201 this->settings.Fsk.BandwidthAfc = bandwidthAfc;
mluis 0:45c4f0364ca4 202 this->settings.Fsk.FixLen = fixLen;
mluis 0:45c4f0364ca4 203 this->settings.Fsk.PayloadLen = payloadLen;
mluis 0:45c4f0364ca4 204 this->settings.Fsk.CrcOn = crcOn;
mluis 0:45c4f0364ca4 205 this->settings.Fsk.IqInverted = iqInverted;
mluis 0:45c4f0364ca4 206 this->settings.Fsk.RxContinuous = rxContinuous;
mluis 0:45c4f0364ca4 207 this->settings.Fsk.PreambleLen = preambleLen;
mluis 7:b988b60083a1 208 this->settings.Fsk.RxSingleTimeout = symbTimeout * ( ( 1.0 / ( double )datarate ) * 8.0 ) * 1e3;
mluis 7:b988b60083a1 209
mluis 0:45c4f0364ca4 210 datarate = ( uint16_t )( ( double )XTAL_FREQ / ( double )datarate );
mluis 0:45c4f0364ca4 211 Write( REG_BITRATEMSB, ( uint8_t )( datarate >> 8 ) );
mluis 0:45c4f0364ca4 212 Write( REG_BITRATELSB, ( uint8_t )( datarate & 0xFF ) );
mluis 0:45c4f0364ca4 213
mluis 0:45c4f0364ca4 214 Write( REG_RXBW, GetFskBandwidthRegValue( bandwidth ) );
mluis 0:45c4f0364ca4 215 Write( REG_AFCBW, GetFskBandwidthRegValue( bandwidthAfc ) );
mluis 0:45c4f0364ca4 216
mluis 0:45c4f0364ca4 217 Write( REG_PREAMBLEMSB, ( uint8_t )( ( preambleLen >> 8 ) & 0xFF ) );
mluis 0:45c4f0364ca4 218 Write( REG_PREAMBLELSB, ( uint8_t )( preambleLen & 0xFF ) );
mluis 7:b988b60083a1 219
mluis 0:45c4f0364ca4 220 if( fixLen == 1 )
mluis 0:45c4f0364ca4 221 {
mluis 0:45c4f0364ca4 222 Write( REG_PAYLOADLENGTH, payloadLen );
mluis 0:45c4f0364ca4 223 }
mluis 7:b988b60083a1 224 else
mluis 7:b988b60083a1 225 {
mluis 7:b988b60083a1 226 Write( REG_PAYLOADLENGTH, 0xFF ); // Set payload length to the maximum
mluis 7:b988b60083a1 227 }
mluis 7:b988b60083a1 228
mluis 0:45c4f0364ca4 229 Write( REG_PACKETCONFIG1,
mluis 7:b988b60083a1 230 ( Read( REG_PACKETCONFIG1 ) &
mluis 0:45c4f0364ca4 231 RF_PACKETCONFIG1_CRC_MASK &
mluis 0:45c4f0364ca4 232 RF_PACKETCONFIG1_PACKETFORMAT_MASK ) |
mluis 0:45c4f0364ca4 233 ( ( fixLen == 1 ) ? RF_PACKETCONFIG1_PACKETFORMAT_FIXED : RF_PACKETCONFIG1_PACKETFORMAT_VARIABLE ) |
mluis 0:45c4f0364ca4 234 ( crcOn << 4 ) );
mluis 7:b988b60083a1 235 Write( REG_PACKETCONFIG2, ( Read( REG_PACKETCONFIG2 ) | RF_PACKETCONFIG2_DATAMODE_PACKET ) );
mluis 0:45c4f0364ca4 236 }
mluis 0:45c4f0364ca4 237 break;
mluis 0:45c4f0364ca4 238 case MODEM_LORA:
mluis 0:45c4f0364ca4 239 {
mluis 0:45c4f0364ca4 240 this->settings.LoRa.Bandwidth = bandwidth;
mluis 0:45c4f0364ca4 241 this->settings.LoRa.Datarate = datarate;
mluis 0:45c4f0364ca4 242 this->settings.LoRa.Coderate = coderate;
mluis 0:45c4f0364ca4 243 this->settings.LoRa.PreambleLen = preambleLen;
mluis 0:45c4f0364ca4 244 this->settings.LoRa.FixLen = fixLen;
mluis 0:45c4f0364ca4 245 this->settings.LoRa.PayloadLen = payloadLen;
mluis 0:45c4f0364ca4 246 this->settings.LoRa.CrcOn = crcOn;
mluis 0:45c4f0364ca4 247 this->settings.LoRa.FreqHopOn = freqHopOn;
mluis 0:45c4f0364ca4 248 this->settings.LoRa.HopPeriod = hopPeriod;
mluis 0:45c4f0364ca4 249 this->settings.LoRa.IqInverted = iqInverted;
mluis 0:45c4f0364ca4 250 this->settings.LoRa.RxContinuous = rxContinuous;
mluis 0:45c4f0364ca4 251
mluis 0:45c4f0364ca4 252 if( datarate > 12 )
mluis 0:45c4f0364ca4 253 {
mluis 0:45c4f0364ca4 254 datarate = 12;
mluis 0:45c4f0364ca4 255 }
mluis 0:45c4f0364ca4 256 else if( datarate < 6 )
mluis 0:45c4f0364ca4 257 {
mluis 0:45c4f0364ca4 258 datarate = 6;
mluis 0:45c4f0364ca4 259 }
mluis 7:b988b60083a1 260
mluis 0:45c4f0364ca4 261 if( ( ( bandwidth == 0 ) && ( ( datarate == 11 ) || ( datarate == 12 ) ) ) ||
mluis 0:45c4f0364ca4 262 ( ( bandwidth == 1 ) && ( datarate == 12 ) ) )
mluis 0:45c4f0364ca4 263 {
mluis 0:45c4f0364ca4 264 this->settings.LoRa.LowDatarateOptimize = 0x01;
mluis 0:45c4f0364ca4 265 }
mluis 0:45c4f0364ca4 266 else
mluis 0:45c4f0364ca4 267 {
mluis 0:45c4f0364ca4 268 this->settings.LoRa.LowDatarateOptimize = 0x00;
mluis 0:45c4f0364ca4 269 }
mluis 0:45c4f0364ca4 270
mluis 7:b988b60083a1 271 Write( REG_LR_MODEMCONFIG1,
mluis 0:45c4f0364ca4 272 ( Read( REG_LR_MODEMCONFIG1 ) &
mluis 0:45c4f0364ca4 273 RFLR_MODEMCONFIG1_BW_MASK &
mluis 0:45c4f0364ca4 274 RFLR_MODEMCONFIG1_CODINGRATE_MASK &
mluis 0:45c4f0364ca4 275 RFLR_MODEMCONFIG1_IMPLICITHEADER_MASK &
mluis 0:45c4f0364ca4 276 RFLR_MODEMCONFIG1_RXPAYLOADCRC_MASK &
mluis 0:45c4f0364ca4 277 RFLR_MODEMCONFIG1_LOWDATARATEOPTIMIZE_MASK ) |
mluis 7:b988b60083a1 278 ( bandwidth << 6 ) | ( coderate << 3 ) |
mluis 0:45c4f0364ca4 279 ( fixLen << 2 ) | ( crcOn << 1 ) |
mluis 0:45c4f0364ca4 280 this->settings.LoRa.LowDatarateOptimize );
mluis 0:45c4f0364ca4 281
mluis 0:45c4f0364ca4 282 Write( REG_LR_MODEMCONFIG2,
mluis 0:45c4f0364ca4 283 ( Read( REG_LR_MODEMCONFIG2 ) &
mluis 0:45c4f0364ca4 284 RFLR_MODEMCONFIG2_SF_MASK &
mluis 0:45c4f0364ca4 285 RFLR_MODEMCONFIG2_SYMBTIMEOUTMSB_MASK ) |
mluis 0:45c4f0364ca4 286 ( datarate << 4 ) |
mluis 0:45c4f0364ca4 287 ( ( symbTimeout >> 8 ) & ~RFLR_MODEMCONFIG2_SYMBTIMEOUTMSB_MASK ) );
mluis 0:45c4f0364ca4 288
mluis 0:45c4f0364ca4 289 Write( REG_LR_SYMBTIMEOUTLSB, ( uint8_t )( symbTimeout & 0xFF ) );
mluis 7:b988b60083a1 290
mluis 0:45c4f0364ca4 291 Write( REG_LR_PREAMBLEMSB, ( uint8_t )( ( preambleLen >> 8 ) & 0xFF ) );
mluis 0:45c4f0364ca4 292 Write( REG_LR_PREAMBLELSB, ( uint8_t )( preambleLen & 0xFF ) );
mluis 0:45c4f0364ca4 293
mluis 0:45c4f0364ca4 294 if( fixLen == 1 )
mluis 0:45c4f0364ca4 295 {
mluis 0:45c4f0364ca4 296 Write( REG_LR_PAYLOADLENGTH, payloadLen );
mluis 0:45c4f0364ca4 297 }
mluis 0:45c4f0364ca4 298
mluis 0:45c4f0364ca4 299 if( this->settings.LoRa.FreqHopOn == true )
mluis 0:45c4f0364ca4 300 {
mluis 0:45c4f0364ca4 301 Write( REG_LR_PLLHOP, ( Read( REG_LR_PLLHOP ) & RFLR_PLLHOP_FASTHOP_MASK ) | RFLR_PLLHOP_FASTHOP_ON );
mluis 0:45c4f0364ca4 302 Write( REG_LR_HOPPERIOD, this->settings.LoRa.HopPeriod );
mluis 0:45c4f0364ca4 303 }
mluis 0:45c4f0364ca4 304
mluis 0:45c4f0364ca4 305 if( datarate == 6 )
mluis 0:45c4f0364ca4 306 {
mluis 7:b988b60083a1 307 Write( REG_LR_DETECTOPTIMIZE,
mluis 0:45c4f0364ca4 308 ( Read( REG_LR_DETECTOPTIMIZE ) &
mluis 0:45c4f0364ca4 309 RFLR_DETECTIONOPTIMIZE_MASK ) |
mluis 0:45c4f0364ca4 310 RFLR_DETECTIONOPTIMIZE_SF6 );
mluis 7:b988b60083a1 311 Write( REG_LR_DETECTIONTHRESHOLD,
mluis 0:45c4f0364ca4 312 RFLR_DETECTIONTHRESH_SF6 );
mluis 0:45c4f0364ca4 313 }
mluis 0:45c4f0364ca4 314 else
mluis 0:45c4f0364ca4 315 {
mluis 0:45c4f0364ca4 316 Write( REG_LR_DETECTOPTIMIZE,
mluis 0:45c4f0364ca4 317 ( Read( REG_LR_DETECTOPTIMIZE ) &
mluis 0:45c4f0364ca4 318 RFLR_DETECTIONOPTIMIZE_MASK ) |
mluis 0:45c4f0364ca4 319 RFLR_DETECTIONOPTIMIZE_SF7_TO_SF12 );
mluis 7:b988b60083a1 320 Write( REG_LR_DETECTIONTHRESHOLD,
mluis 0:45c4f0364ca4 321 RFLR_DETECTIONTHRESH_SF7_TO_SF12 );
mluis 0:45c4f0364ca4 322 }
mluis 0:45c4f0364ca4 323 }
mluis 0:45c4f0364ca4 324 break;
mluis 0:45c4f0364ca4 325 }
mluis 0:45c4f0364ca4 326 }
mluis 0:45c4f0364ca4 327
mluis 7:b988b60083a1 328 void SX1272::SetTxConfig( RadioModems_t modem, int8_t power, uint32_t fdev,
mluis 0:45c4f0364ca4 329 uint32_t bandwidth, uint32_t datarate,
mluis 0:45c4f0364ca4 330 uint8_t coderate, uint16_t preambleLen,
mluis 7:b988b60083a1 331 bool fixLen, bool crcOn, bool freqHopOn,
mluis 0:45c4f0364ca4 332 uint8_t hopPeriod, bool iqInverted, uint32_t timeout )
mluis 0:45c4f0364ca4 333 {
mluis 0:45c4f0364ca4 334 SetModem( modem );
mluis 0:45c4f0364ca4 335
mluis 7:b988b60083a1 336 SetRfTxPower( power );
mluis 0:45c4f0364ca4 337
mluis 0:45c4f0364ca4 338 switch( modem )
mluis 0:45c4f0364ca4 339 {
mluis 0:45c4f0364ca4 340 case MODEM_FSK:
mluis 0:45c4f0364ca4 341 {
mluis 0:45c4f0364ca4 342 this->settings.Fsk.Power = power;
mluis 0:45c4f0364ca4 343 this->settings.Fsk.Fdev = fdev;
mluis 0:45c4f0364ca4 344 this->settings.Fsk.Bandwidth = bandwidth;
mluis 0:45c4f0364ca4 345 this->settings.Fsk.Datarate = datarate;
mluis 0:45c4f0364ca4 346 this->settings.Fsk.PreambleLen = preambleLen;
mluis 0:45c4f0364ca4 347 this->settings.Fsk.FixLen = fixLen;
mluis 0:45c4f0364ca4 348 this->settings.Fsk.CrcOn = crcOn;
mluis 0:45c4f0364ca4 349 this->settings.Fsk.IqInverted = iqInverted;
mluis 0:45c4f0364ca4 350 this->settings.Fsk.TxTimeout = timeout;
mluis 7:b988b60083a1 351
mluis 0:45c4f0364ca4 352 fdev = ( uint16_t )( ( double )fdev / ( double )FREQ_STEP );
mluis 0:45c4f0364ca4 353 Write( REG_FDEVMSB, ( uint8_t )( fdev >> 8 ) );
mluis 0:45c4f0364ca4 354 Write( REG_FDEVLSB, ( uint8_t )( fdev & 0xFF ) );
mluis 0:45c4f0364ca4 355
mluis 0:45c4f0364ca4 356 datarate = ( uint16_t )( ( double )XTAL_FREQ / ( double )datarate );
mluis 0:45c4f0364ca4 357 Write( REG_BITRATEMSB, ( uint8_t )( datarate >> 8 ) );
mluis 0:45c4f0364ca4 358 Write( REG_BITRATELSB, ( uint8_t )( datarate & 0xFF ) );
mluis 0:45c4f0364ca4 359
mluis 0:45c4f0364ca4 360 Write( REG_PREAMBLEMSB, ( preambleLen >> 8 ) & 0x00FF );
mluis 0:45c4f0364ca4 361 Write( REG_PREAMBLELSB, preambleLen & 0xFF );
mluis 0:45c4f0364ca4 362
mluis 0:45c4f0364ca4 363 Write( REG_PACKETCONFIG1,
mluis 7:b988b60083a1 364 ( Read( REG_PACKETCONFIG1 ) &
mluis 0:45c4f0364ca4 365 RF_PACKETCONFIG1_CRC_MASK &
mluis 0:45c4f0364ca4 366 RF_PACKETCONFIG1_PACKETFORMAT_MASK ) |
mluis 0:45c4f0364ca4 367 ( ( fixLen == 1 ) ? RF_PACKETCONFIG1_PACKETFORMAT_FIXED : RF_PACKETCONFIG1_PACKETFORMAT_VARIABLE ) |
mluis 0:45c4f0364ca4 368 ( crcOn << 4 ) );
mluis 7:b988b60083a1 369 Write( REG_PACKETCONFIG2, ( Read( REG_PACKETCONFIG2 ) | RF_PACKETCONFIG2_DATAMODE_PACKET ) );
mluis 0:45c4f0364ca4 370 }
mluis 0:45c4f0364ca4 371 break;
mluis 0:45c4f0364ca4 372 case MODEM_LORA:
mluis 0:45c4f0364ca4 373 {
mluis 0:45c4f0364ca4 374 this->settings.LoRa.Power = power;
mluis 0:45c4f0364ca4 375 this->settings.LoRa.Bandwidth = bandwidth;
mluis 0:45c4f0364ca4 376 this->settings.LoRa.Datarate = datarate;
mluis 0:45c4f0364ca4 377 this->settings.LoRa.Coderate = coderate;
mluis 0:45c4f0364ca4 378 this->settings.LoRa.PreambleLen = preambleLen;
mluis 0:45c4f0364ca4 379 this->settings.LoRa.FixLen = fixLen;
mluis 0:45c4f0364ca4 380 this->settings.LoRa.FreqHopOn = freqHopOn;
mluis 0:45c4f0364ca4 381 this->settings.LoRa.HopPeriod = hopPeriod;
mluis 0:45c4f0364ca4 382 this->settings.LoRa.CrcOn = crcOn;
mluis 0:45c4f0364ca4 383 this->settings.LoRa.IqInverted = iqInverted;
mluis 0:45c4f0364ca4 384 this->settings.LoRa.TxTimeout = timeout;
mluis 0:45c4f0364ca4 385
mluis 0:45c4f0364ca4 386 if( datarate > 12 )
mluis 0:45c4f0364ca4 387 {
mluis 0:45c4f0364ca4 388 datarate = 12;
mluis 0:45c4f0364ca4 389 }
mluis 0:45c4f0364ca4 390 else if( datarate < 6 )
mluis 0:45c4f0364ca4 391 {
mluis 0:45c4f0364ca4 392 datarate = 6;
mluis 0:45c4f0364ca4 393 }
mluis 0:45c4f0364ca4 394 if( ( ( bandwidth == 0 ) && ( ( datarate == 11 ) || ( datarate == 12 ) ) ) ||
mluis 0:45c4f0364ca4 395 ( ( bandwidth == 1 ) && ( datarate == 12 ) ) )
mluis 0:45c4f0364ca4 396 {
mluis 0:45c4f0364ca4 397 this->settings.LoRa.LowDatarateOptimize = 0x01;
mluis 0:45c4f0364ca4 398 }
mluis 0:45c4f0364ca4 399 else
mluis 0:45c4f0364ca4 400 {
mluis 0:45c4f0364ca4 401 this->settings.LoRa.LowDatarateOptimize = 0x00;
mluis 0:45c4f0364ca4 402 }
mluis 0:45c4f0364ca4 403
mluis 0:45c4f0364ca4 404 if( this->settings.LoRa.FreqHopOn == true )
mluis 0:45c4f0364ca4 405 {
mluis 0:45c4f0364ca4 406 Write( REG_LR_PLLHOP, ( Read( REG_LR_PLLHOP ) & RFLR_PLLHOP_FASTHOP_MASK ) | RFLR_PLLHOP_FASTHOP_ON );
mluis 0:45c4f0364ca4 407 Write( REG_LR_HOPPERIOD, this->settings.LoRa.HopPeriod );
mluis 0:45c4f0364ca4 408 }
mluis 0:45c4f0364ca4 409
mluis 7:b988b60083a1 410 Write( REG_LR_MODEMCONFIG1,
mluis 0:45c4f0364ca4 411 ( Read( REG_LR_MODEMCONFIG1 ) &
mluis 0:45c4f0364ca4 412 RFLR_MODEMCONFIG1_BW_MASK &
mluis 0:45c4f0364ca4 413 RFLR_MODEMCONFIG1_CODINGRATE_MASK &
mluis 0:45c4f0364ca4 414 RFLR_MODEMCONFIG1_IMPLICITHEADER_MASK &
mluis 0:45c4f0364ca4 415 RFLR_MODEMCONFIG1_RXPAYLOADCRC_MASK &
mluis 0:45c4f0364ca4 416 RFLR_MODEMCONFIG1_LOWDATARATEOPTIMIZE_MASK ) |
mluis 7:b988b60083a1 417 ( bandwidth << 6 ) | ( coderate << 3 ) |
mluis 0:45c4f0364ca4 418 ( fixLen << 2 ) | ( crcOn << 1 ) |
mluis 0:45c4f0364ca4 419 this->settings.LoRa.LowDatarateOptimize );
mluis 0:45c4f0364ca4 420
mluis 0:45c4f0364ca4 421 Write( REG_LR_MODEMCONFIG2,
mluis 0:45c4f0364ca4 422 ( Read( REG_LR_MODEMCONFIG2 ) &
mluis 0:45c4f0364ca4 423 RFLR_MODEMCONFIG2_SF_MASK ) |
mluis 0:45c4f0364ca4 424 ( datarate << 4 ) );
mluis 0:45c4f0364ca4 425
mluis 7:b988b60083a1 426
mluis 0:45c4f0364ca4 427 Write( REG_LR_PREAMBLEMSB, ( preambleLen >> 8 ) & 0x00FF );
mluis 0:45c4f0364ca4 428 Write( REG_LR_PREAMBLELSB, preambleLen & 0xFF );
mluis 7:b988b60083a1 429
mluis 0:45c4f0364ca4 430 if( datarate == 6 )
mluis 0:45c4f0364ca4 431 {
mluis 7:b988b60083a1 432 Write( REG_LR_DETECTOPTIMIZE,
mluis 0:45c4f0364ca4 433 ( Read( REG_LR_DETECTOPTIMIZE ) &
mluis 0:45c4f0364ca4 434 RFLR_DETECTIONOPTIMIZE_MASK ) |
mluis 0:45c4f0364ca4 435 RFLR_DETECTIONOPTIMIZE_SF6 );
mluis 7:b988b60083a1 436 Write( REG_LR_DETECTIONTHRESHOLD,
mluis 0:45c4f0364ca4 437 RFLR_DETECTIONTHRESH_SF6 );
mluis 0:45c4f0364ca4 438 }
mluis 0:45c4f0364ca4 439 else
mluis 0:45c4f0364ca4 440 {
mluis 0:45c4f0364ca4 441 Write( REG_LR_DETECTOPTIMIZE,
mluis 0:45c4f0364ca4 442 ( Read( REG_LR_DETECTOPTIMIZE ) &
mluis 0:45c4f0364ca4 443 RFLR_DETECTIONOPTIMIZE_MASK ) |
mluis 0:45c4f0364ca4 444 RFLR_DETECTIONOPTIMIZE_SF7_TO_SF12 );
mluis 7:b988b60083a1 445 Write( REG_LR_DETECTIONTHRESHOLD,
mluis 0:45c4f0364ca4 446 RFLR_DETECTIONTHRESH_SF7_TO_SF12 );
mluis 0:45c4f0364ca4 447 }
mluis 0:45c4f0364ca4 448 }
mluis 0:45c4f0364ca4 449 break;
mluis 0:45c4f0364ca4 450 }
mluis 0:45c4f0364ca4 451 }
mluis 0:45c4f0364ca4 452
mluis 7:b988b60083a1 453 uint32_t SX1272::TimeOnAir( RadioModems_t modem, uint8_t pktLen )
mluis 0:45c4f0364ca4 454 {
mluis 0:45c4f0364ca4 455 uint32_t airTime = 0;
mluis 0:45c4f0364ca4 456
mluis 0:45c4f0364ca4 457 switch( modem )
mluis 0:45c4f0364ca4 458 {
mluis 0:45c4f0364ca4 459 case MODEM_FSK:
mluis 0:45c4f0364ca4 460 {
mluis 0:45c4f0364ca4 461 airTime = rint( ( 8 * ( this->settings.Fsk.PreambleLen +
mluis 0:45c4f0364ca4 462 ( ( Read( REG_SYNCCONFIG ) & ~RF_SYNCCONFIG_SYNCSIZE_MASK ) + 1 ) +
mluis 0:45c4f0364ca4 463 ( ( this->settings.Fsk.FixLen == 0x01 ) ? 0.0 : 1.0 ) +
mluis 0:45c4f0364ca4 464 ( ( ( Read( REG_PACKETCONFIG1 ) & ~RF_PACKETCONFIG1_ADDRSFILTERING_MASK ) != 0x00 ) ? 1.0 : 0 ) +
mluis 0:45c4f0364ca4 465 pktLen +
mluis 0:45c4f0364ca4 466 ( ( this->settings.Fsk.CrcOn == 0x01 ) ? 2.0 : 0 ) ) /
mluis 7:b988b60083a1 467 this->settings.Fsk.Datarate ) * 1e3 );
mluis 0:45c4f0364ca4 468 }
mluis 0:45c4f0364ca4 469 break;
mluis 0:45c4f0364ca4 470 case MODEM_LORA:
mluis 0:45c4f0364ca4 471 {
mluis 0:45c4f0364ca4 472 double bw = 0.0;
mluis 0:45c4f0364ca4 473 switch( this->settings.LoRa.Bandwidth )
mluis 0:45c4f0364ca4 474 {
mluis 0:45c4f0364ca4 475 case 0: // 125 kHz
mluis 0:45c4f0364ca4 476 bw = 125e3;
mluis 0:45c4f0364ca4 477 break;
mluis 0:45c4f0364ca4 478 case 1: // 250 kHz
mluis 0:45c4f0364ca4 479 bw = 250e3;
mluis 0:45c4f0364ca4 480 break;
mluis 0:45c4f0364ca4 481 case 2: // 500 kHz
mluis 0:45c4f0364ca4 482 bw = 500e3;
mluis 0:45c4f0364ca4 483 break;
mluis 0:45c4f0364ca4 484 }
mluis 0:45c4f0364ca4 485
mluis 0:45c4f0364ca4 486 // Symbol rate : time for one symbol (secs)
mluis 0:45c4f0364ca4 487 double rs = bw / ( 1 << this->settings.LoRa.Datarate );
mluis 0:45c4f0364ca4 488 double ts = 1 / rs;
mluis 0:45c4f0364ca4 489 // time of preamble
mluis 0:45c4f0364ca4 490 double tPreamble = ( this->settings.LoRa.PreambleLen + 4.25 ) * ts;
mluis 0:45c4f0364ca4 491 // Symbol length of payload and time
mluis 0:45c4f0364ca4 492 double tmp = ceil( ( 8 * pktLen - 4 * this->settings.LoRa.Datarate +
mluis 0:45c4f0364ca4 493 28 + 16 * this->settings.LoRa.CrcOn -
mluis 0:45c4f0364ca4 494 ( this->settings.LoRa.FixLen ? 20 : 0 ) ) /
mluis 7:b988b60083a1 495 ( double )( 4 * ( this->settings.LoRa.Datarate -
mluis 7:b988b60083a1 496 ( ( this->settings.LoRa.LowDatarateOptimize > 0 ) ? 2 : 0 ) ) ) ) *
mluis 0:45c4f0364ca4 497 ( this->settings.LoRa.Coderate + 4 );
mluis 0:45c4f0364ca4 498 double nPayload = 8 + ( ( tmp > 0 ) ? tmp : 0 );
mluis 0:45c4f0364ca4 499 double tPayload = nPayload * ts;
mluis 7:b988b60083a1 500 // Time on air
mluis 0:45c4f0364ca4 501 double tOnAir = tPreamble + tPayload;
mluis 7:b988b60083a1 502 // return ms secs
mluis 7:b988b60083a1 503 airTime = floor( tOnAir * 1e3 + 0.999 );
mluis 0:45c4f0364ca4 504 }
mluis 0:45c4f0364ca4 505 break;
mluis 0:45c4f0364ca4 506 }
mluis 0:45c4f0364ca4 507 return airTime;
mluis 0:45c4f0364ca4 508 }
mluis 0:45c4f0364ca4 509
mluis 0:45c4f0364ca4 510 void SX1272::Send( uint8_t *buffer, uint8_t size )
mluis 0:45c4f0364ca4 511 {
mluis 0:45c4f0364ca4 512 uint32_t txTimeout = 0;
mluis 0:45c4f0364ca4 513
mluis 0:45c4f0364ca4 514 switch( this->settings.Modem )
mluis 0:45c4f0364ca4 515 {
mluis 0:45c4f0364ca4 516 case MODEM_FSK:
mluis 0:45c4f0364ca4 517 {
mluis 0:45c4f0364ca4 518 this->settings.FskPacketHandler.NbBytes = 0;
mluis 0:45c4f0364ca4 519 this->settings.FskPacketHandler.Size = size;
mluis 0:45c4f0364ca4 520
mluis 0:45c4f0364ca4 521 if( this->settings.Fsk.FixLen == false )
mluis 0:45c4f0364ca4 522 {
mluis 0:45c4f0364ca4 523 WriteFifo( ( uint8_t* )&size, 1 );
mluis 0:45c4f0364ca4 524 }
mluis 0:45c4f0364ca4 525 else
mluis 0:45c4f0364ca4 526 {
mluis 0:45c4f0364ca4 527 Write( REG_PAYLOADLENGTH, size );
mluis 7:b988b60083a1 528 }
mluis 7:b988b60083a1 529
mluis 0:45c4f0364ca4 530 if( ( size > 0 ) && ( size <= 64 ) )
mluis 0:45c4f0364ca4 531 {
mluis 0:45c4f0364ca4 532 this->settings.FskPacketHandler.ChunkSize = size;
mluis 0:45c4f0364ca4 533 }
mluis 0:45c4f0364ca4 534 else
mluis 0:45c4f0364ca4 535 {
mluis 7:b988b60083a1 536 memcpy( rxtxBuffer, buffer, size );
mluis 0:45c4f0364ca4 537 this->settings.FskPacketHandler.ChunkSize = 32;
mluis 0:45c4f0364ca4 538 }
mluis 0:45c4f0364ca4 539
mluis 0:45c4f0364ca4 540 // Write payload buffer
mluis 0:45c4f0364ca4 541 WriteFifo( buffer, this->settings.FskPacketHandler.ChunkSize );
mluis 0:45c4f0364ca4 542 this->settings.FskPacketHandler.NbBytes += this->settings.FskPacketHandler.ChunkSize;
mluis 0:45c4f0364ca4 543 txTimeout = this->settings.Fsk.TxTimeout;
mluis 0:45c4f0364ca4 544 }
mluis 0:45c4f0364ca4 545 break;
mluis 0:45c4f0364ca4 546 case MODEM_LORA:
mluis 0:45c4f0364ca4 547 {
mluis 0:45c4f0364ca4 548 if( this->settings.LoRa.IqInverted == true )
mluis 0:45c4f0364ca4 549 {
mluis 0:45c4f0364ca4 550 Write( REG_LR_INVERTIQ, ( ( Read( REG_LR_INVERTIQ ) & RFLR_INVERTIQ_TX_MASK & RFLR_INVERTIQ_RX_MASK ) | RFLR_INVERTIQ_RX_OFF | RFLR_INVERTIQ_TX_ON ) );
mluis 0:45c4f0364ca4 551 Write( REG_LR_INVERTIQ2, RFLR_INVERTIQ2_ON );
mluis 0:45c4f0364ca4 552 }
mluis 0:45c4f0364ca4 553 else
mluis 0:45c4f0364ca4 554 {
mluis 0:45c4f0364ca4 555 Write( REG_LR_INVERTIQ, ( ( Read( REG_LR_INVERTIQ ) & RFLR_INVERTIQ_TX_MASK & RFLR_INVERTIQ_RX_MASK ) | RFLR_INVERTIQ_RX_OFF | RFLR_INVERTIQ_TX_OFF ) );
mluis 0:45c4f0364ca4 556 Write( REG_LR_INVERTIQ2, RFLR_INVERTIQ2_OFF );
mluis 7:b988b60083a1 557 }
mluis 7:b988b60083a1 558
mluis 0:45c4f0364ca4 559 this->settings.LoRaPacketHandler.Size = size;
mluis 0:45c4f0364ca4 560
mluis 0:45c4f0364ca4 561 // Initializes the payload size
mluis 0:45c4f0364ca4 562 Write( REG_LR_PAYLOADLENGTH, size );
mluis 0:45c4f0364ca4 563
mluis 7:b988b60083a1 564 // Full buffer used for Tx
mluis 0:45c4f0364ca4 565 Write( REG_LR_FIFOTXBASEADDR, 0 );
mluis 0:45c4f0364ca4 566 Write( REG_LR_FIFOADDRPTR, 0 );
mluis 0:45c4f0364ca4 567
mluis 0:45c4f0364ca4 568 // FIFO operations can not take place in Sleep mode
mluis 0:45c4f0364ca4 569 if( ( Read( REG_OPMODE ) & ~RF_OPMODE_MASK ) == RF_OPMODE_SLEEP )
mluis 0:45c4f0364ca4 570 {
mluis 0:45c4f0364ca4 571 Standby( );
mluis 0:45c4f0364ca4 572 wait_ms( 1 );
mluis 0:45c4f0364ca4 573 }
mluis 0:45c4f0364ca4 574 // Write payload buffer
mluis 0:45c4f0364ca4 575 WriteFifo( buffer, size );
mluis 0:45c4f0364ca4 576 txTimeout = this->settings.LoRa.TxTimeout;
mluis 0:45c4f0364ca4 577 }
mluis 0:45c4f0364ca4 578 break;
mluis 0:45c4f0364ca4 579 }
mluis 0:45c4f0364ca4 580
mluis 0:45c4f0364ca4 581 Tx( txTimeout );
mluis 0:45c4f0364ca4 582 }
mluis 0:45c4f0364ca4 583
mluis 0:45c4f0364ca4 584 void SX1272::Sleep( void )
mluis 0:45c4f0364ca4 585 {
mluis 7:b988b60083a1 586 txTimeoutTimer.detach( );
mluis 0:45c4f0364ca4 587 rxTimeoutTimer.detach( );
mluis 0:45c4f0364ca4 588
mluis 0:45c4f0364ca4 589 SetOpMode( RF_OPMODE_SLEEP );
mluis 0:45c4f0364ca4 590 this->settings.State = RF_IDLE;
mluis 0:45c4f0364ca4 591 }
mluis 0:45c4f0364ca4 592
mluis 0:45c4f0364ca4 593 void SX1272::Standby( void )
mluis 0:45c4f0364ca4 594 {
mluis 7:b988b60083a1 595 txTimeoutTimer.detach( );
mluis 0:45c4f0364ca4 596 rxTimeoutTimer.detach( );
mluis 0:45c4f0364ca4 597
mluis 0:45c4f0364ca4 598 SetOpMode( RF_OPMODE_STANDBY );
mluis 0:45c4f0364ca4 599 this->settings.State = RF_IDLE;
mluis 0:45c4f0364ca4 600 }
mluis 0:45c4f0364ca4 601
mluis 0:45c4f0364ca4 602 void SX1272::Rx( uint32_t timeout )
mluis 0:45c4f0364ca4 603 {
mluis 0:45c4f0364ca4 604 bool rxContinuous = false;
mluis 7:b988b60083a1 605
mluis 0:45c4f0364ca4 606 switch( this->settings.Modem )
mluis 0:45c4f0364ca4 607 {
mluis 0:45c4f0364ca4 608 case MODEM_FSK:
mluis 0:45c4f0364ca4 609 {
mluis 0:45c4f0364ca4 610 rxContinuous = this->settings.Fsk.RxContinuous;
mluis 7:b988b60083a1 611
mluis 0:45c4f0364ca4 612 // DIO0=PayloadReady
mluis 0:45c4f0364ca4 613 // DIO1=FifoLevel
mluis 0:45c4f0364ca4 614 // DIO2=SyncAddr
mluis 0:45c4f0364ca4 615 // DIO3=FifoEmpty
mluis 0:45c4f0364ca4 616 // DIO4=Preamble
mluis 0:45c4f0364ca4 617 // DIO5=ModeReady
mluis 0:45c4f0364ca4 618 Write( REG_DIOMAPPING1, ( Read( REG_DIOMAPPING1 ) & RF_DIOMAPPING1_DIO0_MASK &
mluis 7:b988b60083a1 619 RF_DIOMAPPING1_DIO1_MASK &
mluis 0:45c4f0364ca4 620 RF_DIOMAPPING1_DIO2_MASK ) |
mluis 0:45c4f0364ca4 621 RF_DIOMAPPING1_DIO0_00 |
mluis 7:b988b60083a1 622 RF_DIOMAPPING1_DIO1_00 |
mluis 0:45c4f0364ca4 623 RF_DIOMAPPING1_DIO2_11 );
mluis 7:b988b60083a1 624
mluis 0:45c4f0364ca4 625 Write( REG_DIOMAPPING2, ( Read( REG_DIOMAPPING2 ) & RF_DIOMAPPING2_DIO4_MASK &
mluis 7:b988b60083a1 626 RF_DIOMAPPING2_MAP_MASK ) |
mluis 0:45c4f0364ca4 627 RF_DIOMAPPING2_DIO4_11 |
mluis 0:45c4f0364ca4 628 RF_DIOMAPPING2_MAP_PREAMBLEDETECT );
mluis 7:b988b60083a1 629
mluis 0:45c4f0364ca4 630 this->settings.FskPacketHandler.FifoThresh = Read( REG_FIFOTHRESH ) & 0x3F;
mluis 7:b988b60083a1 631
mluis 7:b988b60083a1 632 Write( REG_RXCONFIG, RF_RXCONFIG_AFCAUTO_ON | RF_RXCONFIG_AGCAUTO_ON | RF_RXCONFIG_RXTRIGER_PREAMBLEDETECT );
mluis 7:b988b60083a1 633
mluis 0:45c4f0364ca4 634 this->settings.FskPacketHandler.PreambleDetected = false;
mluis 0:45c4f0364ca4 635 this->settings.FskPacketHandler.SyncWordDetected = false;
mluis 0:45c4f0364ca4 636 this->settings.FskPacketHandler.NbBytes = 0;
mluis 0:45c4f0364ca4 637 this->settings.FskPacketHandler.Size = 0;
mluis 0:45c4f0364ca4 638 }
mluis 0:45c4f0364ca4 639 break;
mluis 0:45c4f0364ca4 640 case MODEM_LORA:
mluis 0:45c4f0364ca4 641 {
mluis 0:45c4f0364ca4 642 if( this->settings.LoRa.IqInverted == true )
mluis 0:45c4f0364ca4 643 {
mluis 0:45c4f0364ca4 644 Write( REG_LR_INVERTIQ, ( ( Read( REG_LR_INVERTIQ ) & RFLR_INVERTIQ_TX_MASK & RFLR_INVERTIQ_RX_MASK ) | RFLR_INVERTIQ_RX_ON | RFLR_INVERTIQ_TX_OFF ) );
mluis 0:45c4f0364ca4 645 Write( REG_LR_INVERTIQ2, RFLR_INVERTIQ2_ON );
mluis 0:45c4f0364ca4 646 }
mluis 0:45c4f0364ca4 647 else
mluis 0:45c4f0364ca4 648 {
mluis 0:45c4f0364ca4 649 Write( REG_LR_INVERTIQ, ( ( Read( REG_LR_INVERTIQ ) & RFLR_INVERTIQ_TX_MASK & RFLR_INVERTIQ_RX_MASK ) | RFLR_INVERTIQ_RX_OFF | RFLR_INVERTIQ_TX_OFF ) );
mluis 0:45c4f0364ca4 650 Write( REG_LR_INVERTIQ2, RFLR_INVERTIQ2_OFF );
mluis 7:b988b60083a1 651 }
mluis 7:b988b60083a1 652
mluis 0:45c4f0364ca4 653 rxContinuous = this->settings.LoRa.RxContinuous;
mluis 7:b988b60083a1 654
mluis 0:45c4f0364ca4 655 if( this->settings.LoRa.FreqHopOn == true )
mluis 0:45c4f0364ca4 656 {
mluis 0:45c4f0364ca4 657 Write( REG_LR_IRQFLAGSMASK, //RFLR_IRQFLAGS_RXTIMEOUT |
mluis 0:45c4f0364ca4 658 //RFLR_IRQFLAGS_RXDONE |
mluis 0:45c4f0364ca4 659 //RFLR_IRQFLAGS_PAYLOADCRCERROR |
mluis 0:45c4f0364ca4 660 RFLR_IRQFLAGS_VALIDHEADER |
mluis 0:45c4f0364ca4 661 RFLR_IRQFLAGS_TXDONE |
mluis 0:45c4f0364ca4 662 RFLR_IRQFLAGS_CADDONE |
mluis 0:45c4f0364ca4 663 //RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL |
mluis 0:45c4f0364ca4 664 RFLR_IRQFLAGS_CADDETECTED );
mluis 7:b988b60083a1 665
mluis 0:45c4f0364ca4 666 // DIO0=RxDone, DIO2=FhssChangeChannel
mluis 0:45c4f0364ca4 667 Write( REG_DIOMAPPING1, ( Read( REG_DIOMAPPING1 ) & RFLR_DIOMAPPING1_DIO0_MASK & RFLR_DIOMAPPING1_DIO2_MASK ) | RFLR_DIOMAPPING1_DIO0_00 | RFLR_DIOMAPPING1_DIO2_00 );
mluis 0:45c4f0364ca4 668 }
mluis 0:45c4f0364ca4 669 else
mluis 0:45c4f0364ca4 670 {
mluis 0:45c4f0364ca4 671 Write( REG_LR_IRQFLAGSMASK, //RFLR_IRQFLAGS_RXTIMEOUT |
mluis 0:45c4f0364ca4 672 //RFLR_IRQFLAGS_RXDONE |
mluis 0:45c4f0364ca4 673 //RFLR_IRQFLAGS_PAYLOADCRCERROR |
mluis 0:45c4f0364ca4 674 RFLR_IRQFLAGS_VALIDHEADER |
mluis 0:45c4f0364ca4 675 RFLR_IRQFLAGS_TXDONE |
mluis 0:45c4f0364ca4 676 RFLR_IRQFLAGS_CADDONE |
mluis 0:45c4f0364ca4 677 RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL |
mluis 0:45c4f0364ca4 678 RFLR_IRQFLAGS_CADDETECTED );
mluis 7:b988b60083a1 679
mluis 0:45c4f0364ca4 680 // DIO0=RxDone
mluis 0:45c4f0364ca4 681 Write( REG_DIOMAPPING1, ( Read( REG_DIOMAPPING1 ) & RFLR_DIOMAPPING1_DIO0_MASK ) | RFLR_DIOMAPPING1_DIO0_00 );
mluis 0:45c4f0364ca4 682 }
mluis 0:45c4f0364ca4 683 Write( REG_LR_FIFORXBASEADDR, 0 );
mluis 0:45c4f0364ca4 684 Write( REG_LR_FIFOADDRPTR, 0 );
mluis 0:45c4f0364ca4 685 }
mluis 0:45c4f0364ca4 686 break;
mluis 0:45c4f0364ca4 687 }
mluis 0:45c4f0364ca4 688
mluis 7:b988b60083a1 689 memset( rxtxBuffer, 0, ( size_t )RX_BUFFER_SIZE );
mluis 0:45c4f0364ca4 690
mluis 0:45c4f0364ca4 691 this->settings.State = RF_RX_RUNNING;
mluis 0:45c4f0364ca4 692 if( timeout != 0 )
mluis 0:45c4f0364ca4 693 {
GTsapparellas 8:60c42278731e 694 rxTimeoutTimer.attach_us( this, &SX1272::OnTimeoutIrq, timeout * 1e3 );
mluis 0:45c4f0364ca4 695 }
mluis 0:45c4f0364ca4 696
mluis 0:45c4f0364ca4 697 if( this->settings.Modem == MODEM_FSK )
mluis 0:45c4f0364ca4 698 {
mluis 0:45c4f0364ca4 699 SetOpMode( RF_OPMODE_RECEIVER );
mluis 7:b988b60083a1 700
mluis 0:45c4f0364ca4 701 if( rxContinuous == false )
mluis 0:45c4f0364ca4 702 {
GTsapparellas 8:60c42278731e 703 rxTimeoutSyncWord.attach_us( this, &SX1272::OnTimeoutIrq,this->settings.Fsk.RxSingleTimeout * 1e3 );
mluis 0:45c4f0364ca4 704 }
mluis 0:45c4f0364ca4 705 }
mluis 0:45c4f0364ca4 706 else
mluis 0:45c4f0364ca4 707 {
mluis 0:45c4f0364ca4 708 if( rxContinuous == true )
mluis 0:45c4f0364ca4 709 {
mluis 0:45c4f0364ca4 710 SetOpMode( RFLR_OPMODE_RECEIVER );
mluis 0:45c4f0364ca4 711 }
mluis 0:45c4f0364ca4 712 else
mluis 0:45c4f0364ca4 713 {
mluis 0:45c4f0364ca4 714 SetOpMode( RFLR_OPMODE_RECEIVER_SINGLE );
mluis 0:45c4f0364ca4 715 }
mluis 0:45c4f0364ca4 716 }
mluis 0:45c4f0364ca4 717 }
mluis 0:45c4f0364ca4 718
mluis 0:45c4f0364ca4 719 void SX1272::Tx( uint32_t timeout )
mluis 0:45c4f0364ca4 720 {
mluis 0:45c4f0364ca4 721
mluis 0:45c4f0364ca4 722 switch( this->settings.Modem )
mluis 0:45c4f0364ca4 723 {
mluis 0:45c4f0364ca4 724 case MODEM_FSK:
mluis 0:45c4f0364ca4 725 {
mluis 0:45c4f0364ca4 726 // DIO0=PacketSent
mluis 7:b988b60083a1 727 // DIO1=FifoEmpty
mluis 0:45c4f0364ca4 728 // DIO2=FifoFull
mluis 0:45c4f0364ca4 729 // DIO3=FifoEmpty
mluis 0:45c4f0364ca4 730 // DIO4=LowBat
mluis 0:45c4f0364ca4 731 // DIO5=ModeReady
mluis 0:45c4f0364ca4 732 Write( REG_DIOMAPPING1, ( Read( REG_DIOMAPPING1 ) & RF_DIOMAPPING1_DIO0_MASK &
mluis 7:b988b60083a1 733 RF_DIOMAPPING1_DIO1_MASK &
mluis 7:b988b60083a1 734 RF_DIOMAPPING1_DIO2_MASK ) |
mluis 7:b988b60083a1 735 RF_DIOMAPPING1_DIO1_01 );
mluis 0:45c4f0364ca4 736
mluis 0:45c4f0364ca4 737 Write( REG_DIOMAPPING2, ( Read( REG_DIOMAPPING2 ) & RF_DIOMAPPING2_DIO4_MASK &
mluis 0:45c4f0364ca4 738 RF_DIOMAPPING2_MAP_MASK ) );
mluis 0:45c4f0364ca4 739 this->settings.FskPacketHandler.FifoThresh = Read( REG_FIFOTHRESH ) & 0x3F;
mluis 0:45c4f0364ca4 740 }
mluis 0:45c4f0364ca4 741 break;
mluis 0:45c4f0364ca4 742 case MODEM_LORA:
mluis 0:45c4f0364ca4 743 {
mluis 0:45c4f0364ca4 744 if( this->settings.LoRa.FreqHopOn == true )
mluis 0:45c4f0364ca4 745 {
mluis 0:45c4f0364ca4 746 Write( REG_LR_IRQFLAGSMASK, RFLR_IRQFLAGS_RXTIMEOUT |
mluis 0:45c4f0364ca4 747 RFLR_IRQFLAGS_RXDONE |
mluis 0:45c4f0364ca4 748 RFLR_IRQFLAGS_PAYLOADCRCERROR |
mluis 0:45c4f0364ca4 749 RFLR_IRQFLAGS_VALIDHEADER |
mluis 0:45c4f0364ca4 750 //RFLR_IRQFLAGS_TXDONE |
mluis 0:45c4f0364ca4 751 RFLR_IRQFLAGS_CADDONE |
mluis 0:45c4f0364ca4 752 //RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL |
mluis 0:45c4f0364ca4 753 RFLR_IRQFLAGS_CADDETECTED );
mluis 7:b988b60083a1 754
mluis 0:45c4f0364ca4 755 // DIO0=TxDone, DIO2=FhssChangeChannel
mluis 0:45c4f0364ca4 756 Write( REG_DIOMAPPING1, ( Read( REG_DIOMAPPING1 ) & RFLR_DIOMAPPING1_DIO0_MASK & RFLR_DIOMAPPING1_DIO2_MASK ) | RFLR_DIOMAPPING1_DIO0_01 | RFLR_DIOMAPPING1_DIO2_00 );
mluis 0:45c4f0364ca4 757 }
mluis 0:45c4f0364ca4 758 else
mluis 0:45c4f0364ca4 759 {
mluis 0:45c4f0364ca4 760 Write( REG_LR_IRQFLAGSMASK, RFLR_IRQFLAGS_RXTIMEOUT |
mluis 0:45c4f0364ca4 761 RFLR_IRQFLAGS_RXDONE |
mluis 0:45c4f0364ca4 762 RFLR_IRQFLAGS_PAYLOADCRCERROR |
mluis 0:45c4f0364ca4 763 RFLR_IRQFLAGS_VALIDHEADER |
mluis 0:45c4f0364ca4 764 //RFLR_IRQFLAGS_TXDONE |
mluis 0:45c4f0364ca4 765 RFLR_IRQFLAGS_CADDONE |
mluis 0:45c4f0364ca4 766 RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL |
mluis 0:45c4f0364ca4 767 RFLR_IRQFLAGS_CADDETECTED );
mluis 0:45c4f0364ca4 768
mluis 0:45c4f0364ca4 769 // DIO0=TxDone
mluis 0:45c4f0364ca4 770 Write( REG_DIOMAPPING1, ( Read( REG_DIOMAPPING1 ) & RFLR_DIOMAPPING1_DIO0_MASK ) | RFLR_DIOMAPPING1_DIO0_01 );
mluis 0:45c4f0364ca4 771 }
mluis 0:45c4f0364ca4 772 }
mluis 0:45c4f0364ca4 773 break;
mluis 0:45c4f0364ca4 774 }
mluis 0:45c4f0364ca4 775
mluis 0:45c4f0364ca4 776 this->settings.State = RF_TX_RUNNING;
GTsapparellas 8:60c42278731e 777 txTimeoutTimer.attach_us(this, &SX1272::OnTimeoutIrq , timeout * 1e3 );
mluis 0:45c4f0364ca4 778 SetOpMode( RF_OPMODE_TRANSMITTER );
mluis 0:45c4f0364ca4 779 }
mluis 0:45c4f0364ca4 780
mluis 0:45c4f0364ca4 781 void SX1272::StartCad( void )
mluis 0:45c4f0364ca4 782 {
mluis 0:45c4f0364ca4 783 switch( this->settings.Modem )
mluis 0:45c4f0364ca4 784 {
mluis 0:45c4f0364ca4 785 case MODEM_FSK:
mluis 0:45c4f0364ca4 786 {
mluis 7:b988b60083a1 787
mluis 0:45c4f0364ca4 788 }
mluis 0:45c4f0364ca4 789 break;
mluis 0:45c4f0364ca4 790 case MODEM_LORA:
mluis 0:45c4f0364ca4 791 {
mluis 0:45c4f0364ca4 792 Write( REG_LR_IRQFLAGSMASK, RFLR_IRQFLAGS_RXTIMEOUT |
mluis 0:45c4f0364ca4 793 RFLR_IRQFLAGS_RXDONE |
mluis 0:45c4f0364ca4 794 RFLR_IRQFLAGS_PAYLOADCRCERROR |
mluis 0:45c4f0364ca4 795 RFLR_IRQFLAGS_VALIDHEADER |
mluis 0:45c4f0364ca4 796 RFLR_IRQFLAGS_TXDONE |
mluis 0:45c4f0364ca4 797 //RFLR_IRQFLAGS_CADDONE |
mluis 0:45c4f0364ca4 798 RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL // |
mluis 7:b988b60083a1 799 //RFLR_IRQFLAGS_CADDETECTED
mluis 0:45c4f0364ca4 800 );
mluis 7:b988b60083a1 801
mluis 0:45c4f0364ca4 802 // DIO3=CADDone
mluis 7:b988b60083a1 803 Write( REG_DIOMAPPING1, ( Read( REG_DIOMAPPING1 ) & RFLR_DIOMAPPING1_DIO3_MASK ) | RFLR_DIOMAPPING1_DIO3_00 );
mluis 7:b988b60083a1 804
mluis 0:45c4f0364ca4 805 this->settings.State = RF_CAD;
mluis 0:45c4f0364ca4 806 SetOpMode( RFLR_OPMODE_CAD );
mluis 0:45c4f0364ca4 807 }
mluis 0:45c4f0364ca4 808 break;
mluis 0:45c4f0364ca4 809 default:
mluis 0:45c4f0364ca4 810 break;
mluis 0:45c4f0364ca4 811 }
mluis 0:45c4f0364ca4 812 }
mluis 0:45c4f0364ca4 813
mluis 7:b988b60083a1 814 void SX1272::SetTxContinuousWave( uint32_t freq, int8_t power, uint16_t time )
mluis 7:b988b60083a1 815 {
mluis 7:b988b60083a1 816 uint32_t timeout = ( uint32_t )( time * 1e6 );
mluis 7:b988b60083a1 817
mluis 7:b988b60083a1 818 SetChannel( freq );
mluis 7:b988b60083a1 819
mluis 7:b988b60083a1 820 SetTxConfig( MODEM_FSK, power, 0, 0, 4800, 0, 5, false, false, 0, 0, 0, timeout );
mluis 7:b988b60083a1 821
mluis 7:b988b60083a1 822 Write( REG_PACKETCONFIG2, ( Read( REG_PACKETCONFIG2 ) & RF_PACKETCONFIG2_DATAMODE_MASK ) );
mluis 7:b988b60083a1 823 // Disable radio interrupts
mluis 7:b988b60083a1 824 Write( REG_DIOMAPPING1, RF_DIOMAPPING1_DIO0_11 | RF_DIOMAPPING1_DIO1_11 );
mluis 7:b988b60083a1 825 Write( REG_DIOMAPPING2, RF_DIOMAPPING2_DIO4_10 | RF_DIOMAPPING2_DIO5_10 );
mluis 7:b988b60083a1 826
mluis 7:b988b60083a1 827 this->settings.State = RF_TX_RUNNING;
GTsapparellas 8:60c42278731e 828 txTimeoutTimer.attach_us(this, &SX1272::OnTimeoutIrq, timeout );
mluis 7:b988b60083a1 829 SetOpMode( RF_OPMODE_TRANSMITTER );
mluis 7:b988b60083a1 830 }
mluis 7:b988b60083a1 831
mluis 0:45c4f0364ca4 832 int16_t SX1272::GetRssi( RadioModems_t modem )
mluis 0:45c4f0364ca4 833 {
mluis 0:45c4f0364ca4 834 int16_t rssi = 0;
mluis 0:45c4f0364ca4 835
mluis 0:45c4f0364ca4 836 switch( modem )
mluis 0:45c4f0364ca4 837 {
mluis 0:45c4f0364ca4 838 case MODEM_FSK:
mluis 0:45c4f0364ca4 839 rssi = -( Read( REG_RSSIVALUE ) >> 1 );
mluis 0:45c4f0364ca4 840 break;
mluis 0:45c4f0364ca4 841 case MODEM_LORA:
mluis 0:45c4f0364ca4 842 rssi = RSSI_OFFSET + Read( REG_LR_RSSIVALUE );
mluis 0:45c4f0364ca4 843 break;
mluis 0:45c4f0364ca4 844 default:
mluis 0:45c4f0364ca4 845 rssi = -1;
mluis 0:45c4f0364ca4 846 break;
mluis 0:45c4f0364ca4 847 }
mluis 0:45c4f0364ca4 848 return rssi;
mluis 0:45c4f0364ca4 849 }
mluis 0:45c4f0364ca4 850
mluis 0:45c4f0364ca4 851 void SX1272::SetOpMode( uint8_t opMode )
mluis 0:45c4f0364ca4 852 {
mluis 7:b988b60083a1 853 if( opMode == RF_OPMODE_SLEEP )
mluis 0:45c4f0364ca4 854 {
mluis 7:b988b60083a1 855 SetAntSwLowPower( true );
mluis 0:45c4f0364ca4 856 }
mluis 7:b988b60083a1 857 else
mluis 7:b988b60083a1 858 {
mluis 7:b988b60083a1 859 SetAntSwLowPower( false );
mluis 7:b988b60083a1 860 SetAntSw( opMode );
mluis 7:b988b60083a1 861 }
mluis 7:b988b60083a1 862 Write( REG_OPMODE, ( Read( REG_OPMODE ) & RF_OPMODE_MASK ) | opMode );
mluis 0:45c4f0364ca4 863 }
mluis 0:45c4f0364ca4 864
mluis 0:45c4f0364ca4 865 void SX1272::SetModem( RadioModems_t modem )
mluis 0:45c4f0364ca4 866 {
mluis 7:b988b60083a1 867 if( ( Read( REG_OPMODE ) & RFLR_OPMODE_LONGRANGEMODE_ON ) != 0 )
mluis 7:b988b60083a1 868 {
mluis 7:b988b60083a1 869 this->settings.Modem = MODEM_LORA;
mluis 7:b988b60083a1 870 }
mluis 7:b988b60083a1 871 else
mluis 7:b988b60083a1 872 {
mluis 7:b988b60083a1 873 this->settings.Modem = MODEM_FSK;
mluis 7:b988b60083a1 874 }
mluis 7:b988b60083a1 875
mluis 0:45c4f0364ca4 876 if( this->settings.Modem == modem )
mluis 0:45c4f0364ca4 877 {
mluis 0:45c4f0364ca4 878 return;
mluis 0:45c4f0364ca4 879 }
mluis 0:45c4f0364ca4 880
mluis 0:45c4f0364ca4 881 this->settings.Modem = modem;
mluis 0:45c4f0364ca4 882 switch( this->settings.Modem )
mluis 0:45c4f0364ca4 883 {
mluis 0:45c4f0364ca4 884 default:
mluis 0:45c4f0364ca4 885 case MODEM_FSK:
mluis 7:b988b60083a1 886 Sleep( );
mluis 0:45c4f0364ca4 887 Write( REG_OPMODE, ( Read( REG_OPMODE ) & RFLR_OPMODE_LONGRANGEMODE_MASK ) | RFLR_OPMODE_LONGRANGEMODE_OFF );
mluis 7:b988b60083a1 888
mluis 0:45c4f0364ca4 889 Write( REG_DIOMAPPING1, 0x00 );
mluis 0:45c4f0364ca4 890 Write( REG_DIOMAPPING2, 0x30 ); // DIO5=ModeReady
mluis 0:45c4f0364ca4 891 break;
mluis 0:45c4f0364ca4 892 case MODEM_LORA:
mluis 7:b988b60083a1 893 Sleep( );
mluis 0:45c4f0364ca4 894 Write( REG_OPMODE, ( Read( REG_OPMODE ) & RFLR_OPMODE_LONGRANGEMODE_MASK ) | RFLR_OPMODE_LONGRANGEMODE_ON );
mluis 0:45c4f0364ca4 895
mluis 0:45c4f0364ca4 896 Write( REG_DIOMAPPING1, 0x00 );
mluis 0:45c4f0364ca4 897 Write( REG_DIOMAPPING2, 0x00 );
mluis 0:45c4f0364ca4 898 break;
mluis 0:45c4f0364ca4 899 }
mluis 0:45c4f0364ca4 900 }
mluis 0:45c4f0364ca4 901
mluis 0:45c4f0364ca4 902 void SX1272::SetMaxPayloadLength( RadioModems_t modem, uint8_t max )
mluis 0:45c4f0364ca4 903 {
mluis 0:45c4f0364ca4 904 this->SetModem( modem );
mluis 0:45c4f0364ca4 905
mluis 0:45c4f0364ca4 906 switch( modem )
mluis 0:45c4f0364ca4 907 {
mluis 0:45c4f0364ca4 908 case MODEM_FSK:
mluis 0:45c4f0364ca4 909 if( this->settings.Fsk.FixLen == false )
mluis 0:45c4f0364ca4 910 {
mluis 0:45c4f0364ca4 911 this->Write( REG_PAYLOADLENGTH, max );
mluis 0:45c4f0364ca4 912 }
mluis 0:45c4f0364ca4 913 break;
mluis 0:45c4f0364ca4 914 case MODEM_LORA:
mluis 0:45c4f0364ca4 915 this->Write( REG_LR_PAYLOADMAXLENGTH, max );
mluis 0:45c4f0364ca4 916 break;
mluis 0:45c4f0364ca4 917 }
mluis 0:45c4f0364ca4 918 }
mluis 0:45c4f0364ca4 919
mluis 7:b988b60083a1 920 void SX1272::SetPublicNetwork( bool enable )
mluis 7:b988b60083a1 921 {
mluis 7:b988b60083a1 922 SetModem( MODEM_LORA );
mluis 7:b988b60083a1 923 this->settings.LoRa.PublicNetwork = enable;
mluis 7:b988b60083a1 924 if( enable == true )
mluis 7:b988b60083a1 925 {
mluis 7:b988b60083a1 926 // Change LoRa modem SyncWord
mluis 7:b988b60083a1 927 Write( REG_LR_SYNCWORD, LORA_MAC_PUBLIC_SYNCWORD );
mluis 7:b988b60083a1 928 }
mluis 7:b988b60083a1 929 else
mluis 7:b988b60083a1 930 {
mluis 7:b988b60083a1 931 // Change LoRa modem SyncWord
mluis 7:b988b60083a1 932 Write( REG_LR_SYNCWORD, LORA_MAC_PRIVATE_SYNCWORD );
mluis 7:b988b60083a1 933 }
mluis 7:b988b60083a1 934 }
mluis 7:b988b60083a1 935
mluis 0:45c4f0364ca4 936 void SX1272::OnTimeoutIrq( void )
mluis 0:45c4f0364ca4 937 {
mluis 0:45c4f0364ca4 938 switch( this->settings.State )
mluis 0:45c4f0364ca4 939 {
mluis 0:45c4f0364ca4 940 case RF_RX_RUNNING:
mluis 0:45c4f0364ca4 941 if( this->settings.Modem == MODEM_FSK )
mluis 0:45c4f0364ca4 942 {
mluis 0:45c4f0364ca4 943 this->settings.FskPacketHandler.PreambleDetected = false;
mluis 0:45c4f0364ca4 944 this->settings.FskPacketHandler.SyncWordDetected = false;
mluis 0:45c4f0364ca4 945 this->settings.FskPacketHandler.NbBytes = 0;
mluis 0:45c4f0364ca4 946 this->settings.FskPacketHandler.Size = 0;
mluis 0:45c4f0364ca4 947
mluis 0:45c4f0364ca4 948 // Clear Irqs
mluis 7:b988b60083a1 949 Write( REG_IRQFLAGS1, RF_IRQFLAGS1_RSSI |
mluis 0:45c4f0364ca4 950 RF_IRQFLAGS1_PREAMBLEDETECT |
mluis 0:45c4f0364ca4 951 RF_IRQFLAGS1_SYNCADDRESSMATCH );
mluis 0:45c4f0364ca4 952 Write( REG_IRQFLAGS2, RF_IRQFLAGS2_FIFOOVERRUN );
mluis 0:45c4f0364ca4 953
mluis 0:45c4f0364ca4 954 if( this->settings.Fsk.RxContinuous == true )
mluis 0:45c4f0364ca4 955 {
mluis 0:45c4f0364ca4 956 // Continuous mode restart Rx chain
mluis 0:45c4f0364ca4 957 Write( REG_RXCONFIG, Read( REG_RXCONFIG ) | RF_RXCONFIG_RESTARTRXWITHOUTPLLLOCK );
GTsapparellas 8:60c42278731e 958 rxTimeoutSyncWord.attach_us(this, &SX1272::OnTimeoutIrq,
mluis 7:b988b60083a1 959 this->settings.Fsk.RxSingleTimeout * 1e3 );
mluis 0:45c4f0364ca4 960 }
mluis 0:45c4f0364ca4 961 else
mluis 0:45c4f0364ca4 962 {
mluis 0:45c4f0364ca4 963 this->settings.State = RF_IDLE;
mluis 0:45c4f0364ca4 964 rxTimeoutSyncWord.detach( );
mluis 0:45c4f0364ca4 965 }
mluis 0:45c4f0364ca4 966 }
mluis 0:45c4f0364ca4 967 if( ( this->RadioEvents != NULL ) && ( this->RadioEvents->RxTimeout != NULL ) )
mluis 0:45c4f0364ca4 968 {
mluis 0:45c4f0364ca4 969 this->RadioEvents->RxTimeout( );
mluis 0:45c4f0364ca4 970 }
mluis 0:45c4f0364ca4 971 break;
mluis 0:45c4f0364ca4 972 case RF_TX_RUNNING:
mluis 7:b988b60083a1 973 // Tx timeout shouldn't happen.
mluis 7:b988b60083a1 974 // But it has been observed that when it happens it is a result of a corrupted SPI transfer
mluis 7:b988b60083a1 975 // it depends on the platform design.
mluis 7:b988b60083a1 976 //
mluis 7:b988b60083a1 977 // The workaround is to put the radio in a known state. Thus, we re-initialize it.
mluis 7:b988b60083a1 978
mluis 7:b988b60083a1 979 // BEGIN WORKAROUND
mluis 7:b988b60083a1 980
mluis 7:b988b60083a1 981 // Reset the radio
mluis 7:b988b60083a1 982 Reset( );
mluis 7:b988b60083a1 983
mluis 7:b988b60083a1 984 // Initialize radio default values
mluis 7:b988b60083a1 985 SetOpMode( RF_OPMODE_SLEEP );
mluis 7:b988b60083a1 986
mluis 7:b988b60083a1 987 RadioRegistersInit( );
mluis 7:b988b60083a1 988
mluis 7:b988b60083a1 989 SetModem( MODEM_FSK );
mluis 7:b988b60083a1 990
mluis 7:b988b60083a1 991 // Restore previous network type setting.
mluis 7:b988b60083a1 992 SetPublicNetwork( this->settings.LoRa.PublicNetwork );
mluis 7:b988b60083a1 993 // END WORKAROUND
mluis 7:b988b60083a1 994
mluis 0:45c4f0364ca4 995 this->settings.State = RF_IDLE;
mluis 0:45c4f0364ca4 996 if( ( this->RadioEvents != NULL ) && ( this->RadioEvents->TxTimeout != NULL ) )
mluis 0:45c4f0364ca4 997 {
mluis 0:45c4f0364ca4 998 this->RadioEvents->TxTimeout( );
mluis 0:45c4f0364ca4 999 }
mluis 0:45c4f0364ca4 1000 break;
mluis 0:45c4f0364ca4 1001 default:
mluis 0:45c4f0364ca4 1002 break;
mluis 0:45c4f0364ca4 1003 }
mluis 0:45c4f0364ca4 1004 }
mluis 0:45c4f0364ca4 1005
mluis 0:45c4f0364ca4 1006 void SX1272::OnDio0Irq( void )
mluis 0:45c4f0364ca4 1007 {
mluis 0:45c4f0364ca4 1008 volatile uint8_t irqFlags = 0;
mluis 0:45c4f0364ca4 1009
mluis 0:45c4f0364ca4 1010 switch( this->settings.State )
mluis 7:b988b60083a1 1011 {
mluis 0:45c4f0364ca4 1012 case RF_RX_RUNNING:
mluis 0:45c4f0364ca4 1013 //TimerStop( &RxTimeoutTimer );
mluis 0:45c4f0364ca4 1014 // RxDone interrupt
mluis 0:45c4f0364ca4 1015 switch( this->settings.Modem )
mluis 0:45c4f0364ca4 1016 {
mluis 0:45c4f0364ca4 1017 case MODEM_FSK:
mluis 0:45c4f0364ca4 1018 if( this->settings.Fsk.CrcOn == true )
mluis 0:45c4f0364ca4 1019 {
mluis 0:45c4f0364ca4 1020 irqFlags = Read( REG_IRQFLAGS2 );
mluis 0:45c4f0364ca4 1021 if( ( irqFlags & RF_IRQFLAGS2_CRCOK ) != RF_IRQFLAGS2_CRCOK )
mluis 0:45c4f0364ca4 1022 {
mluis 0:45c4f0364ca4 1023 // Clear Irqs
mluis 7:b988b60083a1 1024 Write( REG_IRQFLAGS1, RF_IRQFLAGS1_RSSI |
mluis 0:45c4f0364ca4 1025 RF_IRQFLAGS1_PREAMBLEDETECT |
mluis 0:45c4f0364ca4 1026 RF_IRQFLAGS1_SYNCADDRESSMATCH );
mluis 0:45c4f0364ca4 1027 Write( REG_IRQFLAGS2, RF_IRQFLAGS2_FIFOOVERRUN );
mluis 7:b988b60083a1 1028
mluis 7:b988b60083a1 1029 rxTimeoutTimer.detach( );
mluis 7:b988b60083a1 1030
mluis 0:45c4f0364ca4 1031 if( this->settings.Fsk.RxContinuous == false )
mluis 0:45c4f0364ca4 1032 {
mluis 7:b988b60083a1 1033 rxTimeoutSyncWord.detach( );
mluis 0:45c4f0364ca4 1034 this->settings.State = RF_IDLE;
mluis 0:45c4f0364ca4 1035 }
mluis 0:45c4f0364ca4 1036 else
mluis 0:45c4f0364ca4 1037 {
mluis 0:45c4f0364ca4 1038 // Continuous mode restart Rx chain
mluis 0:45c4f0364ca4 1039 Write( REG_RXCONFIG, Read( REG_RXCONFIG ) | RF_RXCONFIG_RESTARTRXWITHOUTPLLLOCK );
GTsapparellas 8:60c42278731e 1040 rxTimeoutSyncWord.attach_us(this, &SX1272::OnTimeoutIrq,
mluis 7:b988b60083a1 1041 this->settings.Fsk.RxSingleTimeout * 1e3 );
mluis 0:45c4f0364ca4 1042 }
mluis 7:b988b60083a1 1043
mluis 0:45c4f0364ca4 1044 if( ( this->RadioEvents != NULL ) && ( this->RadioEvents->RxError != NULL ) )
mluis 0:45c4f0364ca4 1045 {
mluis 0:45c4f0364ca4 1046 this->RadioEvents->RxError( );
mluis 0:45c4f0364ca4 1047 }
mluis 0:45c4f0364ca4 1048 this->settings.FskPacketHandler.PreambleDetected = false;
mluis 0:45c4f0364ca4 1049 this->settings.FskPacketHandler.SyncWordDetected = false;
mluis 0:45c4f0364ca4 1050 this->settings.FskPacketHandler.NbBytes = 0;
mluis 0:45c4f0364ca4 1051 this->settings.FskPacketHandler.Size = 0;
mluis 0:45c4f0364ca4 1052 break;
mluis 0:45c4f0364ca4 1053 }
mluis 0:45c4f0364ca4 1054 }
mluis 0:45c4f0364ca4 1055
mluis 0:45c4f0364ca4 1056 // Read received packet size
mluis 0:45c4f0364ca4 1057 if( ( this->settings.FskPacketHandler.Size == 0 ) && ( this->settings.FskPacketHandler.NbBytes == 0 ) )
mluis 0:45c4f0364ca4 1058 {
mluis 0:45c4f0364ca4 1059 if( this->settings.Fsk.FixLen == false )
mluis 0:45c4f0364ca4 1060 {
mluis 0:45c4f0364ca4 1061 ReadFifo( ( uint8_t* )&this->settings.FskPacketHandler.Size, 1 );
mluis 0:45c4f0364ca4 1062 }
mluis 0:45c4f0364ca4 1063 else
mluis 0:45c4f0364ca4 1064 {
mluis 0:45c4f0364ca4 1065 this->settings.FskPacketHandler.Size = Read( REG_PAYLOADLENGTH );
mluis 0:45c4f0364ca4 1066 }
mluis 7:b988b60083a1 1067 ReadFifo( rxtxBuffer + this->settings.FskPacketHandler.NbBytes, this->settings.FskPacketHandler.Size - this->settings.FskPacketHandler.NbBytes );
mluis 0:45c4f0364ca4 1068 this->settings.FskPacketHandler.NbBytes += ( this->settings.FskPacketHandler.Size - this->settings.FskPacketHandler.NbBytes );
mluis 0:45c4f0364ca4 1069 }
mluis 0:45c4f0364ca4 1070 else
mluis 0:45c4f0364ca4 1071 {
mluis 7:b988b60083a1 1072 ReadFifo( rxtxBuffer + this->settings.FskPacketHandler.NbBytes, this->settings.FskPacketHandler.Size - this->settings.FskPacketHandler.NbBytes );
mluis 0:45c4f0364ca4 1073 this->settings.FskPacketHandler.NbBytes += ( this->settings.FskPacketHandler.Size - this->settings.FskPacketHandler.NbBytes );
mluis 0:45c4f0364ca4 1074 }
mluis 0:45c4f0364ca4 1075
mluis 7:b988b60083a1 1076 rxTimeoutTimer.detach( );
mluis 7:b988b60083a1 1077
mluis 0:45c4f0364ca4 1078 if( this->settings.Fsk.RxContinuous == false )
mluis 0:45c4f0364ca4 1079 {
mluis 0:45c4f0364ca4 1080 this->settings.State = RF_IDLE;
mluis 7:b988b60083a1 1081 rxTimeoutSyncWord.detach( );
mluis 0:45c4f0364ca4 1082 }
mluis 0:45c4f0364ca4 1083 else
mluis 0:45c4f0364ca4 1084 {
mluis 0:45c4f0364ca4 1085 // Continuous mode restart Rx chain
mluis 0:45c4f0364ca4 1086 Write( REG_RXCONFIG, Read( REG_RXCONFIG ) | RF_RXCONFIG_RESTARTRXWITHOUTPLLLOCK );
GTsapparellas 8:60c42278731e 1087 rxTimeoutSyncWord.attach_us(this, &SX1272::OnTimeoutIrq,
mluis 7:b988b60083a1 1088 this->settings.Fsk.RxSingleTimeout * 1e3 );
mluis 0:45c4f0364ca4 1089 }
mluis 0:45c4f0364ca4 1090
mluis 0:45c4f0364ca4 1091 if( ( this->RadioEvents != NULL ) && ( this->RadioEvents->RxDone != NULL ) )
mluis 0:45c4f0364ca4 1092 {
mluis 7:b988b60083a1 1093 this->RadioEvents->RxDone( rxtxBuffer, this->settings.FskPacketHandler.Size, this->settings.FskPacketHandler.RssiValue, 0 );
mluis 7:b988b60083a1 1094 }
mluis 0:45c4f0364ca4 1095 this->settings.FskPacketHandler.PreambleDetected = false;
mluis 0:45c4f0364ca4 1096 this->settings.FskPacketHandler.SyncWordDetected = false;
mluis 0:45c4f0364ca4 1097 this->settings.FskPacketHandler.NbBytes = 0;
mluis 0:45c4f0364ca4 1098 this->settings.FskPacketHandler.Size = 0;
mluis 0:45c4f0364ca4 1099 break;
mluis 0:45c4f0364ca4 1100 case MODEM_LORA:
mluis 0:45c4f0364ca4 1101 {
mluis 0:45c4f0364ca4 1102 int8_t snr = 0;
mluis 0:45c4f0364ca4 1103
mluis 0:45c4f0364ca4 1104 // Clear Irq
mluis 0:45c4f0364ca4 1105 Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_RXDONE );
mluis 0:45c4f0364ca4 1106
mluis 0:45c4f0364ca4 1107 irqFlags = Read( REG_LR_IRQFLAGS );
mluis 0:45c4f0364ca4 1108 if( ( irqFlags & RFLR_IRQFLAGS_PAYLOADCRCERROR_MASK ) == RFLR_IRQFLAGS_PAYLOADCRCERROR )
mluis 0:45c4f0364ca4 1109 {
mluis 0:45c4f0364ca4 1110 // Clear Irq
mluis 0:45c4f0364ca4 1111 Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_PAYLOADCRCERROR );
mluis 0:45c4f0364ca4 1112
mluis 0:45c4f0364ca4 1113 if( this->settings.LoRa.RxContinuous == false )
mluis 0:45c4f0364ca4 1114 {
mluis 0:45c4f0364ca4 1115 this->settings.State = RF_IDLE;
mluis 0:45c4f0364ca4 1116 }
mluis 0:45c4f0364ca4 1117 rxTimeoutTimer.detach( );
mluis 0:45c4f0364ca4 1118
mluis 0:45c4f0364ca4 1119 if( ( this->RadioEvents != NULL ) && ( this->RadioEvents->RxError != NULL ) )
mluis 0:45c4f0364ca4 1120 {
mluis 0:45c4f0364ca4 1121 this->RadioEvents->RxError( );
mluis 0:45c4f0364ca4 1122 }
mluis 0:45c4f0364ca4 1123 break;
mluis 0:45c4f0364ca4 1124 }
mluis 0:45c4f0364ca4 1125
mluis 0:45c4f0364ca4 1126 this->settings.LoRaPacketHandler.SnrValue = Read( REG_LR_PKTSNRVALUE );
mluis 0:45c4f0364ca4 1127 if( this->settings.LoRaPacketHandler.SnrValue & 0x80 ) // The SNR sign bit is 1
mluis 0:45c4f0364ca4 1128 {
mluis 0:45c4f0364ca4 1129 // Invert and divide by 4
mluis 0:45c4f0364ca4 1130 snr = ( ( ~this->settings.LoRaPacketHandler.SnrValue + 1 ) & 0xFF ) >> 2;
mluis 0:45c4f0364ca4 1131 snr = -snr;
mluis 0:45c4f0364ca4 1132 }
mluis 0:45c4f0364ca4 1133 else
mluis 0:45c4f0364ca4 1134 {
mluis 0:45c4f0364ca4 1135 // Divide by 4
mluis 0:45c4f0364ca4 1136 snr = ( this->settings.LoRaPacketHandler.SnrValue & 0xFF ) >> 2;
mluis 0:45c4f0364ca4 1137 }
mluis 0:45c4f0364ca4 1138
mluis 0:45c4f0364ca4 1139 int16_t rssi = Read( REG_LR_PKTRSSIVALUE );
mluis 0:45c4f0364ca4 1140 if( snr < 0 )
mluis 0:45c4f0364ca4 1141 {
mluis 0:45c4f0364ca4 1142 this->settings.LoRaPacketHandler.RssiValue = RSSI_OFFSET + rssi + ( rssi >> 4 ) +
mluis 0:45c4f0364ca4 1143 snr;
mluis 0:45c4f0364ca4 1144 }
mluis 0:45c4f0364ca4 1145 else
mluis 7:b988b60083a1 1146 {
mluis 0:45c4f0364ca4 1147 this->settings.LoRaPacketHandler.RssiValue = RSSI_OFFSET + rssi + ( rssi >> 4 );
mluis 0:45c4f0364ca4 1148 }
mluis 0:45c4f0364ca4 1149
mluis 0:45c4f0364ca4 1150 this->settings.LoRaPacketHandler.Size = Read( REG_LR_RXNBBYTES );
mluis 7:b988b60083a1 1151 ReadFifo( rxtxBuffer, this->settings.LoRaPacketHandler.Size );
mluis 7:b988b60083a1 1152
mluis 0:45c4f0364ca4 1153 if( this->settings.LoRa.RxContinuous == false )
mluis 0:45c4f0364ca4 1154 {
mluis 0:45c4f0364ca4 1155 this->settings.State = RF_IDLE;
mluis 0:45c4f0364ca4 1156 }
mluis 0:45c4f0364ca4 1157 rxTimeoutTimer.detach( );
mluis 0:45c4f0364ca4 1158
mluis 0:45c4f0364ca4 1159 if( ( this->RadioEvents != NULL ) && ( this->RadioEvents->RxDone != NULL ) )
mluis 0:45c4f0364ca4 1160 {
mluis 7:b988b60083a1 1161 this->RadioEvents->RxDone( rxtxBuffer, this->settings.LoRaPacketHandler.Size, this->settings.LoRaPacketHandler.RssiValue, this->settings.LoRaPacketHandler.SnrValue );
mluis 0:45c4f0364ca4 1162 }
mluis 0:45c4f0364ca4 1163 }
mluis 0:45c4f0364ca4 1164 break;
mluis 0:45c4f0364ca4 1165 default:
mluis 0:45c4f0364ca4 1166 break;
mluis 0:45c4f0364ca4 1167 }
mluis 0:45c4f0364ca4 1168 break;
mluis 0:45c4f0364ca4 1169 case RF_TX_RUNNING:
mluis 7:b988b60083a1 1170 txTimeoutTimer.detach( );
mluis 0:45c4f0364ca4 1171 // TxDone interrupt
mluis 0:45c4f0364ca4 1172 switch( this->settings.Modem )
mluis 0:45c4f0364ca4 1173 {
mluis 0:45c4f0364ca4 1174 case MODEM_LORA:
mluis 0:45c4f0364ca4 1175 // Clear Irq
mluis 0:45c4f0364ca4 1176 Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_TXDONE );
mluis 0:45c4f0364ca4 1177 // Intentional fall through
mluis 0:45c4f0364ca4 1178 case MODEM_FSK:
mluis 0:45c4f0364ca4 1179 default:
mluis 0:45c4f0364ca4 1180 this->settings.State = RF_IDLE;
mluis 0:45c4f0364ca4 1181 if( ( this->RadioEvents != NULL ) && ( this->RadioEvents->TxDone != NULL ) )
mluis 0:45c4f0364ca4 1182 {
mluis 0:45c4f0364ca4 1183 this->RadioEvents->TxDone( );
mluis 7:b988b60083a1 1184 }
mluis 0:45c4f0364ca4 1185 break;
mluis 0:45c4f0364ca4 1186 }
mluis 0:45c4f0364ca4 1187 break;
mluis 0:45c4f0364ca4 1188 default:
mluis 0:45c4f0364ca4 1189 break;
mluis 0:45c4f0364ca4 1190 }
mluis 0:45c4f0364ca4 1191 }
mluis 0:45c4f0364ca4 1192
mluis 0:45c4f0364ca4 1193 void SX1272::OnDio1Irq( void )
mluis 0:45c4f0364ca4 1194 {
mluis 0:45c4f0364ca4 1195 switch( this->settings.State )
mluis 7:b988b60083a1 1196 {
mluis 0:45c4f0364ca4 1197 case RF_RX_RUNNING:
mluis 0:45c4f0364ca4 1198 switch( this->settings.Modem )
mluis 0:45c4f0364ca4 1199 {
mluis 0:45c4f0364ca4 1200 case MODEM_FSK:
mluis 0:45c4f0364ca4 1201 // FifoLevel interrupt
mluis 0:45c4f0364ca4 1202 // Read received packet size
mluis 0:45c4f0364ca4 1203 if( ( this->settings.FskPacketHandler.Size == 0 ) && ( this->settings.FskPacketHandler.NbBytes == 0 ) )
mluis 0:45c4f0364ca4 1204 {
mluis 0:45c4f0364ca4 1205 if( this->settings.Fsk.FixLen == false )
mluis 0:45c4f0364ca4 1206 {
mluis 0:45c4f0364ca4 1207 ReadFifo( ( uint8_t* )&this->settings.FskPacketHandler.Size, 1 );
mluis 0:45c4f0364ca4 1208 }
mluis 0:45c4f0364ca4 1209 else
mluis 0:45c4f0364ca4 1210 {
mluis 0:45c4f0364ca4 1211 this->settings.FskPacketHandler.Size = Read( REG_PAYLOADLENGTH );
mluis 0:45c4f0364ca4 1212 }
mluis 0:45c4f0364ca4 1213 }
mluis 0:45c4f0364ca4 1214
mluis 0:45c4f0364ca4 1215 if( ( this->settings.FskPacketHandler.Size - this->settings.FskPacketHandler.NbBytes ) > this->settings.FskPacketHandler.FifoThresh )
mluis 0:45c4f0364ca4 1216 {
mluis 7:b988b60083a1 1217 ReadFifo( ( rxtxBuffer + this->settings.FskPacketHandler.NbBytes ), this->settings.FskPacketHandler.FifoThresh );
mluis 0:45c4f0364ca4 1218 this->settings.FskPacketHandler.NbBytes += this->settings.FskPacketHandler.FifoThresh;
mluis 0:45c4f0364ca4 1219 }
mluis 0:45c4f0364ca4 1220 else
mluis 0:45c4f0364ca4 1221 {
mluis 7:b988b60083a1 1222 ReadFifo( ( rxtxBuffer + this->settings.FskPacketHandler.NbBytes ), this->settings.FskPacketHandler.Size - this->settings.FskPacketHandler.NbBytes );
mluis 0:45c4f0364ca4 1223 this->settings.FskPacketHandler.NbBytes += ( this->settings.FskPacketHandler.Size - this->settings.FskPacketHandler.NbBytes );
mluis 0:45c4f0364ca4 1224 }
mluis 0:45c4f0364ca4 1225 break;
mluis 0:45c4f0364ca4 1226 case MODEM_LORA:
mluis 0:45c4f0364ca4 1227 // Sync time out
mluis 0:45c4f0364ca4 1228 rxTimeoutTimer.detach( );
mluis 7:b988b60083a1 1229 // Clear Irq
mluis 7:b988b60083a1 1230 Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_RXTIMEOUT );
mluis 7:b988b60083a1 1231
mluis 0:45c4f0364ca4 1232 this->settings.State = RF_IDLE;
mluis 0:45c4f0364ca4 1233 if( ( this->RadioEvents != NULL ) && ( this->RadioEvents->RxTimeout != NULL ) )
mluis 0:45c4f0364ca4 1234 {
mluis 0:45c4f0364ca4 1235 this->RadioEvents->RxTimeout( );
mluis 0:45c4f0364ca4 1236 }
mluis 0:45c4f0364ca4 1237 break;
mluis 0:45c4f0364ca4 1238 default:
mluis 0:45c4f0364ca4 1239 break;
mluis 0:45c4f0364ca4 1240 }
mluis 0:45c4f0364ca4 1241 break;
mluis 0:45c4f0364ca4 1242 case RF_TX_RUNNING:
mluis 0:45c4f0364ca4 1243 switch( this->settings.Modem )
mluis 0:45c4f0364ca4 1244 {
mluis 0:45c4f0364ca4 1245 case MODEM_FSK:
mluis 7:b988b60083a1 1246 // FifoEmpty interrupt
mluis 0:45c4f0364ca4 1247 if( ( this->settings.FskPacketHandler.Size - this->settings.FskPacketHandler.NbBytes ) > this->settings.FskPacketHandler.ChunkSize )
mluis 0:45c4f0364ca4 1248 {
mluis 7:b988b60083a1 1249 WriteFifo( ( rxtxBuffer + this->settings.FskPacketHandler.NbBytes ), this->settings.FskPacketHandler.ChunkSize );
mluis 0:45c4f0364ca4 1250 this->settings.FskPacketHandler.NbBytes += this->settings.FskPacketHandler.ChunkSize;
mluis 0:45c4f0364ca4 1251 }
mluis 7:b988b60083a1 1252 else
mluis 0:45c4f0364ca4 1253 {
mluis 0:45c4f0364ca4 1254 // Write the last chunk of data
mluis 7:b988b60083a1 1255 WriteFifo( rxtxBuffer + this->settings.FskPacketHandler.NbBytes, this->settings.FskPacketHandler.Size - this->settings.FskPacketHandler.NbBytes );
mluis 0:45c4f0364ca4 1256 this->settings.FskPacketHandler.NbBytes += this->settings.FskPacketHandler.Size - this->settings.FskPacketHandler.NbBytes;
mluis 0:45c4f0364ca4 1257 }
mluis 0:45c4f0364ca4 1258 break;
mluis 0:45c4f0364ca4 1259 case MODEM_LORA:
mluis 0:45c4f0364ca4 1260 break;
mluis 0:45c4f0364ca4 1261 default:
mluis 0:45c4f0364ca4 1262 break;
mluis 0:45c4f0364ca4 1263 }
mluis 0:45c4f0364ca4 1264 break;
mluis 0:45c4f0364ca4 1265 default:
mluis 0:45c4f0364ca4 1266 break;
mluis 0:45c4f0364ca4 1267 }
mluis 0:45c4f0364ca4 1268 }
mluis 0:45c4f0364ca4 1269
mluis 0:45c4f0364ca4 1270 void SX1272::OnDio2Irq( void )
mluis 0:45c4f0364ca4 1271 {
mluis 0:45c4f0364ca4 1272 switch( this->settings.State )
mluis 7:b988b60083a1 1273 {
mluis 0:45c4f0364ca4 1274 case RF_RX_RUNNING:
mluis 0:45c4f0364ca4 1275 switch( this->settings.Modem )
mluis 0:45c4f0364ca4 1276 {
mluis 0:45c4f0364ca4 1277 case MODEM_FSK:
mluis 7:b988b60083a1 1278 // Checks if DIO4 is connected. If it is not PreambleDtected is set to true.
mluis 7:b988b60083a1 1279 if( this->dioIrq[4] == NULL )
mluis 7:b988b60083a1 1280 {
mluis 7:b988b60083a1 1281 this->settings.FskPacketHandler.PreambleDetected = true;
mluis 7:b988b60083a1 1282 }
mluis 7:b988b60083a1 1283
mluis 0:45c4f0364ca4 1284 if( ( this->settings.FskPacketHandler.PreambleDetected == true ) && ( this->settings.FskPacketHandler.SyncWordDetected == false ) )
mluis 0:45c4f0364ca4 1285 {
mluis 0:45c4f0364ca4 1286 rxTimeoutSyncWord.detach( );
mluis 7:b988b60083a1 1287
mluis 0:45c4f0364ca4 1288 this->settings.FskPacketHandler.SyncWordDetected = true;
mluis 7:b988b60083a1 1289
mluis 0:45c4f0364ca4 1290 this->settings.FskPacketHandler.RssiValue = -( Read( REG_RSSIVALUE ) >> 1 );
mluis 0:45c4f0364ca4 1291
mluis 0:45c4f0364ca4 1292 this->settings.FskPacketHandler.AfcValue = ( int32_t )( double )( ( ( uint16_t )Read( REG_AFCMSB ) << 8 ) |
mluis 0:45c4f0364ca4 1293 ( uint16_t )Read( REG_AFCLSB ) ) *
mluis 0:45c4f0364ca4 1294 ( double )FREQ_STEP;
mluis 0:45c4f0364ca4 1295 this->settings.FskPacketHandler.RxGain = ( Read( REG_LNA ) >> 5 ) & 0x07;
mluis 0:45c4f0364ca4 1296 }
mluis 0:45c4f0364ca4 1297 break;
mluis 0:45c4f0364ca4 1298 case MODEM_LORA:
mluis 0:45c4f0364ca4 1299 if( this->settings.LoRa.FreqHopOn == true )
mluis 0:45c4f0364ca4 1300 {
mluis 0:45c4f0364ca4 1301 // Clear Irq
mluis 0:45c4f0364ca4 1302 Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL );
mluis 7:b988b60083a1 1303
mluis 0:45c4f0364ca4 1304 if( ( this->RadioEvents != NULL ) && ( this->RadioEvents->FhssChangeChannel != NULL ) )
mluis 0:45c4f0364ca4 1305 {
mluis 0:45c4f0364ca4 1306 this->RadioEvents->FhssChangeChannel( ( Read( REG_LR_HOPCHANNEL ) & RFLR_HOPCHANNEL_CHANNEL_MASK ) );
mluis 0:45c4f0364ca4 1307 }
mluis 0:45c4f0364ca4 1308 }
mluis 0:45c4f0364ca4 1309 break;
mluis 0:45c4f0364ca4 1310 default:
mluis 0:45c4f0364ca4 1311 break;
mluis 0:45c4f0364ca4 1312 }
mluis 0:45c4f0364ca4 1313 break;
mluis 0:45c4f0364ca4 1314 case RF_TX_RUNNING:
mluis 0:45c4f0364ca4 1315 switch( this->settings.Modem )
mluis 0:45c4f0364ca4 1316 {
mluis 0:45c4f0364ca4 1317 case MODEM_FSK:
mluis 0:45c4f0364ca4 1318 break;
mluis 0:45c4f0364ca4 1319 case MODEM_LORA:
mluis 0:45c4f0364ca4 1320 if( this->settings.LoRa.FreqHopOn == true )
mluis 0:45c4f0364ca4 1321 {
mluis 0:45c4f0364ca4 1322 // Clear Irq
mluis 0:45c4f0364ca4 1323 Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_FHSSCHANGEDCHANNEL );
mluis 7:b988b60083a1 1324
mluis 0:45c4f0364ca4 1325 if( ( this->RadioEvents != NULL ) && ( this->RadioEvents->FhssChangeChannel != NULL ) )
mluis 0:45c4f0364ca4 1326 {
mluis 0:45c4f0364ca4 1327 this->RadioEvents->FhssChangeChannel( ( Read( REG_LR_HOPCHANNEL ) & RFLR_HOPCHANNEL_CHANNEL_MASK ) );
mluis 0:45c4f0364ca4 1328 }
mluis 0:45c4f0364ca4 1329 }
mluis 0:45c4f0364ca4 1330 break;
mluis 0:45c4f0364ca4 1331 default:
mluis 0:45c4f0364ca4 1332 break;
mluis 0:45c4f0364ca4 1333 }
mluis 0:45c4f0364ca4 1334 break;
mluis 0:45c4f0364ca4 1335 default:
mluis 0:45c4f0364ca4 1336 break;
mluis 0:45c4f0364ca4 1337 }
mluis 0:45c4f0364ca4 1338 }
mluis 0:45c4f0364ca4 1339
mluis 0:45c4f0364ca4 1340 void SX1272::OnDio3Irq( void )
mluis 0:45c4f0364ca4 1341 {
mluis 0:45c4f0364ca4 1342 switch( this->settings.Modem )
mluis 0:45c4f0364ca4 1343 {
mluis 0:45c4f0364ca4 1344 case MODEM_FSK:
mluis 0:45c4f0364ca4 1345 break;
mluis 0:45c4f0364ca4 1346 case MODEM_LORA:
mluis 0:45c4f0364ca4 1347 if( ( Read( REG_LR_IRQFLAGS ) & RFLR_IRQFLAGS_CADDETECTED ) == RFLR_IRQFLAGS_CADDETECTED )
mluis 0:45c4f0364ca4 1348 {
mluis 0:45c4f0364ca4 1349 // Clear Irq
mluis 0:45c4f0364ca4 1350 Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_CADDETECTED | RFLR_IRQFLAGS_CADDONE );
mluis 0:45c4f0364ca4 1351 if( ( this->RadioEvents != NULL ) && ( this->RadioEvents->CadDone != NULL ) )
mluis 0:45c4f0364ca4 1352 {
mluis 0:45c4f0364ca4 1353 this->RadioEvents->CadDone( true );
mluis 0:45c4f0364ca4 1354 }
mluis 0:45c4f0364ca4 1355 }
mluis 0:45c4f0364ca4 1356 else
mluis 7:b988b60083a1 1357 {
mluis 0:45c4f0364ca4 1358 // Clear Irq
mluis 0:45c4f0364ca4 1359 Write( REG_LR_IRQFLAGS, RFLR_IRQFLAGS_CADDONE );
mluis 0:45c4f0364ca4 1360 if( ( this->RadioEvents != NULL ) && ( this->RadioEvents->CadDone != NULL ) )
mluis 0:45c4f0364ca4 1361 {
mluis 0:45c4f0364ca4 1362 this->RadioEvents->CadDone( false );
mluis 0:45c4f0364ca4 1363 }
mluis 0:45c4f0364ca4 1364 }
mluis 0:45c4f0364ca4 1365 break;
mluis 0:45c4f0364ca4 1366 default:
mluis 0:45c4f0364ca4 1367 break;
mluis 0:45c4f0364ca4 1368 }
mluis 0:45c4f0364ca4 1369 }
mluis 0:45c4f0364ca4 1370
mluis 0:45c4f0364ca4 1371 void SX1272::OnDio4Irq( void )
mluis 0:45c4f0364ca4 1372 {
mluis 0:45c4f0364ca4 1373 switch( this->settings.Modem )
mluis 0:45c4f0364ca4 1374 {
mluis 0:45c4f0364ca4 1375 case MODEM_FSK:
mluis 0:45c4f0364ca4 1376 {
mluis 0:45c4f0364ca4 1377 if( this->settings.FskPacketHandler.PreambleDetected == false )
mluis 0:45c4f0364ca4 1378 {
mluis 0:45c4f0364ca4 1379 this->settings.FskPacketHandler.PreambleDetected = true;
mluis 7:b988b60083a1 1380 }
mluis 0:45c4f0364ca4 1381 }
mluis 0:45c4f0364ca4 1382 break;
mluis 0:45c4f0364ca4 1383 case MODEM_LORA:
mluis 0:45c4f0364ca4 1384 break;
mluis 0:45c4f0364ca4 1385 default:
mluis 0:45c4f0364ca4 1386 break;
mluis 0:45c4f0364ca4 1387 }
mluis 0:45c4f0364ca4 1388 }
mluis 0:45c4f0364ca4 1389
mluis 0:45c4f0364ca4 1390 void SX1272::OnDio5Irq( void )
mluis 0:45c4f0364ca4 1391 {
mluis 0:45c4f0364ca4 1392 switch( this->settings.Modem )
mluis 0:45c4f0364ca4 1393 {
mluis 0:45c4f0364ca4 1394 case MODEM_FSK:
mluis 0:45c4f0364ca4 1395 break;
mluis 0:45c4f0364ca4 1396 case MODEM_LORA:
mluis 0:45c4f0364ca4 1397 break;
mluis 0:45c4f0364ca4 1398 default:
mluis 0:45c4f0364ca4 1399 break;
mluis 0:45c4f0364ca4 1400 }
mluis 0:45c4f0364ca4 1401 }