Frederick Huang / mbed-STM32L452

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targets/cmsis/TARGET_STM/TARGET_STM32L0/stm32l0xx_hal_lcd.h@144:ef7eb2e8f9f7, 2016-09-02 (annotated)

Committer:
<>
Date:
Fri Sep 02 15:07:44 2016 +0100
Revision:
144:ef7eb2e8f9f7
Parent:
113:b3775bf36a83 
This updates the lib to the mbed lib v125

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32l0xx_hal_lcd.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @version V1.5.0
<> 144:ef7eb2e8f9f7 6 * @date 8-January-2016
<> 144:ef7eb2e8f9f7 7 * @brief Header file of LCD Controller HAL module.
<> 144:ef7eb2e8f9f7 8 ******************************************************************************
<> 144:ef7eb2e8f9f7 9 * @attention
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 14 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 18 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 19 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 21 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 22 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 23 *
<> 144:ef7eb2e8f9f7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 34 *
<> 144:ef7eb2e8f9f7 35 ******************************************************************************
<> 144:ef7eb2e8f9f7 36 */
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 #if defined (STM32L053xx) || defined (STM32L063xx) || defined (STM32L073xx) || defined (STM32L083xx)
<> 144:ef7eb2e8f9f7 39
<> 144:ef7eb2e8f9f7 40 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 41 #ifndef __STM32L0xx_HAL_LCD_H
<> 144:ef7eb2e8f9f7 42 #define __STM32L0xx_HAL_LCD_H
<> 144:ef7eb2e8f9f7 43
<> 144:ef7eb2e8f9f7 44 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 45 extern "C" {
<> 144:ef7eb2e8f9f7 46 #endif
<> 144:ef7eb2e8f9f7 47
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 50 #include "stm32l0xx_hal_def.h"
<> 144:ef7eb2e8f9f7 51
<> 144:ef7eb2e8f9f7 52 /** @addtogroup STM32L0xx_HAL_Driver
<> 144:ef7eb2e8f9f7 53 * @{
<> 144:ef7eb2e8f9f7 54 */
<> 144:ef7eb2e8f9f7 55
<> 144:ef7eb2e8f9f7 56 /** @defgroup LCD LCD
<> 144:ef7eb2e8f9f7 57 * @{
<> 144:ef7eb2e8f9f7 58 */
<> 144:ef7eb2e8f9f7 59
<> 144:ef7eb2e8f9f7 60 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 61 /** @defgroup LCD_Exported_Types LCD Exported Types
<> 144:ef7eb2e8f9f7 62 * @{
<> 144:ef7eb2e8f9f7 63 */
<> 144:ef7eb2e8f9f7 64
<> 144:ef7eb2e8f9f7 65 /**
<> 144:ef7eb2e8f9f7 66 * @brief LCD Init structure definition
<> 144:ef7eb2e8f9f7 67 */
<> 144:ef7eb2e8f9f7 68
<> 144:ef7eb2e8f9f7 69 typedef struct
<> 144:ef7eb2e8f9f7 70 {
<> 144:ef7eb2e8f9f7 71 uint32_t Prescaler; /*!< Configures the LCD Prescaler.
<> 144:ef7eb2e8f9f7 72 This parameter can be one value of @ref LCD_Prescaler */
<> 144:ef7eb2e8f9f7 73 uint32_t Divider; /*!< Configures the LCD Divider.
<> 144:ef7eb2e8f9f7 74 This parameter can be one value of @ref LCD_Divider */
<> 144:ef7eb2e8f9f7 75 uint32_t Duty; /*!< Configures the LCD Duty.
<> 144:ef7eb2e8f9f7 76 This parameter can be one value of @ref LCD_Duty */
<> 144:ef7eb2e8f9f7 77 uint32_t Bias; /*!< Configures the LCD Bias.
<> 144:ef7eb2e8f9f7 78 This parameter can be one value of @ref LCD_Bias */
<> 144:ef7eb2e8f9f7 79 uint32_t VoltageSource; /*!< Selects the LCD Voltage source.
<> 144:ef7eb2e8f9f7 80 This parameter can be one value of @ref LCD_Voltage_Source */
<> 144:ef7eb2e8f9f7 81 uint32_t Contrast; /*!< Configures the LCD Contrast.
<> 144:ef7eb2e8f9f7 82 This parameter can be one value of @ref LCD_Contrast */
<> 144:ef7eb2e8f9f7 83 uint32_t DeadTime; /*!< Configures the LCD Dead Time.
<> 144:ef7eb2e8f9f7 84 This parameter can be one value of @ref LCD_DeadTime */
<> 144:ef7eb2e8f9f7 85 uint32_t PulseOnDuration; /*!< Configures the LCD Pulse On Duration.
<> 144:ef7eb2e8f9f7 86 This parameter can be one value of @ref LCD_PulseOnDuration */
<> 144:ef7eb2e8f9f7 87 uint32_t HighDrive; /*!< Configures the LCD High Drive.
<> 144:ef7eb2e8f9f7 88 This parameter can be one value of @ref LCD_HighDrive */
<> 144:ef7eb2e8f9f7 89 uint32_t BlinkMode; /*!< Configures the LCD Blink Mode.
<> 144:ef7eb2e8f9f7 90 This parameter can be one value of @ref LCD_BlinkMode */
<> 144:ef7eb2e8f9f7 91 uint32_t BlinkFrequency; /*!< Configures the LCD Blink frequency.
<> 144:ef7eb2e8f9f7 92 This parameter can be one value of @ref LCD_BlinkFrequency */
<> 144:ef7eb2e8f9f7 93 uint32_t MuxSegment; /*!< Enable or disable mux segment.
<> 144:ef7eb2e8f9f7 94 This parameter can be one value of @ref LCD_MuxSegment */
<> 144:ef7eb2e8f9f7 95 }LCD_InitTypeDef;
<> 144:ef7eb2e8f9f7 96
<> 144:ef7eb2e8f9f7 97 /**
<> 144:ef7eb2e8f9f7 98 * @brief HAL LCD State structures definition
<> 144:ef7eb2e8f9f7 99 */
<> 144:ef7eb2e8f9f7 100 typedef enum
<> 144:ef7eb2e8f9f7 101 {
<> 144:ef7eb2e8f9f7 102 HAL_LCD_STATE_RESET = 0x00, /*!< Peripheral is not yet Initialized */
<> 144:ef7eb2e8f9f7 103 HAL_LCD_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
<> 144:ef7eb2e8f9f7 104 HAL_LCD_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
<> 144:ef7eb2e8f9f7 105 HAL_LCD_STATE_TIMEOUT = 0x03, /*!< Timeout state */
<> 144:ef7eb2e8f9f7 106 HAL_LCD_STATE_ERROR = 0x04 /*!< Error */
<> 144:ef7eb2e8f9f7 107 }HAL_LCD_StateTypeDef;
<> 144:ef7eb2e8f9f7 108
<> 144:ef7eb2e8f9f7 109 /**
<> 144:ef7eb2e8f9f7 110 * @brief UART handle Structure definition
<> 144:ef7eb2e8f9f7 111 */
<> 144:ef7eb2e8f9f7 112 typedef struct
<> 144:ef7eb2e8f9f7 113 {
<> 144:ef7eb2e8f9f7 114 LCD_TypeDef *Instance; /* LCD registers base address */
<> 144:ef7eb2e8f9f7 115
<> 144:ef7eb2e8f9f7 116 LCD_InitTypeDef Init; /* LCD communication parameters */
<> 144:ef7eb2e8f9f7 117
<> 144:ef7eb2e8f9f7 118 HAL_LockTypeDef Lock; /* Locking object */
<> 144:ef7eb2e8f9f7 119
<> 144:ef7eb2e8f9f7 120 __IO HAL_LCD_StateTypeDef State; /* LCD communication state */
<> 144:ef7eb2e8f9f7 121
<> 144:ef7eb2e8f9f7 122 __IO uint32_t ErrorCode; /* LCD Error code */
<> 144:ef7eb2e8f9f7 123
<> 144:ef7eb2e8f9f7 124 }LCD_HandleTypeDef;
<> 144:ef7eb2e8f9f7 125
<> 144:ef7eb2e8f9f7 126 /**
<> 144:ef7eb2e8f9f7 127 * @}
<> 144:ef7eb2e8f9f7 128 */
<> 144:ef7eb2e8f9f7 129
<> 144:ef7eb2e8f9f7 130 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 131
<> 144:ef7eb2e8f9f7 132 /** @defgroup LCD_Exported_Constants LCD Exported Constants
<> 144:ef7eb2e8f9f7 133 * @{
<> 144:ef7eb2e8f9f7 134 */
<> 144:ef7eb2e8f9f7 135
<> 144:ef7eb2e8f9f7 136 /** @defgroup LCD_ErrorCode LCD Error Code
<> 144:ef7eb2e8f9f7 137 * @{
<> 144:ef7eb2e8f9f7 138 */
<> 144:ef7eb2e8f9f7 139 #define HAL_LCD_ERROR_NONE ((uint32_t)0x00) /*!< No error */
<> 144:ef7eb2e8f9f7 140 #define HAL_LCD_ERROR_FCRSF ((uint32_t)0x01) /*!< Synchro flag timeout error */
<> 144:ef7eb2e8f9f7 141 #define HAL_LCD_ERROR_UDR ((uint32_t)0x02) /*!< Update display request flag timeout error */
<> 144:ef7eb2e8f9f7 142 #define HAL_LCD_ERROR_UDD ((uint32_t)0x04) /*!< Update display done flag timeout error */
<> 144:ef7eb2e8f9f7 143 #define HAL_LCD_ERROR_ENS ((uint32_t)0x08) /*!< LCD enabled status flag timeout error */
<> 144:ef7eb2e8f9f7 144 #define HAL_LCD_ERROR_RDY ((uint32_t)0x10) /*!< LCD Booster ready timeout error */
<> 144:ef7eb2e8f9f7 145 /**
<> 144:ef7eb2e8f9f7 146 * @}
<> 144:ef7eb2e8f9f7 147 */
<> 144:ef7eb2e8f9f7 148
<> 144:ef7eb2e8f9f7 149 /** @defgroup LCD_Prescaler LCD Prescaler
<> 144:ef7eb2e8f9f7 150 * @{
<> 144:ef7eb2e8f9f7 151 */
<> 144:ef7eb2e8f9f7 152
<> 144:ef7eb2e8f9f7 153 #define LCD_PRESCALER_1 ((uint32_t)0x00000000) /*!< CLKPS = LCDCLK */
<> 144:ef7eb2e8f9f7 154 #define LCD_PRESCALER_2 ((uint32_t)0x00400000) /*!< CLKPS = LCDCLK/2 */
<> 144:ef7eb2e8f9f7 155 #define LCD_PRESCALER_4 ((uint32_t)0x00800000) /*!< CLKPS = LCDCLK/4 */
<> 144:ef7eb2e8f9f7 156 #define LCD_PRESCALER_8 ((uint32_t)0x00C00000) /*!< CLKPS = LCDCLK/8 */
<> 144:ef7eb2e8f9f7 157 #define LCD_PRESCALER_16 ((uint32_t)0x01000000) /*!< CLKPS = LCDCLK/16 */
<> 144:ef7eb2e8f9f7 158 #define LCD_PRESCALER_32 ((uint32_t)0x01400000) /*!< CLKPS = LCDCLK/32 */
<> 144:ef7eb2e8f9f7 159 #define LCD_PRESCALER_64 ((uint32_t)0x01800000) /*!< CLKPS = LCDCLK/64 */
<> 144:ef7eb2e8f9f7 160 #define LCD_PRESCALER_128 ((uint32_t)0x01C00000) /*!< CLKPS = LCDCLK/128 */
<> 144:ef7eb2e8f9f7 161 #define LCD_PRESCALER_256 ((uint32_t)0x02000000) /*!< CLKPS = LCDCLK/256 */
<> 144:ef7eb2e8f9f7 162 #define LCD_PRESCALER_512 ((uint32_t)0x02400000) /*!< CLKPS = LCDCLK/512 */
<> 144:ef7eb2e8f9f7 163 #define LCD_PRESCALER_1024 ((uint32_t)0x02800000) /*!< CLKPS = LCDCLK/1024 */
<> 144:ef7eb2e8f9f7 164 #define LCD_PRESCALER_2048 ((uint32_t)0x02C00000) /*!< CLKPS = LCDCLK/2048 */
<> 144:ef7eb2e8f9f7 165 #define LCD_PRESCALER_4096 ((uint32_t)0x03000000) /*!< CLKPS = LCDCLK/4096 */
<> 144:ef7eb2e8f9f7 166 #define LCD_PRESCALER_8192 ((uint32_t)0x03400000) /*!< CLKPS = LCDCLK/8192 */
<> 144:ef7eb2e8f9f7 167 #define LCD_PRESCALER_16384 ((uint32_t)0x03800000) /*!< CLKPS = LCDCLK/16384 */
<> 144:ef7eb2e8f9f7 168 #define LCD_PRESCALER_32768 ((uint32_t)LCD_FCR_PS) /*!< CLKPS = LCDCLK/32768 */
<> 144:ef7eb2e8f9f7 169
<> 144:ef7eb2e8f9f7 170 #define IS_LCD_PRESCALER(__PRESCALER__) (((__PRESCALER__) == LCD_PRESCALER_1) || \
<> 144:ef7eb2e8f9f7 171 ((__PRESCALER__) == LCD_PRESCALER_2) || \
<> 144:ef7eb2e8f9f7 172 ((__PRESCALER__) == LCD_PRESCALER_4) || \
<> 144:ef7eb2e8f9f7 173 ((__PRESCALER__) == LCD_PRESCALER_8) || \
<> 144:ef7eb2e8f9f7 174 ((__PRESCALER__) == LCD_PRESCALER_16) || \
<> 144:ef7eb2e8f9f7 175 ((__PRESCALER__) == LCD_PRESCALER_32) || \
<> 144:ef7eb2e8f9f7 176 ((__PRESCALER__) == LCD_PRESCALER_64) || \
<> 144:ef7eb2e8f9f7 177 ((__PRESCALER__) == LCD_PRESCALER_128) || \
<> 144:ef7eb2e8f9f7 178 ((__PRESCALER__) == LCD_PRESCALER_256) || \
<> 144:ef7eb2e8f9f7 179 ((__PRESCALER__) == LCD_PRESCALER_512) || \
<> 144:ef7eb2e8f9f7 180 ((__PRESCALER__) == LCD_PRESCALER_1024) || \
<> 144:ef7eb2e8f9f7 181 ((__PRESCALER__) == LCD_PRESCALER_2048) || \
<> 144:ef7eb2e8f9f7 182 ((__PRESCALER__) == LCD_PRESCALER_4096) || \
<> 144:ef7eb2e8f9f7 183 ((__PRESCALER__) == LCD_PRESCALER_8192) || \
<> 144:ef7eb2e8f9f7 184 ((__PRESCALER__) == LCD_PRESCALER_16384) || \
<> 144:ef7eb2e8f9f7 185 ((__PRESCALER__) == LCD_PRESCALER_32768))
<> 144:ef7eb2e8f9f7 186
<> 144:ef7eb2e8f9f7 187 /**
<> 144:ef7eb2e8f9f7 188 * @}
<> 144:ef7eb2e8f9f7 189 */
<> 144:ef7eb2e8f9f7 190
<> 144:ef7eb2e8f9f7 191 /** @defgroup LCD_Divider LCD Divider
<> 144:ef7eb2e8f9f7 192 * @{
<> 144:ef7eb2e8f9f7 193 */
<> 144:ef7eb2e8f9f7 194
<> 144:ef7eb2e8f9f7 195 #define LCD_DIVIDER_16 ((uint32_t)0x00000000) /*!< LCD frequency = CLKPS/16 */
<> 144:ef7eb2e8f9f7 196 #define LCD_DIVIDER_17 ((uint32_t)0x00040000) /*!< LCD frequency = CLKPS/17 */
<> 144:ef7eb2e8f9f7 197 #define LCD_DIVIDER_18 ((uint32_t)0x00080000) /*!< LCD frequency = CLKPS/18 */
<> 144:ef7eb2e8f9f7 198 #define LCD_DIVIDER_19 ((uint32_t)0x000C0000) /*!< LCD frequency = CLKPS/19 */
<> 144:ef7eb2e8f9f7 199 #define LCD_DIVIDER_20 ((uint32_t)0x00100000) /*!< LCD frequency = CLKPS/20 */
<> 144:ef7eb2e8f9f7 200 #define LCD_DIVIDER_21 ((uint32_t)0x00140000) /*!< LCD frequency = CLKPS/21 */
<> 144:ef7eb2e8f9f7 201 #define LCD_DIVIDER_22 ((uint32_t)0x00180000) /*!< LCD frequency = CLKPS/22 */
<> 144:ef7eb2e8f9f7 202 #define LCD_DIVIDER_23 ((uint32_t)0x001C0000) /*!< LCD frequency = CLKPS/23 */
<> 144:ef7eb2e8f9f7 203 #define LCD_DIVIDER_24 ((uint32_t)0x00200000) /*!< LCD frequency = CLKPS/24 */
<> 144:ef7eb2e8f9f7 204 #define LCD_DIVIDER_25 ((uint32_t)0x00240000) /*!< LCD frequency = CLKPS/25 */
<> 144:ef7eb2e8f9f7 205 #define LCD_DIVIDER_26 ((uint32_t)0x00280000) /*!< LCD frequency = CLKPS/26 */
<> 144:ef7eb2e8f9f7 206 #define LCD_DIVIDER_27 ((uint32_t)0x002C0000) /*!< LCD frequency = CLKPS/27 */
<> 144:ef7eb2e8f9f7 207 #define LCD_DIVIDER_28 ((uint32_t)0x00300000) /*!< LCD frequency = CLKPS/28 */
<> 144:ef7eb2e8f9f7 208 #define LCD_DIVIDER_29 ((uint32_t)0x00340000) /*!< LCD frequency = CLKPS/29 */
<> 144:ef7eb2e8f9f7 209 #define LCD_DIVIDER_30 ((uint32_t)0x00380000) /*!< LCD frequency = CLKPS/30 */
<> 144:ef7eb2e8f9f7 210 #define LCD_DIVIDER_31 ((uint32_t)LCD_FCR_DIV) /*!< LCD frequency = CLKPS/31 */
<> 144:ef7eb2e8f9f7 211
<> 144:ef7eb2e8f9f7 212 #define IS_LCD_DIVIDER(__DIVIDER__) (((__DIVIDER__) == LCD_DIVIDER_16) || \
<> 144:ef7eb2e8f9f7 213 ((__DIVIDER__) == LCD_DIVIDER_17) || \
<> 144:ef7eb2e8f9f7 214 ((__DIVIDER__) == LCD_DIVIDER_18) || \
<> 144:ef7eb2e8f9f7 215 ((__DIVIDER__) == LCD_DIVIDER_19) || \
<> 144:ef7eb2e8f9f7 216 ((__DIVIDER__) == LCD_DIVIDER_20) || \
<> 144:ef7eb2e8f9f7 217 ((__DIVIDER__) == LCD_DIVIDER_21) || \
<> 144:ef7eb2e8f9f7 218 ((__DIVIDER__) == LCD_DIVIDER_22) || \
<> 144:ef7eb2e8f9f7 219 ((__DIVIDER__) == LCD_DIVIDER_23) || \
<> 144:ef7eb2e8f9f7 220 ((__DIVIDER__) == LCD_DIVIDER_24) || \
<> 144:ef7eb2e8f9f7 221 ((__DIVIDER__) == LCD_DIVIDER_25) || \
<> 144:ef7eb2e8f9f7 222 ((__DIVIDER__) == LCD_DIVIDER_26) || \
<> 144:ef7eb2e8f9f7 223 ((__DIVIDER__) == LCD_DIVIDER_27) || \
<> 144:ef7eb2e8f9f7 224 ((__DIVIDER__) == LCD_DIVIDER_28) || \
<> 144:ef7eb2e8f9f7 225 ((__DIVIDER__) == LCD_DIVIDER_29) || \
<> 144:ef7eb2e8f9f7 226 ((__DIVIDER__) == LCD_DIVIDER_30) || \
<> 144:ef7eb2e8f9f7 227 ((__DIVIDER__) == LCD_DIVIDER_31))
<> 144:ef7eb2e8f9f7 228
<> 144:ef7eb2e8f9f7 229 /**
<> 144:ef7eb2e8f9f7 230 * @}
<> 144:ef7eb2e8f9f7 231 */
<> 144:ef7eb2e8f9f7 232
<> 144:ef7eb2e8f9f7 233
<> 144:ef7eb2e8f9f7 234 /** @defgroup LCD_Duty LCD Duty
<> 144:ef7eb2e8f9f7 235 * @{
<> 144:ef7eb2e8f9f7 236 */
<> 144:ef7eb2e8f9f7 237
<> 144:ef7eb2e8f9f7 238 #define LCD_DUTY_STATIC ((uint32_t)0x00000000) /*!< Static duty */
<> 144:ef7eb2e8f9f7 239 #define LCD_DUTY_1_2 (LCD_CR_DUTY_0) /*!< 1/2 duty */
<> 144:ef7eb2e8f9f7 240 #define LCD_DUTY_1_3 (LCD_CR_DUTY_1) /*!< 1/3 duty */
<> 144:ef7eb2e8f9f7 241 #define LCD_DUTY_1_4 ((LCD_CR_DUTY_1 | LCD_CR_DUTY_0)) /*!< 1/4 duty */
<> 144:ef7eb2e8f9f7 242 #define LCD_DUTY_1_8 (LCD_CR_DUTY_2) /*!< 1/8 duty */
<> 144:ef7eb2e8f9f7 243
<> 144:ef7eb2e8f9f7 244 #define IS_LCD_DUTY(__DUTY__) (((__DUTY__) == LCD_DUTY_STATIC) || \
<> 144:ef7eb2e8f9f7 245 ((__DUTY__) == LCD_DUTY_1_2) || \
<> 144:ef7eb2e8f9f7 246 ((__DUTY__) == LCD_DUTY_1_3) || \
<> 144:ef7eb2e8f9f7 247 ((__DUTY__) == LCD_DUTY_1_4) || \
<> 144:ef7eb2e8f9f7 248 ((__DUTY__) == LCD_DUTY_1_8))
<> 144:ef7eb2e8f9f7 249
<> 144:ef7eb2e8f9f7 250 /**
<> 144:ef7eb2e8f9f7 251 * @}
<> 144:ef7eb2e8f9f7 252 */
<> 144:ef7eb2e8f9f7 253
<> 144:ef7eb2e8f9f7 254
<> 144:ef7eb2e8f9f7 255 /** @defgroup LCD_Bias LCD Bias
<> 144:ef7eb2e8f9f7 256 * @{
<> 144:ef7eb2e8f9f7 257 */
<> 144:ef7eb2e8f9f7 258
<> 144:ef7eb2e8f9f7 259 #define LCD_BIAS_1_4 ((uint32_t)0x00000000) /*!< 1/4 Bias */
<> 144:ef7eb2e8f9f7 260 #define LCD_BIAS_1_2 LCD_CR_BIAS_0 /*!< 1/2 Bias */
<> 144:ef7eb2e8f9f7 261 #define LCD_BIAS_1_3 LCD_CR_BIAS_1 /*!< 1/3 Bias */
<> 144:ef7eb2e8f9f7 262
<> 144:ef7eb2e8f9f7 263 #define IS_LCD_BIAS(__BIAS__) (((__BIAS__) == LCD_BIAS_1_4) || \
<> 144:ef7eb2e8f9f7 264 ((__BIAS__) == LCD_BIAS_1_2) || \
<> 144:ef7eb2e8f9f7 265 ((__BIAS__) == LCD_BIAS_1_3))
<> 144:ef7eb2e8f9f7 266 /**
<> 144:ef7eb2e8f9f7 267 * @}
<> 144:ef7eb2e8f9f7 268 */
<> 144:ef7eb2e8f9f7 269
<> 144:ef7eb2e8f9f7 270 /** @defgroup LCD_Voltage_Source LCD Voltage Source
<> 144:ef7eb2e8f9f7 271 * @{
<> 144:ef7eb2e8f9f7 272 */
<> 144:ef7eb2e8f9f7 273
<> 144:ef7eb2e8f9f7 274 #define LCD_VOLTAGESOURCE_INTERNAL ((uint32_t)0x00000000) /*!< Internal voltage source for the LCD */
<> 144:ef7eb2e8f9f7 275 #define LCD_VOLTAGESOURCE_EXTERNAL LCD_CR_VSEL /*!< External voltage source for the LCD */
<> 144:ef7eb2e8f9f7 276
<> 144:ef7eb2e8f9f7 277 #define IS_LCD_VOLTAGE_SOURCE(SOURCE) (((SOURCE) == LCD_VOLTAGESOURCE_INTERNAL) || \
<> 144:ef7eb2e8f9f7 278 ((SOURCE) == LCD_VOLTAGESOURCE_EXTERNAL))
<> 144:ef7eb2e8f9f7 279
<> 144:ef7eb2e8f9f7 280 /**
<> 144:ef7eb2e8f9f7 281 * @}
<> 144:ef7eb2e8f9f7 282 */
<> 144:ef7eb2e8f9f7 283
<> 144:ef7eb2e8f9f7 284 /** @defgroup LCD_Interrupts LCD Interrupts
<> 144:ef7eb2e8f9f7 285 * @{
<> 144:ef7eb2e8f9f7 286 */
<> 144:ef7eb2e8f9f7 287 #define LCD_IT_SOF LCD_FCR_SOFIE
<> 144:ef7eb2e8f9f7 288 #define LCD_IT_UDD LCD_FCR_UDDIE
<> 144:ef7eb2e8f9f7 289
<> 144:ef7eb2e8f9f7 290 /**
<> 144:ef7eb2e8f9f7 291 * @}
<> 144:ef7eb2e8f9f7 292 */
<> 144:ef7eb2e8f9f7 293
<> 144:ef7eb2e8f9f7 294 /** @defgroup LCD_PulseOnDuration LCD Pulse On Duration
<> 144:ef7eb2e8f9f7 295 * @{
<> 144:ef7eb2e8f9f7 296 */
<> 144:ef7eb2e8f9f7 297
<> 144:ef7eb2e8f9f7 298 #define LCD_PULSEONDURATION_0 ((uint32_t)0x00000000) /*!< Pulse ON duration = 0 pulse */
<> 144:ef7eb2e8f9f7 299 #define LCD_PULSEONDURATION_1 (LCD_FCR_PON_0) /*!< Pulse ON duration = 1/CK_PS */
<> 144:ef7eb2e8f9f7 300 #define LCD_PULSEONDURATION_2 (LCD_FCR_PON_1) /*!< Pulse ON duration = 2/CK_PS */
<> 144:ef7eb2e8f9f7 301 #define LCD_PULSEONDURATION_3 (LCD_FCR_PON_1 | LCD_FCR_PON_0) /*!< Pulse ON duration = 3/CK_PS */
<> 144:ef7eb2e8f9f7 302 #define LCD_PULSEONDURATION_4 (LCD_FCR_PON_2) /*!< Pulse ON duration = 4/CK_PS */
<> 144:ef7eb2e8f9f7 303 #define LCD_PULSEONDURATION_5 (LCD_FCR_PON_2 | LCD_FCR_PON_0) /*!< Pulse ON duration = 5/CK_PS */
<> 144:ef7eb2e8f9f7 304 #define LCD_PULSEONDURATION_6 (LCD_FCR_PON_2 | LCD_FCR_PON_1) /*!< Pulse ON duration = 6/CK_PS */
<> 144:ef7eb2e8f9f7 305 #define LCD_PULSEONDURATION_7 (LCD_FCR_PON) /*!< Pulse ON duration = 7/CK_PS */
<> 144:ef7eb2e8f9f7 306
<> 144:ef7eb2e8f9f7 307 #define IS_LCD_PULSE_ON_DURATION(__DURATION__) (((__DURATION__) == LCD_PULSEONDURATION_0) || \
<> 144:ef7eb2e8f9f7 308 ((__DURATION__) == LCD_PULSEONDURATION_1) || \
<> 144:ef7eb2e8f9f7 309 ((__DURATION__) == LCD_PULSEONDURATION_2) || \
<> 144:ef7eb2e8f9f7 310 ((__DURATION__) == LCD_PULSEONDURATION_3) || \
<> 144:ef7eb2e8f9f7 311 ((__DURATION__) == LCD_PULSEONDURATION_4) || \
<> 144:ef7eb2e8f9f7 312 ((__DURATION__) == LCD_PULSEONDURATION_5) || \
<> 144:ef7eb2e8f9f7 313 ((__DURATION__) == LCD_PULSEONDURATION_6) || \
<> 144:ef7eb2e8f9f7 314 ((__DURATION__) == LCD_PULSEONDURATION_7))
<> 144:ef7eb2e8f9f7 315 /**
<> 144:ef7eb2e8f9f7 316 * @}
<> 144:ef7eb2e8f9f7 317 */
<> 144:ef7eb2e8f9f7 318
<> 144:ef7eb2e8f9f7 319 /** @defgroup LCD_HighDrive LCD HighDrive
<> 144:ef7eb2e8f9f7 320 * @{
<> 144:ef7eb2e8f9f7 321 */
<> 144:ef7eb2e8f9f7 322
<> 144:ef7eb2e8f9f7 323 #define LCD_HIGHDRIVE_0 ((uint32_t)0x00000000) /*!< Low resistance Drive */
<> 144:ef7eb2e8f9f7 324 #define LCD_HIGHDRIVE_1 (LCD_FCR_HD) /*!< High resistance Drive */
<> 144:ef7eb2e8f9f7 325
<> 144:ef7eb2e8f9f7 326 #define IS_LCD_HIGHDRIVE(__HIGHDRIVE__) (((__HIGHDRIVE__) == LCD_HIGHDRIVE_0) || \
<> 144:ef7eb2e8f9f7 327 ((__HIGHDRIVE__) == LCD_HIGHDRIVE_1))
<> 144:ef7eb2e8f9f7 328 /**
<> 144:ef7eb2e8f9f7 329 * @}
<> 144:ef7eb2e8f9f7 330 */
<> 144:ef7eb2e8f9f7 331
<> 144:ef7eb2e8f9f7 332 /** @defgroup LCD_DeadTime LCD Dead Time
<> 144:ef7eb2e8f9f7 333 * @{
<> 144:ef7eb2e8f9f7 334 */
<> 144:ef7eb2e8f9f7 335
<> 144:ef7eb2e8f9f7 336 #define LCD_DEADTIME_0 ((uint32_t)0x00000000) /*!< No dead Time */
<> 144:ef7eb2e8f9f7 337 #define LCD_DEADTIME_1 (LCD_FCR_DEAD_0) /*!< One Phase between different couple of Frame */
<> 144:ef7eb2e8f9f7 338 #define LCD_DEADTIME_2 (LCD_FCR_DEAD_1) /*!< Two Phase between different couple of Frame */
<> 144:ef7eb2e8f9f7 339 #define LCD_DEADTIME_3 (LCD_FCR_DEAD_1 | LCD_FCR_DEAD_0) /*!< Three Phase between different couple of Frame */
<> 144:ef7eb2e8f9f7 340 #define LCD_DEADTIME_4 (LCD_FCR_DEAD_2) /*!< Four Phase between different couple of Frame */
<> 144:ef7eb2e8f9f7 341 #define LCD_DEADTIME_5 (LCD_FCR_DEAD_2 | LCD_FCR_DEAD_0) /*!< Five Phase between different couple of Frame */
<> 144:ef7eb2e8f9f7 342 #define LCD_DEADTIME_6 (LCD_FCR_DEAD_2 | LCD_FCR_DEAD_1) /*!< Six Phase between different couple of Frame */
<> 144:ef7eb2e8f9f7 343 #define LCD_DEADTIME_7 (LCD_FCR_DEAD) /*!< Seven Phase between different couple of Frame */
<> 144:ef7eb2e8f9f7 344
<> 144:ef7eb2e8f9f7 345 #define IS_LCD_DEAD_TIME(__TIME__) (((__TIME__) == LCD_DEADTIME_0) || \
<> 144:ef7eb2e8f9f7 346 ((__TIME__) == LCD_DEADTIME_1) || \
<> 144:ef7eb2e8f9f7 347 ((__TIME__) == LCD_DEADTIME_2) || \
<> 144:ef7eb2e8f9f7 348 ((__TIME__) == LCD_DEADTIME_3) || \
<> 144:ef7eb2e8f9f7 349 ((__TIME__) == LCD_DEADTIME_4) || \
<> 144:ef7eb2e8f9f7 350 ((__TIME__) == LCD_DEADTIME_5) || \
<> 144:ef7eb2e8f9f7 351 ((__TIME__) == LCD_DEADTIME_6) || \
<> 144:ef7eb2e8f9f7 352 ((__TIME__) == LCD_DEADTIME_7))
<> 144:ef7eb2e8f9f7 353 /**
<> 144:ef7eb2e8f9f7 354 * @}
<> 144:ef7eb2e8f9f7 355 */
<> 144:ef7eb2e8f9f7 356
<> 144:ef7eb2e8f9f7 357 /** @defgroup LCD_BlinkMode LCD Blink Mode
<> 144:ef7eb2e8f9f7 358 * @{
<> 144:ef7eb2e8f9f7 359 */
<> 144:ef7eb2e8f9f7 360
<> 144:ef7eb2e8f9f7 361 #define LCD_BLINKMODE_OFF ((uint32_t)0x00000000) /*!< Blink disabled */
<> 144:ef7eb2e8f9f7 362 #define LCD_BLINKMODE_SEG0_COM0 (LCD_FCR_BLINK_0) /*!< Blink enabled on SEG[0], COM[0] (1 pixel) */
<> 144:ef7eb2e8f9f7 363 #define LCD_BLINKMODE_SEG0_ALLCOM (LCD_FCR_BLINK_1) /*!< Blink enabled on SEG[0], all COM (up to
<> 144:ef7eb2e8f9f7 364 8 pixels according to the programmed duty) */
<> 144:ef7eb2e8f9f7 365 #define LCD_BLINKMODE_ALLSEG_ALLCOM (LCD_FCR_BLINK) /*!< Blink enabled on all SEG and all COM (all pixels) */
<> 144:ef7eb2e8f9f7 366
<> 144:ef7eb2e8f9f7 367 #define IS_LCD_BLINK_MODE(__MODE__) (((__MODE__) == LCD_BLINKMODE_OFF) || \
<> 144:ef7eb2e8f9f7 368 ((__MODE__) == LCD_BLINKMODE_SEG0_COM0) || \
<> 144:ef7eb2e8f9f7 369 ((__MODE__) == LCD_BLINKMODE_SEG0_ALLCOM) || \
<> 144:ef7eb2e8f9f7 370 ((__MODE__) == LCD_BLINKMODE_ALLSEG_ALLCOM))
<> 144:ef7eb2e8f9f7 371 /**
<> 144:ef7eb2e8f9f7 372 * @}
<> 144:ef7eb2e8f9f7 373 */
<> 144:ef7eb2e8f9f7 374
<> 144:ef7eb2e8f9f7 375 /** @defgroup LCD_BlinkFrequency LCD Blink Frequency
<> 144:ef7eb2e8f9f7 376 * @{
<> 144:ef7eb2e8f9f7 377 */
<> 144:ef7eb2e8f9f7 378
<> 144:ef7eb2e8f9f7 379 #define LCD_BLINKFREQUENCY_DIV8 ((uint32_t)0x00000000) /*!< The Blink frequency = fLCD/8 */
<> 144:ef7eb2e8f9f7 380 #define LCD_BLINKFREQUENCY_DIV16 (LCD_FCR_BLINKF_0) /*!< The Blink frequency = fLCD/16 */
<> 144:ef7eb2e8f9f7 381 #define LCD_BLINKFREQUENCY_DIV32 (LCD_FCR_BLINKF_1) /*!< The Blink frequency = fLCD/32 */
<> 144:ef7eb2e8f9f7 382 #define LCD_BLINKFREQUENCY_DIV64 (LCD_FCR_BLINKF_1 | LCD_FCR_BLINKF_0) /*!< The Blink frequency = fLCD/64 */
<> 144:ef7eb2e8f9f7 383 #define LCD_BLINKFREQUENCY_DIV128 (LCD_FCR_BLINKF_2) /*!< The Blink frequency = fLCD/128 */
<> 144:ef7eb2e8f9f7 384 #define LCD_BLINKFREQUENCY_DIV256 (LCD_FCR_BLINKF_2 |LCD_FCR_BLINKF_0) /*!< The Blink frequency = fLCD/256 */
<> 144:ef7eb2e8f9f7 385 #define LCD_BLINKFREQUENCY_DIV512 (LCD_FCR_BLINKF_2 |LCD_FCR_BLINKF_1) /*!< The Blink frequency = fLCD/512 */
<> 144:ef7eb2e8f9f7 386 #define LCD_BLINKFREQUENCY_DIV1024 (LCD_FCR_BLINKF) /*!< The Blink frequency = fLCD/1024 */
<> 144:ef7eb2e8f9f7 387
<> 144:ef7eb2e8f9f7 388 #define IS_LCD_BLINK_FREQUENCY(__FREQUENCY__) (((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV8) || \
<> 144:ef7eb2e8f9f7 389 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV16) || \
<> 144:ef7eb2e8f9f7 390 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV32) || \
<> 144:ef7eb2e8f9f7 391 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV64) || \
<> 144:ef7eb2e8f9f7 392 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV128) || \
<> 144:ef7eb2e8f9f7 393 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV256) || \
<> 144:ef7eb2e8f9f7 394 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV512) || \
<> 144:ef7eb2e8f9f7 395 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV1024))
<> 144:ef7eb2e8f9f7 396 /**
<> 144:ef7eb2e8f9f7 397 * @}
<> 144:ef7eb2e8f9f7 398 */
<> 144:ef7eb2e8f9f7 399
<> 144:ef7eb2e8f9f7 400 /** @defgroup LCD_Contrast LCD Contrast
<> 144:ef7eb2e8f9f7 401 * @{
<> 144:ef7eb2e8f9f7 402 */
<> 144:ef7eb2e8f9f7 403
<> 144:ef7eb2e8f9f7 404 #define LCD_CONTRASTLEVEL_0 ((uint32_t)0x00000000) /*!< Maximum Voltage = 2.60V */
<> 144:ef7eb2e8f9f7 405 #define LCD_CONTRASTLEVEL_1 (LCD_FCR_CC_0) /*!< Maximum Voltage = 2.73V */
<> 144:ef7eb2e8f9f7 406 #define LCD_CONTRASTLEVEL_2 (LCD_FCR_CC_1) /*!< Maximum Voltage = 2.86V */
<> 144:ef7eb2e8f9f7 407 #define LCD_CONTRASTLEVEL_3 (LCD_FCR_CC_1 | LCD_FCR_CC_0) /*!< Maximum Voltage = 2.99V */
<> 144:ef7eb2e8f9f7 408 #define LCD_CONTRASTLEVEL_4 (LCD_FCR_CC_2) /*!< Maximum Voltage = 3.12V */
<> 144:ef7eb2e8f9f7 409 #define LCD_CONTRASTLEVEL_5 (LCD_FCR_CC_2 | LCD_FCR_CC_0) /*!< Maximum Voltage = 3.25V */
<> 144:ef7eb2e8f9f7 410 #define LCD_CONTRASTLEVEL_6 (LCD_FCR_CC_2 | LCD_FCR_CC_1) /*!< Maximum Voltage = 3.38V */
<> 144:ef7eb2e8f9f7 411 #define LCD_CONTRASTLEVEL_7 (LCD_FCR_CC) /*!< Maximum Voltage = 3.51V */
<> 144:ef7eb2e8f9f7 412
<> 144:ef7eb2e8f9f7 413 #define IS_LCD_CONTRAST(__CONTRAST__) (((__CONTRAST__) == LCD_CONTRASTLEVEL_0) || \
<> 144:ef7eb2e8f9f7 414 ((__CONTRAST__) == LCD_CONTRASTLEVEL_1) || \
<> 144:ef7eb2e8f9f7 415 ((__CONTRAST__) == LCD_CONTRASTLEVEL_2) || \
<> 144:ef7eb2e8f9f7 416 ((__CONTRAST__) == LCD_CONTRASTLEVEL_3) || \
<> 144:ef7eb2e8f9f7 417 ((__CONTRAST__) == LCD_CONTRASTLEVEL_4) || \
<> 144:ef7eb2e8f9f7 418 ((__CONTRAST__) == LCD_CONTRASTLEVEL_5) || \
<> 144:ef7eb2e8f9f7 419 ((__CONTRAST__) == LCD_CONTRASTLEVEL_6) || \
<> 144:ef7eb2e8f9f7 420 ((__CONTRAST__) == LCD_CONTRASTLEVEL_7))
<> 144:ef7eb2e8f9f7 421 /**
<> 144:ef7eb2e8f9f7 422 * @}
<> 144:ef7eb2e8f9f7 423 */
<> 144:ef7eb2e8f9f7 424
<> 144:ef7eb2e8f9f7 425 /** @defgroup LCD_MuxSegment LCD Mux Segment
<> 144:ef7eb2e8f9f7 426 * @{
<> 144:ef7eb2e8f9f7 427 */
<> 144:ef7eb2e8f9f7 428
<> 144:ef7eb2e8f9f7 429 #define LCD_MUXSEGMENT_DISABLE ((uint32_t)0x00000000) /*!< SEG pin multiplexing disabled */
<> 144:ef7eb2e8f9f7 430 #define LCD_MUXSEGMENT_ENABLE (LCD_CR_MUX_SEG) /*!< SEG[31:28] are multiplexed with SEG[43:40] */
<> 144:ef7eb2e8f9f7 431
<> 144:ef7eb2e8f9f7 432 #define IS_LCD_MUXSEGMENT(__VALUE__) (((__VALUE__) == LCD_MUXSEGMENT_ENABLE) || \
<> 144:ef7eb2e8f9f7 433 ((__VALUE__) == LCD_MUXSEGMENT_DISABLE))
<> 144:ef7eb2e8f9f7 434 /**
<> 144:ef7eb2e8f9f7 435 * @}
<> 144:ef7eb2e8f9f7 436 */
<> 144:ef7eb2e8f9f7 437
<> 144:ef7eb2e8f9f7 438 /** @defgroup LCD_Flag LCD Flag
<> 144:ef7eb2e8f9f7 439 * @{
<> 144:ef7eb2e8f9f7 440 */
<> 144:ef7eb2e8f9f7 441
<> 144:ef7eb2e8f9f7 442 #define LCD_FLAG_ENS LCD_SR_ENS
<> 144:ef7eb2e8f9f7 443 #define LCD_FLAG_SOF LCD_SR_SOF
<> 144:ef7eb2e8f9f7 444 #define LCD_FLAG_UDR LCD_SR_UDR
<> 144:ef7eb2e8f9f7 445 #define LCD_FLAG_UDD LCD_SR_UDD
<> 144:ef7eb2e8f9f7 446 #define LCD_FLAG_RDY LCD_SR_RDY
<> 144:ef7eb2e8f9f7 447 #define LCD_FLAG_FCRSF LCD_SR_FCRSR
<> 144:ef7eb2e8f9f7 448
<> 144:ef7eb2e8f9f7 449 /**
<> 144:ef7eb2e8f9f7 450 * @}
<> 144:ef7eb2e8f9f7 451 */
<> 144:ef7eb2e8f9f7 452
<> 144:ef7eb2e8f9f7 453 /** @defgroup LCD_RAMRegister LCD RAMRegister
<> 144:ef7eb2e8f9f7 454 * @{
<> 144:ef7eb2e8f9f7 455 */
<> 144:ef7eb2e8f9f7 456
<> 144:ef7eb2e8f9f7 457 #define LCD_RAM_REGISTER0 ((uint32_t)0x00000000) /*!< LCD RAM Register 0 */
<> 144:ef7eb2e8f9f7 458 #define LCD_RAM_REGISTER1 ((uint32_t)0x00000001) /*!< LCD RAM Register 1 */
<> 144:ef7eb2e8f9f7 459 #define LCD_RAM_REGISTER2 ((uint32_t)0x00000002) /*!< LCD RAM Register 2 */
<> 144:ef7eb2e8f9f7 460 #define LCD_RAM_REGISTER3 ((uint32_t)0x00000003) /*!< LCD RAM Register 3 */
<> 144:ef7eb2e8f9f7 461 #define LCD_RAM_REGISTER4 ((uint32_t)0x00000004) /*!< LCD RAM Register 4 */
<> 144:ef7eb2e8f9f7 462 #define LCD_RAM_REGISTER5 ((uint32_t)0x00000005) /*!< LCD RAM Register 5 */
<> 144:ef7eb2e8f9f7 463 #define LCD_RAM_REGISTER6 ((uint32_t)0x00000006) /*!< LCD RAM Register 6 */
<> 144:ef7eb2e8f9f7 464 #define LCD_RAM_REGISTER7 ((uint32_t)0x00000007) /*!< LCD RAM Register 7 */
<> 144:ef7eb2e8f9f7 465 #define LCD_RAM_REGISTER8 ((uint32_t)0x00000008) /*!< LCD RAM Register 8 */
<> 144:ef7eb2e8f9f7 466 #define LCD_RAM_REGISTER9 ((uint32_t)0x00000009) /*!< LCD RAM Register 9 */
<> 144:ef7eb2e8f9f7 467 #define LCD_RAM_REGISTER10 ((uint32_t)0x0000000A) /*!< LCD RAM Register 10 */
<> 144:ef7eb2e8f9f7 468 #define LCD_RAM_REGISTER11 ((uint32_t)0x0000000B) /*!< LCD RAM Register 11 */
<> 144:ef7eb2e8f9f7 469 #define LCD_RAM_REGISTER12 ((uint32_t)0x0000000C) /*!< LCD RAM Register 12 */
<> 144:ef7eb2e8f9f7 470 #define LCD_RAM_REGISTER13 ((uint32_t)0x0000000D) /*!< LCD RAM Register 13 */
<> 144:ef7eb2e8f9f7 471 #define LCD_RAM_REGISTER14 ((uint32_t)0x0000000E) /*!< LCD RAM Register 14 */
<> 144:ef7eb2e8f9f7 472 #define LCD_RAM_REGISTER15 ((uint32_t)0x0000000F) /*!< LCD RAM Register 15 */
<> 144:ef7eb2e8f9f7 473
<> 144:ef7eb2e8f9f7 474 #define IS_LCD_RAM_REGISTER(__REGISTER__) (((__REGISTER__) == LCD_RAM_REGISTER0) || \
<> 144:ef7eb2e8f9f7 475 ((__REGISTER__) == LCD_RAM_REGISTER1) || \
<> 144:ef7eb2e8f9f7 476 ((__REGISTER__) == LCD_RAM_REGISTER2) || \
<> 144:ef7eb2e8f9f7 477 ((__REGISTER__) == LCD_RAM_REGISTER3) || \
<> 144:ef7eb2e8f9f7 478 ((__REGISTER__) == LCD_RAM_REGISTER4) || \
<> 144:ef7eb2e8f9f7 479 ((__REGISTER__) == LCD_RAM_REGISTER5) || \
<> 144:ef7eb2e8f9f7 480 ((__REGISTER__) == LCD_RAM_REGISTER6) || \
<> 144:ef7eb2e8f9f7 481 ((__REGISTER__) == LCD_RAM_REGISTER7) || \
<> 144:ef7eb2e8f9f7 482 ((__REGISTER__) == LCD_RAM_REGISTER8) || \
<> 144:ef7eb2e8f9f7 483 ((__REGISTER__) == LCD_RAM_REGISTER9) || \
<> 144:ef7eb2e8f9f7 484 ((__REGISTER__) == LCD_RAM_REGISTER10) || \
<> 144:ef7eb2e8f9f7 485 ((__REGISTER__) == LCD_RAM_REGISTER11) || \
<> 144:ef7eb2e8f9f7 486 ((__REGISTER__) == LCD_RAM_REGISTER12) || \
<> 144:ef7eb2e8f9f7 487 ((__REGISTER__) == LCD_RAM_REGISTER13) || \
<> 144:ef7eb2e8f9f7 488 ((__REGISTER__) == LCD_RAM_REGISTER14) || \
<> 144:ef7eb2e8f9f7 489 ((__REGISTER__) == LCD_RAM_REGISTER15))
<> 144:ef7eb2e8f9f7 490
<> 144:ef7eb2e8f9f7 491 /**
<> 144:ef7eb2e8f9f7 492 * @}
<> 144:ef7eb2e8f9f7 493 */
<> 144:ef7eb2e8f9f7 494
<> 144:ef7eb2e8f9f7 495 /**
<> 144:ef7eb2e8f9f7 496 * @}
<> 144:ef7eb2e8f9f7 497 */
<> 144:ef7eb2e8f9f7 498
<> 144:ef7eb2e8f9f7 499 /* Exported macro ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 500
<> 144:ef7eb2e8f9f7 501 /** @defgroup LCD_Exported_Macros LCD Exported Macros
<> 144:ef7eb2e8f9f7 502 * @{
<> 144:ef7eb2e8f9f7 503 */
<> 144:ef7eb2e8f9f7 504
<> 144:ef7eb2e8f9f7 505 /** @brief Reset LCD handle state
<> 144:ef7eb2e8f9f7 506 * @param __HANDLE__: specifies the LCD Handle.
<> 144:ef7eb2e8f9f7 507 * @retval None
<> 144:ef7eb2e8f9f7 508 */
<> 144:ef7eb2e8f9f7 509 #define __HAL_LCD_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_LCD_STATE_RESET)
<> 144:ef7eb2e8f9f7 510
<> 144:ef7eb2e8f9f7 511 /** @brief macros to enables or disables the LCD
<> 144:ef7eb2e8f9f7 512 * @param __HANDLE__: specifies the LCD Handle.
<> 144:ef7eb2e8f9f7 513 * @retval None
<> 144:ef7eb2e8f9f7 514 */
<> 144:ef7eb2e8f9f7 515 #define __HAL_LCD_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR, LCD_CR_LCDEN))
<> 144:ef7eb2e8f9f7 516 #define __HAL_LCD_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR, LCD_CR_LCDEN))
<> 144:ef7eb2e8f9f7 517
<> 144:ef7eb2e8f9f7 518 /** @brief Macros to enable or disable the low resistance divider. Displays with high
<> 144:ef7eb2e8f9f7 519 * internal resistance may need a longer drive time to achieve
<> 144:ef7eb2e8f9f7 520 * satisfactory contrast. This function is useful in this case if some
<> 144:ef7eb2e8f9f7 521 * additional power consumption can be tolerated.
<> 144:ef7eb2e8f9f7 522 * @param __HANDLE__: specifies the LCD Handle.
<> 144:ef7eb2e8f9f7 523 * @note When this mode is enabled, the PulseOn Duration (PON) have to be
<> 144:ef7eb2e8f9f7 524 * programmed to 1/CK_PS (LCD_PULSEONDURATION_1).
<> 144:ef7eb2e8f9f7 525 * @retval None
<> 144:ef7eb2e8f9f7 526 */
<> 144:ef7eb2e8f9f7 527 #define __HAL_LCD_HIGHDRIVER_ENABLE(__HANDLE__) \
<> 144:ef7eb2e8f9f7 528 do{ \
<> 144:ef7eb2e8f9f7 529 SET_BIT((__HANDLE__)->Instance->FCR, LCD_FCR_HD); \
<> 144:ef7eb2e8f9f7 530 LCD_WaitForSynchro(__HANDLE__); \
<> 144:ef7eb2e8f9f7 531 }while(0)
<> 144:ef7eb2e8f9f7 532
<> 144:ef7eb2e8f9f7 533 #define __HAL_LCD_HIGHDRIVER_DISABLE(__HANDLE__) \
<> 144:ef7eb2e8f9f7 534 do{ \
<> 144:ef7eb2e8f9f7 535 CLEAR_BIT((__HANDLE__)->Instance->FCR, LCD_FCR_HD); \
<> 144:ef7eb2e8f9f7 536 LCD_WaitForSynchro(__HANDLE__); \
<> 144:ef7eb2e8f9f7 537 }while(0)
<> 144:ef7eb2e8f9f7 538
<> 144:ef7eb2e8f9f7 539 /**
<> 144:ef7eb2e8f9f7 540 * @brief Macro to configure the LCD pulses on duration.
<> 144:ef7eb2e8f9f7 541 * @param __HANDLE__: specifies the LCD Handle.
<> 144:ef7eb2e8f9f7 542 * @param __DURATION__: specifies the LCD pulse on duration in terms of
<> 144:ef7eb2e8f9f7 543 * CK_PS (prescaled LCD clock period) pulses.
<> 144:ef7eb2e8f9f7 544 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 545 * @arg LCD_PULSEONDURATION_0: 0 pulse
<> 144:ef7eb2e8f9f7 546 * @arg LCD_PULSEONDURATION_1: Pulse ON duration = 1/CK_PS
<> 144:ef7eb2e8f9f7 547 * @arg LCD_PULSEONDURATION_2: Pulse ON duration = 2/CK_PS
<> 144:ef7eb2e8f9f7 548 * @arg LCD_PULSEONDURATION_3: Pulse ON duration = 3/CK_PS
<> 144:ef7eb2e8f9f7 549 * @arg LCD_PULSEONDURATION_4: Pulse ON duration = 4/CK_PS
<> 144:ef7eb2e8f9f7 550 * @arg LCD_PULSEONDURATION_5: Pulse ON duration = 5/CK_PS
<> 144:ef7eb2e8f9f7 551 * @arg LCD_PULSEONDURATION_6: Pulse ON duration = 6/CK_PS
<> 144:ef7eb2e8f9f7 552 * @arg LCD_PULSEONDURATION_7: Pulse ON duration = 7/CK_PS
<> 144:ef7eb2e8f9f7 553 * @retval None
<> 144:ef7eb2e8f9f7 554 */
<> 144:ef7eb2e8f9f7 555 #define __HAL_LCD_PULSEONDURATION_CONFIG(__HANDLE__, __DURATION__) \
<> 144:ef7eb2e8f9f7 556 do{ \
<> 144:ef7eb2e8f9f7 557 MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_PON, (__DURATION__)); \
<> 144:ef7eb2e8f9f7 558 LCD_WaitForSynchro(__HANDLE__); \
<> 144:ef7eb2e8f9f7 559 }while(0)
<> 144:ef7eb2e8f9f7 560
<> 144:ef7eb2e8f9f7 561 /**
<> 144:ef7eb2e8f9f7 562 * @brief Macro to configure the LCD dead time.
<> 144:ef7eb2e8f9f7 563 * @param __HANDLE__: specifies the LCD Handle.
<> 144:ef7eb2e8f9f7 564 * @param __DEADTIME__: specifies the LCD dead time.
<> 144:ef7eb2e8f9f7 565 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 566 * @arg LCD_DEADTIME_0: No dead Time
<> 144:ef7eb2e8f9f7 567 * @arg LCD_DEADTIME_1: One Phase between different couple of Frame
<> 144:ef7eb2e8f9f7 568 * @arg LCD_DEADTIME_2: Two Phase between different couple of Frame
<> 144:ef7eb2e8f9f7 569 * @arg LCD_DEADTIME_3: Three Phase between different couple of Frame
<> 144:ef7eb2e8f9f7 570 * @arg LCD_DEADTIME_4: Four Phase between different couple of Frame
<> 144:ef7eb2e8f9f7 571 * @arg LCD_DEADTIME_5: Five Phase between different couple of Frame
<> 144:ef7eb2e8f9f7 572 * @arg LCD_DEADTIME_6: Six Phase between different couple of Frame
<> 144:ef7eb2e8f9f7 573 * @arg LCD_DEADTIME_7: Seven Phase between different couple of Frame
<> 144:ef7eb2e8f9f7 574 * @retval None
<> 144:ef7eb2e8f9f7 575 */
<> 144:ef7eb2e8f9f7 576 #define __HAL_LCD_DEADTIME_CONFIG(__HANDLE__, __DEADTIME__) \
<> 144:ef7eb2e8f9f7 577 do{ \
<> 144:ef7eb2e8f9f7 578 MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_DEAD, (__DEADTIME__)); \
<> 144:ef7eb2e8f9f7 579 LCD_WaitForSynchro(__HANDLE__); \
<> 144:ef7eb2e8f9f7 580 }while(0)
<> 144:ef7eb2e8f9f7 581
<> 144:ef7eb2e8f9f7 582 /**
<> 144:ef7eb2e8f9f7 583 * @brief Macro to configure the LCD Contrast.
<> 144:ef7eb2e8f9f7 584 * @param __HANDLE__: specifies the LCD Handle.
<> 144:ef7eb2e8f9f7 585 * @param __CONTRAST__: specifies the LCD Contrast.
<> 144:ef7eb2e8f9f7 586 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 587 * @arg LCD_CONTRASTLEVEL_0: Maximum Voltage = 2.60V
<> 144:ef7eb2e8f9f7 588 * @arg LCD_CONTRASTLEVEL_1: Maximum Voltage = 2.73V
<> 144:ef7eb2e8f9f7 589 * @arg LCD_CONTRASTLEVEL_2: Maximum Voltage = 2.86V
<> 144:ef7eb2e8f9f7 590 * @arg LCD_CONTRASTLEVEL_3: Maximum Voltage = 2.99V
<> 144:ef7eb2e8f9f7 591 * @arg LCD_CONTRASTLEVEL_4: Maximum Voltage = 3.12V
<> 144:ef7eb2e8f9f7 592 * @arg LCD_CONTRASTLEVEL_5: Maximum Voltage = 3.25V
<> 144:ef7eb2e8f9f7 593 * @arg LCD_CONTRASTLEVEL_6: Maximum Voltage = 3.38V
<> 144:ef7eb2e8f9f7 594 * @arg LCD_CONTRASTLEVEL_7: Maximum Voltage = 3.51V
<> 144:ef7eb2e8f9f7 595 * @retval None
<> 144:ef7eb2e8f9f7 596 */
<> 144:ef7eb2e8f9f7 597 #define __HAL_LCD_CONTRAST_CONFIG(__HANDLE__, __CONTRAST__) \
<> 144:ef7eb2e8f9f7 598 do{ \
<> 144:ef7eb2e8f9f7 599 MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_CC, (__CONTRAST__)); \
<> 144:ef7eb2e8f9f7 600 LCD_WaitForSynchro(__HANDLE__); \
<> 144:ef7eb2e8f9f7 601 } while(0)
<> 144:ef7eb2e8f9f7 602
<> 144:ef7eb2e8f9f7 603 /**
<> 144:ef7eb2e8f9f7 604 * @brief Macro to configure the LCD Blink mode and Blink frequency.
<> 144:ef7eb2e8f9f7 605 * @param __HANDLE__: specifies the LCD Handle.
<> 144:ef7eb2e8f9f7 606 * @param __BLINKMODE__: specifies the LCD blink mode.
<> 144:ef7eb2e8f9f7 607 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 608 * @arg LCD_BLINKMODE_OFF: Blink disabled
<> 144:ef7eb2e8f9f7 609 * @arg LCD_BLINKMODE_SEG0_COM0: Blink enabled on SEG[0], COM[0] (1 pixel)
<> 144:ef7eb2e8f9f7 610 * @arg LCD_BLINKMODE_SEG0_ALLCOM: Blink enabled on SEG[0], all COM (up to 8
<> 144:ef7eb2e8f9f7 611 * pixels according to the programmed duty)
<> 144:ef7eb2e8f9f7 612 * @arg LCD_BLINKMODE_ALLSEG_ALLCOM: Blink enabled on all SEG and all COM
<> 144:ef7eb2e8f9f7 613 * (all pixels)
<> 144:ef7eb2e8f9f7 614 * @param __BLINKFREQUENCY__: specifies the LCD blink frequency.
<> 144:ef7eb2e8f9f7 615 * @arg LCD_BLINKFREQUENCY_DIV8: The Blink frequency = fLcd/8
<> 144:ef7eb2e8f9f7 616 * @arg LCD_BLINKFREQUENCY_DIV16: The Blink frequency = fLcd/16
<> 144:ef7eb2e8f9f7 617 * @arg LCD_BLINKFREQUENCY_DIV32: The Blink frequency = fLcd/32
<> 144:ef7eb2e8f9f7 618 * @arg LCD_BLINKFREQUENCY_DIV64: The Blink frequency = fLcd/64
<> 144:ef7eb2e8f9f7 619 * @arg LCD_BLINKFREQUENCY_DIV128: The Blink frequency = fLcd/128
<> 144:ef7eb2e8f9f7 620 * @arg LCD_BLINKFREQUENCY_DIV256: The Blink frequency = fLcd/256
<> 144:ef7eb2e8f9f7 621 * @arg LCD_BLINKFREQUENCY_DIV512: The Blink frequency = fLcd/512
<> 144:ef7eb2e8f9f7 622 * @arg LCD_BLINKFREQUENCY_DIV1024: The Blink frequency = fLcd/1024
<> 144:ef7eb2e8f9f7 623 * @retval None
<> 144:ef7eb2e8f9f7 624 */
<> 144:ef7eb2e8f9f7 625 #define __HAL_LCD_BLINK_CONFIG(__HANDLE__, __BLINKMODE__, __BLINKFREQUENCY__) \
<> 144:ef7eb2e8f9f7 626 do{ \
<> 144:ef7eb2e8f9f7 627 MODIFY_REG((__HANDLE__)->Instance->FCR, (LCD_FCR_BLINKF | LCD_FCR_BLINK), ((__BLINKMODE__) | (__BLINKFREQUENCY__))); \
<> 144:ef7eb2e8f9f7 628 LCD_WaitForSynchro(__HANDLE__); \
<> 144:ef7eb2e8f9f7 629 }while(0)
<> 144:ef7eb2e8f9f7 630
<> 144:ef7eb2e8f9f7 631 /** @brief Enables or disables the specified LCD interrupt.
<> 144:ef7eb2e8f9f7 632 * @param __HANDLE__: specifies the LCD Handle.
<> 144:ef7eb2e8f9f7 633 * @param __INTERRUPT__: specifies the LCD interrupt source to be enabled or disabled.
<> 144:ef7eb2e8f9f7 634 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 635 * @arg LCD_IT_SOF: Start of Frame Interrupt
<> 144:ef7eb2e8f9f7 636 * @arg LCD_IT_UDD: Update Display Done Interrupt
<> 144:ef7eb2e8f9f7 637 * @retval None
<> 144:ef7eb2e8f9f7 638 */
<> 144:ef7eb2e8f9f7 639 #define __HAL_LCD_ENABLE_IT(__HANDLE__, __INTERRUPT__) \
<> 144:ef7eb2e8f9f7 640 do{ \
<> 144:ef7eb2e8f9f7 641 SET_BIT((__HANDLE__)->Instance->FCR, (__INTERRUPT__)); \
<> 144:ef7eb2e8f9f7 642 LCD_WaitForSynchro(__HANDLE__); \
<> 144:ef7eb2e8f9f7 643 }while(0)
<> 144:ef7eb2e8f9f7 644 #define __HAL_LCD_DISABLE_IT(__HANDLE__, __INTERRUPT__) \
<> 144:ef7eb2e8f9f7 645 do{ \
<> 144:ef7eb2e8f9f7 646 CLEAR_BIT((__HANDLE__)->Instance->FCR, (__INTERRUPT__)); \
<> 144:ef7eb2e8f9f7 647 LCD_WaitForSynchro(__HANDLE__); \
<> 144:ef7eb2e8f9f7 648 }while(0)
<> 144:ef7eb2e8f9f7 649
<> 144:ef7eb2e8f9f7 650 /** @brief Checks whether the specified LCD interrupt is enabled or not.
<> 144:ef7eb2e8f9f7 651 * @param __HANDLE__: specifies the LCD Handle.
<> 144:ef7eb2e8f9f7 652 * @param __IT__: specifies the LCD interrupt source to check.
<> 144:ef7eb2e8f9f7 653 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 654 * @arg LCD_IT_SOF: Start of Frame Interrupt
<> 144:ef7eb2e8f9f7 655 * @arg LCD_IT_UDD: Update Display Done Interrupt.
<> 144:ef7eb2e8f9f7 656 * @note If the device is in STOP mode (PCLK not provided) UDD will not
<> 144:ef7eb2e8f9f7 657 * generate an interrupt even if UDDIE = 1.
<> 144:ef7eb2e8f9f7 658 * If the display is not enabled the UDD interrupt will never occur.
<> 144:ef7eb2e8f9f7 659 * @retval The state of __IT__ (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 660 */
<> 144:ef7eb2e8f9f7 661 #define __HAL_LCD_GET_IT_SOURCE(__HANDLE__, __IT__) (((__HANDLE__)->Instance->FCR) & (__IT__))
<> 144:ef7eb2e8f9f7 662
<> 144:ef7eb2e8f9f7 663 /** @brief Checks whether the specified LCD flag is set or not.
<> 144:ef7eb2e8f9f7 664 * @param __HANDLE__: specifies the LCD Handle.
<> 144:ef7eb2e8f9f7 665 * @param __FLAG__: specifies the flag to check.
<> 144:ef7eb2e8f9f7 666 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 667 * @arg LCD_FLAG_ENS: LCD Enabled flag. It indicates the LCD controller status.
<> 144:ef7eb2e8f9f7 668 * @note The ENS bit is set immediately when the LCDEN bit in the LCD_CR
<> 144:ef7eb2e8f9f7 669 * goes from 0 to 1. On deactivation it reflects the real status of
<> 144:ef7eb2e8f9f7 670 * LCD so it becomes 0 at the end of the last displayed frame.
<> 144:ef7eb2e8f9f7 671 * @arg LCD_FLAG_SOF: Start of Frame flag. This flag is set by hardware at
<> 144:ef7eb2e8f9f7 672 * the beginning of a new frame, at the same time as the display data is
<> 144:ef7eb2e8f9f7 673 * updated.
<> 144:ef7eb2e8f9f7 674 * @arg LCD_FLAG_UDR: Update Display Request flag.
<> 144:ef7eb2e8f9f7 675 * @arg LCD_FLAG_UDD: Update Display Done flag.
<> 144:ef7eb2e8f9f7 676 * @arg LCD_FLAG_RDY: Step_up converter Ready flag. It indicates the status
<> 144:ef7eb2e8f9f7 677 * of the step-up converter.
<> 144:ef7eb2e8f9f7 678 * @arg LCD_FLAG_FCRSF: LCD Frame Control Register Synchronization Flag.
<> 144:ef7eb2e8f9f7 679 * This flag is set by hardware each time the LCD_FCR register is updated
<> 144:ef7eb2e8f9f7 680 * in the LCDCLK domain.
<> 144:ef7eb2e8f9f7 681 * @retval The new state of __FLAG__ (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 682 */
<> 144:ef7eb2e8f9f7 683 #define __HAL_LCD_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
<> 144:ef7eb2e8f9f7 684
<> 144:ef7eb2e8f9f7 685 /** @brief Clears the specified LCD pending flag.
<> 144:ef7eb2e8f9f7 686 * @param __HANDLE__: specifies the LCD Handle.
<> 144:ef7eb2e8f9f7 687 * @param __FLAG__: specifies the flag to clear.
<> 144:ef7eb2e8f9f7 688 * This parameter can be any combination of the following values:
<> 144:ef7eb2e8f9f7 689 * @arg LCD_FLAG_SOF: Start of Frame Interrupt
<> 144:ef7eb2e8f9f7 690 * @arg LCD_FLAG_UDD: Update Display Done Interrupt
<> 144:ef7eb2e8f9f7 691 * @retval None
<> 144:ef7eb2e8f9f7 692 */
<> 144:ef7eb2e8f9f7 693 #define __HAL_LCD_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->CLR = (__FLAG__))
<> 144:ef7eb2e8f9f7 694
<> 144:ef7eb2e8f9f7 695 /**
<> 144:ef7eb2e8f9f7 696 * @}
<> 144:ef7eb2e8f9f7 697 */
<> 144:ef7eb2e8f9f7 698
<> 144:ef7eb2e8f9f7 699 /* Exported functions ------------------------------------------------------- */
<> 144:ef7eb2e8f9f7 700
<> 144:ef7eb2e8f9f7 701 /** @defgroup LCD_Exported_Functions LCD Exported Functions
<> 144:ef7eb2e8f9f7 702 * @{
<> 144:ef7eb2e8f9f7 703 */
<> 144:ef7eb2e8f9f7 704
<> 144:ef7eb2e8f9f7 705 /** @defgroup LCD_Exported_Functions_Group1 Initialization and de-initialization methods
<> 144:ef7eb2e8f9f7 706 * @{
<> 144:ef7eb2e8f9f7 707 */
<> 144:ef7eb2e8f9f7 708
<> 144:ef7eb2e8f9f7 709 /* Initialization/de-initialization methods **********************************/
<> 144:ef7eb2e8f9f7 710 HAL_StatusTypeDef HAL_LCD_DeInit(LCD_HandleTypeDef *hlcd);
<> 144:ef7eb2e8f9f7 711 HAL_StatusTypeDef HAL_LCD_Init(LCD_HandleTypeDef *hlcd);
<> 144:ef7eb2e8f9f7 712 void HAL_LCD_MspInit(LCD_HandleTypeDef *hlcd);
<> 144:ef7eb2e8f9f7 713 void HAL_LCD_MspDeInit(LCD_HandleTypeDef *hlcd);
<> 144:ef7eb2e8f9f7 714
<> 144:ef7eb2e8f9f7 715 /**
<> 144:ef7eb2e8f9f7 716 * @}
<> 144:ef7eb2e8f9f7 717 */
<> 144:ef7eb2e8f9f7 718
<> 144:ef7eb2e8f9f7 719 /** @defgroup LCD_Exported_Functions_Group2 IO operation methods
<> 144:ef7eb2e8f9f7 720 * @{
<> 144:ef7eb2e8f9f7 721 */
<> 144:ef7eb2e8f9f7 722
<> 144:ef7eb2e8f9f7 723 /* IO operation methods *******************************************************/
<> 144:ef7eb2e8f9f7 724 HAL_StatusTypeDef HAL_LCD_Write(LCD_HandleTypeDef *hlcd, uint32_t RAMRegisterIndex, uint32_t RAMRegisterMask, uint32_t Data);
<> 144:ef7eb2e8f9f7 725 HAL_StatusTypeDef HAL_LCD_Clear(LCD_HandleTypeDef *hlcd);
<> 144:ef7eb2e8f9f7 726 HAL_StatusTypeDef HAL_LCD_UpdateDisplayRequest(LCD_HandleTypeDef *hlcd);
<> 144:ef7eb2e8f9f7 727
<> 144:ef7eb2e8f9f7 728 /**
<> 144:ef7eb2e8f9f7 729 * @}
<> 144:ef7eb2e8f9f7 730 */
<> 144:ef7eb2e8f9f7 731
<> 144:ef7eb2e8f9f7 732 /** @defgroup LCD_Exported_Functions_Group3 Peripheral State methods
<> 144:ef7eb2e8f9f7 733 * @{
<> 144:ef7eb2e8f9f7 734 */
<> 144:ef7eb2e8f9f7 735
<> 144:ef7eb2e8f9f7 736 /* Peripheral State methods **************************************************/
<> 144:ef7eb2e8f9f7 737 HAL_LCD_StateTypeDef HAL_LCD_GetState(LCD_HandleTypeDef *hlcd);
<> 144:ef7eb2e8f9f7 738 uint32_t HAL_LCD_GetError(LCD_HandleTypeDef *hlcd);
<> 144:ef7eb2e8f9f7 739
<> 144:ef7eb2e8f9f7 740 /**
<> 144:ef7eb2e8f9f7 741 * @}
<> 144:ef7eb2e8f9f7 742 */
<> 144:ef7eb2e8f9f7 743
<> 144:ef7eb2e8f9f7 744 /**
<> 144:ef7eb2e8f9f7 745 * @}
<> 144:ef7eb2e8f9f7 746 */
<> 144:ef7eb2e8f9f7 747
<> 144:ef7eb2e8f9f7 748 /** @addtogroup LCD_Private
<> 144:ef7eb2e8f9f7 749 * @{
<> 144:ef7eb2e8f9f7 750 */
<> 144:ef7eb2e8f9f7 751
<> 144:ef7eb2e8f9f7 752 /* Private functions ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 753 HAL_StatusTypeDef LCD_WaitForSynchro(LCD_HandleTypeDef *hlcd);
<> 144:ef7eb2e8f9f7 754
<> 144:ef7eb2e8f9f7 755 /**
<> 144:ef7eb2e8f9f7 756 * @}
<> 144:ef7eb2e8f9f7 757 */
<> 144:ef7eb2e8f9f7 758
<> 144:ef7eb2e8f9f7 759 /* Define the private group ***********************************/
<> 144:ef7eb2e8f9f7 760 /**************************************************************/
<> 144:ef7eb2e8f9f7 761 /** @defgroup LCD_Private LCD Private
<> 144:ef7eb2e8f9f7 762 * @{
<> 144:ef7eb2e8f9f7 763 */
<> 144:ef7eb2e8f9f7 764 /**
<> 144:ef7eb2e8f9f7 765 * @}
<> 144:ef7eb2e8f9f7 766 */
<> 144:ef7eb2e8f9f7 767 /**************************************************************/
<> 144:ef7eb2e8f9f7 768
<> 144:ef7eb2e8f9f7 769 /**
<> 144:ef7eb2e8f9f7 770 * @}
<> 144:ef7eb2e8f9f7 771 */
<> 144:ef7eb2e8f9f7 772
<> 144:ef7eb2e8f9f7 773 /**
<> 144:ef7eb2e8f9f7 774 * @}
<> 144:ef7eb2e8f9f7 775 */
<> 144:ef7eb2e8f9f7 776
<> 144:ef7eb2e8f9f7 777 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 778 }
<> 144:ef7eb2e8f9f7 779 #endif
<> 144:ef7eb2e8f9f7 780
<> 144:ef7eb2e8f9f7 781 #endif /* __STM32L0xx_HAL_LCD_H */
<> 144:ef7eb2e8f9f7 782
<> 144:ef7eb2e8f9f7 783
<> 144:ef7eb2e8f9f7 784 #endif /* STM32L053xx || STM32L063xx || STM32L073xx || STM32L083xx */
<> 144:ef7eb2e8f9f7 785
<> 144:ef7eb2e8f9f7 786 /******************* (C) COPYRIGHT 2016 STMicroelectronics *****END OF FILE****/
<> 144:ef7eb2e8f9f7 787