mbed-STM32L452

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targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_ll_dma.h@158:b23ee177fd68, 2017-02-14 (annotated)

Committer:: Kojto
Date:: Tue Feb 14 14:44:10 2017 +0000
Revision:: 158:b23ee177fd68

This updates the lib to the mbed lib v136

Who changed what in which revision?

User	Revision	Line number	New contents of line
Kojto	158:b23ee177fd68	1	/**
Kojto	158:b23ee177fd68	2	******************************************************************************
Kojto	158:b23ee177fd68	3	* @file stm32l0xx_ll_dma.h
Kojto	158:b23ee177fd68	4	* @author MCD Application Team
Kojto	158:b23ee177fd68	5	* @version V1.7.0
Kojto	158:b23ee177fd68	6	* @date 31-May-2016
Kojto	158:b23ee177fd68	7	* @brief Header file of DMA LL module.
Kojto	158:b23ee177fd68	8	******************************************************************************
Kojto	158:b23ee177fd68	9	* @attention
Kojto	158:b23ee177fd68	10	*
Kojto	158:b23ee177fd68	11	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
Kojto	158:b23ee177fd68	12	*
Kojto	158:b23ee177fd68	13	* Redistribution and use in source and binary forms, with or without modification,
Kojto	158:b23ee177fd68	14	* are permitted provided that the following conditions are met:
Kojto	158:b23ee177fd68	15	* 1. Redistributions of source code must retain the above copyright notice,
Kojto	158:b23ee177fd68	16	* this list of conditions and the following disclaimer.
Kojto	158:b23ee177fd68	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
Kojto	158:b23ee177fd68	18	* this list of conditions and the following disclaimer in the documentation
Kojto	158:b23ee177fd68	19	* and/or other materials provided with the distribution.
Kojto	158:b23ee177fd68	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
Kojto	158:b23ee177fd68	21	* may be used to endorse or promote products derived from this software
Kojto	158:b23ee177fd68	22	* without specific prior written permission.
Kojto	158:b23ee177fd68	23	*
Kojto	158:b23ee177fd68	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
Kojto	158:b23ee177fd68	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
Kojto	158:b23ee177fd68	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
Kojto	158:b23ee177fd68	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
Kojto	158:b23ee177fd68	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
Kojto	158:b23ee177fd68	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
Kojto	158:b23ee177fd68	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
Kojto	158:b23ee177fd68	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
Kojto	158:b23ee177fd68	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
Kojto	158:b23ee177fd68	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
Kojto	158:b23ee177fd68	34	*
Kojto	158:b23ee177fd68	35	******************************************************************************
Kojto	158:b23ee177fd68	36	*/
Kojto	158:b23ee177fd68	37
Kojto	158:b23ee177fd68	38	/* Define to prevent recursive inclusion -------------------------------------*/
Kojto	158:b23ee177fd68	39	#ifndef __STM32L0xx_LL_DMA_H
Kojto	158:b23ee177fd68	40	#define __STM32L0xx_LL_DMA_H
Kojto	158:b23ee177fd68	41
Kojto	158:b23ee177fd68	42	#ifdef __cplusplus
Kojto	158:b23ee177fd68	43	extern "C" {
Kojto	158:b23ee177fd68	44	#endif
Kojto	158:b23ee177fd68	45
Kojto	158:b23ee177fd68	46	/* Includes ------------------------------------------------------------------*/
Kojto	158:b23ee177fd68	47	#include "stm32l0xx.h"
Kojto	158:b23ee177fd68	48
Kojto	158:b23ee177fd68	49	/** @addtogroup STM32L0xx_LL_Driver
Kojto	158:b23ee177fd68	50	* @{
Kojto	158:b23ee177fd68	51	*/
Kojto	158:b23ee177fd68	52
Kojto	158:b23ee177fd68	53	#if defined (DMA1)
Kojto	158:b23ee177fd68	54
Kojto	158:b23ee177fd68	55	/** @defgroup DMA_LL DMA
Kojto	158:b23ee177fd68	56	* @{
Kojto	158:b23ee177fd68	57	*/
Kojto	158:b23ee177fd68	58
Kojto	158:b23ee177fd68	59	/* Private types -------------------------------------------------------------*/
Kojto	158:b23ee177fd68	60	/* Private variables ---------------------------------------------------------*/
Kojto	158:b23ee177fd68	61	/** @defgroup DMA_LL_Private_Variables DMA Private Variables
Kojto	158:b23ee177fd68	62	* @{
Kojto	158:b23ee177fd68	63	*/
Kojto	158:b23ee177fd68	64	/* Array used to get the DMA channel register offset versus channel index LL_DMA_CHANNEL_x */
Kojto	158:b23ee177fd68	65	static const uint8_t CHANNEL_OFFSET_TAB[] =
Kojto	158:b23ee177fd68	66	{
Kojto	158:b23ee177fd68	67	(uint8_t)(DMA1_Channel1_BASE - DMA1_BASE),
Kojto	158:b23ee177fd68	68	(uint8_t)(DMA1_Channel2_BASE - DMA1_BASE),
Kojto	158:b23ee177fd68	69	(uint8_t)(DMA1_Channel3_BASE - DMA1_BASE),
Kojto	158:b23ee177fd68	70	(uint8_t)(DMA1_Channel4_BASE - DMA1_BASE),
Kojto	158:b23ee177fd68	71	(uint8_t)(DMA1_Channel5_BASE - DMA1_BASE),
Kojto	158:b23ee177fd68	72	#if defined(DMA1_Channel6)
Kojto	158:b23ee177fd68	73	(uint8_t)(DMA1_Channel6_BASE - DMA1_BASE),
Kojto	158:b23ee177fd68	74	#endif /DMA1_Channel6/
Kojto	158:b23ee177fd68	75	#if defined(DMA1_Channel7)
Kojto	158:b23ee177fd68	76	(uint8_t)(DMA1_Channel7_BASE - DMA1_BASE)
Kojto	158:b23ee177fd68	77	#endif /DMA1_Channel7/
Kojto	158:b23ee177fd68	78	};
Kojto	158:b23ee177fd68	79	/**
Kojto	158:b23ee177fd68	80	* @}
Kojto	158:b23ee177fd68	81	*/
Kojto	158:b23ee177fd68	82
Kojto	158:b23ee177fd68	83	/* Private constants ---------------------------------------------------------*/
Kojto	158:b23ee177fd68	84	/** @defgroup DMA_LL_Private_Constants DMA Private Constants
Kojto	158:b23ee177fd68	85	* @{
Kojto	158:b23ee177fd68	86	*/
Kojto	158:b23ee177fd68	87	/* Define used to get CSELR register offset */
Kojto	158:b23ee177fd68	88	#define DMA_CSELR_OFFSET (uint32_t)(DMA1_CSELR_BASE - DMA1_BASE)
Kojto	158:b23ee177fd68	89
Kojto	158:b23ee177fd68	90	/* Defines used for the bit position in the register and perform offsets */
Kojto	158:b23ee177fd68	91	#define DMA_POSITION_CSELR_CXS ((Channel-1U)*4U)
Kojto	158:b23ee177fd68	92	/**
Kojto	158:b23ee177fd68	93	* @}
Kojto	158:b23ee177fd68	94	*/
Kojto	158:b23ee177fd68	95
Kojto	158:b23ee177fd68	96	/* Private macros ------------------------------------------------------------*/
Kojto	158:b23ee177fd68	97	#if defined(USE_FULL_LL_DRIVER)
Kojto	158:b23ee177fd68	98	/** @defgroup DMA_LL_Private_Macros DMA Private Macros
Kojto	158:b23ee177fd68	99	* @{
Kojto	158:b23ee177fd68	100	*/
Kojto	158:b23ee177fd68	101	/**
Kojto	158:b23ee177fd68	102	* @}
Kojto	158:b23ee177fd68	103	*/
Kojto	158:b23ee177fd68	104	#endif /USE_FULL_LL_DRIVER/
Kojto	158:b23ee177fd68	105
Kojto	158:b23ee177fd68	106	/* Exported types ------------------------------------------------------------*/
Kojto	158:b23ee177fd68	107	#if defined(USE_FULL_LL_DRIVER)
Kojto	158:b23ee177fd68	108	/** @defgroup DMA_LL_ES_INIT DMA Exported Init structure
Kojto	158:b23ee177fd68	109	* @{
Kojto	158:b23ee177fd68	110	*/
Kojto	158:b23ee177fd68	111	typedef struct
Kojto	158:b23ee177fd68	112	{
Kojto	158:b23ee177fd68	113	uint32_t PeriphOrM2MSrcAddress; /*!< Specifies the peripheral base address for DMA transfer
Kojto	158:b23ee177fd68	114	or as Source base address in case of memory to memory transfer direction.
Kojto	158:b23ee177fd68	115
Kojto	158:b23ee177fd68	116	This parameter must be a value between Min_Data = 0 and Max_Data = 0xFFFFFFFF. */
Kojto	158:b23ee177fd68	117
Kojto	158:b23ee177fd68	118	uint32_t MemoryOrM2MDstAddress; /*!< Specifies the memory base address for DMA transfer
Kojto	158:b23ee177fd68	119	or as Destination base address in case of memory to memory transfer direction.
Kojto	158:b23ee177fd68	120
Kojto	158:b23ee177fd68	121	This parameter must be a value between Min_Data = 0 and Max_Data = 0xFFFFFFFF. */
Kojto	158:b23ee177fd68	122
Kojto	158:b23ee177fd68	123	uint32_t Direction; /*!< Specifies if the data will be transferred from memory to peripheral,
Kojto	158:b23ee177fd68	124	from memory to memory or from peripheral to memory.
Kojto	158:b23ee177fd68	125	This parameter can be a value of @ref DMA_LL_EC_DIRECTION
Kojto	158:b23ee177fd68	126
Kojto	158:b23ee177fd68	127	This feature can be modified afterwards using unitary function @ref LL_DMA_SetDataTransferDirection(). */
Kojto	158:b23ee177fd68	128
Kojto	158:b23ee177fd68	129	uint32_t Mode; /*!< Specifies the normal or circular operation mode.
Kojto	158:b23ee177fd68	130	This parameter can be a value of @ref DMA_LL_EC_MODE
Kojto	158:b23ee177fd68	131	@note: The circular buffer mode cannot be used if the memory to memory
Kojto	158:b23ee177fd68	132	data transfer direction is configured on the selected Channel
Kojto	158:b23ee177fd68	133
Kojto	158:b23ee177fd68	134	This feature can be modified afterwards using unitary function @ref LL_DMA_SetMode(). */
Kojto	158:b23ee177fd68	135
Kojto	158:b23ee177fd68	136	uint32_t PeriphOrM2MSrcIncMode; /*!< Specifies whether the Peripheral address or Source address in case of memory to memory transfer direction
Kojto	158:b23ee177fd68	137	is incremented or not.
Kojto	158:b23ee177fd68	138	This parameter can be a value of @ref DMA_LL_EC_PERIPH
Kojto	158:b23ee177fd68	139
Kojto	158:b23ee177fd68	140	This feature can be modified afterwards using unitary function @ref LL_DMA_SetPeriphIncMode(). */
Kojto	158:b23ee177fd68	141
Kojto	158:b23ee177fd68	142	uint32_t MemoryOrM2MDstIncMode; /*!< Specifies whether the Memory address or Destination address in case of memory to memory transfer direction
Kojto	158:b23ee177fd68	143	is incremented or not.
Kojto	158:b23ee177fd68	144	This parameter can be a value of @ref DMA_LL_EC_MEMORY
Kojto	158:b23ee177fd68	145
Kojto	158:b23ee177fd68	146	This feature can be modified afterwards using unitary function @ref LL_DMA_SetMemoryIncMode(). */
Kojto	158:b23ee177fd68	147
Kojto	158:b23ee177fd68	148	uint32_t PeriphOrM2MSrcDataSize; /*!< Specifies the Peripheral data size alignment or Source data size alignment (byte, half word, word)
Kojto	158:b23ee177fd68	149	in case of memory to memory transfer direction.
Kojto	158:b23ee177fd68	150	This parameter can be a value of @ref DMA_LL_EC_PDATAALIGN
Kojto	158:b23ee177fd68	151
Kojto	158:b23ee177fd68	152	This feature can be modified afterwards using unitary function @ref LL_DMA_SetPeriphSize(). */
Kojto	158:b23ee177fd68	153
Kojto	158:b23ee177fd68	154	uint32_t MemoryOrM2MDstDataSize; /*!< Specifies the Memory data size alignment or Destination data size alignment (byte, half word, word)
Kojto	158:b23ee177fd68	155	in case of memory to memory transfer direction.
Kojto	158:b23ee177fd68	156	This parameter can be a value of @ref DMA_LL_EC_MDATAALIGN
Kojto	158:b23ee177fd68	157
Kojto	158:b23ee177fd68	158	This feature can be modified afterwards using unitary function @ref LL_DMA_SetMemorySize(). */
Kojto	158:b23ee177fd68	159
Kojto	158:b23ee177fd68	160	uint32_t NbData; /*!< Specifies the number of data to transfer, in data unit.
Kojto	158:b23ee177fd68	161	The data unit is equal to the source buffer configuration set in PeripheralSize
Kojto	158:b23ee177fd68	162	or MemorySize parameters depending in the transfer direction.
Kojto	158:b23ee177fd68	163	This parameter must be a value between Min_Data = 0 and Max_Data = 0x0000FFFF
Kojto	158:b23ee177fd68	164
Kojto	158:b23ee177fd68	165	This feature can be modified afterwards using unitary function @ref LL_DMA_SetDataLength(). */
Kojto	158:b23ee177fd68	166
Kojto	158:b23ee177fd68	167	uint32_t PeriphRequest; /*!< Specifies the peripheral request.
Kojto	158:b23ee177fd68	168	This parameter can be a value of @ref DMA_LL_EC_REQUEST
Kojto	158:b23ee177fd68	169
Kojto	158:b23ee177fd68	170	This feature can be modified afterwards using unitary function @ref LL_DMA_SetPeriphRequest(). */
Kojto	158:b23ee177fd68	171
Kojto	158:b23ee177fd68	172	uint32_t Priority; /*!< Specifies the channel priority level.
Kojto	158:b23ee177fd68	173	This parameter can be a value of @ref DMA_LL_EC_PRIORITY
Kojto	158:b23ee177fd68	174
Kojto	158:b23ee177fd68	175	This feature can be modified afterwards using unitary function @ref LL_DMA_SetChannelPriorityLevel(). */
Kojto	158:b23ee177fd68	176
Kojto	158:b23ee177fd68	177	} LL_DMA_InitTypeDef;
Kojto	158:b23ee177fd68	178	/**
Kojto	158:b23ee177fd68	179	* @}
Kojto	158:b23ee177fd68	180	*/
Kojto	158:b23ee177fd68	181	#endif /USE_FULL_LL_DRIVER/
Kojto	158:b23ee177fd68	182
Kojto	158:b23ee177fd68	183	/* Exported constants --------------------------------------------------------*/
Kojto	158:b23ee177fd68	184	/** @defgroup DMA_LL_Exported_Constants DMA Exported Constants
Kojto	158:b23ee177fd68	185	* @{
Kojto	158:b23ee177fd68	186	*/
Kojto	158:b23ee177fd68	187	/** @defgroup DMA_LL_EC_CLEAR_FLAG Clear Flags Defines
Kojto	158:b23ee177fd68	188	* @brief Flags defines which can be used with LL_DMA_WriteReg function
Kojto	158:b23ee177fd68	189	* @{
Kojto	158:b23ee177fd68	190	*/
Kojto	158:b23ee177fd68	191	#define LL_DMA_IFCR_CGIF1 DMA_IFCR_CGIF1 /!< Channel 1 global flag /
Kojto	158:b23ee177fd68	192	#define LL_DMA_IFCR_CTCIF1 DMA_IFCR_CTCIF1 /!< Channel 1 transfer complete flag /
Kojto	158:b23ee177fd68	193	#define LL_DMA_IFCR_CHTIF1 DMA_IFCR_CHTIF1 /!< Channel 1 half transfer flag /
Kojto	158:b23ee177fd68	194	#define LL_DMA_IFCR_CTEIF1 DMA_IFCR_CTEIF1 /!< Channel 1 transfer error flag /
Kojto	158:b23ee177fd68	195	#define LL_DMA_IFCR_CGIF2 DMA_IFCR_CGIF2 /!< Channel 2 global flag /
Kojto	158:b23ee177fd68	196	#define LL_DMA_IFCR_CTCIF2 DMA_IFCR_CTCIF2 /!< Channel 2 transfer complete flag /
Kojto	158:b23ee177fd68	197	#define LL_DMA_IFCR_CHTIF2 DMA_IFCR_CHTIF2 /!< Channel 2 half transfer flag /
Kojto	158:b23ee177fd68	198	#define LL_DMA_IFCR_CTEIF2 DMA_IFCR_CTEIF2 /!< Channel 2 transfer error flag /
Kojto	158:b23ee177fd68	199	#define LL_DMA_IFCR_CGIF3 DMA_IFCR_CGIF3 /!< Channel 3 global flag /
Kojto	158:b23ee177fd68	200	#define LL_DMA_IFCR_CTCIF3 DMA_IFCR_CTCIF3 /!< Channel 3 transfer complete flag /
Kojto	158:b23ee177fd68	201	#define LL_DMA_IFCR_CHTIF3 DMA_IFCR_CHTIF3 /!< Channel 3 half transfer flag /
Kojto	158:b23ee177fd68	202	#define LL_DMA_IFCR_CTEIF3 DMA_IFCR_CTEIF3 /!< Channel 3 transfer error flag /
Kojto	158:b23ee177fd68	203	#define LL_DMA_IFCR_CGIF4 DMA_IFCR_CGIF4 /!< Channel 4 global flag /
Kojto	158:b23ee177fd68	204	#define LL_DMA_IFCR_CTCIF4 DMA_IFCR_CTCIF4 /!< Channel 4 transfer complete flag /
Kojto	158:b23ee177fd68	205	#define LL_DMA_IFCR_CHTIF4 DMA_IFCR_CHTIF4 /!< Channel 4 half transfer flag /
Kojto	158:b23ee177fd68	206	#define LL_DMA_IFCR_CTEIF4 DMA_IFCR_CTEIF4 /!< Channel 4 transfer error flag /
Kojto	158:b23ee177fd68	207	#define LL_DMA_IFCR_CGIF5 DMA_IFCR_CGIF5 /!< Channel 5 global flag /
Kojto	158:b23ee177fd68	208	#define LL_DMA_IFCR_CTCIF5 DMA_IFCR_CTCIF5 /!< Channel 5 transfer complete flag /
Kojto	158:b23ee177fd68	209	#define LL_DMA_IFCR_CHTIF5 DMA_IFCR_CHTIF5 /!< Channel 5 half transfer flag /
Kojto	158:b23ee177fd68	210	#define LL_DMA_IFCR_CTEIF5 DMA_IFCR_CTEIF5 /!< Channel 5 transfer error flag /
Kojto	158:b23ee177fd68	211	#if defined(DMA1_Channel6)
Kojto	158:b23ee177fd68	212	#define LL_DMA_IFCR_CGIF6 DMA_IFCR_CGIF6 /!< Channel 6 global flag /
Kojto	158:b23ee177fd68	213	#define LL_DMA_IFCR_CTCIF6 DMA_IFCR_CTCIF6 /!< Channel 6 transfer complete flag /
Kojto	158:b23ee177fd68	214	#define LL_DMA_IFCR_CHTIF6 DMA_IFCR_CHTIF6 /!< Channel 6 half transfer flag /
Kojto	158:b23ee177fd68	215	#define LL_DMA_IFCR_CTEIF6 DMA_IFCR_CTEIF6 /!< Channel 6 transfer error flag /
Kojto	158:b23ee177fd68	216	#endif
Kojto	158:b23ee177fd68	217	#if defined(DMA1_Channel7)
Kojto	158:b23ee177fd68	218	#define LL_DMA_IFCR_CGIF7 DMA_IFCR_CGIF7 /!< Channel 7 global flag /
Kojto	158:b23ee177fd68	219	#define LL_DMA_IFCR_CTCIF7 DMA_IFCR_CTCIF7 /!< Channel 7 transfer complete flag /
Kojto	158:b23ee177fd68	220	#define LL_DMA_IFCR_CHTIF7 DMA_IFCR_CHTIF7 /!< Channel 7 half transfer flag /
Kojto	158:b23ee177fd68	221	#define LL_DMA_IFCR_CTEIF7 DMA_IFCR_CTEIF7 /!< Channel 7 transfer error flag /
Kojto	158:b23ee177fd68	222	#endif
Kojto	158:b23ee177fd68	223	/**
Kojto	158:b23ee177fd68	224	* @}
Kojto	158:b23ee177fd68	225	*/
Kojto	158:b23ee177fd68	226
Kojto	158:b23ee177fd68	227	/** @defgroup DMA_LL_EC_GET_FLAG Get Flags Defines
Kojto	158:b23ee177fd68	228	* @brief Flags defines which can be used with LL_DMA_ReadReg function
Kojto	158:b23ee177fd68	229	* @{
Kojto	158:b23ee177fd68	230	*/
Kojto	158:b23ee177fd68	231	#define LL_DMA_ISR_GIF1 DMA_ISR_GIF1 /!< Channel 1 global flag /
Kojto	158:b23ee177fd68	232	#define LL_DMA_ISR_TCIF1 DMA_ISR_TCIF1 /!< Channel 1 transfer complete flag /
Kojto	158:b23ee177fd68	233	#define LL_DMA_ISR_HTIF1 DMA_ISR_HTIF1 /!< Channel 1 half transfer flag /
Kojto	158:b23ee177fd68	234	#define LL_DMA_ISR_TEIF1 DMA_ISR_TEIF1 /!< Channel 1 transfer error flag /
Kojto	158:b23ee177fd68	235	#define LL_DMA_ISR_GIF2 DMA_ISR_GIF2 /!< Channel 2 global flag /
Kojto	158:b23ee177fd68	236	#define LL_DMA_ISR_TCIF2 DMA_ISR_TCIF2 /!< Channel 2 transfer complete flag /
Kojto	158:b23ee177fd68	237	#define LL_DMA_ISR_HTIF2 DMA_ISR_HTIF2 /!< Channel 2 half transfer flag /
Kojto	158:b23ee177fd68	238	#define LL_DMA_ISR_TEIF2 DMA_ISR_TEIF2 /!< Channel 2 transfer error flag /
Kojto	158:b23ee177fd68	239	#define LL_DMA_ISR_GIF3 DMA_ISR_GIF3 /!< Channel 3 global flag /
Kojto	158:b23ee177fd68	240	#define LL_DMA_ISR_TCIF3 DMA_ISR_TCIF3 /!< Channel 3 transfer complete flag /
Kojto	158:b23ee177fd68	241	#define LL_DMA_ISR_HTIF3 DMA_ISR_HTIF3 /!< Channel 3 half transfer flag /
Kojto	158:b23ee177fd68	242	#define LL_DMA_ISR_TEIF3 DMA_ISR_TEIF3 /!< Channel 3 transfer error flag /
Kojto	158:b23ee177fd68	243	#define LL_DMA_ISR_GIF4 DMA_ISR_GIF4 /!< Channel 4 global flag /
Kojto	158:b23ee177fd68	244	#define LL_DMA_ISR_TCIF4 DMA_ISR_TCIF4 /!< Channel 4 transfer complete flag /
Kojto	158:b23ee177fd68	245	#define LL_DMA_ISR_HTIF4 DMA_ISR_HTIF4 /!< Channel 4 half transfer flag /
Kojto	158:b23ee177fd68	246	#define LL_DMA_ISR_TEIF4 DMA_ISR_TEIF4 /!< Channel 4 transfer error flag /
Kojto	158:b23ee177fd68	247	#define LL_DMA_ISR_GIF5 DMA_ISR_GIF5 /!< Channel 5 global flag /
Kojto	158:b23ee177fd68	248	#define LL_DMA_ISR_TCIF5 DMA_ISR_TCIF5 /!< Channel 5 transfer complete flag /
Kojto	158:b23ee177fd68	249	#define LL_DMA_ISR_HTIF5 DMA_ISR_HTIF5 /!< Channel 5 half transfer flag /
Kojto	158:b23ee177fd68	250	#define LL_DMA_ISR_TEIF5 DMA_ISR_TEIF5 /!< Channel 5 transfer error flag /
Kojto	158:b23ee177fd68	251	#if defined(DMA1_Channel6)
Kojto	158:b23ee177fd68	252	#define LL_DMA_ISR_GIF6 DMA_ISR_GIF6 /!< Channel 6 global flag /
Kojto	158:b23ee177fd68	253	#define LL_DMA_ISR_TCIF6 DMA_ISR_TCIF6 /!< Channel 6 transfer complete flag /
Kojto	158:b23ee177fd68	254	#define LL_DMA_ISR_HTIF6 DMA_ISR_HTIF6 /!< Channel 6 half transfer flag /
Kojto	158:b23ee177fd68	255	#define LL_DMA_ISR_TEIF6 DMA_ISR_TEIF6 /!< Channel 6 transfer error flag /
Kojto	158:b23ee177fd68	256	#endif
Kojto	158:b23ee177fd68	257	#if defined(DMA1_Channel7)
Kojto	158:b23ee177fd68	258	#define LL_DMA_ISR_GIF7 DMA_ISR_GIF7 /!< Channel 7 global flag /
Kojto	158:b23ee177fd68	259	#define LL_DMA_ISR_TCIF7 DMA_ISR_TCIF7 /!< Channel 7 transfer complete flag /
Kojto	158:b23ee177fd68	260	#define LL_DMA_ISR_HTIF7 DMA_ISR_HTIF7 /!< Channel 7 half transfer flag /
Kojto	158:b23ee177fd68	261	#define LL_DMA_ISR_TEIF7 DMA_ISR_TEIF7 /!< Channel 7 transfer error flag /
Kojto	158:b23ee177fd68	262	#endif
Kojto	158:b23ee177fd68	263	/**
Kojto	158:b23ee177fd68	264	* @}
Kojto	158:b23ee177fd68	265	*/
Kojto	158:b23ee177fd68	266
Kojto	158:b23ee177fd68	267	/** @defgroup DMA_LL_EC_IT IT Defines
Kojto	158:b23ee177fd68	268	* @brief IT defines which can be used with LL_DMA_ReadReg and LL_DMA_WriteReg functions
Kojto	158:b23ee177fd68	269	* @{
Kojto	158:b23ee177fd68	270	*/
Kojto	158:b23ee177fd68	271	#define LL_DMA_CCR_TCIE DMA_CCR_TCIE /!< Transfer complete interrupt /
Kojto	158:b23ee177fd68	272	#define LL_DMA_CCR_HTIE DMA_CCR_HTIE /!< Half Transfer interrupt /
Kojto	158:b23ee177fd68	273	#define LL_DMA_CCR_TEIE DMA_CCR_TEIE /!< Transfer error interrupt /
Kojto	158:b23ee177fd68	274	/**
Kojto	158:b23ee177fd68	275	* @}
Kojto	158:b23ee177fd68	276	*/
Kojto	158:b23ee177fd68	277
Kojto	158:b23ee177fd68	278	/** @defgroup DMA_LL_EC_CHANNEL CHANNEL
Kojto	158:b23ee177fd68	279	* @{
Kojto	158:b23ee177fd68	280	*/
Kojto	158:b23ee177fd68	281	#define LL_DMA_CHANNEL_1 ((uint32_t)0x00000001U) /!< DMA Channel 1 /
Kojto	158:b23ee177fd68	282	#define LL_DMA_CHANNEL_2 ((uint32_t)0x00000002U) /!< DMA Channel 2 /
Kojto	158:b23ee177fd68	283	#define LL_DMA_CHANNEL_3 ((uint32_t)0x00000003U) /!< DMA Channel 3 /
Kojto	158:b23ee177fd68	284	#define LL_DMA_CHANNEL_4 ((uint32_t)0x00000004U) /!< DMA Channel 4 /
Kojto	158:b23ee177fd68	285	#define LL_DMA_CHANNEL_5 ((uint32_t)0x00000005U) /!< DMA Channel 5 /
Kojto	158:b23ee177fd68	286	#if defined(DMA1_Channel6)
Kojto	158:b23ee177fd68	287	#define LL_DMA_CHANNEL_6 ((uint32_t)0x00000006U) /!< DMA Channel 6 /
Kojto	158:b23ee177fd68	288	#endif
Kojto	158:b23ee177fd68	289	#if defined(DMA1_Channel7)
Kojto	158:b23ee177fd68	290	#define LL_DMA_CHANNEL_7 ((uint32_t)0x00000007U) /!< DMA Channel 7 /
Kojto	158:b23ee177fd68	291	#endif
Kojto	158:b23ee177fd68	292	#if defined(USE_FULL_LL_DRIVER)
Kojto	158:b23ee177fd68	293	#define LL_DMA_CHANNEL_ALL ((uint32_t)0xFFFF0000U) /!< DMA Channel all (used only for function @ref LL_DMA_DeInit(). /
Kojto	158:b23ee177fd68	294	#endif /USE_FULL_LL_DRIVER/
Kojto	158:b23ee177fd68	295	/**
Kojto	158:b23ee177fd68	296	* @}
Kojto	158:b23ee177fd68	297	*/
Kojto	158:b23ee177fd68	298
Kojto	158:b23ee177fd68	299	/** @defgroup DMA_LL_EC_DIRECTION Transfer Direction
Kojto	158:b23ee177fd68	300	* @{
Kojto	158:b23ee177fd68	301	*/
Kojto	158:b23ee177fd68	302	#define LL_DMA_DIRECTION_PERIPH_TO_MEMORY ((uint32_t)0x00000000U) /!< Peripheral to memory direction /
Kojto	158:b23ee177fd68	303	#define LL_DMA_DIRECTION_MEMORY_TO_PERIPH DMA_CCR_DIR /!< Memory to peripheral direction /
Kojto	158:b23ee177fd68	304	#define LL_DMA_DIRECTION_MEMORY_TO_MEMORY DMA_CCR_MEM2MEM /!< Memory to memory direction /
Kojto	158:b23ee177fd68	305	/**
Kojto	158:b23ee177fd68	306	* @}
Kojto	158:b23ee177fd68	307	*/
Kojto	158:b23ee177fd68	308
Kojto	158:b23ee177fd68	309	/** @defgroup DMA_LL_EC_MODE Transfer mode
Kojto	158:b23ee177fd68	310	* @{
Kojto	158:b23ee177fd68	311	*/
Kojto	158:b23ee177fd68	312	#define LL_DMA_MODE_NORMAL ((uint32_t)0x00000000U) /!< Normal Mode /
Kojto	158:b23ee177fd68	313	#define LL_DMA_MODE_CIRCULAR DMA_CCR_CIRC /!< Circular Mode /
Kojto	158:b23ee177fd68	314	/**
Kojto	158:b23ee177fd68	315	* @}
Kojto	158:b23ee177fd68	316	*/
Kojto	158:b23ee177fd68	317
Kojto	158:b23ee177fd68	318	/** @defgroup DMA_LL_EC_PERIPH Peripheral increment mode
Kojto	158:b23ee177fd68	319	* @{
Kojto	158:b23ee177fd68	320	*/
Kojto	158:b23ee177fd68	321	#define LL_DMA_PERIPH_INCREMENT DMA_CCR_PINC /!< Peripheral increment mode Enable /
Kojto	158:b23ee177fd68	322	#define LL_DMA_PERIPH_NOINCREMENT ((uint32_t)0x00000000U) /!< Peripheral increment mode Disable /
Kojto	158:b23ee177fd68	323	/**
Kojto	158:b23ee177fd68	324	* @}
Kojto	158:b23ee177fd68	325	*/
Kojto	158:b23ee177fd68	326
Kojto	158:b23ee177fd68	327	/** @defgroup DMA_LL_EC_MEMORY Memory increment mode
Kojto	158:b23ee177fd68	328	* @{
Kojto	158:b23ee177fd68	329	*/
Kojto	158:b23ee177fd68	330	#define LL_DMA_MEMORY_INCREMENT DMA_CCR_MINC /!< Memory increment mode Enable /
Kojto	158:b23ee177fd68	331	#define LL_DMA_MEMORY_NOINCREMENT ((uint32_t)0x00000000U) /!< Memory increment mode Disable /
Kojto	158:b23ee177fd68	332	/**
Kojto	158:b23ee177fd68	333	* @}
Kojto	158:b23ee177fd68	334	*/
Kojto	158:b23ee177fd68	335
Kojto	158:b23ee177fd68	336	/** @defgroup DMA_LL_EC_PDATAALIGN Peripheral data alignment
Kojto	158:b23ee177fd68	337	* @{
Kojto	158:b23ee177fd68	338	*/
Kojto	158:b23ee177fd68	339	#define LL_DMA_PDATAALIGN_BYTE ((uint32_t)0x00000000U) /!< Peripheral data alignment : Byte /
Kojto	158:b23ee177fd68	340	#define LL_DMA_PDATAALIGN_HALFWORD DMA_CCR_PSIZE_0 /!< Peripheral data alignment : HalfWord /
Kojto	158:b23ee177fd68	341	#define LL_DMA_PDATAALIGN_WORD DMA_CCR_PSIZE_1 /!< Peripheral data alignment : Word /
Kojto	158:b23ee177fd68	342	/**
Kojto	158:b23ee177fd68	343	* @}
Kojto	158:b23ee177fd68	344	*/
Kojto	158:b23ee177fd68	345
Kojto	158:b23ee177fd68	346	/** @defgroup DMA_LL_EC_MDATAALIGN Memory data alignment
Kojto	158:b23ee177fd68	347	* @{
Kojto	158:b23ee177fd68	348	*/
Kojto	158:b23ee177fd68	349	#define LL_DMA_MDATAALIGN_BYTE ((uint32_t)0x00000000U) /!< Memory data alignment : Byte /
Kojto	158:b23ee177fd68	350	#define LL_DMA_MDATAALIGN_HALFWORD DMA_CCR_MSIZE_0 /!< Memory data alignment : HalfWord /
Kojto	158:b23ee177fd68	351	#define LL_DMA_MDATAALIGN_WORD DMA_CCR_MSIZE_1 /!< Memory data alignment : Word /
Kojto	158:b23ee177fd68	352	/**
Kojto	158:b23ee177fd68	353	* @}
Kojto	158:b23ee177fd68	354	*/
Kojto	158:b23ee177fd68	355
Kojto	158:b23ee177fd68	356	/** @defgroup DMA_LL_EC_PRIORITY Transfer Priority level
Kojto	158:b23ee177fd68	357	* @{
Kojto	158:b23ee177fd68	358	*/
Kojto	158:b23ee177fd68	359	#define LL_DMA_PRIORITY_LOW ((uint32_t)0x00000000U) /!< Priority level : Low /
Kojto	158:b23ee177fd68	360	#define LL_DMA_PRIORITY_MEDIUM DMA_CCR_PL_0 /!< Priority level : Medium /
Kojto	158:b23ee177fd68	361	#define LL_DMA_PRIORITY_HIGH DMA_CCR_PL_1 /!< Priority level : High /
Kojto	158:b23ee177fd68	362	#define LL_DMA_PRIORITY_VERYHIGH DMA_CCR_PL /!< Priority level : Very_High /
Kojto	158:b23ee177fd68	363	/**
Kojto	158:b23ee177fd68	364	* @}
Kojto	158:b23ee177fd68	365	*/
Kojto	158:b23ee177fd68	366
Kojto	158:b23ee177fd68	367	/** @defgroup DMA_LL_EC_REQUEST Transfer peripheral request
Kojto	158:b23ee177fd68	368	* @{
Kojto	158:b23ee177fd68	369	*/
Kojto	158:b23ee177fd68	370	#define LL_DMA_REQUEST_0 ((uint32_t)0x00000000U) /!< DMA peripheral request 0 /
Kojto	158:b23ee177fd68	371	#define LL_DMA_REQUEST_1 ((uint32_t)0x00000001U) /!< DMA peripheral request 1 /
Kojto	158:b23ee177fd68	372	#define LL_DMA_REQUEST_2 ((uint32_t)0x00000002U) /!< DMA peripheral request 2 /
Kojto	158:b23ee177fd68	373	#define LL_DMA_REQUEST_3 ((uint32_t)0x00000003U) /!< DMA peripheral request 3 /
Kojto	158:b23ee177fd68	374	#define LL_DMA_REQUEST_4 ((uint32_t)0x00000004U) /!< DMA peripheral request 4 /
Kojto	158:b23ee177fd68	375	#define LL_DMA_REQUEST_5 ((uint32_t)0x00000005U) /!< DMA peripheral request 5 /
Kojto	158:b23ee177fd68	376	#define LL_DMA_REQUEST_6 ((uint32_t)0x00000006U) /!< DMA peripheral request 6 /
Kojto	158:b23ee177fd68	377	#define LL_DMA_REQUEST_7 ((uint32_t)0x00000007U) /!< DMA peripheral request 7 /
Kojto	158:b23ee177fd68	378	#define LL_DMA_REQUEST_8 ((uint32_t)0x00000008U) /!< DMA peripheral request 8 /
Kojto	158:b23ee177fd68	379	#define LL_DMA_REQUEST_9 ((uint32_t)0x00000009U) /!< DMA peripheral request 9 /
Kojto	158:b23ee177fd68	380	#define LL_DMA_REQUEST_10 ((uint32_t)0x0000000AU) /!< DMA peripheral request 10 /
Kojto	158:b23ee177fd68	381	#define LL_DMA_REQUEST_11 ((uint32_t)0x0000000BU) /!< DMA peripheral request 11 /
Kojto	158:b23ee177fd68	382	#define LL_DMA_REQUEST_12 ((uint32_t)0x0000000CU) /!< DMA peripheral request 12 /
Kojto	158:b23ee177fd68	383	#define LL_DMA_REQUEST_13 ((uint32_t)0x0000000DU) /!< DMA peripheral request 13 /
Kojto	158:b23ee177fd68	384	#define LL_DMA_REQUEST_14 ((uint32_t)0x0000000EU) /!< DMA peripheral request 14 /
Kojto	158:b23ee177fd68	385	#define LL_DMA_REQUEST_15 ((uint32_t)0x0000000FU) /!< DMA peripheral request 15 /
Kojto	158:b23ee177fd68	386	/**
Kojto	158:b23ee177fd68	387	* @}
Kojto	158:b23ee177fd68	388	*/
Kojto	158:b23ee177fd68	389
Kojto	158:b23ee177fd68	390	/**
Kojto	158:b23ee177fd68	391	* @}
Kojto	158:b23ee177fd68	392	*/
Kojto	158:b23ee177fd68	393
Kojto	158:b23ee177fd68	394	/* Exported macro ------------------------------------------------------------*/
Kojto	158:b23ee177fd68	395	/** @defgroup DMA_LL_Exported_Macros DMA Exported Macros
Kojto	158:b23ee177fd68	396	* @{
Kojto	158:b23ee177fd68	397	*/
Kojto	158:b23ee177fd68	398
Kojto	158:b23ee177fd68	399	/** @defgroup DMA_LL_EM_WRITE_READ Common Write and read registers macros
Kojto	158:b23ee177fd68	400	* @{
Kojto	158:b23ee177fd68	401	*/
Kojto	158:b23ee177fd68	402	/**
Kojto	158:b23ee177fd68	403	* @brief Write a value in DMA register
Kojto	158:b23ee177fd68	404	* @param __INSTANCE__ DMA Instance
Kojto	158:b23ee177fd68	405	* @param __REG__ Register to be written
Kojto	158:b23ee177fd68	406	* @param __VALUE__ Value to be written in the register
Kojto	158:b23ee177fd68	407	* @retval None
Kojto	158:b23ee177fd68	408	*/
Kojto	158:b23ee177fd68	409	#define LL_DMA_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
Kojto	158:b23ee177fd68	410
Kojto	158:b23ee177fd68	411	/**
Kojto	158:b23ee177fd68	412	* @brief Read a value in DMA register
Kojto	158:b23ee177fd68	413	* @param __INSTANCE__ DMA Instance
Kojto	158:b23ee177fd68	414	* @param __REG__ Register to be read
Kojto	158:b23ee177fd68	415	* @retval Register value
Kojto	158:b23ee177fd68	416	*/
Kojto	158:b23ee177fd68	417	#define LL_DMA_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
Kojto	158:b23ee177fd68	418	/**
Kojto	158:b23ee177fd68	419	* @}
Kojto	158:b23ee177fd68	420	*/
Kojto	158:b23ee177fd68	421
Kojto	158:b23ee177fd68	422	/** @defgroup DMA_LL_EM_CONVERT_DMAxCHANNELy Convert DMAxChannely
Kojto	158:b23ee177fd68	423	* @{
Kojto	158:b23ee177fd68	424	*/
Kojto	158:b23ee177fd68	425	/**
Kojto	158:b23ee177fd68	426	* @brief Convert DMAx_Channely into DMAx
Kojto	158:b23ee177fd68	427	* @param __CHANNEL_INSTANCE__ DMAx_Channely
Kojto	158:b23ee177fd68	428	* @retval DMAx
Kojto	158:b23ee177fd68	429	*/
Kojto	158:b23ee177fd68	430	#define __LL_DMA_GET_INSTANCE(__CHANNEL_INSTANCE__) (DMA1)
Kojto	158:b23ee177fd68	431
Kojto	158:b23ee177fd68	432	/**
Kojto	158:b23ee177fd68	433	* @brief Convert DMAx_Channely into LL_DMA_CHANNEL_y
Kojto	158:b23ee177fd68	434	* @param __CHANNEL_INSTANCE__ DMAx_Channely
Kojto	158:b23ee177fd68	435	* @retval LL_DMA_CHANNEL_y
Kojto	158:b23ee177fd68	436	*/
Kojto	158:b23ee177fd68	437	#if defined (DMA1_Channel6) && defined (DMA1_Channel7)
Kojto	158:b23ee177fd68	438	#define __LL_DMA_GET_CHANNEL(__CHANNEL_INSTANCE__) \
Kojto	158:b23ee177fd68	439	(((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel1)) ? LL_DMA_CHANNEL_1 : \
Kojto	158:b23ee177fd68	440	((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel2)) ? LL_DMA_CHANNEL_2 : \
Kojto	158:b23ee177fd68	441	((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel3)) ? LL_DMA_CHANNEL_3 : \
Kojto	158:b23ee177fd68	442	((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel4)) ? LL_DMA_CHANNEL_4 : \
Kojto	158:b23ee177fd68	443	((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel5)) ? LL_DMA_CHANNEL_5 : \
Kojto	158:b23ee177fd68	444	((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel6)) ? LL_DMA_CHANNEL_6 : \
Kojto	158:b23ee177fd68	445	LL_DMA_CHANNEL_7)
Kojto	158:b23ee177fd68	446	#elif defined (DMA1_Channel6)
Kojto	158:b23ee177fd68	447	#define __LL_DMA_GET_CHANNEL(__CHANNEL_INSTANCE__) \
Kojto	158:b23ee177fd68	448	(((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel1)) ? LL_DMA_CHANNEL_1 : \
Kojto	158:b23ee177fd68	449	((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel2)) ? LL_DMA_CHANNEL_2 : \
Kojto	158:b23ee177fd68	450	((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel3)) ? LL_DMA_CHANNEL_3 : \
Kojto	158:b23ee177fd68	451	((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel4)) ? LL_DMA_CHANNEL_4 : \
Kojto	158:b23ee177fd68	452	((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel5)) ? LL_DMA_CHANNEL_5 : \
Kojto	158:b23ee177fd68	453	LL_DMA_CHANNEL_6)
Kojto	158:b23ee177fd68	454	#else
Kojto	158:b23ee177fd68	455	#define __LL_DMA_GET_CHANNEL(__CHANNEL_INSTANCE__) \
Kojto	158:b23ee177fd68	456	(((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel1)) ? LL_DMA_CHANNEL_1 : \
Kojto	158:b23ee177fd68	457	((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel2)) ? LL_DMA_CHANNEL_2 : \
Kojto	158:b23ee177fd68	458	((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel3)) ? LL_DMA_CHANNEL_3 : \
Kojto	158:b23ee177fd68	459	((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel4)) ? LL_DMA_CHANNEL_4 : \
Kojto	158:b23ee177fd68	460	LL_DMA_CHANNEL_5)
Kojto	158:b23ee177fd68	461	#endif /* DMA1_Channel6 && DMA1_Channel7 */
Kojto	158:b23ee177fd68	462
Kojto	158:b23ee177fd68	463	/**
Kojto	158:b23ee177fd68	464	* @brief Convert DMA Instance DMAx and LL_DMA_CHANNEL_y into DMAx_Channely
Kojto	158:b23ee177fd68	465	* @param __DMA_INSTANCE__ DMAx
Kojto	158:b23ee177fd68	466	* @param __CHANNEL__ LL_DMA_CHANNEL_y
Kojto	158:b23ee177fd68	467	* @retval DMAx_Channely
Kojto	158:b23ee177fd68	468	*/
Kojto	158:b23ee177fd68	469	#if defined (DMA1_Channel6) && defined (DMA1_Channel7)
Kojto	158:b23ee177fd68	470	#define __LL_DMA_GET_CHANNEL_INSTANCE(__DMA_INSTANCE__, __CHANNEL__) \
Kojto	158:b23ee177fd68	471	((((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_1))) ? DMA1_Channel1 : \
Kojto	158:b23ee177fd68	472	(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_2))) ? DMA1_Channel2 : \
Kojto	158:b23ee177fd68	473	(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_3))) ? DMA1_Channel3 : \
Kojto	158:b23ee177fd68	474	(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_4))) ? DMA1_Channel4 : \
Kojto	158:b23ee177fd68	475	(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_5))) ? DMA1_Channel5 : \
Kojto	158:b23ee177fd68	476	(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_6))) ? DMA1_Channel6 : \
Kojto	158:b23ee177fd68	477	DMA1_Channel7)
Kojto	158:b23ee177fd68	478	#elif defined (DMA1_Channel6)
Kojto	158:b23ee177fd68	479	#define __LL_DMA_GET_CHANNEL_INSTANCE(__DMA_INSTANCE__, __CHANNEL__) \
Kojto	158:b23ee177fd68	480	((((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_1))) ? DMA1_Channel1 : \
Kojto	158:b23ee177fd68	481	(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_2))) ? DMA1_Channel2 : \
Kojto	158:b23ee177fd68	482	(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_3))) ? DMA1_Channel3 : \
Kojto	158:b23ee177fd68	483	(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_4))) ? DMA1_Channel4 : \
Kojto	158:b23ee177fd68	484	(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_5))) ? DMA1_Channel5 : \
Kojto	158:b23ee177fd68	485	DMA1_Channel6)
Kojto	158:b23ee177fd68	486	#else
Kojto	158:b23ee177fd68	487	#define __LL_DMA_GET_CHANNEL_INSTANCE(__DMA_INSTANCE__, __CHANNEL__) \
Kojto	158:b23ee177fd68	488	((((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_1))) ? DMA1_Channel1 : \
Kojto	158:b23ee177fd68	489	(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_2))) ? DMA1_Channel2 : \
Kojto	158:b23ee177fd68	490	(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_3))) ? DMA1_Channel3 : \
Kojto	158:b23ee177fd68	491	(((uint32_t)(__DMA_INSTANCE__) == ((uint32_t)DMA1)) && ((uint32_t)(__CHANNEL__) == ((uint32_t)LL_DMA_CHANNEL_4))) ? DMA1_Channel4 : \
Kojto	158:b23ee177fd68	492	DMA1_Channel5)
Kojto	158:b23ee177fd68	493	#endif /* DMA1_Channel6 && DMA1_Channel7 */
Kojto	158:b23ee177fd68	494
Kojto	158:b23ee177fd68	495	/**
Kojto	158:b23ee177fd68	496	* @}
Kojto	158:b23ee177fd68	497	*/
Kojto	158:b23ee177fd68	498
Kojto	158:b23ee177fd68	499	/**
Kojto	158:b23ee177fd68	500	* @}
Kojto	158:b23ee177fd68	501	*/
Kojto	158:b23ee177fd68	502
Kojto	158:b23ee177fd68	503	/* Exported functions --------------------------------------------------------*/
Kojto	158:b23ee177fd68	504	/** @defgroup DMA_LL_Exported_Functions DMA Exported Functions
Kojto	158:b23ee177fd68	505	* @{
Kojto	158:b23ee177fd68	506	*/
Kojto	158:b23ee177fd68	507
Kojto	158:b23ee177fd68	508	/** @defgroup DMA_LL_EF_Configuration Configuration
Kojto	158:b23ee177fd68	509	* @{
Kojto	158:b23ee177fd68	510	*/
Kojto	158:b23ee177fd68	511	/**
Kojto	158:b23ee177fd68	512	* @brief Enable DMA channel.
Kojto	158:b23ee177fd68	513	* @rmtoll CCR EN LL_DMA_EnableChannel
Kojto	158:b23ee177fd68	514	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	515	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	516	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	517	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	518	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	519	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	520	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	521	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	522	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	523	* @retval None
Kojto	158:b23ee177fd68	524	*/
Kojto	158:b23ee177fd68	525	__STATIC_INLINE void LL_DMA_EnableChannel(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	526	{
Kojto	158:b23ee177fd68	527	SET_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_EN);
Kojto	158:b23ee177fd68	528	}
Kojto	158:b23ee177fd68	529
Kojto	158:b23ee177fd68	530	/**
Kojto	158:b23ee177fd68	531	* @brief Disable DMA channel.
Kojto	158:b23ee177fd68	532	* @rmtoll CCR EN LL_DMA_DisableChannel
Kojto	158:b23ee177fd68	533	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	534	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	535	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	536	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	537	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	538	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	539	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	540	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	541	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	542	* @retval None
Kojto	158:b23ee177fd68	543	*/
Kojto	158:b23ee177fd68	544	__STATIC_INLINE void LL_DMA_DisableChannel(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	545	{
Kojto	158:b23ee177fd68	546	CLEAR_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_EN);
Kojto	158:b23ee177fd68	547	}
Kojto	158:b23ee177fd68	548
Kojto	158:b23ee177fd68	549	/**
Kojto	158:b23ee177fd68	550	* @brief Check if DMA channel is enabled or disabled.
Kojto	158:b23ee177fd68	551	* @rmtoll CCR EN LL_DMA_IsEnabledChannel
Kojto	158:b23ee177fd68	552	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	553	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	554	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	555	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	556	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	557	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	558	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	559	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	560	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	561	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	562	*/
Kojto	158:b23ee177fd68	563	__STATIC_INLINE uint32_t LL_DMA_IsEnabledChannel(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	564	{
Kojto	158:b23ee177fd68	565	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
Kojto	158:b23ee177fd68	566	DMA_CCR_EN) == (DMA_CCR_EN));
Kojto	158:b23ee177fd68	567	}
Kojto	158:b23ee177fd68	568
Kojto	158:b23ee177fd68	569	/**
Kojto	158:b23ee177fd68	570	* @brief Configure all parameters link to DMA transfer.
Kojto	158:b23ee177fd68	571	* @rmtoll CCR DIR LL_DMA_ConfigTransfer\n
Kojto	158:b23ee177fd68	572	* CCR MEM2MEM LL_DMA_ConfigTransfer\n
Kojto	158:b23ee177fd68	573	* CCR CIRC LL_DMA_ConfigTransfer\n
Kojto	158:b23ee177fd68	574	* CCR PINC LL_DMA_ConfigTransfer\n
Kojto	158:b23ee177fd68	575	* CCR MINC LL_DMA_ConfigTransfer\n
Kojto	158:b23ee177fd68	576	* CCR PSIZE LL_DMA_ConfigTransfer\n
Kojto	158:b23ee177fd68	577	* CCR MSIZE LL_DMA_ConfigTransfer\n
Kojto	158:b23ee177fd68	578	* CCR PL LL_DMA_ConfigTransfer
Kojto	158:b23ee177fd68	579	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	580	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	581	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	582	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	583	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	584	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	585	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	586	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	587	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	588	* @param Configuration This parameter must be a combination of all the following values:
Kojto	158:b23ee177fd68	589	* @arg @ref LL_DMA_DIRECTION_PERIPH_TO_MEMORY or @ref LL_DMA_DIRECTION_MEMORY_TO_PERIPH or @ref LL_DMA_DIRECTION_MEMORY_TO_MEMORY
Kojto	158:b23ee177fd68	590	* @arg @ref LL_DMA_MODE_NORMAL or @ref LL_DMA_MODE_CIRCULAR
Kojto	158:b23ee177fd68	591	* @arg @ref LL_DMA_PERIPH_INCREMENT or @ref LL_DMA_PERIPH_NOINCREMENT
Kojto	158:b23ee177fd68	592	* @arg @ref LL_DMA_MEMORY_INCREMENT or @ref LL_DMA_MEMORY_NOINCREMENT
Kojto	158:b23ee177fd68	593	* @arg @ref LL_DMA_PDATAALIGN_BYTE or @ref LL_DMA_PDATAALIGN_HALFWORD or @ref LL_DMA_PDATAALIGN_WORD
Kojto	158:b23ee177fd68	594	* @arg @ref LL_DMA_MDATAALIGN_BYTE or @ref LL_DMA_MDATAALIGN_HALFWORD or @ref LL_DMA_MDATAALIGN_WORD
Kojto	158:b23ee177fd68	595	* @arg @ref LL_DMA_PRIORITY_LOW or @ref LL_DMA_PRIORITY_MEDIUM or @ref LL_DMA_PRIORITY_HIGH or @ref LL_DMA_PRIORITY_VERYHIGH
Kojto	158:b23ee177fd68	596	* @retval None
Kojto	158:b23ee177fd68	597	*/
Kojto	158:b23ee177fd68	598	__STATIC_INLINE void LL_DMA_ConfigTransfer(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Configuration)
Kojto	158:b23ee177fd68	599	{
Kojto	158:b23ee177fd68	600	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
Kojto	158:b23ee177fd68	601	DMA_CCR_DIR \| DMA_CCR_MEM2MEM \| DMA_CCR_CIRC \| DMA_CCR_PINC \| DMA_CCR_MINC \| DMA_CCR_PSIZE \| DMA_CCR_MSIZE \| DMA_CCR_PL,
Kojto	158:b23ee177fd68	602	Configuration);
Kojto	158:b23ee177fd68	603	}
Kojto	158:b23ee177fd68	604
Kojto	158:b23ee177fd68	605	/**
Kojto	158:b23ee177fd68	606	* @brief Set Data transfer direction (read from peripheral or from memory).
Kojto	158:b23ee177fd68	607	* @rmtoll CCR DIR LL_DMA_SetDataTransferDirection\n
Kojto	158:b23ee177fd68	608	* CCR MEM2MEM LL_DMA_SetDataTransferDirection
Kojto	158:b23ee177fd68	609	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	610	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	611	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	612	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	613	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	614	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	615	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	616	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	617	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	618	* @param Direction This parameter can be one of the following values:
Kojto	158:b23ee177fd68	619	* @arg @ref LL_DMA_DIRECTION_PERIPH_TO_MEMORY
Kojto	158:b23ee177fd68	620	* @arg @ref LL_DMA_DIRECTION_MEMORY_TO_PERIPH
Kojto	158:b23ee177fd68	621	* @arg @ref LL_DMA_DIRECTION_MEMORY_TO_MEMORY
Kojto	158:b23ee177fd68	622	* @retval None
Kojto	158:b23ee177fd68	623	*/
Kojto	158:b23ee177fd68	624	__STATIC_INLINE void LL_DMA_SetDataTransferDirection(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Direction)
Kojto	158:b23ee177fd68	625	{
Kojto	158:b23ee177fd68	626	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
Kojto	158:b23ee177fd68	627	DMA_CCR_DIR \| DMA_CCR_MEM2MEM, Direction);
Kojto	158:b23ee177fd68	628	}
Kojto	158:b23ee177fd68	629
Kojto	158:b23ee177fd68	630	/**
Kojto	158:b23ee177fd68	631	* @brief Get Data transfer direction (read from peripheral or from memory).
Kojto	158:b23ee177fd68	632	* @rmtoll CCR DIR LL_DMA_GetDataTransferDirection\n
Kojto	158:b23ee177fd68	633	* CCR MEM2MEM LL_DMA_GetDataTransferDirection
Kojto	158:b23ee177fd68	634	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	635	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	636	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	637	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	638	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	639	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	640	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	641	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	642	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	643	* @retval Returned value can be one of the following values:
Kojto	158:b23ee177fd68	644	* @arg @ref LL_DMA_DIRECTION_PERIPH_TO_MEMORY
Kojto	158:b23ee177fd68	645	* @arg @ref LL_DMA_DIRECTION_MEMORY_TO_PERIPH
Kojto	158:b23ee177fd68	646	* @arg @ref LL_DMA_DIRECTION_MEMORY_TO_MEMORY
Kojto	158:b23ee177fd68	647	*/
Kojto	158:b23ee177fd68	648	__STATIC_INLINE uint32_t LL_DMA_GetDataTransferDirection(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	649	{
Kojto	158:b23ee177fd68	650	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
Kojto	158:b23ee177fd68	651	DMA_CCR_DIR \| DMA_CCR_MEM2MEM));
Kojto	158:b23ee177fd68	652	}
Kojto	158:b23ee177fd68	653
Kojto	158:b23ee177fd68	654	/**
Kojto	158:b23ee177fd68	655	* @brief Set DMA mode circular or normal.
Kojto	158:b23ee177fd68	656	* @note The circular buffer mode cannot be used if the memory-to-memory
Kojto	158:b23ee177fd68	657	* data transfer is configured on the selected Channel.
Kojto	158:b23ee177fd68	658	* @rmtoll CCR CIRC LL_DMA_SetMode
Kojto	158:b23ee177fd68	659	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	660	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	661	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	662	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	663	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	664	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	665	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	666	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	667	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	668	* @param Mode This parameter can be one of the following values:
Kojto	158:b23ee177fd68	669	* @arg @ref LL_DMA_MODE_NORMAL
Kojto	158:b23ee177fd68	670	* @arg @ref LL_DMA_MODE_CIRCULAR
Kojto	158:b23ee177fd68	671	* @retval None
Kojto	158:b23ee177fd68	672	*/
Kojto	158:b23ee177fd68	673	__STATIC_INLINE void LL_DMA_SetMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Mode)
Kojto	158:b23ee177fd68	674	{
Kojto	158:b23ee177fd68	675	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_CIRC,
Kojto	158:b23ee177fd68	676	Mode);
Kojto	158:b23ee177fd68	677	}
Kojto	158:b23ee177fd68	678
Kojto	158:b23ee177fd68	679	/**
Kojto	158:b23ee177fd68	680	* @brief Get DMA mode circular or normal.
Kojto	158:b23ee177fd68	681	* @rmtoll CCR CIRC LL_DMA_GetMode
Kojto	158:b23ee177fd68	682	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	683	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	684	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	685	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	686	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	687	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	688	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	689	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	690	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	691	* @retval Returned value can be one of the following values:
Kojto	158:b23ee177fd68	692	* @arg @ref LL_DMA_MODE_NORMAL
Kojto	158:b23ee177fd68	693	* @arg @ref LL_DMA_MODE_CIRCULAR
Kojto	158:b23ee177fd68	694	*/
Kojto	158:b23ee177fd68	695	__STATIC_INLINE uint32_t LL_DMA_GetMode(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	696	{
Kojto	158:b23ee177fd68	697	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
Kojto	158:b23ee177fd68	698	DMA_CCR_CIRC));
Kojto	158:b23ee177fd68	699	}
Kojto	158:b23ee177fd68	700
Kojto	158:b23ee177fd68	701	/**
Kojto	158:b23ee177fd68	702	* @brief Set Peripheral increment mode.
Kojto	158:b23ee177fd68	703	* @rmtoll CCR PINC LL_DMA_SetPeriphIncMode
Kojto	158:b23ee177fd68	704	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	705	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	706	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	707	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	708	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	709	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	710	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	711	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	712	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	713	* @param PeriphOrM2MSrcIncMode This parameter can be one of the following values:
Kojto	158:b23ee177fd68	714	* @arg @ref LL_DMA_PERIPH_INCREMENT
Kojto	158:b23ee177fd68	715	* @arg @ref LL_DMA_PERIPH_NOINCREMENT
Kojto	158:b23ee177fd68	716	* @retval None
Kojto	158:b23ee177fd68	717	*/
Kojto	158:b23ee177fd68	718	__STATIC_INLINE void LL_DMA_SetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphOrM2MSrcIncMode)
Kojto	158:b23ee177fd68	719	{
Kojto	158:b23ee177fd68	720	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_PINC,
Kojto	158:b23ee177fd68	721	PeriphOrM2MSrcIncMode);
Kojto	158:b23ee177fd68	722	}
Kojto	158:b23ee177fd68	723
Kojto	158:b23ee177fd68	724	/**
Kojto	158:b23ee177fd68	725	* @brief Get Peripheral increment mode.
Kojto	158:b23ee177fd68	726	* @rmtoll CCR PINC LL_DMA_GetPeriphIncMode
Kojto	158:b23ee177fd68	727	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	728	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	729	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	730	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	731	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	732	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	733	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	734	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	735	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	736	* @retval Returned value can be one of the following values:
Kojto	158:b23ee177fd68	737	* @arg @ref LL_DMA_PERIPH_INCREMENT
Kojto	158:b23ee177fd68	738	* @arg @ref LL_DMA_PERIPH_NOINCREMENT
Kojto	158:b23ee177fd68	739	*/
Kojto	158:b23ee177fd68	740	__STATIC_INLINE uint32_t LL_DMA_GetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	741	{
Kojto	158:b23ee177fd68	742	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
Kojto	158:b23ee177fd68	743	DMA_CCR_PINC));
Kojto	158:b23ee177fd68	744	}
Kojto	158:b23ee177fd68	745
Kojto	158:b23ee177fd68	746	/**
Kojto	158:b23ee177fd68	747	* @brief Set Memory increment mode.
Kojto	158:b23ee177fd68	748	* @rmtoll CCR MINC LL_DMA_SetMemoryIncMode
Kojto	158:b23ee177fd68	749	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	750	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	751	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	752	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	753	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	754	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	755	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	756	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	757	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	758	* @param MemoryOrM2MDstIncMode This parameter can be one of the following values:
Kojto	158:b23ee177fd68	759	* @arg @ref LL_DMA_MEMORY_INCREMENT
Kojto	158:b23ee177fd68	760	* @arg @ref LL_DMA_MEMORY_NOINCREMENT
Kojto	158:b23ee177fd68	761	* @retval None
Kojto	158:b23ee177fd68	762	*/
Kojto	158:b23ee177fd68	763	__STATIC_INLINE void LL_DMA_SetMemoryIncMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryOrM2MDstIncMode)
Kojto	158:b23ee177fd68	764	{
Kojto	158:b23ee177fd68	765	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_MINC,
Kojto	158:b23ee177fd68	766	MemoryOrM2MDstIncMode);
Kojto	158:b23ee177fd68	767	}
Kojto	158:b23ee177fd68	768
Kojto	158:b23ee177fd68	769	/**
Kojto	158:b23ee177fd68	770	* @brief Get Memory increment mode.
Kojto	158:b23ee177fd68	771	* @rmtoll CCR MINC LL_DMA_GetMemoryIncMode
Kojto	158:b23ee177fd68	772	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	773	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	774	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	775	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	776	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	777	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	778	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	779	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	780	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	781	* @retval Returned value can be one of the following values:
Kojto	158:b23ee177fd68	782	* @arg @ref LL_DMA_MEMORY_INCREMENT
Kojto	158:b23ee177fd68	783	* @arg @ref LL_DMA_MEMORY_NOINCREMENT
Kojto	158:b23ee177fd68	784	*/
Kojto	158:b23ee177fd68	785	__STATIC_INLINE uint32_t LL_DMA_GetMemoryIncMode(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	786	{
Kojto	158:b23ee177fd68	787	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
Kojto	158:b23ee177fd68	788	DMA_CCR_MINC));
Kojto	158:b23ee177fd68	789	}
Kojto	158:b23ee177fd68	790
Kojto	158:b23ee177fd68	791	/**
Kojto	158:b23ee177fd68	792	* @brief Set Peripheral size.
Kojto	158:b23ee177fd68	793	* @rmtoll CCR PSIZE LL_DMA_SetPeriphSize
Kojto	158:b23ee177fd68	794	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	795	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	796	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	797	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	798	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	799	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	800	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	801	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	802	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	803	* @param PeriphOrM2MSrcDataSize This parameter can be one of the following values:
Kojto	158:b23ee177fd68	804	* @arg @ref LL_DMA_PDATAALIGN_BYTE
Kojto	158:b23ee177fd68	805	* @arg @ref LL_DMA_PDATAALIGN_HALFWORD
Kojto	158:b23ee177fd68	806	* @arg @ref LL_DMA_PDATAALIGN_WORD
Kojto	158:b23ee177fd68	807	* @retval None
Kojto	158:b23ee177fd68	808	*/
Kojto	158:b23ee177fd68	809	__STATIC_INLINE void LL_DMA_SetPeriphSize(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphOrM2MSrcDataSize)
Kojto	158:b23ee177fd68	810	{
Kojto	158:b23ee177fd68	811	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_PSIZE,
Kojto	158:b23ee177fd68	812	PeriphOrM2MSrcDataSize);
Kojto	158:b23ee177fd68	813	}
Kojto	158:b23ee177fd68	814
Kojto	158:b23ee177fd68	815	/**
Kojto	158:b23ee177fd68	816	* @brief Get Peripheral size.
Kojto	158:b23ee177fd68	817	* @rmtoll CCR PSIZE LL_DMA_GetPeriphSize
Kojto	158:b23ee177fd68	818	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	819	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	820	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	821	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	822	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	823	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	824	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	825	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	826	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	827	* @retval Returned value can be one of the following values:
Kojto	158:b23ee177fd68	828	* @arg @ref LL_DMA_PDATAALIGN_BYTE
Kojto	158:b23ee177fd68	829	* @arg @ref LL_DMA_PDATAALIGN_HALFWORD
Kojto	158:b23ee177fd68	830	* @arg @ref LL_DMA_PDATAALIGN_WORD
Kojto	158:b23ee177fd68	831	*/
Kojto	158:b23ee177fd68	832	__STATIC_INLINE uint32_t LL_DMA_GetPeriphSize(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	833	{
Kojto	158:b23ee177fd68	834	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
Kojto	158:b23ee177fd68	835	DMA_CCR_PSIZE));
Kojto	158:b23ee177fd68	836	}
Kojto	158:b23ee177fd68	837
Kojto	158:b23ee177fd68	838	/**
Kojto	158:b23ee177fd68	839	* @brief Set Memory size.
Kojto	158:b23ee177fd68	840	* @rmtoll CCR MSIZE LL_DMA_SetMemorySize
Kojto	158:b23ee177fd68	841	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	842	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	843	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	844	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	845	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	846	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	847	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	848	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	849	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	850	* @param MemoryOrM2MDstDataSize This parameter can be one of the following values:
Kojto	158:b23ee177fd68	851	* @arg @ref LL_DMA_MDATAALIGN_BYTE
Kojto	158:b23ee177fd68	852	* @arg @ref LL_DMA_MDATAALIGN_HALFWORD
Kojto	158:b23ee177fd68	853	* @arg @ref LL_DMA_MDATAALIGN_WORD
Kojto	158:b23ee177fd68	854	* @retval None
Kojto	158:b23ee177fd68	855	*/
Kojto	158:b23ee177fd68	856	__STATIC_INLINE void LL_DMA_SetMemorySize(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryOrM2MDstDataSize)
Kojto	158:b23ee177fd68	857	{
Kojto	158:b23ee177fd68	858	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_MSIZE,
Kojto	158:b23ee177fd68	859	MemoryOrM2MDstDataSize);
Kojto	158:b23ee177fd68	860	}
Kojto	158:b23ee177fd68	861
Kojto	158:b23ee177fd68	862	/**
Kojto	158:b23ee177fd68	863	* @brief Get Memory size.
Kojto	158:b23ee177fd68	864	* @rmtoll CCR MSIZE LL_DMA_GetMemorySize
Kojto	158:b23ee177fd68	865	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	866	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	867	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	868	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	869	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	870	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	871	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	872	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	873	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	874	* @retval Returned value can be one of the following values:
Kojto	158:b23ee177fd68	875	* @arg @ref LL_DMA_MDATAALIGN_BYTE
Kojto	158:b23ee177fd68	876	* @arg @ref LL_DMA_MDATAALIGN_HALFWORD
Kojto	158:b23ee177fd68	877	* @arg @ref LL_DMA_MDATAALIGN_WORD
Kojto	158:b23ee177fd68	878	*/
Kojto	158:b23ee177fd68	879	__STATIC_INLINE uint32_t LL_DMA_GetMemorySize(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	880	{
Kojto	158:b23ee177fd68	881	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
Kojto	158:b23ee177fd68	882	DMA_CCR_MSIZE));
Kojto	158:b23ee177fd68	883	}
Kojto	158:b23ee177fd68	884
Kojto	158:b23ee177fd68	885	/**
Kojto	158:b23ee177fd68	886	* @brief Set Channel priority level.
Kojto	158:b23ee177fd68	887	* @rmtoll CCR PL LL_DMA_SetChannelPriorityLevel
Kojto	158:b23ee177fd68	888	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	889	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	890	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	891	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	892	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	893	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	894	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	895	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	896	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	897	* @param Priority This parameter can be one of the following values:
Kojto	158:b23ee177fd68	898	* @arg @ref LL_DMA_PRIORITY_LOW
Kojto	158:b23ee177fd68	899	* @arg @ref LL_DMA_PRIORITY_MEDIUM
Kojto	158:b23ee177fd68	900	* @arg @ref LL_DMA_PRIORITY_HIGH
Kojto	158:b23ee177fd68	901	* @arg @ref LL_DMA_PRIORITY_VERYHIGH
Kojto	158:b23ee177fd68	902	* @retval None
Kojto	158:b23ee177fd68	903	*/
Kojto	158:b23ee177fd68	904	__STATIC_INLINE void LL_DMA_SetChannelPriorityLevel(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Priority)
Kojto	158:b23ee177fd68	905	{
Kojto	158:b23ee177fd68	906	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_PL,
Kojto	158:b23ee177fd68	907	Priority);
Kojto	158:b23ee177fd68	908	}
Kojto	158:b23ee177fd68	909
Kojto	158:b23ee177fd68	910	/**
Kojto	158:b23ee177fd68	911	* @brief Get Channel priority level.
Kojto	158:b23ee177fd68	912	* @rmtoll CCR PL LL_DMA_GetChannelPriorityLevel
Kojto	158:b23ee177fd68	913	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	914	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	915	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	916	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	917	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	918	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	919	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	920	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	921	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	922	* @retval Returned value can be one of the following values:
Kojto	158:b23ee177fd68	923	* @arg @ref LL_DMA_PRIORITY_LOW
Kojto	158:b23ee177fd68	924	* @arg @ref LL_DMA_PRIORITY_MEDIUM
Kojto	158:b23ee177fd68	925	* @arg @ref LL_DMA_PRIORITY_HIGH
Kojto	158:b23ee177fd68	926	* @arg @ref LL_DMA_PRIORITY_VERYHIGH
Kojto	158:b23ee177fd68	927	*/
Kojto	158:b23ee177fd68	928	__STATIC_INLINE uint32_t LL_DMA_GetChannelPriorityLevel(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	929	{
Kojto	158:b23ee177fd68	930	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
Kojto	158:b23ee177fd68	931	DMA_CCR_PL));
Kojto	158:b23ee177fd68	932	}
Kojto	158:b23ee177fd68	933
Kojto	158:b23ee177fd68	934	/**
Kojto	158:b23ee177fd68	935	* @brief Set Number of data to transfer.
Kojto	158:b23ee177fd68	936	* @note This action has no effect if
Kojto	158:b23ee177fd68	937	* channel is enabled.
Kojto	158:b23ee177fd68	938	* @rmtoll CNDTR NDT LL_DMA_SetDataLength
Kojto	158:b23ee177fd68	939	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	940	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	941	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	942	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	943	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	944	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	945	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	946	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	947	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	948	* @param NbData Between Min_Data = 0 and Max_Data = 0x0000FFFF
Kojto	158:b23ee177fd68	949	* @retval None
Kojto	158:b23ee177fd68	950	*/
Kojto	158:b23ee177fd68	951	__STATIC_INLINE void LL_DMA_SetDataLength(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t NbData)
Kojto	158:b23ee177fd68	952	{
Kojto	158:b23ee177fd68	953	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CNDTR,
Kojto	158:b23ee177fd68	954	DMA_CNDTR_NDT, NbData);
Kojto	158:b23ee177fd68	955	}
Kojto	158:b23ee177fd68	956
Kojto	158:b23ee177fd68	957	/**
Kojto	158:b23ee177fd68	958	* @brief Get Number of data to transfer.
Kojto	158:b23ee177fd68	959	* @note Once the channel is enabled, the return value indicate the
Kojto	158:b23ee177fd68	960	* remaining bytes to be transmitted.
Kojto	158:b23ee177fd68	961	* @rmtoll CNDTR NDT LL_DMA_GetDataLength
Kojto	158:b23ee177fd68	962	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	963	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	964	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	965	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	966	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	967	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	968	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	969	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	970	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	971	* @retval Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
Kojto	158:b23ee177fd68	972	*/
Kojto	158:b23ee177fd68	973	__STATIC_INLINE uint32_t LL_DMA_GetDataLength(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	974	{
Kojto	158:b23ee177fd68	975	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CNDTR,
Kojto	158:b23ee177fd68	976	DMA_CNDTR_NDT));
Kojto	158:b23ee177fd68	977	}
Kojto	158:b23ee177fd68	978
Kojto	158:b23ee177fd68	979	/**
Kojto	158:b23ee177fd68	980	* @brief Configure the Source and Destination addresses.
Kojto	158:b23ee177fd68	981	* @note Each IP using DMA provides an API to get directly the register adress (LL_PPP_DMA_GetRegAddr)
Kojto	158:b23ee177fd68	982	* @rmtoll CPAR PA LL_DMA_ConfigAddresses\n
Kojto	158:b23ee177fd68	983	* CMAR MA LL_DMA_ConfigAddresses
Kojto	158:b23ee177fd68	984	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	985	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	986	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	987	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	988	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	989	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	990	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	991	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	992	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	993	* @param SrcAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
Kojto	158:b23ee177fd68	994	* @param DstAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
Kojto	158:b23ee177fd68	995	* @param Direction This parameter can be one of the following values:
Kojto	158:b23ee177fd68	996	* @arg @ref LL_DMA_DIRECTION_PERIPH_TO_MEMORY
Kojto	158:b23ee177fd68	997	* @arg @ref LL_DMA_DIRECTION_MEMORY_TO_PERIPH
Kojto	158:b23ee177fd68	998	* @arg @ref LL_DMA_DIRECTION_MEMORY_TO_MEMORY
Kojto	158:b23ee177fd68	999	* @retval None
Kojto	158:b23ee177fd68	1000	*/
Kojto	158:b23ee177fd68	1001	__STATIC_INLINE void LL_DMA_ConfigAddresses(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t SrcAddress,
Kojto	158:b23ee177fd68	1002	uint32_t DstAddress, uint32_t Direction)
Kojto	158:b23ee177fd68	1003	{
Kojto	158:b23ee177fd68	1004	/* Direction Memory to Periph */
Kojto	158:b23ee177fd68	1005	if (Direction == LL_DMA_DIRECTION_MEMORY_TO_PERIPH)
Kojto	158:b23ee177fd68	1006	{
Kojto	158:b23ee177fd68	1007	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, DMA_CMAR_MA,
Kojto	158:b23ee177fd68	1008	SrcAddress);
Kojto	158:b23ee177fd68	1009	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CPAR, DMA_CPAR_PA,
Kojto	158:b23ee177fd68	1010	DstAddress);
Kojto	158:b23ee177fd68	1011	}
Kojto	158:b23ee177fd68	1012	/* Direction Periph to Memory and Memory to Memory */
Kojto	158:b23ee177fd68	1013	else
Kojto	158:b23ee177fd68	1014	{
Kojto	158:b23ee177fd68	1015	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CPAR, DMA_CPAR_PA,
Kojto	158:b23ee177fd68	1016	SrcAddress);
Kojto	158:b23ee177fd68	1017	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, DMA_CMAR_MA,
Kojto	158:b23ee177fd68	1018	DstAddress);
Kojto	158:b23ee177fd68	1019	}
Kojto	158:b23ee177fd68	1020	}
Kojto	158:b23ee177fd68	1021
Kojto	158:b23ee177fd68	1022	/**
Kojto	158:b23ee177fd68	1023	* @brief Set the Memory address.
Kojto	158:b23ee177fd68	1024	* @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMORY_TO_PERIPH only.
Kojto	158:b23ee177fd68	1025	* @rmtoll CMAR MA LL_DMA_SetMemoryAddress
Kojto	158:b23ee177fd68	1026	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1027	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1028	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	1029	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	1030	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	1031	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	1032	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	1033	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	1034	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	1035	* @param MemoryAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
Kojto	158:b23ee177fd68	1036	* @retval None
Kojto	158:b23ee177fd68	1037	*/
Kojto	158:b23ee177fd68	1038	__STATIC_INLINE void LL_DMA_SetMemoryAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAddress)
Kojto	158:b23ee177fd68	1039	{
Kojto	158:b23ee177fd68	1040	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, DMA_CMAR_MA,
Kojto	158:b23ee177fd68	1041	MemoryAddress);
Kojto	158:b23ee177fd68	1042	}
Kojto	158:b23ee177fd68	1043
Kojto	158:b23ee177fd68	1044	/**
Kojto	158:b23ee177fd68	1045	* @brief Set the Peripheral address.
Kojto	158:b23ee177fd68	1046	* @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMORY_TO_PERIPH only.
Kojto	158:b23ee177fd68	1047	* @rmtoll CPAR PA LL_DMA_SetPeriphAddress
Kojto	158:b23ee177fd68	1048	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1049	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1050	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	1051	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	1052	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	1053	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	1054	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	1055	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	1056	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	1057	* @param PeriphAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
Kojto	158:b23ee177fd68	1058	* @retval None
Kojto	158:b23ee177fd68	1059	*/
Kojto	158:b23ee177fd68	1060	__STATIC_INLINE void LL_DMA_SetPeriphAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphAddress)
Kojto	158:b23ee177fd68	1061	{
Kojto	158:b23ee177fd68	1062	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CPAR, DMA_CPAR_PA,
Kojto	158:b23ee177fd68	1063	PeriphAddress);
Kojto	158:b23ee177fd68	1064	}
Kojto	158:b23ee177fd68	1065
Kojto	158:b23ee177fd68	1066	/**
Kojto	158:b23ee177fd68	1067	* @brief Get Memory address.
Kojto	158:b23ee177fd68	1068	* @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMORY_TO_PERIPH only.
Kojto	158:b23ee177fd68	1069	* @rmtoll CMAR MA LL_DMA_GetMemoryAddress
Kojto	158:b23ee177fd68	1070	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1071	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1072	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	1073	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	1074	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	1075	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	1076	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	1077	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	1078	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	1079	* @retval Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
Kojto	158:b23ee177fd68	1080	*/
Kojto	158:b23ee177fd68	1081	__STATIC_INLINE uint32_t LL_DMA_GetMemoryAddress(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	1082	{
Kojto	158:b23ee177fd68	1083	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR,
Kojto	158:b23ee177fd68	1084	DMA_CMAR_MA));
Kojto	158:b23ee177fd68	1085	}
Kojto	158:b23ee177fd68	1086
Kojto	158:b23ee177fd68	1087	/**
Kojto	158:b23ee177fd68	1088	* @brief Get Peripheral address.
Kojto	158:b23ee177fd68	1089	* @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMORY_TO_PERIPH only.
Kojto	158:b23ee177fd68	1090	* @rmtoll CPAR PA LL_DMA_GetPeriphAddress
Kojto	158:b23ee177fd68	1091	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1092	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1093	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	1094	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	1095	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	1096	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	1097	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	1098	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	1099	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	1100	* @retval Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
Kojto	158:b23ee177fd68	1101	*/
Kojto	158:b23ee177fd68	1102	__STATIC_INLINE uint32_t LL_DMA_GetPeriphAddress(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	1103	{
Kojto	158:b23ee177fd68	1104	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CPAR,
Kojto	158:b23ee177fd68	1105	DMA_CPAR_PA));
Kojto	158:b23ee177fd68	1106	}
Kojto	158:b23ee177fd68	1107
Kojto	158:b23ee177fd68	1108	/**
Kojto	158:b23ee177fd68	1109	* @brief Set the Memory to Memory Source address.
Kojto	158:b23ee177fd68	1110	* @note Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only.
Kojto	158:b23ee177fd68	1111	* @rmtoll CPAR PA LL_DMA_SetM2MSrcAddress
Kojto	158:b23ee177fd68	1112	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1113	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1114	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	1115	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	1116	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	1117	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	1118	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	1119	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	1120	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	1121	* @param MemoryAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
Kojto	158:b23ee177fd68	1122	* @retval None
Kojto	158:b23ee177fd68	1123	*/
Kojto	158:b23ee177fd68	1124	__STATIC_INLINE void LL_DMA_SetM2MSrcAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAddress)
Kojto	158:b23ee177fd68	1125	{
Kojto	158:b23ee177fd68	1126	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CPAR, DMA_CPAR_PA,
Kojto	158:b23ee177fd68	1127	MemoryAddress);
Kojto	158:b23ee177fd68	1128	}
Kojto	158:b23ee177fd68	1129
Kojto	158:b23ee177fd68	1130	/**
Kojto	158:b23ee177fd68	1131	* @brief Set the Memory to Memory Destination address.
Kojto	158:b23ee177fd68	1132	* @note Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only.
Kojto	158:b23ee177fd68	1133	* @rmtoll CMAR MA LL_DMA_SetM2MDstAddress
Kojto	158:b23ee177fd68	1134	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1135	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1136	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	1137	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	1138	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	1139	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	1140	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	1141	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	1142	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	1143	* @param MemoryAddress Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
Kojto	158:b23ee177fd68	1144	* @retval None
Kojto	158:b23ee177fd68	1145	*/
Kojto	158:b23ee177fd68	1146	__STATIC_INLINE void LL_DMA_SetM2MDstAddress(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t MemoryAddress)
Kojto	158:b23ee177fd68	1147	{
Kojto	158:b23ee177fd68	1148	MODIFY_REG(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR, DMA_CMAR_MA,
Kojto	158:b23ee177fd68	1149	MemoryAddress);
Kojto	158:b23ee177fd68	1150	}
Kojto	158:b23ee177fd68	1151
Kojto	158:b23ee177fd68	1152	/**
Kojto	158:b23ee177fd68	1153	* @brief Get the Memory to Memory Source address.
Kojto	158:b23ee177fd68	1154	* @note Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only.
Kojto	158:b23ee177fd68	1155	* @rmtoll CPAR PA LL_DMA_GetM2MSrcAddress
Kojto	158:b23ee177fd68	1156	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1157	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1158	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	1159	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	1160	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	1161	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	1162	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	1163	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	1164	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	1165	* @retval Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
Kojto	158:b23ee177fd68	1166	*/
Kojto	158:b23ee177fd68	1167	__STATIC_INLINE uint32_t LL_DMA_GetM2MSrcAddress(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	1168	{
Kojto	158:b23ee177fd68	1169	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CPAR,
Kojto	158:b23ee177fd68	1170	DMA_CPAR_PA));
Kojto	158:b23ee177fd68	1171	}
Kojto	158:b23ee177fd68	1172
Kojto	158:b23ee177fd68	1173	/**
Kojto	158:b23ee177fd68	1174	* @brief Get the Memory to Memory Destination address.
Kojto	158:b23ee177fd68	1175	* @note Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only.
Kojto	158:b23ee177fd68	1176	* @rmtoll CMAR MA LL_DMA_GetM2MDstAddress
Kojto	158:b23ee177fd68	1177	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1178	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1179	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	1180	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	1181	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	1182	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	1183	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	1184	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	1185	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	1186	* @retval Between Min_Data = 0 and Max_Data = 0xFFFFFFFF
Kojto	158:b23ee177fd68	1187	*/
Kojto	158:b23ee177fd68	1188	__STATIC_INLINE uint32_t LL_DMA_GetM2MDstAddress(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	1189	{
Kojto	158:b23ee177fd68	1190	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CMAR,
Kojto	158:b23ee177fd68	1191	DMA_CMAR_MA));
Kojto	158:b23ee177fd68	1192	}
Kojto	158:b23ee177fd68	1193
Kojto	158:b23ee177fd68	1194	/**
Kojto	158:b23ee177fd68	1195	* @brief Set DMA request for DMA instance on Channel x.
Kojto	158:b23ee177fd68	1196	* @note Please refer to Reference Manual to get the available mapping of Request value link to Channel Selection.
Kojto	158:b23ee177fd68	1197	* @rmtoll CSELR C1S LL_DMA_SetPeriphRequest\n
Kojto	158:b23ee177fd68	1198	* CSELR C2S LL_DMA_SetPeriphRequest\n
Kojto	158:b23ee177fd68	1199	* CSELR C3S LL_DMA_SetPeriphRequest\n
Kojto	158:b23ee177fd68	1200	* CSELR C4S LL_DMA_SetPeriphRequest\n
Kojto	158:b23ee177fd68	1201	* CSELR C5S LL_DMA_SetPeriphRequest\n
Kojto	158:b23ee177fd68	1202	* CSELR C6S LL_DMA_SetPeriphRequest\n
Kojto	158:b23ee177fd68	1203	* CSELR C7S LL_DMA_SetPeriphRequest
Kojto	158:b23ee177fd68	1204	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1205	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1206	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	1207	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	1208	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	1209	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	1210	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	1211	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	1212	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	1213	* @param PeriphRequest This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1214	* @arg @ref LL_DMA_REQUEST_0
Kojto	158:b23ee177fd68	1215	* @arg @ref LL_DMA_REQUEST_1
Kojto	158:b23ee177fd68	1216	* @arg @ref LL_DMA_REQUEST_2
Kojto	158:b23ee177fd68	1217	* @arg @ref LL_DMA_REQUEST_3
Kojto	158:b23ee177fd68	1218	* @arg @ref LL_DMA_REQUEST_4
Kojto	158:b23ee177fd68	1219	* @arg @ref LL_DMA_REQUEST_5
Kojto	158:b23ee177fd68	1220	* @arg @ref LL_DMA_REQUEST_6
Kojto	158:b23ee177fd68	1221	* @arg @ref LL_DMA_REQUEST_7
Kojto	158:b23ee177fd68	1222	* @arg @ref LL_DMA_REQUEST_8
Kojto	158:b23ee177fd68	1223	* @arg @ref LL_DMA_REQUEST_9
Kojto	158:b23ee177fd68	1224	* @arg @ref LL_DMA_REQUEST_10
Kojto	158:b23ee177fd68	1225	* @arg @ref LL_DMA_REQUEST_11
Kojto	158:b23ee177fd68	1226	* @arg @ref LL_DMA_REQUEST_12
Kojto	158:b23ee177fd68	1227	* @arg @ref LL_DMA_REQUEST_13
Kojto	158:b23ee177fd68	1228	* @arg @ref LL_DMA_REQUEST_14
Kojto	158:b23ee177fd68	1229	* @arg @ref LL_DMA_REQUEST_15
Kojto	158:b23ee177fd68	1230	* @retval None
Kojto	158:b23ee177fd68	1231	*/
Kojto	158:b23ee177fd68	1232	__STATIC_INLINE void LL_DMA_SetPeriphRequest(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t PeriphRequest)
Kojto	158:b23ee177fd68	1233	{
Kojto	158:b23ee177fd68	1234	MODIFY_REG(((DMA_Request_TypeDef *)((uint32_t)((uint32_t)DMAx + DMA_CSELR_OFFSET)))->CSELR,
Kojto	158:b23ee177fd68	1235	DMA_CSELR_C1S << ((Channel - 1U) * 4U), PeriphRequest << DMA_POSITION_CSELR_CXS);
Kojto	158:b23ee177fd68	1236	}
Kojto	158:b23ee177fd68	1237
Kojto	158:b23ee177fd68	1238	/**
Kojto	158:b23ee177fd68	1239	* @brief Get DMA request for DMA instance on Channel x.
Kojto	158:b23ee177fd68	1240	* @rmtoll CSELR C1S LL_DMA_GetPeriphRequest\n
Kojto	158:b23ee177fd68	1241	* CSELR C2S LL_DMA_GetPeriphRequest\n
Kojto	158:b23ee177fd68	1242	* CSELR C3S LL_DMA_GetPeriphRequest\n
Kojto	158:b23ee177fd68	1243	* CSELR C4S LL_DMA_GetPeriphRequest\n
Kojto	158:b23ee177fd68	1244	* CSELR C5S LL_DMA_GetPeriphRequest\n
Kojto	158:b23ee177fd68	1245	* CSELR C6S LL_DMA_GetPeriphRequest\n
Kojto	158:b23ee177fd68	1246	* CSELR C7S LL_DMA_GetPeriphRequest
Kojto	158:b23ee177fd68	1247	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1248	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1249	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	1250	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	1251	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	1252	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	1253	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	1254	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	1255	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	1256	* @retval Returned value can be one of the following values:
Kojto	158:b23ee177fd68	1257	* @arg @ref LL_DMA_REQUEST_0
Kojto	158:b23ee177fd68	1258	* @arg @ref LL_DMA_REQUEST_1
Kojto	158:b23ee177fd68	1259	* @arg @ref LL_DMA_REQUEST_2
Kojto	158:b23ee177fd68	1260	* @arg @ref LL_DMA_REQUEST_3
Kojto	158:b23ee177fd68	1261	* @arg @ref LL_DMA_REQUEST_4
Kojto	158:b23ee177fd68	1262	* @arg @ref LL_DMA_REQUEST_5
Kojto	158:b23ee177fd68	1263	* @arg @ref LL_DMA_REQUEST_6
Kojto	158:b23ee177fd68	1264	* @arg @ref LL_DMA_REQUEST_7
Kojto	158:b23ee177fd68	1265	* @arg @ref LL_DMA_REQUEST_8
Kojto	158:b23ee177fd68	1266	* @arg @ref LL_DMA_REQUEST_9
Kojto	158:b23ee177fd68	1267	* @arg @ref LL_DMA_REQUEST_10
Kojto	158:b23ee177fd68	1268	* @arg @ref LL_DMA_REQUEST_11
Kojto	158:b23ee177fd68	1269	* @arg @ref LL_DMA_REQUEST_12
Kojto	158:b23ee177fd68	1270	* @arg @ref LL_DMA_REQUEST_13
Kojto	158:b23ee177fd68	1271	* @arg @ref LL_DMA_REQUEST_14
Kojto	158:b23ee177fd68	1272	* @arg @ref LL_DMA_REQUEST_15
Kojto	158:b23ee177fd68	1273	*/
Kojto	158:b23ee177fd68	1274	__STATIC_INLINE uint32_t LL_DMA_GetPeriphRequest(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	1275	{
Kojto	158:b23ee177fd68	1276	return (READ_BIT(((DMA_Request_TypeDef *)((uint32_t)((uint32_t)DMAx + DMA_CSELR_OFFSET)))->CSELR,
Kojto	158:b23ee177fd68	1277	DMA_CSELR_C1S << ((Channel - 1U) * 4U)) >> DMA_POSITION_CSELR_CXS);
Kojto	158:b23ee177fd68	1278	}
Kojto	158:b23ee177fd68	1279
Kojto	158:b23ee177fd68	1280	/**
Kojto	158:b23ee177fd68	1281	* @}
Kojto	158:b23ee177fd68	1282	*/
Kojto	158:b23ee177fd68	1283
Kojto	158:b23ee177fd68	1284	/** @defgroup DMA_LL_EF_FLAG_Management FLAG_Management
Kojto	158:b23ee177fd68	1285	* @{
Kojto	158:b23ee177fd68	1286	*/
Kojto	158:b23ee177fd68	1287
Kojto	158:b23ee177fd68	1288	/**
Kojto	158:b23ee177fd68	1289	* @brief Get Channel 1 global interrupt flag.
Kojto	158:b23ee177fd68	1290	* @rmtoll ISR GIF1 LL_DMA_IsActiveFlag_GI1
Kojto	158:b23ee177fd68	1291	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1292	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1293	*/
Kojto	158:b23ee177fd68	1294	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI1(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1295	{
Kojto	158:b23ee177fd68	1296	return (READ_BIT(DMAx->ISR, DMA_ISR_GIF1) == (DMA_ISR_GIF1));
Kojto	158:b23ee177fd68	1297	}
Kojto	158:b23ee177fd68	1298
Kojto	158:b23ee177fd68	1299	/**
Kojto	158:b23ee177fd68	1300	* @brief Get Channel 2 global interrupt flag.
Kojto	158:b23ee177fd68	1301	* @rmtoll ISR GIF2 LL_DMA_IsActiveFlag_GI2
Kojto	158:b23ee177fd68	1302	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1303	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1304	*/
Kojto	158:b23ee177fd68	1305	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI2(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1306	{
Kojto	158:b23ee177fd68	1307	return (READ_BIT(DMAx->ISR, DMA_ISR_GIF2) == (DMA_ISR_GIF2));
Kojto	158:b23ee177fd68	1308	}
Kojto	158:b23ee177fd68	1309
Kojto	158:b23ee177fd68	1310	/**
Kojto	158:b23ee177fd68	1311	* @brief Get Channel 3 global interrupt flag.
Kojto	158:b23ee177fd68	1312	* @rmtoll ISR GIF3 LL_DMA_IsActiveFlag_GI3
Kojto	158:b23ee177fd68	1313	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1314	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1315	*/
Kojto	158:b23ee177fd68	1316	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI3(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1317	{
Kojto	158:b23ee177fd68	1318	return (READ_BIT(DMAx->ISR, DMA_ISR_GIF3) == (DMA_ISR_GIF3));
Kojto	158:b23ee177fd68	1319	}
Kojto	158:b23ee177fd68	1320
Kojto	158:b23ee177fd68	1321	/**
Kojto	158:b23ee177fd68	1322	* @brief Get Channel 4 global interrupt flag.
Kojto	158:b23ee177fd68	1323	* @rmtoll ISR GIF4 LL_DMA_IsActiveFlag_GI4
Kojto	158:b23ee177fd68	1324	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1325	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1326	*/
Kojto	158:b23ee177fd68	1327	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI4(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1328	{
Kojto	158:b23ee177fd68	1329	return (READ_BIT(DMAx->ISR, DMA_ISR_GIF4) == (DMA_ISR_GIF4));
Kojto	158:b23ee177fd68	1330	}
Kojto	158:b23ee177fd68	1331
Kojto	158:b23ee177fd68	1332	/**
Kojto	158:b23ee177fd68	1333	* @brief Get Channel 5 global interrupt flag.
Kojto	158:b23ee177fd68	1334	* @rmtoll ISR GIF5 LL_DMA_IsActiveFlag_GI5
Kojto	158:b23ee177fd68	1335	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1336	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1337	*/
Kojto	158:b23ee177fd68	1338	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI5(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1339	{
Kojto	158:b23ee177fd68	1340	return (READ_BIT(DMAx->ISR, DMA_ISR_GIF5) == (DMA_ISR_GIF5));
Kojto	158:b23ee177fd68	1341	}
Kojto	158:b23ee177fd68	1342
Kojto	158:b23ee177fd68	1343	#if defined(DMA1_Channel6)
Kojto	158:b23ee177fd68	1344	/**
Kojto	158:b23ee177fd68	1345	* @brief Get Channel 6 global interrupt flag.
Kojto	158:b23ee177fd68	1346	* @rmtoll ISR GIF6 LL_DMA_IsActiveFlag_GI6
Kojto	158:b23ee177fd68	1347	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1348	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1349	*/
Kojto	158:b23ee177fd68	1350	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI6(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1351	{
Kojto	158:b23ee177fd68	1352	return (READ_BIT(DMAx->ISR, DMA_ISR_GIF6) == (DMA_ISR_GIF6));
Kojto	158:b23ee177fd68	1353	}
Kojto	158:b23ee177fd68	1354	#endif
Kojto	158:b23ee177fd68	1355
Kojto	158:b23ee177fd68	1356	#if defined(DMA1_Channel7)
Kojto	158:b23ee177fd68	1357	/**
Kojto	158:b23ee177fd68	1358	* @brief Get Channel 7 global interrupt flag.
Kojto	158:b23ee177fd68	1359	* @rmtoll ISR GIF7 LL_DMA_IsActiveFlag_GI7
Kojto	158:b23ee177fd68	1360	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1361	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1362	*/
Kojto	158:b23ee177fd68	1363	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI7(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1364	{
Kojto	158:b23ee177fd68	1365	return (READ_BIT(DMAx->ISR, DMA_ISR_GIF7) == (DMA_ISR_GIF7));
Kojto	158:b23ee177fd68	1366	}
Kojto	158:b23ee177fd68	1367	#endif
Kojto	158:b23ee177fd68	1368
Kojto	158:b23ee177fd68	1369	/**
Kojto	158:b23ee177fd68	1370	* @brief Get Channel 1 transfer complete flag.
Kojto	158:b23ee177fd68	1371	* @rmtoll ISR TCIF1 LL_DMA_IsActiveFlag_TC1
Kojto	158:b23ee177fd68	1372	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1373	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1374	*/
Kojto	158:b23ee177fd68	1375	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC1(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1376	{
Kojto	158:b23ee177fd68	1377	return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF1) == (DMA_ISR_TCIF1));
Kojto	158:b23ee177fd68	1378	}
Kojto	158:b23ee177fd68	1379
Kojto	158:b23ee177fd68	1380	/**
Kojto	158:b23ee177fd68	1381	* @brief Get Channel 2 transfer complete flag.
Kojto	158:b23ee177fd68	1382	* @rmtoll ISR TCIF2 LL_DMA_IsActiveFlag_TC2
Kojto	158:b23ee177fd68	1383	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1384	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1385	*/
Kojto	158:b23ee177fd68	1386	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC2(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1387	{
Kojto	158:b23ee177fd68	1388	return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF2) == (DMA_ISR_TCIF2));
Kojto	158:b23ee177fd68	1389	}
Kojto	158:b23ee177fd68	1390
Kojto	158:b23ee177fd68	1391	/**
Kojto	158:b23ee177fd68	1392	* @brief Get Channel 3 transfer complete flag.
Kojto	158:b23ee177fd68	1393	* @rmtoll ISR TCIF3 LL_DMA_IsActiveFlag_TC3
Kojto	158:b23ee177fd68	1394	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1395	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1396	*/
Kojto	158:b23ee177fd68	1397	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC3(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1398	{
Kojto	158:b23ee177fd68	1399	return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF3) == (DMA_ISR_TCIF3));
Kojto	158:b23ee177fd68	1400	}
Kojto	158:b23ee177fd68	1401
Kojto	158:b23ee177fd68	1402	/**
Kojto	158:b23ee177fd68	1403	* @brief Get Channel 4 transfer complete flag.
Kojto	158:b23ee177fd68	1404	* @rmtoll ISR TCIF4 LL_DMA_IsActiveFlag_TC4
Kojto	158:b23ee177fd68	1405	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1406	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1407	*/
Kojto	158:b23ee177fd68	1408	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC4(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1409	{
Kojto	158:b23ee177fd68	1410	return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF4) == (DMA_ISR_TCIF4));
Kojto	158:b23ee177fd68	1411	}
Kojto	158:b23ee177fd68	1412
Kojto	158:b23ee177fd68	1413	/**
Kojto	158:b23ee177fd68	1414	* @brief Get Channel 5 transfer complete flag.
Kojto	158:b23ee177fd68	1415	* @rmtoll ISR TCIF5 LL_DMA_IsActiveFlag_TC5
Kojto	158:b23ee177fd68	1416	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1417	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1418	*/
Kojto	158:b23ee177fd68	1419	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC5(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1420	{
Kojto	158:b23ee177fd68	1421	return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF5) == (DMA_ISR_TCIF5));
Kojto	158:b23ee177fd68	1422	}
Kojto	158:b23ee177fd68	1423
Kojto	158:b23ee177fd68	1424	#if defined(DMA1_Channel6)
Kojto	158:b23ee177fd68	1425	/**
Kojto	158:b23ee177fd68	1426	* @brief Get Channel 6 transfer complete flag.
Kojto	158:b23ee177fd68	1427	* @rmtoll ISR TCIF6 LL_DMA_IsActiveFlag_TC6
Kojto	158:b23ee177fd68	1428	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1429	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1430	*/
Kojto	158:b23ee177fd68	1431	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC6(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1432	{
Kojto	158:b23ee177fd68	1433	return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF6) == (DMA_ISR_TCIF6));
Kojto	158:b23ee177fd68	1434	}
Kojto	158:b23ee177fd68	1435	#endif
Kojto	158:b23ee177fd68	1436
Kojto	158:b23ee177fd68	1437	#if defined(DMA1_Channel7)
Kojto	158:b23ee177fd68	1438	/**
Kojto	158:b23ee177fd68	1439	* @brief Get Channel 7 transfer complete flag.
Kojto	158:b23ee177fd68	1440	* @rmtoll ISR TCIF7 LL_DMA_IsActiveFlag_TC7
Kojto	158:b23ee177fd68	1441	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1442	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1443	*/
Kojto	158:b23ee177fd68	1444	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC7(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1445	{
Kojto	158:b23ee177fd68	1446	return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF7) == (DMA_ISR_TCIF7));
Kojto	158:b23ee177fd68	1447	}
Kojto	158:b23ee177fd68	1448	#endif
Kojto	158:b23ee177fd68	1449
Kojto	158:b23ee177fd68	1450	/**
Kojto	158:b23ee177fd68	1451	* @brief Get Channel 1 half transfer flag.
Kojto	158:b23ee177fd68	1452	* @rmtoll ISR HTIF1 LL_DMA_IsActiveFlag_HT1
Kojto	158:b23ee177fd68	1453	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1454	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1455	*/
Kojto	158:b23ee177fd68	1456	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT1(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1457	{
Kojto	158:b23ee177fd68	1458	return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF1) == (DMA_ISR_HTIF1));
Kojto	158:b23ee177fd68	1459	}
Kojto	158:b23ee177fd68	1460
Kojto	158:b23ee177fd68	1461	/**
Kojto	158:b23ee177fd68	1462	* @brief Get Channel 2 half transfer flag.
Kojto	158:b23ee177fd68	1463	* @rmtoll ISR HTIF2 LL_DMA_IsActiveFlag_HT2
Kojto	158:b23ee177fd68	1464	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1465	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1466	*/
Kojto	158:b23ee177fd68	1467	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT2(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1468	{
Kojto	158:b23ee177fd68	1469	return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF2) == (DMA_ISR_HTIF2));
Kojto	158:b23ee177fd68	1470	}
Kojto	158:b23ee177fd68	1471
Kojto	158:b23ee177fd68	1472	/**
Kojto	158:b23ee177fd68	1473	* @brief Get Channel 3 half transfer flag.
Kojto	158:b23ee177fd68	1474	* @rmtoll ISR HTIF3 LL_DMA_IsActiveFlag_HT3
Kojto	158:b23ee177fd68	1475	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1476	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1477	*/
Kojto	158:b23ee177fd68	1478	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT3(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1479	{
Kojto	158:b23ee177fd68	1480	return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF3) == (DMA_ISR_HTIF3));
Kojto	158:b23ee177fd68	1481	}
Kojto	158:b23ee177fd68	1482
Kojto	158:b23ee177fd68	1483	/**
Kojto	158:b23ee177fd68	1484	* @brief Get Channel 4 half transfer flag.
Kojto	158:b23ee177fd68	1485	* @rmtoll ISR HTIF4 LL_DMA_IsActiveFlag_HT4
Kojto	158:b23ee177fd68	1486	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1487	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1488	*/
Kojto	158:b23ee177fd68	1489	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT4(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1490	{
Kojto	158:b23ee177fd68	1491	return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF4) == (DMA_ISR_HTIF4));
Kojto	158:b23ee177fd68	1492	}
Kojto	158:b23ee177fd68	1493
Kojto	158:b23ee177fd68	1494	/**
Kojto	158:b23ee177fd68	1495	* @brief Get Channel 5 half transfer flag.
Kojto	158:b23ee177fd68	1496	* @rmtoll ISR HTIF5 LL_DMA_IsActiveFlag_HT5
Kojto	158:b23ee177fd68	1497	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1498	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1499	*/
Kojto	158:b23ee177fd68	1500	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT5(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1501	{
Kojto	158:b23ee177fd68	1502	return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF5) == (DMA_ISR_HTIF5));
Kojto	158:b23ee177fd68	1503	}
Kojto	158:b23ee177fd68	1504
Kojto	158:b23ee177fd68	1505	#if defined(DMA1_Channel6)
Kojto	158:b23ee177fd68	1506	/**
Kojto	158:b23ee177fd68	1507	* @brief Get Channel 6 half transfer flag.
Kojto	158:b23ee177fd68	1508	* @rmtoll ISR HTIF6 LL_DMA_IsActiveFlag_HT6
Kojto	158:b23ee177fd68	1509	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1510	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1511	*/
Kojto	158:b23ee177fd68	1512	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT6(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1513	{
Kojto	158:b23ee177fd68	1514	return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF6) == (DMA_ISR_HTIF6));
Kojto	158:b23ee177fd68	1515	}
Kojto	158:b23ee177fd68	1516	#endif
Kojto	158:b23ee177fd68	1517
Kojto	158:b23ee177fd68	1518	#if defined(DMA1_Channel7)
Kojto	158:b23ee177fd68	1519	/**
Kojto	158:b23ee177fd68	1520	* @brief Get Channel 7 half transfer flag.
Kojto	158:b23ee177fd68	1521	* @rmtoll ISR HTIF7 LL_DMA_IsActiveFlag_HT7
Kojto	158:b23ee177fd68	1522	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1523	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1524	*/
Kojto	158:b23ee177fd68	1525	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT7(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1526	{
Kojto	158:b23ee177fd68	1527	return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF7) == (DMA_ISR_HTIF7));
Kojto	158:b23ee177fd68	1528	}
Kojto	158:b23ee177fd68	1529	#endif
Kojto	158:b23ee177fd68	1530
Kojto	158:b23ee177fd68	1531	/**
Kojto	158:b23ee177fd68	1532	* @brief Get Channel 1 transfer error flag.
Kojto	158:b23ee177fd68	1533	* @rmtoll ISR TEIF1 LL_DMA_IsActiveFlag_TE1
Kojto	158:b23ee177fd68	1534	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1535	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1536	*/
Kojto	158:b23ee177fd68	1537	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE1(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1538	{
Kojto	158:b23ee177fd68	1539	return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF1) == (DMA_ISR_TEIF1));
Kojto	158:b23ee177fd68	1540	}
Kojto	158:b23ee177fd68	1541
Kojto	158:b23ee177fd68	1542	/**
Kojto	158:b23ee177fd68	1543	* @brief Get Channel 2 transfer error flag.
Kojto	158:b23ee177fd68	1544	* @rmtoll ISR TEIF2 LL_DMA_IsActiveFlag_TE2
Kojto	158:b23ee177fd68	1545	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1546	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1547	*/
Kojto	158:b23ee177fd68	1548	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE2(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1549	{
Kojto	158:b23ee177fd68	1550	return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF2) == (DMA_ISR_TEIF2));
Kojto	158:b23ee177fd68	1551	}
Kojto	158:b23ee177fd68	1552
Kojto	158:b23ee177fd68	1553	/**
Kojto	158:b23ee177fd68	1554	* @brief Get Channel 3 transfer error flag.
Kojto	158:b23ee177fd68	1555	* @rmtoll ISR TEIF3 LL_DMA_IsActiveFlag_TE3
Kojto	158:b23ee177fd68	1556	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1557	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1558	*/
Kojto	158:b23ee177fd68	1559	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE3(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1560	{
Kojto	158:b23ee177fd68	1561	return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF3) == (DMA_ISR_TEIF3));
Kojto	158:b23ee177fd68	1562	}
Kojto	158:b23ee177fd68	1563
Kojto	158:b23ee177fd68	1564	/**
Kojto	158:b23ee177fd68	1565	* @brief Get Channel 4 transfer error flag.
Kojto	158:b23ee177fd68	1566	* @rmtoll ISR TEIF4 LL_DMA_IsActiveFlag_TE4
Kojto	158:b23ee177fd68	1567	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1568	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1569	*/
Kojto	158:b23ee177fd68	1570	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE4(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1571	{
Kojto	158:b23ee177fd68	1572	return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF4) == (DMA_ISR_TEIF4));
Kojto	158:b23ee177fd68	1573	}
Kojto	158:b23ee177fd68	1574
Kojto	158:b23ee177fd68	1575	/**
Kojto	158:b23ee177fd68	1576	* @brief Get Channel 5 transfer error flag.
Kojto	158:b23ee177fd68	1577	* @rmtoll ISR TEIF5 LL_DMA_IsActiveFlag_TE5
Kojto	158:b23ee177fd68	1578	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1579	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1580	*/
Kojto	158:b23ee177fd68	1581	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE5(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1582	{
Kojto	158:b23ee177fd68	1583	return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF5) == (DMA_ISR_TEIF5));
Kojto	158:b23ee177fd68	1584	}
Kojto	158:b23ee177fd68	1585
Kojto	158:b23ee177fd68	1586	#if defined(DMA1_Channel6)
Kojto	158:b23ee177fd68	1587	/**
Kojto	158:b23ee177fd68	1588	* @brief Get Channel 6 transfer error flag.
Kojto	158:b23ee177fd68	1589	* @rmtoll ISR TEIF6 LL_DMA_IsActiveFlag_TE6
Kojto	158:b23ee177fd68	1590	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1591	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1592	*/
Kojto	158:b23ee177fd68	1593	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE6(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1594	{
Kojto	158:b23ee177fd68	1595	return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF6) == (DMA_ISR_TEIF6));
Kojto	158:b23ee177fd68	1596	}
Kojto	158:b23ee177fd68	1597	#endif
Kojto	158:b23ee177fd68	1598
Kojto	158:b23ee177fd68	1599	#if defined(DMA1_Channel7)
Kojto	158:b23ee177fd68	1600	/**
Kojto	158:b23ee177fd68	1601	* @brief Get Channel 7 transfer error flag.
Kojto	158:b23ee177fd68	1602	* @rmtoll ISR TEIF7 LL_DMA_IsActiveFlag_TE7
Kojto	158:b23ee177fd68	1603	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1604	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	1605	*/
Kojto	158:b23ee177fd68	1606	__STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE7(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1607	{
Kojto	158:b23ee177fd68	1608	return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF7) == (DMA_ISR_TEIF7));
Kojto	158:b23ee177fd68	1609	}
Kojto	158:b23ee177fd68	1610	#endif
Kojto	158:b23ee177fd68	1611
Kojto	158:b23ee177fd68	1612	/**
Kojto	158:b23ee177fd68	1613	* @brief Clear Channel 1 global interrupt flag.
Kojto	158:b23ee177fd68	1614	* @rmtoll IFCR CGIF1 LL_DMA_ClearFlag_GI1
Kojto	158:b23ee177fd68	1615	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1616	* @retval None
Kojto	158:b23ee177fd68	1617	*/
Kojto	158:b23ee177fd68	1618	__STATIC_INLINE void LL_DMA_ClearFlag_GI1(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1619	{
Kojto	158:b23ee177fd68	1620	SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF1);
Kojto	158:b23ee177fd68	1621	}
Kojto	158:b23ee177fd68	1622
Kojto	158:b23ee177fd68	1623	/**
Kojto	158:b23ee177fd68	1624	* @brief Clear Channel 2 global interrupt flag.
Kojto	158:b23ee177fd68	1625	* @rmtoll IFCR CGIF2 LL_DMA_ClearFlag_GI2
Kojto	158:b23ee177fd68	1626	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1627	* @retval None
Kojto	158:b23ee177fd68	1628	*/
Kojto	158:b23ee177fd68	1629	__STATIC_INLINE void LL_DMA_ClearFlag_GI2(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1630	{
Kojto	158:b23ee177fd68	1631	SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF2);
Kojto	158:b23ee177fd68	1632	}
Kojto	158:b23ee177fd68	1633
Kojto	158:b23ee177fd68	1634	/**
Kojto	158:b23ee177fd68	1635	* @brief Clear Channel 3 global interrupt flag.
Kojto	158:b23ee177fd68	1636	* @rmtoll IFCR CGIF3 LL_DMA_ClearFlag_GI3
Kojto	158:b23ee177fd68	1637	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1638	* @retval None
Kojto	158:b23ee177fd68	1639	*/
Kojto	158:b23ee177fd68	1640	__STATIC_INLINE void LL_DMA_ClearFlag_GI3(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1641	{
Kojto	158:b23ee177fd68	1642	SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF3);
Kojto	158:b23ee177fd68	1643	}
Kojto	158:b23ee177fd68	1644
Kojto	158:b23ee177fd68	1645	/**
Kojto	158:b23ee177fd68	1646	* @brief Clear Channel 4 global interrupt flag.
Kojto	158:b23ee177fd68	1647	* @rmtoll IFCR CGIF4 LL_DMA_ClearFlag_GI4
Kojto	158:b23ee177fd68	1648	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1649	* @retval None
Kojto	158:b23ee177fd68	1650	*/
Kojto	158:b23ee177fd68	1651	__STATIC_INLINE void LL_DMA_ClearFlag_GI4(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1652	{
Kojto	158:b23ee177fd68	1653	SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF4);
Kojto	158:b23ee177fd68	1654	}
Kojto	158:b23ee177fd68	1655
Kojto	158:b23ee177fd68	1656	/**
Kojto	158:b23ee177fd68	1657	* @brief Clear Channel 5 global interrupt flag.
Kojto	158:b23ee177fd68	1658	* @rmtoll IFCR CGIF5 LL_DMA_ClearFlag_GI5
Kojto	158:b23ee177fd68	1659	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1660	* @retval None
Kojto	158:b23ee177fd68	1661	*/
Kojto	158:b23ee177fd68	1662	__STATIC_INLINE void LL_DMA_ClearFlag_GI5(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1663	{
Kojto	158:b23ee177fd68	1664	SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF5);
Kojto	158:b23ee177fd68	1665	}
Kojto	158:b23ee177fd68	1666
Kojto	158:b23ee177fd68	1667	#if defined(DMA1_Channel6)
Kojto	158:b23ee177fd68	1668	/**
Kojto	158:b23ee177fd68	1669	* @brief Clear Channel 6 global interrupt flag.
Kojto	158:b23ee177fd68	1670	* @rmtoll IFCR CGIF6 LL_DMA_ClearFlag_GI6
Kojto	158:b23ee177fd68	1671	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1672	* @retval None
Kojto	158:b23ee177fd68	1673	*/
Kojto	158:b23ee177fd68	1674	__STATIC_INLINE void LL_DMA_ClearFlag_GI6(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1675	{
Kojto	158:b23ee177fd68	1676	SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF6);
Kojto	158:b23ee177fd68	1677	}
Kojto	158:b23ee177fd68	1678	#endif
Kojto	158:b23ee177fd68	1679
Kojto	158:b23ee177fd68	1680	#if defined(DMA1_Channel7)
Kojto	158:b23ee177fd68	1681	/**
Kojto	158:b23ee177fd68	1682	* @brief Clear Channel 7 global interrupt flag.
Kojto	158:b23ee177fd68	1683	* @rmtoll IFCR CGIF7 LL_DMA_ClearFlag_GI7
Kojto	158:b23ee177fd68	1684	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1685	* @retval None
Kojto	158:b23ee177fd68	1686	*/
Kojto	158:b23ee177fd68	1687	__STATIC_INLINE void LL_DMA_ClearFlag_GI7(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1688	{
Kojto	158:b23ee177fd68	1689	SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF7);
Kojto	158:b23ee177fd68	1690	}
Kojto	158:b23ee177fd68	1691	#endif
Kojto	158:b23ee177fd68	1692
Kojto	158:b23ee177fd68	1693	/**
Kojto	158:b23ee177fd68	1694	* @brief Clear Channel 1 transfer complete flag.
Kojto	158:b23ee177fd68	1695	* @rmtoll IFCR CTCIF1 LL_DMA_ClearFlag_TC1
Kojto	158:b23ee177fd68	1696	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1697	* @retval None
Kojto	158:b23ee177fd68	1698	*/
Kojto	158:b23ee177fd68	1699	__STATIC_INLINE void LL_DMA_ClearFlag_TC1(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1700	{
Kojto	158:b23ee177fd68	1701	SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF1);
Kojto	158:b23ee177fd68	1702	}
Kojto	158:b23ee177fd68	1703
Kojto	158:b23ee177fd68	1704	/**
Kojto	158:b23ee177fd68	1705	* @brief Clear Channel 2 transfer complete flag.
Kojto	158:b23ee177fd68	1706	* @rmtoll IFCR CTCIF2 LL_DMA_ClearFlag_TC2
Kojto	158:b23ee177fd68	1707	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1708	* @retval None
Kojto	158:b23ee177fd68	1709	*/
Kojto	158:b23ee177fd68	1710	__STATIC_INLINE void LL_DMA_ClearFlag_TC2(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1711	{
Kojto	158:b23ee177fd68	1712	SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF2);
Kojto	158:b23ee177fd68	1713	}
Kojto	158:b23ee177fd68	1714
Kojto	158:b23ee177fd68	1715	/**
Kojto	158:b23ee177fd68	1716	* @brief Clear Channel 3 transfer complete flag.
Kojto	158:b23ee177fd68	1717	* @rmtoll IFCR CTCIF3 LL_DMA_ClearFlag_TC3
Kojto	158:b23ee177fd68	1718	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1719	* @retval None
Kojto	158:b23ee177fd68	1720	*/
Kojto	158:b23ee177fd68	1721	__STATIC_INLINE void LL_DMA_ClearFlag_TC3(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1722	{
Kojto	158:b23ee177fd68	1723	SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF3);
Kojto	158:b23ee177fd68	1724	}
Kojto	158:b23ee177fd68	1725
Kojto	158:b23ee177fd68	1726	/**
Kojto	158:b23ee177fd68	1727	* @brief Clear Channel 4 transfer complete flag.
Kojto	158:b23ee177fd68	1728	* @rmtoll IFCR CTCIF4 LL_DMA_ClearFlag_TC4
Kojto	158:b23ee177fd68	1729	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1730	* @retval None
Kojto	158:b23ee177fd68	1731	*/
Kojto	158:b23ee177fd68	1732	__STATIC_INLINE void LL_DMA_ClearFlag_TC4(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1733	{
Kojto	158:b23ee177fd68	1734	SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF4);
Kojto	158:b23ee177fd68	1735	}
Kojto	158:b23ee177fd68	1736
Kojto	158:b23ee177fd68	1737	/**
Kojto	158:b23ee177fd68	1738	* @brief Clear Channel 5 transfer complete flag.
Kojto	158:b23ee177fd68	1739	* @rmtoll IFCR CTCIF5 LL_DMA_ClearFlag_TC5
Kojto	158:b23ee177fd68	1740	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1741	* @retval None
Kojto	158:b23ee177fd68	1742	*/
Kojto	158:b23ee177fd68	1743	__STATIC_INLINE void LL_DMA_ClearFlag_TC5(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1744	{
Kojto	158:b23ee177fd68	1745	SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF5);
Kojto	158:b23ee177fd68	1746	}
Kojto	158:b23ee177fd68	1747
Kojto	158:b23ee177fd68	1748	#if defined(DMA1_Channel6)
Kojto	158:b23ee177fd68	1749	/**
Kojto	158:b23ee177fd68	1750	* @brief Clear Channel 6 transfer complete flag.
Kojto	158:b23ee177fd68	1751	* @rmtoll IFCR CTCIF6 LL_DMA_ClearFlag_TC6
Kojto	158:b23ee177fd68	1752	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1753	* @retval None
Kojto	158:b23ee177fd68	1754	*/
Kojto	158:b23ee177fd68	1755	__STATIC_INLINE void LL_DMA_ClearFlag_TC6(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1756	{
Kojto	158:b23ee177fd68	1757	SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF6);
Kojto	158:b23ee177fd68	1758	}
Kojto	158:b23ee177fd68	1759	#endif
Kojto	158:b23ee177fd68	1760
Kojto	158:b23ee177fd68	1761	#if defined(DMA1_Channel7)
Kojto	158:b23ee177fd68	1762	/**
Kojto	158:b23ee177fd68	1763	* @brief Clear Channel 7 transfer complete flag.
Kojto	158:b23ee177fd68	1764	* @rmtoll IFCR CTCIF7 LL_DMA_ClearFlag_TC7
Kojto	158:b23ee177fd68	1765	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1766	* @retval None
Kojto	158:b23ee177fd68	1767	*/
Kojto	158:b23ee177fd68	1768	__STATIC_INLINE void LL_DMA_ClearFlag_TC7(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1769	{
Kojto	158:b23ee177fd68	1770	SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF7);
Kojto	158:b23ee177fd68	1771	}
Kojto	158:b23ee177fd68	1772	#endif
Kojto	158:b23ee177fd68	1773
Kojto	158:b23ee177fd68	1774	/**
Kojto	158:b23ee177fd68	1775	* @brief Clear Channel 1 half transfer flag.
Kojto	158:b23ee177fd68	1776	* @rmtoll IFCR CHTIF1 LL_DMA_ClearFlag_HT1
Kojto	158:b23ee177fd68	1777	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1778	* @retval None
Kojto	158:b23ee177fd68	1779	*/
Kojto	158:b23ee177fd68	1780	__STATIC_INLINE void LL_DMA_ClearFlag_HT1(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1781	{
Kojto	158:b23ee177fd68	1782	SET_BIT(DMAx->IFCR, DMA_IFCR_CHTIF1);
Kojto	158:b23ee177fd68	1783	}
Kojto	158:b23ee177fd68	1784
Kojto	158:b23ee177fd68	1785	/**
Kojto	158:b23ee177fd68	1786	* @brief Clear Channel 2 half transfer flag.
Kojto	158:b23ee177fd68	1787	* @rmtoll IFCR CHTIF2 LL_DMA_ClearFlag_HT2
Kojto	158:b23ee177fd68	1788	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1789	* @retval None
Kojto	158:b23ee177fd68	1790	*/
Kojto	158:b23ee177fd68	1791	__STATIC_INLINE void LL_DMA_ClearFlag_HT2(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1792	{
Kojto	158:b23ee177fd68	1793	SET_BIT(DMAx->IFCR, DMA_IFCR_CHTIF2);
Kojto	158:b23ee177fd68	1794	}
Kojto	158:b23ee177fd68	1795
Kojto	158:b23ee177fd68	1796	/**
Kojto	158:b23ee177fd68	1797	* @brief Clear Channel 3 half transfer flag.
Kojto	158:b23ee177fd68	1798	* @rmtoll IFCR CHTIF3 LL_DMA_ClearFlag_HT3
Kojto	158:b23ee177fd68	1799	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1800	* @retval None
Kojto	158:b23ee177fd68	1801	*/
Kojto	158:b23ee177fd68	1802	__STATIC_INLINE void LL_DMA_ClearFlag_HT3(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1803	{
Kojto	158:b23ee177fd68	1804	SET_BIT(DMAx->IFCR, DMA_IFCR_CHTIF3);
Kojto	158:b23ee177fd68	1805	}
Kojto	158:b23ee177fd68	1806
Kojto	158:b23ee177fd68	1807	/**
Kojto	158:b23ee177fd68	1808	* @brief Clear Channel 4 half transfer flag.
Kojto	158:b23ee177fd68	1809	* @rmtoll IFCR CHTIF4 LL_DMA_ClearFlag_HT4
Kojto	158:b23ee177fd68	1810	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1811	* @retval None
Kojto	158:b23ee177fd68	1812	*/
Kojto	158:b23ee177fd68	1813	__STATIC_INLINE void LL_DMA_ClearFlag_HT4(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1814	{
Kojto	158:b23ee177fd68	1815	SET_BIT(DMAx->IFCR, DMA_IFCR_CHTIF4);
Kojto	158:b23ee177fd68	1816	}
Kojto	158:b23ee177fd68	1817
Kojto	158:b23ee177fd68	1818	/**
Kojto	158:b23ee177fd68	1819	* @brief Clear Channel 5 half transfer flag.
Kojto	158:b23ee177fd68	1820	* @rmtoll IFCR CHTIF5 LL_DMA_ClearFlag_HT5
Kojto	158:b23ee177fd68	1821	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1822	* @retval None
Kojto	158:b23ee177fd68	1823	*/
Kojto	158:b23ee177fd68	1824	__STATIC_INLINE void LL_DMA_ClearFlag_HT5(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1825	{
Kojto	158:b23ee177fd68	1826	SET_BIT(DMAx->IFCR, DMA_IFCR_CHTIF5);
Kojto	158:b23ee177fd68	1827	}
Kojto	158:b23ee177fd68	1828
Kojto	158:b23ee177fd68	1829	#if defined(DMA1_Channel6)
Kojto	158:b23ee177fd68	1830	/**
Kojto	158:b23ee177fd68	1831	* @brief Clear Channel 6 half transfer flag.
Kojto	158:b23ee177fd68	1832	* @rmtoll IFCR CHTIF6 LL_DMA_ClearFlag_HT6
Kojto	158:b23ee177fd68	1833	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1834	* @retval None
Kojto	158:b23ee177fd68	1835	*/
Kojto	158:b23ee177fd68	1836	__STATIC_INLINE void LL_DMA_ClearFlag_HT6(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1837	{
Kojto	158:b23ee177fd68	1838	SET_BIT(DMAx->IFCR, DMA_IFCR_CHTIF6);
Kojto	158:b23ee177fd68	1839	}
Kojto	158:b23ee177fd68	1840	#endif
Kojto	158:b23ee177fd68	1841
Kojto	158:b23ee177fd68	1842	#if defined(DMA1_Channel7)
Kojto	158:b23ee177fd68	1843	/**
Kojto	158:b23ee177fd68	1844	* @brief Clear Channel 7 half transfer flag.
Kojto	158:b23ee177fd68	1845	* @rmtoll IFCR CHTIF7 LL_DMA_ClearFlag_HT7
Kojto	158:b23ee177fd68	1846	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1847	* @retval None
Kojto	158:b23ee177fd68	1848	*/
Kojto	158:b23ee177fd68	1849	__STATIC_INLINE void LL_DMA_ClearFlag_HT7(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1850	{
Kojto	158:b23ee177fd68	1851	SET_BIT(DMAx->IFCR, DMA_IFCR_CHTIF7);
Kojto	158:b23ee177fd68	1852	}
Kojto	158:b23ee177fd68	1853	#endif
Kojto	158:b23ee177fd68	1854
Kojto	158:b23ee177fd68	1855	/**
Kojto	158:b23ee177fd68	1856	* @brief Clear Channel 1 transfer error flag.
Kojto	158:b23ee177fd68	1857	* @rmtoll IFCR CTEIF1 LL_DMA_ClearFlag_TE1
Kojto	158:b23ee177fd68	1858	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1859	* @retval None
Kojto	158:b23ee177fd68	1860	*/
Kojto	158:b23ee177fd68	1861	__STATIC_INLINE void LL_DMA_ClearFlag_TE1(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1862	{
Kojto	158:b23ee177fd68	1863	SET_BIT(DMAx->IFCR, DMA_IFCR_CTEIF1);
Kojto	158:b23ee177fd68	1864	}
Kojto	158:b23ee177fd68	1865
Kojto	158:b23ee177fd68	1866	/**
Kojto	158:b23ee177fd68	1867	* @brief Clear Channel 2 transfer error flag.
Kojto	158:b23ee177fd68	1868	* @rmtoll IFCR CTEIF2 LL_DMA_ClearFlag_TE2
Kojto	158:b23ee177fd68	1869	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1870	* @retval None
Kojto	158:b23ee177fd68	1871	*/
Kojto	158:b23ee177fd68	1872	__STATIC_INLINE void LL_DMA_ClearFlag_TE2(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1873	{
Kojto	158:b23ee177fd68	1874	SET_BIT(DMAx->IFCR, DMA_IFCR_CTEIF2);
Kojto	158:b23ee177fd68	1875	}
Kojto	158:b23ee177fd68	1876
Kojto	158:b23ee177fd68	1877	/**
Kojto	158:b23ee177fd68	1878	* @brief Clear Channel 3 transfer error flag.
Kojto	158:b23ee177fd68	1879	* @rmtoll IFCR CTEIF3 LL_DMA_ClearFlag_TE3
Kojto	158:b23ee177fd68	1880	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1881	* @retval None
Kojto	158:b23ee177fd68	1882	*/
Kojto	158:b23ee177fd68	1883	__STATIC_INLINE void LL_DMA_ClearFlag_TE3(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1884	{
Kojto	158:b23ee177fd68	1885	SET_BIT(DMAx->IFCR, DMA_IFCR_CTEIF3);
Kojto	158:b23ee177fd68	1886	}
Kojto	158:b23ee177fd68	1887
Kojto	158:b23ee177fd68	1888	/**
Kojto	158:b23ee177fd68	1889	* @brief Clear Channel 4 transfer error flag.
Kojto	158:b23ee177fd68	1890	* @rmtoll IFCR CTEIF4 LL_DMA_ClearFlag_TE4
Kojto	158:b23ee177fd68	1891	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1892	* @retval None
Kojto	158:b23ee177fd68	1893	*/
Kojto	158:b23ee177fd68	1894	__STATIC_INLINE void LL_DMA_ClearFlag_TE4(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1895	{
Kojto	158:b23ee177fd68	1896	SET_BIT(DMAx->IFCR, DMA_IFCR_CTEIF4);
Kojto	158:b23ee177fd68	1897	}
Kojto	158:b23ee177fd68	1898
Kojto	158:b23ee177fd68	1899	/**
Kojto	158:b23ee177fd68	1900	* @brief Clear Channel 5 transfer error flag.
Kojto	158:b23ee177fd68	1901	* @rmtoll IFCR CTEIF5 LL_DMA_ClearFlag_TE5
Kojto	158:b23ee177fd68	1902	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1903	* @retval None
Kojto	158:b23ee177fd68	1904	*/
Kojto	158:b23ee177fd68	1905	__STATIC_INLINE void LL_DMA_ClearFlag_TE5(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1906	{
Kojto	158:b23ee177fd68	1907	SET_BIT(DMAx->IFCR, DMA_IFCR_CTEIF5);
Kojto	158:b23ee177fd68	1908	}
Kojto	158:b23ee177fd68	1909
Kojto	158:b23ee177fd68	1910	#if defined(DMA1_Channel6)
Kojto	158:b23ee177fd68	1911	/**
Kojto	158:b23ee177fd68	1912	* @brief Clear Channel 6 transfer error flag.
Kojto	158:b23ee177fd68	1913	* @rmtoll IFCR CTEIF6 LL_DMA_ClearFlag_TE6
Kojto	158:b23ee177fd68	1914	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1915	* @retval None
Kojto	158:b23ee177fd68	1916	*/
Kojto	158:b23ee177fd68	1917	__STATIC_INLINE void LL_DMA_ClearFlag_TE6(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1918	{
Kojto	158:b23ee177fd68	1919	SET_BIT(DMAx->IFCR, DMA_IFCR_CTEIF6);
Kojto	158:b23ee177fd68	1920	}
Kojto	158:b23ee177fd68	1921	#endif
Kojto	158:b23ee177fd68	1922
Kojto	158:b23ee177fd68	1923	#if defined(DMA1_Channel7)
Kojto	158:b23ee177fd68	1924	/**
Kojto	158:b23ee177fd68	1925	* @brief Clear Channel 7 transfer error flag.
Kojto	158:b23ee177fd68	1926	* @rmtoll IFCR CTEIF7 LL_DMA_ClearFlag_TE7
Kojto	158:b23ee177fd68	1927	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1928	* @retval None
Kojto	158:b23ee177fd68	1929	*/
Kojto	158:b23ee177fd68	1930	__STATIC_INLINE void LL_DMA_ClearFlag_TE7(DMA_TypeDef *DMAx)
Kojto	158:b23ee177fd68	1931	{
Kojto	158:b23ee177fd68	1932	SET_BIT(DMAx->IFCR, DMA_IFCR_CTEIF7);
Kojto	158:b23ee177fd68	1933	}
Kojto	158:b23ee177fd68	1934	#endif
Kojto	158:b23ee177fd68	1935
Kojto	158:b23ee177fd68	1936	/**
Kojto	158:b23ee177fd68	1937	* @}
Kojto	158:b23ee177fd68	1938	*/
Kojto	158:b23ee177fd68	1939
Kojto	158:b23ee177fd68	1940	/** @defgroup DMA_LL_EF_IT_Management IT_Management
Kojto	158:b23ee177fd68	1941	* @{
Kojto	158:b23ee177fd68	1942	*/
Kojto	158:b23ee177fd68	1943	/**
Kojto	158:b23ee177fd68	1944	* @brief Enable Transfer complete interrupt.
Kojto	158:b23ee177fd68	1945	* @rmtoll CCR TCIE LL_DMA_EnableIT_TC
Kojto	158:b23ee177fd68	1946	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1947	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1948	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	1949	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	1950	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	1951	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	1952	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	1953	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	1954	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	1955	* @retval None
Kojto	158:b23ee177fd68	1956	*/
Kojto	158:b23ee177fd68	1957	__STATIC_INLINE void LL_DMA_EnableIT_TC(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	1958	{
Kojto	158:b23ee177fd68	1959	SET_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_TCIE);
Kojto	158:b23ee177fd68	1960	}
Kojto	158:b23ee177fd68	1961
Kojto	158:b23ee177fd68	1962	/**
Kojto	158:b23ee177fd68	1963	* @brief Enable Half transfer interrupt.
Kojto	158:b23ee177fd68	1964	* @rmtoll CCR HTIE LL_DMA_EnableIT_HT
Kojto	158:b23ee177fd68	1965	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1966	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1967	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	1968	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	1969	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	1970	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	1971	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	1972	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	1973	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	1974	* @retval None
Kojto	158:b23ee177fd68	1975	*/
Kojto	158:b23ee177fd68	1976	__STATIC_INLINE void LL_DMA_EnableIT_HT(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	1977	{
Kojto	158:b23ee177fd68	1978	SET_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_HTIE);
Kojto	158:b23ee177fd68	1979	}
Kojto	158:b23ee177fd68	1980
Kojto	158:b23ee177fd68	1981	/**
Kojto	158:b23ee177fd68	1982	* @brief Enable Transfer error interrupt.
Kojto	158:b23ee177fd68	1983	* @rmtoll CCR TEIE LL_DMA_EnableIT_TE
Kojto	158:b23ee177fd68	1984	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	1985	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	1986	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	1987	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	1988	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	1989	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	1990	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	1991	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	1992	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	1993	* @retval None
Kojto	158:b23ee177fd68	1994	*/
Kojto	158:b23ee177fd68	1995	__STATIC_INLINE void LL_DMA_EnableIT_TE(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	1996	{
Kojto	158:b23ee177fd68	1997	SET_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_TEIE);
Kojto	158:b23ee177fd68	1998	}
Kojto	158:b23ee177fd68	1999
Kojto	158:b23ee177fd68	2000	/**
Kojto	158:b23ee177fd68	2001	* @brief Disable Transfer complete interrupt.
Kojto	158:b23ee177fd68	2002	* @rmtoll CCR TCIE LL_DMA_DisableIT_TC
Kojto	158:b23ee177fd68	2003	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	2004	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	2005	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	2006	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	2007	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	2008	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	2009	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	2010	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	2011	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	2012	* @retval None
Kojto	158:b23ee177fd68	2013	*/
Kojto	158:b23ee177fd68	2014	__STATIC_INLINE void LL_DMA_DisableIT_TC(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	2015	{
Kojto	158:b23ee177fd68	2016	CLEAR_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_TCIE);
Kojto	158:b23ee177fd68	2017	}
Kojto	158:b23ee177fd68	2018
Kojto	158:b23ee177fd68	2019	/**
Kojto	158:b23ee177fd68	2020	* @brief Disable Half transfer interrupt.
Kojto	158:b23ee177fd68	2021	* @rmtoll CCR HTIE LL_DMA_DisableIT_HT
Kojto	158:b23ee177fd68	2022	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	2023	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	2024	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	2025	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	2026	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	2027	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	2028	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	2029	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	2030	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	2031	* @retval None
Kojto	158:b23ee177fd68	2032	*/
Kojto	158:b23ee177fd68	2033	__STATIC_INLINE void LL_DMA_DisableIT_HT(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	2034	{
Kojto	158:b23ee177fd68	2035	CLEAR_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_HTIE);
Kojto	158:b23ee177fd68	2036	}
Kojto	158:b23ee177fd68	2037
Kojto	158:b23ee177fd68	2038	/**
Kojto	158:b23ee177fd68	2039	* @brief Disable Transfer error interrupt.
Kojto	158:b23ee177fd68	2040	* @rmtoll CCR TEIE LL_DMA_DisableIT_TE
Kojto	158:b23ee177fd68	2041	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	2042	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	2043	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	2044	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	2045	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	2046	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	2047	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	2048	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	2049	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	2050	* @retval None
Kojto	158:b23ee177fd68	2051	*/
Kojto	158:b23ee177fd68	2052	__STATIC_INLINE void LL_DMA_DisableIT_TE(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	2053	{
Kojto	158:b23ee177fd68	2054	CLEAR_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR, DMA_CCR_TEIE);
Kojto	158:b23ee177fd68	2055	}
Kojto	158:b23ee177fd68	2056
Kojto	158:b23ee177fd68	2057	/**
Kojto	158:b23ee177fd68	2058	* @brief Check if Transfer complete Interrupt is enabled.
Kojto	158:b23ee177fd68	2059	* @rmtoll CCR TCIE LL_DMA_IsEnabledIT_TC
Kojto	158:b23ee177fd68	2060	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	2061	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	2062	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	2063	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	2064	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	2065	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	2066	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	2067	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	2068	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	2069	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	2070	*/
Kojto	158:b23ee177fd68	2071	__STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_TC(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	2072	{
Kojto	158:b23ee177fd68	2073	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
Kojto	158:b23ee177fd68	2074	DMA_CCR_TCIE) == (DMA_CCR_TCIE));
Kojto	158:b23ee177fd68	2075	}
Kojto	158:b23ee177fd68	2076
Kojto	158:b23ee177fd68	2077	/**
Kojto	158:b23ee177fd68	2078	* @brief Check if Half transfer Interrupt is enabled.
Kojto	158:b23ee177fd68	2079	* @rmtoll CCR HTIE LL_DMA_IsEnabledIT_HT
Kojto	158:b23ee177fd68	2080	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	2081	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	2082	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	2083	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	2084	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	2085	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	2086	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	2087	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	2088	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	2089	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	2090	*/
Kojto	158:b23ee177fd68	2091	__STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_HT(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	2092	{
Kojto	158:b23ee177fd68	2093	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
Kojto	158:b23ee177fd68	2094	DMA_CCR_HTIE) == (DMA_CCR_HTIE));
Kojto	158:b23ee177fd68	2095	}
Kojto	158:b23ee177fd68	2096
Kojto	158:b23ee177fd68	2097	/**
Kojto	158:b23ee177fd68	2098	* @brief Check if Transfer error Interrupt is enabled.
Kojto	158:b23ee177fd68	2099	* @rmtoll CCR TEIE LL_DMA_IsEnabledIT_TE
Kojto	158:b23ee177fd68	2100	* @param DMAx DMAx Instance
Kojto	158:b23ee177fd68	2101	* @param Channel This parameter can be one of the following values:
Kojto	158:b23ee177fd68	2102	* @arg @ref LL_DMA_CHANNEL_1
Kojto	158:b23ee177fd68	2103	* @arg @ref LL_DMA_CHANNEL_2
Kojto	158:b23ee177fd68	2104	* @arg @ref LL_DMA_CHANNEL_3
Kojto	158:b23ee177fd68	2105	* @arg @ref LL_DMA_CHANNEL_4
Kojto	158:b23ee177fd68	2106	* @arg @ref LL_DMA_CHANNEL_5
Kojto	158:b23ee177fd68	2107	* @arg @ref LL_DMA_CHANNEL_6
Kojto	158:b23ee177fd68	2108	* @arg @ref LL_DMA_CHANNEL_7
Kojto	158:b23ee177fd68	2109	* @retval State of bit (1 or 0).
Kojto	158:b23ee177fd68	2110	*/
Kojto	158:b23ee177fd68	2111	__STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_TE(DMA_TypeDef *DMAx, uint32_t Channel)
Kojto	158:b23ee177fd68	2112	{
Kojto	158:b23ee177fd68	2113	return (READ_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1U])))->CCR,
Kojto	158:b23ee177fd68	2114	DMA_CCR_TEIE) == (DMA_CCR_TEIE));
Kojto	158:b23ee177fd68	2115	}
Kojto	158:b23ee177fd68	2116
Kojto	158:b23ee177fd68	2117	/**
Kojto	158:b23ee177fd68	2118	* @}
Kojto	158:b23ee177fd68	2119	*/
Kojto	158:b23ee177fd68	2120
Kojto	158:b23ee177fd68	2121	#if defined(USE_FULL_LL_DRIVER)
Kojto	158:b23ee177fd68	2122	/** @defgroup DMA_LL_EF_Init Initialization and de-initialization functions
Kojto	158:b23ee177fd68	2123	* @{
Kojto	158:b23ee177fd68	2124	*/
Kojto	158:b23ee177fd68	2125
Kojto	158:b23ee177fd68	2126	uint32_t LL_DMA_Init(DMA_TypeDef DMAx, uint32_t Channel, LL_DMA_InitTypeDef DMA_InitStruct);
Kojto	158:b23ee177fd68	2127	uint32_t LL_DMA_DeInit(DMA_TypeDef *DMAx, uint32_t Channel);
Kojto	158:b23ee177fd68	2128	void LL_DMA_StructInit(LL_DMA_InitTypeDef *DMA_InitStruct);
Kojto	158:b23ee177fd68	2129
Kojto	158:b23ee177fd68	2130	/**
Kojto	158:b23ee177fd68	2131	* @}
Kojto	158:b23ee177fd68	2132	*/
Kojto	158:b23ee177fd68	2133	#endif /* USE_FULL_LL_DRIVER */
Kojto	158:b23ee177fd68	2134
Kojto	158:b23ee177fd68	2135	/**
Kojto	158:b23ee177fd68	2136	* @}
Kojto	158:b23ee177fd68	2137	*/
Kojto	158:b23ee177fd68	2138
Kojto	158:b23ee177fd68	2139	/**
Kojto	158:b23ee177fd68	2140	* @}
Kojto	158:b23ee177fd68	2141	*/
Kojto	158:b23ee177fd68	2142
Kojto	158:b23ee177fd68	2143	#endif /* DMA1 */
Kojto	158:b23ee177fd68	2144
Kojto	158:b23ee177fd68	2145	/**
Kojto	158:b23ee177fd68	2146	* @}
Kojto	158:b23ee177fd68	2147	*/
Kojto	158:b23ee177fd68	2148
Kojto	158:b23ee177fd68	2149	#ifdef __cplusplus
Kojto	158:b23ee177fd68	2150	}
Kojto	158:b23ee177fd68	2151	#endif
Kojto	158:b23ee177fd68	2152
Kojto	158:b23ee177fd68	2153	#endif /* __STM32L0xx_LL_DMA_H */
Kojto	158:b23ee177fd68	2154
Kojto	158:b23ee177fd68	2155	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	15 Dec 2017
Imports:	11
Forks:	0
Commits:	183
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