This library creates the interface to operate the TLC5940. This device manages 16 PWM outputs.
tlc5940.cpp@2:500ec33cd4b6, 2010-11-27 (annotated)
- Committer:
- Fiuba
- Date:
- Sat Nov 27 00:50:01 2010 +0000
- Revision:
- 2:500ec33cd4b6
- Parent:
- 1:e8c8347fa919
The number of ICs is defined by the constructor.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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Fiuba | 1:e8c8347fa919 | 1 | /* |
Fiuba | 1:e8c8347fa919 | 2 | * tlc5940 - Interface to operate TI's IC TLC5940 |
Fiuba | 1:e8c8347fa919 | 3 | * Copyright (C) 2010 German Bassi. |
Fiuba | 1:e8c8347fa919 | 4 | * |
Fiuba | 1:e8c8347fa919 | 5 | * This program is free software; you can redistribute it and/or modify |
Fiuba | 1:e8c8347fa919 | 6 | * it under the terms of the GNU General Public License as published by |
Fiuba | 1:e8c8347fa919 | 7 | * the Free Software Foundation; either version 2 of the License, or |
Fiuba | 1:e8c8347fa919 | 8 | * (at your option) any later version. |
Fiuba | 1:e8c8347fa919 | 9 | * |
Fiuba | 1:e8c8347fa919 | 10 | * This program is distributed in the hope that it will be useful, |
Fiuba | 1:e8c8347fa919 | 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
Fiuba | 1:e8c8347fa919 | 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
Fiuba | 1:e8c8347fa919 | 13 | * GNU General Public License for more details. |
Fiuba | 1:e8c8347fa919 | 14 | * |
Fiuba | 1:e8c8347fa919 | 15 | * You should have received a copy of the GNU General Public License |
Fiuba | 1:e8c8347fa919 | 16 | * along with this program; if not, write to the Free Software |
Fiuba | 1:e8c8347fa919 | 17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
Fiuba | 1:e8c8347fa919 | 18 | */ |
Fiuba | 1:e8c8347fa919 | 19 | |
Fiuba | 0:64ea4d75027c | 20 | #include "tlc5940.h" |
Fiuba | 0:64ea4d75027c | 21 | #include "mbed.h" |
Fiuba | 0:64ea4d75027c | 22 | |
Fiuba | 2:500ec33cd4b6 | 23 | tlc5940::tlc5940 (int num_ics, int DC_data[]) : |
Fiuba | 2:500ec33cd4b6 | 24 | num_ic(num_ics), VPROG(p21), SIN(p22), SCLK(p23), XLAT(p24), |
Fiuba | 2:500ec33cd4b6 | 25 | BLANK(p25), DCPROG(p27), GSCLK(p26), SOUT(p28), XERR(p29) { |
Fiuba | 0:64ea4d75027c | 26 | first_cycle_flag = false; |
Fiuba | 0:64ea4d75027c | 27 | |
Fiuba | 0:64ea4d75027c | 28 | // Pins in startup state |
Fiuba | 0:64ea4d75027c | 29 | GSCLK = 0; |
Fiuba | 0:64ea4d75027c | 30 | SCLK = 0; |
Fiuba | 0:64ea4d75027c | 31 | VPROG = 1; |
Fiuba | 0:64ea4d75027c | 32 | XLAT = 0; |
Fiuba | 0:64ea4d75027c | 33 | BLANK = 1; |
Fiuba | 0:64ea4d75027c | 34 | DCPROG = 0; |
Fiuba | 0:64ea4d75027c | 35 | wait(0.01); |
Fiuba | 0:64ea4d75027c | 36 | |
Fiuba | 0:64ea4d75027c | 37 | // DC input cycle starts |
Fiuba | 0:64ea4d75027c | 38 | DCPROG = 1; |
Fiuba | 0:64ea4d75027c | 39 | VPROG = 1; |
Fiuba | 0:64ea4d75027c | 40 | |
Fiuba | 2:500ec33cd4b6 | 41 | for (int counter=0; counter < (num_ic*96); counter++) { |
Fiuba | 0:64ea4d75027c | 42 | SIN = DC_data[counter]; |
Fiuba | 0:64ea4d75027c | 43 | SCLK = 1; |
Fiuba | 0:64ea4d75027c | 44 | wait_us(5); |
Fiuba | 0:64ea4d75027c | 45 | SCLK = 0; |
Fiuba | 0:64ea4d75027c | 46 | wait_us(5); |
Fiuba | 0:64ea4d75027c | 47 | } |
Fiuba | 0:64ea4d75027c | 48 | XLAT = 1; |
Fiuba | 0:64ea4d75027c | 49 | wait_us(5); |
Fiuba | 0:64ea4d75027c | 50 | XLAT = 0; |
Fiuba | 0:64ea4d75027c | 51 | wait_us(5); |
Fiuba | 0:64ea4d75027c | 52 | DCPROG = 0; |
Fiuba | 0:64ea4d75027c | 53 | // DC input cycle ends |
Fiuba | 0:64ea4d75027c | 54 | } |
Fiuba | 0:64ea4d75027c | 55 | |
Fiuba | 0:64ea4d75027c | 56 | void tlc5940::send_data (int data[]) { |
Fiuba | 0:64ea4d75027c | 57 | // Grayscale data input + Grayscale PWM |
Fiuba | 0:64ea4d75027c | 58 | data_counter = 0; |
Fiuba | 0:64ea4d75027c | 59 | GSCLK_counter = 0; |
Fiuba | 0:64ea4d75027c | 60 | |
Fiuba | 0:64ea4d75027c | 61 | if (VPROG == 1) { |
Fiuba | 0:64ea4d75027c | 62 | VPROG = 0; |
Fiuba | 0:64ea4d75027c | 63 | first_cycle_flag = true; |
Fiuba | 0:64ea4d75027c | 64 | } |
Fiuba | 0:64ea4d75027c | 65 | |
Fiuba | 0:64ea4d75027c | 66 | // Send the new data |
Fiuba | 0:64ea4d75027c | 67 | BLANK = 0; |
Fiuba | 0:64ea4d75027c | 68 | for (GSCLK_counter = 0; GSCLK_counter <= 4095; GSCLK_counter++) { |
Fiuba | 2:500ec33cd4b6 | 69 | if (data_counter < num_ic*192) { |
Fiuba | 0:64ea4d75027c | 70 | // Every new led consists of 12 bits |
Fiuba | 0:64ea4d75027c | 71 | aux_ind = data_counter % 12; |
Fiuba | 0:64ea4d75027c | 72 | if ( aux_ind == 0 ) aux_value = data[data_counter/12]; |
Fiuba | 0:64ea4d75027c | 73 | // Send the last bit |
Fiuba | 0:64ea4d75027c | 74 | SIN = (aux_value >> aux_ind) & 0x01; |
Fiuba | 0:64ea4d75027c | 75 | |
Fiuba | 0:64ea4d75027c | 76 | SCLK = 1; |
Fiuba | 0:64ea4d75027c | 77 | GSCLK = 1; |
Fiuba | 0:64ea4d75027c | 78 | SCLK = 0; |
Fiuba | 0:64ea4d75027c | 79 | GSCLK = 0; |
Fiuba | 0:64ea4d75027c | 80 | |
Fiuba | 0:64ea4d75027c | 81 | data_counter++; |
Fiuba | 0:64ea4d75027c | 82 | } else { |
Fiuba | 0:64ea4d75027c | 83 | GSCLK = 1; |
Fiuba | 0:64ea4d75027c | 84 | GSCLK = 0; |
Fiuba | 0:64ea4d75027c | 85 | } |
Fiuba | 0:64ea4d75027c | 86 | } |
Fiuba | 0:64ea4d75027c | 87 | BLANK = 1; |
Fiuba | 0:64ea4d75027c | 88 | |
Fiuba | 0:64ea4d75027c | 89 | XLAT = 1; |
Fiuba | 0:64ea4d75027c | 90 | XLAT = 0; |
Fiuba | 0:64ea4d75027c | 91 | |
Fiuba | 0:64ea4d75027c | 92 | if (first_cycle_flag) { |
Fiuba | 0:64ea4d75027c | 93 | SCLK = 1; |
Fiuba | 0:64ea4d75027c | 94 | SCLK = 0; |
Fiuba | 0:64ea4d75027c | 95 | first_cycle_flag = false; |
Fiuba | 0:64ea4d75027c | 96 | } |
Fiuba | 0:64ea4d75027c | 97 | } |