this library has few changes from the original library, for effects of this work.

Dependents:   OBC3_1_h

Committer:
FannyCalle
Date:
Mon May 21 15:10:37 2018 +0000
Revision:
0:8214896432e0
el sd hay que revisar;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
FannyCalle 0:8214896432e0 1 /* mbed Microcontroller Library
FannyCalle 0:8214896432e0 2 * Copyright (c) 2006-2012 ARM Limited
FannyCalle 0:8214896432e0 3 *
FannyCalle 0:8214896432e0 4 * Permission is hereby granted, free of charge, to any person obtaining a copy
FannyCalle 0:8214896432e0 5 * of this software and associated documentation files (the "Software"), to deal
FannyCalle 0:8214896432e0 6 * in the Software without restriction, including without limitation the rights
FannyCalle 0:8214896432e0 7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
FannyCalle 0:8214896432e0 8 * copies of the Software, and to permit persons to whom the Software is
FannyCalle 0:8214896432e0 9 * furnished to do so, subject to the following conditions:
FannyCalle 0:8214896432e0 10 *
FannyCalle 0:8214896432e0 11 * The above copyright notice and this permission notice shall be included in
FannyCalle 0:8214896432e0 12 * all copies or substantial portions of the Software.
FannyCalle 0:8214896432e0 13 *
FannyCalle 0:8214896432e0 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
FannyCalle 0:8214896432e0 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
FannyCalle 0:8214896432e0 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
FannyCalle 0:8214896432e0 17 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
FannyCalle 0:8214896432e0 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
FannyCalle 0:8214896432e0 19 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
FannyCalle 0:8214896432e0 20 * SOFTWARE.
FannyCalle 0:8214896432e0 21 */
FannyCalle 0:8214896432e0 22 /* Introduction
FannyCalle 0:8214896432e0 23 * ------------
FannyCalle 0:8214896432e0 24 * SD and MMC cards support a number of interfaces, but common to them all
FannyCalle 0:8214896432e0 25 * is one based on SPI. This is the one I'm implmenting because it means
FannyCalle 0:8214896432e0 26 * it is much more portable even though not so performant, and we already
FannyCalle 0:8214896432e0 27 * have the mbed SPI Interface!
FannyCalle 0:8214896432e0 28 *
FannyCalle 0:8214896432e0 29 * The main reference I'm using is Chapter 7, "SPI Mode" of:
FannyCalle 0:8214896432e0 30 * http://www.sdcard.org/developers/tech/sdcard/pls/Simplified_Physical_Layer_Spec.pdf
FannyCalle 0:8214896432e0 31 *
FannyCalle 0:8214896432e0 32 * SPI Startup
FannyCalle 0:8214896432e0 33 * -----------
FannyCalle 0:8214896432e0 34 * The SD card powers up in SD mode. The SPI interface mode is selected by
FannyCalle 0:8214896432e0 35 * asserting CS low and sending the reset command (CMD0). The card will
FannyCalle 0:8214896432e0 36 * respond with a (R1) response.
FannyCalle 0:8214896432e0 37 *
FannyCalle 0:8214896432e0 38 * CMD8 is optionally sent to determine the voltage range supported, and
FannyCalle 0:8214896432e0 39 * indirectly determine whether it is a version 1.x SD/non-SD card or
FannyCalle 0:8214896432e0 40 * version 2.x. I'll just ignore this for now.
FannyCalle 0:8214896432e0 41 *
FannyCalle 0:8214896432e0 42 * ACMD41 is repeatedly issued to initialise the card, until "in idle"
FannyCalle 0:8214896432e0 43 * (bit 0) of the R1 response goes to '0', indicating it is initialised.
FannyCalle 0:8214896432e0 44 *
FannyCalle 0:8214896432e0 45 * You should also indicate whether the host supports High Capicity cards,
FannyCalle 0:8214896432e0 46 * and check whether the card is high capacity - i'll also ignore this
FannyCalle 0:8214896432e0 47 *
FannyCalle 0:8214896432e0 48 * SPI Protocol
FannyCalle 0:8214896432e0 49 * ------------
FannyCalle 0:8214896432e0 50 * The SD SPI protocol is based on transactions made up of 8-bit words, with
FannyCalle 0:8214896432e0 51 * the host starting every bus transaction by asserting the CS signal low. The
FannyCalle 0:8214896432e0 52 * card always responds to commands, data blocks and errors.
FannyCalle 0:8214896432e0 53 *
FannyCalle 0:8214896432e0 54 * The protocol supports a CRC, but by default it is off (except for the
FannyCalle 0:8214896432e0 55 * first reset CMD0, where the CRC can just be pre-calculated, and CMD8)
FannyCalle 0:8214896432e0 56 * I'll leave the CRC off I think!
FannyCalle 0:8214896432e0 57 *
FannyCalle 0:8214896432e0 58 * Standard capacity cards have variable data block sizes, whereas High
FannyCalle 0:8214896432e0 59 * Capacity cards fix the size of data block to 512 bytes. I'll therefore
FannyCalle 0:8214896432e0 60 * just always use the Standard Capacity cards with a block size of 512 bytes.
FannyCalle 0:8214896432e0 61 * This is set with CMD16.
FannyCalle 0:8214896432e0 62 *
FannyCalle 0:8214896432e0 63 * You can read and write single blocks (CMD17, CMD25) or multiple blocks
FannyCalle 0:8214896432e0 64 * (CMD18, CMD25). For simplicity, I'll just use single block accesses. When
FannyCalle 0:8214896432e0 65 * the card gets a read command, it responds with a response token, and then
FannyCalle 0:8214896432e0 66 * a data token or an error.
FannyCalle 0:8214896432e0 67 *
FannyCalle 0:8214896432e0 68 * SPI Command Format
FannyCalle 0:8214896432e0 69 * ------------------
FannyCalle 0:8214896432e0 70 * Commands are 6-bytes long, containing the command, 32-bit argument, and CRC.
FannyCalle 0:8214896432e0 71 *
FannyCalle 0:8214896432e0 72 * +---------------+------------+------------+-----------+----------+--------------+
FannyCalle 0:8214896432e0 73 * | 01 | cmd[5:0] | arg[31:24] | arg[23:16] | arg[15:8] | arg[7:0] | crc[6:0] | 1 |
FannyCalle 0:8214896432e0 74 * +---------------+------------+------------+-----------+----------+--------------+
FannyCalle 0:8214896432e0 75 *
FannyCalle 0:8214896432e0 76 * As I'm not using CRC, I can fix that byte to what is needed for CMD0 (0x95)
FannyCalle 0:8214896432e0 77 *
FannyCalle 0:8214896432e0 78 * All Application Specific commands shall be preceded with APP_CMD (CMD55).
FannyCalle 0:8214896432e0 79 *
FannyCalle 0:8214896432e0 80 * SPI Response Format
FannyCalle 0:8214896432e0 81 * -------------------
FannyCalle 0:8214896432e0 82 * The main response format (R1) is a status byte (normally zero). Key flags:
FannyCalle 0:8214896432e0 83 * idle - 1 if the card is in an idle state/initialising
FannyCalle 0:8214896432e0 84 * cmd - 1 if an illegal command code was detected
FannyCalle 0:8214896432e0 85 *
FannyCalle 0:8214896432e0 86 * +-------------------------------------------------+
FannyCalle 0:8214896432e0 87 * R1 | 0 | arg | addr | seq | crc | cmd | erase | idle |
FannyCalle 0:8214896432e0 88 * +-------------------------------------------------+
FannyCalle 0:8214896432e0 89 *
FannyCalle 0:8214896432e0 90 * R1b is the same, except it is followed by a busy signal (zeros) until
FannyCalle 0:8214896432e0 91 * the first non-zero byte when it is ready again.
FannyCalle 0:8214896432e0 92 *
FannyCalle 0:8214896432e0 93 * Data Response Token
FannyCalle 0:8214896432e0 94 * -------------------
FannyCalle 0:8214896432e0 95 * Every data block written to the card is acknowledged by a byte
FannyCalle 0:8214896432e0 96 * response token
FannyCalle 0:8214896432e0 97 *
FannyCalle 0:8214896432e0 98 * +----------------------+
FannyCalle 0:8214896432e0 99 * | xxx | 0 | status | 1 |
FannyCalle 0:8214896432e0 100 * +----------------------+
FannyCalle 0:8214896432e0 101 * 010 - OK!
FannyCalle 0:8214896432e0 102 * 101 - CRC Error
FannyCalle 0:8214896432e0 103 * 110 - Write Error
FannyCalle 0:8214896432e0 104 *
FannyCalle 0:8214896432e0 105 * Single Block Read and Write
FannyCalle 0:8214896432e0 106 * ---------------------------
FannyCalle 0:8214896432e0 107 *
FannyCalle 0:8214896432e0 108 * Block transfers have a byte header, followed by the data, followed
FannyCalle 0:8214896432e0 109 * by a 16-bit CRC. In our case, the data will always be 512 bytes.
FannyCalle 0:8214896432e0 110 *
FannyCalle 0:8214896432e0 111 * +------+---------+---------+- - - -+---------+-----------+----------+
FannyCalle 0:8214896432e0 112 * | 0xFE | data[0] | data[1] | | data[n] | crc[15:8] | crc[7:0] |
FannyCalle 0:8214896432e0 113 * +------+---------+---------+- - - -+---------+-----------+----------+
FannyCalle 0:8214896432e0 114 */
FannyCalle 0:8214896432e0 115 #include "SDFileSystem.h"
FannyCalle 0:8214896432e0 116 #include "mbed_debug.h"
FannyCalle 0:8214896432e0 117
FannyCalle 0:8214896432e0 118 #define SD_COMMAND_TIMEOUT 5000
FannyCalle 0:8214896432e0 119
FannyCalle 0:8214896432e0 120 #define SD_DBG 0
FannyCalle 0:8214896432e0 121
FannyCalle 0:8214896432e0 122 SDFileSystem::SDFileSystem(PinName mosi, PinName miso, PinName sclk, PinName cs, const char* name) :
FannyCalle 0:8214896432e0 123 FATFileSystem(name), _spi(mosi, miso, sclk), _cs(cs), _is_initialized(0) {
FannyCalle 0:8214896432e0 124 _cs = 1;
FannyCalle 0:8214896432e0 125
FannyCalle 0:8214896432e0 126 // Set default to 100kHz for initialisation and 1MHz for data transfer
FannyCalle 0:8214896432e0 127 //_init_sck = 100000;
FannyCalle 0:8214896432e0 128 //_init_sck = 312500;
FannyCalle 0:8214896432e0 129 _init_sck = 400000;
FannyCalle 0:8214896432e0 130 _transfer_sck = 1000000;
FannyCalle 0:8214896432e0 131 }
FannyCalle 0:8214896432e0 132
FannyCalle 0:8214896432e0 133 #define R1_IDLE_STATE (1 << 0)
FannyCalle 0:8214896432e0 134 #define R1_ERASE_RESET (1 << 1)
FannyCalle 0:8214896432e0 135 #define R1_ILLEGAL_COMMAND (1 << 2)
FannyCalle 0:8214896432e0 136 #define R1_COM_CRC_ERROR (1 << 3)
FannyCalle 0:8214896432e0 137 #define R1_ERASE_SEQUENCE_ERROR (1 << 4)
FannyCalle 0:8214896432e0 138 #define R1_ADDRESS_ERROR (1 << 5)
FannyCalle 0:8214896432e0 139 #define R1_PARAMETER_ERROR (1 << 6)
FannyCalle 0:8214896432e0 140
FannyCalle 0:8214896432e0 141 // Types
FannyCalle 0:8214896432e0 142 // - v1.x Standard Capacity
FannyCalle 0:8214896432e0 143 // - v2.x Standard Capacity
FannyCalle 0:8214896432e0 144 // - v2.x High Capacity
FannyCalle 0:8214896432e0 145 // - Not recognised as an SD Card
FannyCalle 0:8214896432e0 146 #define SDCARD_FAIL 0
FannyCalle 0:8214896432e0 147 #define SDCARD_V1 1
FannyCalle 0:8214896432e0 148 #define SDCARD_V2 2
FannyCalle 0:8214896432e0 149 #define SDCARD_V2HC 3
FannyCalle 0:8214896432e0 150
FannyCalle 0:8214896432e0 151 int SDFileSystem::initialise_card() {
FannyCalle 0:8214896432e0 152 // Set to SCK for initialisation, and clock card with cs = 1
FannyCalle 0:8214896432e0 153 _spi.frequency(_init_sck);
FannyCalle 0:8214896432e0 154 _cs = 1;
FannyCalle 0:8214896432e0 155 for (int i = 0; i < 16; i++) {
FannyCalle 0:8214896432e0 156 _spi.write(0xFF);
FannyCalle 0:8214896432e0 157 }
FannyCalle 0:8214896432e0 158
FannyCalle 0:8214896432e0 159 // send CMD0, should return with all zeros except IDLE STATE set (bit 0)
FannyCalle 0:8214896432e0 160 if (_cmd(0, 0) != R1_IDLE_STATE) {
FannyCalle 0:8214896432e0 161 debug("No disk, or could not put SD card in to SPI idle state\n");
FannyCalle 0:8214896432e0 162 return SDCARD_FAIL;
FannyCalle 0:8214896432e0 163 }
FannyCalle 0:8214896432e0 164
FannyCalle 0:8214896432e0 165 // send CMD8 to determine whther it is ver 2.x
FannyCalle 0:8214896432e0 166 int r = _cmd8();
FannyCalle 0:8214896432e0 167 if (r == R1_IDLE_STATE) {
FannyCalle 0:8214896432e0 168 return initialise_card_v2();
FannyCalle 0:8214896432e0 169 } else if (r == (R1_IDLE_STATE | R1_ILLEGAL_COMMAND)) {
FannyCalle 0:8214896432e0 170 return initialise_card_v1();
FannyCalle 0:8214896432e0 171 } else {
FannyCalle 0:8214896432e0 172 debug("Not in idle state after sending CMD8 (not an SD card?)\n");
FannyCalle 0:8214896432e0 173 return SDCARD_FAIL;
FannyCalle 0:8214896432e0 174 }
FannyCalle 0:8214896432e0 175 }
FannyCalle 0:8214896432e0 176
FannyCalle 0:8214896432e0 177 int SDFileSystem::initialise_card_v1() {
FannyCalle 0:8214896432e0 178 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
FannyCalle 0:8214896432e0 179 _cmd(55, 0);
FannyCalle 0:8214896432e0 180 if (_cmd(41, 0) == 0) {
FannyCalle 0:8214896432e0 181 cdv = 512;
FannyCalle 0:8214896432e0 182 debug_if(SD_DBG, "\n\rInit: SEDCARD_V1\n\r");
FannyCalle 0:8214896432e0 183 return SDCARD_V1;
FannyCalle 0:8214896432e0 184 }
FannyCalle 0:8214896432e0 185 }
FannyCalle 0:8214896432e0 186
FannyCalle 0:8214896432e0 187 debug("Timeout waiting for v1.x card\n");
FannyCalle 0:8214896432e0 188 return SDCARD_FAIL;
FannyCalle 0:8214896432e0 189 }
FannyCalle 0:8214896432e0 190
FannyCalle 0:8214896432e0 191 int SDFileSystem::initialise_card_v2() {
FannyCalle 0:8214896432e0 192 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
FannyCalle 0:8214896432e0 193 //wait_ms(50);
FannyCalle 0:8214896432e0 194 _cmd58();
FannyCalle 0:8214896432e0 195 _cmd(55, 0);
FannyCalle 0:8214896432e0 196 if (_cmd(41, 0x40000000) == 0) {
FannyCalle 0:8214896432e0 197 _cmd58();
FannyCalle 0:8214896432e0 198 debug_if(SD_DBG, "\n\rInit: SDCARD_V2\n\r");
FannyCalle 0:8214896432e0 199 cdv = 1;
FannyCalle 0:8214896432e0 200 return SDCARD_V2;
FannyCalle 0:8214896432e0 201 }
FannyCalle 0:8214896432e0 202 }
FannyCalle 0:8214896432e0 203
FannyCalle 0:8214896432e0 204 debug("Timeout waiting for v2.x card\n");
FannyCalle 0:8214896432e0 205 return SDCARD_FAIL;
FannyCalle 0:8214896432e0 206 }
FannyCalle 0:8214896432e0 207
FannyCalle 0:8214896432e0 208 int SDFileSystem::disk_initialize() {
FannyCalle 0:8214896432e0 209 _is_initialized = initialise_card();
FannyCalle 0:8214896432e0 210 if (_is_initialized == 0) {
FannyCalle 0:8214896432e0 211 debug("Fail to initialize card\n");
FannyCalle 0:8214896432e0 212 return 1;
FannyCalle 0:8214896432e0 213 }
FannyCalle 0:8214896432e0 214 debug_if(SD_DBG, "init card = %d\n", _is_initialized);
FannyCalle 0:8214896432e0 215 _sectors = _sd_sectors();
FannyCalle 0:8214896432e0 216
FannyCalle 0:8214896432e0 217 // Set block length to 512 (CMD16)
FannyCalle 0:8214896432e0 218 if (_cmd(16, 512) != 0) {
FannyCalle 0:8214896432e0 219 debug("Set 512-byte block timed out\n");
FannyCalle 0:8214896432e0 220 return 1;
FannyCalle 0:8214896432e0 221 }
FannyCalle 0:8214896432e0 222
FannyCalle 0:8214896432e0 223 // Set SCK for data transfer
FannyCalle 0:8214896432e0 224 _spi.frequency(_transfer_sck);
FannyCalle 0:8214896432e0 225 return 0;
FannyCalle 0:8214896432e0 226 }
FannyCalle 0:8214896432e0 227
FannyCalle 0:8214896432e0 228 int SDFileSystem::disk_write(const uint8_t* buffer, uint32_t block_number, uint32_t count) {
FannyCalle 0:8214896432e0 229 if (!_is_initialized) {
FannyCalle 0:8214896432e0 230 return -1;
FannyCalle 0:8214896432e0 231 }
FannyCalle 0:8214896432e0 232
FannyCalle 0:8214896432e0 233 for (uint32_t b = block_number; b < block_number + count; b++) {
FannyCalle 0:8214896432e0 234 // set write address for single block (CMD24)
FannyCalle 0:8214896432e0 235 if (_cmd(24, b * cdv) != 0) {
FannyCalle 0:8214896432e0 236 return 1;
FannyCalle 0:8214896432e0 237 }
FannyCalle 0:8214896432e0 238
FannyCalle 0:8214896432e0 239 // send the data block
FannyCalle 0:8214896432e0 240 _write(buffer, 512);
FannyCalle 0:8214896432e0 241 buffer += 512;
FannyCalle 0:8214896432e0 242 }
FannyCalle 0:8214896432e0 243
FannyCalle 0:8214896432e0 244 return 0;
FannyCalle 0:8214896432e0 245 }
FannyCalle 0:8214896432e0 246
FannyCalle 0:8214896432e0 247 int SDFileSystem::disk_read(uint8_t* buffer, uint32_t block_number, uint32_t count) {
FannyCalle 0:8214896432e0 248 if (!_is_initialized) {
FannyCalle 0:8214896432e0 249 return -1;
FannyCalle 0:8214896432e0 250 }
FannyCalle 0:8214896432e0 251
FannyCalle 0:8214896432e0 252 for (uint32_t b = block_number; b < block_number + count; b++) {
FannyCalle 0:8214896432e0 253 // set read address for single block (CMD17)
FannyCalle 0:8214896432e0 254 if (_cmd(17, b * cdv) != 0) {
FannyCalle 0:8214896432e0 255 return 1;
FannyCalle 0:8214896432e0 256 }
FannyCalle 0:8214896432e0 257
FannyCalle 0:8214896432e0 258 // receive the data
FannyCalle 0:8214896432e0 259 _read(buffer, 512);
FannyCalle 0:8214896432e0 260 buffer += 512;
FannyCalle 0:8214896432e0 261 }
FannyCalle 0:8214896432e0 262
FannyCalle 0:8214896432e0 263 return 0;
FannyCalle 0:8214896432e0 264 }
FannyCalle 0:8214896432e0 265
FannyCalle 0:8214896432e0 266 int SDFileSystem::disk_status() {
FannyCalle 0:8214896432e0 267 // FATFileSystem::disk_status() returns 0 when initialized
FannyCalle 0:8214896432e0 268 if (_is_initialized) {
FannyCalle 0:8214896432e0 269 return 0;
FannyCalle 0:8214896432e0 270 } else {
FannyCalle 0:8214896432e0 271 return 1;
FannyCalle 0:8214896432e0 272 }
FannyCalle 0:8214896432e0 273 }
FannyCalle 0:8214896432e0 274
FannyCalle 0:8214896432e0 275 int SDFileSystem::disk_sync() { return 0; }
FannyCalle 0:8214896432e0 276 uint32_t SDFileSystem::disk_sectors() { return _sectors; }
FannyCalle 0:8214896432e0 277
FannyCalle 0:8214896432e0 278
FannyCalle 0:8214896432e0 279 // PRIVATE FUNCTIONS
FannyCalle 0:8214896432e0 280 int SDFileSystem::_cmd(int cmd, int arg) {
FannyCalle 0:8214896432e0 281 _cs = 0;
FannyCalle 0:8214896432e0 282
FannyCalle 0:8214896432e0 283 // send a command
FannyCalle 0:8214896432e0 284 _spi.write(0x40 | cmd);
FannyCalle 0:8214896432e0 285 _spi.write(arg >> 24);
FannyCalle 0:8214896432e0 286 _spi.write(arg >> 16);
FannyCalle 0:8214896432e0 287 _spi.write(arg >> 8);
FannyCalle 0:8214896432e0 288 _spi.write(arg >> 0);
FannyCalle 0:8214896432e0 289 _spi.write(0x95);
FannyCalle 0:8214896432e0 290
FannyCalle 0:8214896432e0 291 // wait for the repsonse (response[7] == 0)
FannyCalle 0:8214896432e0 292 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
FannyCalle 0:8214896432e0 293 int response = _spi.write(0xFF);
FannyCalle 0:8214896432e0 294 if (!(response & 0x80)) {
FannyCalle 0:8214896432e0 295 _cs = 1;
FannyCalle 0:8214896432e0 296 _spi.write(0xFF);
FannyCalle 0:8214896432e0 297 return response;
FannyCalle 0:8214896432e0 298 }
FannyCalle 0:8214896432e0 299 }
FannyCalle 0:8214896432e0 300 _cs = 1;
FannyCalle 0:8214896432e0 301 _spi.write(0xFF);
FannyCalle 0:8214896432e0 302 return -1; // timeout
FannyCalle 0:8214896432e0 303 }
FannyCalle 0:8214896432e0 304 int SDFileSystem::_cmdx(int cmd, int arg) {
FannyCalle 0:8214896432e0 305 _cs = 0;
FannyCalle 0:8214896432e0 306
FannyCalle 0:8214896432e0 307 // send a command
FannyCalle 0:8214896432e0 308 _spi.write(0x40 | cmd);
FannyCalle 0:8214896432e0 309 _spi.write(arg >> 24);
FannyCalle 0:8214896432e0 310 _spi.write(arg >> 16);
FannyCalle 0:8214896432e0 311 _spi.write(arg >> 8);
FannyCalle 0:8214896432e0 312 _spi.write(arg >> 0);
FannyCalle 0:8214896432e0 313 _spi.write(0x95);
FannyCalle 0:8214896432e0 314
FannyCalle 0:8214896432e0 315 // wait for the repsonse (response[7] == 0)
FannyCalle 0:8214896432e0 316 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
FannyCalle 0:8214896432e0 317 int response = _spi.write(0xFF);
FannyCalle 0:8214896432e0 318 if (!(response & 0x80)) {
FannyCalle 0:8214896432e0 319 return response;
FannyCalle 0:8214896432e0 320 }
FannyCalle 0:8214896432e0 321 }
FannyCalle 0:8214896432e0 322 _cs = 1;
FannyCalle 0:8214896432e0 323 _spi.write(0xFF);
FannyCalle 0:8214896432e0 324 return -1; // timeout
FannyCalle 0:8214896432e0 325 }
FannyCalle 0:8214896432e0 326
FannyCalle 0:8214896432e0 327
FannyCalle 0:8214896432e0 328 int SDFileSystem::_cmd58() {
FannyCalle 0:8214896432e0 329 _cs = 0;
FannyCalle 0:8214896432e0 330 int arg = 0;
FannyCalle 0:8214896432e0 331
FannyCalle 0:8214896432e0 332 // send a command
FannyCalle 0:8214896432e0 333 _spi.write(0x40 | 58);
FannyCalle 0:8214896432e0 334 _spi.write(arg >> 24);
FannyCalle 0:8214896432e0 335 _spi.write(arg >> 16);
FannyCalle 0:8214896432e0 336 _spi.write(arg >> 8);
FannyCalle 0:8214896432e0 337 _spi.write(arg >> 0);
FannyCalle 0:8214896432e0 338 _spi.write(0x95);
FannyCalle 0:8214896432e0 339
FannyCalle 0:8214896432e0 340 // wait for the repsonse (response[7] == 0)
FannyCalle 0:8214896432e0 341 for (int i = 0; i < SD_COMMAND_TIMEOUT; i++) {
FannyCalle 0:8214896432e0 342 int response = _spi.write(0xFF);
FannyCalle 0:8214896432e0 343 if (!(response & 0x80)) {
FannyCalle 0:8214896432e0 344 int ocr = _spi.write(0xFF) << 24;
FannyCalle 0:8214896432e0 345 ocr |= _spi.write(0xFF) << 16;
FannyCalle 0:8214896432e0 346 ocr |= _spi.write(0xFF) << 8;
FannyCalle 0:8214896432e0 347 ocr |= _spi.write(0xFF) << 0;
FannyCalle 0:8214896432e0 348 _cs = 1;
FannyCalle 0:8214896432e0 349 _spi.write(0xFF);
FannyCalle 0:8214896432e0 350 return response;
FannyCalle 0:8214896432e0 351 }
FannyCalle 0:8214896432e0 352 }
FannyCalle 0:8214896432e0 353 _cs = 1;
FannyCalle 0:8214896432e0 354 _spi.write(0xFF);
FannyCalle 0:8214896432e0 355 return -1; // timeout
FannyCalle 0:8214896432e0 356 }
FannyCalle 0:8214896432e0 357
FannyCalle 0:8214896432e0 358 int SDFileSystem::_cmd8() {
FannyCalle 0:8214896432e0 359 _cs = 0;
FannyCalle 0:8214896432e0 360
FannyCalle 0:8214896432e0 361 // send a command
FannyCalle 0:8214896432e0 362 _spi.write(0x40 | 8); // CMD8
FannyCalle 0:8214896432e0 363 _spi.write(0x00); // reserved
FannyCalle 0:8214896432e0 364 _spi.write(0x00); // reserved
FannyCalle 0:8214896432e0 365 _spi.write(0x01); // 3.3v
FannyCalle 0:8214896432e0 366 _spi.write(0xAA); // check pattern
FannyCalle 0:8214896432e0 367 _spi.write(0x87); // crc
FannyCalle 0:8214896432e0 368
FannyCalle 0:8214896432e0 369 // wait for the repsonse (response[7] == 0)
FannyCalle 0:8214896432e0 370 for (int i = 0; i < SD_COMMAND_TIMEOUT * 1000; i++) {
FannyCalle 0:8214896432e0 371 char response[5];
FannyCalle 0:8214896432e0 372 response[0] = _spi.write(0xFF);
FannyCalle 0:8214896432e0 373 if (!(response[0] & 0x80)) {
FannyCalle 0:8214896432e0 374 for (int j = 1; j < 5; j++) {
FannyCalle 0:8214896432e0 375 response[i] = _spi.write(0xFF);
FannyCalle 0:8214896432e0 376 }
FannyCalle 0:8214896432e0 377 _cs = 1;
FannyCalle 0:8214896432e0 378 _spi.write(0xFF);
FannyCalle 0:8214896432e0 379 return response[0];
FannyCalle 0:8214896432e0 380 }
FannyCalle 0:8214896432e0 381 }
FannyCalle 0:8214896432e0 382 _cs = 1;
FannyCalle 0:8214896432e0 383 _spi.write(0xFF);
FannyCalle 0:8214896432e0 384 return -1; // timeout
FannyCalle 0:8214896432e0 385 }
FannyCalle 0:8214896432e0 386
FannyCalle 0:8214896432e0 387 int SDFileSystem::_read(uint8_t *buffer, uint32_t length) {
FannyCalle 0:8214896432e0 388 _cs = 0;
FannyCalle 0:8214896432e0 389
FannyCalle 0:8214896432e0 390 // read until start byte (0xFF)
FannyCalle 0:8214896432e0 391 while (_spi.write(0xFF) != 0xFE);
FannyCalle 0:8214896432e0 392
FannyCalle 0:8214896432e0 393 // read data
FannyCalle 0:8214896432e0 394 for (uint32_t i = 0; i < length; i++) {
FannyCalle 0:8214896432e0 395 buffer[i] = _spi.write(0xFF);
FannyCalle 0:8214896432e0 396 }
FannyCalle 0:8214896432e0 397 _spi.write(0xFF); // checksum
FannyCalle 0:8214896432e0 398 _spi.write(0xFF);
FannyCalle 0:8214896432e0 399
FannyCalle 0:8214896432e0 400 _cs = 1;
FannyCalle 0:8214896432e0 401 _spi.write(0xFF);
FannyCalle 0:8214896432e0 402 return 0;
FannyCalle 0:8214896432e0 403 }
FannyCalle 0:8214896432e0 404
FannyCalle 0:8214896432e0 405 int SDFileSystem::_write(const uint8_t*buffer, uint32_t length) {
FannyCalle 0:8214896432e0 406 _cs = 0;
FannyCalle 0:8214896432e0 407
FannyCalle 0:8214896432e0 408 // indicate start of block
FannyCalle 0:8214896432e0 409 _spi.write(0xFE);
FannyCalle 0:8214896432e0 410
FannyCalle 0:8214896432e0 411 // write the data
FannyCalle 0:8214896432e0 412 for (uint32_t i = 0; i < length; i++) {
FannyCalle 0:8214896432e0 413 _spi.write(buffer[i]);
FannyCalle 0:8214896432e0 414 }
FannyCalle 0:8214896432e0 415
FannyCalle 0:8214896432e0 416 // write the checksum
FannyCalle 0:8214896432e0 417 _spi.write(0xFF);
FannyCalle 0:8214896432e0 418 _spi.write(0xFF);
FannyCalle 0:8214896432e0 419
FannyCalle 0:8214896432e0 420 // check the response token
FannyCalle 0:8214896432e0 421 if ((_spi.write(0xFF) & 0x1F) != 0x05) {
FannyCalle 0:8214896432e0 422 _cs = 1;
FannyCalle 0:8214896432e0 423 _spi.write(0xFF);
FannyCalle 0:8214896432e0 424 return 1;
FannyCalle 0:8214896432e0 425 }
FannyCalle 0:8214896432e0 426
FannyCalle 0:8214896432e0 427 // wait for write to finish
FannyCalle 0:8214896432e0 428 while (_spi.write(0xFF) == 0);
FannyCalle 0:8214896432e0 429
FannyCalle 0:8214896432e0 430 _cs = 1;
FannyCalle 0:8214896432e0 431 _spi.write(0xFF);
FannyCalle 0:8214896432e0 432 return 0;
FannyCalle 0:8214896432e0 433 }
FannyCalle 0:8214896432e0 434
FannyCalle 0:8214896432e0 435 static uint32_t ext_bits(unsigned char *data, int msb, int lsb) {
FannyCalle 0:8214896432e0 436 uint32_t bits = 0;
FannyCalle 0:8214896432e0 437 uint32_t size = 1 + msb - lsb;
FannyCalle 0:8214896432e0 438 for (uint32_t i = 0; i < size; i++) {
FannyCalle 0:8214896432e0 439 uint32_t position = lsb + i;
FannyCalle 0:8214896432e0 440 uint32_t byte = 15 - (position >> 3);
FannyCalle 0:8214896432e0 441 uint32_t bit = position & 0x7;
FannyCalle 0:8214896432e0 442 uint32_t value = (data[byte] >> bit) & 1;
FannyCalle 0:8214896432e0 443 bits |= value << i;
FannyCalle 0:8214896432e0 444 }
FannyCalle 0:8214896432e0 445 return bits;
FannyCalle 0:8214896432e0 446 }
FannyCalle 0:8214896432e0 447
FannyCalle 0:8214896432e0 448 uint32_t SDFileSystem::_sd_sectors() {
FannyCalle 0:8214896432e0 449 uint32_t c_size, c_size_mult, read_bl_len;
FannyCalle 0:8214896432e0 450 uint32_t block_len, mult, blocknr, capacity;
FannyCalle 0:8214896432e0 451 uint32_t hc_c_size;
FannyCalle 0:8214896432e0 452 uint32_t blocks;
FannyCalle 0:8214896432e0 453
FannyCalle 0:8214896432e0 454 // CMD9, Response R2 (R1 byte + 16-byte block read)
FannyCalle 0:8214896432e0 455 if (_cmdx(9, 0) != 0) {
FannyCalle 0:8214896432e0 456 debug("Didn't get a response from the disk\n");
FannyCalle 0:8214896432e0 457 return 0;
FannyCalle 0:8214896432e0 458 }
FannyCalle 0:8214896432e0 459
FannyCalle 0:8214896432e0 460 uint8_t csd[16];
FannyCalle 0:8214896432e0 461 if (_read(csd, 16) != 0) {
FannyCalle 0:8214896432e0 462 debug("Couldn't read csd response from disk\n");
FannyCalle 0:8214896432e0 463 return 0;
FannyCalle 0:8214896432e0 464 }
FannyCalle 0:8214896432e0 465
FannyCalle 0:8214896432e0 466 // csd_structure : csd[127:126]
FannyCalle 0:8214896432e0 467 // c_size : csd[73:62]
FannyCalle 0:8214896432e0 468 // c_size_mult : csd[49:47]
FannyCalle 0:8214896432e0 469 // read_bl_len : csd[83:80] - the *maximum* read block length
FannyCalle 0:8214896432e0 470
FannyCalle 0:8214896432e0 471 int csd_structure = ext_bits(csd, 127, 126);
FannyCalle 0:8214896432e0 472
FannyCalle 0:8214896432e0 473 switch (csd_structure) {
FannyCalle 0:8214896432e0 474 case 0:
FannyCalle 0:8214896432e0 475 cdv = 512;
FannyCalle 0:8214896432e0 476 c_size = ext_bits(csd, 73, 62);
FannyCalle 0:8214896432e0 477 c_size_mult = ext_bits(csd, 49, 47);
FannyCalle 0:8214896432e0 478 read_bl_len = ext_bits(csd, 83, 80);
FannyCalle 0:8214896432e0 479
FannyCalle 0:8214896432e0 480 block_len = 1 << read_bl_len;
FannyCalle 0:8214896432e0 481 mult = 1 << (c_size_mult + 2);
FannyCalle 0:8214896432e0 482 blocknr = (c_size + 1) * mult;
FannyCalle 0:8214896432e0 483 capacity = blocknr * block_len;
FannyCalle 0:8214896432e0 484 blocks = capacity / 512;
FannyCalle 0:8214896432e0 485 debug_if(SD_DBG, "\n\rSDCard\n\rc_size: %d \n\rcapacity: %ld \n\rsectors: %lld\n\r", c_size, capacity, blocks);
FannyCalle 0:8214896432e0 486 break;
FannyCalle 0:8214896432e0 487
FannyCalle 0:8214896432e0 488 case 1:
FannyCalle 0:8214896432e0 489 cdv = 1;
FannyCalle 0:8214896432e0 490 hc_c_size = ext_bits(csd, 63, 48);
FannyCalle 0:8214896432e0 491 blocks = (hc_c_size+1)*1024;
FannyCalle 0:8214896432e0 492 debug_if(SD_DBG, "\n\rSDHC Card \n\rhc_c_size: %d\n\rcapacity: %lld \n\rsectors: %lld\n\r", hc_c_size, blocks*512, blocks);
FannyCalle 0:8214896432e0 493 break;
FannyCalle 0:8214896432e0 494
FannyCalle 0:8214896432e0 495 default:
FannyCalle 0:8214896432e0 496 debug("CSD struct unsupported\r\n");
FannyCalle 0:8214896432e0 497 return 0;
FannyCalle 0:8214896432e0 498 };
FannyCalle 0:8214896432e0 499 return blocks;
FannyCalle 0:8214896432e0 500 }