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Version FC
Dependencies: DmTftLibrary eeprom SX1280Lib filesystem mbed
Fork of MSNV2-Terminal_V1-5 by
main.h@10:1b37e3b41947, 2018-08-22 (annotated)
- Committer:
- FCH_31
- Date:
- Wed Aug 22 21:22:43 2018 +0000
- Revision:
- 10:1b37e3b41947
- Parent:
- 8:cd489b7c49a0
- Child:
- 13:5414193da1de
3
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
FCH_31 | 8:cd489b7c49a0 | 1 | /* |
FCH_31 | 8:cd489b7c49a0 | 2 | * MISNet |
FCH_31 | 8:cd489b7c49a0 | 3 | * |
FCH_31 | 8:cd489b7c49a0 | 4 | * Main |
FCH_31 | 8:cd489b7c49a0 | 5 | * |
FCH_31 | 8:cd489b7c49a0 | 6 | * Created on: August 17, 2018 |
FCH_31 | 8:cd489b7c49a0 | 7 | * Author: Francis CHATAIN |
FCH_31 | 8:cd489b7c49a0 | 8 | * |
FCH_31 | 8:cd489b7c49a0 | 9 | */ |
FCH_31 | 8:cd489b7c49a0 | 10 | |
FCH_31 | 8:cd489b7c49a0 | 11 | #ifndef __MAIN_H__ |
FCH_31 | 8:cd489b7c49a0 | 12 | #define __MAIN_H__ |
FCH_31 | 8:cd489b7c49a0 | 13 | |
FCH_31 | 8:cd489b7c49a0 | 14 | #include "mbed.h" |
FCH_31 | 8:cd489b7c49a0 | 15 | |
FCH_31 | 8:cd489b7c49a0 | 16 | |
FCH_31 | 10:1b37e3b41947 | 17 | #define FIRMWARE_VERSION 7.7 |
FCH_31 | 8:cd489b7c49a0 | 18 | |
FCH_31 | 8:cd489b7c49a0 | 19 | #define ID_TERMINAL 111 |
FCH_31 | 8:cd489b7c49a0 | 20 | #define ID_GATEWAY 55 |
FCH_31 | 8:cd489b7c49a0 | 21 | |
FCH_31 | 8:cd489b7c49a0 | 22 | //DigitalOut led2 ( LED2 ); |
FCH_31 | 8:cd489b7c49a0 | 23 | |
FCH_31 | 8:cd489b7c49a0 | 24 | typedef enum { |
FCH_31 | 8:cd489b7c49a0 | 25 | SENSOR = 1, |
FCH_31 | 8:cd489b7c49a0 | 26 | ACTUATOR = 2, |
FCH_31 | 8:cd489b7c49a0 | 27 | RECODER = 3 |
FCH_31 | 8:cd489b7c49a0 | 28 | } CHANNEL_DEVICE_TYPE ; |
FCH_31 | 8:cd489b7c49a0 | 29 | |
FCH_31 | 8:cd489b7c49a0 | 30 | |
FCH_31 | 8:cd489b7c49a0 | 31 | // A compléter au fur et a mesure et remonter l'info sur les applications center |
FCH_31 | 8:cd489b7c49a0 | 32 | typedef enum { |
FCH_31 | 8:cd489b7c49a0 | 33 | NOT_IDENTIFIED = 0 , // Configuration nouvelle ou non référencée |
FCH_31 | 8:cd489b7c49a0 | 34 | IKS01A2 = 1 , // List des composant |
FCH_31 | 8:cd489b7c49a0 | 35 | SMART_TERMINAL = 2 // BME280 + .... |
FCH_31 | 8:cd489b7c49a0 | 36 | } DEVICE_ID ; |
FCH_31 | 8:cd489b7c49a0 | 37 | |
FCH_31 | 8:cd489b7c49a0 | 38 | typedef enum { |
FCH_31 | 8:cd489b7c49a0 | 39 | HTS221 = 1, |
FCH_31 | 8:cd489b7c49a0 | 40 | LPS22HB = 2, |
FCH_31 | 8:cd489b7c49a0 | 41 | LSM303A = 3, |
FCH_31 | 8:cd489b7c49a0 | 42 | LSM6DSL = 4, |
FCH_31 | 8:cd489b7c49a0 | 43 | BME280 = 5, |
FCH_31 | 8:cd489b7c49a0 | 44 | DS18B20 = 6 |
FCH_31 | 8:cd489b7c49a0 | 45 | } CHANNEL_COMPONENT_ID; |
FCH_31 | 8:cd489b7c49a0 | 46 | |
FCH_31 | 8:cd489b7c49a0 | 47 | typedef uint8_t CHANNEL_GROUP ; |
FCH_31 | 8:cd489b7c49a0 | 48 | |
FCH_31 | 8:cd489b7c49a0 | 49 | typedef uint16_t CHANNEL_VALUE_TYPE ; |
FCH_31 | 8:cd489b7c49a0 | 50 | |
FCH_31 | 8:cd489b7c49a0 | 51 | typedef enum { |
FCH_31 | 8:cd489b7c49a0 | 52 | ENABLE_ = 1, // ACTIV |
FCH_31 | 8:cd489b7c49a0 | 53 | DISABLE_ = 0 // SLEEPING |
FCH_31 | 8:cd489b7c49a0 | 54 | } CHANNEL_STATE ; |
FCH_31 | 8:cd489b7c49a0 | 55 | |
FCH_31 | 8:cd489b7c49a0 | 56 | typedef uint8_t CHANNEL_ACCES_PIN ; |
FCH_31 | 8:cd489b7c49a0 | 57 | |
FCH_31 | 8:cd489b7c49a0 | 58 | typedef enum { |
FCH_31 | 8:cd489b7c49a0 | 59 | GPIO_ = 1, |
FCH_31 | 8:cd489b7c49a0 | 60 | I2C_ = 2, |
FCH_31 | 8:cd489b7c49a0 | 61 | SPI_ = 3, |
FCH_31 | 8:cd489b7c49a0 | 62 | UART_ = 4 |
FCH_31 | 8:cd489b7c49a0 | 63 | } CHANNEL_ACCESS_TYPE ; |
FCH_31 | 8:cd489b7c49a0 | 64 | |
FCH_31 | 8:cd489b7c49a0 | 65 | |
FCH_31 | 8:cd489b7c49a0 | 66 | typedef uint8_t CHANNEL_ACCESS_PIN ; |
FCH_31 | 8:cd489b7c49a0 | 67 | |
FCH_31 | 8:cd489b7c49a0 | 68 | typedef enum { |
FCH_31 | 8:cd489b7c49a0 | 69 | BY_VALUE = 1, // wakeup by irq |
FCH_31 | 8:cd489b7c49a0 | 70 | BY_THRESHOLD = 2 // wakeup by watchdog timer |
FCH_31 | 8:cd489b7c49a0 | 71 | } CHANNEL_UP_MODE ; |
FCH_31 | 8:cd489b7c49a0 | 72 | |
FCH_31 | 8:cd489b7c49a0 | 73 | typedef enum { |
FCH_31 | 8:cd489b7c49a0 | 74 | IRQ_ = 1, // wakeup by irq |
FCH_31 | 8:cd489b7c49a0 | 75 | TIME_ = 2 // wakeup by watchdog timer |
FCH_31 | 8:cd489b7c49a0 | 76 | } CHANNEL_REQUEST_MODE ; |
FCH_31 | 8:cd489b7c49a0 | 77 | |
FCH_31 | 8:cd489b7c49a0 | 78 | typedef uint32_t CHANNEL_TIMER_DIVIDE ; |
FCH_31 | 8:cd489b7c49a0 | 79 | |
FCH_31 | 8:cd489b7c49a0 | 80 | typedef float CHANNEL_THRESHOLD_DELTA ; |
FCH_31 | 8:cd489b7c49a0 | 81 | typedef float CHANNEL_THRESHOLD_UP ; |
FCH_31 | 8:cd489b7c49a0 | 82 | typedef float CHANNEL_THRESHOLD_DOWN ; |
FCH_31 | 8:cd489b7c49a0 | 83 | |
FCH_31 | 8:cd489b7c49a0 | 84 | typedef enum { |
FCH_31 | 8:cd489b7c49a0 | 85 | MESSAGE = 1, // Send Message |
FCH_31 | 8:cd489b7c49a0 | 86 | MESSAGERELAY = 2 // Send Message + ON/OFF internal relay |
FCH_31 | 8:cd489b7c49a0 | 87 | } CHANNEL_ACTION; |
FCH_31 | 8:cd489b7c49a0 | 88 | |
FCH_31 | 8:cd489b7c49a0 | 89 | typedef enum { |
FCH_31 | 8:cd489b7c49a0 | 90 | IO = 1, // ON/OFF |
FCH_31 | 8:cd489b7c49a0 | 91 | PWD = 2 // PWD modulation |
FCH_31 | 8:cd489b7c49a0 | 92 | } CHANNEL_OUTPUT ; |
FCH_31 | 8:cd489b7c49a0 | 93 | |
FCH_31 | 8:cd489b7c49a0 | 94 | /* mbed-os only |
FCH_31 | 8:cd489b7c49a0 | 95 | typedef struct { |
FCH_31 | 8:cd489b7c49a0 | 96 | uint8_t channel ; |
FCH_31 | 8:cd489b7c49a0 | 97 | uint16_t typeValue ; |
FCH_31 | 8:cd489b7c49a0 | 98 | uint8_t P1 ; |
FCH_31 | 8:cd489b7c49a0 | 99 | uint16_t P2 ; |
FCH_31 | 8:cd489b7c49a0 | 100 | float F1 ; |
FCH_31 | 8:cd489b7c49a0 | 101 | float F2 ; |
FCH_31 | 8:cd489b7c49a0 | 102 | float F3 ; |
FCH_31 | 8:cd489b7c49a0 | 103 | } message_t; |
FCH_31 | 8:cd489b7c49a0 | 104 | |
FCH_31 | 8:cd489b7c49a0 | 105 | //MemoryPool<message_t, 32> mpool; |
FCH_31 | 8:cd489b7c49a0 | 106 | //Queue<message_t, 32> queue; |
FCH_31 | 8:cd489b7c49a0 | 107 | */ |
FCH_31 | 8:cd489b7c49a0 | 108 | |
FCH_31 | 8:cd489b7c49a0 | 109 | |
FCH_31 | 8:cd489b7c49a0 | 110 | |
FCH_31 | 8:cd489b7c49a0 | 111 | #endif // __MISNet_H__ |