Eric Lewiston / STM32L4xx_HAL_Driver

Hal Drivers for L4

Dependents:   BSP OneHopeOnePrayer FINAL_AUDIO_RECORD AudioDemo

Fork of STM32L4xx_HAL_Driver by Senior Design: Sound Monitor

Src/stm32l4xx_hal_pwr.c@2:7aef7655b0a8, 2015-11-25 (annotated)

Committer:
EricLew
Date:
Wed Nov 25 17:30:43 2015 +0000
Revision:
2:7aef7655b0a8
Parent:
0:80ee8f3b695e 
commit;

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EricLew 0:80ee8f3b695e 1 /**
EricLew 0:80ee8f3b695e 2 ******************************************************************************
EricLew 0:80ee8f3b695e 3 * @file stm32l4xx_hal_pwr.c
EricLew 0:80ee8f3b695e 4 * @author MCD Application Team
EricLew 0:80ee8f3b695e 5 * @version V1.1.0
EricLew 0:80ee8f3b695e 6 * @date 16-September-2015
EricLew 0:80ee8f3b695e 7 * @brief PWR HAL module driver.
EricLew 0:80ee8f3b695e 8 * This file provides firmware functions to manage the following
EricLew 0:80ee8f3b695e 9 * functionalities of the Power Controller (PWR) peripheral:
EricLew 0:80ee8f3b695e 10 * + Initialization/de-initialization functions
EricLew 0:80ee8f3b695e 11 * + Peripheral Control functions
EricLew 0:80ee8f3b695e 12 *
EricLew 0:80ee8f3b695e 13 ******************************************************************************
EricLew 0:80ee8f3b695e 14 * @attention
EricLew 0:80ee8f3b695e 15 *
EricLew 0:80ee8f3b695e 16 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
EricLew 0:80ee8f3b695e 17 *
EricLew 0:80ee8f3b695e 18 * Redistribution and use in source and binary forms, with or without modification,
EricLew 0:80ee8f3b695e 19 * are permitted provided that the following conditions are met:
EricLew 0:80ee8f3b695e 20 * 1. Redistributions of source code must retain the above copyright notice,
EricLew 0:80ee8f3b695e 21 * this list of conditions and the following disclaimer.
EricLew 0:80ee8f3b695e 22 * 2. Redistributions in binary form must reproduce the above copyright notice,
EricLew 0:80ee8f3b695e 23 * this list of conditions and the following disclaimer in the documentation
EricLew 0:80ee8f3b695e 24 * and/or other materials provided with the distribution.
EricLew 0:80ee8f3b695e 25 * 3. Neither the name of STMicroelectronics nor the names of its contributors
EricLew 0:80ee8f3b695e 26 * may be used to endorse or promote products derived from this software
EricLew 0:80ee8f3b695e 27 * without specific prior written permission.
EricLew 0:80ee8f3b695e 28 *
EricLew 0:80ee8f3b695e 29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
EricLew 0:80ee8f3b695e 30 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
EricLew 0:80ee8f3b695e 31 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
EricLew 0:80ee8f3b695e 32 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
EricLew 0:80ee8f3b695e 33 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
EricLew 0:80ee8f3b695e 34 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
EricLew 0:80ee8f3b695e 35 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
EricLew 0:80ee8f3b695e 36 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
EricLew 0:80ee8f3b695e 37 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
EricLew 0:80ee8f3b695e 38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
EricLew 0:80ee8f3b695e 39 *
EricLew 0:80ee8f3b695e 40 ******************************************************************************
EricLew 0:80ee8f3b695e 41 */
EricLew 0:80ee8f3b695e 42
EricLew 0:80ee8f3b695e 43 /* Includes ------------------------------------------------------------------*/
EricLew 0:80ee8f3b695e 44 #include "stm32l4xx_hal.h"
EricLew 0:80ee8f3b695e 45
EricLew 0:80ee8f3b695e 46 /** @addtogroup STM32L4xx_HAL_Driver
EricLew 0:80ee8f3b695e 47 * @{
EricLew 0:80ee8f3b695e 48 */
EricLew 0:80ee8f3b695e 49
EricLew 0:80ee8f3b695e 50 /** @defgroup PWR PWR
EricLew 0:80ee8f3b695e 51 * @brief PWR HAL module driver
EricLew 0:80ee8f3b695e 52 * @{
EricLew 0:80ee8f3b695e 53 */
EricLew 0:80ee8f3b695e 54
EricLew 0:80ee8f3b695e 55 #ifdef HAL_PWR_MODULE_ENABLED
EricLew 0:80ee8f3b695e 56
EricLew 0:80ee8f3b695e 57 /* Private typedef -----------------------------------------------------------*/
EricLew 0:80ee8f3b695e 58 /* Private define ------------------------------------------------------------*/
EricLew 0:80ee8f3b695e 59
EricLew 0:80ee8f3b695e 60 /** @defgroup PWR_Private_Defines PWR Private Defines
EricLew 0:80ee8f3b695e 61 * @{
EricLew 0:80ee8f3b695e 62 */
EricLew 0:80ee8f3b695e 63
EricLew 0:80ee8f3b695e 64 /** @defgroup PWR_PVD_Mode_Mask PWR PVD Mode Mask
EricLew 0:80ee8f3b695e 65 * @{
EricLew 0:80ee8f3b695e 66 */
EricLew 0:80ee8f3b695e 67 #define PVD_MODE_IT ((uint32_t)0x00010000) /*!< Mask for interruption yielded by PVD threshold crossing */
EricLew 0:80ee8f3b695e 68 #define PVD_MODE_EVT ((uint32_t)0x00020000) /*!< Mask for event yielded by PVD threshold crossing */
EricLew 0:80ee8f3b695e 69 #define PVD_RISING_EDGE ((uint32_t)0x00000001) /*!< Mask for rising edge set as PVD trigger */
EricLew 0:80ee8f3b695e 70 #define PVD_FALLING_EDGE ((uint32_t)0x00000002) /*!< Mask for falling edge set as PVD trigger */
EricLew 0:80ee8f3b695e 71 /**
EricLew 0:80ee8f3b695e 72 * @}
EricLew 0:80ee8f3b695e 73 */
EricLew 0:80ee8f3b695e 74
EricLew 0:80ee8f3b695e 75 /**
EricLew 0:80ee8f3b695e 76 * @}
EricLew 0:80ee8f3b695e 77 */
EricLew 0:80ee8f3b695e 78
EricLew 0:80ee8f3b695e 79 /* Private macro -------------------------------------------------------------*/
EricLew 0:80ee8f3b695e 80 /* Private variables ---------------------------------------------------------*/
EricLew 0:80ee8f3b695e 81 /* Private function prototypes -----------------------------------------------*/
EricLew 0:80ee8f3b695e 82 /* Exported functions --------------------------------------------------------*/
EricLew 0:80ee8f3b695e 83
EricLew 0:80ee8f3b695e 84 /** @defgroup PWR_Exported_Functions PWR Exported Functions
EricLew 0:80ee8f3b695e 85 * @{
EricLew 0:80ee8f3b695e 86 */
EricLew 0:80ee8f3b695e 87
EricLew 0:80ee8f3b695e 88 /** @defgroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
EricLew 0:80ee8f3b695e 89 * @brief Initialization and de-initialization functions
EricLew 0:80ee8f3b695e 90 *
EricLew 0:80ee8f3b695e 91 @verbatim
EricLew 0:80ee8f3b695e 92 ===============================================================================
EricLew 0:80ee8f3b695e 93 ##### Initialization and de-initialization functions #####
EricLew 0:80ee8f3b695e 94 ===============================================================================
EricLew 0:80ee8f3b695e 95 [..]
EricLew 0:80ee8f3b695e 96
EricLew 0:80ee8f3b695e 97 @endverbatim
EricLew 0:80ee8f3b695e 98 * @{
EricLew 0:80ee8f3b695e 99 */
EricLew 0:80ee8f3b695e 100
EricLew 0:80ee8f3b695e 101 /**
EricLew 0:80ee8f3b695e 102 * @brief Deinitialize the HAL PWR peripheral registers to their default reset values.
EricLew 0:80ee8f3b695e 103 * @retval None
EricLew 0:80ee8f3b695e 104 */
EricLew 0:80ee8f3b695e 105 void HAL_PWR_DeInit(void)
EricLew 0:80ee8f3b695e 106 {
EricLew 0:80ee8f3b695e 107 __HAL_RCC_PWR_FORCE_RESET();
EricLew 0:80ee8f3b695e 108 __HAL_RCC_PWR_RELEASE_RESET();
EricLew 0:80ee8f3b695e 109 }
EricLew 0:80ee8f3b695e 110
EricLew 0:80ee8f3b695e 111 /**
EricLew 0:80ee8f3b695e 112 * @brief Enable access to the backup domain
EricLew 0:80ee8f3b695e 113 * (RTC registers, RTC backup data registers).
EricLew 0:80ee8f3b695e 114 * @note After reset, the backup domain is protected against
EricLew 0:80ee8f3b695e 115 * possible unwanted write accesses.
EricLew 0:80ee8f3b695e 116 * @note RTCSEL that sets the RTC clock source selection is in the RTC back-up domain.
EricLew 0:80ee8f3b695e 117 * In order to set or modify the RTC clock, the backup domain access must be
EricLew 0:80ee8f3b695e 118 * disabled.
EricLew 0:80ee8f3b695e 119 * @note LSEON bit that switches on and off the LSE crystal belongs as well to the
EricLew 0:80ee8f3b695e 120 * back-up domain.
EricLew 0:80ee8f3b695e 121 * @retval None
EricLew 0:80ee8f3b695e 122 */
EricLew 0:80ee8f3b695e 123 void HAL_PWR_EnableBkUpAccess(void)
EricLew 0:80ee8f3b695e 124 {
EricLew 0:80ee8f3b695e 125 SET_BIT(PWR->CR1, PWR_CR1_DBP);
EricLew 0:80ee8f3b695e 126 }
EricLew 0:80ee8f3b695e 127
EricLew 0:80ee8f3b695e 128 /**
EricLew 0:80ee8f3b695e 129 * @brief Disable access to the backup domain
EricLew 0:80ee8f3b695e 130 * (RTC registers, RTC backup data registers).
EricLew 0:80ee8f3b695e 131 * @retval None
EricLew 0:80ee8f3b695e 132 */
EricLew 0:80ee8f3b695e 133 void HAL_PWR_DisableBkUpAccess(void)
EricLew 0:80ee8f3b695e 134 {
EricLew 0:80ee8f3b695e 135 CLEAR_BIT(PWR->CR1, PWR_CR1_DBP);
EricLew 0:80ee8f3b695e 136 }
EricLew 0:80ee8f3b695e 137
EricLew 0:80ee8f3b695e 138
EricLew 0:80ee8f3b695e 139
EricLew 0:80ee8f3b695e 140
EricLew 0:80ee8f3b695e 141 /**
EricLew 0:80ee8f3b695e 142 * @}
EricLew 0:80ee8f3b695e 143 */
EricLew 0:80ee8f3b695e 144
EricLew 0:80ee8f3b695e 145
EricLew 0:80ee8f3b695e 146
EricLew 0:80ee8f3b695e 147 /** @defgroup PWR_Exported_Functions_Group2 Peripheral Control functions
EricLew 0:80ee8f3b695e 148 * @brief Low Power modes configuration functions
EricLew 0:80ee8f3b695e 149 *
EricLew 0:80ee8f3b695e 150 @verbatim
EricLew 0:80ee8f3b695e 151
EricLew 0:80ee8f3b695e 152 ===============================================================================
EricLew 0:80ee8f3b695e 153 ##### Peripheral Control functions #####
EricLew 0:80ee8f3b695e 154 ===============================================================================
EricLew 0:80ee8f3b695e 155
EricLew 0:80ee8f3b695e 156 [..]
EricLew 0:80ee8f3b695e 157 *** PVD configuration ***
EricLew 0:80ee8f3b695e 158 =========================
EricLew 0:80ee8f3b695e 159 [..]
EricLew 0:80ee8f3b695e 160 (+) The PVD is used to monitor the VDD power supply by comparing it to a
EricLew 0:80ee8f3b695e 161 threshold selected by the PVD Level (PLS[2:0] bits in PWR_CR2 register).
EricLew 0:80ee8f3b695e 162
EricLew 0:80ee8f3b695e 163 (+) PVDO flag is available to indicate if VDD/VDDA is higher or lower
EricLew 0:80ee8f3b695e 164 than the PVD threshold. This event is internally connected to the EXTI
EricLew 0:80ee8f3b695e 165 line16 and can generate an interrupt if enabled. This is done through
EricLew 0:80ee8f3b695e 166 __HAL_PVD_EXTI_ENABLE_IT() macro.
EricLew 0:80ee8f3b695e 167 (+) The PVD is stopped in Standby mode.
EricLew 0:80ee8f3b695e 168
EricLew 0:80ee8f3b695e 169
EricLew 0:80ee8f3b695e 170 *** WakeUp pin configuration ***
EricLew 0:80ee8f3b695e 171 ================================
EricLew 0:80ee8f3b695e 172 [..]
EricLew 0:80ee8f3b695e 173 (+) WakeUp pins are used to wakeup the system from Standby mode or Shutdown mode.
EricLew 0:80ee8f3b695e 174 The polarity of these pins can be set to configure event detection on high
EricLew 0:80ee8f3b695e 175 level (rising edge) or low level (falling edge).
EricLew 0:80ee8f3b695e 176
EricLew 0:80ee8f3b695e 177
EricLew 0:80ee8f3b695e 178
EricLew 0:80ee8f3b695e 179 *** Low Power modes configuration ***
EricLew 0:80ee8f3b695e 180 =====================================
EricLew 0:80ee8f3b695e 181 [..]
EricLew 0:80ee8f3b695e 182 The devices feature 8 low-power modes:
EricLew 0:80ee8f3b695e 183 (+) Low-power Run mode: core and peripherals are running, regulator in low power mode.
EricLew 0:80ee8f3b695e 184 (+) Sleep mode: Cortex-M4 core stopped, peripherals kept running, regulator in normal mode.
EricLew 0:80ee8f3b695e 185 (+) Low-power Sleep mode: Cortex-M4 core stopped, peripherals kept running, regulator in low power mode.
EricLew 0:80ee8f3b695e 186 (+) Stop 1 mode: all clocks are stopped except LSI and LSE, regulator in normal or low power mode.
EricLew 0:80ee8f3b695e 187 (+) Stop 2 mode: all clocks are stopped except LSI and LSE, regulator in low power mode, reduced set of waking up IPs compared to Stop 1 mode.
EricLew 0:80ee8f3b695e 188 (+) Standby mode with SRAM2: all clocks are stopped except LSI and LSE, SRAM2 content preserved, regulator in low power mode.
EricLew 0:80ee8f3b695e 189 (+) Standby mode without SRAM2: all clocks are stopped except LSI and LSE, regulator off.
EricLew 0:80ee8f3b695e 190 (+) Shutdown mode: all clocks are stopped except LSE, regulator off.
EricLew 0:80ee8f3b695e 191
EricLew 0:80ee8f3b695e 192
EricLew 0:80ee8f3b695e 193 *** Low-power run mode ***
EricLew 0:80ee8f3b695e 194 ==========================
EricLew 0:80ee8f3b695e 195 [..]
EricLew 0:80ee8f3b695e 196 (+) Entry: (from main run mode)
EricLew 0:80ee8f3b695e 197 (++) set LPR bit with HAL_PWREx_EnableLowPowerRunMode() API after having decreased the system clock below 2 MHz.
EricLew 0:80ee8f3b695e 198
EricLew 0:80ee8f3b695e 199 (+) Exit:
EricLew 0:80ee8f3b695e 200 (++) clear LPR bit then wait for REGLP bit to be reset with HAL_PWREx_DisableLowPowerRunMode() API. Only
EricLew 0:80ee8f3b695e 201 then can the system clock frequency be increased above 2 MHz.
EricLew 0:80ee8f3b695e 202
EricLew 0:80ee8f3b695e 203
EricLew 0:80ee8f3b695e 204 *** Sleep mode / Low-power sleep mode ***
EricLew 0:80ee8f3b695e 205 =========================================
EricLew 0:80ee8f3b695e 206 [..]
EricLew 0:80ee8f3b695e 207 (+) Entry:
EricLew 0:80ee8f3b695e 208 The Sleep mode / Low-power Sleep mode is entered thru HAL_PWR_EnterSLEEPMode() API
EricLew 0:80ee8f3b695e 209 in specifying whether or not the regulator is forced to low-power mode and if exit is interrupt or event-triggered.
EricLew 0:80ee8f3b695e 210 (++) PWR_MAINREGULATOR_ON: Sleep mode (regulator in main mode).
EricLew 0:80ee8f3b695e 211 (++) PWR_LOWPOWERREGULATOR_ON: Low-power sleep (regulator in low power mode).
EricLew 0:80ee8f3b695e 212 In the latter case, the system clock frequency must have been decreased below 2 MHz beforehand.
EricLew 0:80ee8f3b695e 213 (++) PWR_SLEEPENTRY_WFI: enter SLEEP mode with WFI instruction
EricLew 0:80ee8f3b695e 214 (++) PWR_SLEEPENTRY_WFE: enter SLEEP mode with WFE instruction
EricLew 0:80ee8f3b695e 215
EricLew 0:80ee8f3b695e 216 (+) WFI Exit:
EricLew 0:80ee8f3b695e 217 (++) Any peripheral interrupt acknowledged by the nested vectored interrupt
EricLew 0:80ee8f3b695e 218 controller (NVIC) or any wake-up event.
EricLew 0:80ee8f3b695e 219
EricLew 0:80ee8f3b695e 220 (+) WFE Exit:
EricLew 0:80ee8f3b695e 221 (++) Any wake-up event such as an EXTI line configured in event mode.
EricLew 0:80ee8f3b695e 222
EricLew 0:80ee8f3b695e 223 [..] When exiting the Low-power sleep mode by issuing an interrupt or a wakeup event,
EricLew 0:80ee8f3b695e 224 the MCU is in Low-power Run mode.
EricLew 0:80ee8f3b695e 225
EricLew 0:80ee8f3b695e 226 *** Stop 1 and Stop 2 modes ***
EricLew 0:80ee8f3b695e 227 ===============================
EricLew 0:80ee8f3b695e 228 [..]
EricLew 0:80ee8f3b695e 229 (+) Entry:
EricLew 0:80ee8f3b695e 230 The Stop 1 or Stop 2 modes are entered thru the following API's:
EricLew 0:80ee8f3b695e 231 (++) HAL_PWR_EnterSTOPMode() [for legacy porting reasons] or HAL_PWREx_EnterSTOP1Mode() for mode 1
EricLew 0:80ee8f3b695e 232 (++) HAL_PWREx_EnterSTOP2Mode for mode 2.
EricLew 0:80ee8f3b695e 233 (+) Regulator setting (applicable to Stop 1 mode only):
EricLew 0:80ee8f3b695e 234 (++) PWR_MAINREGULATOR_ON
EricLew 0:80ee8f3b695e 235 (++) PWR_LOWPOWERREGULATOR_ON
EricLew 0:80ee8f3b695e 236 (+) Exit (interrupt or event-triggered, specified when entering STOP mode):
EricLew 0:80ee8f3b695e 237 (++) PWR_STOPENTRY_WFI: enter Stop mode with WFI instruction
EricLew 0:80ee8f3b695e 238 (++) PWR_STOPENTRY_WFE: enter Stop mode with WFE instruction
EricLew 0:80ee8f3b695e 239
EricLew 0:80ee8f3b695e 240 (+) WFI Exit:
EricLew 0:80ee8f3b695e 241 (++) Any EXTI Line (Internal or External) configured in Interrupt mode.
EricLew 0:80ee8f3b695e 242 (++) Some specific communication peripherals (USART, LPUART, I2C) interrupts
EricLew 0:80ee8f3b695e 243 when programmed in wakeup mode.
EricLew 0:80ee8f3b695e 244 (+) WFE Exit:
EricLew 0:80ee8f3b695e 245 (++) Any EXTI Line (Internal or External) configured in Event mode.
EricLew 0:80ee8f3b695e 246
EricLew 0:80ee8f3b695e 247 [..]
EricLew 0:80ee8f3b695e 248 When exiting Stop 1 mode, the MCU is either in Run mode or in Low-power Run mode
EricLew 0:80ee8f3b695e 249 depending on the LPR bit setting.
EricLew 0:80ee8f3b695e 250 When exiting Stop 2 mode, the MCU is in Run mode.
EricLew 0:80ee8f3b695e 251
EricLew 0:80ee8f3b695e 252 *** Standby mode ***
EricLew 0:80ee8f3b695e 253 ====================
EricLew 0:80ee8f3b695e 254 [..]
EricLew 0:80ee8f3b695e 255 The Standby mode offers two options:
EricLew 0:80ee8f3b695e 256 (+) option a) all clocks off except LSI and LSE, RRS bit set (keeps voltage regulator in low power mode).
EricLew 0:80ee8f3b695e 257 SRAM and registers contents are lost except for the SRAM2 content, the RTC registers, RTC backup registers
EricLew 0:80ee8f3b695e 258 and Standby circuitry.
EricLew 0:80ee8f3b695e 259 (+) option b) all clocks off except LSI and LSE, RRS bit cleared (voltage regulator then disabled).
EricLew 0:80ee8f3b695e 260 SRAM and register contents are lost except for the RTC registers, RTC backup registers
EricLew 0:80ee8f3b695e 261 and Standby circuitry.
EricLew 0:80ee8f3b695e 262
EricLew 0:80ee8f3b695e 263 (++) Entry:
EricLew 0:80ee8f3b695e 264 (+++) The Standby mode is entered thru HAL_PWR_EnterSTANDBYMode() API.
EricLew 0:80ee8f3b695e 265 SRAM1 and register contents are lost except for registers in the Backup domain and
EricLew 0:80ee8f3b695e 266 Standby circuitry. SRAM2 content can be preserved if the bit RRS is set in PWR_CR3 register.
EricLew 0:80ee8f3b695e 267 To enable this feature, the user can resort to HAL_PWREx_EnableSRAM2ContentRetention() API
EricLew 0:80ee8f3b695e 268 to set RRS bit.
EricLew 0:80ee8f3b695e 269
EricLew 0:80ee8f3b695e 270 (++) Exit:
EricLew 0:80ee8f3b695e 271 (+++) WKUP pin rising edge, RTC alarm or wakeup, tamper event, time-stamp event,
EricLew 0:80ee8f3b695e 272 external reset in NRST pin, IWDG reset.
EricLew 0:80ee8f3b695e 273
EricLew 0:80ee8f3b695e 274 [..] After waking up from Standby mode, program execution restarts in the same way as after a Reset.
EricLew 0:80ee8f3b695e 275
EricLew 0:80ee8f3b695e 276
EricLew 0:80ee8f3b695e 277 *** Shutdown mode ***
EricLew 0:80ee8f3b695e 278 ======================
EricLew 0:80ee8f3b695e 279 [..]
EricLew 0:80ee8f3b695e 280 In Shutdown mode,
EricLew 0:80ee8f3b695e 281 voltage regulator is disabled, all clocks are off except LSE, RRS bit is cleared.
EricLew 0:80ee8f3b695e 282 SRAM and registers contents are lost except for backup domain registers.
EricLew 0:80ee8f3b695e 283
EricLew 0:80ee8f3b695e 284 (+) Entry:
EricLew 0:80ee8f3b695e 285 The Shutdown mode is entered thru HAL_PWREx_EnterSHUTDOWNMode() API.
EricLew 0:80ee8f3b695e 286
EricLew 0:80ee8f3b695e 287 (+) Exit:
EricLew 0:80ee8f3b695e 288 (++) WKUP pin rising edge, RTC alarm or wakeup, tamper event, time-stamp event,
EricLew 0:80ee8f3b695e 289 external reset in NRST pin.
EricLew 0:80ee8f3b695e 290
EricLew 0:80ee8f3b695e 291 [..] After waking up from Shutdown mode, program execution restarts in the same way as after a Reset.
EricLew 0:80ee8f3b695e 292
EricLew 0:80ee8f3b695e 293
EricLew 0:80ee8f3b695e 294 *** Auto-wakeup (AWU) from low-power mode ***
EricLew 0:80ee8f3b695e 295 =============================================
EricLew 0:80ee8f3b695e 296 [..]
EricLew 0:80ee8f3b695e 297 The MCU can be woken up from low-power mode by an RTC Alarm event, an RTC
EricLew 0:80ee8f3b695e 298 Wakeup event, a tamper event or a time-stamp event, without depending on
EricLew 0:80ee8f3b695e 299 an external interrupt (Auto-wakeup mode).
EricLew 0:80ee8f3b695e 300
EricLew 0:80ee8f3b695e 301 (+) RTC auto-wakeup (AWU) from the Stop, Standby and Shutdown modes
EricLew 0:80ee8f3b695e 302
EricLew 0:80ee8f3b695e 303
EricLew 0:80ee8f3b695e 304 (++) To wake up from the Stop mode with an RTC alarm event, it is necessary to
EricLew 0:80ee8f3b695e 305 configure the RTC to generate the RTC alarm using the HAL_RTC_SetAlarm_IT() function.
EricLew 0:80ee8f3b695e 306
EricLew 0:80ee8f3b695e 307 (++) To wake up from the Stop mode with an RTC Tamper or time stamp event, it
EricLew 0:80ee8f3b695e 308 is necessary to configure the RTC to detect the tamper or time stamp event using the
EricLew 0:80ee8f3b695e 309 HAL_RTCEx_SetTimeStamp_IT() or HAL_RTCEx_SetTamper_IT() functions.
EricLew 0:80ee8f3b695e 310
EricLew 0:80ee8f3b695e 311 (++) To wake up from the Stop mode with an RTC WakeUp event, it is necessary to
EricLew 0:80ee8f3b695e 312 configure the RTC to generate the RTC WakeUp event using the HAL_RTCEx_SetWakeUpTimer_IT() function.
EricLew 0:80ee8f3b695e 313
EricLew 0:80ee8f3b695e 314 @endverbatim
EricLew 0:80ee8f3b695e 315 * @{
EricLew 0:80ee8f3b695e 316 */
EricLew 0:80ee8f3b695e 317
EricLew 0:80ee8f3b695e 318
EricLew 0:80ee8f3b695e 319
EricLew 0:80ee8f3b695e 320 /**
EricLew 0:80ee8f3b695e 321 * @brief Configure the voltage threshold detected by the Power Voltage Detector (PVD).
EricLew 0:80ee8f3b695e 322 * @param sConfigPVD: pointer to a PWR_PVDTypeDef structure that contains the PVD
EricLew 0:80ee8f3b695e 323 * configuration information.
EricLew 0:80ee8f3b695e 324 * @note Refer to the electrical characteristics of your device datasheet for
EricLew 0:80ee8f3b695e 325 * more details about the voltage thresholds corresponding to each
EricLew 0:80ee8f3b695e 326 * detection level.
EricLew 0:80ee8f3b695e 327 * @retval None
EricLew 0:80ee8f3b695e 328 */
EricLew 0:80ee8f3b695e 329 HAL_StatusTypeDef HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD)
EricLew 0:80ee8f3b695e 330 {
EricLew 0:80ee8f3b695e 331 /* Check the parameters */
EricLew 0:80ee8f3b695e 332 assert_param(IS_PWR_PVD_LEVEL(sConfigPVD->PVDLevel));
EricLew 0:80ee8f3b695e 333 assert_param(IS_PWR_PVD_MODE(sConfigPVD->Mode));
EricLew 0:80ee8f3b695e 334
EricLew 0:80ee8f3b695e 335 /* Set PLS bits according to PVDLevel value */
EricLew 0:80ee8f3b695e 336 MODIFY_REG(PWR->CR2, PWR_CR2_PLS, sConfigPVD->PVDLevel);
EricLew 0:80ee8f3b695e 337
EricLew 0:80ee8f3b695e 338 /* Clear any previous config. Keep it clear if no event or IT mode is selected */
EricLew 0:80ee8f3b695e 339 __HAL_PWR_PVD_EXTI_DISABLE_EVENT();
EricLew 0:80ee8f3b695e 340 __HAL_PWR_PVD_EXTI_DISABLE_IT();
EricLew 0:80ee8f3b695e 341 __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();
EricLew 0:80ee8f3b695e 342 __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();
EricLew 0:80ee8f3b695e 343
EricLew 0:80ee8f3b695e 344 /* Configure interrupt mode */
EricLew 0:80ee8f3b695e 345 if((sConfigPVD->Mode & PVD_MODE_IT) == PVD_MODE_IT)
EricLew 0:80ee8f3b695e 346 {
EricLew 0:80ee8f3b695e 347 __HAL_PWR_PVD_EXTI_ENABLE_IT();
EricLew 0:80ee8f3b695e 348 }
EricLew 0:80ee8f3b695e 349
EricLew 0:80ee8f3b695e 350 /* Configure event mode */
EricLew 0:80ee8f3b695e 351 if((sConfigPVD->Mode & PVD_MODE_EVT) == PVD_MODE_EVT)
EricLew 0:80ee8f3b695e 352 {
EricLew 0:80ee8f3b695e 353 __HAL_PWR_PVD_EXTI_ENABLE_EVENT();
EricLew 0:80ee8f3b695e 354 }
EricLew 0:80ee8f3b695e 355
EricLew 0:80ee8f3b695e 356 /* Configure the edge */
EricLew 0:80ee8f3b695e 357 if((sConfigPVD->Mode & PVD_RISING_EDGE) == PVD_RISING_EDGE)
EricLew 0:80ee8f3b695e 358 {
EricLew 0:80ee8f3b695e 359 __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();
EricLew 0:80ee8f3b695e 360 }
EricLew 0:80ee8f3b695e 361
EricLew 0:80ee8f3b695e 362 if((sConfigPVD->Mode & PVD_FALLING_EDGE) == PVD_FALLING_EDGE)
EricLew 0:80ee8f3b695e 363 {
EricLew 0:80ee8f3b695e 364 __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();
EricLew 0:80ee8f3b695e 365 }
EricLew 0:80ee8f3b695e 366
EricLew 0:80ee8f3b695e 367 return HAL_OK;
EricLew 0:80ee8f3b695e 368 }
EricLew 0:80ee8f3b695e 369
EricLew 0:80ee8f3b695e 370
EricLew 0:80ee8f3b695e 371 /**
EricLew 0:80ee8f3b695e 372 * @brief Enable the Power Voltage Detector (PVD).
EricLew 0:80ee8f3b695e 373 * @retval None
EricLew 0:80ee8f3b695e 374 */
EricLew 0:80ee8f3b695e 375 void HAL_PWR_EnablePVD(void)
EricLew 0:80ee8f3b695e 376 {
EricLew 0:80ee8f3b695e 377 SET_BIT(PWR->CR2, PWR_CR2_PVDE);
EricLew 0:80ee8f3b695e 378 }
EricLew 0:80ee8f3b695e 379
EricLew 0:80ee8f3b695e 380 /**
EricLew 0:80ee8f3b695e 381 * @brief Disable the Power Voltage Detector (PVD).
EricLew 0:80ee8f3b695e 382 * @retval None
EricLew 0:80ee8f3b695e 383 */
EricLew 0:80ee8f3b695e 384 void HAL_PWR_DisablePVD(void)
EricLew 0:80ee8f3b695e 385 {
EricLew 0:80ee8f3b695e 386 CLEAR_BIT(PWR->CR2, PWR_CR2_PVDE);
EricLew 0:80ee8f3b695e 387 }
EricLew 0:80ee8f3b695e 388
EricLew 0:80ee8f3b695e 389
EricLew 0:80ee8f3b695e 390
EricLew 0:80ee8f3b695e 391
EricLew 0:80ee8f3b695e 392 /**
EricLew 0:80ee8f3b695e 393 * @brief Enable the WakeUp PINx functionality.
EricLew 0:80ee8f3b695e 394 * @param WakeUpPinPolarity: Specifies which Wake-Up pin to enable.
EricLew 0:80ee8f3b695e 395 * This parameter can be one of the following legacy values which set the default polarity
EricLew 0:80ee8f3b695e 396 * i.e. detection on high level (rising edge):
EricLew 0:80ee8f3b695e 397 * @arg PWR_WAKEUP_PIN1, PWR_WAKEUP_PIN2, PWR_WAKEUP_PIN3, PWR_WAKEUP_PIN4, PWR_WAKEUP_PIN5
EricLew 0:80ee8f3b695e 398 *
EricLew 0:80ee8f3b695e 399 * or one of the following value where the user can explicitly specify the enabled pin and
EricLew 0:80ee8f3b695e 400 * the chosen polarity:
EricLew 0:80ee8f3b695e 401 * @arg PWR_WAKEUP_PIN1_HIGH or PWR_WAKEUP_PIN1_LOW
EricLew 0:80ee8f3b695e 402 * @arg PWR_WAKEUP_PIN2_HIGH or PWR_WAKEUP_PIN2_LOW
EricLew 0:80ee8f3b695e 403 * @arg PWR_WAKEUP_PIN3_HIGH or PWR_WAKEUP_PIN3_LOW
EricLew 0:80ee8f3b695e 404 * @arg PWR_WAKEUP_PIN4_HIGH or PWR_WAKEUP_PIN4_LOW
EricLew 0:80ee8f3b695e 405 * @arg PWR_WAKEUP_PIN5_HIGH or PWR_WAKEUP_PIN5_LOW
EricLew 0:80ee8f3b695e 406 * @note PWR_WAKEUP_PINx and PWR_WAKEUP_PINx_HIGH are equivalent.
EricLew 0:80ee8f3b695e 407 * @retval None
EricLew 0:80ee8f3b695e 408 */
EricLew 0:80ee8f3b695e 409 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinPolarity)
EricLew 0:80ee8f3b695e 410 {
EricLew 0:80ee8f3b695e 411 assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinPolarity));
EricLew 0:80ee8f3b695e 412
EricLew 0:80ee8f3b695e 413 /* Specifies the Wake-Up pin polarity for the event detection
EricLew 0:80ee8f3b695e 414 (rising or falling edge) */
EricLew 0:80ee8f3b695e 415 MODIFY_REG(PWR->CR4, (PWR_CR3_EWUP & WakeUpPinPolarity), (WakeUpPinPolarity >> PWR_WUP_POLARITY_SHIFT));
EricLew 0:80ee8f3b695e 416
EricLew 0:80ee8f3b695e 417 /* Enable wake-up pin */
EricLew 0:80ee8f3b695e 418 SET_BIT(PWR->CR3, (PWR_CR3_EWUP & WakeUpPinPolarity));
EricLew 0:80ee8f3b695e 419
EricLew 0:80ee8f3b695e 420
EricLew 0:80ee8f3b695e 421 }
EricLew 0:80ee8f3b695e 422
EricLew 0:80ee8f3b695e 423 /**
EricLew 0:80ee8f3b695e 424 * @brief Disable the WakeUp PINx functionality.
EricLew 0:80ee8f3b695e 425 * @param WakeUpPinx: Specifies the Power Wake-Up pin to disable.
EricLew 0:80ee8f3b695e 426 * This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 427 * @arg PWR_WAKEUP_PIN1, PWR_WAKEUP_PIN2, PWR_WAKEUP_PIN3, PWR_WAKEUP_PIN4, PWR_WAKEUP_PIN5
EricLew 0:80ee8f3b695e 428 * @retval None
EricLew 0:80ee8f3b695e 429 */
EricLew 0:80ee8f3b695e 430 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx)
EricLew 0:80ee8f3b695e 431 {
EricLew 0:80ee8f3b695e 432 assert_param(IS_PWR_WAKEUP_PIN(WakeUpPinx));
EricLew 0:80ee8f3b695e 433
EricLew 0:80ee8f3b695e 434 CLEAR_BIT(PWR->CR3, WakeUpPinx);
EricLew 0:80ee8f3b695e 435 }
EricLew 0:80ee8f3b695e 436
EricLew 0:80ee8f3b695e 437
EricLew 0:80ee8f3b695e 438 /**
EricLew 0:80ee8f3b695e 439 * @brief Enter Sleep or Low-power Sleep mode.
EricLew 0:80ee8f3b695e 440 * @note In Sleep/Low-power Sleep mode, all I/O pins keep the same state as in Run mode.
EricLew 0:80ee8f3b695e 441 * @param Regulator: Specifies the regulator state in Sleep/Low-power Sleep mode.
EricLew 0:80ee8f3b695e 442 * This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 443 * @arg PWR_MAINREGULATOR_ON: Sleep mode (regulator in main mode)
EricLew 0:80ee8f3b695e 444 * @arg PWR_LOWPOWERREGULATOR_ON: Low-power Sleep mode (regulator in low-power mode)
EricLew 0:80ee8f3b695e 445 * @note Low-power Sleep mode is entered from Low-power Run mode. Therefore, if not yet
EricLew 0:80ee8f3b695e 446 * in Low-power Run mode before calling HAL_PWR_EnterSLEEPMode() with Regulator set
EricLew 0:80ee8f3b695e 447 * to PWR_LOWPOWERREGULATOR_ON, the user can optionally configure the
EricLew 0:80ee8f3b695e 448 * Flash in power-down monde in setting the SLEEP_PD bit in FLASH_ACR register.
EricLew 0:80ee8f3b695e 449 * Additionally, the clock frequency must be reduced below 2 MHz.
EricLew 0:80ee8f3b695e 450 * Setting SLEEP_PD in FLASH_ACR then appropriately reducing the clock frequency must
EricLew 0:80ee8f3b695e 451 * be done before calling HAL_PWR_EnterSLEEPMode() API.
EricLew 0:80ee8f3b695e 452 * @note When exiting Low-power Sleep mode, the MCU is in Low-power Run mode. To move in
EricLew 0:80ee8f3b695e 453 * Run mode, the user must resort to HAL_PWREx_DisableLowPowerRunMode() API.
EricLew 0:80ee8f3b695e 454 * @param SLEEPEntry: Specifies if Sleep mode is entered with WFI or WFE instruction.
EricLew 0:80ee8f3b695e 455 * This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 456 * @arg PWR_SLEEPENTRY_WFI: enter Sleep or Low-power Sleep mode with WFI instruction
EricLew 0:80ee8f3b695e 457 * @arg PWR_SLEEPENTRY_WFE: enter Sleep or Low-power Sleep mode with WFE instruction
EricLew 0:80ee8f3b695e 458 * @note When WFI entry is used, tick interrupt have to be disabled if not desired as
EricLew 0:80ee8f3b695e 459 * the interrupt wake up source.
EricLew 0:80ee8f3b695e 460 * @retval None
EricLew 0:80ee8f3b695e 461 */
EricLew 0:80ee8f3b695e 462 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry)
EricLew 0:80ee8f3b695e 463 {
EricLew 0:80ee8f3b695e 464 /* Check the parameters */
EricLew 0:80ee8f3b695e 465 assert_param(IS_PWR_REGULATOR(Regulator));
EricLew 0:80ee8f3b695e 466 assert_param(IS_PWR_SLEEP_ENTRY(SLEEPEntry));
EricLew 0:80ee8f3b695e 467
EricLew 0:80ee8f3b695e 468 /* Set Regulator parameter */
EricLew 0:80ee8f3b695e 469 if (Regulator == PWR_MAINREGULATOR_ON)
EricLew 0:80ee8f3b695e 470 {
EricLew 0:80ee8f3b695e 471 /* If in low-power run mode at this point, exit it */
EricLew 0:80ee8f3b695e 472 if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_REGLPF))
EricLew 0:80ee8f3b695e 473 {
EricLew 0:80ee8f3b695e 474 HAL_PWREx_DisableLowPowerRunMode();
EricLew 0:80ee8f3b695e 475 }
EricLew 0:80ee8f3b695e 476 /* Regulator now in main mode. */
EricLew 0:80ee8f3b695e 477 }
EricLew 0:80ee8f3b695e 478 else
EricLew 0:80ee8f3b695e 479 {
EricLew 0:80ee8f3b695e 480 /* If in run mode, first move to low-power run mode.
EricLew 0:80ee8f3b695e 481 The system clock frequency must be below 2 MHz at this point. */
EricLew 0:80ee8f3b695e 482 if (HAL_IS_BIT_SET(PWR->SR2, PWR_SR2_REGLPF) == RESET)
EricLew 0:80ee8f3b695e 483 {
EricLew 0:80ee8f3b695e 484 HAL_PWREx_EnableLowPowerRunMode();
EricLew 0:80ee8f3b695e 485 }
EricLew 0:80ee8f3b695e 486 }
EricLew 0:80ee8f3b695e 487
EricLew 0:80ee8f3b695e 488 /* Clear SLEEPDEEP bit of Cortex System Control Register */
EricLew 0:80ee8f3b695e 489 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
EricLew 0:80ee8f3b695e 490
EricLew 0:80ee8f3b695e 491 /* Select SLEEP mode entry -------------------------------------------------*/
EricLew 0:80ee8f3b695e 492 if(SLEEPEntry == PWR_SLEEPENTRY_WFI)
EricLew 0:80ee8f3b695e 493 {
EricLew 0:80ee8f3b695e 494 /* Request Wait For Interrupt */
EricLew 0:80ee8f3b695e 495 __WFI();
EricLew 0:80ee8f3b695e 496 }
EricLew 0:80ee8f3b695e 497 else
EricLew 0:80ee8f3b695e 498 {
EricLew 0:80ee8f3b695e 499 /* Request Wait For Event */
EricLew 0:80ee8f3b695e 500 __SEV();
EricLew 0:80ee8f3b695e 501 __WFE();
EricLew 0:80ee8f3b695e 502 __WFE();
EricLew 0:80ee8f3b695e 503 }
EricLew 0:80ee8f3b695e 504
EricLew 0:80ee8f3b695e 505 }
EricLew 0:80ee8f3b695e 506
EricLew 0:80ee8f3b695e 507
EricLew 0:80ee8f3b695e 508 /**
EricLew 0:80ee8f3b695e 509 * @brief Enter Stop 1 mode
EricLew 0:80ee8f3b695e 510 * @note This API is named HAL_PWR_EnterSTOPMode to ensure compatibility with legacy code running
EricLew 0:80ee8f3b695e 511 * on devices where only "Stop mode" is mentioned. On STM32L4, Stop 1 mode and Stop modes
EricLew 0:80ee8f3b695e 512 * are equivalent.
EricLew 0:80ee8f3b695e 513 * @note In Stop 1 mode, all I/O pins keep the same state as in Run mode.
EricLew 0:80ee8f3b695e 514 * @note All clocks in the VCORE domain are stopped; the PLL, the MSI,
EricLew 0:80ee8f3b695e 515 * the HSI and the HSE oscillators are disabled. Some peripherals with the wakeup capability
EricLew 0:80ee8f3b695e 516 * (I2Cx, USARTx and LPUART) can switch on the HSI to receive a frame, and switch off the HSI
EricLew 0:80ee8f3b695e 517 * after receiving the frame if it is not a wakeup frame. In this case, the HSI clock is propagated
EricLew 0:80ee8f3b695e 518 * only to the peripheral requesting it.
EricLew 0:80ee8f3b695e 519 * SRAM1, SRAM2 and register contents are preserved.
EricLew 0:80ee8f3b695e 520 * The BOR is available.
EricLew 0:80ee8f3b695e 521 * The voltage regulator can be configured either in normal or low-power mode.
EricLew 0:80ee8f3b695e 522 * @note When exiting Stop 1 mode by issuing an interrupt or a wakeup event,
EricLew 0:80ee8f3b695e 523 * the HSI RC oscillator is selected as system clock if STOPWUCK bit in RCC_CFGR register
EricLew 0:80ee8f3b695e 524 * is set; the MSI oscillator is selected if STOPWUCK is cleared.
EricLew 0:80ee8f3b695e 525 * @note When the voltage regulator operates in low power mode, an additional
EricLew 0:80ee8f3b695e 526 * startup delay is incurred when waking up from Stop 1 mode.
EricLew 0:80ee8f3b695e 527 * By keeping the internal regulator ON during Stop 1 mode, the consumption
EricLew 0:80ee8f3b695e 528 * is higher although the startup time is reduced.
EricLew 0:80ee8f3b695e 529 * @param Regulator: Specifies the regulator state in Stop 1 mode.
EricLew 0:80ee8f3b695e 530 * This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 531 * @arg PWR_MAINREGULATOR_ON: Stop 1 mode with regulator ON
EricLew 0:80ee8f3b695e 532 * @arg PWR_LOWPOWERREGULATOR_ON: Stop 1 mode with low power regulator ON
EricLew 0:80ee8f3b695e 533 * @param STOPEntry: Specifies if Stop 1 mode in entered with WFI or WFE instruction.
EricLew 0:80ee8f3b695e 534 * This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 535 * @arg PWR_STOPENTRY_WFI:Enter Stop 1 mode with WFI instruction
EricLew 0:80ee8f3b695e 536 * @arg PWR_STOPENTRY_WFE: Enter Stop 1 mode with WFE instruction
EricLew 0:80ee8f3b695e 537 * @retval None
EricLew 0:80ee8f3b695e 538 */
EricLew 0:80ee8f3b695e 539 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry)
EricLew 0:80ee8f3b695e 540 {
EricLew 0:80ee8f3b695e 541 HAL_PWREx_EnterSTOP1Mode(Regulator, STOPEntry);
EricLew 0:80ee8f3b695e 542 }
EricLew 0:80ee8f3b695e 543
EricLew 0:80ee8f3b695e 544 /**
EricLew 0:80ee8f3b695e 545 * @brief Enter Standby mode.
EricLew 0:80ee8f3b695e 546 * @note In Standby mode, the PLL, the HSI, the MSI and the HSE oscillators are switched
EricLew 0:80ee8f3b695e 547 * off. The voltage regulator is disabled, except when SRAM2 content is preserved
EricLew 0:80ee8f3b695e 548 * in which case the regulator is in low-power mode.
EricLew 0:80ee8f3b695e 549 * SRAM1 and register contents are lost except for registers in the Backup domain and
EricLew 0:80ee8f3b695e 550 * Standby circuitry. SRAM2 content can be preserved if the bit RRS is set in PWR_CR3 register.
EricLew 0:80ee8f3b695e 551 * To enable this feature, the user can resort to HAL_PWREx_EnableSRAM2ContentRetention() API
EricLew 0:80ee8f3b695e 552 * to set RRS bit.
EricLew 0:80ee8f3b695e 553 * The BOR is available.
EricLew 0:80ee8f3b695e 554 * @note The I/Os can be configured either with a pull-up or pull-down or can be kept in analog state.
EricLew 0:80ee8f3b695e 555 * HAL_PWREx_EnableGPIOPullUp() and HAL_PWREx_EnableGPIOPullDown() respectively enable Pull Up and
EricLew 0:80ee8f3b695e 556 * Pull Down state, HAL_PWREx_DisableGPIOPullUp() and HAL_PWREx_DisableGPIOPullDown() disable the
EricLew 0:80ee8f3b695e 557 * same.
EricLew 0:80ee8f3b695e 558 * These states are effective in Standby mode only if APC bit is set through
EricLew 0:80ee8f3b695e 559 * HAL_PWREx_EnablePullUpPullDownConfig() API.
EricLew 0:80ee8f3b695e 560 * @retval None
EricLew 0:80ee8f3b695e 561 */
EricLew 0:80ee8f3b695e 562 void HAL_PWR_EnterSTANDBYMode(void)
EricLew 0:80ee8f3b695e 563 {
EricLew 0:80ee8f3b695e 564 /* Set Stand-by mode */
EricLew 0:80ee8f3b695e 565 MODIFY_REG(PWR->CR1, PWR_CR1_LPMS, PWR_CR1_LPMS_STANDBY);
EricLew 0:80ee8f3b695e 566
EricLew 0:80ee8f3b695e 567 /* Set SLEEPDEEP bit of Cortex System Control Register */
EricLew 0:80ee8f3b695e 568 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPDEEP_Msk));
EricLew 0:80ee8f3b695e 569
EricLew 0:80ee8f3b695e 570 /* This option is used to ensure that store operations are completed */
EricLew 0:80ee8f3b695e 571 #if defined ( __CC_ARM)
EricLew 0:80ee8f3b695e 572 __force_stores();
EricLew 0:80ee8f3b695e 573 #endif
EricLew 0:80ee8f3b695e 574 /* Request Wait For Interrupt */
EricLew 0:80ee8f3b695e 575 __WFI();
EricLew 0:80ee8f3b695e 576 }
EricLew 0:80ee8f3b695e 577
EricLew 0:80ee8f3b695e 578
EricLew 0:80ee8f3b695e 579
EricLew 0:80ee8f3b695e 580 /**
EricLew 0:80ee8f3b695e 581 * @brief Indicate Sleep-On-Exit when returning from Handler mode to Thread mode.
EricLew 0:80ee8f3b695e 582 * @note Set SLEEPONEXIT bit of SCR register. When this bit is set, the processor
EricLew 0:80ee8f3b695e 583 * re-enters SLEEP mode when an interruption handling is over.
EricLew 0:80ee8f3b695e 584 * Setting this bit is useful when the processor is expected to run only on
EricLew 0:80ee8f3b695e 585 * interruptions handling.
EricLew 0:80ee8f3b695e 586 * @retval None
EricLew 0:80ee8f3b695e 587 */
EricLew 0:80ee8f3b695e 588 void HAL_PWR_EnableSleepOnExit(void)
EricLew 0:80ee8f3b695e 589 {
EricLew 0:80ee8f3b695e 590 /* Set SLEEPONEXIT bit of Cortex System Control Register */
EricLew 0:80ee8f3b695e 591 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
EricLew 0:80ee8f3b695e 592 }
EricLew 0:80ee8f3b695e 593
EricLew 0:80ee8f3b695e 594
EricLew 0:80ee8f3b695e 595 /**
EricLew 0:80ee8f3b695e 596 * @brief Disable Sleep-On-Exit feature when returning from Handler mode to Thread mode.
EricLew 0:80ee8f3b695e 597 * @note Clear SLEEPONEXIT bit of SCR register. When this bit is set, the processor
EricLew 0:80ee8f3b695e 598 * re-enters SLEEP mode when an interruption handling is over.
EricLew 0:80ee8f3b695e 599 * @retval None
EricLew 0:80ee8f3b695e 600 */
EricLew 0:80ee8f3b695e 601 void HAL_PWR_DisableSleepOnExit(void)
EricLew 0:80ee8f3b695e 602 {
EricLew 0:80ee8f3b695e 603 /* Clear SLEEPONEXIT bit of Cortex System Control Register */
EricLew 0:80ee8f3b695e 604 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SLEEPONEXIT_Msk));
EricLew 0:80ee8f3b695e 605 }
EricLew 0:80ee8f3b695e 606
EricLew 0:80ee8f3b695e 607
EricLew 0:80ee8f3b695e 608
EricLew 0:80ee8f3b695e 609 /**
EricLew 0:80ee8f3b695e 610 * @brief Enable CORTEX M4 SEVONPEND bit.
EricLew 0:80ee8f3b695e 611 * @note Set SEVONPEND bit of SCR register. When this bit is set, this causes
EricLew 0:80ee8f3b695e 612 * WFE to wake up when an interrupt moves from inactive to pended.
EricLew 0:80ee8f3b695e 613 * @retval None
EricLew 0:80ee8f3b695e 614 */
EricLew 0:80ee8f3b695e 615 void HAL_PWR_EnableSEVOnPend(void)
EricLew 0:80ee8f3b695e 616 {
EricLew 0:80ee8f3b695e 617 /* Set SEVONPEND bit of Cortex System Control Register */
EricLew 0:80ee8f3b695e 618 SET_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
EricLew 0:80ee8f3b695e 619 }
EricLew 0:80ee8f3b695e 620
EricLew 0:80ee8f3b695e 621
EricLew 0:80ee8f3b695e 622 /**
EricLew 0:80ee8f3b695e 623 * @brief Disable CORTEX M4 SEVONPEND bit.
EricLew 0:80ee8f3b695e 624 * @note Clear SEVONPEND bit of SCR register. When this bit is set, this causes
EricLew 0:80ee8f3b695e 625 * WFE to wake up when an interrupt moves from inactive to pended.
EricLew 0:80ee8f3b695e 626 * @retval None
EricLew 0:80ee8f3b695e 627 */
EricLew 0:80ee8f3b695e 628 void HAL_PWR_DisableSEVOnPend(void)
EricLew 0:80ee8f3b695e 629 {
EricLew 0:80ee8f3b695e 630 /* Clear SEVONPEND bit of Cortex System Control Register */
EricLew 0:80ee8f3b695e 631 CLEAR_BIT(SCB->SCR, ((uint32_t)SCB_SCR_SEVONPEND_Msk));
EricLew 0:80ee8f3b695e 632 }
EricLew 0:80ee8f3b695e 633
EricLew 0:80ee8f3b695e 634
EricLew 0:80ee8f3b695e 635
EricLew 0:80ee8f3b695e 636
EricLew 0:80ee8f3b695e 637
EricLew 0:80ee8f3b695e 638 /**
EricLew 0:80ee8f3b695e 639 * @brief PWR PVD interrupt callback
EricLew 0:80ee8f3b695e 640 * @retval None
EricLew 0:80ee8f3b695e 641 */
EricLew 0:80ee8f3b695e 642 __weak void HAL_PWR_PVDCallback(void)
EricLew 0:80ee8f3b695e 643 {
EricLew 0:80ee8f3b695e 644 /* NOTE : This function should not be modified; when the callback is needed,
EricLew 0:80ee8f3b695e 645 the HAL_PWR_PVDCallback can be implemented in the user file
EricLew 0:80ee8f3b695e 646 */
EricLew 0:80ee8f3b695e 647 }
EricLew 0:80ee8f3b695e 648
EricLew 0:80ee8f3b695e 649 /**
EricLew 0:80ee8f3b695e 650 * @}
EricLew 0:80ee8f3b695e 651 */
EricLew 0:80ee8f3b695e 652
EricLew 0:80ee8f3b695e 653 /**
EricLew 0:80ee8f3b695e 654 * @}
EricLew 0:80ee8f3b695e 655 */
EricLew 0:80ee8f3b695e 656
EricLew 0:80ee8f3b695e 657 #endif /* HAL_PWR_MODULE_ENABLED */
EricLew 0:80ee8f3b695e 658 /**
EricLew 0:80ee8f3b695e 659 * @}
EricLew 0:80ee8f3b695e 660 */
EricLew 0:80ee8f3b695e 661
EricLew 0:80ee8f3b695e 662 /**
EricLew 0:80ee8f3b695e 663 * @}
EricLew 0:80ee8f3b695e 664 */
EricLew 0:80ee8f3b695e 665
EricLew 0:80ee8f3b695e 666 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
EricLew 0:80ee8f3b695e 667