STM32L4xx_HAL_Driver - Hal Drivers for L4

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Hal Drivers for L4

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Fork of STM32L4xx_HAL_Driver by Senior Design: Sound Monitor

Inc/stm32l4xx_ll_lpuart.h@2:7aef7655b0a8, 2015-11-25 (annotated)

Committer:: EricLew
Date:: Wed Nov 25 17:30:43 2015 +0000
Revision:: 2:7aef7655b0a8
Parent:: 0:80ee8f3b695e

commit;

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User	Revision	Line number	New contents of line
EricLew	0:80ee8f3b695e	1	/**
EricLew	0:80ee8f3b695e	2	******************************************************************************
EricLew	0:80ee8f3b695e	3	* @file stm32l4xx_ll_lpuart.h
EricLew	0:80ee8f3b695e	4	* @author MCD Application Team
EricLew	0:80ee8f3b695e	5	* @version V1.1.0
EricLew	0:80ee8f3b695e	6	* @date 16-September-2015
EricLew	0:80ee8f3b695e	7	* @brief Header file of LPUART LL module.
EricLew	0:80ee8f3b695e	8	******************************************************************************
EricLew	0:80ee8f3b695e	9	* @attention
EricLew	0:80ee8f3b695e	10	*
EricLew	0:80ee8f3b695e	11	* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
EricLew	0:80ee8f3b695e	12	*
EricLew	0:80ee8f3b695e	13	* Redistribution and use in source and binary forms, with or without modification,
EricLew	0:80ee8f3b695e	14	* are permitted provided that the following conditions are met:
EricLew	0:80ee8f3b695e	15	* 1. Redistributions of source code must retain the above copyright notice,
EricLew	0:80ee8f3b695e	16	* this list of conditions and the following disclaimer.
EricLew	0:80ee8f3b695e	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
EricLew	0:80ee8f3b695e	18	* this list of conditions and the following disclaimer in the documentation
EricLew	0:80ee8f3b695e	19	* and/or other materials provided with the distribution.
EricLew	0:80ee8f3b695e	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
EricLew	0:80ee8f3b695e	21	* may be used to endorse or promote products derived from this software
EricLew	0:80ee8f3b695e	22	* without specific prior written permission.
EricLew	0:80ee8f3b695e	23	*
EricLew	0:80ee8f3b695e	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
EricLew	0:80ee8f3b695e	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
EricLew	0:80ee8f3b695e	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
EricLew	0:80ee8f3b695e	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
EricLew	0:80ee8f3b695e	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
EricLew	0:80ee8f3b695e	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
EricLew	0:80ee8f3b695e	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
EricLew	0:80ee8f3b695e	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
EricLew	0:80ee8f3b695e	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
EricLew	0:80ee8f3b695e	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
EricLew	0:80ee8f3b695e	34	*
EricLew	0:80ee8f3b695e	35	******************************************************************************
EricLew	0:80ee8f3b695e	36	*/
EricLew	0:80ee8f3b695e	37
EricLew	0:80ee8f3b695e	38	/* Define to prevent recursive inclusion -------------------------------------*/
EricLew	0:80ee8f3b695e	39	#ifndef __STM32L4xx_LL_LPUART_H
EricLew	0:80ee8f3b695e	40	#define __STM32L4xx_LL_LPUART_H
EricLew	0:80ee8f3b695e	41
EricLew	0:80ee8f3b695e	42	#ifdef __cplusplus
EricLew	0:80ee8f3b695e	43	extern "C" {
EricLew	0:80ee8f3b695e	44	#endif
EricLew	0:80ee8f3b695e	45
EricLew	0:80ee8f3b695e	46	/* Includes ------------------------------------------------------------------*/
EricLew	0:80ee8f3b695e	47	#include "stm32l4xx.h"
EricLew	0:80ee8f3b695e	48
EricLew	0:80ee8f3b695e	49	/** @addtogroup STM32L4xx_LL_Driver
EricLew	0:80ee8f3b695e	50	* @{
EricLew	0:80ee8f3b695e	51	*/
EricLew	0:80ee8f3b695e	52
EricLew	0:80ee8f3b695e	53	#if defined (LPUART1)
EricLew	0:80ee8f3b695e	54
EricLew	0:80ee8f3b695e	55	/** @defgroup LPUART_LL LPUART
EricLew	0:80ee8f3b695e	56	* @{
EricLew	0:80ee8f3b695e	57	*/
EricLew	0:80ee8f3b695e	58
EricLew	0:80ee8f3b695e	59	/* Private types -------------------------------------------------------------*/
EricLew	0:80ee8f3b695e	60	/* Private variables ---------------------------------------------------------*/
EricLew	0:80ee8f3b695e	61
EricLew	0:80ee8f3b695e	62	/* Private constants ---------------------------------------------------------*/
EricLew	0:80ee8f3b695e	63	/** @defgroup LPUART_LL_Private_Constants LPUART Private Constants
EricLew	0:80ee8f3b695e	64	* @{
EricLew	0:80ee8f3b695e	65	*/
EricLew	0:80ee8f3b695e	66
EricLew	0:80ee8f3b695e	67	/* Defines used for the bit position in the register and perform offsets*/
EricLew	0:80ee8f3b695e	68	#define LPUART_POSITION_CR1_DEDT (uint32_t)POSITION_VAL(USART_CR1_DEDT)
EricLew	0:80ee8f3b695e	69	#define LPUART_POSITION_CR1_DEAT (uint32_t)POSITION_VAL(USART_CR1_DEAT)
EricLew	0:80ee8f3b695e	70	#define LPUART_POSITION_CR2_ADD (uint32_t)POSITION_VAL(USART_CR2_ADD)
EricLew	0:80ee8f3b695e	71
EricLew	0:80ee8f3b695e	72	/* Defines used in Baudrate related macros and corresponding register setting computation */
EricLew	0:80ee8f3b695e	73	#define LPUART_LPUARTDIV_FREQ_MUL (uint32_t)(256)
EricLew	0:80ee8f3b695e	74	#define LPUART_BRR_MASK (uint32_t)(0x000FFFFF)
EricLew	0:80ee8f3b695e	75	/**
EricLew	0:80ee8f3b695e	76	* @}
EricLew	0:80ee8f3b695e	77	*/
EricLew	0:80ee8f3b695e	78
EricLew	0:80ee8f3b695e	79
EricLew	0:80ee8f3b695e	80	/* Private macros ------------------------------------------------------------*/
EricLew	0:80ee8f3b695e	81
EricLew	0:80ee8f3b695e	82	/* Exported types ------------------------------------------------------------*/
EricLew	0:80ee8f3b695e	83	/* Exported constants --------------------------------------------------------*/
EricLew	0:80ee8f3b695e	84	/** @defgroup LPUART_LL_Exported_Constants LPUART Exported Constants
EricLew	0:80ee8f3b695e	85	* @{
EricLew	0:80ee8f3b695e	86	*/
EricLew	0:80ee8f3b695e	87
EricLew	0:80ee8f3b695e	88	/** @defgroup LPUART_LL_EC_CLEAR_FLAG Clear Flags Defines
EricLew	0:80ee8f3b695e	89	* @brief Flags defines which can be used with LL_LPUART_WriteReg function
EricLew	0:80ee8f3b695e	90	* @{
EricLew	0:80ee8f3b695e	91	*/
EricLew	0:80ee8f3b695e	92	#define LL_LPUART_ICR_PECF USART_ICR_PECF
EricLew	0:80ee8f3b695e	93	#define LL_LPUART_ICR_FECF USART_ICR_FECF
EricLew	0:80ee8f3b695e	94	#define LL_LPUART_ICR_NCF USART_ICR_NCF
EricLew	0:80ee8f3b695e	95	#define LL_LPUART_ICR_ORECF USART_ICR_ORECF
EricLew	0:80ee8f3b695e	96	#define LL_LPUART_ICR_IDLECF USART_ICR_IDLECF
EricLew	0:80ee8f3b695e	97	#define LL_LPUART_ICR_TCCF USART_ICR_TCCF
EricLew	0:80ee8f3b695e	98	#define LL_LPUART_ICR_CTSCF USART_ICR_CTSCF
EricLew	0:80ee8f3b695e	99	#define LL_LPUART_ICR_CMCF USART_ICR_CMCF
EricLew	0:80ee8f3b695e	100	#define LL_LPUART_ICR_WUCF USART_ICR_WUCF
EricLew	0:80ee8f3b695e	101	/**
EricLew	0:80ee8f3b695e	102	* @}
EricLew	0:80ee8f3b695e	103	*/
EricLew	0:80ee8f3b695e	104
EricLew	0:80ee8f3b695e	105	/** @defgroup LPUART_LL_EC_GET_FLAG Get Flags Defines
EricLew	0:80ee8f3b695e	106	* @brief Flags defines which can be used with LL_LPUART_ReadReg function
EricLew	0:80ee8f3b695e	107	* @{
EricLew	0:80ee8f3b695e	108	*/
EricLew	0:80ee8f3b695e	109	#define LL_LPUART_ISR_PE USART_ISR_PE
EricLew	0:80ee8f3b695e	110	#define LL_LPUART_ISR_FE USART_ISR_FE
EricLew	0:80ee8f3b695e	111	#define LL_LPUART_ISR_NE USART_ISR_NE
EricLew	0:80ee8f3b695e	112	#define LL_LPUART_ISR_ORE USART_ISR_ORE
EricLew	0:80ee8f3b695e	113	#define LL_LPUART_ISR_IDLE USART_ISR_IDLE
EricLew	0:80ee8f3b695e	114	#define LL_LPUART_ISR_RXNE USART_ISR_RXNE
EricLew	0:80ee8f3b695e	115	#define LL_LPUART_ISR_TC USART_ISR_TC
EricLew	0:80ee8f3b695e	116	#define LL_LPUART_ISR_TXE USART_ISR_TXE
EricLew	0:80ee8f3b695e	117	#define LL_LPUART_ISR_CTSIF USART_ISR_CTSIF
EricLew	0:80ee8f3b695e	118	#define LL_LPUART_ISR_CTS USART_ISR_CTS
EricLew	0:80ee8f3b695e	119	#define LL_LPUART_ISR_BUSY USART_ISR_BUSY
EricLew	0:80ee8f3b695e	120	#define LL_LPUART_ISR_CMF USART_ISR_CMF
EricLew	0:80ee8f3b695e	121	#define LL_LPUART_ISR_SBKF USART_ISR_SBKF
EricLew	0:80ee8f3b695e	122	#define LL_LPUART_ISR_RWU USART_ISR_RWU
EricLew	0:80ee8f3b695e	123	#define LL_LPUART_ISR_WUF USART_ISR_WUF
EricLew	0:80ee8f3b695e	124	#define LL_LPUART_ISR_TEACK USART_ISR_TEACK
EricLew	0:80ee8f3b695e	125	#define LL_LPUART_ISR_REACK USART_ISR_REACK
EricLew	0:80ee8f3b695e	126	/**
EricLew	0:80ee8f3b695e	127	* @}
EricLew	0:80ee8f3b695e	128	*/
EricLew	0:80ee8f3b695e	129
EricLew	0:80ee8f3b695e	130	/** @defgroup LPUART_LL_EC_IT IT Defines
EricLew	0:80ee8f3b695e	131	* @brief IT defines which can be used with LL_LPUART_ReadReg and LL_LPUART_WriteReg functions
EricLew	0:80ee8f3b695e	132	* @{
EricLew	0:80ee8f3b695e	133	*/
EricLew	0:80ee8f3b695e	134	#define LL_LPUART_CR1_IDLEIE USART_CR1_IDLEIE
EricLew	0:80ee8f3b695e	135	#define LL_LPUART_CR1_RXNEIE USART_CR1_RXNEIE
EricLew	0:80ee8f3b695e	136	#define LL_LPUART_CR1_TCIE USART_CR1_TCIE
EricLew	0:80ee8f3b695e	137	#define LL_LPUART_CR1_TXEIE USART_CR1_TXEIE
EricLew	0:80ee8f3b695e	138	#define LL_LPUART_CR1_PEIE USART_CR1_PEIE
EricLew	0:80ee8f3b695e	139	#define LL_LPUART_CR1_CMIE USART_CR1_CMIE
EricLew	0:80ee8f3b695e	140	#define LL_LPUART_CR3_EIE USART_CR3_EIE
EricLew	0:80ee8f3b695e	141	#define LL_LPUART_CR3_CTSIE USART_CR3_CTSIE
EricLew	0:80ee8f3b695e	142	#define LL_LPUART_CR3_WUFIE USART_CR3_WUFIE
EricLew	0:80ee8f3b695e	143	/**
EricLew	0:80ee8f3b695e	144	* @}
EricLew	0:80ee8f3b695e	145	*/
EricLew	0:80ee8f3b695e	146
EricLew	0:80ee8f3b695e	147	/** @defgroup LPUART_LL_EC_DIRECTION DIRECTION
EricLew	0:80ee8f3b695e	148	* @{
EricLew	0:80ee8f3b695e	149	*/
EricLew	0:80ee8f3b695e	150	#define LL_LPUART_DIRECTION_NONE (uint32_t)0x00000000 /!< Transmitter and Receiver are disabled /
EricLew	0:80ee8f3b695e	151	#define LL_LPUART_DIRECTION_RX USART_CR1_RE /!< Transmitter is disabled and Receiver is enabled /
EricLew	0:80ee8f3b695e	152	#define LL_LPUART_DIRECTION_TX USART_CR1_TE /!< Transmitter is enabled and Receiver is disabled /
EricLew	0:80ee8f3b695e	153	#define LL_LPUART_DIRECTION_TX_RX (USART_CR1_TE \|USART_CR1_RE) /!< Transmitter and Receiver are enabled /
EricLew	0:80ee8f3b695e	154	/**
EricLew	0:80ee8f3b695e	155	* @}
EricLew	0:80ee8f3b695e	156	*/
EricLew	0:80ee8f3b695e	157
EricLew	0:80ee8f3b695e	158	/** @defgroup LPUART_LL_EC_PARITY PARITY
EricLew	0:80ee8f3b695e	159	* @{
EricLew	0:80ee8f3b695e	160	*/
EricLew	0:80ee8f3b695e	161	#define LL_LPUART_PARITY_NONE (uint32_t)0x00000000 /!< Parity control disabled /
EricLew	0:80ee8f3b695e	162	#define LL_LPUART_PARITY_EVEN USART_CR1_PCE /!< Parity control enabled and Even Parity is selected /
EricLew	0:80ee8f3b695e	163	#define LL_LPUART_PARITY_ODD (USART_CR1_PCE \| USART_CR1_PS) /!< Parity control enabled and Odd Parity is selected /
EricLew	0:80ee8f3b695e	164	/**
EricLew	0:80ee8f3b695e	165	* @}
EricLew	0:80ee8f3b695e	166	*/
EricLew	0:80ee8f3b695e	167
EricLew	0:80ee8f3b695e	168	/** @defgroup LPUART_LL_EC_WAKEUP WAKEUP
EricLew	0:80ee8f3b695e	169	* @{
EricLew	0:80ee8f3b695e	170	*/
EricLew	0:80ee8f3b695e	171	#define LL_LPUART_WAKEUP_IDLELINE (uint32_t)0x00000000 /!< LPUART wakeup from Mute mode on Idle Line /
EricLew	0:80ee8f3b695e	172	#define LL_LPUART_WAKEUP_ADDRESSMARK USART_CR1_WAKE /!< LPUART wakeup from Mute mode on Address Mark /
EricLew	0:80ee8f3b695e	173	/**
EricLew	0:80ee8f3b695e	174	* @}
EricLew	0:80ee8f3b695e	175	*/
EricLew	0:80ee8f3b695e	176
EricLew	0:80ee8f3b695e	177	/** @defgroup LPUART_LL_EC_DATAWIDTH DATAWIDTH
EricLew	0:80ee8f3b695e	178	* @{
EricLew	0:80ee8f3b695e	179	*/
EricLew	0:80ee8f3b695e	180	#define LL_LPUART_DATAWIDTH_7B USART_CR1_M1 /!< 7 bits word length : Start bit, 7 data bits, n stop bits /
EricLew	0:80ee8f3b695e	181	#define LL_LPUART_DATAWIDTH_8B (uint32_t)0x00000000 /!< 8 bits word length : Start bit, 8 data bits, n stop bits /
EricLew	0:80ee8f3b695e	182	#define LL_LPUART_DATAWIDTH_9B USART_CR1_M0 /!< 9 bits word length : Start bit, 9 data bits, n stop bits /
EricLew	0:80ee8f3b695e	183	/**
EricLew	0:80ee8f3b695e	184	* @}
EricLew	0:80ee8f3b695e	185	*/
EricLew	0:80ee8f3b695e	186
EricLew	0:80ee8f3b695e	187	/** @defgroup LPUART_LL_EC_STOPBITS STOPBITS
EricLew	0:80ee8f3b695e	188	* @{
EricLew	0:80ee8f3b695e	189	*/
EricLew	0:80ee8f3b695e	190	#define LL_LPUART_STOPBITS_1 (uint32_t)0x00000000 /!< 1 stop bit /
EricLew	0:80ee8f3b695e	191	#define LL_LPUART_STOPBITS_2 USART_CR2_STOP_1 /!< 2 stop bits /
EricLew	0:80ee8f3b695e	192	/**
EricLew	0:80ee8f3b695e	193	* @}
EricLew	0:80ee8f3b695e	194	*/
EricLew	0:80ee8f3b695e	195
EricLew	0:80ee8f3b695e	196	/** @defgroup LPUART_LL_EC_TXRX TXRX
EricLew	0:80ee8f3b695e	197	* @{
EricLew	0:80ee8f3b695e	198	*/
EricLew	0:80ee8f3b695e	199	#define LL_LPUART_TXRX_STANDARD (uint32_t)0x00000000 /!< TX/RX pins are used as defined in standard pinout /
EricLew	0:80ee8f3b695e	200	#define LL_LPUART_TXRX_SWAPPED (USART_CR2_SWAP) /!< TX and RX pins functions are swapped. /
EricLew	0:80ee8f3b695e	201	/**
EricLew	0:80ee8f3b695e	202	* @}
EricLew	0:80ee8f3b695e	203	*/
EricLew	0:80ee8f3b695e	204
EricLew	0:80ee8f3b695e	205	/** @defgroup LPUART_LL_EC_RXPIN_LEVEL RXPIN LEVEL
EricLew	0:80ee8f3b695e	206	* @{
EricLew	0:80ee8f3b695e	207	*/
EricLew	0:80ee8f3b695e	208	#define LL_LPUART_RXPIN_LEVEL_STANDARD (uint32_t)0x00000000 /!< RX pin signal works using the standard logic levels /
EricLew	0:80ee8f3b695e	209	#define LL_LPUART_RXPIN_LEVEL_INVERTED (USART_CR2_RXINV) /!< RX pin signal values are inverted. /
EricLew	0:80ee8f3b695e	210	/**
EricLew	0:80ee8f3b695e	211	* @}
EricLew	0:80ee8f3b695e	212	*/
EricLew	0:80ee8f3b695e	213
EricLew	0:80ee8f3b695e	214	/** @defgroup LPUART_LL_EC_TXPIN_LEVEL TXPIN LEVEL
EricLew	0:80ee8f3b695e	215	* @{
EricLew	0:80ee8f3b695e	216	*/
EricLew	0:80ee8f3b695e	217	#define LL_LPUART_TXPIN_LEVEL_STANDARD (uint32_t)0x00000000 /!< TX pin signal works using the standard logic levels /
EricLew	0:80ee8f3b695e	218	#define LL_LPUART_TXPIN_LEVEL_INVERTED (USART_CR2_TXINV) /!< TX pin signal values are inverted. /
EricLew	0:80ee8f3b695e	219	/**
EricLew	0:80ee8f3b695e	220	* @}
EricLew	0:80ee8f3b695e	221	*/
EricLew	0:80ee8f3b695e	222
EricLew	0:80ee8f3b695e	223	/** @defgroup LPUART_LL_EC_BINARY_LOGIC BINARY LOGIC
EricLew	0:80ee8f3b695e	224	* @{
EricLew	0:80ee8f3b695e	225	*/
EricLew	0:80ee8f3b695e	226	#define LL_LPUART_BINARY_LOGIC_POSITIVE (uint32_t)0x00000000 /!< Logical data from the data register are send/received in positive/direct logic. (1=H, 0=L) /
EricLew	0:80ee8f3b695e	227	#define LL_LPUART_BINARY_LOGIC_NEGATIVE USART_CR2_DATAINV /!< Logical data from the data register are send/received in negative/inverse logic. (1=L, 0=H). The parity bit is also inverted. /
EricLew	0:80ee8f3b695e	228	/**
EricLew	0:80ee8f3b695e	229	* @}
EricLew	0:80ee8f3b695e	230	*/
EricLew	0:80ee8f3b695e	231
EricLew	0:80ee8f3b695e	232	/** @defgroup LPUART_LL_EC_BITORDER BITORDER
EricLew	0:80ee8f3b695e	233	* @{
EricLew	0:80ee8f3b695e	234	*/
EricLew	0:80ee8f3b695e	235	#define LL_LPUART_BITORDER_LSBFIRST (uint32_t)0x00000000 /!< data is transmitted/received with data bit 0 first, following the start bit /
EricLew	0:80ee8f3b695e	236	#define LL_LPUART_BITORDER_MSBFIRST USART_CR2_MSBFIRST /!< data is transmitted/received with the MSB first, following the start bit /
EricLew	0:80ee8f3b695e	237	/**
EricLew	0:80ee8f3b695e	238	* @}
EricLew	0:80ee8f3b695e	239	*/
EricLew	0:80ee8f3b695e	240
EricLew	0:80ee8f3b695e	241	/** @defgroup LPUART_LL_EC_ADDRESS_DETECT ADDRESS DETECT
EricLew	0:80ee8f3b695e	242	* @{
EricLew	0:80ee8f3b695e	243	*/
EricLew	0:80ee8f3b695e	244	#define LL_LPUART_ADDRESS_DETECT_4B (uint32_t)0x00000000 /!< 4-bit address detection method selected /
EricLew	0:80ee8f3b695e	245	#define LL_LPUART_ADDRESS_DETECT_7B USART_CR2_ADDM7 /!< 7-bit address detection (in 8-bit data mode) method selected /
EricLew	0:80ee8f3b695e	246	/**
EricLew	0:80ee8f3b695e	247	* @}
EricLew	0:80ee8f3b695e	248	*/
EricLew	0:80ee8f3b695e	249
EricLew	0:80ee8f3b695e	250	/** @defgroup LPUART_LL_EC_HWCONTROL HWCONTROL
EricLew	0:80ee8f3b695e	251	* @{
EricLew	0:80ee8f3b695e	252	*/
EricLew	0:80ee8f3b695e	253	#define LL_LPUART_HWCONTROL_NONE (uint32_t)0x00000000 /!< CTS and RTS hardware flow control disabled /
EricLew	0:80ee8f3b695e	254	#define LL_LPUART_HWCONTROL_RTS USART_CR3_RTSE /!< RTS output enabled, data is only requested when there is space in the receive buffer /
EricLew	0:80ee8f3b695e	255	#define LL_LPUART_HWCONTROL_CTS USART_CR3_CTSE /!< CTS mode enabled, data is only transmitted when the nCTS input is asserted (tied to 0) /
EricLew	0:80ee8f3b695e	256	#define LL_LPUART_HWCONTROL_RTS_CTS (USART_CR3_RTSE \| USART_CR3_CTSE) /!< CTS and RTS hardware flow control enabled /
EricLew	0:80ee8f3b695e	257	/**
EricLew	0:80ee8f3b695e	258	* @}
EricLew	0:80ee8f3b695e	259	*/
EricLew	0:80ee8f3b695e	260
EricLew	0:80ee8f3b695e	261	/** @defgroup LPUART_LL_EC_WAKEUP_ON WAKEUP ON
EricLew	0:80ee8f3b695e	262	* @{
EricLew	0:80ee8f3b695e	263	*/
EricLew	0:80ee8f3b695e	264	#define LL_LPUART_WAKEUP_ON_ADDRESS (uint32_t)0x00000000 /!< Wakeup active on address match /
EricLew	0:80ee8f3b695e	265	#define LL_LPUART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /!< Wakeup active on Start bit detection /
EricLew	0:80ee8f3b695e	266	#define LL_LPUART_WAKEUP_ON_RXNE (USART_CR3_WUS_0 \| USART_CR3_WUS_1) /!< Wakeup active on RXNE /
EricLew	0:80ee8f3b695e	267	/**
EricLew	0:80ee8f3b695e	268	* @}
EricLew	0:80ee8f3b695e	269	*/
EricLew	0:80ee8f3b695e	270
EricLew	0:80ee8f3b695e	271	/** @defgroup LPUART_LL_EC_DE_POLARITY DE POLARITY
EricLew	0:80ee8f3b695e	272	* @{
EricLew	0:80ee8f3b695e	273	*/
EricLew	0:80ee8f3b695e	274	#define LL_LPUART_DE_POLARITY_HIGH (uint32_t)0x00000000 /!< DE signal is active high /
EricLew	0:80ee8f3b695e	275	#define LL_LPUART_DE_POLARITY_LOW USART_CR3_DEP /!< DE signal is active low /
EricLew	0:80ee8f3b695e	276	/**
EricLew	0:80ee8f3b695e	277	* @}
EricLew	0:80ee8f3b695e	278	*/
EricLew	0:80ee8f3b695e	279
EricLew	0:80ee8f3b695e	280	/** @defgroup LPUART_LL_EC_DMA_REG_DATA DMA register data
EricLew	0:80ee8f3b695e	281	* @{
EricLew	0:80ee8f3b695e	282	*/
EricLew	0:80ee8f3b695e	283	#define LL_LPUART_DMA_REG_DATA_TRANSMIT (uint32_t)0 /!< Get address of data register used for transmission /
EricLew	0:80ee8f3b695e	284	#define LL_LPUART_DMA_REG_DATA_RECEIVE (uint32_t)1 /!< Get address of data register used for reception /
EricLew	0:80ee8f3b695e	285	/**
EricLew	0:80ee8f3b695e	286	* @}
EricLew	0:80ee8f3b695e	287	*/
EricLew	0:80ee8f3b695e	288
EricLew	0:80ee8f3b695e	289	/**
EricLew	0:80ee8f3b695e	290	* @}
EricLew	0:80ee8f3b695e	291	*/
EricLew	0:80ee8f3b695e	292
EricLew	0:80ee8f3b695e	293	/* Exported macro ------------------------------------------------------------*/
EricLew	0:80ee8f3b695e	294	/** @defgroup LPUART_LL_Exported_Macros LPUART Exported Macros
EricLew	0:80ee8f3b695e	295	* @{
EricLew	0:80ee8f3b695e	296	*/
EricLew	0:80ee8f3b695e	297
EricLew	0:80ee8f3b695e	298	/** @defgroup LPUART_LL_EM_WRITE_READ Common Write and read registers Macros
EricLew	0:80ee8f3b695e	299	* @{
EricLew	0:80ee8f3b695e	300	*/
EricLew	0:80ee8f3b695e	301
EricLew	0:80ee8f3b695e	302	/**
EricLew	0:80ee8f3b695e	303	* @brief Write a value in LPUART register
EricLew	0:80ee8f3b695e	304	* @param __INSTANCE__ LPUART Instance
EricLew	0:80ee8f3b695e	305	* @param __REG__ Register to be written
EricLew	0:80ee8f3b695e	306	* @param __VALUE__ Value to be written in the register
EricLew	0:80ee8f3b695e	307	* @retval None
EricLew	0:80ee8f3b695e	308	*/
EricLew	0:80ee8f3b695e	309	#define LL_LPUART_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
EricLew	0:80ee8f3b695e	310
EricLew	0:80ee8f3b695e	311	/**
EricLew	0:80ee8f3b695e	312	* @brief Read a value in LPUART register
EricLew	0:80ee8f3b695e	313	* @param __INSTANCE__ LPUART Instance
EricLew	0:80ee8f3b695e	314	* @param __REG__ Register to be read
EricLew	0:80ee8f3b695e	315	* @retval Register value
EricLew	0:80ee8f3b695e	316	*/
EricLew	0:80ee8f3b695e	317	#define LL_LPUART_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
EricLew	0:80ee8f3b695e	318	/**
EricLew	0:80ee8f3b695e	319	* @}
EricLew	0:80ee8f3b695e	320	*/
EricLew	0:80ee8f3b695e	321
EricLew	0:80ee8f3b695e	322	/** @defgroup LPUART_LL_EM_Exported_Macros_Helper Helper Macros
EricLew	0:80ee8f3b695e	323	* @{
EricLew	0:80ee8f3b695e	324	*/
EricLew	0:80ee8f3b695e	325
EricLew	0:80ee8f3b695e	326	/**
EricLew	0:80ee8f3b695e	327	* @brief Compute LPUARTDIV value according to Peripheral Clock and
EricLew	0:80ee8f3b695e	328	* expected Baudrate (20-bit value of LPUARTDIV is returned)
EricLew	0:80ee8f3b695e	329	* @param __PERIPHCLK__ Peripheral Clock frequency used for LPUART Instance
EricLew	0:80ee8f3b695e	330	* @param __BAUDRATE__ Baudrate value to achieve
EricLew	0:80ee8f3b695e	331	* @retval LPUARTDIV value to be used for BRR register filling
EricLew	0:80ee8f3b695e	332	*/
EricLew	0:80ee8f3b695e	333	#define __LL_LPUART_DIV(__PERIPHCLK__, __BAUDRATE__) ((((uint64_t)(__PERIPHCLK__)*LPUART_LPUARTDIV_FREQ_MUL)/(__BAUDRATE__)) & LPUART_BRR_MASK)
EricLew	0:80ee8f3b695e	334
EricLew	0:80ee8f3b695e	335	/**
EricLew	0:80ee8f3b695e	336	* @}
EricLew	0:80ee8f3b695e	337	*/
EricLew	0:80ee8f3b695e	338
EricLew	0:80ee8f3b695e	339	/**
EricLew	0:80ee8f3b695e	340	* @}
EricLew	0:80ee8f3b695e	341	*/
EricLew	0:80ee8f3b695e	342
EricLew	0:80ee8f3b695e	343	/* Exported functions --------------------------------------------------------*/
EricLew	0:80ee8f3b695e	344	/** @defgroup LPUART_LL_Exported_Functions LPUART Exported Functions
EricLew	0:80ee8f3b695e	345	* @{
EricLew	0:80ee8f3b695e	346	*/
EricLew	0:80ee8f3b695e	347
EricLew	0:80ee8f3b695e	348	/** @defgroup LPUART_LL_EF_Configuration Configuration functions
EricLew	0:80ee8f3b695e	349	* @{
EricLew	0:80ee8f3b695e	350	*/
EricLew	0:80ee8f3b695e	351
EricLew	0:80ee8f3b695e	352	/**
EricLew	0:80ee8f3b695e	353	* @brief LPUART Enable
EricLew	0:80ee8f3b695e	354	* @rmtoll CR1 UE LL_LPUART_Enable
EricLew	0:80ee8f3b695e	355	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	356	* @retval None
EricLew	0:80ee8f3b695e	357	*/
EricLew	0:80ee8f3b695e	358	__STATIC_INLINE void LL_LPUART_Enable(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	359	{
EricLew	0:80ee8f3b695e	360	SET_BIT(LPUARTx->CR1, USART_CR1_UE);
EricLew	0:80ee8f3b695e	361	}
EricLew	0:80ee8f3b695e	362
EricLew	0:80ee8f3b695e	363	/**
EricLew	0:80ee8f3b695e	364	* @brief LPUART Disable
EricLew	0:80ee8f3b695e	365	* @note When LPUART is disabled, LPUART prescalers and outputs are stopped immediately,
EricLew	0:80ee8f3b695e	366	* and current operations are discarded. The configuration of the LPUART is kept, but all the status
EricLew	0:80ee8f3b695e	367	* flags, in the LPUARTx_ISR are set to their default values.
EricLew	0:80ee8f3b695e	368	* @note In order to go into low-power mode without generating errors on the line,
EricLew	0:80ee8f3b695e	369	* the TE bit must be reset before and the software must wait
EricLew	0:80ee8f3b695e	370	* for the TC bit in the LPUART_ISR to be set before resetting the UE bit.
EricLew	0:80ee8f3b695e	371	* The DMA requests are also reset when UE = 0 so the DMA channel must
EricLew	0:80ee8f3b695e	372	* be disabled before resetting the UE bit.
EricLew	0:80ee8f3b695e	373	* @rmtoll CR1 UE LL_LPUART_Disable
EricLew	0:80ee8f3b695e	374	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	375	* @retval None
EricLew	0:80ee8f3b695e	376	*/
EricLew	0:80ee8f3b695e	377	__STATIC_INLINE void LL_LPUART_Disable(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	378	{
EricLew	0:80ee8f3b695e	379	CLEAR_BIT(LPUARTx->CR1, USART_CR1_UE);
EricLew	0:80ee8f3b695e	380	}
EricLew	0:80ee8f3b695e	381
EricLew	0:80ee8f3b695e	382	/**
EricLew	0:80ee8f3b695e	383	* @brief Indicate if LPUART is enabled
EricLew	0:80ee8f3b695e	384	* @rmtoll CR1 UE LL_LPUART_IsEnabled
EricLew	0:80ee8f3b695e	385	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	386	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	387	*/
EricLew	0:80ee8f3b695e	388	__STATIC_INLINE uint32_t LL_LPUART_IsEnabled(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	389	{
EricLew	0:80ee8f3b695e	390	return (READ_BIT(LPUARTx->CR1, USART_CR1_UE) == (USART_CR1_UE));
EricLew	0:80ee8f3b695e	391	}
EricLew	0:80ee8f3b695e	392
EricLew	0:80ee8f3b695e	393	/**
EricLew	0:80ee8f3b695e	394	* @brief LPUART enabled in STOP Mode
EricLew	0:80ee8f3b695e	395	* @note When this function is enabled, LPUART is able to wake up the MCU from Stop mode, provided that
EricLew	0:80ee8f3b695e	396	* LPUART clock selection is HSI or LSE in RCC.
EricLew	0:80ee8f3b695e	397	* @rmtoll CR1 UESM LL_LPUART_EnableInStopMode
EricLew	0:80ee8f3b695e	398	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	399	* @retval None
EricLew	0:80ee8f3b695e	400	*/
EricLew	0:80ee8f3b695e	401	__STATIC_INLINE void LL_LPUART_EnableInStopMode(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	402	{
EricLew	0:80ee8f3b695e	403	SET_BIT(LPUARTx->CR1, USART_CR1_UESM);
EricLew	0:80ee8f3b695e	404	}
EricLew	0:80ee8f3b695e	405
EricLew	0:80ee8f3b695e	406	/**
EricLew	0:80ee8f3b695e	407	* @brief LPUART disabled in STOP Mode
EricLew	0:80ee8f3b695e	408	* @note When this function is disabled, LPUART is not able to wake up the MCU from Stop mode
EricLew	0:80ee8f3b695e	409	* @rmtoll CR1 UESM LL_LPUART_DisableInStopMode
EricLew	0:80ee8f3b695e	410	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	411	* @retval None
EricLew	0:80ee8f3b695e	412	*/
EricLew	0:80ee8f3b695e	413	__STATIC_INLINE void LL_LPUART_DisableInStopMode(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	414	{
EricLew	0:80ee8f3b695e	415	CLEAR_BIT(LPUARTx->CR1, USART_CR1_UESM);
EricLew	0:80ee8f3b695e	416	}
EricLew	0:80ee8f3b695e	417
EricLew	0:80ee8f3b695e	418	/**
EricLew	0:80ee8f3b695e	419	* @brief Indicate if LPUART is enabled in STOP Mode
EricLew	0:80ee8f3b695e	420	* (able to wake up MCU from Stop mode or not)
EricLew	0:80ee8f3b695e	421	* @rmtoll CR1 UESM LL_LPUART_IsEnabledInStopMode
EricLew	0:80ee8f3b695e	422	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	423	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	424	*/
EricLew	0:80ee8f3b695e	425	__STATIC_INLINE uint32_t LL_LPUART_IsEnabledInStopMode(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	426	{
EricLew	0:80ee8f3b695e	427	return (READ_BIT(LPUARTx->CR1, USART_CR1_UESM) == (USART_CR1_UESM));
EricLew	0:80ee8f3b695e	428	}
EricLew	0:80ee8f3b695e	429
EricLew	0:80ee8f3b695e	430	/**
EricLew	0:80ee8f3b695e	431	* @brief Receiver Enable (Receiver is enabled and begins searching for a start bit)
EricLew	0:80ee8f3b695e	432	* @rmtoll CR1 RE LL_LPUART_EnableDirectionRx
EricLew	0:80ee8f3b695e	433	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	434	* @retval None
EricLew	0:80ee8f3b695e	435	*/
EricLew	0:80ee8f3b695e	436	__STATIC_INLINE void LL_LPUART_EnableDirectionRx(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	437	{
EricLew	0:80ee8f3b695e	438	SET_BIT(LPUARTx->CR1, USART_CR1_RE);
EricLew	0:80ee8f3b695e	439	}
EricLew	0:80ee8f3b695e	440
EricLew	0:80ee8f3b695e	441	/**
EricLew	0:80ee8f3b695e	442	* @brief Receiver Disable
EricLew	0:80ee8f3b695e	443	* @rmtoll CR1 RE LL_LPUART_DisableDirectionRx
EricLew	0:80ee8f3b695e	444	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	445	* @retval None
EricLew	0:80ee8f3b695e	446	*/
EricLew	0:80ee8f3b695e	447	__STATIC_INLINE void LL_LPUART_DisableDirectionRx(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	448	{
EricLew	0:80ee8f3b695e	449	CLEAR_BIT(LPUARTx->CR1, USART_CR1_RE);
EricLew	0:80ee8f3b695e	450	}
EricLew	0:80ee8f3b695e	451
EricLew	0:80ee8f3b695e	452	/**
EricLew	0:80ee8f3b695e	453	* @brief Transmitter Enable
EricLew	0:80ee8f3b695e	454	* @rmtoll CR1 TE LL_LPUART_EnableDirectionTx
EricLew	0:80ee8f3b695e	455	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	456	* @retval None
EricLew	0:80ee8f3b695e	457	*/
EricLew	0:80ee8f3b695e	458	__STATIC_INLINE void LL_LPUART_EnableDirectionTx(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	459	{
EricLew	0:80ee8f3b695e	460	SET_BIT(LPUARTx->CR1, USART_CR1_TE);
EricLew	0:80ee8f3b695e	461	}
EricLew	0:80ee8f3b695e	462
EricLew	0:80ee8f3b695e	463	/**
EricLew	0:80ee8f3b695e	464	* @brief Transmitter Disable
EricLew	0:80ee8f3b695e	465	* @rmtoll CR1 TE LL_LPUART_DisableDirectionTx
EricLew	0:80ee8f3b695e	466	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	467	* @retval None
EricLew	0:80ee8f3b695e	468	*/
EricLew	0:80ee8f3b695e	469	__STATIC_INLINE void LL_LPUART_DisableDirectionTx(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	470	{
EricLew	0:80ee8f3b695e	471	CLEAR_BIT(LPUARTx->CR1, USART_CR1_TE);
EricLew	0:80ee8f3b695e	472	}
EricLew	0:80ee8f3b695e	473
EricLew	0:80ee8f3b695e	474	/**
EricLew	0:80ee8f3b695e	475	* @brief Configure simultaneously enabled/disabled states
EricLew	0:80ee8f3b695e	476	* of Transmitter and Receiver
EricLew	0:80ee8f3b695e	477	* @rmtoll CR1 RE LL_LPUART_SetTransferDirection\n
EricLew	0:80ee8f3b695e	478	* CR1 TE LL_LPUART_SetTransferDirection
EricLew	0:80ee8f3b695e	479	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	480	* @param Direction This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	481	* @arg @ref LL_LPUART_DIRECTION_NONE
EricLew	0:80ee8f3b695e	482	* @arg @ref LL_LPUART_DIRECTION_RX
EricLew	0:80ee8f3b695e	483	* @arg @ref LL_LPUART_DIRECTION_TX
EricLew	0:80ee8f3b695e	484	* @arg @ref LL_LPUART_DIRECTION_TX_RX
EricLew	0:80ee8f3b695e	485	* @retval None
EricLew	0:80ee8f3b695e	486	*/
EricLew	0:80ee8f3b695e	487	__STATIC_INLINE void LL_LPUART_SetTransferDirection(USART_TypeDef *LPUARTx, uint32_t Direction)
EricLew	0:80ee8f3b695e	488	{
EricLew	0:80ee8f3b695e	489	MODIFY_REG(LPUARTx->CR1, USART_CR1_RE \| USART_CR1_TE, Direction);
EricLew	0:80ee8f3b695e	490	}
EricLew	0:80ee8f3b695e	491
EricLew	0:80ee8f3b695e	492	/**
EricLew	0:80ee8f3b695e	493	* @brief Return enabled/disabled states of Transmitter and Receiver
EricLew	0:80ee8f3b695e	494	* @rmtoll CR1 RE LL_LPUART_GetTransferDirection\n
EricLew	0:80ee8f3b695e	495	* CR1 TE LL_LPUART_GetTransferDirection
EricLew	0:80ee8f3b695e	496	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	497	* @retval Returned value can be one of the following values:
EricLew	0:80ee8f3b695e	498	* @arg @ref LL_LPUART_DIRECTION_NONE
EricLew	0:80ee8f3b695e	499	* @arg @ref LL_LPUART_DIRECTION_RX
EricLew	0:80ee8f3b695e	500	* @arg @ref LL_LPUART_DIRECTION_TX
EricLew	0:80ee8f3b695e	501	* @arg @ref LL_LPUART_DIRECTION_TX_RX
EricLew	0:80ee8f3b695e	502	*/
EricLew	0:80ee8f3b695e	503	__STATIC_INLINE uint32_t LL_LPUART_GetTransferDirection(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	504	{
EricLew	0:80ee8f3b695e	505	return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_RE \| USART_CR1_TE));
EricLew	0:80ee8f3b695e	506	}
EricLew	0:80ee8f3b695e	507
EricLew	0:80ee8f3b695e	508	/**
EricLew	0:80ee8f3b695e	509	* @brief Configure Parity (enabled/disabled and parity mode if enabled)
EricLew	0:80ee8f3b695e	510	* @note This function selects if hardware parity control (generation and detection) is enabled or disabled.
EricLew	0:80ee8f3b695e	511	* When the parity control is enabled (Odd or Even), computed parity bit is inserted at the MSB position
EricLew	0:80ee8f3b695e	512	* (depending on data width) and parity is checked on the received data.
EricLew	0:80ee8f3b695e	513	* @rmtoll CR1 PS LL_LPUART_SetParity\n
EricLew	0:80ee8f3b695e	514	* CR1 PCE LL_LPUART_SetParity
EricLew	0:80ee8f3b695e	515	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	516	* @param ParityMode This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	517	* @arg @ref LL_LPUART_PARITY_NONE
EricLew	0:80ee8f3b695e	518	* @arg @ref LL_LPUART_PARITY_EVEN
EricLew	0:80ee8f3b695e	519	* @arg @ref LL_LPUART_PARITY_ODD
EricLew	0:80ee8f3b695e	520	* @retval None
EricLew	0:80ee8f3b695e	521	*/
EricLew	0:80ee8f3b695e	522	__STATIC_INLINE void LL_LPUART_SetParity(USART_TypeDef *LPUARTx, uint32_t ParityMode)
EricLew	0:80ee8f3b695e	523	{
EricLew	0:80ee8f3b695e	524	MODIFY_REG(LPUARTx->CR1, USART_CR1_PS \| USART_CR1_PCE, ParityMode);
EricLew	0:80ee8f3b695e	525	}
EricLew	0:80ee8f3b695e	526
EricLew	0:80ee8f3b695e	527	/**
EricLew	0:80ee8f3b695e	528	* @brief Return Parity configuration (enabled/disabled and parity mode if enabled)
EricLew	0:80ee8f3b695e	529	* @rmtoll CR1 PS LL_LPUART_GetParity\n
EricLew	0:80ee8f3b695e	530	* CR1 PCE LL_LPUART_GetParity
EricLew	0:80ee8f3b695e	531	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	532	* @retval Returned value can be one of the following values:
EricLew	0:80ee8f3b695e	533	* @arg @ref LL_LPUART_PARITY_NONE
EricLew	0:80ee8f3b695e	534	* @arg @ref LL_LPUART_PARITY_EVEN
EricLew	0:80ee8f3b695e	535	* @arg @ref LL_LPUART_PARITY_ODD
EricLew	0:80ee8f3b695e	536	*/
EricLew	0:80ee8f3b695e	537	__STATIC_INLINE uint32_t LL_LPUART_GetParity(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	538	{
EricLew	0:80ee8f3b695e	539	return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_PS \| USART_CR1_PCE));
EricLew	0:80ee8f3b695e	540	}
EricLew	0:80ee8f3b695e	541
EricLew	0:80ee8f3b695e	542	/**
EricLew	0:80ee8f3b695e	543	* @brief Set Receiver Wakeup method from Mute mode.
EricLew	0:80ee8f3b695e	544	* @rmtoll CR1 WAKE LL_LPUART_SetWakeUpMethod
EricLew	0:80ee8f3b695e	545	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	546	* @param Method This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	547	* @arg @ref LL_LPUART_WAKEUP_IDLELINE
EricLew	0:80ee8f3b695e	548	* @arg @ref LL_LPUART_WAKEUP_ADDRESSMARK
EricLew	0:80ee8f3b695e	549	* @retval None
EricLew	0:80ee8f3b695e	550	*/
EricLew	0:80ee8f3b695e	551	__STATIC_INLINE void LL_LPUART_SetWakeUpMethod(USART_TypeDef *LPUARTx, uint32_t Method)
EricLew	0:80ee8f3b695e	552	{
EricLew	0:80ee8f3b695e	553	MODIFY_REG(LPUARTx->CR1, USART_CR1_WAKE, Method);
EricLew	0:80ee8f3b695e	554	}
EricLew	0:80ee8f3b695e	555
EricLew	0:80ee8f3b695e	556	/**
EricLew	0:80ee8f3b695e	557	* @brief Return Receiver Wakeup method from Mute mode
EricLew	0:80ee8f3b695e	558	* @rmtoll CR1 WAKE LL_LPUART_GetWakeUpMethod
EricLew	0:80ee8f3b695e	559	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	560	* @retval Returned value can be one of the following values:
EricLew	0:80ee8f3b695e	561	* @arg @ref LL_LPUART_WAKEUP_IDLELINE
EricLew	0:80ee8f3b695e	562	* @arg @ref LL_LPUART_WAKEUP_ADDRESSMARK
EricLew	0:80ee8f3b695e	563	*/
EricLew	0:80ee8f3b695e	564	__STATIC_INLINE uint32_t LL_LPUART_GetWakeUpMethod(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	565	{
EricLew	0:80ee8f3b695e	566	return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_WAKE));
EricLew	0:80ee8f3b695e	567	}
EricLew	0:80ee8f3b695e	568
EricLew	0:80ee8f3b695e	569	/**
EricLew	0:80ee8f3b695e	570	* @brief Set Word length (nb of data bits, excluding start and stop bits)
EricLew	0:80ee8f3b695e	571	* @rmtoll CR1 M LL_LPUART_SetDataWidth
EricLew	0:80ee8f3b695e	572	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	573	* @param DataWidth This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	574	* @arg @ref LL_LPUART_DATAWIDTH_7B
EricLew	0:80ee8f3b695e	575	* @arg @ref LL_LPUART_DATAWIDTH_8B
EricLew	0:80ee8f3b695e	576	* @arg @ref LL_LPUART_DATAWIDTH_9B
EricLew	0:80ee8f3b695e	577	* @retval None
EricLew	0:80ee8f3b695e	578	*/
EricLew	0:80ee8f3b695e	579	__STATIC_INLINE void LL_LPUART_SetDataWidth(USART_TypeDef *LPUARTx, uint32_t DataWidth)
EricLew	0:80ee8f3b695e	580	{
EricLew	0:80ee8f3b695e	581	MODIFY_REG(LPUARTx->CR1, USART_CR1_M, DataWidth);
EricLew	0:80ee8f3b695e	582	}
EricLew	0:80ee8f3b695e	583
EricLew	0:80ee8f3b695e	584	/**
EricLew	0:80ee8f3b695e	585	* @brief Return Word length (i.e. nb of data bits, excluding start and stop bits)
EricLew	0:80ee8f3b695e	586	* @rmtoll CR1 M LL_LPUART_GetDataWidth
EricLew	0:80ee8f3b695e	587	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	588	* @retval Returned value can be one of the following values:
EricLew	0:80ee8f3b695e	589	* @arg @ref LL_LPUART_DATAWIDTH_7B
EricLew	0:80ee8f3b695e	590	* @arg @ref LL_LPUART_DATAWIDTH_8B
EricLew	0:80ee8f3b695e	591	* @arg @ref LL_LPUART_DATAWIDTH_9B
EricLew	0:80ee8f3b695e	592	*/
EricLew	0:80ee8f3b695e	593	__STATIC_INLINE uint32_t LL_LPUART_GetDataWidth(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	594	{
EricLew	0:80ee8f3b695e	595	return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_M));
EricLew	0:80ee8f3b695e	596	}
EricLew	0:80ee8f3b695e	597
EricLew	0:80ee8f3b695e	598	/**
EricLew	0:80ee8f3b695e	599	* @brief Allow switch between Mute Mode and Active mode
EricLew	0:80ee8f3b695e	600	* @rmtoll CR1 MME LL_LPUART_EnableMuteMode
EricLew	0:80ee8f3b695e	601	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	602	* @retval None
EricLew	0:80ee8f3b695e	603	*/
EricLew	0:80ee8f3b695e	604	__STATIC_INLINE void LL_LPUART_EnableMuteMode(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	605	{
EricLew	0:80ee8f3b695e	606	SET_BIT(LPUARTx->CR1, USART_CR1_MME);
EricLew	0:80ee8f3b695e	607	}
EricLew	0:80ee8f3b695e	608
EricLew	0:80ee8f3b695e	609	/**
EricLew	0:80ee8f3b695e	610	* @brief Prevent Mute Mode use. Set Receiver in active mode permanently.
EricLew	0:80ee8f3b695e	611	* @rmtoll CR1 MME LL_LPUART_DisableMuteMode
EricLew	0:80ee8f3b695e	612	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	613	* @retval None
EricLew	0:80ee8f3b695e	614	*/
EricLew	0:80ee8f3b695e	615	__STATIC_INLINE void LL_LPUART_DisableMuteMode(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	616	{
EricLew	0:80ee8f3b695e	617	CLEAR_BIT(LPUARTx->CR1, USART_CR1_MME);
EricLew	0:80ee8f3b695e	618	}
EricLew	0:80ee8f3b695e	619
EricLew	0:80ee8f3b695e	620	/**
EricLew	0:80ee8f3b695e	621	* @brief Indicate if switch between Mute Mode and Active mode is allowed
EricLew	0:80ee8f3b695e	622	* @rmtoll CR1 MME LL_LPUART_IsEnabledMuteMode
EricLew	0:80ee8f3b695e	623	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	624	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	625	*/
EricLew	0:80ee8f3b695e	626	__STATIC_INLINE uint32_t LL_LPUART_IsEnabledMuteMode(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	627	{
EricLew	0:80ee8f3b695e	628	return (READ_BIT(LPUARTx->CR1, USART_CR1_MME) == (USART_CR1_MME));
EricLew	0:80ee8f3b695e	629	}
EricLew	0:80ee8f3b695e	630
EricLew	0:80ee8f3b695e	631	/**
EricLew	0:80ee8f3b695e	632	* @brief Set the length of the stop bits
EricLew	0:80ee8f3b695e	633	* @rmtoll CR2 STOP LL_LPUART_SetStopBitsLength
EricLew	0:80ee8f3b695e	634	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	635	* @param StopBits This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	636	* @arg @ref LL_LPUART_STOPBITS_1
EricLew	0:80ee8f3b695e	637	* @arg @ref LL_LPUART_STOPBITS_2
EricLew	0:80ee8f3b695e	638	* @retval None
EricLew	0:80ee8f3b695e	639	*/
EricLew	0:80ee8f3b695e	640	__STATIC_INLINE void LL_LPUART_SetStopBitsLength(USART_TypeDef *LPUARTx, uint32_t StopBits)
EricLew	0:80ee8f3b695e	641	{
EricLew	0:80ee8f3b695e	642	MODIFY_REG(LPUARTx->CR2, USART_CR2_STOP, StopBits);
EricLew	0:80ee8f3b695e	643	}
EricLew	0:80ee8f3b695e	644
EricLew	0:80ee8f3b695e	645	/**
EricLew	0:80ee8f3b695e	646	* @brief Retrieve the length of the stop bits
EricLew	0:80ee8f3b695e	647	* @rmtoll CR2 STOP LL_LPUART_GetStopBitsLength
EricLew	0:80ee8f3b695e	648	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	649	* @retval Returned value can be one of the following values:
EricLew	0:80ee8f3b695e	650	* @arg @ref LL_LPUART_STOPBITS_1
EricLew	0:80ee8f3b695e	651	* @arg @ref LL_LPUART_STOPBITS_2
EricLew	0:80ee8f3b695e	652	*/
EricLew	0:80ee8f3b695e	653	__STATIC_INLINE uint32_t LL_LPUART_GetStopBitsLength(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	654	{
EricLew	0:80ee8f3b695e	655	return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_STOP));
EricLew	0:80ee8f3b695e	656	}
EricLew	0:80ee8f3b695e	657
EricLew	0:80ee8f3b695e	658	/**
EricLew	0:80ee8f3b695e	659	* @brief Configure Character frame format (Datawidth, Parity control, Stop Bits)
EricLew	0:80ee8f3b695e	660	* @note Call of this function is equivalent to following function call sequence :
EricLew	0:80ee8f3b695e	661	* - Data Width configuration using @ref LL_LPUART_SetDataWidth() function
EricLew	0:80ee8f3b695e	662	* - Parity Control and mode configuration using @ref LL_LPUART_SetParity() function
EricLew	0:80ee8f3b695e	663	* - Stop bits configuration using @ref LL_LPUART_SetStopBitsLength() function
EricLew	0:80ee8f3b695e	664	* @rmtoll CR1 PS LL_LPUART_ConfigCharacter\n
EricLew	0:80ee8f3b695e	665	* CR1 PCE LL_LPUART_ConfigCharacter\n
EricLew	0:80ee8f3b695e	666	* CR1 M LL_LPUART_ConfigCharacter\n
EricLew	0:80ee8f3b695e	667	* CR2 STOP LL_LPUART_ConfigCharacter
EricLew	0:80ee8f3b695e	668	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	669	* @param DataWidth This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	670	* @arg @ref LL_LPUART_DATAWIDTH_7B
EricLew	0:80ee8f3b695e	671	* @arg @ref LL_LPUART_DATAWIDTH_8B
EricLew	0:80ee8f3b695e	672	* @arg @ref LL_LPUART_DATAWIDTH_9B
EricLew	0:80ee8f3b695e	673	* @param ParityMode This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	674	* @arg @ref LL_LPUART_PARITY_NONE
EricLew	0:80ee8f3b695e	675	* @arg @ref LL_LPUART_PARITY_EVEN
EricLew	0:80ee8f3b695e	676	* @arg @ref LL_LPUART_PARITY_ODD
EricLew	0:80ee8f3b695e	677	* @param StopBits This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	678	* @arg @ref LL_LPUART_STOPBITS_1
EricLew	0:80ee8f3b695e	679	* @arg @ref LL_LPUART_STOPBITS_2
EricLew	0:80ee8f3b695e	680	* @retval None
EricLew	0:80ee8f3b695e	681	*/
EricLew	0:80ee8f3b695e	682	__STATIC_INLINE void LL_LPUART_ConfigCharacter(USART_TypeDef *LPUARTx, uint32_t DataWidth, uint32_t ParityMode,
EricLew	0:80ee8f3b695e	683	uint32_t StopBits)
EricLew	0:80ee8f3b695e	684	{
EricLew	0:80ee8f3b695e	685	MODIFY_REG(LPUARTx->CR1, USART_CR1_PS \| USART_CR1_PCE \| USART_CR1_M, ParityMode \| DataWidth);
EricLew	0:80ee8f3b695e	686	MODIFY_REG(LPUARTx->CR2, USART_CR2_STOP, StopBits);
EricLew	0:80ee8f3b695e	687	}
EricLew	0:80ee8f3b695e	688
EricLew	0:80ee8f3b695e	689	/**
EricLew	0:80ee8f3b695e	690	* @brief Configure TX/RX pins swapping setting.
EricLew	0:80ee8f3b695e	691	* @rmtoll CR2 SWAP LL_LPUART_SetTXRXSwap
EricLew	0:80ee8f3b695e	692	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	693	* @param SwapConfig This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	694	* @arg @ref LL_LPUART_TXRX_STANDARD
EricLew	0:80ee8f3b695e	695	* @arg @ref LL_LPUART_TXRX_SWAPPED
EricLew	0:80ee8f3b695e	696	* @retval None
EricLew	0:80ee8f3b695e	697	*/
EricLew	0:80ee8f3b695e	698	__STATIC_INLINE void LL_LPUART_SetTXRXSwap(USART_TypeDef *LPUARTx, uint32_t SwapConfig)
EricLew	0:80ee8f3b695e	699	{
EricLew	0:80ee8f3b695e	700	MODIFY_REG(LPUARTx->CR2, USART_CR2_SWAP, SwapConfig);
EricLew	0:80ee8f3b695e	701	}
EricLew	0:80ee8f3b695e	702
EricLew	0:80ee8f3b695e	703	/**
EricLew	0:80ee8f3b695e	704	* @brief Retrieve TX/RX pins swapping configuration.
EricLew	0:80ee8f3b695e	705	* @rmtoll CR2 SWAP LL_LPUART_GetTXRXSwap
EricLew	0:80ee8f3b695e	706	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	707	* @retval Returned value can be one of the following values:
EricLew	0:80ee8f3b695e	708	* @arg @ref LL_LPUART_TXRX_STANDARD
EricLew	0:80ee8f3b695e	709	* @arg @ref LL_LPUART_TXRX_SWAPPED
EricLew	0:80ee8f3b695e	710	*/
EricLew	0:80ee8f3b695e	711	__STATIC_INLINE uint32_t LL_LPUART_GetTXRXSwap(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	712	{
EricLew	0:80ee8f3b695e	713	return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_SWAP));
EricLew	0:80ee8f3b695e	714	}
EricLew	0:80ee8f3b695e	715
EricLew	0:80ee8f3b695e	716	/**
EricLew	0:80ee8f3b695e	717	* @brief Configure RX pin active level logic
EricLew	0:80ee8f3b695e	718	* @rmtoll CR2 RXINV LL_LPUART_SetRXPinLevel
EricLew	0:80ee8f3b695e	719	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	720	* @param PinInvMethod This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	721	* @arg @ref LL_LPUART_RXPIN_LEVEL_STANDARD
EricLew	0:80ee8f3b695e	722	* @arg @ref LL_LPUART_RXPIN_LEVEL_INVERTED
EricLew	0:80ee8f3b695e	723	* @retval None
EricLew	0:80ee8f3b695e	724	*/
EricLew	0:80ee8f3b695e	725	__STATIC_INLINE void LL_LPUART_SetRXPinLevel(USART_TypeDef *LPUARTx, uint32_t PinInvMethod)
EricLew	0:80ee8f3b695e	726	{
EricLew	0:80ee8f3b695e	727	MODIFY_REG(LPUARTx->CR2, USART_CR2_RXINV, PinInvMethod);
EricLew	0:80ee8f3b695e	728	}
EricLew	0:80ee8f3b695e	729
EricLew	0:80ee8f3b695e	730	/**
EricLew	0:80ee8f3b695e	731	* @brief Retrieve RX pin active level logic configuration
EricLew	0:80ee8f3b695e	732	* @rmtoll CR2 RXINV LL_LPUART_GetRXPinLevel
EricLew	0:80ee8f3b695e	733	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	734	* @retval Returned value can be one of the following values:
EricLew	0:80ee8f3b695e	735	* @arg @ref LL_LPUART_RXPIN_LEVEL_STANDARD
EricLew	0:80ee8f3b695e	736	* @arg @ref LL_LPUART_RXPIN_LEVEL_INVERTED
EricLew	0:80ee8f3b695e	737	*/
EricLew	0:80ee8f3b695e	738	__STATIC_INLINE uint32_t LL_LPUART_GetRXPinLevel(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	739	{
EricLew	0:80ee8f3b695e	740	return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_RXINV));
EricLew	0:80ee8f3b695e	741	}
EricLew	0:80ee8f3b695e	742
EricLew	0:80ee8f3b695e	743	/**
EricLew	0:80ee8f3b695e	744	* @brief Configure TX pin active level logic
EricLew	0:80ee8f3b695e	745	* @rmtoll CR2 TXINV LL_LPUART_SetTXPinLevel
EricLew	0:80ee8f3b695e	746	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	747	* @param PinInvMethod This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	748	* @arg @ref LL_LPUART_TXPIN_LEVEL_STANDARD
EricLew	0:80ee8f3b695e	749	* @arg @ref LL_LPUART_TXPIN_LEVEL_INVERTED
EricLew	0:80ee8f3b695e	750	* @retval None
EricLew	0:80ee8f3b695e	751	*/
EricLew	0:80ee8f3b695e	752	__STATIC_INLINE void LL_LPUART_SetTXPinLevel(USART_TypeDef *LPUARTx, uint32_t PinInvMethod)
EricLew	0:80ee8f3b695e	753	{
EricLew	0:80ee8f3b695e	754	MODIFY_REG(LPUARTx->CR2, USART_CR2_TXINV, PinInvMethod);
EricLew	0:80ee8f3b695e	755	}
EricLew	0:80ee8f3b695e	756
EricLew	0:80ee8f3b695e	757	/**
EricLew	0:80ee8f3b695e	758	* @brief Retrieve TX pin active level logic configuration
EricLew	0:80ee8f3b695e	759	* @rmtoll CR2 TXINV LL_LPUART_GetTXPinLevel
EricLew	0:80ee8f3b695e	760	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	761	* @retval Returned value can be one of the following values:
EricLew	0:80ee8f3b695e	762	* @arg @ref LL_LPUART_TXPIN_LEVEL_STANDARD
EricLew	0:80ee8f3b695e	763	* @arg @ref LL_LPUART_TXPIN_LEVEL_INVERTED
EricLew	0:80ee8f3b695e	764	*/
EricLew	0:80ee8f3b695e	765	__STATIC_INLINE uint32_t LL_LPUART_GetTXPinLevel(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	766	{
EricLew	0:80ee8f3b695e	767	return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_TXINV));
EricLew	0:80ee8f3b695e	768	}
EricLew	0:80ee8f3b695e	769
EricLew	0:80ee8f3b695e	770	/**
EricLew	0:80ee8f3b695e	771	* @brief Configure Binary data logic.
EricLew	0:80ee8f3b695e	772	*
EricLew	0:80ee8f3b695e	773	* @note Allow to define how Logical data from the data register are send/received :
EricLew	0:80ee8f3b695e	774	* either in positive/direct logic (1=H, 0=L) or in negative/inverse logic (1=L, 0=H)
EricLew	0:80ee8f3b695e	775	* @rmtoll CR2 DATAINV LL_LPUART_SetBinaryDataLogic
EricLew	0:80ee8f3b695e	776	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	777	* @param DataLogic This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	778	* @arg @ref LL_LPUART_BINARY_LOGIC_POSITIVE
EricLew	0:80ee8f3b695e	779	* @arg @ref LL_LPUART_BINARY_LOGIC_NEGATIVE
EricLew	0:80ee8f3b695e	780	* @retval None
EricLew	0:80ee8f3b695e	781	*/
EricLew	0:80ee8f3b695e	782	__STATIC_INLINE void LL_LPUART_SetBinaryDataLogic(USART_TypeDef *LPUARTx, uint32_t DataLogic)
EricLew	0:80ee8f3b695e	783	{
EricLew	0:80ee8f3b695e	784	MODIFY_REG(LPUARTx->CR2, USART_CR2_DATAINV, DataLogic);
EricLew	0:80ee8f3b695e	785	}
EricLew	0:80ee8f3b695e	786
EricLew	0:80ee8f3b695e	787	/**
EricLew	0:80ee8f3b695e	788	* @brief Retrieve Binary data configuration
EricLew	0:80ee8f3b695e	789	* @rmtoll CR2 DATAINV LL_LPUART_GetBinaryDataLogic
EricLew	0:80ee8f3b695e	790	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	791	* @retval Returned value can be one of the following values:
EricLew	0:80ee8f3b695e	792	* @arg @ref LL_LPUART_BINARY_LOGIC_POSITIVE
EricLew	0:80ee8f3b695e	793	* @arg @ref LL_LPUART_BINARY_LOGIC_NEGATIVE
EricLew	0:80ee8f3b695e	794	*/
EricLew	0:80ee8f3b695e	795	__STATIC_INLINE uint32_t LL_LPUART_GetBinaryDataLogic(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	796	{
EricLew	0:80ee8f3b695e	797	return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_DATAINV));
EricLew	0:80ee8f3b695e	798	}
EricLew	0:80ee8f3b695e	799
EricLew	0:80ee8f3b695e	800	/**
EricLew	0:80ee8f3b695e	801	* @brief Configure transfer bit order (either Less or Most Significant Bit First)
EricLew	0:80ee8f3b695e	802	* @note MSB First means data is transmitted/received with the MSB first, following the start bit.
EricLew	0:80ee8f3b695e	803	* LSB First means data is transmitted/received with data bit 0 first, following the start bit.
EricLew	0:80ee8f3b695e	804	* @rmtoll CR2 MSBFIRST LL_LPUART_SetTransferBitOrder
EricLew	0:80ee8f3b695e	805	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	806	* @param BitOrder This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	807	* @arg @ref LL_LPUART_BITORDER_LSBFIRST
EricLew	0:80ee8f3b695e	808	* @arg @ref LL_LPUART_BITORDER_MSBFIRST
EricLew	0:80ee8f3b695e	809	* @retval None
EricLew	0:80ee8f3b695e	810	*/
EricLew	0:80ee8f3b695e	811	__STATIC_INLINE void LL_LPUART_SetTransferBitOrder(USART_TypeDef *LPUARTx, uint32_t BitOrder)
EricLew	0:80ee8f3b695e	812	{
EricLew	0:80ee8f3b695e	813	MODIFY_REG(LPUARTx->CR2, USART_CR2_MSBFIRST, BitOrder);
EricLew	0:80ee8f3b695e	814	}
EricLew	0:80ee8f3b695e	815
EricLew	0:80ee8f3b695e	816	/**
EricLew	0:80ee8f3b695e	817	* @brief Return transfer bit order (either Less or Most Significant Bit First)
EricLew	0:80ee8f3b695e	818	* @note MSB First means data is transmitted/received with the MSB first, following the start bit.
EricLew	0:80ee8f3b695e	819	* LSB First means data is transmitted/received with data bit 0 first, following the start bit.
EricLew	0:80ee8f3b695e	820	* @rmtoll CR2 MSBFIRST LL_LPUART_GetTransferBitOrder
EricLew	0:80ee8f3b695e	821	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	822	* @retval Returned value can be one of the following values:
EricLew	0:80ee8f3b695e	823	* @arg @ref LL_LPUART_BITORDER_LSBFIRST
EricLew	0:80ee8f3b695e	824	* @arg @ref LL_LPUART_BITORDER_MSBFIRST
EricLew	0:80ee8f3b695e	825	*/
EricLew	0:80ee8f3b695e	826	__STATIC_INLINE uint32_t LL_LPUART_GetTransferBitOrder(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	827	{
EricLew	0:80ee8f3b695e	828	return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_MSBFIRST));
EricLew	0:80ee8f3b695e	829	}
EricLew	0:80ee8f3b695e	830
EricLew	0:80ee8f3b695e	831	/**
EricLew	0:80ee8f3b695e	832	* @brief Set Address of the LPUART node.
EricLew	0:80ee8f3b695e	833	*
EricLew	0:80ee8f3b695e	834	* @note This is used in multiprocessor communication during Mute mode or Stop mode,
EricLew	0:80ee8f3b695e	835	* for wakeup with address mark detection.
EricLew	0:80ee8f3b695e	836	* @note 4bits address node is used when 4-bit Address Detection is selected in ADDM7.
EricLew	0:80ee8f3b695e	837	* (b7-b4 should be set to 0)
EricLew	0:80ee8f3b695e	838	* 8bits address node is used when 7-bit Address Detection is selected in ADDM7.
EricLew	0:80ee8f3b695e	839	* (This is used in multiprocessor communication during Mute mode or Stop mode,
EricLew	0:80ee8f3b695e	840	* for wakeup with 7-bit address mark detection.
EricLew	0:80ee8f3b695e	841	* The MSB of the character sent by the transmitter should be equal to 1.
EricLew	0:80ee8f3b695e	842	* It may also be used for character detection during normal reception,
EricLew	0:80ee8f3b695e	843	* Mute mode inactive (for example, end of block detection in ModBus protocol).
EricLew	0:80ee8f3b695e	844	* In this case, the whole received character (8-bit) is compared to the ADD[7:0]
EricLew	0:80ee8f3b695e	845	* value and CMF flag is set on match)
EricLew	0:80ee8f3b695e	846	* @rmtoll CR2 ADD LL_LPUART_ConfigNodeAddress\n
EricLew	0:80ee8f3b695e	847	* CR2 ADDM7 LL_LPUART_ConfigNodeAddress
EricLew	0:80ee8f3b695e	848	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	849	* @param AddressLen This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	850	* @arg @ref LL_LPUART_ADDRESS_DETECT_4B
EricLew	0:80ee8f3b695e	851	* @arg @ref LL_LPUART_ADDRESS_DETECT_7B
EricLew	0:80ee8f3b695e	852	* @param NodeAddress 4 or 7 bit Address of the LPUART node.
EricLew	0:80ee8f3b695e	853	* @retval None
EricLew	0:80ee8f3b695e	854	*/
EricLew	0:80ee8f3b695e	855	__STATIC_INLINE void LL_LPUART_ConfigNodeAddress(USART_TypeDef *LPUARTx, uint32_t AddressLen, uint32_t NodeAddress)
EricLew	0:80ee8f3b695e	856	{
EricLew	0:80ee8f3b695e	857	MODIFY_REG(LPUARTx->CR2, USART_CR2_ADD \| USART_CR2_ADDM7,
EricLew	0:80ee8f3b695e	858	(uint32_t)(AddressLen \| (NodeAddress << LPUART_POSITION_CR2_ADD)));
EricLew	0:80ee8f3b695e	859	}
EricLew	0:80ee8f3b695e	860
EricLew	0:80ee8f3b695e	861	/**
EricLew	0:80ee8f3b695e	862	* @brief Return 8 bit Address of the LPUART node as set in ADD field of CR2.
EricLew	0:80ee8f3b695e	863	* @note If 4-bit Address Detection is selected in ADDM7,
EricLew	0:80ee8f3b695e	864	* only 4bits (b3-b0) of returned value are relevant (b31-b4 are not relevant)
EricLew	0:80ee8f3b695e	865	* If 7-bit Address Detection is selected in ADDM7,
EricLew	0:80ee8f3b695e	866	* only 8bits (b7-b0) of returned value are relevant (b31-b8 are not relevant)
EricLew	0:80ee8f3b695e	867	* @rmtoll CR2 ADD LL_LPUART_GetNodeAddress
EricLew	0:80ee8f3b695e	868	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	869	* @retval Address of the LPUART node (0..255)
EricLew	0:80ee8f3b695e	870	*/
EricLew	0:80ee8f3b695e	871	__STATIC_INLINE uint32_t LL_LPUART_GetNodeAddress(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	872	{
EricLew	0:80ee8f3b695e	873	return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_ADD) >> LPUART_POSITION_CR2_ADD);
EricLew	0:80ee8f3b695e	874	}
EricLew	0:80ee8f3b695e	875
EricLew	0:80ee8f3b695e	876	/**
EricLew	0:80ee8f3b695e	877	* @brief Return Length of Node Address used in Address Detection mode (7-bit or 4-bit)
EricLew	0:80ee8f3b695e	878	* @rmtoll CR2 ADDM7 LL_LPUART_GetNodeAddressLen
EricLew	0:80ee8f3b695e	879	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	880	* @retval Returned value can be one of the following values:
EricLew	0:80ee8f3b695e	881	* @arg @ref LL_LPUART_ADDRESS_DETECT_4B
EricLew	0:80ee8f3b695e	882	* @arg @ref LL_LPUART_ADDRESS_DETECT_7B
EricLew	0:80ee8f3b695e	883	*/
EricLew	0:80ee8f3b695e	884	__STATIC_INLINE uint32_t LL_LPUART_GetNodeAddressLen(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	885	{
EricLew	0:80ee8f3b695e	886	return (uint32_t)(READ_BIT(LPUARTx->CR2, USART_CR2_ADDM7));
EricLew	0:80ee8f3b695e	887	}
EricLew	0:80ee8f3b695e	888
EricLew	0:80ee8f3b695e	889	/**
EricLew	0:80ee8f3b695e	890	* @brief Enable RTS HW Flow Control
EricLew	0:80ee8f3b695e	891	* @rmtoll CR3 RTSE LL_LPUART_EnableRTSHWFlowCtrl
EricLew	0:80ee8f3b695e	892	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	893	* @retval None
EricLew	0:80ee8f3b695e	894	*/
EricLew	0:80ee8f3b695e	895	__STATIC_INLINE void LL_LPUART_EnableRTSHWFlowCtrl(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	896	{
EricLew	0:80ee8f3b695e	897	SET_BIT(LPUARTx->CR3, USART_CR3_RTSE);
EricLew	0:80ee8f3b695e	898	}
EricLew	0:80ee8f3b695e	899
EricLew	0:80ee8f3b695e	900	/**
EricLew	0:80ee8f3b695e	901	* @brief Disable RTS HW Flow Control
EricLew	0:80ee8f3b695e	902	* @rmtoll CR3 RTSE LL_LPUART_DisableRTSHWFlowCtrl
EricLew	0:80ee8f3b695e	903	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	904	* @retval None
EricLew	0:80ee8f3b695e	905	*/
EricLew	0:80ee8f3b695e	906	__STATIC_INLINE void LL_LPUART_DisableRTSHWFlowCtrl(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	907	{
EricLew	0:80ee8f3b695e	908	CLEAR_BIT(LPUARTx->CR3, USART_CR3_RTSE);
EricLew	0:80ee8f3b695e	909	}
EricLew	0:80ee8f3b695e	910
EricLew	0:80ee8f3b695e	911	/**
EricLew	0:80ee8f3b695e	912	* @brief Enable CTS HW Flow Control
EricLew	0:80ee8f3b695e	913	* @rmtoll CR3 CTSE LL_LPUART_EnableCTSHWFlowCtrl
EricLew	0:80ee8f3b695e	914	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	915	* @retval None
EricLew	0:80ee8f3b695e	916	*/
EricLew	0:80ee8f3b695e	917	__STATIC_INLINE void LL_LPUART_EnableCTSHWFlowCtrl(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	918	{
EricLew	0:80ee8f3b695e	919	SET_BIT(LPUARTx->CR3, USART_CR3_CTSE);
EricLew	0:80ee8f3b695e	920	}
EricLew	0:80ee8f3b695e	921
EricLew	0:80ee8f3b695e	922	/**
EricLew	0:80ee8f3b695e	923	* @brief Disable CTS HW Flow Control
EricLew	0:80ee8f3b695e	924	* @rmtoll CR3 CTSE LL_LPUART_DisableCTSHWFlowCtrl
EricLew	0:80ee8f3b695e	925	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	926	* @retval None
EricLew	0:80ee8f3b695e	927	*/
EricLew	0:80ee8f3b695e	928	__STATIC_INLINE void LL_LPUART_DisableCTSHWFlowCtrl(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	929	{
EricLew	0:80ee8f3b695e	930	CLEAR_BIT(LPUARTx->CR3, USART_CR3_CTSE);
EricLew	0:80ee8f3b695e	931	}
EricLew	0:80ee8f3b695e	932
EricLew	0:80ee8f3b695e	933	/**
EricLew	0:80ee8f3b695e	934	* @brief Configure HW Flow Control mode (both CTS and RTS)
EricLew	0:80ee8f3b695e	935	* @rmtoll CR3 RTSE LL_LPUART_SetHWFlowCtrl\n
EricLew	0:80ee8f3b695e	936	* CR3 CTSE LL_LPUART_SetHWFlowCtrl
EricLew	0:80ee8f3b695e	937	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	938	* @param HWFlowCtrlMode This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	939	* @arg @ref LL_LPUART_HWCONTROL_NONE
EricLew	0:80ee8f3b695e	940	* @arg @ref LL_LPUART_HWCONTROL_RTS
EricLew	0:80ee8f3b695e	941	* @arg @ref LL_LPUART_HWCONTROL_CTS
EricLew	0:80ee8f3b695e	942	* @arg @ref LL_LPUART_HWCONTROL_RTS_CTS
EricLew	0:80ee8f3b695e	943	* @retval None
EricLew	0:80ee8f3b695e	944	*/
EricLew	0:80ee8f3b695e	945	__STATIC_INLINE void LL_LPUART_SetHWFlowCtrl(USART_TypeDef *LPUARTx, uint32_t HWFlowCtrlMode)
EricLew	0:80ee8f3b695e	946	{
EricLew	0:80ee8f3b695e	947	MODIFY_REG(LPUARTx->CR3, USART_CR3_RTSE \| USART_CR3_CTSE, HWFlowCtrlMode);
EricLew	0:80ee8f3b695e	948	}
EricLew	0:80ee8f3b695e	949
EricLew	0:80ee8f3b695e	950	/**
EricLew	0:80ee8f3b695e	951	* @brief Return HW Flow Control configuration (both CTS and RTS)
EricLew	0:80ee8f3b695e	952	* @rmtoll CR3 RTSE LL_LPUART_GetHWFlowCtrl\n
EricLew	0:80ee8f3b695e	953	* CR3 CTSE LL_LPUART_GetHWFlowCtrl
EricLew	0:80ee8f3b695e	954	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	955	* @retval Returned value can be one of the following values:
EricLew	0:80ee8f3b695e	956	* @arg @ref LL_LPUART_HWCONTROL_NONE
EricLew	0:80ee8f3b695e	957	* @arg @ref LL_LPUART_HWCONTROL_RTS
EricLew	0:80ee8f3b695e	958	* @arg @ref LL_LPUART_HWCONTROL_CTS
EricLew	0:80ee8f3b695e	959	* @arg @ref LL_LPUART_HWCONTROL_RTS_CTS
EricLew	0:80ee8f3b695e	960	*/
EricLew	0:80ee8f3b695e	961	__STATIC_INLINE uint32_t LL_LPUART_GetHWFlowCtrl(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	962	{
EricLew	0:80ee8f3b695e	963	return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_RTSE \| USART_CR3_CTSE));
EricLew	0:80ee8f3b695e	964	}
EricLew	0:80ee8f3b695e	965
EricLew	0:80ee8f3b695e	966	/**
EricLew	0:80ee8f3b695e	967	* @brief Enable Overrun detection
EricLew	0:80ee8f3b695e	968	* @rmtoll CR3 OVRDIS LL_LPUART_EnableOverrunDetect
EricLew	0:80ee8f3b695e	969	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	970	* @retval None
EricLew	0:80ee8f3b695e	971	*/
EricLew	0:80ee8f3b695e	972	__STATIC_INLINE void LL_LPUART_EnableOverrunDetect(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	973	{
EricLew	0:80ee8f3b695e	974	CLEAR_BIT(LPUARTx->CR3, USART_CR3_OVRDIS);
EricLew	0:80ee8f3b695e	975	}
EricLew	0:80ee8f3b695e	976
EricLew	0:80ee8f3b695e	977	/**
EricLew	0:80ee8f3b695e	978	* @brief Disable Overrun detection
EricLew	0:80ee8f3b695e	979	* @rmtoll CR3 OVRDIS LL_LPUART_DisableOverrunDetect
EricLew	0:80ee8f3b695e	980	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	981	* @retval None
EricLew	0:80ee8f3b695e	982	*/
EricLew	0:80ee8f3b695e	983	__STATIC_INLINE void LL_LPUART_DisableOverrunDetect(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	984	{
EricLew	0:80ee8f3b695e	985	SET_BIT(LPUARTx->CR3, USART_CR3_OVRDIS);
EricLew	0:80ee8f3b695e	986	}
EricLew	0:80ee8f3b695e	987
EricLew	0:80ee8f3b695e	988	/**
EricLew	0:80ee8f3b695e	989	* @brief Indicate if Overrun detection is enabled
EricLew	0:80ee8f3b695e	990	* @rmtoll CR3 OVRDIS LL_LPUART_IsEnabledOverrunDetect
EricLew	0:80ee8f3b695e	991	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	992	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	993	*/
EricLew	0:80ee8f3b695e	994	__STATIC_INLINE uint32_t LL_LPUART_IsEnabledOverrunDetect(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	995	{
EricLew	0:80ee8f3b695e	996	return (READ_BIT(LPUARTx->CR3, USART_CR3_OVRDIS) != USART_CR3_OVRDIS);
EricLew	0:80ee8f3b695e	997	}
EricLew	0:80ee8f3b695e	998
EricLew	0:80ee8f3b695e	999	/**
EricLew	0:80ee8f3b695e	1000	* @brief Select event type for Wake UP Interrupt Flag (WUS[1:0] bits)
EricLew	0:80ee8f3b695e	1001	* @rmtoll CR3 WUS LL_LPUART_SetWKUPType
EricLew	0:80ee8f3b695e	1002	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1003	* @param Type This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1004	* @arg @ref LL_LPUART_WAKEUP_ON_ADDRESS
EricLew	0:80ee8f3b695e	1005	* @arg @ref LL_LPUART_WAKEUP_ON_STARTBIT
EricLew	0:80ee8f3b695e	1006	* @arg @ref LL_LPUART_WAKEUP_ON_RXNE
EricLew	0:80ee8f3b695e	1007	* @retval None
EricLew	0:80ee8f3b695e	1008	*/
EricLew	0:80ee8f3b695e	1009	__STATIC_INLINE void LL_LPUART_SetWKUPType(USART_TypeDef *LPUARTx, uint32_t Type)
EricLew	0:80ee8f3b695e	1010	{
EricLew	0:80ee8f3b695e	1011	MODIFY_REG(LPUARTx->CR3, USART_CR3_WUS, Type);
EricLew	0:80ee8f3b695e	1012	}
EricLew	0:80ee8f3b695e	1013
EricLew	0:80ee8f3b695e	1014	/**
EricLew	0:80ee8f3b695e	1015	* @brief Return event type for Wake UP Interrupt Flag (WUS[1:0] bits)
EricLew	0:80ee8f3b695e	1016	* @rmtoll CR3 WUS LL_LPUART_GetWKUPType
EricLew	0:80ee8f3b695e	1017	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1018	* @retval Returned value can be one of the following values:
EricLew	0:80ee8f3b695e	1019	* @arg @ref LL_LPUART_WAKEUP_ON_ADDRESS
EricLew	0:80ee8f3b695e	1020	* @arg @ref LL_LPUART_WAKEUP_ON_STARTBIT
EricLew	0:80ee8f3b695e	1021	* @arg @ref LL_LPUART_WAKEUP_ON_RXNE
EricLew	0:80ee8f3b695e	1022	*/
EricLew	0:80ee8f3b695e	1023	__STATIC_INLINE uint32_t LL_LPUART_GetWKUPType(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1024	{
EricLew	0:80ee8f3b695e	1025	return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_WUS));
EricLew	0:80ee8f3b695e	1026	}
EricLew	0:80ee8f3b695e	1027
EricLew	0:80ee8f3b695e	1028	/**
EricLew	0:80ee8f3b695e	1029	* @brief Configure LPUART BRR register for achieving expected Baudrate value.
EricLew	0:80ee8f3b695e	1030	*
EricLew	0:80ee8f3b695e	1031	* @note Compute and set LPUARTDIV value in BRR Register (full BRR content)
EricLew	0:80ee8f3b695e	1032	* according to used Peripheral Clock and expected BaudRate values
EricLew	0:80ee8f3b695e	1033	* @note Provided that LPUARTx_BRR must be > = 0x300 and LPUART_BRR is 20-bit,
EricLew	0:80ee8f3b695e	1034	* a care should be taken when generating high baudrates using high PeriphClk
EricLew	0:80ee8f3b695e	1035	* values. PeriphClk must be in the range [3 x BaudRate, 4096 x BaudRate].
EricLew	0:80ee8f3b695e	1036	* @rmtoll BRR BRR LL_LPUART_SetBaudRate
EricLew	0:80ee8f3b695e	1037	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1038	* @param PeriphClk Peripheral Clock
EricLew	0:80ee8f3b695e	1039	* @param BaudRate Baudrate
EricLew	0:80ee8f3b695e	1040	* @retval None
EricLew	0:80ee8f3b695e	1041	*/
EricLew	0:80ee8f3b695e	1042	__STATIC_INLINE void LL_LPUART_SetBaudRate(USART_TypeDef *LPUARTx, uint32_t PeriphClk, uint32_t BaudRate)
EricLew	0:80ee8f3b695e	1043	{
EricLew	0:80ee8f3b695e	1044	LPUARTx->BRR = __LL_LPUART_DIV(PeriphClk, BaudRate);
EricLew	0:80ee8f3b695e	1045	}
EricLew	0:80ee8f3b695e	1046
EricLew	0:80ee8f3b695e	1047	/**
EricLew	0:80ee8f3b695e	1048	* @brief Return current Baudrate value, according to LPUARTDIV present in BRR register
EricLew	0:80ee8f3b695e	1049	* (full BRR content), and to used Peripheral Clock values
EricLew	0:80ee8f3b695e	1050	* @rmtoll BRR BRR LL_LPUART_GetBaudRate
EricLew	0:80ee8f3b695e	1051	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1052	* @param PeriphClk Peripheral Clock
EricLew	0:80ee8f3b695e	1053	* @retval BaudRate
EricLew	0:80ee8f3b695e	1054	*/
EricLew	0:80ee8f3b695e	1055	__STATIC_INLINE uint32_t LL_LPUART_GetBaudRate(USART_TypeDef *LPUARTx, uint32_t PeriphClk)
EricLew	0:80ee8f3b695e	1056	{
EricLew	0:80ee8f3b695e	1057	return (uint32_t)(((uint64_t)(PeriphClk) * LPUART_LPUARTDIV_FREQ_MUL) / LPUARTx->BRR);
EricLew	0:80ee8f3b695e	1058	}
EricLew	0:80ee8f3b695e	1059
EricLew	0:80ee8f3b695e	1060	/**
EricLew	0:80ee8f3b695e	1061	* @}
EricLew	0:80ee8f3b695e	1062	*/
EricLew	0:80ee8f3b695e	1063
EricLew	0:80ee8f3b695e	1064	/** @defgroup LPUART_LL_EF_Configuration_HalfDuplex Configuration functions related to Half Duplex feature
EricLew	0:80ee8f3b695e	1065	* @{
EricLew	0:80ee8f3b695e	1066	*/
EricLew	0:80ee8f3b695e	1067
EricLew	0:80ee8f3b695e	1068	/**
EricLew	0:80ee8f3b695e	1069	* @brief Enable Single Wire Half-Duplex mode
EricLew	0:80ee8f3b695e	1070	* @rmtoll CR3 HDSEL LL_LPUART_EnableHalfDuplex
EricLew	0:80ee8f3b695e	1071	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1072	* @retval None
EricLew	0:80ee8f3b695e	1073	*/
EricLew	0:80ee8f3b695e	1074	__STATIC_INLINE void LL_LPUART_EnableHalfDuplex(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1075	{
EricLew	0:80ee8f3b695e	1076	SET_BIT(LPUARTx->CR3, USART_CR3_HDSEL);
EricLew	0:80ee8f3b695e	1077	}
EricLew	0:80ee8f3b695e	1078
EricLew	0:80ee8f3b695e	1079	/**
EricLew	0:80ee8f3b695e	1080	* @brief Disable Single Wire Half-Duplex mode
EricLew	0:80ee8f3b695e	1081	* @rmtoll CR3 HDSEL LL_LPUART_DisableHalfDuplex
EricLew	0:80ee8f3b695e	1082	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1083	* @retval None
EricLew	0:80ee8f3b695e	1084	*/
EricLew	0:80ee8f3b695e	1085	__STATIC_INLINE void LL_LPUART_DisableHalfDuplex(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1086	{
EricLew	0:80ee8f3b695e	1087	CLEAR_BIT(LPUARTx->CR3, USART_CR3_HDSEL);
EricLew	0:80ee8f3b695e	1088	}
EricLew	0:80ee8f3b695e	1089
EricLew	0:80ee8f3b695e	1090	/**
EricLew	0:80ee8f3b695e	1091	* @brief Indicate if Single Wire Half-Duplex mode is enabled
EricLew	0:80ee8f3b695e	1092	* @rmtoll CR3 HDSEL LL_LPUART_IsEnabledHalfDuplex
EricLew	0:80ee8f3b695e	1093	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1094	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1095	*/
EricLew	0:80ee8f3b695e	1096	__STATIC_INLINE uint32_t LL_LPUART_IsEnabledHalfDuplex(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1097	{
EricLew	0:80ee8f3b695e	1098	return (READ_BIT(LPUARTx->CR3, USART_CR3_HDSEL) == (USART_CR3_HDSEL));
EricLew	0:80ee8f3b695e	1099	}
EricLew	0:80ee8f3b695e	1100
EricLew	0:80ee8f3b695e	1101	/**
EricLew	0:80ee8f3b695e	1102	* @}
EricLew	0:80ee8f3b695e	1103	*/
EricLew	0:80ee8f3b695e	1104
EricLew	0:80ee8f3b695e	1105	/** @defgroup LPUART_LL_EF_Configuration_DE Configuration functions related to Driver Enable feature
EricLew	0:80ee8f3b695e	1106	* @{
EricLew	0:80ee8f3b695e	1107	*/
EricLew	0:80ee8f3b695e	1108
EricLew	0:80ee8f3b695e	1109	/**
EricLew	0:80ee8f3b695e	1110	* @brief Set DEDT (Driver Enable Deassertion Time), Time value expressed on 5 bits ([4:0] bits).
EricLew	0:80ee8f3b695e	1111	* @rmtoll CR1 DEDT LL_LPUART_SetDEDeassertionTime
EricLew	0:80ee8f3b695e	1112	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1113	* @param Time 0..31
EricLew	0:80ee8f3b695e	1114	* @retval None
EricLew	0:80ee8f3b695e	1115	*/
EricLew	0:80ee8f3b695e	1116	__STATIC_INLINE void LL_LPUART_SetDEDeassertionTime(USART_TypeDef *LPUARTx, uint32_t Time)
EricLew	0:80ee8f3b695e	1117	{
EricLew	0:80ee8f3b695e	1118	MODIFY_REG(LPUARTx->CR1, USART_CR1_DEDT, Time << LPUART_POSITION_CR1_DEDT);
EricLew	0:80ee8f3b695e	1119	}
EricLew	0:80ee8f3b695e	1120
EricLew	0:80ee8f3b695e	1121	/**
EricLew	0:80ee8f3b695e	1122	* @brief Return DEDT (Driver Enable Deassertion Time)
EricLew	0:80ee8f3b695e	1123	* @rmtoll CR1 DEDT LL_LPUART_GetDEDeassertionTime
EricLew	0:80ee8f3b695e	1124	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1125	* @retval Time value expressed on 5 bits ([4:0] bits) : 0..31
EricLew	0:80ee8f3b695e	1126	*/
EricLew	0:80ee8f3b695e	1127	__STATIC_INLINE uint32_t LL_LPUART_GetDEDeassertionTime(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1128	{
EricLew	0:80ee8f3b695e	1129	return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_DEDT) >> LPUART_POSITION_CR1_DEDT);
EricLew	0:80ee8f3b695e	1130	}
EricLew	0:80ee8f3b695e	1131
EricLew	0:80ee8f3b695e	1132	/**
EricLew	0:80ee8f3b695e	1133	* @brief Set DEAT (Driver Enable Assertion Time), Time value expressed on 5 bits ([4:0] bits).
EricLew	0:80ee8f3b695e	1134	* @rmtoll CR1 DEAT LL_LPUART_SetDEAssertionTime
EricLew	0:80ee8f3b695e	1135	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1136	* @param Time 0..31
EricLew	0:80ee8f3b695e	1137	* @retval None
EricLew	0:80ee8f3b695e	1138	*/
EricLew	0:80ee8f3b695e	1139	__STATIC_INLINE void LL_LPUART_SetDEAssertionTime(USART_TypeDef *LPUARTx, uint32_t Time)
EricLew	0:80ee8f3b695e	1140	{
EricLew	0:80ee8f3b695e	1141	MODIFY_REG(LPUARTx->CR1, USART_CR1_DEAT, Time << LPUART_POSITION_CR1_DEAT);
EricLew	0:80ee8f3b695e	1142	}
EricLew	0:80ee8f3b695e	1143
EricLew	0:80ee8f3b695e	1144	/**
EricLew	0:80ee8f3b695e	1145	* @brief Return DEAT (Driver Enable Assertion Time)
EricLew	0:80ee8f3b695e	1146	* @rmtoll CR1 DEAT LL_LPUART_GetDEAssertionTime
EricLew	0:80ee8f3b695e	1147	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1148	* @retval Time value expressed on 5 bits ([4:0] bits) : 0..31
EricLew	0:80ee8f3b695e	1149	*/
EricLew	0:80ee8f3b695e	1150	__STATIC_INLINE uint32_t LL_LPUART_GetDEAssertionTime(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1151	{
EricLew	0:80ee8f3b695e	1152	return (uint32_t)(READ_BIT(LPUARTx->CR1, USART_CR1_DEAT) >> LPUART_POSITION_CR1_DEAT);
EricLew	0:80ee8f3b695e	1153	}
EricLew	0:80ee8f3b695e	1154
EricLew	0:80ee8f3b695e	1155	/**
EricLew	0:80ee8f3b695e	1156	* @brief Enable Driver Enable (DE) Mode
EricLew	0:80ee8f3b695e	1157	* @rmtoll CR3 DEM LL_LPUART_EnableDEMode
EricLew	0:80ee8f3b695e	1158	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1159	* @retval None
EricLew	0:80ee8f3b695e	1160	*/
EricLew	0:80ee8f3b695e	1161	__STATIC_INLINE void LL_LPUART_EnableDEMode(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1162	{
EricLew	0:80ee8f3b695e	1163	SET_BIT(LPUARTx->CR3, USART_CR3_DEM);
EricLew	0:80ee8f3b695e	1164	}
EricLew	0:80ee8f3b695e	1165
EricLew	0:80ee8f3b695e	1166	/**
EricLew	0:80ee8f3b695e	1167	* @brief Disable Driver Enable (DE) Mode
EricLew	0:80ee8f3b695e	1168	* @rmtoll CR3 DEM LL_LPUART_DisableDEMode
EricLew	0:80ee8f3b695e	1169	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1170	* @retval None
EricLew	0:80ee8f3b695e	1171	*/
EricLew	0:80ee8f3b695e	1172	__STATIC_INLINE void LL_LPUART_DisableDEMode(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1173	{
EricLew	0:80ee8f3b695e	1174	CLEAR_BIT(LPUARTx->CR3, USART_CR3_DEM);
EricLew	0:80ee8f3b695e	1175	}
EricLew	0:80ee8f3b695e	1176
EricLew	0:80ee8f3b695e	1177	/**
EricLew	0:80ee8f3b695e	1178	* @brief Indicate if Driver Enable (DE) Mode is enabled
EricLew	0:80ee8f3b695e	1179	* @rmtoll CR3 DEM LL_LPUART_IsEnabledDEMode
EricLew	0:80ee8f3b695e	1180	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1181	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1182	*/
EricLew	0:80ee8f3b695e	1183	__STATIC_INLINE uint32_t LL_LPUART_IsEnabledDEMode(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1184	{
EricLew	0:80ee8f3b695e	1185	return (READ_BIT(LPUARTx->CR3, USART_CR3_DEM) == (USART_CR3_DEM));
EricLew	0:80ee8f3b695e	1186	}
EricLew	0:80ee8f3b695e	1187
EricLew	0:80ee8f3b695e	1188	/**
EricLew	0:80ee8f3b695e	1189	* @brief Select Driver Enable Polarity
EricLew	0:80ee8f3b695e	1190	* @rmtoll CR3 DEP LL_LPUART_SetDESignalPolarity
EricLew	0:80ee8f3b695e	1191	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1192	* @param Polarity This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1193	* @arg @ref LL_LPUART_DE_POLARITY_HIGH
EricLew	0:80ee8f3b695e	1194	* @arg @ref LL_LPUART_DE_POLARITY_LOW
EricLew	0:80ee8f3b695e	1195	* @retval None
EricLew	0:80ee8f3b695e	1196	*/
EricLew	0:80ee8f3b695e	1197	__STATIC_INLINE void LL_LPUART_SetDESignalPolarity(USART_TypeDef *LPUARTx, uint32_t Polarity)
EricLew	0:80ee8f3b695e	1198	{
EricLew	0:80ee8f3b695e	1199	MODIFY_REG(LPUARTx->CR3, USART_CR3_DEP, Polarity);
EricLew	0:80ee8f3b695e	1200	}
EricLew	0:80ee8f3b695e	1201
EricLew	0:80ee8f3b695e	1202	/**
EricLew	0:80ee8f3b695e	1203	* @brief Return Driver Enable Polarity
EricLew	0:80ee8f3b695e	1204	* @rmtoll CR3 DEP LL_LPUART_GetDESignalPolarity
EricLew	0:80ee8f3b695e	1205	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1206	* @retval Returned value can be one of the following values:
EricLew	0:80ee8f3b695e	1207	* @arg @ref LL_LPUART_DE_POLARITY_HIGH
EricLew	0:80ee8f3b695e	1208	* @arg @ref LL_LPUART_DE_POLARITY_LOW
EricLew	0:80ee8f3b695e	1209	*/
EricLew	0:80ee8f3b695e	1210	__STATIC_INLINE uint32_t LL_LPUART_GetDESignalPolarity(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1211	{
EricLew	0:80ee8f3b695e	1212	return (uint32_t)(READ_BIT(LPUARTx->CR3, USART_CR3_DEP));
EricLew	0:80ee8f3b695e	1213	}
EricLew	0:80ee8f3b695e	1214
EricLew	0:80ee8f3b695e	1215	/**
EricLew	0:80ee8f3b695e	1216	* @}
EricLew	0:80ee8f3b695e	1217	*/
EricLew	0:80ee8f3b695e	1218
EricLew	0:80ee8f3b695e	1219	/** @defgroup LPUART_LL_EF_FLAG_Management FLAG_Management
EricLew	0:80ee8f3b695e	1220	* @{
EricLew	0:80ee8f3b695e	1221	*/
EricLew	0:80ee8f3b695e	1222
EricLew	0:80ee8f3b695e	1223	/**
EricLew	0:80ee8f3b695e	1224	* @brief Check if the LPUART Parity Error Flag is set or not
EricLew	0:80ee8f3b695e	1225	* @rmtoll ISR PE LL_LPUART_IsActiveFlag_PE
EricLew	0:80ee8f3b695e	1226	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1227	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1228	*/
EricLew	0:80ee8f3b695e	1229	__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_PE(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1230	{
EricLew	0:80ee8f3b695e	1231	return (READ_BIT(LPUARTx->ISR, USART_ISR_PE) == (USART_ISR_PE));
EricLew	0:80ee8f3b695e	1232	}
EricLew	0:80ee8f3b695e	1233
EricLew	0:80ee8f3b695e	1234	/**
EricLew	0:80ee8f3b695e	1235	* @brief Check if the LPUART Framing Error Flag is set or not
EricLew	0:80ee8f3b695e	1236	* @rmtoll ISR FE LL_LPUART_IsActiveFlag_FE
EricLew	0:80ee8f3b695e	1237	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1238	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1239	*/
EricLew	0:80ee8f3b695e	1240	__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_FE(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1241	{
EricLew	0:80ee8f3b695e	1242	return (READ_BIT(LPUARTx->ISR, USART_ISR_FE) == (USART_ISR_FE));
EricLew	0:80ee8f3b695e	1243	}
EricLew	0:80ee8f3b695e	1244
EricLew	0:80ee8f3b695e	1245	/**
EricLew	0:80ee8f3b695e	1246	* @brief Check if the LPUART Noise detected Flag is set or not
EricLew	0:80ee8f3b695e	1247	* @rmtoll ISR NE LL_LPUART_IsActiveFlag_NE
EricLew	0:80ee8f3b695e	1248	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1249	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1250	*/
EricLew	0:80ee8f3b695e	1251	__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_NE(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1252	{
EricLew	0:80ee8f3b695e	1253	return (READ_BIT(LPUARTx->ISR, USART_ISR_NE) == (USART_ISR_NE));
EricLew	0:80ee8f3b695e	1254	}
EricLew	0:80ee8f3b695e	1255
EricLew	0:80ee8f3b695e	1256	/**
EricLew	0:80ee8f3b695e	1257	* @brief Check if the LPUART OverRun Error Flag is set or not
EricLew	0:80ee8f3b695e	1258	* @rmtoll ISR ORE LL_LPUART_IsActiveFlag_ORE
EricLew	0:80ee8f3b695e	1259	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1260	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1261	*/
EricLew	0:80ee8f3b695e	1262	__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_ORE(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1263	{
EricLew	0:80ee8f3b695e	1264	return (READ_BIT(LPUARTx->ISR, USART_ISR_ORE) == (USART_ISR_ORE));
EricLew	0:80ee8f3b695e	1265	}
EricLew	0:80ee8f3b695e	1266
EricLew	0:80ee8f3b695e	1267	/**
EricLew	0:80ee8f3b695e	1268	* @brief Check if the LPUART IDLE line detected Flag is set or not
EricLew	0:80ee8f3b695e	1269	* @rmtoll ISR IDLE LL_LPUART_IsActiveFlag_IDLE
EricLew	0:80ee8f3b695e	1270	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1271	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1272	*/
EricLew	0:80ee8f3b695e	1273	__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_IDLE(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1274	{
EricLew	0:80ee8f3b695e	1275	return (READ_BIT(LPUARTx->ISR, USART_ISR_IDLE) == (USART_ISR_IDLE));
EricLew	0:80ee8f3b695e	1276	}
EricLew	0:80ee8f3b695e	1277
EricLew	0:80ee8f3b695e	1278	/**
EricLew	0:80ee8f3b695e	1279	* @brief Check if the LPUART Read Data Register Not Empty Flag is set or not
EricLew	0:80ee8f3b695e	1280	* @rmtoll ISR RXNE LL_LPUART_IsActiveFlag_RXNE
EricLew	0:80ee8f3b695e	1281	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1282	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1283	*/
EricLew	0:80ee8f3b695e	1284	__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RXNE(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1285	{
EricLew	0:80ee8f3b695e	1286	return (READ_BIT(LPUARTx->ISR, USART_ISR_RXNE) == (USART_ISR_RXNE));
EricLew	0:80ee8f3b695e	1287	}
EricLew	0:80ee8f3b695e	1288
EricLew	0:80ee8f3b695e	1289	/**
EricLew	0:80ee8f3b695e	1290	* @brief Check if the LPUART Transmission Complete Flag is set or not
EricLew	0:80ee8f3b695e	1291	* @rmtoll ISR TC LL_LPUART_IsActiveFlag_TC
EricLew	0:80ee8f3b695e	1292	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1293	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1294	*/
EricLew	0:80ee8f3b695e	1295	__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TC(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1296	{
EricLew	0:80ee8f3b695e	1297	return (READ_BIT(LPUARTx->ISR, USART_ISR_TC) == (USART_ISR_TC));
EricLew	0:80ee8f3b695e	1298	}
EricLew	0:80ee8f3b695e	1299
EricLew	0:80ee8f3b695e	1300	/**
EricLew	0:80ee8f3b695e	1301	* @brief Check if the LPUART Transmit Data Register Empty Flag is set or not
EricLew	0:80ee8f3b695e	1302	* @rmtoll ISR TXE LL_LPUART_IsActiveFlag_TXE
EricLew	0:80ee8f3b695e	1303	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1304	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1305	*/
EricLew	0:80ee8f3b695e	1306	__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TXE(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1307	{
EricLew	0:80ee8f3b695e	1308	return (READ_BIT(LPUARTx->ISR, USART_ISR_TXE) == (USART_ISR_TXE));
EricLew	0:80ee8f3b695e	1309	}
EricLew	0:80ee8f3b695e	1310
EricLew	0:80ee8f3b695e	1311	/**
EricLew	0:80ee8f3b695e	1312	* @brief Check if the LPUART CTS interrupt Flag is set or not
EricLew	0:80ee8f3b695e	1313	* @rmtoll ISR CTSIF LL_LPUART_IsActiveFlag_nCTS
EricLew	0:80ee8f3b695e	1314	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1315	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1316	*/
EricLew	0:80ee8f3b695e	1317	__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_nCTS(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1318	{
EricLew	0:80ee8f3b695e	1319	return (READ_BIT(LPUARTx->ISR, USART_ISR_CTSIF) == (USART_ISR_CTSIF));
EricLew	0:80ee8f3b695e	1320	}
EricLew	0:80ee8f3b695e	1321
EricLew	0:80ee8f3b695e	1322	/**
EricLew	0:80ee8f3b695e	1323	* @brief Check if the LPUART CTS Flag is set or not
EricLew	0:80ee8f3b695e	1324	* @rmtoll ISR CTS LL_LPUART_IsActiveFlag_CTS
EricLew	0:80ee8f3b695e	1325	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1326	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1327	*/
EricLew	0:80ee8f3b695e	1328	__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_CTS(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1329	{
EricLew	0:80ee8f3b695e	1330	return (READ_BIT(LPUARTx->ISR, USART_ISR_CTS) == (USART_ISR_CTS));
EricLew	0:80ee8f3b695e	1331	}
EricLew	0:80ee8f3b695e	1332
EricLew	0:80ee8f3b695e	1333	/**
EricLew	0:80ee8f3b695e	1334	* @brief Check if the LPUART Busy Flag is set or not
EricLew	0:80ee8f3b695e	1335	* @rmtoll ISR BUSY LL_LPUART_IsActiveFlag_BUSY
EricLew	0:80ee8f3b695e	1336	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1337	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1338	*/
EricLew	0:80ee8f3b695e	1339	__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_BUSY(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1340	{
EricLew	0:80ee8f3b695e	1341	return (READ_BIT(LPUARTx->ISR, USART_ISR_BUSY) == (USART_ISR_BUSY));
EricLew	0:80ee8f3b695e	1342	}
EricLew	0:80ee8f3b695e	1343
EricLew	0:80ee8f3b695e	1344	/**
EricLew	0:80ee8f3b695e	1345	* @brief Check if the LPUART Character Match Flag is set or not
EricLew	0:80ee8f3b695e	1346	* @rmtoll ISR CMF LL_LPUART_IsActiveFlag_CM
EricLew	0:80ee8f3b695e	1347	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1348	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1349	*/
EricLew	0:80ee8f3b695e	1350	__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_CM(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1351	{
EricLew	0:80ee8f3b695e	1352	return (READ_BIT(LPUARTx->ISR, USART_ISR_CMF) == (USART_ISR_CMF));
EricLew	0:80ee8f3b695e	1353	}
EricLew	0:80ee8f3b695e	1354
EricLew	0:80ee8f3b695e	1355	/**
EricLew	0:80ee8f3b695e	1356	* @brief Check if the LPUART Send Break Flag is set or not
EricLew	0:80ee8f3b695e	1357	* @rmtoll ISR SBKF LL_LPUART_IsActiveFlag_SBK
EricLew	0:80ee8f3b695e	1358	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1359	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1360	*/
EricLew	0:80ee8f3b695e	1361	__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_SBK(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1362	{
EricLew	0:80ee8f3b695e	1363	return (READ_BIT(LPUARTx->ISR, USART_ISR_SBKF) == (USART_ISR_SBKF));
EricLew	0:80ee8f3b695e	1364	}
EricLew	0:80ee8f3b695e	1365
EricLew	0:80ee8f3b695e	1366	/**
EricLew	0:80ee8f3b695e	1367	* @brief Check if the LPUART Receive Wake Up from mute mode Flag is set or not
EricLew	0:80ee8f3b695e	1368	* @rmtoll ISR RWU LL_LPUART_IsActiveFlag_RWU
EricLew	0:80ee8f3b695e	1369	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1370	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1371	*/
EricLew	0:80ee8f3b695e	1372	__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_RWU(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1373	{
EricLew	0:80ee8f3b695e	1374	return (READ_BIT(LPUARTx->ISR, USART_ISR_RWU) == (USART_ISR_RWU));
EricLew	0:80ee8f3b695e	1375	}
EricLew	0:80ee8f3b695e	1376
EricLew	0:80ee8f3b695e	1377	/**
EricLew	0:80ee8f3b695e	1378	* @brief Check if the LPUART Wake Up from stop mode Flag is set or not
EricLew	0:80ee8f3b695e	1379	* @rmtoll ISR WUF LL_LPUART_IsActiveFlag_WKUP
EricLew	0:80ee8f3b695e	1380	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1381	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1382	*/
EricLew	0:80ee8f3b695e	1383	__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_WKUP(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1384	{
EricLew	0:80ee8f3b695e	1385	return (READ_BIT(LPUARTx->ISR, USART_ISR_WUF) == (USART_ISR_WUF));
EricLew	0:80ee8f3b695e	1386	}
EricLew	0:80ee8f3b695e	1387
EricLew	0:80ee8f3b695e	1388	/**
EricLew	0:80ee8f3b695e	1389	* @brief Check if the LPUART Transmit Enable Acknowledge Flag is set or not
EricLew	0:80ee8f3b695e	1390	* @rmtoll ISR TEACK LL_LPUART_IsActiveFlag_TEACK
EricLew	0:80ee8f3b695e	1391	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1392	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1393	*/
EricLew	0:80ee8f3b695e	1394	__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_TEACK(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1395	{
EricLew	0:80ee8f3b695e	1396	return (READ_BIT(LPUARTx->ISR, USART_ISR_TEACK) == (USART_ISR_TEACK));
EricLew	0:80ee8f3b695e	1397	}
EricLew	0:80ee8f3b695e	1398
EricLew	0:80ee8f3b695e	1399	/**
EricLew	0:80ee8f3b695e	1400	* @brief Check if the LPUART Receive Enable Acknowledge Flag is set or not
EricLew	0:80ee8f3b695e	1401	* @rmtoll ISR REACK LL_LPUART_IsActiveFlag_REACK
EricLew	0:80ee8f3b695e	1402	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1403	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1404	*/
EricLew	0:80ee8f3b695e	1405	__STATIC_INLINE uint32_t LL_LPUART_IsActiveFlag_REACK(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1406	{
EricLew	0:80ee8f3b695e	1407	return (READ_BIT(LPUARTx->ISR, USART_ISR_REACK) == (USART_ISR_REACK));
EricLew	0:80ee8f3b695e	1408	}
EricLew	0:80ee8f3b695e	1409
EricLew	0:80ee8f3b695e	1410	/**
EricLew	0:80ee8f3b695e	1411	* @brief Clear Parity Error Flag
EricLew	0:80ee8f3b695e	1412	* @rmtoll ICR PECF LL_LPUART_ClearFlag_PE
EricLew	0:80ee8f3b695e	1413	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1414	* @retval None
EricLew	0:80ee8f3b695e	1415	*/
EricLew	0:80ee8f3b695e	1416	__STATIC_INLINE void LL_LPUART_ClearFlag_PE(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1417	{
EricLew	0:80ee8f3b695e	1418	WRITE_REG(LPUARTx->ICR, USART_ICR_PECF);
EricLew	0:80ee8f3b695e	1419	}
EricLew	0:80ee8f3b695e	1420
EricLew	0:80ee8f3b695e	1421	/**
EricLew	0:80ee8f3b695e	1422	* @brief Clear Framing Error Flag
EricLew	0:80ee8f3b695e	1423	* @rmtoll ICR FECF LL_LPUART_ClearFlag_FE
EricLew	0:80ee8f3b695e	1424	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1425	* @retval None
EricLew	0:80ee8f3b695e	1426	*/
EricLew	0:80ee8f3b695e	1427	__STATIC_INLINE void LL_LPUART_ClearFlag_FE(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1428	{
EricLew	0:80ee8f3b695e	1429	WRITE_REG(LPUARTx->ICR, USART_ICR_FECF);
EricLew	0:80ee8f3b695e	1430	}
EricLew	0:80ee8f3b695e	1431
EricLew	0:80ee8f3b695e	1432	/**
EricLew	0:80ee8f3b695e	1433	* @brief Clear Noise detected Flag
EricLew	0:80ee8f3b695e	1434	* @rmtoll ICR NCF LL_LPUART_ClearFlag_NE
EricLew	0:80ee8f3b695e	1435	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1436	* @retval None
EricLew	0:80ee8f3b695e	1437	*/
EricLew	0:80ee8f3b695e	1438	__STATIC_INLINE void LL_LPUART_ClearFlag_NE(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1439	{
EricLew	0:80ee8f3b695e	1440	WRITE_REG(LPUARTx->ICR, USART_ICR_NCF);
EricLew	0:80ee8f3b695e	1441	}
EricLew	0:80ee8f3b695e	1442
EricLew	0:80ee8f3b695e	1443	/**
EricLew	0:80ee8f3b695e	1444	* @brief Clear OverRun Error Flag
EricLew	0:80ee8f3b695e	1445	* @rmtoll ICR ORECF LL_LPUART_ClearFlag_ORE
EricLew	0:80ee8f3b695e	1446	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1447	* @retval None
EricLew	0:80ee8f3b695e	1448	*/
EricLew	0:80ee8f3b695e	1449	__STATIC_INLINE void LL_LPUART_ClearFlag_ORE(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1450	{
EricLew	0:80ee8f3b695e	1451	WRITE_REG(LPUARTx->ICR, USART_ICR_ORECF);
EricLew	0:80ee8f3b695e	1452	}
EricLew	0:80ee8f3b695e	1453
EricLew	0:80ee8f3b695e	1454	/**
EricLew	0:80ee8f3b695e	1455	* @brief Clear IDLE line detected Flag
EricLew	0:80ee8f3b695e	1456	* @rmtoll ICR IDLECF LL_LPUART_ClearFlag_IDLE
EricLew	0:80ee8f3b695e	1457	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1458	* @retval None
EricLew	0:80ee8f3b695e	1459	*/
EricLew	0:80ee8f3b695e	1460	__STATIC_INLINE void LL_LPUART_ClearFlag_IDLE(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1461	{
EricLew	0:80ee8f3b695e	1462	WRITE_REG(LPUARTx->ICR, USART_ICR_IDLECF);
EricLew	0:80ee8f3b695e	1463	}
EricLew	0:80ee8f3b695e	1464
EricLew	0:80ee8f3b695e	1465	/**
EricLew	0:80ee8f3b695e	1466	* @brief Clear Transmission Complete Flag
EricLew	0:80ee8f3b695e	1467	* @rmtoll ICR TCCF LL_LPUART_ClearFlag_TC
EricLew	0:80ee8f3b695e	1468	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1469	* @retval None
EricLew	0:80ee8f3b695e	1470	*/
EricLew	0:80ee8f3b695e	1471	__STATIC_INLINE void LL_LPUART_ClearFlag_TC(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1472	{
EricLew	0:80ee8f3b695e	1473	WRITE_REG(LPUARTx->ICR, USART_ICR_TCCF);
EricLew	0:80ee8f3b695e	1474	}
EricLew	0:80ee8f3b695e	1475
EricLew	0:80ee8f3b695e	1476	/**
EricLew	0:80ee8f3b695e	1477	* @brief Clear CTS Interrupt Flag
EricLew	0:80ee8f3b695e	1478	* @rmtoll ICR CTSCF LL_LPUART_ClearFlag_nCTS
EricLew	0:80ee8f3b695e	1479	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1480	* @retval None
EricLew	0:80ee8f3b695e	1481	*/
EricLew	0:80ee8f3b695e	1482	__STATIC_INLINE void LL_LPUART_ClearFlag_nCTS(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1483	{
EricLew	0:80ee8f3b695e	1484	WRITE_REG(LPUARTx->ICR, USART_ICR_CTSCF);
EricLew	0:80ee8f3b695e	1485	}
EricLew	0:80ee8f3b695e	1486
EricLew	0:80ee8f3b695e	1487	/**
EricLew	0:80ee8f3b695e	1488	* @brief Clear Character Match Flag
EricLew	0:80ee8f3b695e	1489	* @rmtoll ICR CMCF LL_LPUART_ClearFlag_CM
EricLew	0:80ee8f3b695e	1490	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1491	* @retval None
EricLew	0:80ee8f3b695e	1492	*/
EricLew	0:80ee8f3b695e	1493	__STATIC_INLINE void LL_LPUART_ClearFlag_CM(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1494	{
EricLew	0:80ee8f3b695e	1495	WRITE_REG(LPUARTx->ICR, USART_ICR_CMCF);
EricLew	0:80ee8f3b695e	1496	}
EricLew	0:80ee8f3b695e	1497
EricLew	0:80ee8f3b695e	1498	/**
EricLew	0:80ee8f3b695e	1499	* @brief Clear Wake Up from stop mode Flag
EricLew	0:80ee8f3b695e	1500	* @rmtoll ICR WUCF LL_LPUART_ClearFlag_WKUP
EricLew	0:80ee8f3b695e	1501	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1502	* @retval None
EricLew	0:80ee8f3b695e	1503	*/
EricLew	0:80ee8f3b695e	1504	__STATIC_INLINE void LL_LPUART_ClearFlag_WKUP(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1505	{
EricLew	0:80ee8f3b695e	1506	WRITE_REG(LPUARTx->ICR, USART_ICR_WUCF);
EricLew	0:80ee8f3b695e	1507	}
EricLew	0:80ee8f3b695e	1508
EricLew	0:80ee8f3b695e	1509	/**
EricLew	0:80ee8f3b695e	1510	* @}
EricLew	0:80ee8f3b695e	1511	*/
EricLew	0:80ee8f3b695e	1512
EricLew	0:80ee8f3b695e	1513	/** @defgroup LPUART_LL_EF_IT_Management IT_Management
EricLew	0:80ee8f3b695e	1514	* @{
EricLew	0:80ee8f3b695e	1515	*/
EricLew	0:80ee8f3b695e	1516
EricLew	0:80ee8f3b695e	1517	/**
EricLew	0:80ee8f3b695e	1518	* @brief Enable IDLE Interrupt
EricLew	0:80ee8f3b695e	1519	* @rmtoll CR1 IDLEIE LL_LPUART_EnableIT_IDLE
EricLew	0:80ee8f3b695e	1520	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1521	* @retval None
EricLew	0:80ee8f3b695e	1522	*/
EricLew	0:80ee8f3b695e	1523	__STATIC_INLINE void LL_LPUART_EnableIT_IDLE(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1524	{
EricLew	0:80ee8f3b695e	1525	SET_BIT(LPUARTx->CR1, USART_CR1_IDLEIE);
EricLew	0:80ee8f3b695e	1526	}
EricLew	0:80ee8f3b695e	1527
EricLew	0:80ee8f3b695e	1528	/**
EricLew	0:80ee8f3b695e	1529	* @brief Enable RX Not Empty Interrupt
EricLew	0:80ee8f3b695e	1530	* @rmtoll CR1 RXNEIE LL_LPUART_EnableIT_RXNE
EricLew	0:80ee8f3b695e	1531	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1532	* @retval None
EricLew	0:80ee8f3b695e	1533	*/
EricLew	0:80ee8f3b695e	1534	__STATIC_INLINE void LL_LPUART_EnableIT_RXNE(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1535	{
EricLew	0:80ee8f3b695e	1536	SET_BIT(LPUARTx->CR1, USART_CR1_RXNEIE);
EricLew	0:80ee8f3b695e	1537	}
EricLew	0:80ee8f3b695e	1538
EricLew	0:80ee8f3b695e	1539	/**
EricLew	0:80ee8f3b695e	1540	* @brief Enable Transmission Complete Interrupt
EricLew	0:80ee8f3b695e	1541	* @rmtoll CR1 TCIE LL_LPUART_EnableIT_TC
EricLew	0:80ee8f3b695e	1542	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1543	* @retval None
EricLew	0:80ee8f3b695e	1544	*/
EricLew	0:80ee8f3b695e	1545	__STATIC_INLINE void LL_LPUART_EnableIT_TC(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1546	{
EricLew	0:80ee8f3b695e	1547	SET_BIT(LPUARTx->CR1, USART_CR1_TCIE);
EricLew	0:80ee8f3b695e	1548	}
EricLew	0:80ee8f3b695e	1549
EricLew	0:80ee8f3b695e	1550	/**
EricLew	0:80ee8f3b695e	1551	* @brief Enable TX Empty Interrupt
EricLew	0:80ee8f3b695e	1552	* @rmtoll CR1 TXEIE LL_LPUART_EnableIT_TXE
EricLew	0:80ee8f3b695e	1553	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1554	* @retval None
EricLew	0:80ee8f3b695e	1555	*/
EricLew	0:80ee8f3b695e	1556	__STATIC_INLINE void LL_LPUART_EnableIT_TXE(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1557	{
EricLew	0:80ee8f3b695e	1558	SET_BIT(LPUARTx->CR1, USART_CR1_TXEIE);
EricLew	0:80ee8f3b695e	1559	}
EricLew	0:80ee8f3b695e	1560
EricLew	0:80ee8f3b695e	1561	/**
EricLew	0:80ee8f3b695e	1562	* @brief Enable Parity Error Interrupt
EricLew	0:80ee8f3b695e	1563	* @rmtoll CR1 PEIE LL_LPUART_EnableIT_PE
EricLew	0:80ee8f3b695e	1564	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1565	* @retval None
EricLew	0:80ee8f3b695e	1566	*/
EricLew	0:80ee8f3b695e	1567	__STATIC_INLINE void LL_LPUART_EnableIT_PE(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1568	{
EricLew	0:80ee8f3b695e	1569	SET_BIT(LPUARTx->CR1, USART_CR1_PEIE);
EricLew	0:80ee8f3b695e	1570	}
EricLew	0:80ee8f3b695e	1571
EricLew	0:80ee8f3b695e	1572	/**
EricLew	0:80ee8f3b695e	1573	* @brief Enable Character Match Interrupt
EricLew	0:80ee8f3b695e	1574	* @rmtoll CR1 CMIE LL_LPUART_EnableIT_CM
EricLew	0:80ee8f3b695e	1575	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1576	* @retval None
EricLew	0:80ee8f3b695e	1577	*/
EricLew	0:80ee8f3b695e	1578	__STATIC_INLINE void LL_LPUART_EnableIT_CM(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1579	{
EricLew	0:80ee8f3b695e	1580	SET_BIT(LPUARTx->CR1, USART_CR1_CMIE);
EricLew	0:80ee8f3b695e	1581	}
EricLew	0:80ee8f3b695e	1582
EricLew	0:80ee8f3b695e	1583	/**
EricLew	0:80ee8f3b695e	1584	* @brief Enable Error Interrupt
EricLew	0:80ee8f3b695e	1585	* @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing
EricLew	0:80ee8f3b695e	1586	* error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the LPUARTx_ISR register).
EricLew	0:80ee8f3b695e	1587	* 0: Interrupt is inhibited
EricLew	0:80ee8f3b695e	1588	* 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the LPUARTx_ISR register.
EricLew	0:80ee8f3b695e	1589	* @rmtoll CR3 EIE LL_LPUART_EnableIT_ERROR
EricLew	0:80ee8f3b695e	1590	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1591	* @retval None
EricLew	0:80ee8f3b695e	1592	*/
EricLew	0:80ee8f3b695e	1593	__STATIC_INLINE void LL_LPUART_EnableIT_ERROR(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1594	{
EricLew	0:80ee8f3b695e	1595	SET_BIT(LPUARTx->CR3, USART_CR3_EIE);
EricLew	0:80ee8f3b695e	1596	}
EricLew	0:80ee8f3b695e	1597
EricLew	0:80ee8f3b695e	1598	/**
EricLew	0:80ee8f3b695e	1599	* @brief Enable CTS Interrupt
EricLew	0:80ee8f3b695e	1600	* @rmtoll CR3 CTSIE LL_LPUART_EnableIT_CTS
EricLew	0:80ee8f3b695e	1601	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1602	* @retval None
EricLew	0:80ee8f3b695e	1603	*/
EricLew	0:80ee8f3b695e	1604	__STATIC_INLINE void LL_LPUART_EnableIT_CTS(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1605	{
EricLew	0:80ee8f3b695e	1606	SET_BIT(LPUARTx->CR3, USART_CR3_CTSIE);
EricLew	0:80ee8f3b695e	1607	}
EricLew	0:80ee8f3b695e	1608
EricLew	0:80ee8f3b695e	1609	/**
EricLew	0:80ee8f3b695e	1610	* @brief Enable WakeUp from Stop Mode Interrupt
EricLew	0:80ee8f3b695e	1611	* @rmtoll CR3 WUFIE LL_LPUART_EnableIT_WKUP
EricLew	0:80ee8f3b695e	1612	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1613	* @retval None
EricLew	0:80ee8f3b695e	1614	*/
EricLew	0:80ee8f3b695e	1615	__STATIC_INLINE void LL_LPUART_EnableIT_WKUP(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1616	{
EricLew	0:80ee8f3b695e	1617	SET_BIT(LPUARTx->CR3, USART_CR3_WUFIE);
EricLew	0:80ee8f3b695e	1618	}
EricLew	0:80ee8f3b695e	1619
EricLew	0:80ee8f3b695e	1620	/**
EricLew	0:80ee8f3b695e	1621	* @brief Disable IDLE Interrupt
EricLew	0:80ee8f3b695e	1622	* @rmtoll CR1 IDLEIE LL_LPUART_DisableIT_IDLE
EricLew	0:80ee8f3b695e	1623	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1624	* @retval None
EricLew	0:80ee8f3b695e	1625	*/
EricLew	0:80ee8f3b695e	1626	__STATIC_INLINE void LL_LPUART_DisableIT_IDLE(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1627	{
EricLew	0:80ee8f3b695e	1628	CLEAR_BIT(LPUARTx->CR1, USART_CR1_IDLEIE);
EricLew	0:80ee8f3b695e	1629	}
EricLew	0:80ee8f3b695e	1630
EricLew	0:80ee8f3b695e	1631	/**
EricLew	0:80ee8f3b695e	1632	* @brief Disable RX Not Empty Interrupt
EricLew	0:80ee8f3b695e	1633	* @rmtoll CR1 RXNEIE LL_LPUART_DisableIT_RXNE
EricLew	0:80ee8f3b695e	1634	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1635	* @retval None
EricLew	0:80ee8f3b695e	1636	*/
EricLew	0:80ee8f3b695e	1637	__STATIC_INLINE void LL_LPUART_DisableIT_RXNE(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1638	{
EricLew	0:80ee8f3b695e	1639	CLEAR_BIT(LPUARTx->CR1, USART_CR1_RXNEIE);
EricLew	0:80ee8f3b695e	1640	}
EricLew	0:80ee8f3b695e	1641
EricLew	0:80ee8f3b695e	1642	/**
EricLew	0:80ee8f3b695e	1643	* @brief Disable Transmission Complete Interrupt
EricLew	0:80ee8f3b695e	1644	* @rmtoll CR1 TCIE LL_LPUART_DisableIT_TC
EricLew	0:80ee8f3b695e	1645	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1646	* @retval None
EricLew	0:80ee8f3b695e	1647	*/
EricLew	0:80ee8f3b695e	1648	__STATIC_INLINE void LL_LPUART_DisableIT_TC(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1649	{
EricLew	0:80ee8f3b695e	1650	CLEAR_BIT(LPUARTx->CR1, USART_CR1_TCIE);
EricLew	0:80ee8f3b695e	1651	}
EricLew	0:80ee8f3b695e	1652
EricLew	0:80ee8f3b695e	1653	/**
EricLew	0:80ee8f3b695e	1654	* @brief Disable TX Empty Interrupt
EricLew	0:80ee8f3b695e	1655	* @rmtoll CR1 TXEIE LL_LPUART_DisableIT_TXE
EricLew	0:80ee8f3b695e	1656	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1657	* @retval None
EricLew	0:80ee8f3b695e	1658	*/
EricLew	0:80ee8f3b695e	1659	__STATIC_INLINE void LL_LPUART_DisableIT_TXE(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1660	{
EricLew	0:80ee8f3b695e	1661	CLEAR_BIT(LPUARTx->CR1, USART_CR1_TXEIE);
EricLew	0:80ee8f3b695e	1662	}
EricLew	0:80ee8f3b695e	1663
EricLew	0:80ee8f3b695e	1664	/**
EricLew	0:80ee8f3b695e	1665	* @brief Disable Parity Error Interrupt
EricLew	0:80ee8f3b695e	1666	* @rmtoll CR1 PEIE LL_LPUART_DisableIT_PE
EricLew	0:80ee8f3b695e	1667	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1668	* @retval None
EricLew	0:80ee8f3b695e	1669	*/
EricLew	0:80ee8f3b695e	1670	__STATIC_INLINE void LL_LPUART_DisableIT_PE(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1671	{
EricLew	0:80ee8f3b695e	1672	CLEAR_BIT(LPUARTx->CR1, USART_CR1_PEIE);
EricLew	0:80ee8f3b695e	1673	}
EricLew	0:80ee8f3b695e	1674
EricLew	0:80ee8f3b695e	1675	/**
EricLew	0:80ee8f3b695e	1676	* @brief Disable Character Match Interrupt
EricLew	0:80ee8f3b695e	1677	* @rmtoll CR1 CMIE LL_LPUART_DisableIT_CM
EricLew	0:80ee8f3b695e	1678	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1679	* @retval None
EricLew	0:80ee8f3b695e	1680	*/
EricLew	0:80ee8f3b695e	1681	__STATIC_INLINE void LL_LPUART_DisableIT_CM(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1682	{
EricLew	0:80ee8f3b695e	1683	CLEAR_BIT(LPUARTx->CR1, USART_CR1_CMIE);
EricLew	0:80ee8f3b695e	1684	}
EricLew	0:80ee8f3b695e	1685
EricLew	0:80ee8f3b695e	1686	/**
EricLew	0:80ee8f3b695e	1687	* @brief Disable Error Interrupt
EricLew	0:80ee8f3b695e	1688	* @note When set, Error Interrupt Enable Bit is enabling interrupt generation in case of a framing
EricLew	0:80ee8f3b695e	1689	* error, overrun error or noise flag (FE=1 or ORE=1 or NF=1 in the LPUARTx_ISR register).
EricLew	0:80ee8f3b695e	1690	* 0: Interrupt is inhibited
EricLew	0:80ee8f3b695e	1691	* 1: An interrupt is generated when FE=1 or ORE=1 or NF=1 in the LPUARTx_ISR register.
EricLew	0:80ee8f3b695e	1692	* @rmtoll CR3 EIE LL_LPUART_DisableIT_ERROR
EricLew	0:80ee8f3b695e	1693	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1694	* @retval None
EricLew	0:80ee8f3b695e	1695	*/
EricLew	0:80ee8f3b695e	1696	__STATIC_INLINE void LL_LPUART_DisableIT_ERROR(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1697	{
EricLew	0:80ee8f3b695e	1698	CLEAR_BIT(LPUARTx->CR3, USART_CR3_EIE);
EricLew	0:80ee8f3b695e	1699	}
EricLew	0:80ee8f3b695e	1700
EricLew	0:80ee8f3b695e	1701	/**
EricLew	0:80ee8f3b695e	1702	* @brief Disable CTS Interrupt
EricLew	0:80ee8f3b695e	1703	* @rmtoll CR3 CTSIE LL_LPUART_DisableIT_CTS
EricLew	0:80ee8f3b695e	1704	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1705	* @retval None
EricLew	0:80ee8f3b695e	1706	*/
EricLew	0:80ee8f3b695e	1707	__STATIC_INLINE void LL_LPUART_DisableIT_CTS(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1708	{
EricLew	0:80ee8f3b695e	1709	CLEAR_BIT(LPUARTx->CR3, USART_CR3_CTSIE);
EricLew	0:80ee8f3b695e	1710	}
EricLew	0:80ee8f3b695e	1711
EricLew	0:80ee8f3b695e	1712	/**
EricLew	0:80ee8f3b695e	1713	* @brief Disable WakeUp from Stop Mode Interrupt
EricLew	0:80ee8f3b695e	1714	* @rmtoll CR3 WUFIE LL_LPUART_DisableIT_WKUP
EricLew	0:80ee8f3b695e	1715	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1716	* @retval None
EricLew	0:80ee8f3b695e	1717	*/
EricLew	0:80ee8f3b695e	1718	__STATIC_INLINE void LL_LPUART_DisableIT_WKUP(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1719	{
EricLew	0:80ee8f3b695e	1720	CLEAR_BIT(LPUARTx->CR3, USART_CR3_WUFIE);
EricLew	0:80ee8f3b695e	1721	}
EricLew	0:80ee8f3b695e	1722
EricLew	0:80ee8f3b695e	1723	/**
EricLew	0:80ee8f3b695e	1724	* @brief Check if the LPUART IDLE Interrupt source is enabled or disabled.
EricLew	0:80ee8f3b695e	1725	* @rmtoll CR1 IDLEIE LL_LPUART_IsEnabledIT_IDLE
EricLew	0:80ee8f3b695e	1726	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1727	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1728	*/
EricLew	0:80ee8f3b695e	1729	__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_IDLE(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1730	{
EricLew	0:80ee8f3b695e	1731	return (READ_BIT(LPUARTx->CR1, USART_CR1_IDLEIE) == (USART_CR1_IDLEIE));
EricLew	0:80ee8f3b695e	1732	}
EricLew	0:80ee8f3b695e	1733
EricLew	0:80ee8f3b695e	1734	/**
EricLew	0:80ee8f3b695e	1735	* @brief Check if the LPUART RX Not Empty Interrupt is enabled or disabled.
EricLew	0:80ee8f3b695e	1736	* @rmtoll CR1 RXNEIE LL_LPUART_IsEnabledIT_RXNE
EricLew	0:80ee8f3b695e	1737	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1738	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1739	*/
EricLew	0:80ee8f3b695e	1740	__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_RXNE(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1741	{
EricLew	0:80ee8f3b695e	1742	return (READ_BIT(LPUARTx->CR1, USART_CR1_RXNEIE) == (USART_CR1_RXNEIE));
EricLew	0:80ee8f3b695e	1743	}
EricLew	0:80ee8f3b695e	1744
EricLew	0:80ee8f3b695e	1745	/**
EricLew	0:80ee8f3b695e	1746	* @brief Check if the LPUART Transmission Complete Interrupt is enabled or disabled.
EricLew	0:80ee8f3b695e	1747	* @rmtoll CR1 TCIE LL_LPUART_IsEnabledIT_TC
EricLew	0:80ee8f3b695e	1748	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1749	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1750	*/
EricLew	0:80ee8f3b695e	1751	__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TC(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1752	{
EricLew	0:80ee8f3b695e	1753	return (READ_BIT(LPUARTx->CR1, USART_CR1_TCIE) == (USART_CR1_TCIE));
EricLew	0:80ee8f3b695e	1754	}
EricLew	0:80ee8f3b695e	1755
EricLew	0:80ee8f3b695e	1756	/**
EricLew	0:80ee8f3b695e	1757	* @brief Check if the LPUART TX Empty Interrupt is enabled or disabled.
EricLew	0:80ee8f3b695e	1758	* @rmtoll CR1 TXEIE LL_LPUART_IsEnabledIT_TXE
EricLew	0:80ee8f3b695e	1759	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1760	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1761	*/
EricLew	0:80ee8f3b695e	1762	__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_TXE(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1763	{
EricLew	0:80ee8f3b695e	1764	return (READ_BIT(LPUARTx->CR1, USART_CR1_TXEIE) == (USART_CR1_TXEIE));
EricLew	0:80ee8f3b695e	1765	}
EricLew	0:80ee8f3b695e	1766
EricLew	0:80ee8f3b695e	1767	/**
EricLew	0:80ee8f3b695e	1768	* @brief Check if the LPUART Parity Error Interrupt is enabled or disabled.
EricLew	0:80ee8f3b695e	1769	* @rmtoll CR1 PEIE LL_LPUART_IsEnabledIT_PE
EricLew	0:80ee8f3b695e	1770	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1771	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1772	*/
EricLew	0:80ee8f3b695e	1773	__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_PE(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1774	{
EricLew	0:80ee8f3b695e	1775	return (READ_BIT(LPUARTx->CR1, USART_CR1_PEIE) == (USART_CR1_PEIE));
EricLew	0:80ee8f3b695e	1776	}
EricLew	0:80ee8f3b695e	1777
EricLew	0:80ee8f3b695e	1778	/**
EricLew	0:80ee8f3b695e	1779	* @brief Check if the LPUART Character Match Interrupt is enabled or disabled.
EricLew	0:80ee8f3b695e	1780	* @rmtoll CR1 CMIE LL_LPUART_IsEnabledIT_CM
EricLew	0:80ee8f3b695e	1781	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1782	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1783	*/
EricLew	0:80ee8f3b695e	1784	__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_CM(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1785	{
EricLew	0:80ee8f3b695e	1786	return (READ_BIT(LPUARTx->CR1, USART_CR1_CMIE) == (USART_CR1_CMIE));
EricLew	0:80ee8f3b695e	1787	}
EricLew	0:80ee8f3b695e	1788
EricLew	0:80ee8f3b695e	1789	/**
EricLew	0:80ee8f3b695e	1790	* @brief Check if the LPUART Error Interrupt is enabled or disabled.
EricLew	0:80ee8f3b695e	1791	* @rmtoll CR3 EIE LL_LPUART_IsEnabledIT_ERROR
EricLew	0:80ee8f3b695e	1792	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1793	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1794	*/
EricLew	0:80ee8f3b695e	1795	__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_ERROR(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1796	{
EricLew	0:80ee8f3b695e	1797	return (READ_BIT(LPUARTx->CR3, USART_CR3_EIE) == (USART_CR3_EIE));
EricLew	0:80ee8f3b695e	1798	}
EricLew	0:80ee8f3b695e	1799
EricLew	0:80ee8f3b695e	1800	/**
EricLew	0:80ee8f3b695e	1801	* @brief Check if the LPUART CTS Interrupt is enabled or disabled.
EricLew	0:80ee8f3b695e	1802	* @rmtoll CR3 CTSIE LL_LPUART_IsEnabledIT_CTS
EricLew	0:80ee8f3b695e	1803	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1804	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1805	*/
EricLew	0:80ee8f3b695e	1806	__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_CTS(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1807	{
EricLew	0:80ee8f3b695e	1808	return (READ_BIT(LPUARTx->CR3, USART_CR3_CTSIE) == (USART_CR3_CTSIE));
EricLew	0:80ee8f3b695e	1809	}
EricLew	0:80ee8f3b695e	1810
EricLew	0:80ee8f3b695e	1811	/**
EricLew	0:80ee8f3b695e	1812	* @brief Check if the LPUART WakeUp from Stop Mode Interrupt is enabled or disabled.
EricLew	0:80ee8f3b695e	1813	* @rmtoll CR3 WUFIE LL_LPUART_IsEnabledIT_WKUP
EricLew	0:80ee8f3b695e	1814	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1815	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1816	*/
EricLew	0:80ee8f3b695e	1817	__STATIC_INLINE uint32_t LL_LPUART_IsEnabledIT_WKUP(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1818	{
EricLew	0:80ee8f3b695e	1819	return (READ_BIT(LPUARTx->CR3, USART_CR3_WUFIE) == (USART_CR3_WUFIE));
EricLew	0:80ee8f3b695e	1820	}
EricLew	0:80ee8f3b695e	1821
EricLew	0:80ee8f3b695e	1822	/**
EricLew	0:80ee8f3b695e	1823	* @}
EricLew	0:80ee8f3b695e	1824	*/
EricLew	0:80ee8f3b695e	1825
EricLew	0:80ee8f3b695e	1826	/** @defgroup LPUART_LL_EF_DMA_Management DMA_Management
EricLew	0:80ee8f3b695e	1827	* @{
EricLew	0:80ee8f3b695e	1828	*/
EricLew	0:80ee8f3b695e	1829
EricLew	0:80ee8f3b695e	1830	/**
EricLew	0:80ee8f3b695e	1831	* @brief Enable DMA Mode for reception
EricLew	0:80ee8f3b695e	1832	* @rmtoll CR3 DMAR LL_LPUART_EnableDMAReq_RX
EricLew	0:80ee8f3b695e	1833	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1834	* @retval None
EricLew	0:80ee8f3b695e	1835	*/
EricLew	0:80ee8f3b695e	1836	__STATIC_INLINE void LL_LPUART_EnableDMAReq_RX(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1837	{
EricLew	0:80ee8f3b695e	1838	SET_BIT(LPUARTx->CR3, USART_CR3_DMAR);
EricLew	0:80ee8f3b695e	1839	}
EricLew	0:80ee8f3b695e	1840
EricLew	0:80ee8f3b695e	1841	/**
EricLew	0:80ee8f3b695e	1842	* @brief Disable DMA Mode for reception
EricLew	0:80ee8f3b695e	1843	* @rmtoll CR3 DMAR LL_LPUART_DisableDMAReq_RX
EricLew	0:80ee8f3b695e	1844	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1845	* @retval None
EricLew	0:80ee8f3b695e	1846	*/
EricLew	0:80ee8f3b695e	1847	__STATIC_INLINE void LL_LPUART_DisableDMAReq_RX(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1848	{
EricLew	0:80ee8f3b695e	1849	CLEAR_BIT(LPUARTx->CR3, USART_CR3_DMAR);
EricLew	0:80ee8f3b695e	1850	}
EricLew	0:80ee8f3b695e	1851
EricLew	0:80ee8f3b695e	1852	/**
EricLew	0:80ee8f3b695e	1853	* @brief Check if DMA Mode is enabled for reception
EricLew	0:80ee8f3b695e	1854	* @rmtoll CR3 DMAR LL_LPUART_IsEnabledDMAReq_RX
EricLew	0:80ee8f3b695e	1855	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1856	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1857	*/
EricLew	0:80ee8f3b695e	1858	__STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMAReq_RX(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1859	{
EricLew	0:80ee8f3b695e	1860	return (READ_BIT(LPUARTx->CR3, USART_CR3_DMAR) == (USART_CR3_DMAR));
EricLew	0:80ee8f3b695e	1861	}
EricLew	0:80ee8f3b695e	1862
EricLew	0:80ee8f3b695e	1863	/**
EricLew	0:80ee8f3b695e	1864	* @brief Enable DMA Mode for transmission
EricLew	0:80ee8f3b695e	1865	* @rmtoll CR3 DMAT LL_LPUART_EnableDMAReq_TX
EricLew	0:80ee8f3b695e	1866	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1867	* @retval None
EricLew	0:80ee8f3b695e	1868	*/
EricLew	0:80ee8f3b695e	1869	__STATIC_INLINE void LL_LPUART_EnableDMAReq_TX(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1870	{
EricLew	0:80ee8f3b695e	1871	SET_BIT(LPUARTx->CR3, USART_CR3_DMAT);
EricLew	0:80ee8f3b695e	1872	}
EricLew	0:80ee8f3b695e	1873
EricLew	0:80ee8f3b695e	1874	/**
EricLew	0:80ee8f3b695e	1875	* @brief Disable DMA Mode for transmission
EricLew	0:80ee8f3b695e	1876	* @rmtoll CR3 DMAT LL_LPUART_DisableDMAReq_TX
EricLew	0:80ee8f3b695e	1877	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1878	* @retval None
EricLew	0:80ee8f3b695e	1879	*/
EricLew	0:80ee8f3b695e	1880	__STATIC_INLINE void LL_LPUART_DisableDMAReq_TX(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1881	{
EricLew	0:80ee8f3b695e	1882	CLEAR_BIT(LPUARTx->CR3, USART_CR3_DMAT);
EricLew	0:80ee8f3b695e	1883	}
EricLew	0:80ee8f3b695e	1884
EricLew	0:80ee8f3b695e	1885	/**
EricLew	0:80ee8f3b695e	1886	* @brief Check if DMA Mode is enabled for transmission
EricLew	0:80ee8f3b695e	1887	* @rmtoll CR3 DMAT LL_LPUART_IsEnabledDMAReq_TX
EricLew	0:80ee8f3b695e	1888	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1889	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1890	*/
EricLew	0:80ee8f3b695e	1891	__STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMAReq_TX(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1892	{
EricLew	0:80ee8f3b695e	1893	return (READ_BIT(LPUARTx->CR3, USART_CR3_DMAT) == (USART_CR3_DMAT));
EricLew	0:80ee8f3b695e	1894	}
EricLew	0:80ee8f3b695e	1895
EricLew	0:80ee8f3b695e	1896	/**
EricLew	0:80ee8f3b695e	1897	* @brief Enable DMA Disabling on Reception Error
EricLew	0:80ee8f3b695e	1898	* @rmtoll CR3 DDRE LL_LPUART_EnableDMADeactOnRxErr
EricLew	0:80ee8f3b695e	1899	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1900	* @retval None
EricLew	0:80ee8f3b695e	1901	*/
EricLew	0:80ee8f3b695e	1902	__STATIC_INLINE void LL_LPUART_EnableDMADeactOnRxErr(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1903	{
EricLew	0:80ee8f3b695e	1904	SET_BIT(LPUARTx->CR3, USART_CR3_DDRE);
EricLew	0:80ee8f3b695e	1905	}
EricLew	0:80ee8f3b695e	1906
EricLew	0:80ee8f3b695e	1907	/**
EricLew	0:80ee8f3b695e	1908	* @brief Disable DMA Disabling on Reception Error
EricLew	0:80ee8f3b695e	1909	* @rmtoll CR3 DDRE LL_LPUART_DisableDMADeactOnRxErr
EricLew	0:80ee8f3b695e	1910	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1911	* @retval None
EricLew	0:80ee8f3b695e	1912	*/
EricLew	0:80ee8f3b695e	1913	__STATIC_INLINE void LL_LPUART_DisableDMADeactOnRxErr(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1914	{
EricLew	0:80ee8f3b695e	1915	CLEAR_BIT(LPUARTx->CR3, USART_CR3_DDRE);
EricLew	0:80ee8f3b695e	1916	}
EricLew	0:80ee8f3b695e	1917
EricLew	0:80ee8f3b695e	1918	/**
EricLew	0:80ee8f3b695e	1919	* @brief Indicate if DMA Disabling on Reception Error is disabled
EricLew	0:80ee8f3b695e	1920	* @rmtoll CR3 DDRE LL_LPUART_IsEnabledDMADeactOnRxErr
EricLew	0:80ee8f3b695e	1921	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1922	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1923	*/
EricLew	0:80ee8f3b695e	1924	__STATIC_INLINE uint32_t LL_LPUART_IsEnabledDMADeactOnRxErr(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1925	{
EricLew	0:80ee8f3b695e	1926	return (READ_BIT(LPUARTx->CR3, USART_CR3_DDRE) == (USART_CR3_DDRE));
EricLew	0:80ee8f3b695e	1927	}
EricLew	0:80ee8f3b695e	1928
EricLew	0:80ee8f3b695e	1929	/**
EricLew	0:80ee8f3b695e	1930	* @brief Get the LPUART data register address used for DMA transfer
EricLew	0:80ee8f3b695e	1931	* @rmtoll RDR RDR LL_LPUART_DMA_GetRegAddr\n
EricLew	0:80ee8f3b695e	1932	* @rmtoll TDR TDR LL_LPUART_DMA_GetRegAddr
EricLew	0:80ee8f3b695e	1933	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1934	* @param Direction This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1935	* @arg @ref LL_LPUART_DMA_REG_DATA_TRANSMIT
EricLew	0:80ee8f3b695e	1936	* @arg @ref LL_LPUART_DMA_REG_DATA_RECEIVE
EricLew	0:80ee8f3b695e	1937	* @retval Address of data register
EricLew	0:80ee8f3b695e	1938	*/
EricLew	0:80ee8f3b695e	1939	__STATIC_INLINE uint32_t LL_LPUART_DMA_GetRegAddr(USART_TypeDef *LPUARTx, uint32_t Direction)
EricLew	0:80ee8f3b695e	1940	{
EricLew	0:80ee8f3b695e	1941	register uint32_t data_reg_addr = 0;
EricLew	0:80ee8f3b695e	1942
EricLew	0:80ee8f3b695e	1943	if (Direction == LL_LPUART_DMA_REG_DATA_TRANSMIT)
EricLew	0:80ee8f3b695e	1944	{
EricLew	0:80ee8f3b695e	1945	/* return address of TDR register */
EricLew	0:80ee8f3b695e	1946	data_reg_addr = (uint32_t)&(LPUARTx->TDR);
EricLew	0:80ee8f3b695e	1947	}
EricLew	0:80ee8f3b695e	1948	else
EricLew	0:80ee8f3b695e	1949	{
EricLew	0:80ee8f3b695e	1950	/* return address of RDR register */
EricLew	0:80ee8f3b695e	1951	data_reg_addr = (uint32_t)&(LPUARTx->RDR);
EricLew	0:80ee8f3b695e	1952	}
EricLew	0:80ee8f3b695e	1953
EricLew	0:80ee8f3b695e	1954	return data_reg_addr;
EricLew	0:80ee8f3b695e	1955	}
EricLew	0:80ee8f3b695e	1956
EricLew	0:80ee8f3b695e	1957	/**
EricLew	0:80ee8f3b695e	1958	* @}
EricLew	0:80ee8f3b695e	1959	*/
EricLew	0:80ee8f3b695e	1960
EricLew	0:80ee8f3b695e	1961	/** @defgroup LPUART_LL_EF_Data_Management Data_Management
EricLew	0:80ee8f3b695e	1962	* @{
EricLew	0:80ee8f3b695e	1963	*/
EricLew	0:80ee8f3b695e	1964
EricLew	0:80ee8f3b695e	1965	/**
EricLew	0:80ee8f3b695e	1966	* @brief Read Receiver Data register (Receive Data value, 8 bits)
EricLew	0:80ee8f3b695e	1967	* @rmtoll RDR RDR LL_LPUART_ReceiveData8
EricLew	0:80ee8f3b695e	1968	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1969	* @retval 0..0xFF
EricLew	0:80ee8f3b695e	1970	*/
EricLew	0:80ee8f3b695e	1971	__STATIC_INLINE uint8_t LL_LPUART_ReceiveData8(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1972	{
EricLew	0:80ee8f3b695e	1973	return (uint8_t)(READ_BIT(LPUARTx->RDR, USART_RDR_RDR));
EricLew	0:80ee8f3b695e	1974	}
EricLew	0:80ee8f3b695e	1975
EricLew	0:80ee8f3b695e	1976	/**
EricLew	0:80ee8f3b695e	1977	* @brief Read Receiver Data register (Receive Data value, 9 bits)
EricLew	0:80ee8f3b695e	1978	* @rmtoll RDR RDR LL_LPUART_ReceiveData9
EricLew	0:80ee8f3b695e	1979	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1980	* @retval 0..0x1FF
EricLew	0:80ee8f3b695e	1981	*/
EricLew	0:80ee8f3b695e	1982	__STATIC_INLINE uint16_t LL_LPUART_ReceiveData9(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	1983	{
EricLew	0:80ee8f3b695e	1984	return (uint16_t)(READ_BIT(LPUARTx->RDR, USART_RDR_RDR));
EricLew	0:80ee8f3b695e	1985	}
EricLew	0:80ee8f3b695e	1986
EricLew	0:80ee8f3b695e	1987	/**
EricLew	0:80ee8f3b695e	1988	* @brief Write in Transmitter Data Register (Transmit Data value, 8 bits)
EricLew	0:80ee8f3b695e	1989	* @rmtoll TDR TDR LL_LPUART_TransmitData8
EricLew	0:80ee8f3b695e	1990	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	1991	* @param Value 0..0xFF
EricLew	0:80ee8f3b695e	1992	* @retval None
EricLew	0:80ee8f3b695e	1993	*/
EricLew	0:80ee8f3b695e	1994	__STATIC_INLINE void LL_LPUART_TransmitData8(USART_TypeDef *LPUARTx, uint8_t Value)
EricLew	0:80ee8f3b695e	1995	{
EricLew	0:80ee8f3b695e	1996	LPUARTx->TDR = Value;
EricLew	0:80ee8f3b695e	1997	}
EricLew	0:80ee8f3b695e	1998
EricLew	0:80ee8f3b695e	1999	/**
EricLew	0:80ee8f3b695e	2000	* @brief Write in Transmitter Data Register (Transmit Data value, 9 bits)
EricLew	0:80ee8f3b695e	2001	* @rmtoll TDR TDR LL_LPUART_TransmitData9
EricLew	0:80ee8f3b695e	2002	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	2003	* @param Value 0..0x1FF
EricLew	0:80ee8f3b695e	2004	* @retval None
EricLew	0:80ee8f3b695e	2005	*/
EricLew	0:80ee8f3b695e	2006	__STATIC_INLINE void LL_LPUART_TransmitData9(USART_TypeDef *LPUARTx, uint16_t Value)
EricLew	0:80ee8f3b695e	2007	{
EricLew	0:80ee8f3b695e	2008	LPUARTx->TDR = Value & 0x1FF;
EricLew	0:80ee8f3b695e	2009	}
EricLew	0:80ee8f3b695e	2010
EricLew	0:80ee8f3b695e	2011	/**
EricLew	0:80ee8f3b695e	2012	* @}
EricLew	0:80ee8f3b695e	2013	*/
EricLew	0:80ee8f3b695e	2014
EricLew	0:80ee8f3b695e	2015	/** @defgroup LPUART_LL_EF_Execution Execution
EricLew	0:80ee8f3b695e	2016	* @{
EricLew	0:80ee8f3b695e	2017	*/
EricLew	0:80ee8f3b695e	2018
EricLew	0:80ee8f3b695e	2019	/**
EricLew	0:80ee8f3b695e	2020	* @brief Request Break sending
EricLew	0:80ee8f3b695e	2021	* @rmtoll RQR SBKRQ LL_LPUART_RequestBreakSending
EricLew	0:80ee8f3b695e	2022	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	2023	* @retval None
EricLew	0:80ee8f3b695e	2024	*/
EricLew	0:80ee8f3b695e	2025	__STATIC_INLINE void LL_LPUART_RequestBreakSending(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	2026	{
EricLew	0:80ee8f3b695e	2027	SET_BIT(LPUARTx->RQR, USART_RQR_SBKRQ);
EricLew	0:80ee8f3b695e	2028	}
EricLew	0:80ee8f3b695e	2029
EricLew	0:80ee8f3b695e	2030	/**
EricLew	0:80ee8f3b695e	2031	* @brief Put LPUART in mute mode and set the RWU flag
EricLew	0:80ee8f3b695e	2032	* @rmtoll RQR MMRQ LL_LPUART_RequestEnterMuteMode
EricLew	0:80ee8f3b695e	2033	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	2034	* @retval None
EricLew	0:80ee8f3b695e	2035	*/
EricLew	0:80ee8f3b695e	2036	__STATIC_INLINE void LL_LPUART_RequestEnterMuteMode(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	2037	{
EricLew	0:80ee8f3b695e	2038	SET_BIT(LPUARTx->RQR, USART_RQR_MMRQ);
EricLew	0:80ee8f3b695e	2039	}
EricLew	0:80ee8f3b695e	2040
EricLew	0:80ee8f3b695e	2041	/**
EricLew	0:80ee8f3b695e	2042	* @brief Request a Receive Data flush
EricLew	0:80ee8f3b695e	2043	* @rmtoll RQR RXFRQ LL_LPUART_RequestRxDataFlush
EricLew	0:80ee8f3b695e	2044	* @param LPUARTx LPUART Instance
EricLew	0:80ee8f3b695e	2045	* @retval None
EricLew	0:80ee8f3b695e	2046	*/
EricLew	0:80ee8f3b695e	2047	__STATIC_INLINE void LL_LPUART_RequestRxDataFlush(USART_TypeDef *LPUARTx)
EricLew	0:80ee8f3b695e	2048	{
EricLew	0:80ee8f3b695e	2049	SET_BIT(LPUARTx->RQR, USART_RQR_RXFRQ);
EricLew	0:80ee8f3b695e	2050	}
EricLew	0:80ee8f3b695e	2051
EricLew	0:80ee8f3b695e	2052	/**
EricLew	0:80ee8f3b695e	2053	* @}
EricLew	0:80ee8f3b695e	2054	*/
EricLew	0:80ee8f3b695e	2055
EricLew	0:80ee8f3b695e	2056
EricLew	0:80ee8f3b695e	2057	/**
EricLew	0:80ee8f3b695e	2058	* @}
EricLew	0:80ee8f3b695e	2059	*/
EricLew	0:80ee8f3b695e	2060
EricLew	0:80ee8f3b695e	2061	/**
EricLew	0:80ee8f3b695e	2062	* @}
EricLew	0:80ee8f3b695e	2063	*/
EricLew	0:80ee8f3b695e	2064
EricLew	0:80ee8f3b695e	2065	#endif /* LPUART1 */
EricLew	0:80ee8f3b695e	2066
EricLew	0:80ee8f3b695e	2067	/**
EricLew	0:80ee8f3b695e	2068	* @}
EricLew	0:80ee8f3b695e	2069	*/
EricLew	0:80ee8f3b695e	2070
EricLew	0:80ee8f3b695e	2071	#ifdef __cplusplus
EricLew	0:80ee8f3b695e	2072	}
EricLew	0:80ee8f3b695e	2073	#endif
EricLew	0:80ee8f3b695e	2074
EricLew	0:80ee8f3b695e	2075	#endif /* __STM32L4xx_LL_LPUART_H */
EricLew	0:80ee8f3b695e	2076
EricLew	0:80ee8f3b695e	2077	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/
EricLew	0:80ee8f3b695e	2078

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Type:	Library
Created:	12 Nov 2015
Imports:	198
Forks:	0
Commits:	3
Dependents:	4
Dependencies:	0
Followers:	14

Inc/stm32l4xx_ll_lpuart.h@2:7aef7655b0a8, 2015-11-25 (annotated)

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