Eric Lewiston / STM32L4xx_HAL_Driver

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Dependents:   BSP OneHopeOnePrayer FINAL_AUDIO_RECORD AudioDemo

Fork of STM32L4xx_HAL_Driver by Senior Design: Sound Monitor

Src/stm32l4xx_hal_smbus.c@0:80ee8f3b695e, 2015-11-02 (annotated)

Committer:
EricLew
Date:
Mon Nov 02 19:37:23 2015 +0000
Revision:
0:80ee8f3b695e
Errors are with definitions of LCD and QSPI functions. I believe all .h and .c files are  uploaded, but there may need to be certain functions called.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
EricLew 0:80ee8f3b695e 1 /**
EricLew 0:80ee8f3b695e 2 ******************************************************************************
EricLew 0:80ee8f3b695e 3 * @file stm32l4xx_hal_smbus.c
EricLew 0:80ee8f3b695e 4 * @author MCD Application Team
EricLew 0:80ee8f3b695e 5 * @version V1.1.0
EricLew 0:80ee8f3b695e 6 * @date 16-September-2015
EricLew 0:80ee8f3b695e 7 * @brief SMBUS HAL module driver.
EricLew 0:80ee8f3b695e 8 * This file provides firmware functions to manage the following
EricLew 0:80ee8f3b695e 9 * functionalities of the System Management Bus (SMBus) peripheral,
EricLew 0:80ee8f3b695e 10 * based on I2C principles of operation :
EricLew 0:80ee8f3b695e 11 * + Initialization and de-initialization functions
EricLew 0:80ee8f3b695e 12 * + IO operation functions
EricLew 0:80ee8f3b695e 13 * + Peripheral State and Errors functions
EricLew 0:80ee8f3b695e 14 *
EricLew 0:80ee8f3b695e 15 @verbatim
EricLew 0:80ee8f3b695e 16 ==============================================================================
EricLew 0:80ee8f3b695e 17 ##### How to use this driver #####
EricLew 0:80ee8f3b695e 18 ==============================================================================
EricLew 0:80ee8f3b695e 19 [..]
EricLew 0:80ee8f3b695e 20 The SMBUS HAL driver can be used as follows:
EricLew 0:80ee8f3b695e 21
EricLew 0:80ee8f3b695e 22 (#) Declare a SMBUS_HandleTypeDef handle structure, for example:
EricLew 0:80ee8f3b695e 23 SMBUS_HandleTypeDef hsmbus;
EricLew 0:80ee8f3b695e 24
EricLew 0:80ee8f3b695e 25 (#)Initialize the SMBUS low level resources by implementing the HAL_SMBUS_MspInit() API:
EricLew 0:80ee8f3b695e 26 (++) Enable the SMBUSx interface clock with __HAL_RCC_I2Cx_CLK_ENABLE()
EricLew 0:80ee8f3b695e 27 (++) SMBUS pins configuration
EricLew 0:80ee8f3b695e 28 (+++) Enable the clock for the SMBUS GPIOs
EricLew 0:80ee8f3b695e 29 (+++) Configure SMBUS pins as alternate function open-drain
EricLew 0:80ee8f3b695e 30 (++) NVIC configuration if you need to use interrupt process
EricLew 0:80ee8f3b695e 31 (+++) Configure the SMBUSx interrupt priority
EricLew 0:80ee8f3b695e 32 (+++) Enable the NVIC SMBUS IRQ Channel
EricLew 0:80ee8f3b695e 33
EricLew 0:80ee8f3b695e 34 (#) Configure the Communication Clock Timing, Bus Timeout, Own Address1, Master Addressing Mode,
EricLew 0:80ee8f3b695e 35 Dual Addressing mode, Own Address2, Own Address2 Mask, General call, Nostretch mode,
EricLew 0:80ee8f3b695e 36 Peripheral mode and Packet Error Check mode in the hsmbus Init structure.
EricLew 0:80ee8f3b695e 37
EricLew 0:80ee8f3b695e 38 (#) Initialize the SMBUS registers by calling the HAL_SMBUS_Init() API:
EricLew 0:80ee8f3b695e 39 (++) These API's configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
EricLew 0:80ee8f3b695e 40 by calling the customized HAL_SMBUS_MspInit(&hsmbus) API.
EricLew 0:80ee8f3b695e 41
EricLew 0:80ee8f3b695e 42 (#) To check if target device is ready for communication, use the function HAL_SMBUS_IsDeviceReady()
EricLew 0:80ee8f3b695e 43
EricLew 0:80ee8f3b695e 44 (#) For SMBUS IO operations, only one mode of operations is available within this driver :
EricLew 0:80ee8f3b695e 45
EricLew 0:80ee8f3b695e 46 *** Interrupt mode IO operation ***
EricLew 0:80ee8f3b695e 47 ===================================
EricLew 0:80ee8f3b695e 48 [..]
EricLew 0:80ee8f3b695e 49 (+) Transmit in master/host SMBUS mode an amount of data in non-blocking mode using HAL_SMBUS_Master_Transmit_IT()
EricLew 0:80ee8f3b695e 50 (++) At transmission end of transfer HAL_SMBUS_MasterTxCpltCallback() is executed and user can
EricLew 0:80ee8f3b695e 51 add his own code by customization of function pointer HAL_SMBUS_MasterTxCpltCallback()
EricLew 0:80ee8f3b695e 52 (+) Receive in master/host SMBUS mode an amount of data in non-blocking mode using HAL_SMBUS_Master_Receive_IT()
EricLew 0:80ee8f3b695e 53 (++) At reception end of transfer HAL_SMBUS_MasterRxCpltCallback() is executed and user can
EricLew 0:80ee8f3b695e 54 add his own code by customization of function pointer HAL_SMBUS_MasterRxCpltCallback()
EricLew 0:80ee8f3b695e 55 (+) Abort a master/host SMBUS process communication with Interrupt using HAL_SMBUS_Master_Abort_IT()
EricLew 0:80ee8f3b695e 56 (++) The associated previous transfer callback is called at the end of abort process
EricLew 0:80ee8f3b695e 57 (++) mean HAL_SMBUS_MasterTxCpltCallback() in case of previous state was master transmit
EricLew 0:80ee8f3b695e 58 (++) mean HAL_SMBUS_MasterRxCpltCallback() in case of previous state was master receive
EricLew 0:80ee8f3b695e 59 (+) Enable/disable the Address listen mode in slave/device or host/slave SMBUS mode
EricLew 0:80ee8f3b695e 60 using HAL_SMBUS_EnableListen_IT() HAL_SMBUS_DisableListen_IT()
EricLew 0:80ee8f3b695e 61 (++) When address slave/device SMBUS match, HAL_SMBUS_AddrCallback() is executed and user can
EricLew 0:80ee8f3b695e 62 add his own code to check the Address Match Code and the transmission direction request by master/host (Write/Read).
EricLew 0:80ee8f3b695e 63 (++) At Listen mode end HAL_SMBUS_ListenCpltCallback() is executed and user can
EricLew 0:80ee8f3b695e 64 add his own code by customization of function pointer HAL_SMBUS_ListenCpltCallback()
EricLew 0:80ee8f3b695e 65 (+) Transmit in slave/device SMBUS mode an amount of data in non-blocking mode using HAL_SMBUS_Slave_Transmit_IT()
EricLew 0:80ee8f3b695e 66 (++) At transmission end of transfer HAL_SMBUS_SlaveTxCpltCallback() is executed and user can
EricLew 0:80ee8f3b695e 67 add his own code by customization of function pointer HAL_SMBUS_SlaveTxCpltCallback()
EricLew 0:80ee8f3b695e 68 (+) Receive in slave/device SMBUS mode an amount of data in non-blocking mode using HAL_SMBUS_Slave_Receive_IT()
EricLew 0:80ee8f3b695e 69 (++) At reception end of transfer HAL_SMBUS_SlaveRxCpltCallback() is executed and user can
EricLew 0:80ee8f3b695e 70 add his own code by customization of function pointer HAL_SMBUS_SlaveRxCpltCallback()
EricLew 0:80ee8f3b695e 71 (+) Enable/Disable the SMBUS alert mode using HAL_SMBUS_EnableAlert_IT() HAL_SMBUS_DisableAlert_IT()
EricLew 0:80ee8f3b695e 72 (++) When SMBUS Alert is generated HAL_SMBUS_ErrorCallback() is executed and user can
EricLew 0:80ee8f3b695e 73 add his own code by customization of function pointer HAL_SMBUS_ErrorCallback()
EricLew 0:80ee8f3b695e 74 to check the Alert Error Code using function HAL_SMBUS_GetError()
EricLew 0:80ee8f3b695e 75 (+) Get HAL state machine or error values using HAL_SMBUS_GetState() or HAL_SMBUS_GetError()
EricLew 0:80ee8f3b695e 76 (+) In case of transfer Error, HAL_SMBUS_ErrorCallback() function is executed and user can
EricLew 0:80ee8f3b695e 77 add his own code by customization of function pointer HAL_SMBUS_ErrorCallback()
EricLew 0:80ee8f3b695e 78 to check the Error Code using function HAL_SMBUS_GetError()
EricLew 0:80ee8f3b695e 79
EricLew 0:80ee8f3b695e 80 *** SMBUS HAL driver macros list ***
EricLew 0:80ee8f3b695e 81 ==================================
EricLew 0:80ee8f3b695e 82 [..]
EricLew 0:80ee8f3b695e 83 Below the list of most used macros in SMBUS HAL driver.
EricLew 0:80ee8f3b695e 84
EricLew 0:80ee8f3b695e 85 (+) __HAL_SMBUS_ENABLE: Enable the SMBUS peripheral
EricLew 0:80ee8f3b695e 86 (+) __HAL_SMBUS_DISABLE: Disable the SMBUS peripheral
EricLew 0:80ee8f3b695e 87 (+) __HAL_SMBUS_GET_FLAG : Checks whether the specified SMBUS flag is set or not
EricLew 0:80ee8f3b695e 88 (+) __HAL_SMBUS_CLEAR_FLAG : Clears the specified SMBUS pending flag
EricLew 0:80ee8f3b695e 89 (+) __HAL_SMBUS_ENABLE_IT: Enables the specified SMBUS interrupt
EricLew 0:80ee8f3b695e 90 (+) __HAL_SMBUS_DISABLE_IT: Disables the specified SMBUS interrupt
EricLew 0:80ee8f3b695e 91
EricLew 0:80ee8f3b695e 92 [..]
EricLew 0:80ee8f3b695e 93 (@) You can refer to the SMBUS HAL driver header file for more useful macros
EricLew 0:80ee8f3b695e 94
EricLew 0:80ee8f3b695e 95
EricLew 0:80ee8f3b695e 96 @endverbatim
EricLew 0:80ee8f3b695e 97 ******************************************************************************
EricLew 0:80ee8f3b695e 98 * @attention
EricLew 0:80ee8f3b695e 99 *
EricLew 0:80ee8f3b695e 100 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
EricLew 0:80ee8f3b695e 101 *
EricLew 0:80ee8f3b695e 102 * Redistribution and use in source and binary forms, with or without modification,
EricLew 0:80ee8f3b695e 103 * are permitted provided that the following conditions are met:
EricLew 0:80ee8f3b695e 104 * 1. Redistributions of source code must retain the above copyright notice,
EricLew 0:80ee8f3b695e 105 * this list of conditions and the following disclaimer.
EricLew 0:80ee8f3b695e 106 * 2. Redistributions in binary form must reproduce the above copyright notice,
EricLew 0:80ee8f3b695e 107 * this list of conditions and the following disclaimer in the documentation
EricLew 0:80ee8f3b695e 108 * and/or other materials provided with the distribution.
EricLew 0:80ee8f3b695e 109 * 3. Neither the name of STMicroelectronics nor the names of its contributors
EricLew 0:80ee8f3b695e 110 * may be used to endorse or promote products derived from this software
EricLew 0:80ee8f3b695e 111 * without specific prior written permission.
EricLew 0:80ee8f3b695e 112 *
EricLew 0:80ee8f3b695e 113 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
EricLew 0:80ee8f3b695e 114 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
EricLew 0:80ee8f3b695e 115 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
EricLew 0:80ee8f3b695e 116 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
EricLew 0:80ee8f3b695e 117 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
EricLew 0:80ee8f3b695e 118 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
EricLew 0:80ee8f3b695e 119 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
EricLew 0:80ee8f3b695e 120 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
EricLew 0:80ee8f3b695e 121 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
EricLew 0:80ee8f3b695e 122 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
EricLew 0:80ee8f3b695e 123 *
EricLew 0:80ee8f3b695e 124 ******************************************************************************
EricLew 0:80ee8f3b695e 125 */
EricLew 0:80ee8f3b695e 126
EricLew 0:80ee8f3b695e 127 /* Includes ------------------------------------------------------------------*/
EricLew 0:80ee8f3b695e 128 #include "stm32l4xx_hal.h"
EricLew 0:80ee8f3b695e 129
EricLew 0:80ee8f3b695e 130 /** @addtogroup STM32L4xx_HAL_Driver
EricLew 0:80ee8f3b695e 131 * @{
EricLew 0:80ee8f3b695e 132 */
EricLew 0:80ee8f3b695e 133
EricLew 0:80ee8f3b695e 134 /** @defgroup SMBUS SMBUS
EricLew 0:80ee8f3b695e 135 * @brief SMBUS HAL module driver
EricLew 0:80ee8f3b695e 136 * @{
EricLew 0:80ee8f3b695e 137 */
EricLew 0:80ee8f3b695e 138
EricLew 0:80ee8f3b695e 139 #ifdef HAL_SMBUS_MODULE_ENABLED
EricLew 0:80ee8f3b695e 140
EricLew 0:80ee8f3b695e 141 /* Private typedef -----------------------------------------------------------*/
EricLew 0:80ee8f3b695e 142 /* Private constants ---------------------------------------------------------*/
EricLew 0:80ee8f3b695e 143 /** @defgroup SMBUS_Private_Define SMBUS Private Constants
EricLew 0:80ee8f3b695e 144 * @{
EricLew 0:80ee8f3b695e 145 */
EricLew 0:80ee8f3b695e 146 #define TIMING_CLEAR_MASK ((uint32_t)0xF0FFFFFF) /*<! SMBUS TIMING clear register Mask */
EricLew 0:80ee8f3b695e 147 #define HAL_TIMEOUT_ADDR ((uint32_t)10000) /* 10 s */
EricLew 0:80ee8f3b695e 148 #define HAL_TIMEOUT_BUSY ((uint32_t)25) /* 25 ms */
EricLew 0:80ee8f3b695e 149 #define HAL_TIMEOUT_DIR ((uint32_t)25) /* 25 ms */
EricLew 0:80ee8f3b695e 150 #define HAL_TIMEOUT_RXNE ((uint32_t)25) /* 25 ms */
EricLew 0:80ee8f3b695e 151 #define HAL_TIMEOUT_STOPF ((uint32_t)25) /* 25 ms */
EricLew 0:80ee8f3b695e 152 #define HAL_TIMEOUT_TC ((uint32_t)25) /* 25 ms */
EricLew 0:80ee8f3b695e 153 #define HAL_TIMEOUT_TCR ((uint32_t)25) /* 25 ms */
EricLew 0:80ee8f3b695e 154 #define HAL_TIMEOUT_TXIS ((uint32_t)25) /* 25 ms */
EricLew 0:80ee8f3b695e 155 #define MAX_NBYTE_SIZE 255
EricLew 0:80ee8f3b695e 156 /**
EricLew 0:80ee8f3b695e 157 * @}
EricLew 0:80ee8f3b695e 158 */
EricLew 0:80ee8f3b695e 159
EricLew 0:80ee8f3b695e 160 /* Private macro -------------------------------------------------------------*/
EricLew 0:80ee8f3b695e 161 /* Private variables ---------------------------------------------------------*/
EricLew 0:80ee8f3b695e 162 /* Private function prototypes -----------------------------------------------*/
EricLew 0:80ee8f3b695e 163 /** @addtogroup SMBUS_Private_Functions SMBUS Private Functions
EricLew 0:80ee8f3b695e 164 * @{
EricLew 0:80ee8f3b695e 165 */
EricLew 0:80ee8f3b695e 166 static HAL_StatusTypeDef SMBUS_WaitOnFlagUntilTimeout(SMBUS_HandleTypeDef *hsmbus, uint32_t Flag, FlagStatus Status, uint32_t Timeout);
EricLew 0:80ee8f3b695e 167
EricLew 0:80ee8f3b695e 168 static HAL_StatusTypeDef SMBUS_Enable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint16_t InterruptRequest);
EricLew 0:80ee8f3b695e 169 static HAL_StatusTypeDef SMBUS_Disable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint16_t InterruptRequest);
EricLew 0:80ee8f3b695e 170 static HAL_StatusTypeDef SMBUS_Master_ISR(SMBUS_HandleTypeDef *hsmbus);
EricLew 0:80ee8f3b695e 171 static HAL_StatusTypeDef SMBUS_Slave_ISR(SMBUS_HandleTypeDef *hsmbus);
EricLew 0:80ee8f3b695e 172
EricLew 0:80ee8f3b695e 173 static void SMBUS_TransferConfig(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request);
EricLew 0:80ee8f3b695e 174 /**
EricLew 0:80ee8f3b695e 175 * @}
EricLew 0:80ee8f3b695e 176 */
EricLew 0:80ee8f3b695e 177
EricLew 0:80ee8f3b695e 178 /* Exported functions --------------------------------------------------------*/
EricLew 0:80ee8f3b695e 179
EricLew 0:80ee8f3b695e 180 /** @defgroup SMBUS_Exported_Functions SMBUS Exported Functions
EricLew 0:80ee8f3b695e 181 * @{
EricLew 0:80ee8f3b695e 182 */
EricLew 0:80ee8f3b695e 183
EricLew 0:80ee8f3b695e 184 /** @defgroup SMBUS_Exported_Functions_Group1 Initialization and de-initialization functions
EricLew 0:80ee8f3b695e 185 * @brief Initialization and Configuration functions
EricLew 0:80ee8f3b695e 186 *
EricLew 0:80ee8f3b695e 187 @verbatim
EricLew 0:80ee8f3b695e 188 ===============================================================================
EricLew 0:80ee8f3b695e 189 ##### Initialization and de-initialization functions #####
EricLew 0:80ee8f3b695e 190 ===============================================================================
EricLew 0:80ee8f3b695e 191 [..] This subsection provides a set of functions allowing to initialize and
EricLew 0:80ee8f3b695e 192 de-initialize the SMBUSx peripheral:
EricLew 0:80ee8f3b695e 193
EricLew 0:80ee8f3b695e 194 (+) User must Implement HAL_SMBUS_MspInit() function in which he configures
EricLew 0:80ee8f3b695e 195 all related peripherals resources (CLOCK, GPIO, IT and NVIC ).
EricLew 0:80ee8f3b695e 196
EricLew 0:80ee8f3b695e 197 (+) Call the function HAL_SMBUS_Init() to configure the selected device with
EricLew 0:80ee8f3b695e 198 the selected configuration:
EricLew 0:80ee8f3b695e 199 (++) Clock Timing
EricLew 0:80ee8f3b695e 200 (++) Bus Timeout
EricLew 0:80ee8f3b695e 201 (++) Analog Filer mode
EricLew 0:80ee8f3b695e 202 (++) Own Address 1
EricLew 0:80ee8f3b695e 203 (++) Addressing mode (Master, Slave)
EricLew 0:80ee8f3b695e 204 (++) Dual Addressing mode
EricLew 0:80ee8f3b695e 205 (++) Own Address 2
EricLew 0:80ee8f3b695e 206 (++) Own Address 2 Mask
EricLew 0:80ee8f3b695e 207 (++) General call mode
EricLew 0:80ee8f3b695e 208 (++) Nostretch mode
EricLew 0:80ee8f3b695e 209 (++) Packet Error Check mode
EricLew 0:80ee8f3b695e 210 (++) Peripheral mode
EricLew 0:80ee8f3b695e 211
EricLew 0:80ee8f3b695e 212
EricLew 0:80ee8f3b695e 213 (+) Call the function HAL_SMBUS_DeInit() to restore the default configuration
EricLew 0:80ee8f3b695e 214 of the selected SMBUSx peripheral.
EricLew 0:80ee8f3b695e 215
EricLew 0:80ee8f3b695e 216 @endverbatim
EricLew 0:80ee8f3b695e 217 * @{
EricLew 0:80ee8f3b695e 218 */
EricLew 0:80ee8f3b695e 219
EricLew 0:80ee8f3b695e 220 /**
EricLew 0:80ee8f3b695e 221 * @brief Initialize the SMBUS according to the specified parameters
EricLew 0:80ee8f3b695e 222 * in the SMBUS_InitTypeDef and initialize the associated handle.
EricLew 0:80ee8f3b695e 223 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
EricLew 0:80ee8f3b695e 224 * the configuration information for the specified SMBUS.
EricLew 0:80ee8f3b695e 225 * @retval HAL status
EricLew 0:80ee8f3b695e 226 */
EricLew 0:80ee8f3b695e 227 HAL_StatusTypeDef HAL_SMBUS_Init(SMBUS_HandleTypeDef *hsmbus)
EricLew 0:80ee8f3b695e 228 {
EricLew 0:80ee8f3b695e 229 /* Check the SMBUS handle allocation */
EricLew 0:80ee8f3b695e 230 if(hsmbus == NULL)
EricLew 0:80ee8f3b695e 231 {
EricLew 0:80ee8f3b695e 232 return HAL_ERROR;
EricLew 0:80ee8f3b695e 233 }
EricLew 0:80ee8f3b695e 234
EricLew 0:80ee8f3b695e 235 /* Check the parameters */
EricLew 0:80ee8f3b695e 236 assert_param(IS_SMBUS_ALL_INSTANCE(hsmbus->Instance));
EricLew 0:80ee8f3b695e 237 assert_param(IS_SMBUS_ANALOG_FILTER(hsmbus->Init.AnalogFilter));
EricLew 0:80ee8f3b695e 238 assert_param(IS_SMBUS_OWN_ADDRESS1(hsmbus->Init.OwnAddress1));
EricLew 0:80ee8f3b695e 239 assert_param(IS_SMBUS_ADDRESSING_MODE(hsmbus->Init.AddressingMode));
EricLew 0:80ee8f3b695e 240 assert_param(IS_SMBUS_DUAL_ADDRESS(hsmbus->Init.DualAddressMode));
EricLew 0:80ee8f3b695e 241 assert_param(IS_SMBUS_OWN_ADDRESS2(hsmbus->Init.OwnAddress2));
EricLew 0:80ee8f3b695e 242 assert_param(IS_SMBUS_OWN_ADDRESS2_MASK(hsmbus->Init.OwnAddress2Masks));
EricLew 0:80ee8f3b695e 243 assert_param(IS_SMBUS_GENERAL_CALL(hsmbus->Init.GeneralCallMode));
EricLew 0:80ee8f3b695e 244 assert_param(IS_SMBUS_NO_STRETCH(hsmbus->Init.NoStretchMode));
EricLew 0:80ee8f3b695e 245 assert_param(IS_SMBUS_PEC(hsmbus->Init.PacketErrorCheckMode));
EricLew 0:80ee8f3b695e 246 assert_param(IS_SMBUS_PERIPHERAL_MODE(hsmbus->Init.PeripheralMode));
EricLew 0:80ee8f3b695e 247
EricLew 0:80ee8f3b695e 248 if(hsmbus->State == HAL_SMBUS_STATE_RESET)
EricLew 0:80ee8f3b695e 249 {
EricLew 0:80ee8f3b695e 250 /* Allocate lock resource and initialize it */
EricLew 0:80ee8f3b695e 251 hsmbus->Lock = HAL_UNLOCKED;
EricLew 0:80ee8f3b695e 252
EricLew 0:80ee8f3b695e 253 /* Init the low level hardware : GPIO, CLOCK, NVIC */
EricLew 0:80ee8f3b695e 254 HAL_SMBUS_MspInit(hsmbus);
EricLew 0:80ee8f3b695e 255 }
EricLew 0:80ee8f3b695e 256
EricLew 0:80ee8f3b695e 257 hsmbus->State = HAL_SMBUS_STATE_BUSY;
EricLew 0:80ee8f3b695e 258
EricLew 0:80ee8f3b695e 259 /* Disable the selected SMBUS peripheral */
EricLew 0:80ee8f3b695e 260 __HAL_SMBUS_DISABLE(hsmbus);
EricLew 0:80ee8f3b695e 261
EricLew 0:80ee8f3b695e 262 /*---------------------------- SMBUSx TIMINGR Configuration ------------------------*/
EricLew 0:80ee8f3b695e 263 /* Configure SMBUSx: Frequency range */
EricLew 0:80ee8f3b695e 264 hsmbus->Instance->TIMINGR = hsmbus->Init.Timing & TIMING_CLEAR_MASK;
EricLew 0:80ee8f3b695e 265
EricLew 0:80ee8f3b695e 266 /*---------------------------- SMBUSx TIMEOUTR Configuration ------------------------*/
EricLew 0:80ee8f3b695e 267 /* Configure SMBUSx: Bus Timeout */
EricLew 0:80ee8f3b695e 268 hsmbus->Instance->TIMEOUTR &= ~I2C_TIMEOUTR_TIMOUTEN;
EricLew 0:80ee8f3b695e 269 hsmbus->Instance->TIMEOUTR &= ~I2C_TIMEOUTR_TEXTEN;
EricLew 0:80ee8f3b695e 270 hsmbus->Instance->TIMEOUTR = hsmbus->Init.SMBusTimeout;
EricLew 0:80ee8f3b695e 271
EricLew 0:80ee8f3b695e 272 /*---------------------------- SMBUSx OAR1 Configuration -----------------------*/
EricLew 0:80ee8f3b695e 273 /* Configure SMBUSx: Own Address1 and ack own address1 mode */
EricLew 0:80ee8f3b695e 274 hsmbus->Instance->OAR1 &= ~I2C_OAR1_OA1EN;
EricLew 0:80ee8f3b695e 275
EricLew 0:80ee8f3b695e 276 if(hsmbus->Init.OwnAddress1 != 0)
EricLew 0:80ee8f3b695e 277 {
EricLew 0:80ee8f3b695e 278 if(hsmbus->Init.AddressingMode == SMBUS_ADDRESSINGMODE_7BIT)
EricLew 0:80ee8f3b695e 279 {
EricLew 0:80ee8f3b695e 280 hsmbus->Instance->OAR1 = (I2C_OAR1_OA1EN | hsmbus->Init.OwnAddress1);
EricLew 0:80ee8f3b695e 281 }
EricLew 0:80ee8f3b695e 282 else /* SMBUS_ADDRESSINGMODE_10BIT */
EricLew 0:80ee8f3b695e 283 {
EricLew 0:80ee8f3b695e 284 hsmbus->Instance->OAR1 = (I2C_OAR1_OA1EN | I2C_OAR1_OA1MODE | hsmbus->Init.OwnAddress1);
EricLew 0:80ee8f3b695e 285 }
EricLew 0:80ee8f3b695e 286 }
EricLew 0:80ee8f3b695e 287
EricLew 0:80ee8f3b695e 288 /*---------------------------- SMBUSx CR2 Configuration ------------------------*/
EricLew 0:80ee8f3b695e 289 /* Configure SMBUSx: Addressing Master mode */
EricLew 0:80ee8f3b695e 290 if(hsmbus->Init.AddressingMode == SMBUS_ADDRESSINGMODE_10BIT)
EricLew 0:80ee8f3b695e 291 {
EricLew 0:80ee8f3b695e 292 hsmbus->Instance->CR2 = (I2C_CR2_ADD10);
EricLew 0:80ee8f3b695e 293 }
EricLew 0:80ee8f3b695e 294 /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process) */
EricLew 0:80ee8f3b695e 295 /* AUTOEND and NACK bit will be manage during Transfer process */
EricLew 0:80ee8f3b695e 296 hsmbus->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK);
EricLew 0:80ee8f3b695e 297
EricLew 0:80ee8f3b695e 298 /*---------------------------- SMBUSx OAR2 Configuration -----------------------*/
EricLew 0:80ee8f3b695e 299 /* Configure SMBUSx: Dual mode and Own Address2 */
EricLew 0:80ee8f3b695e 300 hsmbus->Instance->OAR2 = (hsmbus->Init.DualAddressMode | hsmbus->Init.OwnAddress2 | (hsmbus->Init.OwnAddress2Masks << 8));
EricLew 0:80ee8f3b695e 301
EricLew 0:80ee8f3b695e 302 /*---------------------------- SMBUSx CR1 Configuration ------------------------*/
EricLew 0:80ee8f3b695e 303 /* Configure SMBUSx: Generalcall and NoStretch mode */
EricLew 0:80ee8f3b695e 304 hsmbus->Instance->CR1 = (hsmbus->Init.GeneralCallMode | hsmbus->Init.NoStretchMode | hsmbus->Init.PacketErrorCheckMode | hsmbus->Init.PeripheralMode | hsmbus->Init.AnalogFilter);
EricLew 0:80ee8f3b695e 305
EricLew 0:80ee8f3b695e 306 /* Enable Slave Byte Control only in case of Packet Error Check is enabled and SMBUS Peripheral is set in Slave mode */
EricLew 0:80ee8f3b695e 307 if( (hsmbus->Init.PacketErrorCheckMode == SMBUS_PEC_ENABLE)
EricLew 0:80ee8f3b695e 308 && ( (hsmbus->Init.PeripheralMode == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE) || (hsmbus->Init.PeripheralMode == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP) ) )
EricLew 0:80ee8f3b695e 309 {
EricLew 0:80ee8f3b695e 310 hsmbus->Instance->CR1 |= I2C_CR1_SBC;
EricLew 0:80ee8f3b695e 311 }
EricLew 0:80ee8f3b695e 312
EricLew 0:80ee8f3b695e 313 /* Enable the selected SMBUS peripheral */
EricLew 0:80ee8f3b695e 314 __HAL_SMBUS_ENABLE(hsmbus);
EricLew 0:80ee8f3b695e 315
EricLew 0:80ee8f3b695e 316 hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
EricLew 0:80ee8f3b695e 317 hsmbus->PreviousState = HAL_SMBUS_STATE_READY;
EricLew 0:80ee8f3b695e 318 hsmbus->State = HAL_SMBUS_STATE_READY;
EricLew 0:80ee8f3b695e 319
EricLew 0:80ee8f3b695e 320 return HAL_OK;
EricLew 0:80ee8f3b695e 321 }
EricLew 0:80ee8f3b695e 322
EricLew 0:80ee8f3b695e 323 /**
EricLew 0:80ee8f3b695e 324 * @brief DeInitialize the SMBUS peripheral.
EricLew 0:80ee8f3b695e 325 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
EricLew 0:80ee8f3b695e 326 * the configuration information for the specified SMBUS.
EricLew 0:80ee8f3b695e 327 * @retval HAL status
EricLew 0:80ee8f3b695e 328 */
EricLew 0:80ee8f3b695e 329 HAL_StatusTypeDef HAL_SMBUS_DeInit(SMBUS_HandleTypeDef *hsmbus)
EricLew 0:80ee8f3b695e 330 {
EricLew 0:80ee8f3b695e 331 /* Check the SMBUS handle allocation */
EricLew 0:80ee8f3b695e 332 if(hsmbus == NULL)
EricLew 0:80ee8f3b695e 333 {
EricLew 0:80ee8f3b695e 334 return HAL_ERROR;
EricLew 0:80ee8f3b695e 335 }
EricLew 0:80ee8f3b695e 336
EricLew 0:80ee8f3b695e 337 /* Check the parameters */
EricLew 0:80ee8f3b695e 338 assert_param(IS_SMBUS_ALL_INSTANCE(hsmbus->Instance));
EricLew 0:80ee8f3b695e 339
EricLew 0:80ee8f3b695e 340 hsmbus->State = HAL_SMBUS_STATE_BUSY;
EricLew 0:80ee8f3b695e 341
EricLew 0:80ee8f3b695e 342 /* Disable the SMBUS Peripheral Clock */
EricLew 0:80ee8f3b695e 343 __HAL_SMBUS_DISABLE(hsmbus);
EricLew 0:80ee8f3b695e 344
EricLew 0:80ee8f3b695e 345 /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
EricLew 0:80ee8f3b695e 346 HAL_SMBUS_MspDeInit(hsmbus);
EricLew 0:80ee8f3b695e 347
EricLew 0:80ee8f3b695e 348 hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
EricLew 0:80ee8f3b695e 349 hsmbus->PreviousState = HAL_SMBUS_STATE_RESET;
EricLew 0:80ee8f3b695e 350 hsmbus->State = HAL_SMBUS_STATE_RESET;
EricLew 0:80ee8f3b695e 351
EricLew 0:80ee8f3b695e 352 /* Release Lock */
EricLew 0:80ee8f3b695e 353 __HAL_UNLOCK(hsmbus);
EricLew 0:80ee8f3b695e 354
EricLew 0:80ee8f3b695e 355 return HAL_OK;
EricLew 0:80ee8f3b695e 356 }
EricLew 0:80ee8f3b695e 357
EricLew 0:80ee8f3b695e 358 /**
EricLew 0:80ee8f3b695e 359 * @brief Initialize the SMBUS MSP.
EricLew 0:80ee8f3b695e 360 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
EricLew 0:80ee8f3b695e 361 * the configuration information for the specified SMBUS.
EricLew 0:80ee8f3b695e 362 * @retval None
EricLew 0:80ee8f3b695e 363 */
EricLew 0:80ee8f3b695e 364 __weak void HAL_SMBUS_MspInit(SMBUS_HandleTypeDef *hsmbus)
EricLew 0:80ee8f3b695e 365 {
EricLew 0:80ee8f3b695e 366 /* NOTE : This function should not be modified, when the callback is needed,
EricLew 0:80ee8f3b695e 367 the HAL_SMBUS_MspInit could be implemented in the user file
EricLew 0:80ee8f3b695e 368 */
EricLew 0:80ee8f3b695e 369 }
EricLew 0:80ee8f3b695e 370
EricLew 0:80ee8f3b695e 371 /**
EricLew 0:80ee8f3b695e 372 * @brief DeInitialize the SMBUS MSP.
EricLew 0:80ee8f3b695e 373 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
EricLew 0:80ee8f3b695e 374 * the configuration information for the specified SMBUS.
EricLew 0:80ee8f3b695e 375 * @retval None
EricLew 0:80ee8f3b695e 376 */
EricLew 0:80ee8f3b695e 377 __weak void HAL_SMBUS_MspDeInit(SMBUS_HandleTypeDef *hsmbus)
EricLew 0:80ee8f3b695e 378 {
EricLew 0:80ee8f3b695e 379 /* NOTE : This function should not be modified, when the callback is needed,
EricLew 0:80ee8f3b695e 380 the HAL_SMBUS_MspDeInit could be implemented in the user file
EricLew 0:80ee8f3b695e 381 */
EricLew 0:80ee8f3b695e 382 }
EricLew 0:80ee8f3b695e 383
EricLew 0:80ee8f3b695e 384 /**
EricLew 0:80ee8f3b695e 385 * @}
EricLew 0:80ee8f3b695e 386 */
EricLew 0:80ee8f3b695e 387
EricLew 0:80ee8f3b695e 388 /** @defgroup SMBUS_Exported_Functions_Group2 Input and Output operation functions
EricLew 0:80ee8f3b695e 389 * @brief Data transfers functions
EricLew 0:80ee8f3b695e 390 *
EricLew 0:80ee8f3b695e 391 @verbatim
EricLew 0:80ee8f3b695e 392 ===============================================================================
EricLew 0:80ee8f3b695e 393 ##### IO operation functions #####
EricLew 0:80ee8f3b695e 394 ===============================================================================
EricLew 0:80ee8f3b695e 395 [..]
EricLew 0:80ee8f3b695e 396 This subsection provides a set of functions allowing to manage the SMBUS data
EricLew 0:80ee8f3b695e 397 transfers.
EricLew 0:80ee8f3b695e 398
EricLew 0:80ee8f3b695e 399 (#) Blocking mode function to check if device is ready for usage is :
EricLew 0:80ee8f3b695e 400 (++) HAL_SMBUS_IsDeviceReady()
EricLew 0:80ee8f3b695e 401
EricLew 0:80ee8f3b695e 402 (#) There is only one mode of transfer:
EricLew 0:80ee8f3b695e 403 (++) No-Blocking mode : The communication is performed using Interrupts.
EricLew 0:80ee8f3b695e 404 These functions return the status of the transfer startup.
EricLew 0:80ee8f3b695e 405 The end of the data processing will be indicated through the
EricLew 0:80ee8f3b695e 406 dedicated SMBUS IRQ when using Interrupt mode.
EricLew 0:80ee8f3b695e 407
EricLew 0:80ee8f3b695e 408 (#) No-Blocking mode functions with Interrupt are :
EricLew 0:80ee8f3b695e 409 (++) HAL_SMBUS_Master_Transmit_IT()
EricLew 0:80ee8f3b695e 410 (++) HAL_SMBUS_Master_Receive_IT()
EricLew 0:80ee8f3b695e 411 (++) HAL_SMBUS_Slave_Transmit_IT()
EricLew 0:80ee8f3b695e 412 (++) HAL_SMBUS_Slave_Receive_IT()
EricLew 0:80ee8f3b695e 413 (++) HAL_SMBUS_EnableListen_IT() or alias HAL_SMBUS_EnableListen_IT()
EricLew 0:80ee8f3b695e 414 (++) HAL_SMBUS_DisableListen_IT()
EricLew 0:80ee8f3b695e 415 (++) HAL_SMBUS_EnableAlert_IT()
EricLew 0:80ee8f3b695e 416 (++) HAL_SMBUS_DisableAlert_IT()
EricLew 0:80ee8f3b695e 417
EricLew 0:80ee8f3b695e 418 (#) A set of Transfer Complete Callbacks are provided in No_Blocking mode:
EricLew 0:80ee8f3b695e 419 (++) HAL_SMBUS_MasterTxCpltCallback()
EricLew 0:80ee8f3b695e 420 (++) HAL_SMBUS_MasterRxCpltCallback()
EricLew 0:80ee8f3b695e 421 (++) HAL_SMBUS_SlaveTxCpltCallback()
EricLew 0:80ee8f3b695e 422 (++) HAL_SMBUS_SlaveRxCpltCallback()
EricLew 0:80ee8f3b695e 423 (++) HAL_SMBUS_AddrCallback()
EricLew 0:80ee8f3b695e 424 (++) HAL_SMBUS_ListenCpltCallback()
EricLew 0:80ee8f3b695e 425 (++) HAL_SMBUS_ErrorCallback()
EricLew 0:80ee8f3b695e 426
EricLew 0:80ee8f3b695e 427 @endverbatim
EricLew 0:80ee8f3b695e 428 * @{
EricLew 0:80ee8f3b695e 429 */
EricLew 0:80ee8f3b695e 430
EricLew 0:80ee8f3b695e 431 /**
EricLew 0:80ee8f3b695e 432 * @brief Transmit in master/host SMBUS mode an amount of data in non-blocking mode with Interrupt.
EricLew 0:80ee8f3b695e 433 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
EricLew 0:80ee8f3b695e 434 * the configuration information for the specified SMBUS.
EricLew 0:80ee8f3b695e 435 * @param DevAddress: Target device address
EricLew 0:80ee8f3b695e 436 * @param pData: Pointer to data buffer
EricLew 0:80ee8f3b695e 437 * @param Size: Amount of data to be sent
EricLew 0:80ee8f3b695e 438 * @param XferOptions: Options of Transfer, value of @ref SMBUS_XferOptions_definition
EricLew 0:80ee8f3b695e 439 * @retval HAL status
EricLew 0:80ee8f3b695e 440 */
EricLew 0:80ee8f3b695e 441 HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
EricLew 0:80ee8f3b695e 442 {
EricLew 0:80ee8f3b695e 443 /* Check the parameters */
EricLew 0:80ee8f3b695e 444 assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions));
EricLew 0:80ee8f3b695e 445
EricLew 0:80ee8f3b695e 446 if(hsmbus->State == HAL_SMBUS_STATE_READY)
EricLew 0:80ee8f3b695e 447 {
EricLew 0:80ee8f3b695e 448 /* Process Locked */
EricLew 0:80ee8f3b695e 449 __HAL_LOCK(hsmbus);
EricLew 0:80ee8f3b695e 450
EricLew 0:80ee8f3b695e 451 hsmbus->State = HAL_SMBUS_STATE_MASTER_BUSY_TX;
EricLew 0:80ee8f3b695e 452 hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
EricLew 0:80ee8f3b695e 453 /* Prepare transfer parameters */
EricLew 0:80ee8f3b695e 454 hsmbus->pBuffPtr = pData;
EricLew 0:80ee8f3b695e 455 hsmbus->XferCount = Size;
EricLew 0:80ee8f3b695e 456 hsmbus->XferOptions = XferOptions;
EricLew 0:80ee8f3b695e 457
EricLew 0:80ee8f3b695e 458 /* In case of Quick command, remove autoend mode */
EricLew 0:80ee8f3b695e 459 /* Manage the stop generation by software */
EricLew 0:80ee8f3b695e 460 if(hsmbus->pBuffPtr == NULL)
EricLew 0:80ee8f3b695e 461 {
EricLew 0:80ee8f3b695e 462 hsmbus->XferOptions &= ~SMBUS_AUTOEND_MODE;
EricLew 0:80ee8f3b695e 463 }
EricLew 0:80ee8f3b695e 464
EricLew 0:80ee8f3b695e 465 if(Size > MAX_NBYTE_SIZE)
EricLew 0:80ee8f3b695e 466 {
EricLew 0:80ee8f3b695e 467 hsmbus->XferSize = MAX_NBYTE_SIZE;
EricLew 0:80ee8f3b695e 468 }
EricLew 0:80ee8f3b695e 469 else
EricLew 0:80ee8f3b695e 470 {
EricLew 0:80ee8f3b695e 471 hsmbus->XferSize = Size;
EricLew 0:80ee8f3b695e 472 }
EricLew 0:80ee8f3b695e 473
EricLew 0:80ee8f3b695e 474 /* Send Slave Address */
EricLew 0:80ee8f3b695e 475 /* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */
EricLew 0:80ee8f3b695e 476 if( (hsmbus->XferSize == MAX_NBYTE_SIZE) && (hsmbus->XferSize < hsmbus->XferCount) )
EricLew 0:80ee8f3b695e 477 {
EricLew 0:80ee8f3b695e 478 SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_GENERATE_START_WRITE);
EricLew 0:80ee8f3b695e 479 }
EricLew 0:80ee8f3b695e 480 else
EricLew 0:80ee8f3b695e 481 {
EricLew 0:80ee8f3b695e 482 /* If transfer direction not change, do not generate Restart Condition */
EricLew 0:80ee8f3b695e 483 /* Mean Previous state is same as current state */
EricLew 0:80ee8f3b695e 484 if(hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_TX)
EricLew 0:80ee8f3b695e 485 {
EricLew 0:80ee8f3b695e 486 SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
EricLew 0:80ee8f3b695e 487 }
EricLew 0:80ee8f3b695e 488 /* Else transfer direction change, so generate Restart with new transfer direction */
EricLew 0:80ee8f3b695e 489 else
EricLew 0:80ee8f3b695e 490 {
EricLew 0:80ee8f3b695e 491 SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_GENERATE_START_WRITE);
EricLew 0:80ee8f3b695e 492 }
EricLew 0:80ee8f3b695e 493
EricLew 0:80ee8f3b695e 494 /* If PEC mode is enable, size to transmit manage by SW part should be Size-1 byte, corresponding to PEC byte */
EricLew 0:80ee8f3b695e 495 /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
EricLew 0:80ee8f3b695e 496 if(SMBUS_GET_PEC_MODE(hsmbus) != RESET)
EricLew 0:80ee8f3b695e 497 {
EricLew 0:80ee8f3b695e 498 hsmbus->XferSize--;
EricLew 0:80ee8f3b695e 499 hsmbus->XferCount--;
EricLew 0:80ee8f3b695e 500 }
EricLew 0:80ee8f3b695e 501 }
EricLew 0:80ee8f3b695e 502
EricLew 0:80ee8f3b695e 503 /* Process Unlocked */
EricLew 0:80ee8f3b695e 504 __HAL_UNLOCK(hsmbus);
EricLew 0:80ee8f3b695e 505
EricLew 0:80ee8f3b695e 506 /* Note : The SMBUS interrupts must be enabled after unlocking current process
EricLew 0:80ee8f3b695e 507 to avoid the risk of SMBUS interrupt handle execution before current
EricLew 0:80ee8f3b695e 508 process unlock */
EricLew 0:80ee8f3b695e 509 SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_TX);
EricLew 0:80ee8f3b695e 510
EricLew 0:80ee8f3b695e 511 return HAL_OK;
EricLew 0:80ee8f3b695e 512 }
EricLew 0:80ee8f3b695e 513 else
EricLew 0:80ee8f3b695e 514 {
EricLew 0:80ee8f3b695e 515 return HAL_BUSY;
EricLew 0:80ee8f3b695e 516 }
EricLew 0:80ee8f3b695e 517 }
EricLew 0:80ee8f3b695e 518
EricLew 0:80ee8f3b695e 519 /**
EricLew 0:80ee8f3b695e 520 * @brief Receive in master/host SMBUS mode an amount of data in non-blocking mode with Interrupt.
EricLew 0:80ee8f3b695e 521 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
EricLew 0:80ee8f3b695e 522 * the configuration information for the specified SMBUS.
EricLew 0:80ee8f3b695e 523 * @param DevAddress: Target device address
EricLew 0:80ee8f3b695e 524 * @param pData: Pointer to data buffer
EricLew 0:80ee8f3b695e 525 * @param Size: Amount of data to be sent
EricLew 0:80ee8f3b695e 526 * @param XferOptions: Options of Transfer, value of @ref SMBUS_XferOptions_definition
EricLew 0:80ee8f3b695e 527 * @retval HAL status
EricLew 0:80ee8f3b695e 528 */
EricLew 0:80ee8f3b695e 529 HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
EricLew 0:80ee8f3b695e 530 {
EricLew 0:80ee8f3b695e 531 /* Check the parameters */
EricLew 0:80ee8f3b695e 532 assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions));
EricLew 0:80ee8f3b695e 533
EricLew 0:80ee8f3b695e 534 if(hsmbus->State == HAL_SMBUS_STATE_READY)
EricLew 0:80ee8f3b695e 535 {
EricLew 0:80ee8f3b695e 536 /* Process Locked */
EricLew 0:80ee8f3b695e 537 __HAL_LOCK(hsmbus);
EricLew 0:80ee8f3b695e 538
EricLew 0:80ee8f3b695e 539 hsmbus->State = HAL_SMBUS_STATE_MASTER_BUSY_RX;
EricLew 0:80ee8f3b695e 540 hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
EricLew 0:80ee8f3b695e 541
EricLew 0:80ee8f3b695e 542 /* Prepare transfer parameters */
EricLew 0:80ee8f3b695e 543 hsmbus->pBuffPtr = pData;
EricLew 0:80ee8f3b695e 544 hsmbus->XferCount = Size;
EricLew 0:80ee8f3b695e 545 hsmbus->XferOptions = XferOptions;
EricLew 0:80ee8f3b695e 546
EricLew 0:80ee8f3b695e 547 /* In case of Quick command, remove autoend mode */
EricLew 0:80ee8f3b695e 548 /* Manage the stop generation by software */
EricLew 0:80ee8f3b695e 549 if(hsmbus->pBuffPtr == NULL)
EricLew 0:80ee8f3b695e 550 {
EricLew 0:80ee8f3b695e 551 hsmbus->XferOptions &= ~SMBUS_AUTOEND_MODE;
EricLew 0:80ee8f3b695e 552 }
EricLew 0:80ee8f3b695e 553
EricLew 0:80ee8f3b695e 554 if(Size > MAX_NBYTE_SIZE)
EricLew 0:80ee8f3b695e 555 {
EricLew 0:80ee8f3b695e 556 hsmbus->XferSize = MAX_NBYTE_SIZE;
EricLew 0:80ee8f3b695e 557 }
EricLew 0:80ee8f3b695e 558 else
EricLew 0:80ee8f3b695e 559 {
EricLew 0:80ee8f3b695e 560 hsmbus->XferSize = Size;
EricLew 0:80ee8f3b695e 561 }
EricLew 0:80ee8f3b695e 562
EricLew 0:80ee8f3b695e 563 /* Send Slave Address */
EricLew 0:80ee8f3b695e 564 /* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */
EricLew 0:80ee8f3b695e 565 if( (hsmbus->XferSize == MAX_NBYTE_SIZE) && (hsmbus->XferSize < hsmbus->XferCount) )
EricLew 0:80ee8f3b695e 566 {
EricLew 0:80ee8f3b695e 567 SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_GENERATE_START_READ);
EricLew 0:80ee8f3b695e 568 }
EricLew 0:80ee8f3b695e 569 else
EricLew 0:80ee8f3b695e 570 {
EricLew 0:80ee8f3b695e 571 /* If transfer direction not change, do not generate Restart Condition */
EricLew 0:80ee8f3b695e 572 /* Mean Previous state is same as current state */
EricLew 0:80ee8f3b695e 573 if(hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_RX)
EricLew 0:80ee8f3b695e 574 {
EricLew 0:80ee8f3b695e 575 SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
EricLew 0:80ee8f3b695e 576 }
EricLew 0:80ee8f3b695e 577 /* Else transfer direction change, so generate Restart with new transfer direction */
EricLew 0:80ee8f3b695e 578 else
EricLew 0:80ee8f3b695e 579 {
EricLew 0:80ee8f3b695e 580 SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_GENERATE_START_READ);
EricLew 0:80ee8f3b695e 581 }
EricLew 0:80ee8f3b695e 582 }
EricLew 0:80ee8f3b695e 583
EricLew 0:80ee8f3b695e 584 /* Process Unlocked */
EricLew 0:80ee8f3b695e 585 __HAL_UNLOCK(hsmbus);
EricLew 0:80ee8f3b695e 586
EricLew 0:80ee8f3b695e 587 /* Note : The SMBUS interrupts must be enabled after unlocking current process
EricLew 0:80ee8f3b695e 588 to avoid the risk of SMBUS interrupt handle execution before current
EricLew 0:80ee8f3b695e 589 process unlock */
EricLew 0:80ee8f3b695e 590 SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_RX);
EricLew 0:80ee8f3b695e 591
EricLew 0:80ee8f3b695e 592 return HAL_OK;
EricLew 0:80ee8f3b695e 593 }
EricLew 0:80ee8f3b695e 594 else
EricLew 0:80ee8f3b695e 595 {
EricLew 0:80ee8f3b695e 596 return HAL_BUSY;
EricLew 0:80ee8f3b695e 597 }
EricLew 0:80ee8f3b695e 598 }
EricLew 0:80ee8f3b695e 599
EricLew 0:80ee8f3b695e 600 /**
EricLew 0:80ee8f3b695e 601 * @brief Abort a master/host SMBUS process communication with Interrupt.
EricLew 0:80ee8f3b695e 602 * @note This abort can be called only if state is ready
EricLew 0:80ee8f3b695e 603 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
EricLew 0:80ee8f3b695e 604 * the configuration information for the specified SMBUS.
EricLew 0:80ee8f3b695e 605 * @param DevAddress: Target device address
EricLew 0:80ee8f3b695e 606 * @retval HAL status
EricLew 0:80ee8f3b695e 607 */
EricLew 0:80ee8f3b695e 608 HAL_StatusTypeDef HAL_SMBUS_Master_Abort_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress)
EricLew 0:80ee8f3b695e 609 {
EricLew 0:80ee8f3b695e 610 if(hsmbus->State == HAL_SMBUS_STATE_READY)
EricLew 0:80ee8f3b695e 611 {
EricLew 0:80ee8f3b695e 612 /* Process Locked */
EricLew 0:80ee8f3b695e 613 __HAL_LOCK(hsmbus);
EricLew 0:80ee8f3b695e 614
EricLew 0:80ee8f3b695e 615 /* Keep the same state as previous */
EricLew 0:80ee8f3b695e 616 /* to perform as well the call of the corresponding end of transfer callback */
EricLew 0:80ee8f3b695e 617 if(hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_TX)
EricLew 0:80ee8f3b695e 618 {
EricLew 0:80ee8f3b695e 619 hsmbus->State = HAL_SMBUS_STATE_MASTER_BUSY_TX;
EricLew 0:80ee8f3b695e 620 }
EricLew 0:80ee8f3b695e 621 else if(hsmbus->PreviousState == HAL_SMBUS_STATE_MASTER_BUSY_RX)
EricLew 0:80ee8f3b695e 622 {
EricLew 0:80ee8f3b695e 623 hsmbus->State = HAL_SMBUS_STATE_MASTER_BUSY_RX;
EricLew 0:80ee8f3b695e 624 }
EricLew 0:80ee8f3b695e 625 else
EricLew 0:80ee8f3b695e 626 {
EricLew 0:80ee8f3b695e 627 /* Wrong usage of abort function */
EricLew 0:80ee8f3b695e 628 /* This function should be used only in case of abort monitored by master device */
EricLew 0:80ee8f3b695e 629 return HAL_ERROR;
EricLew 0:80ee8f3b695e 630 }
EricLew 0:80ee8f3b695e 631 hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
EricLew 0:80ee8f3b695e 632
EricLew 0:80ee8f3b695e 633 /* Set NBYTES to 1 to generate a dummy read on SMBUS peripheral */
EricLew 0:80ee8f3b695e 634 /* Set AUTOEND mode, this will generate a NACK then STOP condition to abort the current transfer */
EricLew 0:80ee8f3b695e 635 SMBUS_TransferConfig(hsmbus, DevAddress, 1, SMBUS_AUTOEND_MODE, SMBUS_NO_STARTSTOP);
EricLew 0:80ee8f3b695e 636
EricLew 0:80ee8f3b695e 637 /* Process Unlocked */
EricLew 0:80ee8f3b695e 638 __HAL_UNLOCK(hsmbus);
EricLew 0:80ee8f3b695e 639
EricLew 0:80ee8f3b695e 640 /* Note : The SMBUS interrupts must be enabled after unlocking current process
EricLew 0:80ee8f3b695e 641 to avoid the risk of SMBUS interrupt handle execution before current
EricLew 0:80ee8f3b695e 642 process unlock */
EricLew 0:80ee8f3b695e 643 if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX)
EricLew 0:80ee8f3b695e 644 {
EricLew 0:80ee8f3b695e 645 SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_TX);
EricLew 0:80ee8f3b695e 646 }
EricLew 0:80ee8f3b695e 647 else if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX)
EricLew 0:80ee8f3b695e 648 {
EricLew 0:80ee8f3b695e 649 SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_RX);
EricLew 0:80ee8f3b695e 650 }
EricLew 0:80ee8f3b695e 651
EricLew 0:80ee8f3b695e 652 return HAL_OK;
EricLew 0:80ee8f3b695e 653 }
EricLew 0:80ee8f3b695e 654 else
EricLew 0:80ee8f3b695e 655 {
EricLew 0:80ee8f3b695e 656 return HAL_BUSY;
EricLew 0:80ee8f3b695e 657 }
EricLew 0:80ee8f3b695e 658 }
EricLew 0:80ee8f3b695e 659
EricLew 0:80ee8f3b695e 660 /**
EricLew 0:80ee8f3b695e 661 * @brief Transmit in slave/device SMBUS mode an amount of data in non-blocking mode with Interrupt.
EricLew 0:80ee8f3b695e 662 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
EricLew 0:80ee8f3b695e 663 * the configuration information for the specified SMBUS.
EricLew 0:80ee8f3b695e 664 * @param pData: Pointer to data buffer
EricLew 0:80ee8f3b695e 665 * @param Size: Amount of data to be sent
EricLew 0:80ee8f3b695e 666 * @param XferOptions: Options of Transfer, value of @ref SMBUS_XferOptions_definition
EricLew 0:80ee8f3b695e 667 * @retval HAL status
EricLew 0:80ee8f3b695e 668 */
EricLew 0:80ee8f3b695e 669 HAL_StatusTypeDef HAL_SMBUS_Slave_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
EricLew 0:80ee8f3b695e 670 {
EricLew 0:80ee8f3b695e 671 /* Check the parameters */
EricLew 0:80ee8f3b695e 672 assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions));
EricLew 0:80ee8f3b695e 673
EricLew 0:80ee8f3b695e 674 if(hsmbus->State == HAL_SMBUS_STATE_LISTEN)
EricLew 0:80ee8f3b695e 675 {
EricLew 0:80ee8f3b695e 676 if((pData == NULL) || (Size == 0))
EricLew 0:80ee8f3b695e 677 {
EricLew 0:80ee8f3b695e 678 return HAL_ERROR;
EricLew 0:80ee8f3b695e 679 }
EricLew 0:80ee8f3b695e 680
EricLew 0:80ee8f3b695e 681 /* Disable Interrupts, to prevent preemption during treatment in case of multicall */
EricLew 0:80ee8f3b695e 682 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ADDR | SMBUS_IT_TX);
EricLew 0:80ee8f3b695e 683
EricLew 0:80ee8f3b695e 684 /* Process Locked */
EricLew 0:80ee8f3b695e 685 __HAL_LOCK(hsmbus);
EricLew 0:80ee8f3b695e 686
EricLew 0:80ee8f3b695e 687 hsmbus->State |= HAL_SMBUS_STATE_SLAVE_BUSY_TX;
EricLew 0:80ee8f3b695e 688 hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
EricLew 0:80ee8f3b695e 689
EricLew 0:80ee8f3b695e 690 /* Set SBC bit to manage Acknowledge at each bit */
EricLew 0:80ee8f3b695e 691 hsmbus->Instance->CR1 |= I2C_CR1_SBC;
EricLew 0:80ee8f3b695e 692
EricLew 0:80ee8f3b695e 693 /* Enable Address Acknowledge */
EricLew 0:80ee8f3b695e 694 hsmbus->Instance->CR2 &= ~I2C_CR2_NACK;
EricLew 0:80ee8f3b695e 695
EricLew 0:80ee8f3b695e 696 /* Prepare transfer parameters */
EricLew 0:80ee8f3b695e 697 hsmbus->pBuffPtr = pData;
EricLew 0:80ee8f3b695e 698 hsmbus->XferSize = Size;
EricLew 0:80ee8f3b695e 699 hsmbus->XferCount = Size;
EricLew 0:80ee8f3b695e 700 hsmbus->XferOptions = XferOptions;
EricLew 0:80ee8f3b695e 701
EricLew 0:80ee8f3b695e 702 if(Size > MAX_NBYTE_SIZE)
EricLew 0:80ee8f3b695e 703 {
EricLew 0:80ee8f3b695e 704 hsmbus->XferSize = MAX_NBYTE_SIZE;
EricLew 0:80ee8f3b695e 705 }
EricLew 0:80ee8f3b695e 706 else
EricLew 0:80ee8f3b695e 707 {
EricLew 0:80ee8f3b695e 708 hsmbus->XferSize = Size;
EricLew 0:80ee8f3b695e 709 }
EricLew 0:80ee8f3b695e 710
EricLew 0:80ee8f3b695e 711 /* Set NBYTES to write and reload if size > MAX_NBYTE_SIZE and generate RESTART */
EricLew 0:80ee8f3b695e 712 if( (hsmbus->XferSize == MAX_NBYTE_SIZE) && (hsmbus->XferSize < hsmbus->XferCount) )
EricLew 0:80ee8f3b695e 713 {
EricLew 0:80ee8f3b695e 714 SMBUS_TransferConfig(hsmbus,0,hsmbus->XferSize, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_NO_STARTSTOP);
EricLew 0:80ee8f3b695e 715 }
EricLew 0:80ee8f3b695e 716 else
EricLew 0:80ee8f3b695e 717 {
EricLew 0:80ee8f3b695e 718 /* Set NBYTE to transmit */
EricLew 0:80ee8f3b695e 719 SMBUS_TransferConfig(hsmbus,0,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
EricLew 0:80ee8f3b695e 720
EricLew 0:80ee8f3b695e 721 /* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */
EricLew 0:80ee8f3b695e 722 /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
EricLew 0:80ee8f3b695e 723 if(SMBUS_GET_PEC_MODE(hsmbus) != RESET)
EricLew 0:80ee8f3b695e 724 {
EricLew 0:80ee8f3b695e 725 hsmbus->XferSize--;
EricLew 0:80ee8f3b695e 726 hsmbus->XferCount--;
EricLew 0:80ee8f3b695e 727 }
EricLew 0:80ee8f3b695e 728 }
EricLew 0:80ee8f3b695e 729
EricLew 0:80ee8f3b695e 730 /* Clear ADDR flag after prepare the transfer parameters */
EricLew 0:80ee8f3b695e 731 /* This action will generate an acknowledge to the HOST */
EricLew 0:80ee8f3b695e 732 __HAL_SMBUS_CLEAR_FLAG(hsmbus,SMBUS_FLAG_ADDR);
EricLew 0:80ee8f3b695e 733
EricLew 0:80ee8f3b695e 734 /* Process Unlocked */
EricLew 0:80ee8f3b695e 735 __HAL_UNLOCK(hsmbus);
EricLew 0:80ee8f3b695e 736
EricLew 0:80ee8f3b695e 737 /* Note : The SMBUS interrupts must be enabled after unlocking current process
EricLew 0:80ee8f3b695e 738 to avoid the risk of SMBUS interrupt handle execution before current
EricLew 0:80ee8f3b695e 739 process unlock */
EricLew 0:80ee8f3b695e 740 /* REnable ADDR interrupt */
EricLew 0:80ee8f3b695e 741 SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_TX | SMBUS_IT_ADDR);
EricLew 0:80ee8f3b695e 742
EricLew 0:80ee8f3b695e 743 return HAL_OK;
EricLew 0:80ee8f3b695e 744 }
EricLew 0:80ee8f3b695e 745 else
EricLew 0:80ee8f3b695e 746 {
EricLew 0:80ee8f3b695e 747 return HAL_ERROR;
EricLew 0:80ee8f3b695e 748 }
EricLew 0:80ee8f3b695e 749 }
EricLew 0:80ee8f3b695e 750
EricLew 0:80ee8f3b695e 751 /**
EricLew 0:80ee8f3b695e 752 * @brief Receive in slave/device SMBUS mode an amount of data in non-blocking mode with Interrupt.
EricLew 0:80ee8f3b695e 753 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
EricLew 0:80ee8f3b695e 754 * the configuration information for the specified SMBUS.
EricLew 0:80ee8f3b695e 755 * @param pData: Pointer to data buffer
EricLew 0:80ee8f3b695e 756 * @param Size: Amount of data to be sent
EricLew 0:80ee8f3b695e 757 * @param XferOptions: Options of Transfer, value of @ref SMBUS_XferOptions_definition
EricLew 0:80ee8f3b695e 758 * @retval HAL status
EricLew 0:80ee8f3b695e 759 */
EricLew 0:80ee8f3b695e 760 HAL_StatusTypeDef HAL_SMBUS_Slave_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions)
EricLew 0:80ee8f3b695e 761 {
EricLew 0:80ee8f3b695e 762 /* Check the parameters */
EricLew 0:80ee8f3b695e 763 assert_param(IS_SMBUS_TRANSFER_OPTIONS_REQUEST(XferOptions));
EricLew 0:80ee8f3b695e 764
EricLew 0:80ee8f3b695e 765 if(hsmbus->State == HAL_SMBUS_STATE_LISTEN)
EricLew 0:80ee8f3b695e 766 {
EricLew 0:80ee8f3b695e 767 if((pData == NULL) || (Size == 0))
EricLew 0:80ee8f3b695e 768 {
EricLew 0:80ee8f3b695e 769 return HAL_ERROR;
EricLew 0:80ee8f3b695e 770 }
EricLew 0:80ee8f3b695e 771
EricLew 0:80ee8f3b695e 772 /* Disable Interrupts, to prevent preemption during treatment in case of multicall */
EricLew 0:80ee8f3b695e 773 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ADDR | SMBUS_IT_RX);
EricLew 0:80ee8f3b695e 774
EricLew 0:80ee8f3b695e 775 /* Process Locked */
EricLew 0:80ee8f3b695e 776 __HAL_LOCK(hsmbus);
EricLew 0:80ee8f3b695e 777
EricLew 0:80ee8f3b695e 778 hsmbus->State |= HAL_SMBUS_STATE_SLAVE_BUSY_RX;
EricLew 0:80ee8f3b695e 779 hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
EricLew 0:80ee8f3b695e 780
EricLew 0:80ee8f3b695e 781 /* Set SBC bit to manage Acknowledge at each bit */
EricLew 0:80ee8f3b695e 782 hsmbus->Instance->CR1 |= I2C_CR1_SBC;
EricLew 0:80ee8f3b695e 783
EricLew 0:80ee8f3b695e 784 /* Enable Address Acknowledge */
EricLew 0:80ee8f3b695e 785 hsmbus->Instance->CR2 &= ~I2C_CR2_NACK;
EricLew 0:80ee8f3b695e 786
EricLew 0:80ee8f3b695e 787 /* Prepare transfer parameters */
EricLew 0:80ee8f3b695e 788 hsmbus->pBuffPtr = pData;
EricLew 0:80ee8f3b695e 789 hsmbus->XferSize = Size;
EricLew 0:80ee8f3b695e 790 hsmbus->XferCount = Size;
EricLew 0:80ee8f3b695e 791 hsmbus->XferOptions = XferOptions;
EricLew 0:80ee8f3b695e 792
EricLew 0:80ee8f3b695e 793 /* Set NBYTE to receive */
EricLew 0:80ee8f3b695e 794 /* If XferSize equal "1", or XferSize equal "2" with PEC requested (mean 1 data byte + 1 PEC byte */
EricLew 0:80ee8f3b695e 795 /* no need to set RELOAD bit mode, a ACK will be automatically generated in that case */
EricLew 0:80ee8f3b695e 796 /* else need to set RELOAD bit mode to generate an automatic ACK at each byte Received */
EricLew 0:80ee8f3b695e 797 /* This RELOAD bit will be reset for last BYTE to be receive in SMBUS_Slave_ISR */
EricLew 0:80ee8f3b695e 798 if((hsmbus->XferSize == 1) || ((hsmbus->XferSize == 2) && (SMBUS_GET_PEC_MODE(hsmbus) != RESET)))
EricLew 0:80ee8f3b695e 799 {
EricLew 0:80ee8f3b695e 800 SMBUS_TransferConfig(hsmbus,0,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
EricLew 0:80ee8f3b695e 801 }
EricLew 0:80ee8f3b695e 802 else
EricLew 0:80ee8f3b695e 803 {
EricLew 0:80ee8f3b695e 804 SMBUS_TransferConfig(hsmbus,0, 1, hsmbus->XferOptions | SMBUS_RELOAD_MODE, SMBUS_NO_STARTSTOP);
EricLew 0:80ee8f3b695e 805 }
EricLew 0:80ee8f3b695e 806
EricLew 0:80ee8f3b695e 807 /* Clear ADDR flag after prepare the transfer parameters */
EricLew 0:80ee8f3b695e 808 /* This action will generate an acknowledge to the HOST */
EricLew 0:80ee8f3b695e 809 __HAL_SMBUS_CLEAR_FLAG(hsmbus,SMBUS_FLAG_ADDR);
EricLew 0:80ee8f3b695e 810
EricLew 0:80ee8f3b695e 811 /* Process Unlocked */
EricLew 0:80ee8f3b695e 812 __HAL_UNLOCK(hsmbus);
EricLew 0:80ee8f3b695e 813
EricLew 0:80ee8f3b695e 814 /* Note : The SMBUS interrupts must be enabled after unlocking current process
EricLew 0:80ee8f3b695e 815 to avoid the risk of SMBUS interrupt handle execution before current
EricLew 0:80ee8f3b695e 816 process unlock */
EricLew 0:80ee8f3b695e 817 /* REnable ADDR interrupt */
EricLew 0:80ee8f3b695e 818 SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_RX | SMBUS_IT_ADDR);
EricLew 0:80ee8f3b695e 819
EricLew 0:80ee8f3b695e 820 return HAL_OK;
EricLew 0:80ee8f3b695e 821 }
EricLew 0:80ee8f3b695e 822 else
EricLew 0:80ee8f3b695e 823 {
EricLew 0:80ee8f3b695e 824 return HAL_ERROR;
EricLew 0:80ee8f3b695e 825 }
EricLew 0:80ee8f3b695e 826 }
EricLew 0:80ee8f3b695e 827
EricLew 0:80ee8f3b695e 828 /**
EricLew 0:80ee8f3b695e 829 * @brief Enable the Address listen mode with Interrupt.
EricLew 0:80ee8f3b695e 830 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
EricLew 0:80ee8f3b695e 831 * the configuration information for the specified SMBUS.
EricLew 0:80ee8f3b695e 832 * @retval HAL status
EricLew 0:80ee8f3b695e 833 */
EricLew 0:80ee8f3b695e 834 HAL_StatusTypeDef HAL_SMBUS_EnableListen_IT(SMBUS_HandleTypeDef *hsmbus)
EricLew 0:80ee8f3b695e 835 {
EricLew 0:80ee8f3b695e 836 hsmbus->State = HAL_SMBUS_STATE_LISTEN;
EricLew 0:80ee8f3b695e 837
EricLew 0:80ee8f3b695e 838 /* Enable the Address Match interrupt */
EricLew 0:80ee8f3b695e 839 SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_ADDR);
EricLew 0:80ee8f3b695e 840
EricLew 0:80ee8f3b695e 841 return HAL_OK;
EricLew 0:80ee8f3b695e 842 }
EricLew 0:80ee8f3b695e 843
EricLew 0:80ee8f3b695e 844 /**
EricLew 0:80ee8f3b695e 845 * @brief Disable the Address listen mode with Interrupt.
EricLew 0:80ee8f3b695e 846 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
EricLew 0:80ee8f3b695e 847 * the configuration information for the specified SMBUS.
EricLew 0:80ee8f3b695e 848 * @retval HAL status
EricLew 0:80ee8f3b695e 849 */
EricLew 0:80ee8f3b695e 850 HAL_StatusTypeDef HAL_SMBUS_DisableListen_IT(SMBUS_HandleTypeDef *hsmbus)
EricLew 0:80ee8f3b695e 851 {
EricLew 0:80ee8f3b695e 852 /* Disable Address listen mode only if a transfer is not ongoing */
EricLew 0:80ee8f3b695e 853 if(hsmbus->State == HAL_SMBUS_STATE_LISTEN)
EricLew 0:80ee8f3b695e 854 {
EricLew 0:80ee8f3b695e 855 hsmbus->State = HAL_SMBUS_STATE_READY;
EricLew 0:80ee8f3b695e 856
EricLew 0:80ee8f3b695e 857 /* Disable the Address Match interrupt */
EricLew 0:80ee8f3b695e 858 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ADDR);
EricLew 0:80ee8f3b695e 859
EricLew 0:80ee8f3b695e 860 return HAL_OK;
EricLew 0:80ee8f3b695e 861 }
EricLew 0:80ee8f3b695e 862 else
EricLew 0:80ee8f3b695e 863 {
EricLew 0:80ee8f3b695e 864 return HAL_BUSY;
EricLew 0:80ee8f3b695e 865 }
EricLew 0:80ee8f3b695e 866 }
EricLew 0:80ee8f3b695e 867
EricLew 0:80ee8f3b695e 868 /**
EricLew 0:80ee8f3b695e 869 * @brief Enable the SMBUS alert mode with Interrupt.
EricLew 0:80ee8f3b695e 870 * @param hsmbus : pointer to a SMBUS_HandleTypeDef structure that contains
EricLew 0:80ee8f3b695e 871 * the configuration information for the specified SMBUSx peripheral.
EricLew 0:80ee8f3b695e 872 * @retval HAL status
EricLew 0:80ee8f3b695e 873 */
EricLew 0:80ee8f3b695e 874 HAL_StatusTypeDef HAL_SMBUS_EnableAlert_IT(SMBUS_HandleTypeDef *hsmbus)
EricLew 0:80ee8f3b695e 875 {
EricLew 0:80ee8f3b695e 876 /* Enable SMBus alert */
EricLew 0:80ee8f3b695e 877 hsmbus->Instance->CR1 |= I2C_CR1_ALERTEN;
EricLew 0:80ee8f3b695e 878
EricLew 0:80ee8f3b695e 879 /* Clear ALERT flag */
EricLew 0:80ee8f3b695e 880 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ALERT);
EricLew 0:80ee8f3b695e 881
EricLew 0:80ee8f3b695e 882 /* Enable Alert Interrupt */
EricLew 0:80ee8f3b695e 883 SMBUS_Enable_IRQ(hsmbus, SMBUS_IT_ALERT);
EricLew 0:80ee8f3b695e 884
EricLew 0:80ee8f3b695e 885 return HAL_OK;
EricLew 0:80ee8f3b695e 886 }
EricLew 0:80ee8f3b695e 887 /**
EricLew 0:80ee8f3b695e 888 * @brief Disable the SMBUS alert mode with Interrupt.
EricLew 0:80ee8f3b695e 889 * @param hsmbus : pointer to a SMBUS_HandleTypeDef structure that contains
EricLew 0:80ee8f3b695e 890 * the configuration information for the specified SMBUSx peripheral.
EricLew 0:80ee8f3b695e 891 * @retval HAL status
EricLew 0:80ee8f3b695e 892 */
EricLew 0:80ee8f3b695e 893 HAL_StatusTypeDef HAL_SMBUS_DisableAlert_IT(SMBUS_HandleTypeDef *hsmbus)
EricLew 0:80ee8f3b695e 894 {
EricLew 0:80ee8f3b695e 895 /* Enable SMBus alert */
EricLew 0:80ee8f3b695e 896 hsmbus->Instance->CR1 &= ~I2C_CR1_ALERTEN;
EricLew 0:80ee8f3b695e 897
EricLew 0:80ee8f3b695e 898 /* Disable Alert Interrupt */
EricLew 0:80ee8f3b695e 899 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ALERT);
EricLew 0:80ee8f3b695e 900
EricLew 0:80ee8f3b695e 901 return HAL_OK;
EricLew 0:80ee8f3b695e 902 }
EricLew 0:80ee8f3b695e 903
EricLew 0:80ee8f3b695e 904 /**
EricLew 0:80ee8f3b695e 905 * @brief Check if target device is ready for communication.
EricLew 0:80ee8f3b695e 906 * @note This function is used with Memory devices
EricLew 0:80ee8f3b695e 907 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
EricLew 0:80ee8f3b695e 908 * the configuration information for the specified SMBUS.
EricLew 0:80ee8f3b695e 909 * @param DevAddress: Target device address
EricLew 0:80ee8f3b695e 910 * @param Trials: Number of trials
EricLew 0:80ee8f3b695e 911 * @param Timeout: Timeout duration
EricLew 0:80ee8f3b695e 912 * @retval HAL status
EricLew 0:80ee8f3b695e 913 */
EricLew 0:80ee8f3b695e 914 HAL_StatusTypeDef HAL_SMBUS_IsDeviceReady(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout)
EricLew 0:80ee8f3b695e 915 {
EricLew 0:80ee8f3b695e 916 uint32_t tickstart = 0;
EricLew 0:80ee8f3b695e 917
EricLew 0:80ee8f3b695e 918 __IO uint32_t SMBUS_Trials = 0;
EricLew 0:80ee8f3b695e 919
EricLew 0:80ee8f3b695e 920 if(hsmbus->State == HAL_SMBUS_STATE_READY)
EricLew 0:80ee8f3b695e 921 {
EricLew 0:80ee8f3b695e 922 if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_BUSY) != RESET)
EricLew 0:80ee8f3b695e 923 {
EricLew 0:80ee8f3b695e 924 return HAL_BUSY;
EricLew 0:80ee8f3b695e 925 }
EricLew 0:80ee8f3b695e 926
EricLew 0:80ee8f3b695e 927 /* Process Locked */
EricLew 0:80ee8f3b695e 928 __HAL_LOCK(hsmbus);
EricLew 0:80ee8f3b695e 929
EricLew 0:80ee8f3b695e 930 hsmbus->State = HAL_SMBUS_STATE_BUSY;
EricLew 0:80ee8f3b695e 931 hsmbus->ErrorCode = HAL_SMBUS_ERROR_NONE;
EricLew 0:80ee8f3b695e 932
EricLew 0:80ee8f3b695e 933 do
EricLew 0:80ee8f3b695e 934 {
EricLew 0:80ee8f3b695e 935 /* Generate Start */
EricLew 0:80ee8f3b695e 936 hsmbus->Instance->CR2 = SMBUS_GENERATE_START(hsmbus->Init.AddressingMode,DevAddress);
EricLew 0:80ee8f3b695e 937
EricLew 0:80ee8f3b695e 938 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */
EricLew 0:80ee8f3b695e 939 /* Wait until STOPF flag is set or a NACK flag is set*/
EricLew 0:80ee8f3b695e 940 tickstart = HAL_GetTick();
EricLew 0:80ee8f3b695e 941 while((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_STOPF) == RESET) && (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF) == RESET) && (hsmbus->State != HAL_SMBUS_STATE_TIMEOUT))
EricLew 0:80ee8f3b695e 942 {
EricLew 0:80ee8f3b695e 943 if(Timeout != HAL_MAX_DELAY)
EricLew 0:80ee8f3b695e 944 {
EricLew 0:80ee8f3b695e 945 if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
EricLew 0:80ee8f3b695e 946 {
EricLew 0:80ee8f3b695e 947 /* Device is ready */
EricLew 0:80ee8f3b695e 948 hsmbus->State = HAL_SMBUS_STATE_READY;
EricLew 0:80ee8f3b695e 949
EricLew 0:80ee8f3b695e 950 /* Process Unlocked */
EricLew 0:80ee8f3b695e 951 __HAL_UNLOCK(hsmbus);
EricLew 0:80ee8f3b695e 952 return HAL_TIMEOUT;
EricLew 0:80ee8f3b695e 953 }
EricLew 0:80ee8f3b695e 954 }
EricLew 0:80ee8f3b695e 955 }
EricLew 0:80ee8f3b695e 956
EricLew 0:80ee8f3b695e 957 /* Check if the NACKF flag has not been set */
EricLew 0:80ee8f3b695e 958 if (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF) == RESET)
EricLew 0:80ee8f3b695e 959 {
EricLew 0:80ee8f3b695e 960 /* Wait until STOPF flag is reset */
EricLew 0:80ee8f3b695e 961 if(SMBUS_WaitOnFlagUntilTimeout(hsmbus, SMBUS_FLAG_STOPF, RESET, Timeout) != HAL_OK)
EricLew 0:80ee8f3b695e 962 {
EricLew 0:80ee8f3b695e 963 return HAL_TIMEOUT;
EricLew 0:80ee8f3b695e 964 }
EricLew 0:80ee8f3b695e 965
EricLew 0:80ee8f3b695e 966 /* Clear STOP Flag */
EricLew 0:80ee8f3b695e 967 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
EricLew 0:80ee8f3b695e 968
EricLew 0:80ee8f3b695e 969 /* Device is ready */
EricLew 0:80ee8f3b695e 970 hsmbus->State = HAL_SMBUS_STATE_READY;
EricLew 0:80ee8f3b695e 971
EricLew 0:80ee8f3b695e 972 /* Process Unlocked */
EricLew 0:80ee8f3b695e 973 __HAL_UNLOCK(hsmbus);
EricLew 0:80ee8f3b695e 974
EricLew 0:80ee8f3b695e 975 return HAL_OK;
EricLew 0:80ee8f3b695e 976 }
EricLew 0:80ee8f3b695e 977 else
EricLew 0:80ee8f3b695e 978 {
EricLew 0:80ee8f3b695e 979 /* Wait until STOPF flag is reset */
EricLew 0:80ee8f3b695e 980 if(SMBUS_WaitOnFlagUntilTimeout(hsmbus, SMBUS_FLAG_STOPF, RESET, Timeout) != HAL_OK)
EricLew 0:80ee8f3b695e 981 {
EricLew 0:80ee8f3b695e 982 return HAL_TIMEOUT;
EricLew 0:80ee8f3b695e 983 }
EricLew 0:80ee8f3b695e 984
EricLew 0:80ee8f3b695e 985 /* Clear NACK Flag */
EricLew 0:80ee8f3b695e 986 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_AF);
EricLew 0:80ee8f3b695e 987
EricLew 0:80ee8f3b695e 988 /* Clear STOP Flag, auto generated with autoend*/
EricLew 0:80ee8f3b695e 989 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
EricLew 0:80ee8f3b695e 990 }
EricLew 0:80ee8f3b695e 991
EricLew 0:80ee8f3b695e 992 /* Check if the maximum allowed number of trials has been reached */
EricLew 0:80ee8f3b695e 993 if (SMBUS_Trials++ == Trials)
EricLew 0:80ee8f3b695e 994 {
EricLew 0:80ee8f3b695e 995 /* Generate Stop */
EricLew 0:80ee8f3b695e 996 hsmbus->Instance->CR2 |= I2C_CR2_STOP;
EricLew 0:80ee8f3b695e 997
EricLew 0:80ee8f3b695e 998 /* Wait until STOPF flag is reset */
EricLew 0:80ee8f3b695e 999 if(SMBUS_WaitOnFlagUntilTimeout(hsmbus, SMBUS_FLAG_STOPF, RESET, Timeout) != HAL_OK)
EricLew 0:80ee8f3b695e 1000 {
EricLew 0:80ee8f3b695e 1001 return HAL_TIMEOUT;
EricLew 0:80ee8f3b695e 1002 }
EricLew 0:80ee8f3b695e 1003
EricLew 0:80ee8f3b695e 1004 /* Clear STOP Flag */
EricLew 0:80ee8f3b695e 1005 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
EricLew 0:80ee8f3b695e 1006 }
EricLew 0:80ee8f3b695e 1007 }while(SMBUS_Trials < Trials);
EricLew 0:80ee8f3b695e 1008
EricLew 0:80ee8f3b695e 1009 hsmbus->State = HAL_SMBUS_STATE_READY;
EricLew 0:80ee8f3b695e 1010
EricLew 0:80ee8f3b695e 1011 /* Process Unlocked */
EricLew 0:80ee8f3b695e 1012 __HAL_UNLOCK(hsmbus);
EricLew 0:80ee8f3b695e 1013
EricLew 0:80ee8f3b695e 1014 return HAL_TIMEOUT;
EricLew 0:80ee8f3b695e 1015 }
EricLew 0:80ee8f3b695e 1016 else
EricLew 0:80ee8f3b695e 1017 {
EricLew 0:80ee8f3b695e 1018 return HAL_BUSY;
EricLew 0:80ee8f3b695e 1019 }
EricLew 0:80ee8f3b695e 1020 }
EricLew 0:80ee8f3b695e 1021 /**
EricLew 0:80ee8f3b695e 1022 * @}
EricLew 0:80ee8f3b695e 1023 */
EricLew 0:80ee8f3b695e 1024
EricLew 0:80ee8f3b695e 1025 /** @defgroup SMBUS_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
EricLew 0:80ee8f3b695e 1026 * @{
EricLew 0:80ee8f3b695e 1027 */
EricLew 0:80ee8f3b695e 1028
EricLew 0:80ee8f3b695e 1029 /**
EricLew 0:80ee8f3b695e 1030 * @brief Handle SMBUS event interrupt request.
EricLew 0:80ee8f3b695e 1031 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
EricLew 0:80ee8f3b695e 1032 * the configuration information for the specified SMBUS.
EricLew 0:80ee8f3b695e 1033 * @retval None
EricLew 0:80ee8f3b695e 1034 */
EricLew 0:80ee8f3b695e 1035 void HAL_SMBUS_EV_IRQHandler(SMBUS_HandleTypeDef *hsmbus)
EricLew 0:80ee8f3b695e 1036 {
EricLew 0:80ee8f3b695e 1037 uint32_t tmpisrvalue = 0;
EricLew 0:80ee8f3b695e 1038
EricLew 0:80ee8f3b695e 1039 /* Use a local variable to store the current ISR flags */
EricLew 0:80ee8f3b695e 1040 /* This action will avoid a wrong treatment due to ISR flags change during interrupt handler */
EricLew 0:80ee8f3b695e 1041 tmpisrvalue = SMBUS_GET_ISR_REG(hsmbus);
EricLew 0:80ee8f3b695e 1042
EricLew 0:80ee8f3b695e 1043 /* SMBUS in mode Transmitter ---------------------------------------------------*/
EricLew 0:80ee8f3b695e 1044 if (((SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TXIS) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TCR) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TC) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_STOPF) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_AF) != RESET)) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, (SMBUS_IT_TCI| SMBUS_IT_STOPI| SMBUS_IT_NACKI | SMBUS_IT_TXI)) != RESET))
EricLew 0:80ee8f3b695e 1045 {
EricLew 0:80ee8f3b695e 1046 /* Slave mode selected */
EricLew 0:80ee8f3b695e 1047 if ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_TX) == HAL_SMBUS_STATE_SLAVE_BUSY_TX)
EricLew 0:80ee8f3b695e 1048 {
EricLew 0:80ee8f3b695e 1049 SMBUS_Slave_ISR(hsmbus);
EricLew 0:80ee8f3b695e 1050 }
EricLew 0:80ee8f3b695e 1051 /* Master mode selected */
EricLew 0:80ee8f3b695e 1052 else if((hsmbus->State & HAL_SMBUS_STATE_MASTER_BUSY_TX) == HAL_SMBUS_STATE_MASTER_BUSY_TX)
EricLew 0:80ee8f3b695e 1053 {
EricLew 0:80ee8f3b695e 1054 SMBUS_Master_ISR(hsmbus);
EricLew 0:80ee8f3b695e 1055 }
EricLew 0:80ee8f3b695e 1056 }
EricLew 0:80ee8f3b695e 1057
EricLew 0:80ee8f3b695e 1058 /* SMBUS in mode Receiver ----------------------------------------------------*/
EricLew 0:80ee8f3b695e 1059 if (((SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_RXNE) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TCR) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_TC) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_STOPF) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_AF) != RESET)) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, (SMBUS_IT_TCI| SMBUS_IT_STOPI| SMBUS_IT_NACKI | SMBUS_IT_RXI)) != RESET))
EricLew 0:80ee8f3b695e 1060 {
EricLew 0:80ee8f3b695e 1061 /* Slave mode selected */
EricLew 0:80ee8f3b695e 1062 if ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_RX) == HAL_SMBUS_STATE_SLAVE_BUSY_RX)
EricLew 0:80ee8f3b695e 1063 {
EricLew 0:80ee8f3b695e 1064 SMBUS_Slave_ISR(hsmbus);
EricLew 0:80ee8f3b695e 1065 }
EricLew 0:80ee8f3b695e 1066 /* Master mode selected */
EricLew 0:80ee8f3b695e 1067 else if((hsmbus->State & HAL_SMBUS_STATE_MASTER_BUSY_RX) == HAL_SMBUS_STATE_MASTER_BUSY_RX)
EricLew 0:80ee8f3b695e 1068 {
EricLew 0:80ee8f3b695e 1069 SMBUS_Master_ISR(hsmbus);
EricLew 0:80ee8f3b695e 1070 }
EricLew 0:80ee8f3b695e 1071 }
EricLew 0:80ee8f3b695e 1072
EricLew 0:80ee8f3b695e 1073 /* SMBUS in mode Listener Only --------------------------------------------------*/
EricLew 0:80ee8f3b695e 1074 if (((SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_ADDR) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_STOPF) != RESET) || (SMBUS_CHECK_FLAG(tmpisrvalue, SMBUS_FLAG_AF) != RESET))
EricLew 0:80ee8f3b695e 1075 && ((__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ADDRI) != RESET) || (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_STOPI) != RESET) || (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_NACKI) != RESET)))
EricLew 0:80ee8f3b695e 1076 {
EricLew 0:80ee8f3b695e 1077 if (hsmbus->State == HAL_SMBUS_STATE_LISTEN)
EricLew 0:80ee8f3b695e 1078 {
EricLew 0:80ee8f3b695e 1079 SMBUS_Slave_ISR(hsmbus);
EricLew 0:80ee8f3b695e 1080 }
EricLew 0:80ee8f3b695e 1081 }
EricLew 0:80ee8f3b695e 1082 }
EricLew 0:80ee8f3b695e 1083
EricLew 0:80ee8f3b695e 1084 /**
EricLew 0:80ee8f3b695e 1085 * @brief Handle SMBUS error interrupt request.
EricLew 0:80ee8f3b695e 1086 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
EricLew 0:80ee8f3b695e 1087 * the configuration information for the specified SMBUS.
EricLew 0:80ee8f3b695e 1088 * @retval None
EricLew 0:80ee8f3b695e 1089 */
EricLew 0:80ee8f3b695e 1090 void HAL_SMBUS_ER_IRQHandler(SMBUS_HandleTypeDef *hsmbus)
EricLew 0:80ee8f3b695e 1091 {
EricLew 0:80ee8f3b695e 1092 /* SMBUS Bus error interrupt occurred ------------------------------------*/
EricLew 0:80ee8f3b695e 1093 if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_BERR) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET))
EricLew 0:80ee8f3b695e 1094 {
EricLew 0:80ee8f3b695e 1095 hsmbus->ErrorCode |= HAL_SMBUS_ERROR_BERR;
EricLew 0:80ee8f3b695e 1096
EricLew 0:80ee8f3b695e 1097 /* Clear BERR flag */
EricLew 0:80ee8f3b695e 1098 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_BERR);
EricLew 0:80ee8f3b695e 1099 }
EricLew 0:80ee8f3b695e 1100
EricLew 0:80ee8f3b695e 1101 /* SMBUS Over-Run/Under-Run interrupt occurred ----------------------------------------*/
EricLew 0:80ee8f3b695e 1102 if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_OVR) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET))
EricLew 0:80ee8f3b695e 1103 {
EricLew 0:80ee8f3b695e 1104 hsmbus->ErrorCode |= HAL_SMBUS_ERROR_OVR;
EricLew 0:80ee8f3b695e 1105
EricLew 0:80ee8f3b695e 1106 /* Clear OVR flag */
EricLew 0:80ee8f3b695e 1107 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_OVR);
EricLew 0:80ee8f3b695e 1108 }
EricLew 0:80ee8f3b695e 1109
EricLew 0:80ee8f3b695e 1110 /* SMBUS Arbitration Loss error interrupt occurred ------------------------------------*/
EricLew 0:80ee8f3b695e 1111 if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_ARLO) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET))
EricLew 0:80ee8f3b695e 1112 {
EricLew 0:80ee8f3b695e 1113 hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ARLO;
EricLew 0:80ee8f3b695e 1114
EricLew 0:80ee8f3b695e 1115 /* Clear ARLO flag */
EricLew 0:80ee8f3b695e 1116 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ARLO);
EricLew 0:80ee8f3b695e 1117 }
EricLew 0:80ee8f3b695e 1118
EricLew 0:80ee8f3b695e 1119 /* SMBUS Timeout error interrupt occurred ---------------------------------------------*/
EricLew 0:80ee8f3b695e 1120 if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TIMEOUT) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET))
EricLew 0:80ee8f3b695e 1121 {
EricLew 0:80ee8f3b695e 1122 hsmbus->ErrorCode |= HAL_SMBUS_ERROR_BUSTIMEOUT;
EricLew 0:80ee8f3b695e 1123
EricLew 0:80ee8f3b695e 1124 /* Clear TIMEOUT flag */
EricLew 0:80ee8f3b695e 1125 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_TIMEOUT);
EricLew 0:80ee8f3b695e 1126 }
EricLew 0:80ee8f3b695e 1127
EricLew 0:80ee8f3b695e 1128 /* SMBUS Alert error interrupt occurred -----------------------------------------------*/
EricLew 0:80ee8f3b695e 1129 if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_ALERT) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET))
EricLew 0:80ee8f3b695e 1130 {
EricLew 0:80ee8f3b695e 1131 hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ALERT;
EricLew 0:80ee8f3b695e 1132
EricLew 0:80ee8f3b695e 1133 /* Clear ALERT flag */
EricLew 0:80ee8f3b695e 1134 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_ALERT);
EricLew 0:80ee8f3b695e 1135 }
EricLew 0:80ee8f3b695e 1136
EricLew 0:80ee8f3b695e 1137 /* SMBUS Packet Error Check error interrupt occurred ----------------------------------*/
EricLew 0:80ee8f3b695e 1138 if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_PECERR) != RESET) && (__HAL_SMBUS_GET_IT_SOURCE(hsmbus, SMBUS_IT_ERRI) != RESET))
EricLew 0:80ee8f3b695e 1139 {
EricLew 0:80ee8f3b695e 1140 hsmbus->ErrorCode |= HAL_SMBUS_ERROR_PECERR;
EricLew 0:80ee8f3b695e 1141
EricLew 0:80ee8f3b695e 1142 /* Clear PEC error flag */
EricLew 0:80ee8f3b695e 1143 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_PECERR);
EricLew 0:80ee8f3b695e 1144 }
EricLew 0:80ee8f3b695e 1145
EricLew 0:80ee8f3b695e 1146 /* Call the Error Callback() in case of Error detected */
EricLew 0:80ee8f3b695e 1147 if((hsmbus->ErrorCode != HAL_SMBUS_ERROR_NONE)&&(hsmbus->ErrorCode != HAL_SMBUS_ERROR_ACKF))
EricLew 0:80ee8f3b695e 1148 {
EricLew 0:80ee8f3b695e 1149 /* Do not Reset the HAL state in case of ALERT error */
EricLew 0:80ee8f3b695e 1150 if((hsmbus->ErrorCode & HAL_SMBUS_ERROR_ALERT) != HAL_SMBUS_ERROR_ALERT)
EricLew 0:80ee8f3b695e 1151 {
EricLew 0:80ee8f3b695e 1152 if(((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_TX) == HAL_SMBUS_STATE_SLAVE_BUSY_TX)
EricLew 0:80ee8f3b695e 1153 || ((hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_RX) == HAL_SMBUS_STATE_SLAVE_BUSY_RX))
EricLew 0:80ee8f3b695e 1154 {
EricLew 0:80ee8f3b695e 1155 /* Reset only HAL_SMBUS_STATE_SLAVE_BUSY_XX */
EricLew 0:80ee8f3b695e 1156 /* keep HAL_SMBUS_STATE_LISTEN if set */
EricLew 0:80ee8f3b695e 1157 hsmbus->PreviousState = HAL_SMBUS_STATE_READY;
EricLew 0:80ee8f3b695e 1158 hsmbus->State = HAL_SMBUS_STATE_LISTEN;
EricLew 0:80ee8f3b695e 1159 }
EricLew 0:80ee8f3b695e 1160 }
EricLew 0:80ee8f3b695e 1161
EricLew 0:80ee8f3b695e 1162 /* Call the Error callback to prevent upper layer */
EricLew 0:80ee8f3b695e 1163 HAL_SMBUS_ErrorCallback(hsmbus);
EricLew 0:80ee8f3b695e 1164 }
EricLew 0:80ee8f3b695e 1165 }
EricLew 0:80ee8f3b695e 1166
EricLew 0:80ee8f3b695e 1167 /**
EricLew 0:80ee8f3b695e 1168 * @brief Master Tx Transfer completed callback.
EricLew 0:80ee8f3b695e 1169 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
EricLew 0:80ee8f3b695e 1170 * the configuration information for the specified SMBUS.
EricLew 0:80ee8f3b695e 1171 * @retval None
EricLew 0:80ee8f3b695e 1172 */
EricLew 0:80ee8f3b695e 1173 __weak void HAL_SMBUS_MasterTxCpltCallback(SMBUS_HandleTypeDef *hsmbus)
EricLew 0:80ee8f3b695e 1174 {
EricLew 0:80ee8f3b695e 1175 /* NOTE : This function should not be modified, when the callback is needed,
EricLew 0:80ee8f3b695e 1176 the HAL_SMBUS_TxCpltCallback() could be implemented in the user file
EricLew 0:80ee8f3b695e 1177 */
EricLew 0:80ee8f3b695e 1178 }
EricLew 0:80ee8f3b695e 1179
EricLew 0:80ee8f3b695e 1180 /**
EricLew 0:80ee8f3b695e 1181 * @brief Master Rx Transfer completed callback.
EricLew 0:80ee8f3b695e 1182 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
EricLew 0:80ee8f3b695e 1183 * the configuration information for the specified SMBUS.
EricLew 0:80ee8f3b695e 1184 * @retval None
EricLew 0:80ee8f3b695e 1185 */
EricLew 0:80ee8f3b695e 1186 __weak void HAL_SMBUS_MasterRxCpltCallback(SMBUS_HandleTypeDef *hsmbus)
EricLew 0:80ee8f3b695e 1187 {
EricLew 0:80ee8f3b695e 1188 /* NOTE : This function should not be modified, when the callback is needed,
EricLew 0:80ee8f3b695e 1189 the HAL_SMBUS_TxCpltCallback() could be implemented in the user file
EricLew 0:80ee8f3b695e 1190 */
EricLew 0:80ee8f3b695e 1191 }
EricLew 0:80ee8f3b695e 1192
EricLew 0:80ee8f3b695e 1193 /** @brief Slave Tx Transfer completed callback.
EricLew 0:80ee8f3b695e 1194 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
EricLew 0:80ee8f3b695e 1195 * the configuration information for the specified SMBUS.
EricLew 0:80ee8f3b695e 1196 * @retval None
EricLew 0:80ee8f3b695e 1197 */
EricLew 0:80ee8f3b695e 1198 __weak void HAL_SMBUS_SlaveTxCpltCallback(SMBUS_HandleTypeDef *hsmbus)
EricLew 0:80ee8f3b695e 1199 {
EricLew 0:80ee8f3b695e 1200 /* NOTE : This function should not be modified, when the callback is needed,
EricLew 0:80ee8f3b695e 1201 the HAL_SMBUS_TxCpltCallback() could be implemented in the user file
EricLew 0:80ee8f3b695e 1202 */
EricLew 0:80ee8f3b695e 1203 }
EricLew 0:80ee8f3b695e 1204
EricLew 0:80ee8f3b695e 1205 /**
EricLew 0:80ee8f3b695e 1206 * @brief Slave Rx Transfer completed callback.
EricLew 0:80ee8f3b695e 1207 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
EricLew 0:80ee8f3b695e 1208 * the configuration information for the specified SMBUS.
EricLew 0:80ee8f3b695e 1209 * @retval None
EricLew 0:80ee8f3b695e 1210 */
EricLew 0:80ee8f3b695e 1211 __weak void HAL_SMBUS_SlaveRxCpltCallback(SMBUS_HandleTypeDef *hsmbus)
EricLew 0:80ee8f3b695e 1212 {
EricLew 0:80ee8f3b695e 1213 /* NOTE : This function should not be modified, when the callback is needed,
EricLew 0:80ee8f3b695e 1214 the HAL_SMBUS_TxCpltCallback() could be implemented in the user file
EricLew 0:80ee8f3b695e 1215 */
EricLew 0:80ee8f3b695e 1216 }
EricLew 0:80ee8f3b695e 1217
EricLew 0:80ee8f3b695e 1218 /**
EricLew 0:80ee8f3b695e 1219 * @brief Slave Address Match callback.
EricLew 0:80ee8f3b695e 1220 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
EricLew 0:80ee8f3b695e 1221 * the configuration information for the specified SMBUS.
EricLew 0:80ee8f3b695e 1222 * @param TransferDirection: Master request Transfer Direction (Write/Read)
EricLew 0:80ee8f3b695e 1223 * @param AddrMatchCode: Address Match Code
EricLew 0:80ee8f3b695e 1224 * @retval None
EricLew 0:80ee8f3b695e 1225 */
EricLew 0:80ee8f3b695e 1226 __weak void HAL_SMBUS_AddrCallback(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode)
EricLew 0:80ee8f3b695e 1227 {
EricLew 0:80ee8f3b695e 1228 /* NOTE : This function should not be modified, when the callback is needed,
EricLew 0:80ee8f3b695e 1229 the HAL_SMBUS_AddrCallback() could be implemented in the user file
EricLew 0:80ee8f3b695e 1230 */
EricLew 0:80ee8f3b695e 1231 }
EricLew 0:80ee8f3b695e 1232
EricLew 0:80ee8f3b695e 1233 /**
EricLew 0:80ee8f3b695e 1234 * @brief Listen Complete callback.
EricLew 0:80ee8f3b695e 1235 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
EricLew 0:80ee8f3b695e 1236 * the configuration information for the specified SMBUS.
EricLew 0:80ee8f3b695e 1237 * @retval None
EricLew 0:80ee8f3b695e 1238 */
EricLew 0:80ee8f3b695e 1239 __weak void HAL_SMBUS_ListenCpltCallback(SMBUS_HandleTypeDef *hsmbus)
EricLew 0:80ee8f3b695e 1240 {
EricLew 0:80ee8f3b695e 1241 /* NOTE : This function should not be modified, when the callback is needed,
EricLew 0:80ee8f3b695e 1242 the HAL_SMBUS_ListenCpltCallback() could be implemented in the user file
EricLew 0:80ee8f3b695e 1243 */
EricLew 0:80ee8f3b695e 1244 }
EricLew 0:80ee8f3b695e 1245
EricLew 0:80ee8f3b695e 1246 /**
EricLew 0:80ee8f3b695e 1247 * @brief SMBUS error callback.
EricLew 0:80ee8f3b695e 1248 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
EricLew 0:80ee8f3b695e 1249 * the configuration information for the specified SMBUS.
EricLew 0:80ee8f3b695e 1250 * @retval None
EricLew 0:80ee8f3b695e 1251 */
EricLew 0:80ee8f3b695e 1252 __weak void HAL_SMBUS_ErrorCallback(SMBUS_HandleTypeDef *hsmbus)
EricLew 0:80ee8f3b695e 1253 {
EricLew 0:80ee8f3b695e 1254 /* NOTE : This function should not be modified, when the callback is needed,
EricLew 0:80ee8f3b695e 1255 the HAL_SMBUS_ErrorCallback() could be implemented in the user file
EricLew 0:80ee8f3b695e 1256 */
EricLew 0:80ee8f3b695e 1257 }
EricLew 0:80ee8f3b695e 1258
EricLew 0:80ee8f3b695e 1259 /**
EricLew 0:80ee8f3b695e 1260 * @}
EricLew 0:80ee8f3b695e 1261 */
EricLew 0:80ee8f3b695e 1262
EricLew 0:80ee8f3b695e 1263 /** @defgroup SMBUS_Exported_Functions_Group3 Peripheral State and Errors functions
EricLew 0:80ee8f3b695e 1264 * @brief Peripheral State and Errors functions
EricLew 0:80ee8f3b695e 1265 *
EricLew 0:80ee8f3b695e 1266 @verbatim
EricLew 0:80ee8f3b695e 1267 ===============================================================================
EricLew 0:80ee8f3b695e 1268 ##### Peripheral State and Errors functions #####
EricLew 0:80ee8f3b695e 1269 ===============================================================================
EricLew 0:80ee8f3b695e 1270 [..]
EricLew 0:80ee8f3b695e 1271 This subsection permits to get in run-time the status of the peripheral
EricLew 0:80ee8f3b695e 1272 and the data flow.
EricLew 0:80ee8f3b695e 1273
EricLew 0:80ee8f3b695e 1274 @endverbatim
EricLew 0:80ee8f3b695e 1275 * @{
EricLew 0:80ee8f3b695e 1276 */
EricLew 0:80ee8f3b695e 1277
EricLew 0:80ee8f3b695e 1278 /**
EricLew 0:80ee8f3b695e 1279 * @brief Return the SMBUS handle state.
EricLew 0:80ee8f3b695e 1280 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
EricLew 0:80ee8f3b695e 1281 * the configuration information for the specified SMBUS.
EricLew 0:80ee8f3b695e 1282 * @retval HAL state
EricLew 0:80ee8f3b695e 1283 */
EricLew 0:80ee8f3b695e 1284 uint32_t HAL_SMBUS_GetState(SMBUS_HandleTypeDef *hsmbus)
EricLew 0:80ee8f3b695e 1285 {
EricLew 0:80ee8f3b695e 1286 /* Return SMBUS handle state */
EricLew 0:80ee8f3b695e 1287 return hsmbus->State;
EricLew 0:80ee8f3b695e 1288 }
EricLew 0:80ee8f3b695e 1289
EricLew 0:80ee8f3b695e 1290 /**
EricLew 0:80ee8f3b695e 1291 * @brief Return the SMBUS error code.
EricLew 0:80ee8f3b695e 1292 * @param hsmbus : pointer to a SMBUS_HandleTypeDef structure that contains
EricLew 0:80ee8f3b695e 1293 * the configuration information for the specified SMBUS.
EricLew 0:80ee8f3b695e 1294 * @retval SMBUS Error Code
EricLew 0:80ee8f3b695e 1295 */
EricLew 0:80ee8f3b695e 1296 uint32_t HAL_SMBUS_GetError(SMBUS_HandleTypeDef *hsmbus)
EricLew 0:80ee8f3b695e 1297 {
EricLew 0:80ee8f3b695e 1298 return hsmbus->ErrorCode;
EricLew 0:80ee8f3b695e 1299 }
EricLew 0:80ee8f3b695e 1300
EricLew 0:80ee8f3b695e 1301 /**
EricLew 0:80ee8f3b695e 1302 * @}
EricLew 0:80ee8f3b695e 1303 */
EricLew 0:80ee8f3b695e 1304
EricLew 0:80ee8f3b695e 1305 /**
EricLew 0:80ee8f3b695e 1306 * @}
EricLew 0:80ee8f3b695e 1307 */
EricLew 0:80ee8f3b695e 1308
EricLew 0:80ee8f3b695e 1309 /** @addtogroup SMBUS_Private_Functions SMBUS Private Functions
EricLew 0:80ee8f3b695e 1310 * @brief Data transfers Private functions
EricLew 0:80ee8f3b695e 1311 * @{
EricLew 0:80ee8f3b695e 1312 */
EricLew 0:80ee8f3b695e 1313
EricLew 0:80ee8f3b695e 1314 /**
EricLew 0:80ee8f3b695e 1315 * @brief Interrupt Sub-Routine which handle the Interrupt Flags Master Mode.
EricLew 0:80ee8f3b695e 1316 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
EricLew 0:80ee8f3b695e 1317 * the configuration information for the specified SMBUS.
EricLew 0:80ee8f3b695e 1318 * @retval HAL status
EricLew 0:80ee8f3b695e 1319 */
EricLew 0:80ee8f3b695e 1320 static HAL_StatusTypeDef SMBUS_Master_ISR(SMBUS_HandleTypeDef *hsmbus)
EricLew 0:80ee8f3b695e 1321 {
EricLew 0:80ee8f3b695e 1322 uint16_t DevAddress;
EricLew 0:80ee8f3b695e 1323
EricLew 0:80ee8f3b695e 1324 /* Process Locked */
EricLew 0:80ee8f3b695e 1325 __HAL_LOCK(hsmbus);
EricLew 0:80ee8f3b695e 1326
EricLew 0:80ee8f3b695e 1327 if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF) != RESET)
EricLew 0:80ee8f3b695e 1328 {
EricLew 0:80ee8f3b695e 1329 /* Clear NACK Flag */
EricLew 0:80ee8f3b695e 1330 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_AF);
EricLew 0:80ee8f3b695e 1331
EricLew 0:80ee8f3b695e 1332 /* Set corresponding Error Code */
EricLew 0:80ee8f3b695e 1333 /* No need to generate STOP, it is automatically done */
EricLew 0:80ee8f3b695e 1334 hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ACKF;
EricLew 0:80ee8f3b695e 1335
EricLew 0:80ee8f3b695e 1336 /* Process Unlocked */
EricLew 0:80ee8f3b695e 1337 __HAL_UNLOCK(hsmbus);
EricLew 0:80ee8f3b695e 1338
EricLew 0:80ee8f3b695e 1339 /* Call the Error callback to prevent upper layer */
EricLew 0:80ee8f3b695e 1340 HAL_SMBUS_ErrorCallback(hsmbus);
EricLew 0:80ee8f3b695e 1341 }
EricLew 0:80ee8f3b695e 1342 else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_STOPF) != RESET)
EricLew 0:80ee8f3b695e 1343 {
EricLew 0:80ee8f3b695e 1344
EricLew 0:80ee8f3b695e 1345 /* Call the corresponding callback to inform upper layer of End of Transfer */
EricLew 0:80ee8f3b695e 1346 if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX)
EricLew 0:80ee8f3b695e 1347 {
EricLew 0:80ee8f3b695e 1348 /* Disable Interrupt */
EricLew 0:80ee8f3b695e 1349 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_TX);
EricLew 0:80ee8f3b695e 1350
EricLew 0:80ee8f3b695e 1351 /* Clear STOP Flag */
EricLew 0:80ee8f3b695e 1352 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
EricLew 0:80ee8f3b695e 1353
EricLew 0:80ee8f3b695e 1354 /* Clear Configuration Register 2 */
EricLew 0:80ee8f3b695e 1355 SMBUS_RESET_CR2(hsmbus);
EricLew 0:80ee8f3b695e 1356
EricLew 0:80ee8f3b695e 1357 /* Flush remaining data in Fifo register in case of error occurs before TXEmpty */
EricLew 0:80ee8f3b695e 1358 /* Disable the selected SMBUS peripheral */
EricLew 0:80ee8f3b695e 1359 __HAL_SMBUS_DISABLE(hsmbus);
EricLew 0:80ee8f3b695e 1360
EricLew 0:80ee8f3b695e 1361 hsmbus->PreviousState = HAL_SMBUS_STATE_READY;
EricLew 0:80ee8f3b695e 1362 hsmbus->State = HAL_SMBUS_STATE_READY;
EricLew 0:80ee8f3b695e 1363
EricLew 0:80ee8f3b695e 1364 /* Process Unlocked */
EricLew 0:80ee8f3b695e 1365 __HAL_UNLOCK(hsmbus);
EricLew 0:80ee8f3b695e 1366
EricLew 0:80ee8f3b695e 1367 /* REenable the selected SMBUS peripheral */
EricLew 0:80ee8f3b695e 1368 __HAL_SMBUS_ENABLE(hsmbus);
EricLew 0:80ee8f3b695e 1369
EricLew 0:80ee8f3b695e 1370 HAL_SMBUS_MasterTxCpltCallback(hsmbus);
EricLew 0:80ee8f3b695e 1371 }
EricLew 0:80ee8f3b695e 1372 else if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX)
EricLew 0:80ee8f3b695e 1373 {
EricLew 0:80ee8f3b695e 1374 /* Disable Interrupt */
EricLew 0:80ee8f3b695e 1375 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX);
EricLew 0:80ee8f3b695e 1376
EricLew 0:80ee8f3b695e 1377 /* Clear STOP Flag */
EricLew 0:80ee8f3b695e 1378 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
EricLew 0:80ee8f3b695e 1379
EricLew 0:80ee8f3b695e 1380 /* Clear Configuration Register 2 */
EricLew 0:80ee8f3b695e 1381 SMBUS_RESET_CR2(hsmbus);
EricLew 0:80ee8f3b695e 1382
EricLew 0:80ee8f3b695e 1383 hsmbus->PreviousState = HAL_SMBUS_STATE_READY;
EricLew 0:80ee8f3b695e 1384 hsmbus->State = HAL_SMBUS_STATE_READY;
EricLew 0:80ee8f3b695e 1385
EricLew 0:80ee8f3b695e 1386 /* Process Unlocked */
EricLew 0:80ee8f3b695e 1387 __HAL_UNLOCK(hsmbus);
EricLew 0:80ee8f3b695e 1388
EricLew 0:80ee8f3b695e 1389 HAL_SMBUS_MasterRxCpltCallback(hsmbus);
EricLew 0:80ee8f3b695e 1390 }
EricLew 0:80ee8f3b695e 1391 }
EricLew 0:80ee8f3b695e 1392 else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_RXNE) != RESET)
EricLew 0:80ee8f3b695e 1393 {
EricLew 0:80ee8f3b695e 1394 /* Read data from RXDR */
EricLew 0:80ee8f3b695e 1395 (*hsmbus->pBuffPtr++) = hsmbus->Instance->RXDR;
EricLew 0:80ee8f3b695e 1396 hsmbus->XferSize--;
EricLew 0:80ee8f3b695e 1397 hsmbus->XferCount--;
EricLew 0:80ee8f3b695e 1398 }
EricLew 0:80ee8f3b695e 1399 else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TXIS) != RESET)
EricLew 0:80ee8f3b695e 1400 {
EricLew 0:80ee8f3b695e 1401 /* Write data to TXDR */
EricLew 0:80ee8f3b695e 1402 hsmbus->Instance->TXDR = (*hsmbus->pBuffPtr++);
EricLew 0:80ee8f3b695e 1403 hsmbus->XferSize--;
EricLew 0:80ee8f3b695e 1404 hsmbus->XferCount--;
EricLew 0:80ee8f3b695e 1405 }
EricLew 0:80ee8f3b695e 1406 else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TCR) != RESET)
EricLew 0:80ee8f3b695e 1407 {
EricLew 0:80ee8f3b695e 1408 if((hsmbus->XferSize == 0)&&(hsmbus->XferCount!=0))
EricLew 0:80ee8f3b695e 1409 {
EricLew 0:80ee8f3b695e 1410 DevAddress = (hsmbus->Instance->CR2 & I2C_CR2_SADD);
EricLew 0:80ee8f3b695e 1411
EricLew 0:80ee8f3b695e 1412 if(hsmbus->XferCount > MAX_NBYTE_SIZE)
EricLew 0:80ee8f3b695e 1413 {
EricLew 0:80ee8f3b695e 1414 SMBUS_TransferConfig(hsmbus, DevAddress, MAX_NBYTE_SIZE, (SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE)), SMBUS_NO_STARTSTOP);
EricLew 0:80ee8f3b695e 1415 hsmbus->XferSize = MAX_NBYTE_SIZE;
EricLew 0:80ee8f3b695e 1416 }
EricLew 0:80ee8f3b695e 1417 else
EricLew 0:80ee8f3b695e 1418 {
EricLew 0:80ee8f3b695e 1419 hsmbus->XferSize = hsmbus->XferCount;
EricLew 0:80ee8f3b695e 1420 SMBUS_TransferConfig(hsmbus,DevAddress,hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
EricLew 0:80ee8f3b695e 1421 /* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */
EricLew 0:80ee8f3b695e 1422 /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
EricLew 0:80ee8f3b695e 1423 if(SMBUS_GET_PEC_MODE(hsmbus) != RESET)
EricLew 0:80ee8f3b695e 1424 {
EricLew 0:80ee8f3b695e 1425 hsmbus->XferSize--;
EricLew 0:80ee8f3b695e 1426 hsmbus->XferCount--;
EricLew 0:80ee8f3b695e 1427 }
EricLew 0:80ee8f3b695e 1428 }
EricLew 0:80ee8f3b695e 1429 }
EricLew 0:80ee8f3b695e 1430 else if((hsmbus->XferSize == 0)&&(hsmbus->XferCount==0))
EricLew 0:80ee8f3b695e 1431 {
EricLew 0:80ee8f3b695e 1432 /* Call TxCpltCallback() if no stop mode is set */
EricLew 0:80ee8f3b695e 1433 if(SMBUS_GET_STOP_MODE(hsmbus) != SMBUS_AUTOEND_MODE)
EricLew 0:80ee8f3b695e 1434 {
EricLew 0:80ee8f3b695e 1435 /* Call the corresponding callback to inform upper layer of End of Transfer */
EricLew 0:80ee8f3b695e 1436 if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX)
EricLew 0:80ee8f3b695e 1437 {
EricLew 0:80ee8f3b695e 1438 /* Disable Interrupt */
EricLew 0:80ee8f3b695e 1439 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_TX);
EricLew 0:80ee8f3b695e 1440 hsmbus->PreviousState = hsmbus->State;
EricLew 0:80ee8f3b695e 1441 hsmbus->State = HAL_SMBUS_STATE_READY;
EricLew 0:80ee8f3b695e 1442
EricLew 0:80ee8f3b695e 1443 /* Process Unlocked */
EricLew 0:80ee8f3b695e 1444 __HAL_UNLOCK(hsmbus);
EricLew 0:80ee8f3b695e 1445
EricLew 0:80ee8f3b695e 1446 HAL_SMBUS_MasterTxCpltCallback(hsmbus);
EricLew 0:80ee8f3b695e 1447 }
EricLew 0:80ee8f3b695e 1448 else if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX)
EricLew 0:80ee8f3b695e 1449 {
EricLew 0:80ee8f3b695e 1450 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX);
EricLew 0:80ee8f3b695e 1451 hsmbus->PreviousState = hsmbus->State;
EricLew 0:80ee8f3b695e 1452 hsmbus->State = HAL_SMBUS_STATE_READY;
EricLew 0:80ee8f3b695e 1453
EricLew 0:80ee8f3b695e 1454 /* Process Unlocked */
EricLew 0:80ee8f3b695e 1455 __HAL_UNLOCK(hsmbus);
EricLew 0:80ee8f3b695e 1456
EricLew 0:80ee8f3b695e 1457 HAL_SMBUS_MasterRxCpltCallback(hsmbus);
EricLew 0:80ee8f3b695e 1458 }
EricLew 0:80ee8f3b695e 1459 }
EricLew 0:80ee8f3b695e 1460 }
EricLew 0:80ee8f3b695e 1461 }
EricLew 0:80ee8f3b695e 1462 else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TC) != RESET)
EricLew 0:80ee8f3b695e 1463 {
EricLew 0:80ee8f3b695e 1464 if(hsmbus->XferCount == 0)
EricLew 0:80ee8f3b695e 1465 {
EricLew 0:80ee8f3b695e 1466 /* Specific use case for Quick command */
EricLew 0:80ee8f3b695e 1467 if(hsmbus->pBuffPtr == NULL)
EricLew 0:80ee8f3b695e 1468 {
EricLew 0:80ee8f3b695e 1469 /* Generate a Stop command */
EricLew 0:80ee8f3b695e 1470 hsmbus->Instance->CR2 |= I2C_CR2_STOP;
EricLew 0:80ee8f3b695e 1471 }
EricLew 0:80ee8f3b695e 1472 /* Call TxCpltCallback() if no stop mode is set */
EricLew 0:80ee8f3b695e 1473 else if(SMBUS_GET_STOP_MODE(hsmbus) != SMBUS_AUTOEND_MODE)
EricLew 0:80ee8f3b695e 1474 {
EricLew 0:80ee8f3b695e 1475 /* No Generate Stop, to permit restart mode */
EricLew 0:80ee8f3b695e 1476 /* The stop will be done at the end of transfer, when SMBUS_AUTOEND_MODE enable */
EricLew 0:80ee8f3b695e 1477
EricLew 0:80ee8f3b695e 1478 /* Call the corresponding callback to inform upper layer of End of Transfer */
EricLew 0:80ee8f3b695e 1479 if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_TX)
EricLew 0:80ee8f3b695e 1480 {
EricLew 0:80ee8f3b695e 1481 /* Disable Interrupt */
EricLew 0:80ee8f3b695e 1482 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_TX);
EricLew 0:80ee8f3b695e 1483 hsmbus->PreviousState = hsmbus->State;
EricLew 0:80ee8f3b695e 1484 hsmbus->State = HAL_SMBUS_STATE_READY;
EricLew 0:80ee8f3b695e 1485
EricLew 0:80ee8f3b695e 1486 /* Process Unlocked */
EricLew 0:80ee8f3b695e 1487 __HAL_UNLOCK(hsmbus);
EricLew 0:80ee8f3b695e 1488
EricLew 0:80ee8f3b695e 1489 HAL_SMBUS_MasterTxCpltCallback(hsmbus);
EricLew 0:80ee8f3b695e 1490 }
EricLew 0:80ee8f3b695e 1491 else if(hsmbus->State == HAL_SMBUS_STATE_MASTER_BUSY_RX)
EricLew 0:80ee8f3b695e 1492 {
EricLew 0:80ee8f3b695e 1493 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX);
EricLew 0:80ee8f3b695e 1494 hsmbus->PreviousState = hsmbus->State;
EricLew 0:80ee8f3b695e 1495 hsmbus->State = HAL_SMBUS_STATE_READY;
EricLew 0:80ee8f3b695e 1496
EricLew 0:80ee8f3b695e 1497 /* Process Unlocked */
EricLew 0:80ee8f3b695e 1498 __HAL_UNLOCK(hsmbus);
EricLew 0:80ee8f3b695e 1499
EricLew 0:80ee8f3b695e 1500 HAL_SMBUS_MasterRxCpltCallback(hsmbus);
EricLew 0:80ee8f3b695e 1501 }
EricLew 0:80ee8f3b695e 1502 }
EricLew 0:80ee8f3b695e 1503 }
EricLew 0:80ee8f3b695e 1504 }
EricLew 0:80ee8f3b695e 1505
EricLew 0:80ee8f3b695e 1506 /* Process Unlocked */
EricLew 0:80ee8f3b695e 1507 __HAL_UNLOCK(hsmbus);
EricLew 0:80ee8f3b695e 1508
EricLew 0:80ee8f3b695e 1509 return HAL_OK;
EricLew 0:80ee8f3b695e 1510 }
EricLew 0:80ee8f3b695e 1511 /**
EricLew 0:80ee8f3b695e 1512 * @brief Interrupt Sub-Routine which handle the Interrupt Flags Slave Mode.
EricLew 0:80ee8f3b695e 1513 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
EricLew 0:80ee8f3b695e 1514 * the configuration information for the specified SMBUS.
EricLew 0:80ee8f3b695e 1515 * @retval HAL status
EricLew 0:80ee8f3b695e 1516 */
EricLew 0:80ee8f3b695e 1517 static HAL_StatusTypeDef SMBUS_Slave_ISR(SMBUS_HandleTypeDef *hsmbus)
EricLew 0:80ee8f3b695e 1518 {
EricLew 0:80ee8f3b695e 1519 uint8_t TransferDirection = 0;
EricLew 0:80ee8f3b695e 1520 uint16_t SlaveAddrCode = 0;
EricLew 0:80ee8f3b695e 1521
EricLew 0:80ee8f3b695e 1522 /* Process Locked */
EricLew 0:80ee8f3b695e 1523 __HAL_LOCK(hsmbus);
EricLew 0:80ee8f3b695e 1524
EricLew 0:80ee8f3b695e 1525 if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_AF) != RESET)
EricLew 0:80ee8f3b695e 1526 {
EricLew 0:80ee8f3b695e 1527 /* Check that SMBUS transfer finished */
EricLew 0:80ee8f3b695e 1528 /* if yes, normal use case, a NACK is sent by the HOST when Transfer is finished */
EricLew 0:80ee8f3b695e 1529 /* Mean XferCount == 0*/
EricLew 0:80ee8f3b695e 1530 /* So clear Flag NACKF only */
EricLew 0:80ee8f3b695e 1531 if(hsmbus->XferCount == 0)
EricLew 0:80ee8f3b695e 1532 {
EricLew 0:80ee8f3b695e 1533 /* Clear NACK Flag */
EricLew 0:80ee8f3b695e 1534 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_AF);
EricLew 0:80ee8f3b695e 1535
EricLew 0:80ee8f3b695e 1536 /* Process Unlocked */
EricLew 0:80ee8f3b695e 1537 __HAL_UNLOCK(hsmbus);
EricLew 0:80ee8f3b695e 1538 }
EricLew 0:80ee8f3b695e 1539 else
EricLew 0:80ee8f3b695e 1540 {
EricLew 0:80ee8f3b695e 1541 /* if no, error use case, a Non-Acknowledge of last Data is generated by the HOST*/
EricLew 0:80ee8f3b695e 1542 /* Clear NACK Flag */
EricLew 0:80ee8f3b695e 1543 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_AF);
EricLew 0:80ee8f3b695e 1544
EricLew 0:80ee8f3b695e 1545 /* Set HAL State to "Idle" State, mean to LISTEN state */
EricLew 0:80ee8f3b695e 1546 /* So reset Slave Busy state */
EricLew 0:80ee8f3b695e 1547 hsmbus->PreviousState = hsmbus->State;
EricLew 0:80ee8f3b695e 1548 hsmbus->State &= ~((uint32_t)HAL_SMBUS_STATE_SLAVE_BUSY_TX);
EricLew 0:80ee8f3b695e 1549 hsmbus->State &= ~((uint32_t)HAL_SMBUS_STATE_SLAVE_BUSY_RX);
EricLew 0:80ee8f3b695e 1550
EricLew 0:80ee8f3b695e 1551 /* Disable RX/TX Interrupts, keep only ADDR Interrupt */
EricLew 0:80ee8f3b695e 1552 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX | SMBUS_IT_TX);
EricLew 0:80ee8f3b695e 1553
EricLew 0:80ee8f3b695e 1554 /* Set ErrorCode corresponding to a Non-Acknowledge */
EricLew 0:80ee8f3b695e 1555 hsmbus->ErrorCode |= HAL_SMBUS_ERROR_ACKF;
EricLew 0:80ee8f3b695e 1556
EricLew 0:80ee8f3b695e 1557 /* Process Unlocked */
EricLew 0:80ee8f3b695e 1558 __HAL_UNLOCK(hsmbus);
EricLew 0:80ee8f3b695e 1559
EricLew 0:80ee8f3b695e 1560 /* Call the Error callback to prevent upper layer */
EricLew 0:80ee8f3b695e 1561 HAL_SMBUS_ErrorCallback(hsmbus);
EricLew 0:80ee8f3b695e 1562 }
EricLew 0:80ee8f3b695e 1563 }
EricLew 0:80ee8f3b695e 1564 else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_ADDR) != RESET)
EricLew 0:80ee8f3b695e 1565 {
EricLew 0:80ee8f3b695e 1566 TransferDirection = SMBUS_GET_DIR(hsmbus);
EricLew 0:80ee8f3b695e 1567 SlaveAddrCode = SMBUS_GET_ADDR_MATCH(hsmbus);
EricLew 0:80ee8f3b695e 1568
EricLew 0:80ee8f3b695e 1569 /* Disable ADDR interrupt to prevent multiple ADDRInterrupt*/
EricLew 0:80ee8f3b695e 1570 /* Other ADDRInterrupt will be treat in next Listen use case */
EricLew 0:80ee8f3b695e 1571 __HAL_SMBUS_DISABLE_IT(hsmbus, SMBUS_IT_ADDRI);
EricLew 0:80ee8f3b695e 1572
EricLew 0:80ee8f3b695e 1573 /* Process Unlocked */
EricLew 0:80ee8f3b695e 1574 __HAL_UNLOCK(hsmbus);
EricLew 0:80ee8f3b695e 1575
EricLew 0:80ee8f3b695e 1576 /* Call Slave Addr callback */
EricLew 0:80ee8f3b695e 1577 HAL_SMBUS_AddrCallback(hsmbus, TransferDirection, SlaveAddrCode);
EricLew 0:80ee8f3b695e 1578 }
EricLew 0:80ee8f3b695e 1579 else if((__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_RXNE) != RESET) || (__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TCR) != RESET))
EricLew 0:80ee8f3b695e 1580 {
EricLew 0:80ee8f3b695e 1581 if( (hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_RX) == HAL_SMBUS_STATE_SLAVE_BUSY_RX)
EricLew 0:80ee8f3b695e 1582 {
EricLew 0:80ee8f3b695e 1583 /* Read data from RXDR */
EricLew 0:80ee8f3b695e 1584 (*hsmbus->pBuffPtr++) = hsmbus->Instance->RXDR;
EricLew 0:80ee8f3b695e 1585 hsmbus->XferSize--;
EricLew 0:80ee8f3b695e 1586 hsmbus->XferCount--;
EricLew 0:80ee8f3b695e 1587
EricLew 0:80ee8f3b695e 1588 if(hsmbus->XferCount == 1)
EricLew 0:80ee8f3b695e 1589 {
EricLew 0:80ee8f3b695e 1590 /* Receive last Byte, can be PEC byte in case of PEC BYTE enabled */
EricLew 0:80ee8f3b695e 1591 /* or only the last Byte of Transfer */
EricLew 0:80ee8f3b695e 1592 /* So reset the RELOAD bit mode */
EricLew 0:80ee8f3b695e 1593 hsmbus->XferOptions &= ~SMBUS_RELOAD_MODE;
EricLew 0:80ee8f3b695e 1594 SMBUS_TransferConfig(hsmbus,0 ,1 , hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
EricLew 0:80ee8f3b695e 1595 }
EricLew 0:80ee8f3b695e 1596 else if(hsmbus->XferCount == 0)
EricLew 0:80ee8f3b695e 1597 {
EricLew 0:80ee8f3b695e 1598 /* Last Byte is received, disable Interrupt */
EricLew 0:80ee8f3b695e 1599 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX);
EricLew 0:80ee8f3b695e 1600
EricLew 0:80ee8f3b695e 1601 /* Remove HAL_SMBUS_STATE_SLAVE_BUSY_RX, keep only HAL_SMBUS_STATE_LISTEN */
EricLew 0:80ee8f3b695e 1602 hsmbus->PreviousState = hsmbus->State;
EricLew 0:80ee8f3b695e 1603 hsmbus->State &= ~((uint32_t)HAL_SMBUS_STATE_SLAVE_BUSY_RX);
EricLew 0:80ee8f3b695e 1604
EricLew 0:80ee8f3b695e 1605 /* Process Unlocked */
EricLew 0:80ee8f3b695e 1606 __HAL_UNLOCK(hsmbus);
EricLew 0:80ee8f3b695e 1607
EricLew 0:80ee8f3b695e 1608 /* Call the Rx complete callback to inform upper layer of the end of receive process */
EricLew 0:80ee8f3b695e 1609 HAL_SMBUS_SlaveRxCpltCallback(hsmbus);
EricLew 0:80ee8f3b695e 1610 }
EricLew 0:80ee8f3b695e 1611 else
EricLew 0:80ee8f3b695e 1612 {
EricLew 0:80ee8f3b695e 1613 /* Set Reload for next Bytes */
EricLew 0:80ee8f3b695e 1614 SMBUS_TransferConfig(hsmbus,0, 1, SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE), SMBUS_NO_STARTSTOP);
EricLew 0:80ee8f3b695e 1615
EricLew 0:80ee8f3b695e 1616 /* Ack last Byte Read */
EricLew 0:80ee8f3b695e 1617 hsmbus->Instance->CR2 &= ~I2C_CR2_NACK;
EricLew 0:80ee8f3b695e 1618 }
EricLew 0:80ee8f3b695e 1619 }
EricLew 0:80ee8f3b695e 1620 else if( (hsmbus->State & HAL_SMBUS_STATE_SLAVE_BUSY_TX) == HAL_SMBUS_STATE_SLAVE_BUSY_TX)
EricLew 0:80ee8f3b695e 1621 {
EricLew 0:80ee8f3b695e 1622 if((hsmbus->XferSize == 0)&&(hsmbus->XferCount!=0))
EricLew 0:80ee8f3b695e 1623 {
EricLew 0:80ee8f3b695e 1624 if(hsmbus->XferCount > MAX_NBYTE_SIZE)
EricLew 0:80ee8f3b695e 1625 {
EricLew 0:80ee8f3b695e 1626 SMBUS_TransferConfig(hsmbus, 0, MAX_NBYTE_SIZE, (SMBUS_RELOAD_MODE | (hsmbus->XferOptions & SMBUS_SENDPEC_MODE)), SMBUS_NO_STARTSTOP);
EricLew 0:80ee8f3b695e 1627 hsmbus->XferSize = MAX_NBYTE_SIZE;
EricLew 0:80ee8f3b695e 1628 }
EricLew 0:80ee8f3b695e 1629 else
EricLew 0:80ee8f3b695e 1630 {
EricLew 0:80ee8f3b695e 1631 hsmbus->XferSize = hsmbus->XferCount;
EricLew 0:80ee8f3b695e 1632 SMBUS_TransferConfig(hsmbus, 0, hsmbus->XferSize, hsmbus->XferOptions, SMBUS_NO_STARTSTOP);
EricLew 0:80ee8f3b695e 1633 /* If PEC mode is enable, size to transmit should be Size-1 byte, corresponding to PEC byte */
EricLew 0:80ee8f3b695e 1634 /* PEC byte is automatically sent by HW block, no need to manage it in Transmit process */
EricLew 0:80ee8f3b695e 1635 if(SMBUS_GET_PEC_MODE(hsmbus) != RESET)
EricLew 0:80ee8f3b695e 1636 {
EricLew 0:80ee8f3b695e 1637 hsmbus->XferSize--;
EricLew 0:80ee8f3b695e 1638 hsmbus->XferCount--;
EricLew 0:80ee8f3b695e 1639 }
EricLew 0:80ee8f3b695e 1640 }
EricLew 0:80ee8f3b695e 1641 }
EricLew 0:80ee8f3b695e 1642 }
EricLew 0:80ee8f3b695e 1643 }
EricLew 0:80ee8f3b695e 1644 else if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_TXIS) != RESET)
EricLew 0:80ee8f3b695e 1645 {
EricLew 0:80ee8f3b695e 1646 /* Write data to TXDR only if XferCount not reach "0" */
EricLew 0:80ee8f3b695e 1647 /* A TXIS flag can be set, during STOP treatment */
EricLew 0:80ee8f3b695e 1648 /* Check if all Data have already been sent */
EricLew 0:80ee8f3b695e 1649 /* If it is the case, this last write in TXDR is not sent, correspond to a dummy TXIS event */
EricLew 0:80ee8f3b695e 1650 if(hsmbus->XferCount > 0)
EricLew 0:80ee8f3b695e 1651 {
EricLew 0:80ee8f3b695e 1652 /* Write data to TXDR */
EricLew 0:80ee8f3b695e 1653 hsmbus->Instance->TXDR = (*hsmbus->pBuffPtr++);
EricLew 0:80ee8f3b695e 1654 hsmbus->XferCount--;
EricLew 0:80ee8f3b695e 1655 hsmbus->XferSize--;
EricLew 0:80ee8f3b695e 1656 }
EricLew 0:80ee8f3b695e 1657
EricLew 0:80ee8f3b695e 1658 if(hsmbus->XferCount == 0)
EricLew 0:80ee8f3b695e 1659 {
EricLew 0:80ee8f3b695e 1660 /* Last Byte is Transmitted */
EricLew 0:80ee8f3b695e 1661 /* Remove HAL_SMBUS_STATE_SLAVE_BUSY_TX, keep only HAL_SMBUS_STATE_LISTEN */
EricLew 0:80ee8f3b695e 1662 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_TX);
EricLew 0:80ee8f3b695e 1663 hsmbus->PreviousState = hsmbus->State;
EricLew 0:80ee8f3b695e 1664 hsmbus->State &= ~((uint32_t)HAL_SMBUS_STATE_SLAVE_BUSY_TX);
EricLew 0:80ee8f3b695e 1665
EricLew 0:80ee8f3b695e 1666 /* Process Unlocked */
EricLew 0:80ee8f3b695e 1667 __HAL_UNLOCK(hsmbus);
EricLew 0:80ee8f3b695e 1668
EricLew 0:80ee8f3b695e 1669 /* Call the Tx complete callback to inform upper layer of the end of transmit process */
EricLew 0:80ee8f3b695e 1670 HAL_SMBUS_SlaveTxCpltCallback(hsmbus);
EricLew 0:80ee8f3b695e 1671 }
EricLew 0:80ee8f3b695e 1672 }
EricLew 0:80ee8f3b695e 1673
EricLew 0:80ee8f3b695e 1674 /* Check if STOPF is set */
EricLew 0:80ee8f3b695e 1675 if(__HAL_SMBUS_GET_FLAG(hsmbus, SMBUS_FLAG_STOPF) != RESET)
EricLew 0:80ee8f3b695e 1676 {
EricLew 0:80ee8f3b695e 1677 if((hsmbus->State & HAL_SMBUS_STATE_LISTEN) == HAL_SMBUS_STATE_LISTEN)
EricLew 0:80ee8f3b695e 1678 {
EricLew 0:80ee8f3b695e 1679 /* Disable RX and TX Interrupts */
EricLew 0:80ee8f3b695e 1680 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_RX | SMBUS_IT_TX);
EricLew 0:80ee8f3b695e 1681
EricLew 0:80ee8f3b695e 1682 /* Disable ADDR Interrupt */
EricLew 0:80ee8f3b695e 1683 SMBUS_Disable_IRQ(hsmbus, SMBUS_IT_ADDR);
EricLew 0:80ee8f3b695e 1684
EricLew 0:80ee8f3b695e 1685 /* Disable Address Acknowledge */
EricLew 0:80ee8f3b695e 1686 hsmbus->Instance->CR2 |= I2C_CR2_NACK;
EricLew 0:80ee8f3b695e 1687
EricLew 0:80ee8f3b695e 1688 /* Clear Configuration Register 2 */
EricLew 0:80ee8f3b695e 1689 SMBUS_RESET_CR2(hsmbus);
EricLew 0:80ee8f3b695e 1690
EricLew 0:80ee8f3b695e 1691 /* Clear STOP Flag */
EricLew 0:80ee8f3b695e 1692 __HAL_SMBUS_CLEAR_FLAG(hsmbus, SMBUS_FLAG_STOPF);
EricLew 0:80ee8f3b695e 1693
EricLew 0:80ee8f3b695e 1694 /* Clear ADDR flag */
EricLew 0:80ee8f3b695e 1695 __HAL_SMBUS_CLEAR_FLAG(hsmbus,SMBUS_FLAG_ADDR);
EricLew 0:80ee8f3b695e 1696
EricLew 0:80ee8f3b695e 1697 hsmbus->XferOptions = 0;
EricLew 0:80ee8f3b695e 1698 hsmbus->PreviousState = hsmbus->State;
EricLew 0:80ee8f3b695e 1699 hsmbus->State = HAL_SMBUS_STATE_READY;
EricLew 0:80ee8f3b695e 1700
EricLew 0:80ee8f3b695e 1701 /* Process Unlocked */
EricLew 0:80ee8f3b695e 1702 __HAL_UNLOCK(hsmbus);
EricLew 0:80ee8f3b695e 1703
EricLew 0:80ee8f3b695e 1704 /* Call the Listen Complete callback, to prevent upper layer of the end of Listen use case */
EricLew 0:80ee8f3b695e 1705 HAL_SMBUS_ListenCpltCallback(hsmbus);
EricLew 0:80ee8f3b695e 1706 }
EricLew 0:80ee8f3b695e 1707 }
EricLew 0:80ee8f3b695e 1708
EricLew 0:80ee8f3b695e 1709 /* Process Unlocked */
EricLew 0:80ee8f3b695e 1710 __HAL_UNLOCK(hsmbus);
EricLew 0:80ee8f3b695e 1711
EricLew 0:80ee8f3b695e 1712 return HAL_OK;
EricLew 0:80ee8f3b695e 1713 }
EricLew 0:80ee8f3b695e 1714 /**
EricLew 0:80ee8f3b695e 1715 * @brief Manage the enabling of Interrupts.
EricLew 0:80ee8f3b695e 1716 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
EricLew 0:80ee8f3b695e 1717 * the configuration information for the specified SMBUS.
EricLew 0:80ee8f3b695e 1718 * @param InterruptRequest : Value of @ref SMBUS_Interrupt_configuration_definition.
EricLew 0:80ee8f3b695e 1719 * @retval HAL status
EricLew 0:80ee8f3b695e 1720 */
EricLew 0:80ee8f3b695e 1721 static HAL_StatusTypeDef SMBUS_Enable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint16_t InterruptRequest)
EricLew 0:80ee8f3b695e 1722 {
EricLew 0:80ee8f3b695e 1723 uint32_t tmpisr = 0;
EricLew 0:80ee8f3b695e 1724
EricLew 0:80ee8f3b695e 1725 if((InterruptRequest & SMBUS_IT_ALERT) == SMBUS_IT_ALERT)
EricLew 0:80ee8f3b695e 1726 {
EricLew 0:80ee8f3b695e 1727 /* Enable ERR interrupt */
EricLew 0:80ee8f3b695e 1728 tmpisr |= SMBUS_IT_ERRI;
EricLew 0:80ee8f3b695e 1729 }
EricLew 0:80ee8f3b695e 1730
EricLew 0:80ee8f3b695e 1731 if((InterruptRequest & SMBUS_IT_ADDR) == SMBUS_IT_ADDR)
EricLew 0:80ee8f3b695e 1732 {
EricLew 0:80ee8f3b695e 1733 /* Enable ADDR, STOP interrupt */
EricLew 0:80ee8f3b695e 1734 tmpisr |= SMBUS_IT_ADDRI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_ERRI;
EricLew 0:80ee8f3b695e 1735 }
EricLew 0:80ee8f3b695e 1736
EricLew 0:80ee8f3b695e 1737 if((InterruptRequest & SMBUS_IT_TX) == SMBUS_IT_TX)
EricLew 0:80ee8f3b695e 1738 {
EricLew 0:80ee8f3b695e 1739 /* Enable ERR, TC, STOP, NACK, RXI interrupt */
EricLew 0:80ee8f3b695e 1740 tmpisr |= SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_TXI;
EricLew 0:80ee8f3b695e 1741 }
EricLew 0:80ee8f3b695e 1742
EricLew 0:80ee8f3b695e 1743 if((InterruptRequest & SMBUS_IT_RX) == SMBUS_IT_RX)
EricLew 0:80ee8f3b695e 1744 {
EricLew 0:80ee8f3b695e 1745 /* Enable ERR, TC, STOP, NACK, TXI interrupt */
EricLew 0:80ee8f3b695e 1746 tmpisr |= SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_RXI;
EricLew 0:80ee8f3b695e 1747 }
EricLew 0:80ee8f3b695e 1748
EricLew 0:80ee8f3b695e 1749 /* Enable interrupts only at the end */
EricLew 0:80ee8f3b695e 1750 /* to avoid the risk of SMBUS interrupt handle execution before */
EricLew 0:80ee8f3b695e 1751 /* all interrupts requested done */
EricLew 0:80ee8f3b695e 1752 __HAL_SMBUS_ENABLE_IT(hsmbus, tmpisr);
EricLew 0:80ee8f3b695e 1753
EricLew 0:80ee8f3b695e 1754 return HAL_OK;
EricLew 0:80ee8f3b695e 1755 }
EricLew 0:80ee8f3b695e 1756 /**
EricLew 0:80ee8f3b695e 1757 * @brief Manage the disabling of Interrupts.
EricLew 0:80ee8f3b695e 1758 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
EricLew 0:80ee8f3b695e 1759 * the configuration information for the specified SMBUS.
EricLew 0:80ee8f3b695e 1760 * @param InterruptRequest : Value of @ref SMBUS_Interrupt_configuration_definition.
EricLew 0:80ee8f3b695e 1761 * @retval HAL status
EricLew 0:80ee8f3b695e 1762 */
EricLew 0:80ee8f3b695e 1763 static HAL_StatusTypeDef SMBUS_Disable_IRQ(SMBUS_HandleTypeDef *hsmbus, uint16_t InterruptRequest)
EricLew 0:80ee8f3b695e 1764 {
EricLew 0:80ee8f3b695e 1765 uint32_t tmpisr = 0;
EricLew 0:80ee8f3b695e 1766
EricLew 0:80ee8f3b695e 1767 if( ((InterruptRequest & SMBUS_IT_ALERT) == SMBUS_IT_ALERT) && (hsmbus->State == HAL_SMBUS_STATE_READY) )
EricLew 0:80ee8f3b695e 1768 {
EricLew 0:80ee8f3b695e 1769 /* Disable ERR interrupt */
EricLew 0:80ee8f3b695e 1770 tmpisr |= SMBUS_IT_ERRI;
EricLew 0:80ee8f3b695e 1771 }
EricLew 0:80ee8f3b695e 1772
EricLew 0:80ee8f3b695e 1773 if((InterruptRequest & SMBUS_IT_TX) == SMBUS_IT_TX)
EricLew 0:80ee8f3b695e 1774 {
EricLew 0:80ee8f3b695e 1775 /* Disable TC, STOP, NACK, TXI interrupt */
EricLew 0:80ee8f3b695e 1776 tmpisr |= SMBUS_IT_TCI | SMBUS_IT_TXI;
EricLew 0:80ee8f3b695e 1777
EricLew 0:80ee8f3b695e 1778 if((SMBUS_GET_ALERT_ENABLED(hsmbus) == RESET)
EricLew 0:80ee8f3b695e 1779 && ((hsmbus->State & HAL_SMBUS_STATE_LISTEN) != HAL_SMBUS_STATE_LISTEN))
EricLew 0:80ee8f3b695e 1780 {
EricLew 0:80ee8f3b695e 1781 /* Disable ERR interrupt */
EricLew 0:80ee8f3b695e 1782 tmpisr |= SMBUS_IT_ERRI;
EricLew 0:80ee8f3b695e 1783 }
EricLew 0:80ee8f3b695e 1784
EricLew 0:80ee8f3b695e 1785 if((hsmbus->State & HAL_SMBUS_STATE_LISTEN) != HAL_SMBUS_STATE_LISTEN)
EricLew 0:80ee8f3b695e 1786 {
EricLew 0:80ee8f3b695e 1787 /* Disable STOPI, NACKI */
EricLew 0:80ee8f3b695e 1788 tmpisr |= SMBUS_IT_STOPI | SMBUS_IT_NACKI;
EricLew 0:80ee8f3b695e 1789 }
EricLew 0:80ee8f3b695e 1790 }
EricLew 0:80ee8f3b695e 1791
EricLew 0:80ee8f3b695e 1792 if((InterruptRequest & SMBUS_IT_RX) == SMBUS_IT_RX)
EricLew 0:80ee8f3b695e 1793 {
EricLew 0:80ee8f3b695e 1794 /* Disable TC, STOP, NACK, RXI interrupt */
EricLew 0:80ee8f3b695e 1795 tmpisr |= SMBUS_IT_TCI | SMBUS_IT_RXI;
EricLew 0:80ee8f3b695e 1796
EricLew 0:80ee8f3b695e 1797 if((SMBUS_GET_ALERT_ENABLED(hsmbus) == RESET)
EricLew 0:80ee8f3b695e 1798 && ((hsmbus->State & HAL_SMBUS_STATE_LISTEN) != HAL_SMBUS_STATE_LISTEN))
EricLew 0:80ee8f3b695e 1799 {
EricLew 0:80ee8f3b695e 1800 /* Disable ERR interrupt */
EricLew 0:80ee8f3b695e 1801 tmpisr |= SMBUS_IT_ERRI;
EricLew 0:80ee8f3b695e 1802 }
EricLew 0:80ee8f3b695e 1803
EricLew 0:80ee8f3b695e 1804 if((hsmbus->State & HAL_SMBUS_STATE_LISTEN) != HAL_SMBUS_STATE_LISTEN)
EricLew 0:80ee8f3b695e 1805 {
EricLew 0:80ee8f3b695e 1806 /* Disable STOPI, NACKI */
EricLew 0:80ee8f3b695e 1807 tmpisr |= SMBUS_IT_STOPI | SMBUS_IT_NACKI;
EricLew 0:80ee8f3b695e 1808 }
EricLew 0:80ee8f3b695e 1809 }
EricLew 0:80ee8f3b695e 1810
EricLew 0:80ee8f3b695e 1811 if((InterruptRequest & SMBUS_IT_ADDR) == SMBUS_IT_ADDR)
EricLew 0:80ee8f3b695e 1812 {
EricLew 0:80ee8f3b695e 1813 /* Enable ADDR, STOP interrupt */
EricLew 0:80ee8f3b695e 1814 tmpisr |= SMBUS_IT_ADDRI | SMBUS_IT_STOPI | SMBUS_IT_NACKI;
EricLew 0:80ee8f3b695e 1815
EricLew 0:80ee8f3b695e 1816 if(SMBUS_GET_ALERT_ENABLED(hsmbus) == RESET)
EricLew 0:80ee8f3b695e 1817 {
EricLew 0:80ee8f3b695e 1818 /* Disable ERR interrupt */
EricLew 0:80ee8f3b695e 1819 tmpisr |= SMBUS_IT_ERRI;
EricLew 0:80ee8f3b695e 1820 }
EricLew 0:80ee8f3b695e 1821 }
EricLew 0:80ee8f3b695e 1822
EricLew 0:80ee8f3b695e 1823 /* Disable interrupts only at the end */
EricLew 0:80ee8f3b695e 1824 /* to avoid a breaking situation like at "t" time */
EricLew 0:80ee8f3b695e 1825 /* all disable interrupts request are not done */
EricLew 0:80ee8f3b695e 1826 __HAL_SMBUS_DISABLE_IT(hsmbus, tmpisr);
EricLew 0:80ee8f3b695e 1827
EricLew 0:80ee8f3b695e 1828 return HAL_OK;
EricLew 0:80ee8f3b695e 1829 }
EricLew 0:80ee8f3b695e 1830 /**
EricLew 0:80ee8f3b695e 1831 * @brief Handle SMBUS Communication Timeout.
EricLew 0:80ee8f3b695e 1832 * @param hsmbus : Pointer to a SMBUS_HandleTypeDef structure that contains
EricLew 0:80ee8f3b695e 1833 * the configuration information for the specified SMBUS.
EricLew 0:80ee8f3b695e 1834 * @param Flag: specifies the SMBUS flag to check.
EricLew 0:80ee8f3b695e 1835 * @param Status: The new Flag status (SET or RESET).
EricLew 0:80ee8f3b695e 1836 * @param Timeout: Timeout duration
EricLew 0:80ee8f3b695e 1837 * @retval HAL status
EricLew 0:80ee8f3b695e 1838 */
EricLew 0:80ee8f3b695e 1839 static HAL_StatusTypeDef SMBUS_WaitOnFlagUntilTimeout(SMBUS_HandleTypeDef *hsmbus, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
EricLew 0:80ee8f3b695e 1840 {
EricLew 0:80ee8f3b695e 1841 uint32_t tickstart = HAL_GetTick();
EricLew 0:80ee8f3b695e 1842
EricLew 0:80ee8f3b695e 1843 /* Wait until flag is set */
EricLew 0:80ee8f3b695e 1844 if(Status == RESET)
EricLew 0:80ee8f3b695e 1845 {
EricLew 0:80ee8f3b695e 1846 while(__HAL_SMBUS_GET_FLAG(hsmbus, Flag) == RESET)
EricLew 0:80ee8f3b695e 1847 {
EricLew 0:80ee8f3b695e 1848 /* Check for the Timeout */
EricLew 0:80ee8f3b695e 1849 if(Timeout != HAL_MAX_DELAY)
EricLew 0:80ee8f3b695e 1850 {
EricLew 0:80ee8f3b695e 1851 if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
EricLew 0:80ee8f3b695e 1852 {
EricLew 0:80ee8f3b695e 1853 hsmbus->PreviousState = hsmbus->State;
EricLew 0:80ee8f3b695e 1854 hsmbus->State= HAL_SMBUS_STATE_READY;
EricLew 0:80ee8f3b695e 1855
EricLew 0:80ee8f3b695e 1856 /* Process Unlocked */
EricLew 0:80ee8f3b695e 1857 __HAL_UNLOCK(hsmbus);
EricLew 0:80ee8f3b695e 1858
EricLew 0:80ee8f3b695e 1859 return HAL_TIMEOUT;
EricLew 0:80ee8f3b695e 1860 }
EricLew 0:80ee8f3b695e 1861 }
EricLew 0:80ee8f3b695e 1862 }
EricLew 0:80ee8f3b695e 1863 }
EricLew 0:80ee8f3b695e 1864 else
EricLew 0:80ee8f3b695e 1865 {
EricLew 0:80ee8f3b695e 1866 while(__HAL_SMBUS_GET_FLAG(hsmbus, Flag) != RESET)
EricLew 0:80ee8f3b695e 1867 {
EricLew 0:80ee8f3b695e 1868 /* Check for the Timeout */
EricLew 0:80ee8f3b695e 1869 if(Timeout != HAL_MAX_DELAY)
EricLew 0:80ee8f3b695e 1870 {
EricLew 0:80ee8f3b695e 1871 if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
EricLew 0:80ee8f3b695e 1872 {
EricLew 0:80ee8f3b695e 1873 hsmbus->PreviousState = hsmbus->State;
EricLew 0:80ee8f3b695e 1874 hsmbus->State= HAL_SMBUS_STATE_READY;
EricLew 0:80ee8f3b695e 1875
EricLew 0:80ee8f3b695e 1876 /* Process Unlocked */
EricLew 0:80ee8f3b695e 1877 __HAL_UNLOCK(hsmbus);
EricLew 0:80ee8f3b695e 1878
EricLew 0:80ee8f3b695e 1879 return HAL_TIMEOUT;
EricLew 0:80ee8f3b695e 1880 }
EricLew 0:80ee8f3b695e 1881 }
EricLew 0:80ee8f3b695e 1882 }
EricLew 0:80ee8f3b695e 1883 }
EricLew 0:80ee8f3b695e 1884 return HAL_OK;
EricLew 0:80ee8f3b695e 1885 }
EricLew 0:80ee8f3b695e 1886
EricLew 0:80ee8f3b695e 1887 /**
EricLew 0:80ee8f3b695e 1888 * @brief Handle SMBUSx communication when starting transfer or during transfer (TC or TCR flag are set).
EricLew 0:80ee8f3b695e 1889 * @param hsmbus: SMBUS handle.
EricLew 0:80ee8f3b695e 1890 * @param DevAddress: specifies the slave address to be programmed.
EricLew 0:80ee8f3b695e 1891 * @param Size: specifies the number of bytes to be programmed.
EricLew 0:80ee8f3b695e 1892 * This parameter must be a value between 0 and 255.
EricLew 0:80ee8f3b695e 1893 * @param Mode: new state of the SMBUS START condition generation.
EricLew 0:80ee8f3b695e 1894 * This parameter can be one or a combination of the following values:
EricLew 0:80ee8f3b695e 1895 * @arg SMBUS_NO_MODE: No specific mode enabled.
EricLew 0:80ee8f3b695e 1896 * @arg SMBUS_RELOAD_MODE: Enable Reload mode.
EricLew 0:80ee8f3b695e 1897 * @arg SMBUS_AUTOEND_MODE: Enable Automatic end mode.
EricLew 0:80ee8f3b695e 1898 * @arg SMBUS_SOFTEND_MODE: Enable Software end mode and Reload mode.
EricLew 0:80ee8f3b695e 1899 * @param Request: new state of the SMBUS START condition generation.
EricLew 0:80ee8f3b695e 1900 * This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 1901 * @arg SMBUS_NO_STARTSTOP: Don't Generate stop and start condition.
EricLew 0:80ee8f3b695e 1902 * @arg SMBUS_GENERATE_STOP: Generate stop condition (Size should be set to 0).
EricLew 0:80ee8f3b695e 1903 * @arg SMBUS_GENERATE_START_READ: Generate Restart for read request.
EricLew 0:80ee8f3b695e 1904 * @arg SMBUS_GENERATE_START_WRITE: Generate Restart for write request.
EricLew 0:80ee8f3b695e 1905 * @retval None
EricLew 0:80ee8f3b695e 1906 */
EricLew 0:80ee8f3b695e 1907 static void SMBUS_TransferConfig(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request)
EricLew 0:80ee8f3b695e 1908 {
EricLew 0:80ee8f3b695e 1909 uint32_t tmpreg = 0;
EricLew 0:80ee8f3b695e 1910
EricLew 0:80ee8f3b695e 1911 /* Check the parameters */
EricLew 0:80ee8f3b695e 1912 assert_param(IS_SMBUS_ALL_INSTANCE(hsmbus->Instance));
EricLew 0:80ee8f3b695e 1913 assert_param(IS_SMBUS_TRANSFER_MODE(Mode));
EricLew 0:80ee8f3b695e 1914 assert_param(IS_SMBUS_TRANSFER_REQUEST(Request));
EricLew 0:80ee8f3b695e 1915
EricLew 0:80ee8f3b695e 1916 /* Get the CR2 register value */
EricLew 0:80ee8f3b695e 1917 tmpreg = hsmbus->Instance->CR2;
EricLew 0:80ee8f3b695e 1918
EricLew 0:80ee8f3b695e 1919 /* clear tmpreg specific bits */
EricLew 0:80ee8f3b695e 1920 tmpreg &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | I2C_CR2_RD_WRN | I2C_CR2_START | I2C_CR2_STOP | I2C_CR2_PECBYTE));
EricLew 0:80ee8f3b695e 1921
EricLew 0:80ee8f3b695e 1922 /* update tmpreg */
EricLew 0:80ee8f3b695e 1923 tmpreg |= (uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | (((uint32_t)Size << 16 ) & I2C_CR2_NBYTES) | \
EricLew 0:80ee8f3b695e 1924 (uint32_t)Mode | (uint32_t)Request);
EricLew 0:80ee8f3b695e 1925
EricLew 0:80ee8f3b695e 1926 /* update CR2 register */
EricLew 0:80ee8f3b695e 1927 hsmbus->Instance->CR2 = tmpreg;
EricLew 0:80ee8f3b695e 1928 }
EricLew 0:80ee8f3b695e 1929 /**
EricLew 0:80ee8f3b695e 1930 * @}
EricLew 0:80ee8f3b695e 1931 */
EricLew 0:80ee8f3b695e 1932
EricLew 0:80ee8f3b695e 1933 #endif /* HAL_SMBUS_MODULE_ENABLED */
EricLew 0:80ee8f3b695e 1934 /**
EricLew 0:80ee8f3b695e 1935 * @}
EricLew 0:80ee8f3b695e 1936 */
EricLew 0:80ee8f3b695e 1937
EricLew 0:80ee8f3b695e 1938 /**
EricLew 0:80ee8f3b695e 1939 * @}
EricLew 0:80ee8f3b695e 1940 */
EricLew 0:80ee8f3b695e 1941
EricLew 0:80ee8f3b695e 1942 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
EricLew 0:80ee8f3b695e 1943