Eric Lewiston / STM32L4xx_HAL_Driver

Hal Drivers for L4

Dependents:   BSP OneHopeOnePrayer FINAL_AUDIO_RECORD AudioDemo

Fork of STM32L4xx_HAL_Driver by Senior Design: Sound Monitor

Inc/stm32l4xx_ll_exti.h@0:80ee8f3b695e, 2015-11-02 (annotated)

Committer:
EricLew
Date:
Mon Nov 02 19:37:23 2015 +0000
Revision:
0:80ee8f3b695e
Errors are with definitions of LCD and QSPI functions. I believe all .h and .c files are  uploaded, but there may need to be certain functions called.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
EricLew 0:80ee8f3b695e 1 /**
EricLew 0:80ee8f3b695e 2 ******************************************************************************
EricLew 0:80ee8f3b695e 3 * @file stm32l4xx_ll_exti.h
EricLew 0:80ee8f3b695e 4 * @author MCD Application Team
EricLew 0:80ee8f3b695e 5 * @version V1.1.0
EricLew 0:80ee8f3b695e 6 * @date 16-September-2015
EricLew 0:80ee8f3b695e 7 * @brief Header file of EXTI LL module.
EricLew 0:80ee8f3b695e 8 ******************************************************************************
EricLew 0:80ee8f3b695e 9 * @attention
EricLew 0:80ee8f3b695e 10 *
EricLew 0:80ee8f3b695e 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
EricLew 0:80ee8f3b695e 12 *
EricLew 0:80ee8f3b695e 13 * Redistribution and use in source and binary forms, with or without modification,
EricLew 0:80ee8f3b695e 14 * are permitted provided that the following conditions are met:
EricLew 0:80ee8f3b695e 15 * 1. Redistributions of source code must retain the above copyright notice,
EricLew 0:80ee8f3b695e 16 * this list of conditions and the following disclaimer.
EricLew 0:80ee8f3b695e 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
EricLew 0:80ee8f3b695e 18 * this list of conditions and the following disclaimer in the documentation
EricLew 0:80ee8f3b695e 19 * and/or other materials provided with the distribution.
EricLew 0:80ee8f3b695e 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
EricLew 0:80ee8f3b695e 21 * may be used to endorse or promote products derived from this software
EricLew 0:80ee8f3b695e 22 * without specific prior written permission.
EricLew 0:80ee8f3b695e 23 *
EricLew 0:80ee8f3b695e 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
EricLew 0:80ee8f3b695e 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
EricLew 0:80ee8f3b695e 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
EricLew 0:80ee8f3b695e 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
EricLew 0:80ee8f3b695e 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
EricLew 0:80ee8f3b695e 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
EricLew 0:80ee8f3b695e 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
EricLew 0:80ee8f3b695e 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
EricLew 0:80ee8f3b695e 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
EricLew 0:80ee8f3b695e 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
EricLew 0:80ee8f3b695e 34 *
EricLew 0:80ee8f3b695e 35 ******************************************************************************
EricLew 0:80ee8f3b695e 36 */
EricLew 0:80ee8f3b695e 37
EricLew 0:80ee8f3b695e 38 /* Define to prevent recursive inclusion -------------------------------------*/
EricLew 0:80ee8f3b695e 39 #ifndef __STM32L4xx_LL_EXTI_H
EricLew 0:80ee8f3b695e 40 #define __STM32L4xx_LL_EXTI_H
EricLew 0:80ee8f3b695e 41
EricLew 0:80ee8f3b695e 42 #ifdef __cplusplus
EricLew 0:80ee8f3b695e 43 extern "C" {
EricLew 0:80ee8f3b695e 44 #endif
EricLew 0:80ee8f3b695e 45
EricLew 0:80ee8f3b695e 46 /* Includes ------------------------------------------------------------------*/
EricLew 0:80ee8f3b695e 47 #include "stm32l4xx.h"
EricLew 0:80ee8f3b695e 48
EricLew 0:80ee8f3b695e 49 /** @addtogroup STM32L4xx_LL_Driver
EricLew 0:80ee8f3b695e 50 * @{
EricLew 0:80ee8f3b695e 51 */
EricLew 0:80ee8f3b695e 52
EricLew 0:80ee8f3b695e 53 #if defined (EXTI)
EricLew 0:80ee8f3b695e 54
EricLew 0:80ee8f3b695e 55 /** @defgroup EXTI_LL EXTI
EricLew 0:80ee8f3b695e 56 * @{
EricLew 0:80ee8f3b695e 57 */
EricLew 0:80ee8f3b695e 58
EricLew 0:80ee8f3b695e 59 /* Private types -------------------------------------------------------------*/
EricLew 0:80ee8f3b695e 60 /* Private variables ---------------------------------------------------------*/
EricLew 0:80ee8f3b695e 61
EricLew 0:80ee8f3b695e 62 /* Private constants ---------------------------------------------------------*/
EricLew 0:80ee8f3b695e 63
EricLew 0:80ee8f3b695e 64 /* Private macros ------------------------------------------------------------*/
EricLew 0:80ee8f3b695e 65
EricLew 0:80ee8f3b695e 66 /* Exported types ------------------------------------------------------------*/
EricLew 0:80ee8f3b695e 67 /* Exported constants --------------------------------------------------------*/
EricLew 0:80ee8f3b695e 68 /** @defgroup EXTI_LL_Exported_Constants EXTI Exported Constants
EricLew 0:80ee8f3b695e 69 * @{
EricLew 0:80ee8f3b695e 70 */
EricLew 0:80ee8f3b695e 71
EricLew 0:80ee8f3b695e 72 /** @defgroup EXTI_LL_EC_LINE LINE
EricLew 0:80ee8f3b695e 73 * @{
EricLew 0:80ee8f3b695e 74 */
EricLew 0:80ee8f3b695e 75 #define LL_EXTI_LINE_0 EXTI_IMR1_IM0 /*!< Extended line 0 */
EricLew 0:80ee8f3b695e 76 #define LL_EXTI_LINE_1 EXTI_IMR1_IM1 /*!< Extended line 1 */
EricLew 0:80ee8f3b695e 77 #define LL_EXTI_LINE_2 EXTI_IMR1_IM2 /*!< Extended line 2 */
EricLew 0:80ee8f3b695e 78 #define LL_EXTI_LINE_3 EXTI_IMR1_IM3 /*!< Extended line 3 */
EricLew 0:80ee8f3b695e 79 #define LL_EXTI_LINE_4 EXTI_IMR1_IM4 /*!< Extended line 4 */
EricLew 0:80ee8f3b695e 80 #define LL_EXTI_LINE_5 EXTI_IMR1_IM5 /*!< Extended line 5 */
EricLew 0:80ee8f3b695e 81 #define LL_EXTI_LINE_6 EXTI_IMR1_IM6 /*!< Extended line 6 */
EricLew 0:80ee8f3b695e 82 #define LL_EXTI_LINE_7 EXTI_IMR1_IM7 /*!< Extended line 7 */
EricLew 0:80ee8f3b695e 83 #define LL_EXTI_LINE_8 EXTI_IMR1_IM8 /*!< Extended line 8 */
EricLew 0:80ee8f3b695e 84 #define LL_EXTI_LINE_9 EXTI_IMR1_IM9 /*!< Extended line 9 */
EricLew 0:80ee8f3b695e 85 #define LL_EXTI_LINE_10 EXTI_IMR1_IM10 /*!< Extended line 10 */
EricLew 0:80ee8f3b695e 86 #define LL_EXTI_LINE_11 EXTI_IMR1_IM11 /*!< Extended line 11 */
EricLew 0:80ee8f3b695e 87 #define LL_EXTI_LINE_12 EXTI_IMR1_IM12 /*!< Extended line 12 */
EricLew 0:80ee8f3b695e 88 #define LL_EXTI_LINE_13 EXTI_IMR1_IM13 /*!< Extended line 13 */
EricLew 0:80ee8f3b695e 89 #define LL_EXTI_LINE_14 EXTI_IMR1_IM14 /*!< Extended line 14 */
EricLew 0:80ee8f3b695e 90 #define LL_EXTI_LINE_15 EXTI_IMR1_IM15 /*!< Extended line 15 */
EricLew 0:80ee8f3b695e 91 #define LL_EXTI_LINE_16 EXTI_IMR1_IM16 /*!< Extended line 16 */
EricLew 0:80ee8f3b695e 92 #define LL_EXTI_LINE_17 EXTI_IMR1_IM17 /*!< Extended line 17 */
EricLew 0:80ee8f3b695e 93 #define LL_EXTI_LINE_18 EXTI_IMR1_IM18 /*!< Extended line 18 */
EricLew 0:80ee8f3b695e 94 #define LL_EXTI_LINE_19 EXTI_IMR1_IM19 /*!< Extended line 19 */
EricLew 0:80ee8f3b695e 95 #define LL_EXTI_LINE_20 EXTI_IMR1_IM20 /*!< Extended line 20 */
EricLew 0:80ee8f3b695e 96 #define LL_EXTI_LINE_21 EXTI_IMR1_IM21 /*!< Extended line 21 */
EricLew 0:80ee8f3b695e 97 #define LL_EXTI_LINE_22 EXTI_IMR1_IM22 /*!< Extended line 22 */
EricLew 0:80ee8f3b695e 98 #define LL_EXTI_LINE_23 EXTI_IMR1_IM23 /*!< Extended line 23 */
EricLew 0:80ee8f3b695e 99 #define LL_EXTI_LINE_24 EXTI_IMR1_IM24 /*!< Extended line 24 */
EricLew 0:80ee8f3b695e 100 #define LL_EXTI_LINE_25 EXTI_IMR1_IM25 /*!< Extended line 25 */
EricLew 0:80ee8f3b695e 101 #define LL_EXTI_LINE_26 EXTI_IMR1_IM26 /*!< Extended line 26 */
EricLew 0:80ee8f3b695e 102 #define LL_EXTI_LINE_27 EXTI_IMR1_IM27 /*!< Extended line 27 */
EricLew 0:80ee8f3b695e 103 #define LL_EXTI_LINE_28 EXTI_IMR1_IM28 /*!< Extended line 28 */
EricLew 0:80ee8f3b695e 104 #define LL_EXTI_LINE_29 EXTI_IMR1_IM29 /*!< Extended line 29 */
EricLew 0:80ee8f3b695e 105 #define LL_EXTI_LINE_30 EXTI_IMR1_IM30 /*!< Extended line 30 */
EricLew 0:80ee8f3b695e 106 #define LL_EXTI_LINE_31 EXTI_IMR1_IM31 /*!< Extended line 31 */
EricLew 0:80ee8f3b695e 107 #define LL_EXTI_LINE_ALL_0_31 ((uint32_t)0xFFFFFFFF) /*!< All Extended line */
EricLew 0:80ee8f3b695e 108
EricLew 0:80ee8f3b695e 109
EricLew 0:80ee8f3b695e 110 /**
EricLew 0:80ee8f3b695e 111 * @}
EricLew 0:80ee8f3b695e 112 */
EricLew 0:80ee8f3b695e 113
EricLew 0:80ee8f3b695e 114 /** @addtogroup EXTI_LL_EC_LINE
EricLew 0:80ee8f3b695e 115 * @{
EricLew 0:80ee8f3b695e 116 */
EricLew 0:80ee8f3b695e 117 #define LL_EXTI_LINE_32 EXTI_IMR2_IM32 /*!< Extended line 32 */
EricLew 0:80ee8f3b695e 118 #define LL_EXTI_LINE_33 EXTI_IMR2_IM33 /*!< Extended line 33 */
EricLew 0:80ee8f3b695e 119 #define LL_EXTI_LINE_34 EXTI_IMR2_IM34 /*!< Extended line 34 */
EricLew 0:80ee8f3b695e 120 #define LL_EXTI_LINE_35 EXTI_IMR2_IM35 /*!< Extended line 35 */
EricLew 0:80ee8f3b695e 121 #define LL_EXTI_LINE_36 EXTI_IMR2_IM36 /*!< Extended line 36 */
EricLew 0:80ee8f3b695e 122 #define LL_EXTI_LINE_37 EXTI_IMR2_IM37 /*!< Extended line 37 */
EricLew 0:80ee8f3b695e 123 #define LL_EXTI_LINE_38 EXTI_IMR2_IM38 /*!< Extended line 38 */
EricLew 0:80ee8f3b695e 124 #define LL_EXTI_LINE_39 EXTI_IMR2_IM39 /*!< Extended line 39 */
EricLew 0:80ee8f3b695e 125 #define LL_EXTI_LINE_ALL_32_63 ((uint32_t)0x000000FF) /*!< All Extended line */
EricLew 0:80ee8f3b695e 126 /**
EricLew 0:80ee8f3b695e 127 * @}
EricLew 0:80ee8f3b695e 128 */
EricLew 0:80ee8f3b695e 129
EricLew 0:80ee8f3b695e 130 /** @addtogroup EXTI_LL_EC_LINE
EricLew 0:80ee8f3b695e 131 * @{
EricLew 0:80ee8f3b695e 132 */
EricLew 0:80ee8f3b695e 133 #define LL_EXTI_LINE_ALL ((uint32_t)0xFFFFFFFF) /*!< All Extended line */
EricLew 0:80ee8f3b695e 134 /**
EricLew 0:80ee8f3b695e 135 * @}
EricLew 0:80ee8f3b695e 136 */
EricLew 0:80ee8f3b695e 137
EricLew 0:80ee8f3b695e 138 /**
EricLew 0:80ee8f3b695e 139 * @}
EricLew 0:80ee8f3b695e 140 */
EricLew 0:80ee8f3b695e 141
EricLew 0:80ee8f3b695e 142 /* Exported macro ------------------------------------------------------------*/
EricLew 0:80ee8f3b695e 143 /** @defgroup EXTI_LL_Exported_Macros EXTI Exported Macros
EricLew 0:80ee8f3b695e 144 * @{
EricLew 0:80ee8f3b695e 145 */
EricLew 0:80ee8f3b695e 146
EricLew 0:80ee8f3b695e 147 /** @defgroup EXTI_LL_EM_WRITE_READ Common Write and read registers Macros
EricLew 0:80ee8f3b695e 148 * @{
EricLew 0:80ee8f3b695e 149 */
EricLew 0:80ee8f3b695e 150
EricLew 0:80ee8f3b695e 151 /**
EricLew 0:80ee8f3b695e 152 * @brief Write a value in EXTI register
EricLew 0:80ee8f3b695e 153 * @param __REG__ Register to be written
EricLew 0:80ee8f3b695e 154 * @param __VALUE__ Value to be written in the register
EricLew 0:80ee8f3b695e 155 * @retval None
EricLew 0:80ee8f3b695e 156 */
EricLew 0:80ee8f3b695e 157 #define LL_EXTI_WriteReg(__REG__, __VALUE__) WRITE_REG(EXTI->__REG__, (__VALUE__))
EricLew 0:80ee8f3b695e 158
EricLew 0:80ee8f3b695e 159 /**
EricLew 0:80ee8f3b695e 160 * @brief Read a value in EXTI register
EricLew 0:80ee8f3b695e 161 * @param __REG__ Register to be read
EricLew 0:80ee8f3b695e 162 * @retval Register value
EricLew 0:80ee8f3b695e 163 */
EricLew 0:80ee8f3b695e 164 #define LL_EXTI_ReadReg(__REG__) READ_REG(EXTI->__REG__)
EricLew 0:80ee8f3b695e 165 /**
EricLew 0:80ee8f3b695e 166 * @}
EricLew 0:80ee8f3b695e 167 */
EricLew 0:80ee8f3b695e 168
EricLew 0:80ee8f3b695e 169
EricLew 0:80ee8f3b695e 170 /**
EricLew 0:80ee8f3b695e 171 * @}
EricLew 0:80ee8f3b695e 172 */
EricLew 0:80ee8f3b695e 173
EricLew 0:80ee8f3b695e 174
EricLew 0:80ee8f3b695e 175
EricLew 0:80ee8f3b695e 176 /* Exported functions --------------------------------------------------------*/
EricLew 0:80ee8f3b695e 177 /** @defgroup EXTI_LL_Exported_Functions EXTI Exported Functions
EricLew 0:80ee8f3b695e 178 * @{
EricLew 0:80ee8f3b695e 179 */
EricLew 0:80ee8f3b695e 180 /** @defgroup EXTI_LL_EF_IT_Management IT_Management
EricLew 0:80ee8f3b695e 181 * @{
EricLew 0:80ee8f3b695e 182 */
EricLew 0:80ee8f3b695e 183
EricLew 0:80ee8f3b695e 184 /**
EricLew 0:80ee8f3b695e 185 * @brief Enable ExtiLine Interrupt request for Lines in range 0 to 31
EricLew 0:80ee8f3b695e 186 * @note The reset value for the direct lines (line 17, lines from 23 to 31)
EricLew 0:80ee8f3b695e 187 * is set to 1 in order to enable the interrupt by default.
EricLew 0:80ee8f3b695e 188 * Bits are set automatically at Power on.
EricLew 0:80ee8f3b695e 189 * @rmtoll IMR1 IMx LL_EXTI_EnableIT_0_31
EricLew 0:80ee8f3b695e 190 * @param ExtiLine This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 191 * @arg @ref LL_EXTI_LINE_0
EricLew 0:80ee8f3b695e 192 * @arg @ref LL_EXTI_LINE_1
EricLew 0:80ee8f3b695e 193 * @arg @ref LL_EXTI_LINE_2
EricLew 0:80ee8f3b695e 194 * @arg @ref LL_EXTI_LINE_3
EricLew 0:80ee8f3b695e 195 * @arg @ref LL_EXTI_LINE_4
EricLew 0:80ee8f3b695e 196 * @arg @ref LL_EXTI_LINE_5
EricLew 0:80ee8f3b695e 197 * @arg @ref LL_EXTI_LINE_6
EricLew 0:80ee8f3b695e 198 * @arg @ref LL_EXTI_LINE_7
EricLew 0:80ee8f3b695e 199 * @arg @ref LL_EXTI_LINE_8
EricLew 0:80ee8f3b695e 200 * @arg @ref LL_EXTI_LINE_9
EricLew 0:80ee8f3b695e 201 * @arg @ref LL_EXTI_LINE_10
EricLew 0:80ee8f3b695e 202 * @arg @ref LL_EXTI_LINE_11
EricLew 0:80ee8f3b695e 203 * @arg @ref LL_EXTI_LINE_12
EricLew 0:80ee8f3b695e 204 * @arg @ref LL_EXTI_LINE_13
EricLew 0:80ee8f3b695e 205 * @arg @ref LL_EXTI_LINE_14
EricLew 0:80ee8f3b695e 206 * @arg @ref LL_EXTI_LINE_15
EricLew 0:80ee8f3b695e 207 * @arg @ref LL_EXTI_LINE_16
EricLew 0:80ee8f3b695e 208 * @arg @ref LL_EXTI_LINE_17
EricLew 0:80ee8f3b695e 209 * @arg @ref LL_EXTI_LINE_18
EricLew 0:80ee8f3b695e 210 * @arg @ref LL_EXTI_LINE_19
EricLew 0:80ee8f3b695e 211 * @arg @ref LL_EXTI_LINE_20
EricLew 0:80ee8f3b695e 212 * @arg @ref LL_EXTI_LINE_21
EricLew 0:80ee8f3b695e 213 * @arg @ref LL_EXTI_LINE_22
EricLew 0:80ee8f3b695e 214 * @arg @ref LL_EXTI_LINE_23
EricLew 0:80ee8f3b695e 215 * @arg @ref LL_EXTI_LINE_24
EricLew 0:80ee8f3b695e 216 * @arg @ref LL_EXTI_LINE_25
EricLew 0:80ee8f3b695e 217 * @arg @ref LL_EXTI_LINE_26
EricLew 0:80ee8f3b695e 218 * @arg @ref LL_EXTI_LINE_27
EricLew 0:80ee8f3b695e 219 * @arg @ref LL_EXTI_LINE_28
EricLew 0:80ee8f3b695e 220 * @arg @ref LL_EXTI_LINE_29
EricLew 0:80ee8f3b695e 221 * @arg @ref LL_EXTI_LINE_30
EricLew 0:80ee8f3b695e 222 * @arg @ref LL_EXTI_LINE_31
EricLew 0:80ee8f3b695e 223 * @arg @ref LL_EXTI_LINE_ALL_0_31
EricLew 0:80ee8f3b695e 224 * @retval None
EricLew 0:80ee8f3b695e 225 */
EricLew 0:80ee8f3b695e 226 __STATIC_INLINE void LL_EXTI_EnableIT_0_31(uint32_t ExtiLine)
EricLew 0:80ee8f3b695e 227 {
EricLew 0:80ee8f3b695e 228 SET_BIT(EXTI->IMR1, ExtiLine);
EricLew 0:80ee8f3b695e 229 }
EricLew 0:80ee8f3b695e 230 /**
EricLew 0:80ee8f3b695e 231 * @brief Enable ExtiLine Interrupt request for Lines in range 32 to 63
EricLew 0:80ee8f3b695e 232 * @note The reset value for the direct lines (lines from 32 to 34, line
EricLew 0:80ee8f3b695e 233 * 39) is set to 1 in order to enable the interrupt by default.
EricLew 0:80ee8f3b695e 234 * Bits are set automatically at Power on.
EricLew 0:80ee8f3b695e 235 * @rmtoll IMR2 IMx LL_EXTI_EnableIT_32_63
EricLew 0:80ee8f3b695e 236 * @param ExtiLine This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 237 * @arg @ref LL_EXTI_LINE_32
EricLew 0:80ee8f3b695e 238 * @arg @ref LL_EXTI_LINE_33
EricLew 0:80ee8f3b695e 239 * @arg @ref LL_EXTI_LINE_34
EricLew 0:80ee8f3b695e 240 * @arg @ref LL_EXTI_LINE_35
EricLew 0:80ee8f3b695e 241 * @arg @ref LL_EXTI_LINE_36
EricLew 0:80ee8f3b695e 242 * @arg @ref LL_EXTI_LINE_37
EricLew 0:80ee8f3b695e 243 * @arg @ref LL_EXTI_LINE_38
EricLew 0:80ee8f3b695e 244 * @arg @ref LL_EXTI_LINE_39
EricLew 0:80ee8f3b695e 245 * @arg @ref LL_EXTI_LINE_ALL_32_63
EricLew 0:80ee8f3b695e 246 * @retval None
EricLew 0:80ee8f3b695e 247 */
EricLew 0:80ee8f3b695e 248 __STATIC_INLINE void LL_EXTI_EnableIT_32_63(uint32_t ExtiLine)
EricLew 0:80ee8f3b695e 249 {
EricLew 0:80ee8f3b695e 250 SET_BIT(EXTI->IMR2, ExtiLine);
EricLew 0:80ee8f3b695e 251 }
EricLew 0:80ee8f3b695e 252
EricLew 0:80ee8f3b695e 253 /**
EricLew 0:80ee8f3b695e 254 * @brief Disable ExtiLine Interrupt request for Lines in range 0 to 31
EricLew 0:80ee8f3b695e 255 * @note The reset value for the direct lines (line 17, lines from 23 to 31)
EricLew 0:80ee8f3b695e 256 * is set to 1 in order to enable the interrupt by default.
EricLew 0:80ee8f3b695e 257 * Bits are set automatically at Power on.
EricLew 0:80ee8f3b695e 258 * @rmtoll IMR1 IMx LL_EXTI_DisableIT_0_31
EricLew 0:80ee8f3b695e 259 * @param ExtiLine This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 260 * @arg @ref LL_EXTI_LINE_0
EricLew 0:80ee8f3b695e 261 * @arg @ref LL_EXTI_LINE_1
EricLew 0:80ee8f3b695e 262 * @arg @ref LL_EXTI_LINE_2
EricLew 0:80ee8f3b695e 263 * @arg @ref LL_EXTI_LINE_3
EricLew 0:80ee8f3b695e 264 * @arg @ref LL_EXTI_LINE_4
EricLew 0:80ee8f3b695e 265 * @arg @ref LL_EXTI_LINE_5
EricLew 0:80ee8f3b695e 266 * @arg @ref LL_EXTI_LINE_6
EricLew 0:80ee8f3b695e 267 * @arg @ref LL_EXTI_LINE_7
EricLew 0:80ee8f3b695e 268 * @arg @ref LL_EXTI_LINE_8
EricLew 0:80ee8f3b695e 269 * @arg @ref LL_EXTI_LINE_9
EricLew 0:80ee8f3b695e 270 * @arg @ref LL_EXTI_LINE_10
EricLew 0:80ee8f3b695e 271 * @arg @ref LL_EXTI_LINE_11
EricLew 0:80ee8f3b695e 272 * @arg @ref LL_EXTI_LINE_12
EricLew 0:80ee8f3b695e 273 * @arg @ref LL_EXTI_LINE_13
EricLew 0:80ee8f3b695e 274 * @arg @ref LL_EXTI_LINE_14
EricLew 0:80ee8f3b695e 275 * @arg @ref LL_EXTI_LINE_15
EricLew 0:80ee8f3b695e 276 * @arg @ref LL_EXTI_LINE_16
EricLew 0:80ee8f3b695e 277 * @arg @ref LL_EXTI_LINE_17
EricLew 0:80ee8f3b695e 278 * @arg @ref LL_EXTI_LINE_18
EricLew 0:80ee8f3b695e 279 * @arg @ref LL_EXTI_LINE_19
EricLew 0:80ee8f3b695e 280 * @arg @ref LL_EXTI_LINE_20
EricLew 0:80ee8f3b695e 281 * @arg @ref LL_EXTI_LINE_21
EricLew 0:80ee8f3b695e 282 * @arg @ref LL_EXTI_LINE_22
EricLew 0:80ee8f3b695e 283 * @arg @ref LL_EXTI_LINE_23
EricLew 0:80ee8f3b695e 284 * @arg @ref LL_EXTI_LINE_24
EricLew 0:80ee8f3b695e 285 * @arg @ref LL_EXTI_LINE_25
EricLew 0:80ee8f3b695e 286 * @arg @ref LL_EXTI_LINE_26
EricLew 0:80ee8f3b695e 287 * @arg @ref LL_EXTI_LINE_27
EricLew 0:80ee8f3b695e 288 * @arg @ref LL_EXTI_LINE_28
EricLew 0:80ee8f3b695e 289 * @arg @ref LL_EXTI_LINE_29
EricLew 0:80ee8f3b695e 290 * @arg @ref LL_EXTI_LINE_30
EricLew 0:80ee8f3b695e 291 * @arg @ref LL_EXTI_LINE_31
EricLew 0:80ee8f3b695e 292 * @arg @ref LL_EXTI_LINE_ALL_0_31
EricLew 0:80ee8f3b695e 293 * @retval None
EricLew 0:80ee8f3b695e 294 */
EricLew 0:80ee8f3b695e 295 __STATIC_INLINE void LL_EXTI_DisableIT_0_31(uint32_t ExtiLine)
EricLew 0:80ee8f3b695e 296 {
EricLew 0:80ee8f3b695e 297 CLEAR_BIT(EXTI->IMR1, ExtiLine);
EricLew 0:80ee8f3b695e 298 }
EricLew 0:80ee8f3b695e 299
EricLew 0:80ee8f3b695e 300 /**
EricLew 0:80ee8f3b695e 301 * @brief Disable ExtiLine Interrupt request for Lines in range 32 to 63
EricLew 0:80ee8f3b695e 302 * @note The reset value for the direct lines (lines from 32 to 34, line
EricLew 0:80ee8f3b695e 303 * 39) is set to 1 in order to enable the interrupt by default.
EricLew 0:80ee8f3b695e 304 * Bits are set automatically at Power on.
EricLew 0:80ee8f3b695e 305 * @rmtoll IMR2 IMx LL_EXTI_DisableIT_32_63
EricLew 0:80ee8f3b695e 306 * @param ExtiLine This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 307 * @arg @ref LL_EXTI_LINE_32
EricLew 0:80ee8f3b695e 308 * @arg @ref LL_EXTI_LINE_33
EricLew 0:80ee8f3b695e 309 * @arg @ref LL_EXTI_LINE_34
EricLew 0:80ee8f3b695e 310 * @arg @ref LL_EXTI_LINE_35
EricLew 0:80ee8f3b695e 311 * @arg @ref LL_EXTI_LINE_36
EricLew 0:80ee8f3b695e 312 * @arg @ref LL_EXTI_LINE_37
EricLew 0:80ee8f3b695e 313 * @arg @ref LL_EXTI_LINE_38
EricLew 0:80ee8f3b695e 314 * @arg @ref LL_EXTI_LINE_39
EricLew 0:80ee8f3b695e 315 * @arg @ref LL_EXTI_LINE_ALL_32_63
EricLew 0:80ee8f3b695e 316 * @retval None
EricLew 0:80ee8f3b695e 317 */
EricLew 0:80ee8f3b695e 318 __STATIC_INLINE void LL_EXTI_DisableIT_32_63(uint32_t ExtiLine)
EricLew 0:80ee8f3b695e 319 {
EricLew 0:80ee8f3b695e 320 CLEAR_BIT(EXTI->IMR2, ExtiLine);
EricLew 0:80ee8f3b695e 321 }
EricLew 0:80ee8f3b695e 322
EricLew 0:80ee8f3b695e 323 /**
EricLew 0:80ee8f3b695e 324 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 0 to 31
EricLew 0:80ee8f3b695e 325 * @note The reset value for the direct lines (line 17, lines from 23 to 31)
EricLew 0:80ee8f3b695e 326 * is set to 1 in order to enable the interrupt by default.
EricLew 0:80ee8f3b695e 327 * Bits are set automatically at Power on.
EricLew 0:80ee8f3b695e 328 * @rmtoll IMR1 IMx LL_EXTI_IsEnabledIT_0_31
EricLew 0:80ee8f3b695e 329 * @param ExtiLine This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 330 * @arg @ref LL_EXTI_LINE_0
EricLew 0:80ee8f3b695e 331 * @arg @ref LL_EXTI_LINE_1
EricLew 0:80ee8f3b695e 332 * @arg @ref LL_EXTI_LINE_2
EricLew 0:80ee8f3b695e 333 * @arg @ref LL_EXTI_LINE_3
EricLew 0:80ee8f3b695e 334 * @arg @ref LL_EXTI_LINE_4
EricLew 0:80ee8f3b695e 335 * @arg @ref LL_EXTI_LINE_5
EricLew 0:80ee8f3b695e 336 * @arg @ref LL_EXTI_LINE_6
EricLew 0:80ee8f3b695e 337 * @arg @ref LL_EXTI_LINE_7
EricLew 0:80ee8f3b695e 338 * @arg @ref LL_EXTI_LINE_8
EricLew 0:80ee8f3b695e 339 * @arg @ref LL_EXTI_LINE_9
EricLew 0:80ee8f3b695e 340 * @arg @ref LL_EXTI_LINE_10
EricLew 0:80ee8f3b695e 341 * @arg @ref LL_EXTI_LINE_11
EricLew 0:80ee8f3b695e 342 * @arg @ref LL_EXTI_LINE_12
EricLew 0:80ee8f3b695e 343 * @arg @ref LL_EXTI_LINE_13
EricLew 0:80ee8f3b695e 344 * @arg @ref LL_EXTI_LINE_14
EricLew 0:80ee8f3b695e 345 * @arg @ref LL_EXTI_LINE_15
EricLew 0:80ee8f3b695e 346 * @arg @ref LL_EXTI_LINE_16
EricLew 0:80ee8f3b695e 347 * @arg @ref LL_EXTI_LINE_17
EricLew 0:80ee8f3b695e 348 * @arg @ref LL_EXTI_LINE_18
EricLew 0:80ee8f3b695e 349 * @arg @ref LL_EXTI_LINE_19
EricLew 0:80ee8f3b695e 350 * @arg @ref LL_EXTI_LINE_20
EricLew 0:80ee8f3b695e 351 * @arg @ref LL_EXTI_LINE_21
EricLew 0:80ee8f3b695e 352 * @arg @ref LL_EXTI_LINE_22
EricLew 0:80ee8f3b695e 353 * @arg @ref LL_EXTI_LINE_23
EricLew 0:80ee8f3b695e 354 * @arg @ref LL_EXTI_LINE_24
EricLew 0:80ee8f3b695e 355 * @arg @ref LL_EXTI_LINE_25
EricLew 0:80ee8f3b695e 356 * @arg @ref LL_EXTI_LINE_26
EricLew 0:80ee8f3b695e 357 * @arg @ref LL_EXTI_LINE_27
EricLew 0:80ee8f3b695e 358 * @arg @ref LL_EXTI_LINE_28
EricLew 0:80ee8f3b695e 359 * @arg @ref LL_EXTI_LINE_29
EricLew 0:80ee8f3b695e 360 * @arg @ref LL_EXTI_LINE_30
EricLew 0:80ee8f3b695e 361 * @arg @ref LL_EXTI_LINE_31
EricLew 0:80ee8f3b695e 362 * @arg @ref LL_EXTI_LINE_ALL_0_31
EricLew 0:80ee8f3b695e 363 * @retval State of bit (1 or 0).
EricLew 0:80ee8f3b695e 364 */
EricLew 0:80ee8f3b695e 365 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_0_31(uint32_t ExtiLine)
EricLew 0:80ee8f3b695e 366 {
EricLew 0:80ee8f3b695e 367 return (READ_BIT(EXTI->IMR1, ExtiLine) == (ExtiLine));
EricLew 0:80ee8f3b695e 368 }
EricLew 0:80ee8f3b695e 369
EricLew 0:80ee8f3b695e 370 /**
EricLew 0:80ee8f3b695e 371 * @brief Indicate if ExtiLine Interrupt request is enabled for Lines in range 32 to 63
EricLew 0:80ee8f3b695e 372 * @note The reset value for the direct lines (lines from 32 to 34, line
EricLew 0:80ee8f3b695e 373 * 39) is set to 1 in order to enable the interrupt by default.
EricLew 0:80ee8f3b695e 374 * Bits are set automatically at Power on.
EricLew 0:80ee8f3b695e 375 * @rmtoll IMR2 IMx LL_EXTI_IsEnabledIT_32_63
EricLew 0:80ee8f3b695e 376 * @param ExtiLine This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 377 * @arg @ref LL_EXTI_LINE_32
EricLew 0:80ee8f3b695e 378 * @arg @ref LL_EXTI_LINE_33
EricLew 0:80ee8f3b695e 379 * @arg @ref LL_EXTI_LINE_34
EricLew 0:80ee8f3b695e 380 * @arg @ref LL_EXTI_LINE_35
EricLew 0:80ee8f3b695e 381 * @arg @ref LL_EXTI_LINE_36
EricLew 0:80ee8f3b695e 382 * @arg @ref LL_EXTI_LINE_37
EricLew 0:80ee8f3b695e 383 * @arg @ref LL_EXTI_LINE_38
EricLew 0:80ee8f3b695e 384 * @arg @ref LL_EXTI_LINE_39
EricLew 0:80ee8f3b695e 385 * @arg @ref LL_EXTI_LINE_ALL_32_63
EricLew 0:80ee8f3b695e 386 * @retval State of bit (1 or 0).
EricLew 0:80ee8f3b695e 387 */
EricLew 0:80ee8f3b695e 388 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledIT_32_63(uint32_t ExtiLine)
EricLew 0:80ee8f3b695e 389 {
EricLew 0:80ee8f3b695e 390 return (READ_BIT(EXTI->IMR2, ExtiLine) == (ExtiLine));
EricLew 0:80ee8f3b695e 391 }
EricLew 0:80ee8f3b695e 392
EricLew 0:80ee8f3b695e 393 /**
EricLew 0:80ee8f3b695e 394 * @}
EricLew 0:80ee8f3b695e 395 */
EricLew 0:80ee8f3b695e 396
EricLew 0:80ee8f3b695e 397 /** @defgroup EXTI_LL_EF_Event_Management Event_Management
EricLew 0:80ee8f3b695e 398 * @{
EricLew 0:80ee8f3b695e 399 */
EricLew 0:80ee8f3b695e 400
EricLew 0:80ee8f3b695e 401 /**
EricLew 0:80ee8f3b695e 402 * @brief Enable ExtiLine Event request for Lines in range 0 to 31
EricLew 0:80ee8f3b695e 403 * @rmtoll EMR1 EMx LL_EXTI_EnableEvent_0_31
EricLew 0:80ee8f3b695e 404 * @param ExtiLine This parameter can be a combination of the following values:
EricLew 0:80ee8f3b695e 405 * @arg @ref LL_EXTI_LINE_0
EricLew 0:80ee8f3b695e 406 * @arg @ref LL_EXTI_LINE_1
EricLew 0:80ee8f3b695e 407 * @arg @ref LL_EXTI_LINE_2
EricLew 0:80ee8f3b695e 408 * @arg @ref LL_EXTI_LINE_3
EricLew 0:80ee8f3b695e 409 * @arg @ref LL_EXTI_LINE_4
EricLew 0:80ee8f3b695e 410 * @arg @ref LL_EXTI_LINE_5
EricLew 0:80ee8f3b695e 411 * @arg @ref LL_EXTI_LINE_6
EricLew 0:80ee8f3b695e 412 * @arg @ref LL_EXTI_LINE_7
EricLew 0:80ee8f3b695e 413 * @arg @ref LL_EXTI_LINE_8
EricLew 0:80ee8f3b695e 414 * @arg @ref LL_EXTI_LINE_9
EricLew 0:80ee8f3b695e 415 * @arg @ref LL_EXTI_LINE_10
EricLew 0:80ee8f3b695e 416 * @arg @ref LL_EXTI_LINE_11
EricLew 0:80ee8f3b695e 417 * @arg @ref LL_EXTI_LINE_12
EricLew 0:80ee8f3b695e 418 * @arg @ref LL_EXTI_LINE_13
EricLew 0:80ee8f3b695e 419 * @arg @ref LL_EXTI_LINE_14
EricLew 0:80ee8f3b695e 420 * @arg @ref LL_EXTI_LINE_15
EricLew 0:80ee8f3b695e 421 * @arg @ref LL_EXTI_LINE_16
EricLew 0:80ee8f3b695e 422 * @arg @ref LL_EXTI_LINE_17
EricLew 0:80ee8f3b695e 423 * @arg @ref LL_EXTI_LINE_18
EricLew 0:80ee8f3b695e 424 * @arg @ref LL_EXTI_LINE_19
EricLew 0:80ee8f3b695e 425 * @arg @ref LL_EXTI_LINE_20
EricLew 0:80ee8f3b695e 426 * @arg @ref LL_EXTI_LINE_21
EricLew 0:80ee8f3b695e 427 * @arg @ref LL_EXTI_LINE_22
EricLew 0:80ee8f3b695e 428 * @arg @ref LL_EXTI_LINE_23
EricLew 0:80ee8f3b695e 429 * @arg @ref LL_EXTI_LINE_24
EricLew 0:80ee8f3b695e 430 * @arg @ref LL_EXTI_LINE_25
EricLew 0:80ee8f3b695e 431 * @arg @ref LL_EXTI_LINE_26
EricLew 0:80ee8f3b695e 432 * @arg @ref LL_EXTI_LINE_27
EricLew 0:80ee8f3b695e 433 * @arg @ref LL_EXTI_LINE_28
EricLew 0:80ee8f3b695e 434 * @arg @ref LL_EXTI_LINE_29
EricLew 0:80ee8f3b695e 435 * @arg @ref LL_EXTI_LINE_30
EricLew 0:80ee8f3b695e 436 * @arg @ref LL_EXTI_LINE_31
EricLew 0:80ee8f3b695e 437 * @arg @ref LL_EXTI_LINE_ALL_0_31
EricLew 0:80ee8f3b695e 438 * @retval None
EricLew 0:80ee8f3b695e 439 */
EricLew 0:80ee8f3b695e 440 __STATIC_INLINE void LL_EXTI_EnableEvent_0_31(uint32_t ExtiLine)
EricLew 0:80ee8f3b695e 441 {
EricLew 0:80ee8f3b695e 442 SET_BIT(EXTI->EMR1, ExtiLine);
EricLew 0:80ee8f3b695e 443
EricLew 0:80ee8f3b695e 444 }
EricLew 0:80ee8f3b695e 445
EricLew 0:80ee8f3b695e 446 /**
EricLew 0:80ee8f3b695e 447 * @brief Enable ExtiLine Event request for Lines in range 32 to 63
EricLew 0:80ee8f3b695e 448 * @rmtoll EMR2 EMx LL_EXTI_EnableEvent_32_63
EricLew 0:80ee8f3b695e 449 * @param ExtiLine This parameter can be a combination of the following values:
EricLew 0:80ee8f3b695e 450 * @arg @ref LL_EXTI_LINE_32
EricLew 0:80ee8f3b695e 451 * @arg @ref LL_EXTI_LINE_33
EricLew 0:80ee8f3b695e 452 * @arg @ref LL_EXTI_LINE_34
EricLew 0:80ee8f3b695e 453 * @arg @ref LL_EXTI_LINE_35
EricLew 0:80ee8f3b695e 454 * @arg @ref LL_EXTI_LINE_36
EricLew 0:80ee8f3b695e 455 * @arg @ref LL_EXTI_LINE_37
EricLew 0:80ee8f3b695e 456 * @arg @ref LL_EXTI_LINE_38
EricLew 0:80ee8f3b695e 457 * @arg @ref LL_EXTI_LINE_39
EricLew 0:80ee8f3b695e 458 * @arg @ref LL_EXTI_LINE_ALL_32_63
EricLew 0:80ee8f3b695e 459 * @retval None
EricLew 0:80ee8f3b695e 460 */
EricLew 0:80ee8f3b695e 461 __STATIC_INLINE void LL_EXTI_EnableEvent_32_63(uint32_t ExtiLine)
EricLew 0:80ee8f3b695e 462 {
EricLew 0:80ee8f3b695e 463 SET_BIT(EXTI->EMR2, ExtiLine);
EricLew 0:80ee8f3b695e 464 }
EricLew 0:80ee8f3b695e 465
EricLew 0:80ee8f3b695e 466 /**
EricLew 0:80ee8f3b695e 467 * @brief Disable ExtiLine Event request for Lines in range 0 to 31
EricLew 0:80ee8f3b695e 468 * @rmtoll EMR1 EMx LL_EXTI_DisableEvent_0_31
EricLew 0:80ee8f3b695e 469 * @param ExtiLine This parameter can be a combination of the following values:
EricLew 0:80ee8f3b695e 470 * @arg @ref LL_EXTI_LINE_0
EricLew 0:80ee8f3b695e 471 * @arg @ref LL_EXTI_LINE_1
EricLew 0:80ee8f3b695e 472 * @arg @ref LL_EXTI_LINE_2
EricLew 0:80ee8f3b695e 473 * @arg @ref LL_EXTI_LINE_3
EricLew 0:80ee8f3b695e 474 * @arg @ref LL_EXTI_LINE_4
EricLew 0:80ee8f3b695e 475 * @arg @ref LL_EXTI_LINE_5
EricLew 0:80ee8f3b695e 476 * @arg @ref LL_EXTI_LINE_6
EricLew 0:80ee8f3b695e 477 * @arg @ref LL_EXTI_LINE_7
EricLew 0:80ee8f3b695e 478 * @arg @ref LL_EXTI_LINE_8
EricLew 0:80ee8f3b695e 479 * @arg @ref LL_EXTI_LINE_9
EricLew 0:80ee8f3b695e 480 * @arg @ref LL_EXTI_LINE_10
EricLew 0:80ee8f3b695e 481 * @arg @ref LL_EXTI_LINE_11
EricLew 0:80ee8f3b695e 482 * @arg @ref LL_EXTI_LINE_12
EricLew 0:80ee8f3b695e 483 * @arg @ref LL_EXTI_LINE_13
EricLew 0:80ee8f3b695e 484 * @arg @ref LL_EXTI_LINE_14
EricLew 0:80ee8f3b695e 485 * @arg @ref LL_EXTI_LINE_15
EricLew 0:80ee8f3b695e 486 * @arg @ref LL_EXTI_LINE_16
EricLew 0:80ee8f3b695e 487 * @arg @ref LL_EXTI_LINE_17
EricLew 0:80ee8f3b695e 488 * @arg @ref LL_EXTI_LINE_18
EricLew 0:80ee8f3b695e 489 * @arg @ref LL_EXTI_LINE_19
EricLew 0:80ee8f3b695e 490 * @arg @ref LL_EXTI_LINE_20
EricLew 0:80ee8f3b695e 491 * @arg @ref LL_EXTI_LINE_21
EricLew 0:80ee8f3b695e 492 * @arg @ref LL_EXTI_LINE_22
EricLew 0:80ee8f3b695e 493 * @arg @ref LL_EXTI_LINE_23
EricLew 0:80ee8f3b695e 494 * @arg @ref LL_EXTI_LINE_24
EricLew 0:80ee8f3b695e 495 * @arg @ref LL_EXTI_LINE_25
EricLew 0:80ee8f3b695e 496 * @arg @ref LL_EXTI_LINE_26
EricLew 0:80ee8f3b695e 497 * @arg @ref LL_EXTI_LINE_27
EricLew 0:80ee8f3b695e 498 * @arg @ref LL_EXTI_LINE_28
EricLew 0:80ee8f3b695e 499 * @arg @ref LL_EXTI_LINE_29
EricLew 0:80ee8f3b695e 500 * @arg @ref LL_EXTI_LINE_30
EricLew 0:80ee8f3b695e 501 * @arg @ref LL_EXTI_LINE_31
EricLew 0:80ee8f3b695e 502 * @arg @ref LL_EXTI_LINE_ALL
EricLew 0:80ee8f3b695e 503 * @retval None
EricLew 0:80ee8f3b695e 504 */
EricLew 0:80ee8f3b695e 505 __STATIC_INLINE void LL_EXTI_DisableEvent_0_31(uint32_t ExtiLine)
EricLew 0:80ee8f3b695e 506 {
EricLew 0:80ee8f3b695e 507 CLEAR_BIT(EXTI->EMR1, ExtiLine);
EricLew 0:80ee8f3b695e 508 }
EricLew 0:80ee8f3b695e 509
EricLew 0:80ee8f3b695e 510 /**
EricLew 0:80ee8f3b695e 511 * @brief Disable ExtiLine Event request for Lines in range 32 to 63
EricLew 0:80ee8f3b695e 512 * @rmtoll EMR2 EMx LL_EXTI_DisableEvent_32_63
EricLew 0:80ee8f3b695e 513 * @param ExtiLine This parameter can be a combination of the following values:
EricLew 0:80ee8f3b695e 514 * @arg @ref LL_EXTI_LINE_32
EricLew 0:80ee8f3b695e 515 * @arg @ref LL_EXTI_LINE_33
EricLew 0:80ee8f3b695e 516 * @arg @ref LL_EXTI_LINE_34
EricLew 0:80ee8f3b695e 517 * @arg @ref LL_EXTI_LINE_35
EricLew 0:80ee8f3b695e 518 * @arg @ref LL_EXTI_LINE_36
EricLew 0:80ee8f3b695e 519 * @arg @ref LL_EXTI_LINE_37
EricLew 0:80ee8f3b695e 520 * @arg @ref LL_EXTI_LINE_38
EricLew 0:80ee8f3b695e 521 * @arg @ref LL_EXTI_LINE_39
EricLew 0:80ee8f3b695e 522 * @arg @ref LL_EXTI_LINE_ALL_32_63
EricLew 0:80ee8f3b695e 523 * @retval None
EricLew 0:80ee8f3b695e 524 */
EricLew 0:80ee8f3b695e 525 __STATIC_INLINE void LL_EXTI_DisableEvent_32_63(uint32_t ExtiLine)
EricLew 0:80ee8f3b695e 526 {
EricLew 0:80ee8f3b695e 527 CLEAR_BIT(EXTI->EMR2, ExtiLine);
EricLew 0:80ee8f3b695e 528 }
EricLew 0:80ee8f3b695e 529
EricLew 0:80ee8f3b695e 530 /**
EricLew 0:80ee8f3b695e 531 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 0 to 31
EricLew 0:80ee8f3b695e 532 * @rmtoll EMR1 EMx LL_EXTI_IsEnabledEvent_0_31
EricLew 0:80ee8f3b695e 533 * @param ExtiLine This parameter can be a combination of the following values:
EricLew 0:80ee8f3b695e 534 * @arg @ref LL_EXTI_LINE_0
EricLew 0:80ee8f3b695e 535 * @arg @ref LL_EXTI_LINE_1
EricLew 0:80ee8f3b695e 536 * @arg @ref LL_EXTI_LINE_2
EricLew 0:80ee8f3b695e 537 * @arg @ref LL_EXTI_LINE_3
EricLew 0:80ee8f3b695e 538 * @arg @ref LL_EXTI_LINE_4
EricLew 0:80ee8f3b695e 539 * @arg @ref LL_EXTI_LINE_5
EricLew 0:80ee8f3b695e 540 * @arg @ref LL_EXTI_LINE_6
EricLew 0:80ee8f3b695e 541 * @arg @ref LL_EXTI_LINE_7
EricLew 0:80ee8f3b695e 542 * @arg @ref LL_EXTI_LINE_8
EricLew 0:80ee8f3b695e 543 * @arg @ref LL_EXTI_LINE_9
EricLew 0:80ee8f3b695e 544 * @arg @ref LL_EXTI_LINE_10
EricLew 0:80ee8f3b695e 545 * @arg @ref LL_EXTI_LINE_11
EricLew 0:80ee8f3b695e 546 * @arg @ref LL_EXTI_LINE_12
EricLew 0:80ee8f3b695e 547 * @arg @ref LL_EXTI_LINE_13
EricLew 0:80ee8f3b695e 548 * @arg @ref LL_EXTI_LINE_14
EricLew 0:80ee8f3b695e 549 * @arg @ref LL_EXTI_LINE_15
EricLew 0:80ee8f3b695e 550 * @arg @ref LL_EXTI_LINE_16
EricLew 0:80ee8f3b695e 551 * @arg @ref LL_EXTI_LINE_17
EricLew 0:80ee8f3b695e 552 * @arg @ref LL_EXTI_LINE_18
EricLew 0:80ee8f3b695e 553 * @arg @ref LL_EXTI_LINE_19
EricLew 0:80ee8f3b695e 554 * @arg @ref LL_EXTI_LINE_20
EricLew 0:80ee8f3b695e 555 * @arg @ref LL_EXTI_LINE_21
EricLew 0:80ee8f3b695e 556 * @arg @ref LL_EXTI_LINE_22
EricLew 0:80ee8f3b695e 557 * @arg @ref LL_EXTI_LINE_23
EricLew 0:80ee8f3b695e 558 * @arg @ref LL_EXTI_LINE_24
EricLew 0:80ee8f3b695e 559 * @arg @ref LL_EXTI_LINE_25
EricLew 0:80ee8f3b695e 560 * @arg @ref LL_EXTI_LINE_26
EricLew 0:80ee8f3b695e 561 * @arg @ref LL_EXTI_LINE_27
EricLew 0:80ee8f3b695e 562 * @arg @ref LL_EXTI_LINE_28
EricLew 0:80ee8f3b695e 563 * @arg @ref LL_EXTI_LINE_29
EricLew 0:80ee8f3b695e 564 * @arg @ref LL_EXTI_LINE_30
EricLew 0:80ee8f3b695e 565 * @arg @ref LL_EXTI_LINE_31
EricLew 0:80ee8f3b695e 566 * @arg @ref LL_EXTI_LINE_ALL_0_31
EricLew 0:80ee8f3b695e 567 * @retval State of bit (1 or 0).
EricLew 0:80ee8f3b695e 568 */
EricLew 0:80ee8f3b695e 569 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_0_31(uint32_t ExtiLine)
EricLew 0:80ee8f3b695e 570 {
EricLew 0:80ee8f3b695e 571 return (READ_BIT(EXTI->EMR1, ExtiLine) == (ExtiLine));
EricLew 0:80ee8f3b695e 572
EricLew 0:80ee8f3b695e 573 }
EricLew 0:80ee8f3b695e 574
EricLew 0:80ee8f3b695e 575 /**
EricLew 0:80ee8f3b695e 576 * @brief Indicate if ExtiLine Event request is enabled for Lines in range 32 to 63
EricLew 0:80ee8f3b695e 577 * @rmtoll EMR2 EMx LL_EXTI_IsEnabledEvent_32_63
EricLew 0:80ee8f3b695e 578 * @param ExtiLine This parameter can be a combination of the following values:
EricLew 0:80ee8f3b695e 579 * @arg @ref LL_EXTI_LINE_32
EricLew 0:80ee8f3b695e 580 * @arg @ref LL_EXTI_LINE_33
EricLew 0:80ee8f3b695e 581 * @arg @ref LL_EXTI_LINE_34
EricLew 0:80ee8f3b695e 582 * @arg @ref LL_EXTI_LINE_35
EricLew 0:80ee8f3b695e 583 * @arg @ref LL_EXTI_LINE_36
EricLew 0:80ee8f3b695e 584 * @arg @ref LL_EXTI_LINE_37
EricLew 0:80ee8f3b695e 585 * @arg @ref LL_EXTI_LINE_38
EricLew 0:80ee8f3b695e 586 * @arg @ref LL_EXTI_LINE_39
EricLew 0:80ee8f3b695e 587 * @arg @ref LL_EXTI_LINE_ALL_32_63
EricLew 0:80ee8f3b695e 588 * @retval State of bit (1 or 0).
EricLew 0:80ee8f3b695e 589 */
EricLew 0:80ee8f3b695e 590 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledEvent_32_63(uint32_t ExtiLine)
EricLew 0:80ee8f3b695e 591 {
EricLew 0:80ee8f3b695e 592 return (READ_BIT(EXTI->EMR2, ExtiLine) == (ExtiLine));
EricLew 0:80ee8f3b695e 593 }
EricLew 0:80ee8f3b695e 594
EricLew 0:80ee8f3b695e 595 /**
EricLew 0:80ee8f3b695e 596 * @}
EricLew 0:80ee8f3b695e 597 */
EricLew 0:80ee8f3b695e 598
EricLew 0:80ee8f3b695e 599 /** @defgroup EXTI_LL_EF_Rising_Trigger_Management Rising_Trigger_Management
EricLew 0:80ee8f3b695e 600 * @{
EricLew 0:80ee8f3b695e 601 */
EricLew 0:80ee8f3b695e 602
EricLew 0:80ee8f3b695e 603 /**
EricLew 0:80ee8f3b695e 604 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
EricLew 0:80ee8f3b695e 605 * @note The configurable wakeup lines are edge-triggered. No glitch must be
EricLew 0:80ee8f3b695e 606 * generated on these lines. If a rising edge on a configurable interrupt
EricLew 0:80ee8f3b695e 607 * line occurs during a write operation in the EXTI_RTSR register, the
EricLew 0:80ee8f3b695e 608 * pending bit is not set.
EricLew 0:80ee8f3b695e 609 * Rising and falling edge triggers can be set for
EricLew 0:80ee8f3b695e 610 * the same interrupt line. In this case, both generate a trigger
EricLew 0:80ee8f3b695e 611 * condition.
EricLew 0:80ee8f3b695e 612 * @rmtoll RTSR1 RTx LL_EXTI_EnableRisingTrig_0_31
EricLew 0:80ee8f3b695e 613 * @param ExtiLine This parameter can be a combination of the following values:
EricLew 0:80ee8f3b695e 614 * @arg @ref LL_EXTI_LINE_0
EricLew 0:80ee8f3b695e 615 * @arg @ref LL_EXTI_LINE_1
EricLew 0:80ee8f3b695e 616 * @arg @ref LL_EXTI_LINE_2
EricLew 0:80ee8f3b695e 617 * @arg @ref LL_EXTI_LINE_3
EricLew 0:80ee8f3b695e 618 * @arg @ref LL_EXTI_LINE_4
EricLew 0:80ee8f3b695e 619 * @arg @ref LL_EXTI_LINE_5
EricLew 0:80ee8f3b695e 620 * @arg @ref LL_EXTI_LINE_6
EricLew 0:80ee8f3b695e 621 * @arg @ref LL_EXTI_LINE_7
EricLew 0:80ee8f3b695e 622 * @arg @ref LL_EXTI_LINE_8
EricLew 0:80ee8f3b695e 623 * @arg @ref LL_EXTI_LINE_9
EricLew 0:80ee8f3b695e 624 * @arg @ref LL_EXTI_LINE_10
EricLew 0:80ee8f3b695e 625 * @arg @ref LL_EXTI_LINE_11
EricLew 0:80ee8f3b695e 626 * @arg @ref LL_EXTI_LINE_12
EricLew 0:80ee8f3b695e 627 * @arg @ref LL_EXTI_LINE_13
EricLew 0:80ee8f3b695e 628 * @arg @ref LL_EXTI_LINE_14
EricLew 0:80ee8f3b695e 629 * @arg @ref LL_EXTI_LINE_15
EricLew 0:80ee8f3b695e 630 * @arg @ref LL_EXTI_LINE_16
EricLew 0:80ee8f3b695e 631 * @arg @ref LL_EXTI_LINE_18
EricLew 0:80ee8f3b695e 632 * @arg @ref LL_EXTI_LINE_19
EricLew 0:80ee8f3b695e 633 * @arg @ref LL_EXTI_LINE_20
EricLew 0:80ee8f3b695e 634 * @arg @ref LL_EXTI_LINE_21
EricLew 0:80ee8f3b695e 635 * @arg @ref LL_EXTI_LINE_22
EricLew 0:80ee8f3b695e 636 * @retval None
EricLew 0:80ee8f3b695e 637 */
EricLew 0:80ee8f3b695e 638 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_0_31(uint32_t ExtiLine)
EricLew 0:80ee8f3b695e 639 {
EricLew 0:80ee8f3b695e 640 SET_BIT(EXTI->RTSR1, ExtiLine);
EricLew 0:80ee8f3b695e 641
EricLew 0:80ee8f3b695e 642 }
EricLew 0:80ee8f3b695e 643
EricLew 0:80ee8f3b695e 644 /**
EricLew 0:80ee8f3b695e 645 * @brief Enable ExtiLine Rising Edge Trigger for Lines in range 32 to 63
EricLew 0:80ee8f3b695e 646 * @note The configurable wakeup lines are edge-triggered. No glitch must be
EricLew 0:80ee8f3b695e 647 * generated on these lines. If a rising edge on a configurable interrupt
EricLew 0:80ee8f3b695e 648 * line occurs during a write operation in the EXTI_RTSR register, the
EricLew 0:80ee8f3b695e 649 * pending bit is not set.Rising and falling edge triggers can be set for
EricLew 0:80ee8f3b695e 650 * the same interrupt line. In this case, both generate a trigger
EricLew 0:80ee8f3b695e 651 * condition.
EricLew 0:80ee8f3b695e 652 * @rmtoll RTSR2 RTx LL_EXTI_EnableRisingTrig_32_63
EricLew 0:80ee8f3b695e 653 * @param ExtiLine This parameter can be a combination of the following values:
EricLew 0:80ee8f3b695e 654 * @arg @ref LL_EXTI_LINE_35
EricLew 0:80ee8f3b695e 655 * @arg @ref LL_EXTI_LINE_36
EricLew 0:80ee8f3b695e 656 * @arg @ref LL_EXTI_LINE_37
EricLew 0:80ee8f3b695e 657 * @arg @ref LL_EXTI_LINE_38
EricLew 0:80ee8f3b695e 658 * @retval None
EricLew 0:80ee8f3b695e 659 */
EricLew 0:80ee8f3b695e 660 __STATIC_INLINE void LL_EXTI_EnableRisingTrig_32_63(uint32_t ExtiLine)
EricLew 0:80ee8f3b695e 661 {
EricLew 0:80ee8f3b695e 662 SET_BIT(EXTI->RTSR2, ExtiLine);
EricLew 0:80ee8f3b695e 663 }
EricLew 0:80ee8f3b695e 664
EricLew 0:80ee8f3b695e 665 /**
EricLew 0:80ee8f3b695e 666 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 0 to 31
EricLew 0:80ee8f3b695e 667 * @note The configurable wakeup lines are edge-triggered. No glitch must be
EricLew 0:80ee8f3b695e 668 * generated on these lines. If a rising edge on a configurable interrupt
EricLew 0:80ee8f3b695e 669 * line occurs during a write operation in the EXTI_RTSR register, the
EricLew 0:80ee8f3b695e 670 * pending bit is not set.
EricLew 0:80ee8f3b695e 671 * Rising and falling edge triggers can be set for
EricLew 0:80ee8f3b695e 672 * the same interrupt line. In this case, both generate a trigger
EricLew 0:80ee8f3b695e 673 * condition.
EricLew 0:80ee8f3b695e 674 * @rmtoll RTSR1 RTx LL_EXTI_DisableRisingTrig_0_31
EricLew 0:80ee8f3b695e 675 * @param ExtiLine This parameter can be a combination of the following values:
EricLew 0:80ee8f3b695e 676 * @arg @ref LL_EXTI_LINE_0
EricLew 0:80ee8f3b695e 677 * @arg @ref LL_EXTI_LINE_1
EricLew 0:80ee8f3b695e 678 * @arg @ref LL_EXTI_LINE_2
EricLew 0:80ee8f3b695e 679 * @arg @ref LL_EXTI_LINE_3
EricLew 0:80ee8f3b695e 680 * @arg @ref LL_EXTI_LINE_4
EricLew 0:80ee8f3b695e 681 * @arg @ref LL_EXTI_LINE_5
EricLew 0:80ee8f3b695e 682 * @arg @ref LL_EXTI_LINE_6
EricLew 0:80ee8f3b695e 683 * @arg @ref LL_EXTI_LINE_7
EricLew 0:80ee8f3b695e 684 * @arg @ref LL_EXTI_LINE_8
EricLew 0:80ee8f3b695e 685 * @arg @ref LL_EXTI_LINE_9
EricLew 0:80ee8f3b695e 686 * @arg @ref LL_EXTI_LINE_10
EricLew 0:80ee8f3b695e 687 * @arg @ref LL_EXTI_LINE_11
EricLew 0:80ee8f3b695e 688 * @arg @ref LL_EXTI_LINE_12
EricLew 0:80ee8f3b695e 689 * @arg @ref LL_EXTI_LINE_13
EricLew 0:80ee8f3b695e 690 * @arg @ref LL_EXTI_LINE_14
EricLew 0:80ee8f3b695e 691 * @arg @ref LL_EXTI_LINE_15
EricLew 0:80ee8f3b695e 692 * @arg @ref LL_EXTI_LINE_16
EricLew 0:80ee8f3b695e 693 * @arg @ref LL_EXTI_LINE_18
EricLew 0:80ee8f3b695e 694 * @arg @ref LL_EXTI_LINE_19
EricLew 0:80ee8f3b695e 695 * @arg @ref LL_EXTI_LINE_20
EricLew 0:80ee8f3b695e 696 * @arg @ref LL_EXTI_LINE_21
EricLew 0:80ee8f3b695e 697 * @arg @ref LL_EXTI_LINE_22
EricLew 0:80ee8f3b695e 698 * @retval None
EricLew 0:80ee8f3b695e 699 */
EricLew 0:80ee8f3b695e 700 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_0_31(uint32_t ExtiLine)
EricLew 0:80ee8f3b695e 701 {
EricLew 0:80ee8f3b695e 702 CLEAR_BIT(EXTI->RTSR1, ExtiLine);
EricLew 0:80ee8f3b695e 703
EricLew 0:80ee8f3b695e 704 }
EricLew 0:80ee8f3b695e 705
EricLew 0:80ee8f3b695e 706 /**
EricLew 0:80ee8f3b695e 707 * @brief Disable ExtiLine Rising Edge Trigger for Lines in range 32 to 63
EricLew 0:80ee8f3b695e 708 * @note The configurable wakeup lines are edge-triggered. No glitch must be
EricLew 0:80ee8f3b695e 709 * generated on these lines. If a rising edge on a configurable interrupt
EricLew 0:80ee8f3b695e 710 * line occurs during a write operation in the EXTI_RTSR register, the
EricLew 0:80ee8f3b695e 711 * pending bit is not set.
EricLew 0:80ee8f3b695e 712 * Rising and falling edge triggers can be set for
EricLew 0:80ee8f3b695e 713 * the same interrupt line. In this case, both generate a trigger
EricLew 0:80ee8f3b695e 714 * condition.
EricLew 0:80ee8f3b695e 715 * @rmtoll RTSR2 RTx LL_EXTI_DisableRisingTrig_32_63
EricLew 0:80ee8f3b695e 716 * @param ExtiLine This parameter can be a combination of the following values:
EricLew 0:80ee8f3b695e 717 * @arg @ref LL_EXTI_LINE_35
EricLew 0:80ee8f3b695e 718 * @arg @ref LL_EXTI_LINE_36
EricLew 0:80ee8f3b695e 719 * @arg @ref LL_EXTI_LINE_37
EricLew 0:80ee8f3b695e 720 * @arg @ref LL_EXTI_LINE_38
EricLew 0:80ee8f3b695e 721 * @retval None
EricLew 0:80ee8f3b695e 722 */
EricLew 0:80ee8f3b695e 723 __STATIC_INLINE void LL_EXTI_DisableRisingTrig_32_63(uint32_t ExtiLine)
EricLew 0:80ee8f3b695e 724 {
EricLew 0:80ee8f3b695e 725 CLEAR_BIT(EXTI->RTSR2, ExtiLine);
EricLew 0:80ee8f3b695e 726 }
EricLew 0:80ee8f3b695e 727
EricLew 0:80ee8f3b695e 728 /**
EricLew 0:80ee8f3b695e 729 * @brief Check if rising edge trigger is enabled for Lines in range 0 to 31
EricLew 0:80ee8f3b695e 730 * @rmtoll RTSR1 RTx LL_EXTI_IsEnabledRisingTrig_0_31
EricLew 0:80ee8f3b695e 731 * @param ExtiLine This parameter can be a combination of the following values:
EricLew 0:80ee8f3b695e 732 * @arg @ref LL_EXTI_LINE_0
EricLew 0:80ee8f3b695e 733 * @arg @ref LL_EXTI_LINE_1
EricLew 0:80ee8f3b695e 734 * @arg @ref LL_EXTI_LINE_2
EricLew 0:80ee8f3b695e 735 * @arg @ref LL_EXTI_LINE_3
EricLew 0:80ee8f3b695e 736 * @arg @ref LL_EXTI_LINE_4
EricLew 0:80ee8f3b695e 737 * @arg @ref LL_EXTI_LINE_5
EricLew 0:80ee8f3b695e 738 * @arg @ref LL_EXTI_LINE_6
EricLew 0:80ee8f3b695e 739 * @arg @ref LL_EXTI_LINE_7
EricLew 0:80ee8f3b695e 740 * @arg @ref LL_EXTI_LINE_8
EricLew 0:80ee8f3b695e 741 * @arg @ref LL_EXTI_LINE_9
EricLew 0:80ee8f3b695e 742 * @arg @ref LL_EXTI_LINE_10
EricLew 0:80ee8f3b695e 743 * @arg @ref LL_EXTI_LINE_11
EricLew 0:80ee8f3b695e 744 * @arg @ref LL_EXTI_LINE_12
EricLew 0:80ee8f3b695e 745 * @arg @ref LL_EXTI_LINE_13
EricLew 0:80ee8f3b695e 746 * @arg @ref LL_EXTI_LINE_14
EricLew 0:80ee8f3b695e 747 * @arg @ref LL_EXTI_LINE_15
EricLew 0:80ee8f3b695e 748 * @arg @ref LL_EXTI_LINE_16
EricLew 0:80ee8f3b695e 749 * @arg @ref LL_EXTI_LINE_18
EricLew 0:80ee8f3b695e 750 * @arg @ref LL_EXTI_LINE_19
EricLew 0:80ee8f3b695e 751 * @arg @ref LL_EXTI_LINE_20
EricLew 0:80ee8f3b695e 752 * @arg @ref LL_EXTI_LINE_21
EricLew 0:80ee8f3b695e 753 * @arg @ref LL_EXTI_LINE_22
EricLew 0:80ee8f3b695e 754 * @retval State of bit (1 or 0).
EricLew 0:80ee8f3b695e 755 */
EricLew 0:80ee8f3b695e 756 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_0_31(uint32_t ExtiLine)
EricLew 0:80ee8f3b695e 757 {
EricLew 0:80ee8f3b695e 758 return (READ_BIT(EXTI->RTSR1, ExtiLine) == (ExtiLine));
EricLew 0:80ee8f3b695e 759 }
EricLew 0:80ee8f3b695e 760
EricLew 0:80ee8f3b695e 761 /**
EricLew 0:80ee8f3b695e 762 * @brief Check if rising edge trigger is enabled for Lines in range 32 to 63
EricLew 0:80ee8f3b695e 763 * @rmtoll RTSR2 RTx LL_EXTI_IsEnabledRisingTrig_32_63
EricLew 0:80ee8f3b695e 764 * @param ExtiLine This parameter can be a combination of the following values:
EricLew 0:80ee8f3b695e 765 * @arg @ref LL_EXTI_LINE_35
EricLew 0:80ee8f3b695e 766 * @arg @ref LL_EXTI_LINE_36
EricLew 0:80ee8f3b695e 767 * @arg @ref LL_EXTI_LINE_37
EricLew 0:80ee8f3b695e 768 * @arg @ref LL_EXTI_LINE_38
EricLew 0:80ee8f3b695e 769 * @retval State of bit (1 or 0).
EricLew 0:80ee8f3b695e 770 */
EricLew 0:80ee8f3b695e 771 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledRisingTrig_32_63(uint32_t ExtiLine)
EricLew 0:80ee8f3b695e 772 {
EricLew 0:80ee8f3b695e 773 return (READ_BIT(EXTI->RTSR2, ExtiLine) == (ExtiLine));
EricLew 0:80ee8f3b695e 774 }
EricLew 0:80ee8f3b695e 775
EricLew 0:80ee8f3b695e 776 /**
EricLew 0:80ee8f3b695e 777 * @}
EricLew 0:80ee8f3b695e 778 */
EricLew 0:80ee8f3b695e 779
EricLew 0:80ee8f3b695e 780 /** @defgroup EXTI_LL_EF_Falling_Trigger_Management Falling_Trigger_Management
EricLew 0:80ee8f3b695e 781 * @{
EricLew 0:80ee8f3b695e 782 */
EricLew 0:80ee8f3b695e 783
EricLew 0:80ee8f3b695e 784 /**
EricLew 0:80ee8f3b695e 785 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
EricLew 0:80ee8f3b695e 786 * @note The configurable wakeup lines are edge-triggered. No glitch must be
EricLew 0:80ee8f3b695e 787 * generated on these lines. If a falling edge on a configurable interrupt
EricLew 0:80ee8f3b695e 788 * line occurs during a write operation in the EXTI_FTSR register, the
EricLew 0:80ee8f3b695e 789 * pending bit is not set.
EricLew 0:80ee8f3b695e 790 * Rising and falling edge triggers can be set for
EricLew 0:80ee8f3b695e 791 * the same interrupt line. In this case, both generate a trigger
EricLew 0:80ee8f3b695e 792 * condition.
EricLew 0:80ee8f3b695e 793 * @rmtoll FTSR1 FTx LL_EXTI_EnableFallingTrig_0_31
EricLew 0:80ee8f3b695e 794 * @param ExtiLine This parameter can be a combination of the following values:
EricLew 0:80ee8f3b695e 795 * @arg @ref LL_EXTI_LINE_0
EricLew 0:80ee8f3b695e 796 * @arg @ref LL_EXTI_LINE_1
EricLew 0:80ee8f3b695e 797 * @arg @ref LL_EXTI_LINE_2
EricLew 0:80ee8f3b695e 798 * @arg @ref LL_EXTI_LINE_3
EricLew 0:80ee8f3b695e 799 * @arg @ref LL_EXTI_LINE_4
EricLew 0:80ee8f3b695e 800 * @arg @ref LL_EXTI_LINE_5
EricLew 0:80ee8f3b695e 801 * @arg @ref LL_EXTI_LINE_6
EricLew 0:80ee8f3b695e 802 * @arg @ref LL_EXTI_LINE_7
EricLew 0:80ee8f3b695e 803 * @arg @ref LL_EXTI_LINE_8
EricLew 0:80ee8f3b695e 804 * @arg @ref LL_EXTI_LINE_9
EricLew 0:80ee8f3b695e 805 * @arg @ref LL_EXTI_LINE_10
EricLew 0:80ee8f3b695e 806 * @arg @ref LL_EXTI_LINE_11
EricLew 0:80ee8f3b695e 807 * @arg @ref LL_EXTI_LINE_12
EricLew 0:80ee8f3b695e 808 * @arg @ref LL_EXTI_LINE_13
EricLew 0:80ee8f3b695e 809 * @arg @ref LL_EXTI_LINE_14
EricLew 0:80ee8f3b695e 810 * @arg @ref LL_EXTI_LINE_15
EricLew 0:80ee8f3b695e 811 * @arg @ref LL_EXTI_LINE_16
EricLew 0:80ee8f3b695e 812 * @arg @ref LL_EXTI_LINE_18
EricLew 0:80ee8f3b695e 813 * @arg @ref LL_EXTI_LINE_19
EricLew 0:80ee8f3b695e 814 * @arg @ref LL_EXTI_LINE_20
EricLew 0:80ee8f3b695e 815 * @arg @ref LL_EXTI_LINE_21
EricLew 0:80ee8f3b695e 816 * @arg @ref LL_EXTI_LINE_22
EricLew 0:80ee8f3b695e 817 * @retval None
EricLew 0:80ee8f3b695e 818 */
EricLew 0:80ee8f3b695e 819 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_0_31(uint32_t ExtiLine)
EricLew 0:80ee8f3b695e 820 {
EricLew 0:80ee8f3b695e 821 SET_BIT(EXTI->FTSR1, ExtiLine);
EricLew 0:80ee8f3b695e 822 }
EricLew 0:80ee8f3b695e 823
EricLew 0:80ee8f3b695e 824 /**
EricLew 0:80ee8f3b695e 825 * @brief Enable ExtiLine Falling Edge Trigger for Lines in range 32 to 63
EricLew 0:80ee8f3b695e 826 * @note The configurable wakeup lines are edge-triggered. No glitch must be
EricLew 0:80ee8f3b695e 827 * generated on these lines. If a Falling edge on a configurable interrupt
EricLew 0:80ee8f3b695e 828 * line occurs during a write operation in the EXTI_FTSR register, the
EricLew 0:80ee8f3b695e 829 * pending bit is not set.
EricLew 0:80ee8f3b695e 830 * Rising and falling edge triggers can be set for
EricLew 0:80ee8f3b695e 831 * the same interrupt line. In this case, both generate a trigger
EricLew 0:80ee8f3b695e 832 * condition.
EricLew 0:80ee8f3b695e 833 * @rmtoll FTSR2 FTx LL_EXTI_EnableFallingTrig_32_63
EricLew 0:80ee8f3b695e 834 * @param ExtiLine This parameter can be a combination of the following values:
EricLew 0:80ee8f3b695e 835 * @arg @ref LL_EXTI_LINE_35
EricLew 0:80ee8f3b695e 836 * @arg @ref LL_EXTI_LINE_36
EricLew 0:80ee8f3b695e 837 * @arg @ref LL_EXTI_LINE_37
EricLew 0:80ee8f3b695e 838 * @arg @ref LL_EXTI_LINE_38
EricLew 0:80ee8f3b695e 839 * @retval None
EricLew 0:80ee8f3b695e 840 */
EricLew 0:80ee8f3b695e 841 __STATIC_INLINE void LL_EXTI_EnableFallingTrig_32_63(uint32_t ExtiLine)
EricLew 0:80ee8f3b695e 842 {
EricLew 0:80ee8f3b695e 843 SET_BIT(EXTI->FTSR2, ExtiLine);
EricLew 0:80ee8f3b695e 844 }
EricLew 0:80ee8f3b695e 845
EricLew 0:80ee8f3b695e 846 /**
EricLew 0:80ee8f3b695e 847 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 0 to 31
EricLew 0:80ee8f3b695e 848 * @note The configurable wakeup lines are edge-triggered. No glitch must be
EricLew 0:80ee8f3b695e 849 * generated on these lines. If a Falling edge on a configurable interrupt
EricLew 0:80ee8f3b695e 850 * line occurs during a write operation in the EXTI_FTSR register, the
EricLew 0:80ee8f3b695e 851 * pending bit is not set.
EricLew 0:80ee8f3b695e 852 * Rising and falling edge triggers can be set for the same interrupt line.
EricLew 0:80ee8f3b695e 853 * In this case, both generate a trigger condition.
EricLew 0:80ee8f3b695e 854 * @rmtoll FTSR1 FTx LL_EXTI_DisableFallingTrig_0_31
EricLew 0:80ee8f3b695e 855 * @param ExtiLine This parameter can be a combination of the following values:
EricLew 0:80ee8f3b695e 856 * @arg @ref LL_EXTI_LINE_0
EricLew 0:80ee8f3b695e 857 * @arg @ref LL_EXTI_LINE_1
EricLew 0:80ee8f3b695e 858 * @arg @ref LL_EXTI_LINE_2
EricLew 0:80ee8f3b695e 859 * @arg @ref LL_EXTI_LINE_3
EricLew 0:80ee8f3b695e 860 * @arg @ref LL_EXTI_LINE_4
EricLew 0:80ee8f3b695e 861 * @arg @ref LL_EXTI_LINE_5
EricLew 0:80ee8f3b695e 862 * @arg @ref LL_EXTI_LINE_6
EricLew 0:80ee8f3b695e 863 * @arg @ref LL_EXTI_LINE_7
EricLew 0:80ee8f3b695e 864 * @arg @ref LL_EXTI_LINE_8
EricLew 0:80ee8f3b695e 865 * @arg @ref LL_EXTI_LINE_9
EricLew 0:80ee8f3b695e 866 * @arg @ref LL_EXTI_LINE_10
EricLew 0:80ee8f3b695e 867 * @arg @ref LL_EXTI_LINE_11
EricLew 0:80ee8f3b695e 868 * @arg @ref LL_EXTI_LINE_12
EricLew 0:80ee8f3b695e 869 * @arg @ref LL_EXTI_LINE_13
EricLew 0:80ee8f3b695e 870 * @arg @ref LL_EXTI_LINE_14
EricLew 0:80ee8f3b695e 871 * @arg @ref LL_EXTI_LINE_15
EricLew 0:80ee8f3b695e 872 * @arg @ref LL_EXTI_LINE_16
EricLew 0:80ee8f3b695e 873 * @arg @ref LL_EXTI_LINE_18
EricLew 0:80ee8f3b695e 874 * @arg @ref LL_EXTI_LINE_19
EricLew 0:80ee8f3b695e 875 * @arg @ref LL_EXTI_LINE_20
EricLew 0:80ee8f3b695e 876 * @arg @ref LL_EXTI_LINE_21
EricLew 0:80ee8f3b695e 877 * @arg @ref LL_EXTI_LINE_22
EricLew 0:80ee8f3b695e 878 * @retval None
EricLew 0:80ee8f3b695e 879 */
EricLew 0:80ee8f3b695e 880 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_0_31(uint32_t ExtiLine)
EricLew 0:80ee8f3b695e 881 {
EricLew 0:80ee8f3b695e 882 CLEAR_BIT(EXTI->FTSR1, ExtiLine);
EricLew 0:80ee8f3b695e 883 }
EricLew 0:80ee8f3b695e 884
EricLew 0:80ee8f3b695e 885 /**
EricLew 0:80ee8f3b695e 886 * @brief Disable ExtiLine Falling Edge Trigger for Lines in range 32 to 63
EricLew 0:80ee8f3b695e 887 * @note The configurable wakeup lines are edge-triggered. No glitch must be
EricLew 0:80ee8f3b695e 888 * generated on these lines. If a Falling edge on a configurable interrupt
EricLew 0:80ee8f3b695e 889 * line occurs during a write operation in the EXTI_FTSR register, the
EricLew 0:80ee8f3b695e 890 * pending bit is not set.
EricLew 0:80ee8f3b695e 891 * Rising and falling edge triggers can be set for the same interrupt line.
EricLew 0:80ee8f3b695e 892 * In this case, both generate a trigger condition.
EricLew 0:80ee8f3b695e 893 * @rmtoll FTSR2 FTx LL_EXTI_DisableFallingTrig_32_63
EricLew 0:80ee8f3b695e 894 * @param ExtiLine This parameter can be a combination of the following values:
EricLew 0:80ee8f3b695e 895 * @arg @ref LL_EXTI_LINE_35
EricLew 0:80ee8f3b695e 896 * @arg @ref LL_EXTI_LINE_36
EricLew 0:80ee8f3b695e 897 * @arg @ref LL_EXTI_LINE_37
EricLew 0:80ee8f3b695e 898 * @arg @ref LL_EXTI_LINE_38
EricLew 0:80ee8f3b695e 899 * @retval None
EricLew 0:80ee8f3b695e 900 */
EricLew 0:80ee8f3b695e 901 __STATIC_INLINE void LL_EXTI_DisableFallingTrig_32_63(uint32_t ExtiLine)
EricLew 0:80ee8f3b695e 902 {
EricLew 0:80ee8f3b695e 903 CLEAR_BIT(EXTI->FTSR2, ExtiLine);
EricLew 0:80ee8f3b695e 904 }
EricLew 0:80ee8f3b695e 905
EricLew 0:80ee8f3b695e 906 /**
EricLew 0:80ee8f3b695e 907 * @brief Check if falling edge trigger is enabled for Lines in range 0 to 31
EricLew 0:80ee8f3b695e 908 * @rmtoll FTSR1 FTx LL_EXTI_IsEnabledFallingTrig_0_31
EricLew 0:80ee8f3b695e 909 * @param ExtiLine This parameter can be a combination of the following values:
EricLew 0:80ee8f3b695e 910 * @arg @ref LL_EXTI_LINE_0
EricLew 0:80ee8f3b695e 911 * @arg @ref LL_EXTI_LINE_1
EricLew 0:80ee8f3b695e 912 * @arg @ref LL_EXTI_LINE_2
EricLew 0:80ee8f3b695e 913 * @arg @ref LL_EXTI_LINE_3
EricLew 0:80ee8f3b695e 914 * @arg @ref LL_EXTI_LINE_4
EricLew 0:80ee8f3b695e 915 * @arg @ref LL_EXTI_LINE_5
EricLew 0:80ee8f3b695e 916 * @arg @ref LL_EXTI_LINE_6
EricLew 0:80ee8f3b695e 917 * @arg @ref LL_EXTI_LINE_7
EricLew 0:80ee8f3b695e 918 * @arg @ref LL_EXTI_LINE_8
EricLew 0:80ee8f3b695e 919 * @arg @ref LL_EXTI_LINE_9
EricLew 0:80ee8f3b695e 920 * @arg @ref LL_EXTI_LINE_10
EricLew 0:80ee8f3b695e 921 * @arg @ref LL_EXTI_LINE_11
EricLew 0:80ee8f3b695e 922 * @arg @ref LL_EXTI_LINE_12
EricLew 0:80ee8f3b695e 923 * @arg @ref LL_EXTI_LINE_13
EricLew 0:80ee8f3b695e 924 * @arg @ref LL_EXTI_LINE_14
EricLew 0:80ee8f3b695e 925 * @arg @ref LL_EXTI_LINE_15
EricLew 0:80ee8f3b695e 926 * @arg @ref LL_EXTI_LINE_16
EricLew 0:80ee8f3b695e 927 * @arg @ref LL_EXTI_LINE_18
EricLew 0:80ee8f3b695e 928 * @arg @ref LL_EXTI_LINE_19
EricLew 0:80ee8f3b695e 929 * @arg @ref LL_EXTI_LINE_20
EricLew 0:80ee8f3b695e 930 * @arg @ref LL_EXTI_LINE_21
EricLew 0:80ee8f3b695e 931 * @arg @ref LL_EXTI_LINE_22
EricLew 0:80ee8f3b695e 932 * @retval State of bit (1 or 0).
EricLew 0:80ee8f3b695e 933 */
EricLew 0:80ee8f3b695e 934 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_0_31(uint32_t ExtiLine)
EricLew 0:80ee8f3b695e 935 {
EricLew 0:80ee8f3b695e 936 return (READ_BIT(EXTI->FTSR1, ExtiLine) == (ExtiLine));
EricLew 0:80ee8f3b695e 937 }
EricLew 0:80ee8f3b695e 938
EricLew 0:80ee8f3b695e 939 /**
EricLew 0:80ee8f3b695e 940 * @brief Check if falling edge trigger is enabled for Lines in range 32 to 63
EricLew 0:80ee8f3b695e 941 * @rmtoll FTSR2 FTx LL_EXTI_IsEnabledFallingTrig_32_63
EricLew 0:80ee8f3b695e 942 * @param ExtiLine This parameter can be a combination of the following values:
EricLew 0:80ee8f3b695e 943 * @arg @ref LL_EXTI_LINE_35
EricLew 0:80ee8f3b695e 944 * @arg @ref LL_EXTI_LINE_36
EricLew 0:80ee8f3b695e 945 * @arg @ref LL_EXTI_LINE_37
EricLew 0:80ee8f3b695e 946 * @arg @ref LL_EXTI_LINE_38
EricLew 0:80ee8f3b695e 947 * @retval State of bit (1 or 0).
EricLew 0:80ee8f3b695e 948 */
EricLew 0:80ee8f3b695e 949 __STATIC_INLINE uint32_t LL_EXTI_IsEnabledFallingTrig_32_63(uint32_t ExtiLine)
EricLew 0:80ee8f3b695e 950 {
EricLew 0:80ee8f3b695e 951 return (READ_BIT(EXTI->FTSR2, ExtiLine) == (ExtiLine));
EricLew 0:80ee8f3b695e 952 }
EricLew 0:80ee8f3b695e 953
EricLew 0:80ee8f3b695e 954 /**
EricLew 0:80ee8f3b695e 955 * @}
EricLew 0:80ee8f3b695e 956 */
EricLew 0:80ee8f3b695e 957
EricLew 0:80ee8f3b695e 958 /** @defgroup EXTI_LL_EF_Software_Interrupt_Management Software_Interrupt_Management
EricLew 0:80ee8f3b695e 959 * @{
EricLew 0:80ee8f3b695e 960 */
EricLew 0:80ee8f3b695e 961
EricLew 0:80ee8f3b695e 962 /**
EricLew 0:80ee8f3b695e 963 * @brief Generate a software Interrupt Event for Lines in range 0 to 31
EricLew 0:80ee8f3b695e 964 * @note If the interrupt is enabled on this line inthe EXTI_IMR, writing a 1 to
EricLew 0:80ee8f3b695e 965 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR
EricLew 0:80ee8f3b695e 966 * resulting in an interrupt request generation.
EricLew 0:80ee8f3b695e 967 * This bit is cleared by clearing the corresponding bit in the EXTI_PR
EricLew 0:80ee8f3b695e 968 * register (by writing a 1 into the bit)
EricLew 0:80ee8f3b695e 969 * @rmtoll SWIER1 SWIx LL_EXTI_GenerateSWI_0_31
EricLew 0:80ee8f3b695e 970 * @param ExtiLine This parameter can be a combination of the following values:
EricLew 0:80ee8f3b695e 971 * @arg @ref LL_EXTI_LINE_0
EricLew 0:80ee8f3b695e 972 * @arg @ref LL_EXTI_LINE_1
EricLew 0:80ee8f3b695e 973 * @arg @ref LL_EXTI_LINE_2
EricLew 0:80ee8f3b695e 974 * @arg @ref LL_EXTI_LINE_3
EricLew 0:80ee8f3b695e 975 * @arg @ref LL_EXTI_LINE_4
EricLew 0:80ee8f3b695e 976 * @arg @ref LL_EXTI_LINE_5
EricLew 0:80ee8f3b695e 977 * @arg @ref LL_EXTI_LINE_6
EricLew 0:80ee8f3b695e 978 * @arg @ref LL_EXTI_LINE_7
EricLew 0:80ee8f3b695e 979 * @arg @ref LL_EXTI_LINE_8
EricLew 0:80ee8f3b695e 980 * @arg @ref LL_EXTI_LINE_9
EricLew 0:80ee8f3b695e 981 * @arg @ref LL_EXTI_LINE_10
EricLew 0:80ee8f3b695e 982 * @arg @ref LL_EXTI_LINE_11
EricLew 0:80ee8f3b695e 983 * @arg @ref LL_EXTI_LINE_12
EricLew 0:80ee8f3b695e 984 * @arg @ref LL_EXTI_LINE_13
EricLew 0:80ee8f3b695e 985 * @arg @ref LL_EXTI_LINE_14
EricLew 0:80ee8f3b695e 986 * @arg @ref LL_EXTI_LINE_15
EricLew 0:80ee8f3b695e 987 * @arg @ref LL_EXTI_LINE_16
EricLew 0:80ee8f3b695e 988 * @arg @ref LL_EXTI_LINE_18
EricLew 0:80ee8f3b695e 989 * @arg @ref LL_EXTI_LINE_19
EricLew 0:80ee8f3b695e 990 * @arg @ref LL_EXTI_LINE_20
EricLew 0:80ee8f3b695e 991 * @arg @ref LL_EXTI_LINE_21
EricLew 0:80ee8f3b695e 992 * @arg @ref LL_EXTI_LINE_22
EricLew 0:80ee8f3b695e 993 * @retval None
EricLew 0:80ee8f3b695e 994 */
EricLew 0:80ee8f3b695e 995 __STATIC_INLINE void LL_EXTI_GenerateSWI_0_31(uint32_t ExtiLine)
EricLew 0:80ee8f3b695e 996 {
EricLew 0:80ee8f3b695e 997 SET_BIT(EXTI->SWIER1, ExtiLine);
EricLew 0:80ee8f3b695e 998 }
EricLew 0:80ee8f3b695e 999
EricLew 0:80ee8f3b695e 1000 /**
EricLew 0:80ee8f3b695e 1001 * @brief Generate a software Interrupt Event for Lines in range 32 to 63
EricLew 0:80ee8f3b695e 1002 * @note If the interrupt is enabled on this line inthe EXTI_IMR, writing a 1 to
EricLew 0:80ee8f3b695e 1003 * this bit when it is at '0' sets the corresponding pending bit in EXTI_PR
EricLew 0:80ee8f3b695e 1004 * resulting in an interrupt request generation.
EricLew 0:80ee8f3b695e 1005 * This bit is cleared by clearing the corresponding bit in the EXTI_PR
EricLew 0:80ee8f3b695e 1006 * register (by writing a 1 into the bit)
EricLew 0:80ee8f3b695e 1007 * @rmtoll SWIER2 SWIx LL_EXTI_GenerateSWI_32_63
EricLew 0:80ee8f3b695e 1008 * @param ExtiLine This parameter can be a combination of the following values:
EricLew 0:80ee8f3b695e 1009 * @arg @ref LL_EXTI_LINE_35
EricLew 0:80ee8f3b695e 1010 * @arg @ref LL_EXTI_LINE_36
EricLew 0:80ee8f3b695e 1011 * @arg @ref LL_EXTI_LINE_37
EricLew 0:80ee8f3b695e 1012 * @arg @ref LL_EXTI_LINE_38
EricLew 0:80ee8f3b695e 1013 * @retval None
EricLew 0:80ee8f3b695e 1014 */
EricLew 0:80ee8f3b695e 1015 __STATIC_INLINE void LL_EXTI_GenerateSWI_32_63(uint32_t ExtiLine)
EricLew 0:80ee8f3b695e 1016 {
EricLew 0:80ee8f3b695e 1017 SET_BIT(EXTI->SWIER2, ExtiLine);
EricLew 0:80ee8f3b695e 1018 }
EricLew 0:80ee8f3b695e 1019
EricLew 0:80ee8f3b695e 1020 /**
EricLew 0:80ee8f3b695e 1021 * @}
EricLew 0:80ee8f3b695e 1022 */
EricLew 0:80ee8f3b695e 1023
EricLew 0:80ee8f3b695e 1024 /** @defgroup EXTI_LL_EF_Flag_Management Flag_Management
EricLew 0:80ee8f3b695e 1025 * @{
EricLew 0:80ee8f3b695e 1026 */
EricLew 0:80ee8f3b695e 1027
EricLew 0:80ee8f3b695e 1028 /**
EricLew 0:80ee8f3b695e 1029 * @brief Check if the ExtLine Flag is set or not for Lines in range 0 to 31
EricLew 0:80ee8f3b695e 1030 * @note This bit is set when the selected edge event arrives on the interrupt
EricLew 0:80ee8f3b695e 1031 * line. This bit is cleared by writing a 1 to the bit.
EricLew 0:80ee8f3b695e 1032 * @rmtoll PR1 PRx LL_EXTI_IsActiveFlag_0_31
EricLew 0:80ee8f3b695e 1033 * @param ExtiLine This parameter can be a combination of the following values:
EricLew 0:80ee8f3b695e 1034 * @arg @ref LL_EXTI_LINE_0
EricLew 0:80ee8f3b695e 1035 * @arg @ref LL_EXTI_LINE_1
EricLew 0:80ee8f3b695e 1036 * @arg @ref LL_EXTI_LINE_2
EricLew 0:80ee8f3b695e 1037 * @arg @ref LL_EXTI_LINE_3
EricLew 0:80ee8f3b695e 1038 * @arg @ref LL_EXTI_LINE_4
EricLew 0:80ee8f3b695e 1039 * @arg @ref LL_EXTI_LINE_5
EricLew 0:80ee8f3b695e 1040 * @arg @ref LL_EXTI_LINE_6
EricLew 0:80ee8f3b695e 1041 * @arg @ref LL_EXTI_LINE_7
EricLew 0:80ee8f3b695e 1042 * @arg @ref LL_EXTI_LINE_8
EricLew 0:80ee8f3b695e 1043 * @arg @ref LL_EXTI_LINE_9
EricLew 0:80ee8f3b695e 1044 * @arg @ref LL_EXTI_LINE_10
EricLew 0:80ee8f3b695e 1045 * @arg @ref LL_EXTI_LINE_11
EricLew 0:80ee8f3b695e 1046 * @arg @ref LL_EXTI_LINE_12
EricLew 0:80ee8f3b695e 1047 * @arg @ref LL_EXTI_LINE_13
EricLew 0:80ee8f3b695e 1048 * @arg @ref LL_EXTI_LINE_14
EricLew 0:80ee8f3b695e 1049 * @arg @ref LL_EXTI_LINE_15
EricLew 0:80ee8f3b695e 1050 * @arg @ref LL_EXTI_LINE_16
EricLew 0:80ee8f3b695e 1051 * @arg @ref LL_EXTI_LINE_18
EricLew 0:80ee8f3b695e 1052 * @arg @ref LL_EXTI_LINE_19
EricLew 0:80ee8f3b695e 1053 * @arg @ref LL_EXTI_LINE_20
EricLew 0:80ee8f3b695e 1054 * @arg @ref LL_EXTI_LINE_21
EricLew 0:80ee8f3b695e 1055 * @arg @ref LL_EXTI_LINE_22
EricLew 0:80ee8f3b695e 1056 * @retval State of bit (1 or 0).
EricLew 0:80ee8f3b695e 1057 */
EricLew 0:80ee8f3b695e 1058 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_0_31(uint32_t ExtiLine)
EricLew 0:80ee8f3b695e 1059 {
EricLew 0:80ee8f3b695e 1060 return (READ_BIT(EXTI->PR1, ExtiLine) == (ExtiLine));
EricLew 0:80ee8f3b695e 1061 }
EricLew 0:80ee8f3b695e 1062
EricLew 0:80ee8f3b695e 1063 /**
EricLew 0:80ee8f3b695e 1064 * @brief Check if the ExtLine Flag is set or not for Lines in range 32 to 63
EricLew 0:80ee8f3b695e 1065 * @note This bit is set when the selected edge event arrives on the interrupt
EricLew 0:80ee8f3b695e 1066 * line. This bit is cleared by writing a 1 to the bit.
EricLew 0:80ee8f3b695e 1067 * @rmtoll PR2 PRx LL_EXTI_IsActiveFlag_32_63
EricLew 0:80ee8f3b695e 1068 * @param ExtiLine This parameter can be a combination of the following values:
EricLew 0:80ee8f3b695e 1069 * @arg @ref LL_EXTI_LINE_35
EricLew 0:80ee8f3b695e 1070 * @arg @ref LL_EXTI_LINE_36
EricLew 0:80ee8f3b695e 1071 * @arg @ref LL_EXTI_LINE_37
EricLew 0:80ee8f3b695e 1072 * @arg @ref LL_EXTI_LINE_38
EricLew 0:80ee8f3b695e 1073 * @retval State of bit (1 or 0).
EricLew 0:80ee8f3b695e 1074 */
EricLew 0:80ee8f3b695e 1075 __STATIC_INLINE uint32_t LL_EXTI_IsActiveFlag_32_63(uint32_t ExtiLine)
EricLew 0:80ee8f3b695e 1076 {
EricLew 0:80ee8f3b695e 1077 return (READ_BIT(EXTI->PR2, ExtiLine) == (ExtiLine));
EricLew 0:80ee8f3b695e 1078 }
EricLew 0:80ee8f3b695e 1079
EricLew 0:80ee8f3b695e 1080 /**
EricLew 0:80ee8f3b695e 1081 * @brief Read ExtLine Combination Flag for Lines in range 0 to 31
EricLew 0:80ee8f3b695e 1082 * @note This bit is set when the selected edge event arrives on the interrupt
EricLew 0:80ee8f3b695e 1083 * line. This bit is cleared by writing a 1 to the bit.
EricLew 0:80ee8f3b695e 1084 * @rmtoll PR1 PRx LL_EXTI_ReadFlag_0_31
EricLew 0:80ee8f3b695e 1085 * @param ExtiLine This parameter can be a combination of the following values:
EricLew 0:80ee8f3b695e 1086 * @arg @ref LL_EXTI_LINE_0
EricLew 0:80ee8f3b695e 1087 * @arg @ref LL_EXTI_LINE_1
EricLew 0:80ee8f3b695e 1088 * @arg @ref LL_EXTI_LINE_2
EricLew 0:80ee8f3b695e 1089 * @arg @ref LL_EXTI_LINE_3
EricLew 0:80ee8f3b695e 1090 * @arg @ref LL_EXTI_LINE_4
EricLew 0:80ee8f3b695e 1091 * @arg @ref LL_EXTI_LINE_5
EricLew 0:80ee8f3b695e 1092 * @arg @ref LL_EXTI_LINE_6
EricLew 0:80ee8f3b695e 1093 * @arg @ref LL_EXTI_LINE_7
EricLew 0:80ee8f3b695e 1094 * @arg @ref LL_EXTI_LINE_8
EricLew 0:80ee8f3b695e 1095 * @arg @ref LL_EXTI_LINE_9
EricLew 0:80ee8f3b695e 1096 * @arg @ref LL_EXTI_LINE_10
EricLew 0:80ee8f3b695e 1097 * @arg @ref LL_EXTI_LINE_11
EricLew 0:80ee8f3b695e 1098 * @arg @ref LL_EXTI_LINE_12
EricLew 0:80ee8f3b695e 1099 * @arg @ref LL_EXTI_LINE_13
EricLew 0:80ee8f3b695e 1100 * @arg @ref LL_EXTI_LINE_14
EricLew 0:80ee8f3b695e 1101 * @arg @ref LL_EXTI_LINE_15
EricLew 0:80ee8f3b695e 1102 * @arg @ref LL_EXTI_LINE_16
EricLew 0:80ee8f3b695e 1103 * @arg @ref LL_EXTI_LINE_18
EricLew 0:80ee8f3b695e 1104 * @arg @ref LL_EXTI_LINE_19
EricLew 0:80ee8f3b695e 1105 * @arg @ref LL_EXTI_LINE_20
EricLew 0:80ee8f3b695e 1106 * @arg @ref LL_EXTI_LINE_21
EricLew 0:80ee8f3b695e 1107 * @arg @ref LL_EXTI_LINE_22
EricLew 0:80ee8f3b695e 1108 * @retval @note This bit is set when the selected edge event arrives on the interrupt
EricLew 0:80ee8f3b695e 1109 */
EricLew 0:80ee8f3b695e 1110 __STATIC_INLINE uint32_t LL_EXTI_ReadFlag_0_31(uint32_t ExtiLine)
EricLew 0:80ee8f3b695e 1111 {
EricLew 0:80ee8f3b695e 1112 return (uint32_t)(READ_BIT(EXTI->PR1, ExtiLine));
EricLew 0:80ee8f3b695e 1113 }
EricLew 0:80ee8f3b695e 1114
EricLew 0:80ee8f3b695e 1115
EricLew 0:80ee8f3b695e 1116 /**
EricLew 0:80ee8f3b695e 1117 * @brief Read ExtLine Combination Flag for Lines in range 32 to 63
EricLew 0:80ee8f3b695e 1118 * @note This bit is set when the selected edge event arrives on the interrupt
EricLew 0:80ee8f3b695e 1119 * line. This bit is cleared by writing a 1 to the bit.
EricLew 0:80ee8f3b695e 1120 * @rmtoll PR2 PRx LL_EXTI_ReadFlag_32_63
EricLew 0:80ee8f3b695e 1121 * @param ExtiLine This parameter can be a combination of the following values:
EricLew 0:80ee8f3b695e 1122 * @arg @ref LL_EXTI_LINE_35
EricLew 0:80ee8f3b695e 1123 * @arg @ref LL_EXTI_LINE_36
EricLew 0:80ee8f3b695e 1124 * @arg @ref LL_EXTI_LINE_37
EricLew 0:80ee8f3b695e 1125 * @arg @ref LL_EXTI_LINE_38
EricLew 0:80ee8f3b695e 1126 * @retval @note This bit is set when the selected edge event arrives on the interrupt
EricLew 0:80ee8f3b695e 1127 */
EricLew 0:80ee8f3b695e 1128 __STATIC_INLINE uint32_t LL_EXTI_ReadFlag_32_63(uint32_t ExtiLine)
EricLew 0:80ee8f3b695e 1129 {
EricLew 0:80ee8f3b695e 1130 return (uint32_t)(READ_BIT(EXTI->PR2, ExtiLine));
EricLew 0:80ee8f3b695e 1131 }
EricLew 0:80ee8f3b695e 1132
EricLew 0:80ee8f3b695e 1133 /**
EricLew 0:80ee8f3b695e 1134 * @brief Clear ExtLine Flags for Lines in range 0 to 31
EricLew 0:80ee8f3b695e 1135 * @note This bit is set when the selected edge event arrives on the interrupt
EricLew 0:80ee8f3b695e 1136 * line. This bit is cleared by writing a 1 to the bit.
EricLew 0:80ee8f3b695e 1137 * @rmtoll PR1 PRx LL_EXTI_ClearFlag_0_31
EricLew 0:80ee8f3b695e 1138 * @param ExtiLine This parameter can be a combination of the following values:
EricLew 0:80ee8f3b695e 1139 * @arg @ref LL_EXTI_LINE_0
EricLew 0:80ee8f3b695e 1140 * @arg @ref LL_EXTI_LINE_1
EricLew 0:80ee8f3b695e 1141 * @arg @ref LL_EXTI_LINE_2
EricLew 0:80ee8f3b695e 1142 * @arg @ref LL_EXTI_LINE_3
EricLew 0:80ee8f3b695e 1143 * @arg @ref LL_EXTI_LINE_4
EricLew 0:80ee8f3b695e 1144 * @arg @ref LL_EXTI_LINE_5
EricLew 0:80ee8f3b695e 1145 * @arg @ref LL_EXTI_LINE_6
EricLew 0:80ee8f3b695e 1146 * @arg @ref LL_EXTI_LINE_7
EricLew 0:80ee8f3b695e 1147 * @arg @ref LL_EXTI_LINE_8
EricLew 0:80ee8f3b695e 1148 * @arg @ref LL_EXTI_LINE_9
EricLew 0:80ee8f3b695e 1149 * @arg @ref LL_EXTI_LINE_10
EricLew 0:80ee8f3b695e 1150 * @arg @ref LL_EXTI_LINE_11
EricLew 0:80ee8f3b695e 1151 * @arg @ref LL_EXTI_LINE_12
EricLew 0:80ee8f3b695e 1152 * @arg @ref LL_EXTI_LINE_13
EricLew 0:80ee8f3b695e 1153 * @arg @ref LL_EXTI_LINE_14
EricLew 0:80ee8f3b695e 1154 * @arg @ref LL_EXTI_LINE_15
EricLew 0:80ee8f3b695e 1155 * @arg @ref LL_EXTI_LINE_16
EricLew 0:80ee8f3b695e 1156 * @arg @ref LL_EXTI_LINE_18
EricLew 0:80ee8f3b695e 1157 * @arg @ref LL_EXTI_LINE_19
EricLew 0:80ee8f3b695e 1158 * @arg @ref LL_EXTI_LINE_20
EricLew 0:80ee8f3b695e 1159 * @arg @ref LL_EXTI_LINE_21
EricLew 0:80ee8f3b695e 1160 * @arg @ref LL_EXTI_LINE_22
EricLew 0:80ee8f3b695e 1161 * @retval None
EricLew 0:80ee8f3b695e 1162 */
EricLew 0:80ee8f3b695e 1163 __STATIC_INLINE void LL_EXTI_ClearFlag_0_31(uint32_t ExtiLine)
EricLew 0:80ee8f3b695e 1164 {
EricLew 0:80ee8f3b695e 1165 WRITE_REG(EXTI->PR1, ExtiLine);
EricLew 0:80ee8f3b695e 1166 }
EricLew 0:80ee8f3b695e 1167
EricLew 0:80ee8f3b695e 1168 /**
EricLew 0:80ee8f3b695e 1169 * @brief Clear ExtLine Flags for Lines in range 32 to 63
EricLew 0:80ee8f3b695e 1170 * @note This bit is set when the selected edge event arrives on the interrupt
EricLew 0:80ee8f3b695e 1171 * line. This bit is cleared by writing a 1 to the bit.
EricLew 0:80ee8f3b695e 1172 * @rmtoll PR2 PRx LL_EXTI_ClearFlag_32_63
EricLew 0:80ee8f3b695e 1173 * @param ExtiLine This parameter can be a combination of the following values:
EricLew 0:80ee8f3b695e 1174 * @arg @ref LL_EXTI_LINE_35
EricLew 0:80ee8f3b695e 1175 * @arg @ref LL_EXTI_LINE_36
EricLew 0:80ee8f3b695e 1176 * @arg @ref LL_EXTI_LINE_37
EricLew 0:80ee8f3b695e 1177 * @arg @ref LL_EXTI_LINE_38
EricLew 0:80ee8f3b695e 1178 * @retval None
EricLew 0:80ee8f3b695e 1179 */
EricLew 0:80ee8f3b695e 1180 __STATIC_INLINE void LL_EXTI_ClearFlag_32_63(uint32_t ExtiLine)
EricLew 0:80ee8f3b695e 1181 {
EricLew 0:80ee8f3b695e 1182 WRITE_REG(EXTI->PR2, ExtiLine);
EricLew 0:80ee8f3b695e 1183 }
EricLew 0:80ee8f3b695e 1184
EricLew 0:80ee8f3b695e 1185 /**
EricLew 0:80ee8f3b695e 1186 * @}
EricLew 0:80ee8f3b695e 1187 */
EricLew 0:80ee8f3b695e 1188
EricLew 0:80ee8f3b695e 1189
EricLew 0:80ee8f3b695e 1190 /**
EricLew 0:80ee8f3b695e 1191 * @}
EricLew 0:80ee8f3b695e 1192 */
EricLew 0:80ee8f3b695e 1193
EricLew 0:80ee8f3b695e 1194 /**
EricLew 0:80ee8f3b695e 1195 * @}
EricLew 0:80ee8f3b695e 1196 */
EricLew 0:80ee8f3b695e 1197
EricLew 0:80ee8f3b695e 1198 #endif /* EXTI */
EricLew 0:80ee8f3b695e 1199
EricLew 0:80ee8f3b695e 1200 /**
EricLew 0:80ee8f3b695e 1201 * @}
EricLew 0:80ee8f3b695e 1202 */
EricLew 0:80ee8f3b695e 1203
EricLew 0:80ee8f3b695e 1204 #ifdef __cplusplus
EricLew 0:80ee8f3b695e 1205 }
EricLew 0:80ee8f3b695e 1206 #endif
EricLew 0:80ee8f3b695e 1207
EricLew 0:80ee8f3b695e 1208 #endif /* __STM32L4xx_LL_EXTI_H */
EricLew 0:80ee8f3b695e 1209
EricLew 0:80ee8f3b695e 1210 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
EricLew 0:80ee8f3b695e 1211