Eric Lewiston / STM32L4xx_HAL_Driver

Important changes to repositories hosted on mbed.com

Mbed hosted mercurial repositories are deprecated and are due to be permanently deleted in July 2026.

To keep a copy of this software download the repository Zip archive or clone locally using Mercurial.

It is also possible to export all your personal repositories from the account settings page.

Dependents:   BSP OneHopeOnePrayer FINAL_AUDIO_RECORD AudioDemo

Fork of STM32L4xx_HAL_Driver by Senior Design: Sound Monitor

Inc/stm32l4xx_hal_tim.h@0:80ee8f3b695e, 2015-11-02 (annotated)

Committer:
EricLew
Date:
Mon Nov 02 19:37:23 2015 +0000
Revision:
0:80ee8f3b695e
Errors are with definitions of LCD and QSPI functions. I believe all .h and .c files are  uploaded, but there may need to be certain functions called.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
EricLew 0:80ee8f3b695e 1 /**
EricLew 0:80ee8f3b695e 2 ******************************************************************************
EricLew 0:80ee8f3b695e 3 * @file stm32l4xx_hal_tim.h
EricLew 0:80ee8f3b695e 4 * @author MCD Application Team
EricLew 0:80ee8f3b695e 5 * @version V1.1.0
EricLew 0:80ee8f3b695e 6 * @date 16-September-2015
EricLew 0:80ee8f3b695e 7 * @brief Header file of TIM HAL module.
EricLew 0:80ee8f3b695e 8 ******************************************************************************
EricLew 0:80ee8f3b695e 9 * @attention
EricLew 0:80ee8f3b695e 10 *
EricLew 0:80ee8f3b695e 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
EricLew 0:80ee8f3b695e 12 *
EricLew 0:80ee8f3b695e 13 * Redistribution and use in source and binary forms, with or without modification,
EricLew 0:80ee8f3b695e 14 * are permitted provided that the following conditions are met:
EricLew 0:80ee8f3b695e 15 * 1. Redistributions of source code must retain the above copyright notice,
EricLew 0:80ee8f3b695e 16 * this list of conditions and the following disclaimer.
EricLew 0:80ee8f3b695e 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
EricLew 0:80ee8f3b695e 18 * this list of conditions and the following disclaimer in the documentation
EricLew 0:80ee8f3b695e 19 * and/or other materials provided with the distribution.
EricLew 0:80ee8f3b695e 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
EricLew 0:80ee8f3b695e 21 * may be used to endorse or promote products derived from this software
EricLew 0:80ee8f3b695e 22 * without specific prior written permission.
EricLew 0:80ee8f3b695e 23 *
EricLew 0:80ee8f3b695e 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
EricLew 0:80ee8f3b695e 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
EricLew 0:80ee8f3b695e 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
EricLew 0:80ee8f3b695e 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
EricLew 0:80ee8f3b695e 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
EricLew 0:80ee8f3b695e 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
EricLew 0:80ee8f3b695e 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
EricLew 0:80ee8f3b695e 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
EricLew 0:80ee8f3b695e 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
EricLew 0:80ee8f3b695e 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
EricLew 0:80ee8f3b695e 34 *
EricLew 0:80ee8f3b695e 35 ******************************************************************************
EricLew 0:80ee8f3b695e 36 */
EricLew 0:80ee8f3b695e 37
EricLew 0:80ee8f3b695e 38 /* Define to prevent recursive inclusion -------------------------------------*/
EricLew 0:80ee8f3b695e 39 #ifndef __STM32L4xx_HAL_TIM_H
EricLew 0:80ee8f3b695e 40 #define __STM32L4xx_HAL_TIM_H
EricLew 0:80ee8f3b695e 41
EricLew 0:80ee8f3b695e 42 #ifdef __cplusplus
EricLew 0:80ee8f3b695e 43 extern "C" {
EricLew 0:80ee8f3b695e 44 #endif
EricLew 0:80ee8f3b695e 45
EricLew 0:80ee8f3b695e 46 /* Includes ------------------------------------------------------------------*/
EricLew 0:80ee8f3b695e 47 #include "stm32l4xx_hal_def.h"
EricLew 0:80ee8f3b695e 48
EricLew 0:80ee8f3b695e 49 /** @addtogroup STM32L4xx_HAL_Driver
EricLew 0:80ee8f3b695e 50 * @{
EricLew 0:80ee8f3b695e 51 */
EricLew 0:80ee8f3b695e 52
EricLew 0:80ee8f3b695e 53 /** @addtogroup TIM
EricLew 0:80ee8f3b695e 54 * @{
EricLew 0:80ee8f3b695e 55 */
EricLew 0:80ee8f3b695e 56
EricLew 0:80ee8f3b695e 57 /* Exported types ------------------------------------------------------------*/
EricLew 0:80ee8f3b695e 58 /** @defgroup TIM_Exported_Types TIM Exported Types
EricLew 0:80ee8f3b695e 59 * @{
EricLew 0:80ee8f3b695e 60 */
EricLew 0:80ee8f3b695e 61
EricLew 0:80ee8f3b695e 62 /**
EricLew 0:80ee8f3b695e 63 * @brief TIM Time base Configuration Structure definition
EricLew 0:80ee8f3b695e 64 */
EricLew 0:80ee8f3b695e 65 typedef struct
EricLew 0:80ee8f3b695e 66 {
EricLew 0:80ee8f3b695e 67 uint32_t Prescaler; /*!< Specifies the prescaler value used to divide the TIM clock.
EricLew 0:80ee8f3b695e 68 This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
EricLew 0:80ee8f3b695e 69
EricLew 0:80ee8f3b695e 70 uint32_t CounterMode; /*!< Specifies the counter mode.
EricLew 0:80ee8f3b695e 71 This parameter can be a value of @ref TIM_Counter_Mode */
EricLew 0:80ee8f3b695e 72
EricLew 0:80ee8f3b695e 73 uint32_t Period; /*!< Specifies the period value to be loaded into the active
EricLew 0:80ee8f3b695e 74 Auto-Reload Register at the next update event.
EricLew 0:80ee8f3b695e 75 This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF. */
EricLew 0:80ee8f3b695e 76
EricLew 0:80ee8f3b695e 77 uint32_t ClockDivision; /*!< Specifies the clock division.
EricLew 0:80ee8f3b695e 78 This parameter can be a value of @ref TIM_ClockDivision */
EricLew 0:80ee8f3b695e 79
EricLew 0:80ee8f3b695e 80 uint32_t RepetitionCounter; /*!< Specifies the repetition counter value. Each time the RCR downcounter
EricLew 0:80ee8f3b695e 81 reaches zero, an update event is generated and counting restarts
EricLew 0:80ee8f3b695e 82 from the RCR value (N).
EricLew 0:80ee8f3b695e 83 This means in PWM mode that (N+1) corresponds to:
EricLew 0:80ee8f3b695e 84 - the number of PWM periods in edge-aligned mode
EricLew 0:80ee8f3b695e 85 - the number of half PWM period in center-aligned mode
EricLew 0:80ee8f3b695e 86 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF.
EricLew 0:80ee8f3b695e 87 @note This parameter is valid only for TIM1 and TIM8. */
EricLew 0:80ee8f3b695e 88 } TIM_Base_InitTypeDef;
EricLew 0:80ee8f3b695e 89
EricLew 0:80ee8f3b695e 90 /**
EricLew 0:80ee8f3b695e 91 * @brief TIM Output Compare Configuration Structure definition
EricLew 0:80ee8f3b695e 92 */
EricLew 0:80ee8f3b695e 93 typedef struct
EricLew 0:80ee8f3b695e 94 {
EricLew 0:80ee8f3b695e 95 uint32_t OCMode; /*!< Specifies the TIM mode.
EricLew 0:80ee8f3b695e 96 This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */
EricLew 0:80ee8f3b695e 97
EricLew 0:80ee8f3b695e 98 uint32_t Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
EricLew 0:80ee8f3b695e 99 This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
EricLew 0:80ee8f3b695e 100
EricLew 0:80ee8f3b695e 101 uint32_t OCPolarity; /*!< Specifies the output polarity.
EricLew 0:80ee8f3b695e 102 This parameter can be a value of @ref TIM_Output_Compare_Polarity */
EricLew 0:80ee8f3b695e 103
EricLew 0:80ee8f3b695e 104 uint32_t OCNPolarity; /*!< Specifies the complementary output polarity.
EricLew 0:80ee8f3b695e 105 This parameter can be a value of @ref TIM_Output_Compare_N_Polarity
EricLew 0:80ee8f3b695e 106 @note This parameter is valid only for TIM1 and TIM8. */
EricLew 0:80ee8f3b695e 107
EricLew 0:80ee8f3b695e 108 uint32_t OCFastMode; /*!< Specifies the Fast mode state.
EricLew 0:80ee8f3b695e 109 This parameter can be a value of @ref TIM_Output_Fast_State
EricLew 0:80ee8f3b695e 110 @note This parameter is valid only in PWM1 and PWM2 mode. */
EricLew 0:80ee8f3b695e 111
EricLew 0:80ee8f3b695e 112
EricLew 0:80ee8f3b695e 113 uint32_t OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
EricLew 0:80ee8f3b695e 114 This parameter can be a value of @ref TIM_Output_Compare_Idle_State
EricLew 0:80ee8f3b695e 115 @note This parameter is valid only for TIM1 and TIM8. */
EricLew 0:80ee8f3b695e 116
EricLew 0:80ee8f3b695e 117 uint32_t OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
EricLew 0:80ee8f3b695e 118 This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State
EricLew 0:80ee8f3b695e 119 @note This parameter is valid only for TIM1 and TIM8. */
EricLew 0:80ee8f3b695e 120 } TIM_OC_InitTypeDef;
EricLew 0:80ee8f3b695e 121
EricLew 0:80ee8f3b695e 122 /**
EricLew 0:80ee8f3b695e 123 * @brief TIM One Pulse Mode Configuration Structure definition
EricLew 0:80ee8f3b695e 124 */
EricLew 0:80ee8f3b695e 125 typedef struct
EricLew 0:80ee8f3b695e 126 {
EricLew 0:80ee8f3b695e 127 uint32_t OCMode; /*!< Specifies the TIM mode.
EricLew 0:80ee8f3b695e 128 This parameter can be a value of @ref TIM_Output_Compare_and_PWM_modes */
EricLew 0:80ee8f3b695e 129
EricLew 0:80ee8f3b695e 130 uint32_t Pulse; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
EricLew 0:80ee8f3b695e 131 This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
EricLew 0:80ee8f3b695e 132
EricLew 0:80ee8f3b695e 133 uint32_t OCPolarity; /*!< Specifies the output polarity.
EricLew 0:80ee8f3b695e 134 This parameter can be a value of @ref TIM_Output_Compare_Polarity */
EricLew 0:80ee8f3b695e 135
EricLew 0:80ee8f3b695e 136 uint32_t OCNPolarity; /*!< Specifies the complementary output polarity.
EricLew 0:80ee8f3b695e 137 This parameter can be a value of @ref TIM_Output_Compare_N_Polarity
EricLew 0:80ee8f3b695e 138 @note This parameter is valid only for TIM1 and TIM8. */
EricLew 0:80ee8f3b695e 139
EricLew 0:80ee8f3b695e 140 uint32_t OCIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
EricLew 0:80ee8f3b695e 141 This parameter can be a value of @ref TIM_Output_Compare_Idle_State
EricLew 0:80ee8f3b695e 142 @note This parameter is valid only for TIM1 and TIM8. */
EricLew 0:80ee8f3b695e 143
EricLew 0:80ee8f3b695e 144 uint32_t OCNIdleState; /*!< Specifies the TIM Output Compare pin state during Idle state.
EricLew 0:80ee8f3b695e 145 This parameter can be a value of @ref TIM_Output_Compare_N_Idle_State
EricLew 0:80ee8f3b695e 146 @note This parameter is valid only for TIM1 and TIM8. */
EricLew 0:80ee8f3b695e 147
EricLew 0:80ee8f3b695e 148 uint32_t ICPolarity; /*!< Specifies the active edge of the input signal.
EricLew 0:80ee8f3b695e 149 This parameter can be a value of @ref TIM_Input_Capture_Polarity */
EricLew 0:80ee8f3b695e 150
EricLew 0:80ee8f3b695e 151 uint32_t ICSelection; /*!< Specifies the input.
EricLew 0:80ee8f3b695e 152 This parameter can be a value of @ref TIM_Input_Capture_Selection */
EricLew 0:80ee8f3b695e 153
EricLew 0:80ee8f3b695e 154 uint32_t ICFilter; /*!< Specifies the input capture filter.
EricLew 0:80ee8f3b695e 155 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
EricLew 0:80ee8f3b695e 156 } TIM_OnePulse_InitTypeDef;
EricLew 0:80ee8f3b695e 157
EricLew 0:80ee8f3b695e 158
EricLew 0:80ee8f3b695e 159 /**
EricLew 0:80ee8f3b695e 160 * @brief TIM Input Capture Configuration Structure definition
EricLew 0:80ee8f3b695e 161 */
EricLew 0:80ee8f3b695e 162 typedef struct
EricLew 0:80ee8f3b695e 163 {
EricLew 0:80ee8f3b695e 164 uint32_t ICPolarity; /*!< Specifies the active edge of the input signal.
EricLew 0:80ee8f3b695e 165 This parameter can be a value of @ref TIM_Input_Capture_Polarity */
EricLew 0:80ee8f3b695e 166
EricLew 0:80ee8f3b695e 167 uint32_t ICSelection; /*!< Specifies the input.
EricLew 0:80ee8f3b695e 168 This parameter can be a value of @ref TIM_Input_Capture_Selection */
EricLew 0:80ee8f3b695e 169
EricLew 0:80ee8f3b695e 170 uint32_t ICPrescaler; /*!< Specifies the Input Capture Prescaler.
EricLew 0:80ee8f3b695e 171 This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
EricLew 0:80ee8f3b695e 172
EricLew 0:80ee8f3b695e 173 uint32_t ICFilter; /*!< Specifies the input capture filter.
EricLew 0:80ee8f3b695e 174 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
EricLew 0:80ee8f3b695e 175 } TIM_IC_InitTypeDef;
EricLew 0:80ee8f3b695e 176
EricLew 0:80ee8f3b695e 177 /**
EricLew 0:80ee8f3b695e 178 * @brief TIM Encoder Configuration Structure definition
EricLew 0:80ee8f3b695e 179 */
EricLew 0:80ee8f3b695e 180 typedef struct
EricLew 0:80ee8f3b695e 181 {
EricLew 0:80ee8f3b695e 182 uint32_t EncoderMode; /*!< Specifies the active edge of the input signal.
EricLew 0:80ee8f3b695e 183 This parameter can be a value of @ref TIM_Encoder_Mode */
EricLew 0:80ee8f3b695e 184
EricLew 0:80ee8f3b695e 185 uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal.
EricLew 0:80ee8f3b695e 186 This parameter can be a value of @ref TIM_Input_Capture_Polarity */
EricLew 0:80ee8f3b695e 187
EricLew 0:80ee8f3b695e 188 uint32_t IC1Selection; /*!< Specifies the input.
EricLew 0:80ee8f3b695e 189 This parameter can be a value of @ref TIM_Input_Capture_Selection */
EricLew 0:80ee8f3b695e 190
EricLew 0:80ee8f3b695e 191 uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler.
EricLew 0:80ee8f3b695e 192 This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
EricLew 0:80ee8f3b695e 193
EricLew 0:80ee8f3b695e 194 uint32_t IC1Filter; /*!< Specifies the input capture filter.
EricLew 0:80ee8f3b695e 195 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
EricLew 0:80ee8f3b695e 196
EricLew 0:80ee8f3b695e 197 uint32_t IC2Polarity; /*!< Specifies the active edge of the input signal.
EricLew 0:80ee8f3b695e 198 This parameter can be a value of @ref TIM_Input_Capture_Polarity */
EricLew 0:80ee8f3b695e 199
EricLew 0:80ee8f3b695e 200 uint32_t IC2Selection; /*!< Specifies the input.
EricLew 0:80ee8f3b695e 201 This parameter can be a value of @ref TIM_Input_Capture_Selection */
EricLew 0:80ee8f3b695e 202
EricLew 0:80ee8f3b695e 203 uint32_t IC2Prescaler; /*!< Specifies the Input Capture Prescaler.
EricLew 0:80ee8f3b695e 204 This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
EricLew 0:80ee8f3b695e 205
EricLew 0:80ee8f3b695e 206 uint32_t IC2Filter; /*!< Specifies the input capture filter.
EricLew 0:80ee8f3b695e 207 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
EricLew 0:80ee8f3b695e 208 } TIM_Encoder_InitTypeDef;
EricLew 0:80ee8f3b695e 209
EricLew 0:80ee8f3b695e 210
EricLew 0:80ee8f3b695e 211 /**
EricLew 0:80ee8f3b695e 212 * @brief Clock Configuration Handle Structure definition
EricLew 0:80ee8f3b695e 213 */
EricLew 0:80ee8f3b695e 214 typedef struct
EricLew 0:80ee8f3b695e 215 {
EricLew 0:80ee8f3b695e 216 uint32_t ClockSource; /*!< TIM clock sources
EricLew 0:80ee8f3b695e 217 This parameter can be a value of @ref TIM_Clock_Source */
EricLew 0:80ee8f3b695e 218 uint32_t ClockPolarity; /*!< TIM clock polarity
EricLew 0:80ee8f3b695e 219 This parameter can be a value of @ref TIM_Clock_Polarity */
EricLew 0:80ee8f3b695e 220 uint32_t ClockPrescaler; /*!< TIM clock prescaler
EricLew 0:80ee8f3b695e 221 This parameter can be a value of @ref TIM_Clock_Prescaler */
EricLew 0:80ee8f3b695e 222 uint32_t ClockFilter; /*!< TIM clock filter
EricLew 0:80ee8f3b695e 223 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
EricLew 0:80ee8f3b695e 224 }TIM_ClockConfigTypeDef;
EricLew 0:80ee8f3b695e 225
EricLew 0:80ee8f3b695e 226 /**
EricLew 0:80ee8f3b695e 227 * @brief Clear Input Configuration Handle Structure definition
EricLew 0:80ee8f3b695e 228 */
EricLew 0:80ee8f3b695e 229 typedef struct
EricLew 0:80ee8f3b695e 230 {
EricLew 0:80ee8f3b695e 231 uint32_t ClearInputState; /*!< TIM clear Input state
EricLew 0:80ee8f3b695e 232 This parameter can be ENABLE or DISABLE */
EricLew 0:80ee8f3b695e 233 uint32_t ClearInputSource; /*!< TIM clear Input sources
EricLew 0:80ee8f3b695e 234 This parameter can be a value of @ref TIM_ClearInput_Source */
EricLew 0:80ee8f3b695e 235 uint32_t ClearInputPolarity; /*!< TIM Clear Input polarity
EricLew 0:80ee8f3b695e 236 This parameter can be a value of @ref TIM_ClearInput_Polarity */
EricLew 0:80ee8f3b695e 237 uint32_t ClearInputPrescaler; /*!< TIM Clear Input prescaler
EricLew 0:80ee8f3b695e 238 This parameter can be a value of @ref TIM_ClearInput_Prescaler */
EricLew 0:80ee8f3b695e 239 uint32_t ClearInputFilter; /*!< TIM Clear Input filter
EricLew 0:80ee8f3b695e 240 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
EricLew 0:80ee8f3b695e 241 }TIM_ClearInputConfigTypeDef;
EricLew 0:80ee8f3b695e 242
EricLew 0:80ee8f3b695e 243 /**
EricLew 0:80ee8f3b695e 244 * @brief TIM Master configuration Structure definition
EricLew 0:80ee8f3b695e 245 * @note Advanced timers provide TRGO2 internal line which is redirected
EricLew 0:80ee8f3b695e 246 * to the ADC
EricLew 0:80ee8f3b695e 247 */
EricLew 0:80ee8f3b695e 248 typedef struct {
EricLew 0:80ee8f3b695e 249 uint32_t MasterOutputTrigger; /*!< Trigger output (TRGO) selection
EricLew 0:80ee8f3b695e 250 This parameter can be a value of @ref TIM_Master_Mode_Selection */
EricLew 0:80ee8f3b695e 251 uint32_t MasterOutputTrigger2; /*!< Trigger output2 (TRGO2) selection
EricLew 0:80ee8f3b695e 252 This parameter can be a value of @ref TIM_Master_Mode_Selection_2 */
EricLew 0:80ee8f3b695e 253 uint32_t MasterSlaveMode; /*!< Master/slave mode selection
EricLew 0:80ee8f3b695e 254 This parameter can be a value of @ref TIM_Master_Slave_Mode */
EricLew 0:80ee8f3b695e 255 }TIM_MasterConfigTypeDef;
EricLew 0:80ee8f3b695e 256
EricLew 0:80ee8f3b695e 257 /**
EricLew 0:80ee8f3b695e 258 * @brief TIM Slave configuration Structure definition
EricLew 0:80ee8f3b695e 259 */
EricLew 0:80ee8f3b695e 260 typedef struct {
EricLew 0:80ee8f3b695e 261 uint32_t SlaveMode; /*!< Slave mode selection
EricLew 0:80ee8f3b695e 262 This parameter can be a value of @ref TIM_Slave_Mode */
EricLew 0:80ee8f3b695e 263 uint32_t InputTrigger; /*!< Input Trigger source
EricLew 0:80ee8f3b695e 264 This parameter can be a value of @ref TIM_Trigger_Selection */
EricLew 0:80ee8f3b695e 265 uint32_t TriggerPolarity; /*!< Input Trigger polarity
EricLew 0:80ee8f3b695e 266 This parameter can be a value of @ref TIM_Trigger_Polarity */
EricLew 0:80ee8f3b695e 267 uint32_t TriggerPrescaler; /*!< Input trigger prescaler
EricLew 0:80ee8f3b695e 268 This parameter can be a value of @ref TIM_Trigger_Prescaler */
EricLew 0:80ee8f3b695e 269 uint32_t TriggerFilter; /*!< Input trigger filter
EricLew 0:80ee8f3b695e 270 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
EricLew 0:80ee8f3b695e 271
EricLew 0:80ee8f3b695e 272 }TIM_SlaveConfigTypeDef;
EricLew 0:80ee8f3b695e 273
EricLew 0:80ee8f3b695e 274 /**
EricLew 0:80ee8f3b695e 275 * @brief TIM Break input(s) and Dead time configuration Structure definition
EricLew 0:80ee8f3b695e 276 * @note 2 break inputs can be configured (BKIN and BKIN2) with configurable
EricLew 0:80ee8f3b695e 277 * filter and polarity.
EricLew 0:80ee8f3b695e 278 */
EricLew 0:80ee8f3b695e 279 typedef struct
EricLew 0:80ee8f3b695e 280 {
EricLew 0:80ee8f3b695e 281 uint32_t OffStateRunMode; /*!< TIM off state in run mode
EricLew 0:80ee8f3b695e 282 This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */
EricLew 0:80ee8f3b695e 283 uint32_t OffStateIDLEMode; /*!< TIM off state in IDLE mode
EricLew 0:80ee8f3b695e 284 This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */
EricLew 0:80ee8f3b695e 285 uint32_t LockLevel; /*!< TIM Lock level
EricLew 0:80ee8f3b695e 286 This parameter can be a value of @ref TIM_Lock_level */
EricLew 0:80ee8f3b695e 287 uint32_t DeadTime; /*!< TIM dead Time
EricLew 0:80ee8f3b695e 288 This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF */
EricLew 0:80ee8f3b695e 289 uint32_t BreakState; /*!< TIM Break State
EricLew 0:80ee8f3b695e 290 This parameter can be a value of @ref TIM_Break_Input_enable_disable */
EricLew 0:80ee8f3b695e 291 uint32_t BreakPolarity; /*!< TIM Break input polarity
EricLew 0:80ee8f3b695e 292 This parameter can be a value of @ref TIM_Break_Polarity */
EricLew 0:80ee8f3b695e 293 uint32_t BreakFilter; /*!< Specifies the break input filter.
EricLew 0:80ee8f3b695e 294 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
EricLew 0:80ee8f3b695e 295 uint32_t Break2State; /*!< TIM Break2 State
EricLew 0:80ee8f3b695e 296 This parameter can be a value of @ref TIM_Break2_Input_enable_disable */
EricLew 0:80ee8f3b695e 297 uint32_t Break2Polarity; /*!< TIM Break2 input polarity
EricLew 0:80ee8f3b695e 298 This parameter can be a value of @ref TIM_Break2_Polarity */
EricLew 0:80ee8f3b695e 299 uint32_t Break2Filter; /*!< TIM break2 input filter.
EricLew 0:80ee8f3b695e 300 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
EricLew 0:80ee8f3b695e 301 uint32_t AutomaticOutput; /*!< TIM Automatic Output Enable state
EricLew 0:80ee8f3b695e 302 This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */
EricLew 0:80ee8f3b695e 303 } TIM_BreakDeadTimeConfigTypeDef;
EricLew 0:80ee8f3b695e 304
EricLew 0:80ee8f3b695e 305 /**
EricLew 0:80ee8f3b695e 306 * @brief HAL State structures definition
EricLew 0:80ee8f3b695e 307 */
EricLew 0:80ee8f3b695e 308 typedef enum
EricLew 0:80ee8f3b695e 309 {
EricLew 0:80ee8f3b695e 310 HAL_TIM_STATE_RESET = 0x00, /*!< Peripheral not yet initialized or disabled */
EricLew 0:80ee8f3b695e 311 HAL_TIM_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
EricLew 0:80ee8f3b695e 312 HAL_TIM_STATE_BUSY = 0x02, /*!< An internal process is ongoing */
EricLew 0:80ee8f3b695e 313 HAL_TIM_STATE_TIMEOUT = 0x03, /*!< Timeout state */
EricLew 0:80ee8f3b695e 314 HAL_TIM_STATE_ERROR = 0x04 /*!< Reception process is ongoing */
EricLew 0:80ee8f3b695e 315 }HAL_TIM_StateTypeDef;
EricLew 0:80ee8f3b695e 316
EricLew 0:80ee8f3b695e 317 /**
EricLew 0:80ee8f3b695e 318 * @brief HAL Active channel structures definition
EricLew 0:80ee8f3b695e 319 */
EricLew 0:80ee8f3b695e 320 typedef enum
EricLew 0:80ee8f3b695e 321 {
EricLew 0:80ee8f3b695e 322 HAL_TIM_ACTIVE_CHANNEL_1 = 0x01, /*!< The active channel is 1 */
EricLew 0:80ee8f3b695e 323 HAL_TIM_ACTIVE_CHANNEL_2 = 0x02, /*!< The active channel is 2 */
EricLew 0:80ee8f3b695e 324 HAL_TIM_ACTIVE_CHANNEL_3 = 0x04, /*!< The active channel is 3 */
EricLew 0:80ee8f3b695e 325 HAL_TIM_ACTIVE_CHANNEL_4 = 0x08, /*!< The active channel is 4 */
EricLew 0:80ee8f3b695e 326 HAL_TIM_ACTIVE_CHANNEL_5 = 0x10, /*!< The active channel is 5 */
EricLew 0:80ee8f3b695e 327 HAL_TIM_ACTIVE_CHANNEL_6 = 0x20, /*!< The active channel is 6 */
EricLew 0:80ee8f3b695e 328 HAL_TIM_ACTIVE_CHANNEL_CLEARED = 0x00 /*!< All active channels cleared */
EricLew 0:80ee8f3b695e 329 }HAL_TIM_ActiveChannel;
EricLew 0:80ee8f3b695e 330
EricLew 0:80ee8f3b695e 331 /**
EricLew 0:80ee8f3b695e 332 * @brief TIM Time Base Handle Structure definition
EricLew 0:80ee8f3b695e 333 */
EricLew 0:80ee8f3b695e 334 typedef struct
EricLew 0:80ee8f3b695e 335 {
EricLew 0:80ee8f3b695e 336 TIM_TypeDef *Instance; /*!< Register base address */
EricLew 0:80ee8f3b695e 337 TIM_Base_InitTypeDef Init; /*!< TIM Time Base required parameters */
EricLew 0:80ee8f3b695e 338 HAL_TIM_ActiveChannel Channel; /*!< Active channel */
EricLew 0:80ee8f3b695e 339 DMA_HandleTypeDef *hdma[7]; /*!< DMA Handlers array
EricLew 0:80ee8f3b695e 340 This array is accessed by a @ref DMA_Handle_index */
EricLew 0:80ee8f3b695e 341 HAL_LockTypeDef Lock; /*!< Locking object */
EricLew 0:80ee8f3b695e 342 __IO HAL_TIM_StateTypeDef State; /*!< TIM operation state */
EricLew 0:80ee8f3b695e 343 }TIM_HandleTypeDef;
EricLew 0:80ee8f3b695e 344
EricLew 0:80ee8f3b695e 345 /**
EricLew 0:80ee8f3b695e 346 * @}
EricLew 0:80ee8f3b695e 347 */
EricLew 0:80ee8f3b695e 348 /* End of exported types -----------------------------------------------------*/
EricLew 0:80ee8f3b695e 349
EricLew 0:80ee8f3b695e 350 /* Exported constants --------------------------------------------------------*/
EricLew 0:80ee8f3b695e 351 /** @defgroup TIM_Exported_Constants TIM Exported Constants
EricLew 0:80ee8f3b695e 352 * @{
EricLew 0:80ee8f3b695e 353 */
EricLew 0:80ee8f3b695e 354
EricLew 0:80ee8f3b695e 355 /** @defgroup TIM_ClearInput_Source TIM Clear Input Source
EricLew 0:80ee8f3b695e 356 * @{
EricLew 0:80ee8f3b695e 357 */
EricLew 0:80ee8f3b695e 358 #define TIM_CLEARINPUTSOURCE_ETR ((uint32_t)0x0001)
EricLew 0:80ee8f3b695e 359 #define TIM_CLEARINPUTSOURCE_OCREFCLR ((uint32_t)0x0002)
EricLew 0:80ee8f3b695e 360 #define TIM_CLEARINPUTSOURCE_NONE ((uint32_t)0x0000)
EricLew 0:80ee8f3b695e 361 /**
EricLew 0:80ee8f3b695e 362 * @}
EricLew 0:80ee8f3b695e 363 */
EricLew 0:80ee8f3b695e 364
EricLew 0:80ee8f3b695e 365 /** @defgroup TIM_DMA_Base_address TIM DMA Base Address
EricLew 0:80ee8f3b695e 366 * @{
EricLew 0:80ee8f3b695e 367 */
EricLew 0:80ee8f3b695e 368 #define TIM_DMABASE_CR1 (0x00000000)
EricLew 0:80ee8f3b695e 369 #define TIM_DMABASE_CR2 (0x00000001)
EricLew 0:80ee8f3b695e 370 #define TIM_DMABASE_SMCR (0x00000002)
EricLew 0:80ee8f3b695e 371 #define TIM_DMABASE_DIER (0x00000003)
EricLew 0:80ee8f3b695e 372 #define TIM_DMABASE_SR (0x00000004)
EricLew 0:80ee8f3b695e 373 #define TIM_DMABASE_EGR (0x00000005)
EricLew 0:80ee8f3b695e 374 #define TIM_DMABASE_CCMR1 (0x00000006)
EricLew 0:80ee8f3b695e 375 #define TIM_DMABASE_CCMR2 (0x00000007)
EricLew 0:80ee8f3b695e 376 #define TIM_DMABASE_CCER (0x00000008)
EricLew 0:80ee8f3b695e 377 #define TIM_DMABASE_CNT (0x00000009)
EricLew 0:80ee8f3b695e 378 #define TIM_DMABASE_PSC (0x0000000A)
EricLew 0:80ee8f3b695e 379 #define TIM_DMABASE_ARR (0x0000000B)
EricLew 0:80ee8f3b695e 380 #define TIM_DMABASE_RCR (0x0000000C)
EricLew 0:80ee8f3b695e 381 #define TIM_DMABASE_CCR1 (0x0000000D)
EricLew 0:80ee8f3b695e 382 #define TIM_DMABASE_CCR2 (0x0000000E)
EricLew 0:80ee8f3b695e 383 #define TIM_DMABASE_CCR3 (0x0000000F)
EricLew 0:80ee8f3b695e 384 #define TIM_DMABASE_CCR4 (0x00000010)
EricLew 0:80ee8f3b695e 385 #define TIM_DMABASE_BDTR (0x00000011)
EricLew 0:80ee8f3b695e 386 #define TIM_DMABASE_DCR (0x00000012)
EricLew 0:80ee8f3b695e 387 #define TIM_DMABASE_DMAR (0x00000013)
EricLew 0:80ee8f3b695e 388 #define TIM_DMABASE_OR1 (0x00000014)
EricLew 0:80ee8f3b695e 389 #define TIM_DMABASE_CCMR3 (0x00000015)
EricLew 0:80ee8f3b695e 390 #define TIM_DMABASE_CCR5 (0x00000016)
EricLew 0:80ee8f3b695e 391 #define TIM_DMABASE_CCR6 (0x00000017)
EricLew 0:80ee8f3b695e 392 #define TIM_DMABASE_OR2 (0x00000018)
EricLew 0:80ee8f3b695e 393 #define TIM_DMABASE_OR3 (0x00000019)
EricLew 0:80ee8f3b695e 394 /**
EricLew 0:80ee8f3b695e 395 * @}
EricLew 0:80ee8f3b695e 396 */
EricLew 0:80ee8f3b695e 397
EricLew 0:80ee8f3b695e 398 /** @defgroup TIM_Event_Source TIM Extended Event Source
EricLew 0:80ee8f3b695e 399 * @{
EricLew 0:80ee8f3b695e 400 */
EricLew 0:80ee8f3b695e 401 #define TIM_EVENTSOURCE_UPDATE TIM_EGR_UG /*!< Reinitialize the counter and generates an update of the registers */
EricLew 0:80ee8f3b695e 402 #define TIM_EVENTSOURCE_CC1 TIM_EGR_CC1G /*!< A capture/compare event is generated on channel 1 */
EricLew 0:80ee8f3b695e 403 #define TIM_EVENTSOURCE_CC2 TIM_EGR_CC2G /*!< A capture/compare event is generated on channel 2 */
EricLew 0:80ee8f3b695e 404 #define TIM_EVENTSOURCE_CC3 TIM_EGR_CC3G /*!< A capture/compare event is generated on channel 3 */
EricLew 0:80ee8f3b695e 405 #define TIM_EVENTSOURCE_CC4 TIM_EGR_CC4G /*!< A capture/compare event is generated on channel 4 */
EricLew 0:80ee8f3b695e 406 #define TIM_EVENTSOURCE_COM TIM_EGR_COMG /*!< A commutation event is generated */
EricLew 0:80ee8f3b695e 407 #define TIM_EVENTSOURCE_TRIGGER TIM_EGR_TG /*!< A trigger event is generated */
EricLew 0:80ee8f3b695e 408 #define TIM_EVENTSOURCE_BREAK TIM_EGR_BG /*!< A break event is generated */
EricLew 0:80ee8f3b695e 409 #define TIM_EVENTSOURCE_BREAK2 TIM_EGR_B2G /*!< A break 2 event is generated */
EricLew 0:80ee8f3b695e 410 /**
EricLew 0:80ee8f3b695e 411 * @}
EricLew 0:80ee8f3b695e 412 */
EricLew 0:80ee8f3b695e 413
EricLew 0:80ee8f3b695e 414 /** @defgroup TIM_Input_Channel_Polarity TIM Input Channel polarity
EricLew 0:80ee8f3b695e 415 * @{
EricLew 0:80ee8f3b695e 416 */
EricLew 0:80ee8f3b695e 417 #define TIM_INPUTCHANNELPOLARITY_RISING ((uint32_t)0x00000000) /*!< Polarity for TIx source */
EricLew 0:80ee8f3b695e 418 #define TIM_INPUTCHANNELPOLARITY_FALLING (TIM_CCER_CC1P) /*!< Polarity for TIx source */
EricLew 0:80ee8f3b695e 419 #define TIM_INPUTCHANNELPOLARITY_BOTHEDGE (TIM_CCER_CC1P | TIM_CCER_CC1NP) /*!< Polarity for TIx source */
EricLew 0:80ee8f3b695e 420 /**
EricLew 0:80ee8f3b695e 421 * @}
EricLew 0:80ee8f3b695e 422 */
EricLew 0:80ee8f3b695e 423
EricLew 0:80ee8f3b695e 424 /** @defgroup TIM_ETR_Polarity TIM ETR Polarity
EricLew 0:80ee8f3b695e 425 * @{
EricLew 0:80ee8f3b695e 426 */
EricLew 0:80ee8f3b695e 427 #define TIM_ETRPOLARITY_INVERTED (TIM_SMCR_ETP) /*!< Polarity for ETR source */
EricLew 0:80ee8f3b695e 428 #define TIM_ETRPOLARITY_NONINVERTED ((uint32_t)0x0000) /*!< Polarity for ETR source */
EricLew 0:80ee8f3b695e 429 /**
EricLew 0:80ee8f3b695e 430 * @}
EricLew 0:80ee8f3b695e 431 */
EricLew 0:80ee8f3b695e 432
EricLew 0:80ee8f3b695e 433 /** @defgroup TIM_ETR_Prescaler TIM ETR Prescaler
EricLew 0:80ee8f3b695e 434 * @{
EricLew 0:80ee8f3b695e 435 */
EricLew 0:80ee8f3b695e 436 #define TIM_ETRPRESCALER_DIV1 ((uint32_t)0x0000) /*!< No prescaler is used */
EricLew 0:80ee8f3b695e 437 #define TIM_ETRPRESCALER_DIV2 (TIM_SMCR_ETPS_0) /*!< ETR input source is divided by 2 */
EricLew 0:80ee8f3b695e 438 #define TIM_ETRPRESCALER_DIV4 (TIM_SMCR_ETPS_1) /*!< ETR input source is divided by 4 */
EricLew 0:80ee8f3b695e 439 #define TIM_ETRPRESCALER_DIV8 (TIM_SMCR_ETPS) /*!< ETR input source is divided by 8 */
EricLew 0:80ee8f3b695e 440 /**
EricLew 0:80ee8f3b695e 441 * @}
EricLew 0:80ee8f3b695e 442 */
EricLew 0:80ee8f3b695e 443
EricLew 0:80ee8f3b695e 444 /** @defgroup TIM_Counter_Mode TIM Counter Mode
EricLew 0:80ee8f3b695e 445 * @{
EricLew 0:80ee8f3b695e 446 */
EricLew 0:80ee8f3b695e 447 #define TIM_COUNTERMODE_UP ((uint32_t)0x0000)
EricLew 0:80ee8f3b695e 448 #define TIM_COUNTERMODE_DOWN TIM_CR1_DIR
EricLew 0:80ee8f3b695e 449 #define TIM_COUNTERMODE_CENTERALIGNED1 TIM_CR1_CMS_0
EricLew 0:80ee8f3b695e 450 #define TIM_COUNTERMODE_CENTERALIGNED2 TIM_CR1_CMS_1
EricLew 0:80ee8f3b695e 451 #define TIM_COUNTERMODE_CENTERALIGNED3 TIM_CR1_CMS
EricLew 0:80ee8f3b695e 452 /**
EricLew 0:80ee8f3b695e 453 * @}
EricLew 0:80ee8f3b695e 454 */
EricLew 0:80ee8f3b695e 455
EricLew 0:80ee8f3b695e 456 /** @defgroup TIM_ClockDivision TIM Clock Division
EricLew 0:80ee8f3b695e 457 * @{
EricLew 0:80ee8f3b695e 458 */
EricLew 0:80ee8f3b695e 459 #define TIM_CLOCKDIVISION_DIV1 ((uint32_t)0x0000)
EricLew 0:80ee8f3b695e 460 #define TIM_CLOCKDIVISION_DIV2 (TIM_CR1_CKD_0)
EricLew 0:80ee8f3b695e 461 #define TIM_CLOCKDIVISION_DIV4 (TIM_CR1_CKD_1)
EricLew 0:80ee8f3b695e 462 /**
EricLew 0:80ee8f3b695e 463 * @}
EricLew 0:80ee8f3b695e 464 */
EricLew 0:80ee8f3b695e 465
EricLew 0:80ee8f3b695e 466 /** @defgroup TIM_Output_Compare_State TIM Output Compare State
EricLew 0:80ee8f3b695e 467 * @{
EricLew 0:80ee8f3b695e 468 */
EricLew 0:80ee8f3b695e 469 #define TIM_OUTPUTSTATE_DISABLE ((uint32_t)0x0000)
EricLew 0:80ee8f3b695e 470 #define TIM_OUTPUTSTATE_ENABLE (TIM_CCER_CC1E)
EricLew 0:80ee8f3b695e 471 /**
EricLew 0:80ee8f3b695e 472 * @}
EricLew 0:80ee8f3b695e 473 */
EricLew 0:80ee8f3b695e 474
EricLew 0:80ee8f3b695e 475 /** @defgroup TIM_Output_Fast_State TIM Output Fast State
EricLew 0:80ee8f3b695e 476 * @{
EricLew 0:80ee8f3b695e 477 */
EricLew 0:80ee8f3b695e 478 #define TIM_OCFAST_DISABLE ((uint32_t)0x0000)
EricLew 0:80ee8f3b695e 479 #define TIM_OCFAST_ENABLE (TIM_CCMR1_OC1FE)
EricLew 0:80ee8f3b695e 480 /**
EricLew 0:80ee8f3b695e 481 * @}
EricLew 0:80ee8f3b695e 482 */
EricLew 0:80ee8f3b695e 483
EricLew 0:80ee8f3b695e 484 /** @defgroup TIM_Output_Compare_N_State TIM Complementary Output Compare State
EricLew 0:80ee8f3b695e 485 * @{
EricLew 0:80ee8f3b695e 486 */
EricLew 0:80ee8f3b695e 487 #define TIM_OUTPUTNSTATE_DISABLE ((uint32_t)0x0000)
EricLew 0:80ee8f3b695e 488 #define TIM_OUTPUTNSTATE_ENABLE (TIM_CCER_CC1NE)
EricLew 0:80ee8f3b695e 489 /**
EricLew 0:80ee8f3b695e 490 * @}
EricLew 0:80ee8f3b695e 491 */
EricLew 0:80ee8f3b695e 492
EricLew 0:80ee8f3b695e 493 /** @defgroup TIM_Output_Compare_Polarity TIM Output Compare Polarity
EricLew 0:80ee8f3b695e 494 * @{
EricLew 0:80ee8f3b695e 495 */
EricLew 0:80ee8f3b695e 496 #define TIM_OCPOLARITY_HIGH ((uint32_t)0x0000)
EricLew 0:80ee8f3b695e 497 #define TIM_OCPOLARITY_LOW (TIM_CCER_CC1P)
EricLew 0:80ee8f3b695e 498 /**
EricLew 0:80ee8f3b695e 499 * @}
EricLew 0:80ee8f3b695e 500 */
EricLew 0:80ee8f3b695e 501
EricLew 0:80ee8f3b695e 502 /** @defgroup TIM_Output_Compare_N_Polarity TIM Complementary Output Compare Polarity
EricLew 0:80ee8f3b695e 503 * @{
EricLew 0:80ee8f3b695e 504 */
EricLew 0:80ee8f3b695e 505 #define TIM_OCNPOLARITY_HIGH ((uint32_t)0x0000)
EricLew 0:80ee8f3b695e 506 #define TIM_OCNPOLARITY_LOW (TIM_CCER_CC1NP)
EricLew 0:80ee8f3b695e 507 /**
EricLew 0:80ee8f3b695e 508 * @}
EricLew 0:80ee8f3b695e 509 */
EricLew 0:80ee8f3b695e 510
EricLew 0:80ee8f3b695e 511 /** @defgroup TIM_Output_Compare_Idle_State TIM Output Compare Idle State
EricLew 0:80ee8f3b695e 512 * @{
EricLew 0:80ee8f3b695e 513 */
EricLew 0:80ee8f3b695e 514 #define TIM_OCIDLESTATE_SET (TIM_CR2_OIS1)
EricLew 0:80ee8f3b695e 515 #define TIM_OCIDLESTATE_RESET ((uint32_t)0x0000)
EricLew 0:80ee8f3b695e 516 /**
EricLew 0:80ee8f3b695e 517 * @}
EricLew 0:80ee8f3b695e 518 */
EricLew 0:80ee8f3b695e 519
EricLew 0:80ee8f3b695e 520 /** @defgroup TIM_Output_Compare_N_Idle_State TIM Complementary Output Compare Idle State
EricLew 0:80ee8f3b695e 521 * @{
EricLew 0:80ee8f3b695e 522 */
EricLew 0:80ee8f3b695e 523 #define TIM_OCNIDLESTATE_SET (TIM_CR2_OIS1N)
EricLew 0:80ee8f3b695e 524 #define TIM_OCNIDLESTATE_RESET ((uint32_t)0x0000)
EricLew 0:80ee8f3b695e 525 /**
EricLew 0:80ee8f3b695e 526 * @}
EricLew 0:80ee8f3b695e 527 */
EricLew 0:80ee8f3b695e 528
EricLew 0:80ee8f3b695e 529 /** @defgroup TIM_Input_Capture_Polarity TIM Input Capture Polarity
EricLew 0:80ee8f3b695e 530 * @{
EricLew 0:80ee8f3b695e 531 */
EricLew 0:80ee8f3b695e 532 #define TIM_ICPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING
EricLew 0:80ee8f3b695e 533 #define TIM_ICPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING
EricLew 0:80ee8f3b695e 534 #define TIM_ICPOLARITY_BOTHEDGE TIM_INPUTCHANNELPOLARITY_BOTHEDGE
EricLew 0:80ee8f3b695e 535 /**
EricLew 0:80ee8f3b695e 536 * @}
EricLew 0:80ee8f3b695e 537 */
EricLew 0:80ee8f3b695e 538
EricLew 0:80ee8f3b695e 539 /** @defgroup TIM_Input_Capture_Selection TIM Input Capture Selection
EricLew 0:80ee8f3b695e 540 * @{
EricLew 0:80ee8f3b695e 541 */
EricLew 0:80ee8f3b695e 542 #define TIM_ICSELECTION_DIRECTTI (TIM_CCMR1_CC1S_0) /*!< TIM Input 1, 2, 3 or 4 is selected to be
EricLew 0:80ee8f3b695e 543 connected to IC1, IC2, IC3 or IC4, respectively */
EricLew 0:80ee8f3b695e 544 #define TIM_ICSELECTION_INDIRECTTI (TIM_CCMR1_CC1S_1) /*!< TIM Input 1, 2, 3 or 4 is selected to be
EricLew 0:80ee8f3b695e 545 connected to IC2, IC1, IC4 or IC3, respectively */
EricLew 0:80ee8f3b695e 546 #define TIM_ICSELECTION_TRC (TIM_CCMR1_CC1S) /*!< TIM Input 1, 2, 3 or 4 is selected to be connected to TRC */
EricLew 0:80ee8f3b695e 547 /**
EricLew 0:80ee8f3b695e 548 * @}
EricLew 0:80ee8f3b695e 549 */
EricLew 0:80ee8f3b695e 550
EricLew 0:80ee8f3b695e 551 /** @defgroup TIM_Input_Capture_Prescaler TIM Input Capture Prescaler
EricLew 0:80ee8f3b695e 552 * @{
EricLew 0:80ee8f3b695e 553 */
EricLew 0:80ee8f3b695e 554 #define TIM_ICPSC_DIV1 ((uint32_t)0x0000) /*!< Capture performed each time an edge is detected on the capture input */
EricLew 0:80ee8f3b695e 555 #define TIM_ICPSC_DIV2 (TIM_CCMR1_IC1PSC_0) /*!< Capture performed once every 2 events */
EricLew 0:80ee8f3b695e 556 #define TIM_ICPSC_DIV4 (TIM_CCMR1_IC1PSC_1) /*!< Capture performed once every 4 events */
EricLew 0:80ee8f3b695e 557 #define TIM_ICPSC_DIV8 (TIM_CCMR1_IC1PSC) /*!< Capture performed once every 8 events */
EricLew 0:80ee8f3b695e 558 /**
EricLew 0:80ee8f3b695e 559 * @}
EricLew 0:80ee8f3b695e 560 */
EricLew 0:80ee8f3b695e 561
EricLew 0:80ee8f3b695e 562 /** @defgroup TIM_One_Pulse_Mode TIM One Pulse Mode
EricLew 0:80ee8f3b695e 563 * @{
EricLew 0:80ee8f3b695e 564 */
EricLew 0:80ee8f3b695e 565 #define TIM_OPMODE_SINGLE (TIM_CR1_OPM)
EricLew 0:80ee8f3b695e 566 #define TIM_OPMODE_REPETITIVE ((uint32_t)0x0000)
EricLew 0:80ee8f3b695e 567 /**
EricLew 0:80ee8f3b695e 568 * @}
EricLew 0:80ee8f3b695e 569 */
EricLew 0:80ee8f3b695e 570
EricLew 0:80ee8f3b695e 571 /** @defgroup TIM_Encoder_Mode TIM Encoder Mode
EricLew 0:80ee8f3b695e 572 * @{
EricLew 0:80ee8f3b695e 573 */
EricLew 0:80ee8f3b695e 574 #define TIM_ENCODERMODE_TI1 (TIM_SMCR_SMS_0)
EricLew 0:80ee8f3b695e 575 #define TIM_ENCODERMODE_TI2 (TIM_SMCR_SMS_1)
EricLew 0:80ee8f3b695e 576 #define TIM_ENCODERMODE_TI12 (TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0)
EricLew 0:80ee8f3b695e 577 /**
EricLew 0:80ee8f3b695e 578 * @}
EricLew 0:80ee8f3b695e 579 */
EricLew 0:80ee8f3b695e 580
EricLew 0:80ee8f3b695e 581 /** @defgroup TIM_Interrupt_definition TIM interrupt Definition
EricLew 0:80ee8f3b695e 582 * @{
EricLew 0:80ee8f3b695e 583 */
EricLew 0:80ee8f3b695e 584 #define TIM_IT_UPDATE (TIM_DIER_UIE)
EricLew 0:80ee8f3b695e 585 #define TIM_IT_CC1 (TIM_DIER_CC1IE)
EricLew 0:80ee8f3b695e 586 #define TIM_IT_CC2 (TIM_DIER_CC2IE)
EricLew 0:80ee8f3b695e 587 #define TIM_IT_CC3 (TIM_DIER_CC3IE)
EricLew 0:80ee8f3b695e 588 #define TIM_IT_CC4 (TIM_DIER_CC4IE)
EricLew 0:80ee8f3b695e 589 #define TIM_IT_COM (TIM_DIER_COMIE)
EricLew 0:80ee8f3b695e 590 #define TIM_IT_TRIGGER (TIM_DIER_TIE)
EricLew 0:80ee8f3b695e 591 #define TIM_IT_BREAK (TIM_DIER_BIE)
EricLew 0:80ee8f3b695e 592 /**
EricLew 0:80ee8f3b695e 593 * @}
EricLew 0:80ee8f3b695e 594 */
EricLew 0:80ee8f3b695e 595
EricLew 0:80ee8f3b695e 596 /** @defgroup TIM_Commutation_Source TIM Commutation Source
EricLew 0:80ee8f3b695e 597 * @{
EricLew 0:80ee8f3b695e 598 */
EricLew 0:80ee8f3b695e 599 #define TIM_COMMUTATION_TRGI (TIM_CR2_CCUS)
EricLew 0:80ee8f3b695e 600 #define TIM_COMMUTATION_SOFTWARE ((uint32_t)0x0000)
EricLew 0:80ee8f3b695e 601 /**
EricLew 0:80ee8f3b695e 602 * @}
EricLew 0:80ee8f3b695e 603 */
EricLew 0:80ee8f3b695e 604
EricLew 0:80ee8f3b695e 605 /** @defgroup TIM_DMA_sources TIM DMA Sources
EricLew 0:80ee8f3b695e 606 * @{
EricLew 0:80ee8f3b695e 607 */
EricLew 0:80ee8f3b695e 608 #define TIM_DMA_UPDATE (TIM_DIER_UDE)
EricLew 0:80ee8f3b695e 609 #define TIM_DMA_CC1 (TIM_DIER_CC1DE)
EricLew 0:80ee8f3b695e 610 #define TIM_DMA_CC2 (TIM_DIER_CC2DE)
EricLew 0:80ee8f3b695e 611 #define TIM_DMA_CC3 (TIM_DIER_CC3DE)
EricLew 0:80ee8f3b695e 612 #define TIM_DMA_CC4 (TIM_DIER_CC4DE)
EricLew 0:80ee8f3b695e 613 #define TIM_DMA_COM (TIM_DIER_COMDE)
EricLew 0:80ee8f3b695e 614 #define TIM_DMA_TRIGGER (TIM_DIER_TDE)
EricLew 0:80ee8f3b695e 615 /**
EricLew 0:80ee8f3b695e 616 * @}
EricLew 0:80ee8f3b695e 617 */
EricLew 0:80ee8f3b695e 618
EricLew 0:80ee8f3b695e 619 /** @defgroup TIM_Flag_definition TIM Flag Definition
EricLew 0:80ee8f3b695e 620 * @{
EricLew 0:80ee8f3b695e 621 */
EricLew 0:80ee8f3b695e 622 #define TIM_FLAG_UPDATE (TIM_SR_UIF)
EricLew 0:80ee8f3b695e 623 #define TIM_FLAG_CC1 (TIM_SR_CC1IF)
EricLew 0:80ee8f3b695e 624 #define TIM_FLAG_CC2 (TIM_SR_CC2IF)
EricLew 0:80ee8f3b695e 625 #define TIM_FLAG_CC3 (TIM_SR_CC3IF)
EricLew 0:80ee8f3b695e 626 #define TIM_FLAG_CC4 (TIM_SR_CC4IF)
EricLew 0:80ee8f3b695e 627 #define TIM_FLAG_CC5 (TIM_SR_CC5IF)
EricLew 0:80ee8f3b695e 628 #define TIM_FLAG_CC6 (TIM_SR_CC6IF)
EricLew 0:80ee8f3b695e 629 #define TIM_FLAG_COM (TIM_SR_COMIF)
EricLew 0:80ee8f3b695e 630 #define TIM_FLAG_TRIGGER (TIM_SR_TIF)
EricLew 0:80ee8f3b695e 631 #define TIM_FLAG_BREAK (TIM_SR_BIF)
EricLew 0:80ee8f3b695e 632 #define TIM_FLAG_BREAK2 (TIM_SR_B2IF)
EricLew 0:80ee8f3b695e 633 #define TIM_FLAG_SYSTEM_BREAK (TIM_SR_SBIF)
EricLew 0:80ee8f3b695e 634 #define TIM_FLAG_CC1OF (TIM_SR_CC1OF)
EricLew 0:80ee8f3b695e 635 #define TIM_FLAG_CC2OF (TIM_SR_CC2OF)
EricLew 0:80ee8f3b695e 636 #define TIM_FLAG_CC3OF (TIM_SR_CC3OF)
EricLew 0:80ee8f3b695e 637 #define TIM_FLAG_CC4OF (TIM_SR_CC4OF)
EricLew 0:80ee8f3b695e 638 /**
EricLew 0:80ee8f3b695e 639 * @}
EricLew 0:80ee8f3b695e 640 */
EricLew 0:80ee8f3b695e 641
EricLew 0:80ee8f3b695e 642 /** @defgroup TIM_Channel TIM Channel
EricLew 0:80ee8f3b695e 643 * @{
EricLew 0:80ee8f3b695e 644 */
EricLew 0:80ee8f3b695e 645 #define TIM_CHANNEL_1 ((uint32_t)0x0000)
EricLew 0:80ee8f3b695e 646 #define TIM_CHANNEL_2 ((uint32_t)0x0004)
EricLew 0:80ee8f3b695e 647 #define TIM_CHANNEL_3 ((uint32_t)0x0008)
EricLew 0:80ee8f3b695e 648 #define TIM_CHANNEL_4 ((uint32_t)0x000C)
EricLew 0:80ee8f3b695e 649 #define TIM_CHANNEL_5 ((uint32_t)0x0010)
EricLew 0:80ee8f3b695e 650 #define TIM_CHANNEL_6 ((uint32_t)0x0014)
EricLew 0:80ee8f3b695e 651 #define TIM_CHANNEL_ALL ((uint32_t)0x003C)
EricLew 0:80ee8f3b695e 652 /**
EricLew 0:80ee8f3b695e 653 * @}
EricLew 0:80ee8f3b695e 654 */
EricLew 0:80ee8f3b695e 655
EricLew 0:80ee8f3b695e 656 /** @defgroup TIM_Clock_Source TIM Clock Source
EricLew 0:80ee8f3b695e 657 * @{
EricLew 0:80ee8f3b695e 658 */
EricLew 0:80ee8f3b695e 659 #define TIM_CLOCKSOURCE_ETRMODE2 (TIM_SMCR_ETPS_1)
EricLew 0:80ee8f3b695e 660 #define TIM_CLOCKSOURCE_INTERNAL (TIM_SMCR_ETPS_0)
EricLew 0:80ee8f3b695e 661 #define TIM_CLOCKSOURCE_ITR0 ((uint32_t)0x0000)
EricLew 0:80ee8f3b695e 662 #define TIM_CLOCKSOURCE_ITR1 (TIM_SMCR_TS_0)
EricLew 0:80ee8f3b695e 663 #define TIM_CLOCKSOURCE_ITR2 (TIM_SMCR_TS_1)
EricLew 0:80ee8f3b695e 664 #define TIM_CLOCKSOURCE_ITR3 (TIM_SMCR_TS_0 | TIM_SMCR_TS_1)
EricLew 0:80ee8f3b695e 665 #define TIM_CLOCKSOURCE_TI1ED (TIM_SMCR_TS_2)
EricLew 0:80ee8f3b695e 666 #define TIM_CLOCKSOURCE_TI1 (TIM_SMCR_TS_0 | TIM_SMCR_TS_2)
EricLew 0:80ee8f3b695e 667 #define TIM_CLOCKSOURCE_TI2 (TIM_SMCR_TS_1 | TIM_SMCR_TS_2)
EricLew 0:80ee8f3b695e 668 #define TIM_CLOCKSOURCE_ETRMODE1 (TIM_SMCR_TS)
EricLew 0:80ee8f3b695e 669 /**
EricLew 0:80ee8f3b695e 670 * @}
EricLew 0:80ee8f3b695e 671 */
EricLew 0:80ee8f3b695e 672
EricLew 0:80ee8f3b695e 673 /** @defgroup TIM_Clock_Polarity TIM Clock Polarity
EricLew 0:80ee8f3b695e 674 * @{
EricLew 0:80ee8f3b695e 675 */
EricLew 0:80ee8f3b695e 676 #define TIM_CLOCKPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /*!< Polarity for ETRx clock sources */
EricLew 0:80ee8f3b695e 677 #define TIM_CLOCKPOLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /*!< Polarity for ETRx clock sources */
EricLew 0:80ee8f3b695e 678 #define TIM_CLOCKPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING /*!< Polarity for TIx clock sources */
EricLew 0:80ee8f3b695e 679 #define TIM_CLOCKPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING /*!< Polarity for TIx clock sources */
EricLew 0:80ee8f3b695e 680 #define TIM_CLOCKPOLARITY_BOTHEDGE TIM_INPUTCHANNELPOLARITY_BOTHEDGE /*!< Polarity for TIx clock sources */
EricLew 0:80ee8f3b695e 681 /**
EricLew 0:80ee8f3b695e 682 * @}
EricLew 0:80ee8f3b695e 683 */
EricLew 0:80ee8f3b695e 684
EricLew 0:80ee8f3b695e 685 /** @defgroup TIM_Clock_Prescaler TIM Clock Prescaler
EricLew 0:80ee8f3b695e 686 * @{
EricLew 0:80ee8f3b695e 687 */
EricLew 0:80ee8f3b695e 688 #define TIM_CLOCKPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /*!< No prescaler is used */
EricLew 0:80ee8f3b695e 689 #define TIM_CLOCKPRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /*!< Prescaler for External ETR Clock: Capture performed once every 2 events. */
EricLew 0:80ee8f3b695e 690 #define TIM_CLOCKPRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /*!< Prescaler for External ETR Clock: Capture performed once every 4 events. */
EricLew 0:80ee8f3b695e 691 #define TIM_CLOCKPRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /*!< Prescaler for External ETR Clock: Capture performed once every 8 events. */
EricLew 0:80ee8f3b695e 692 /**
EricLew 0:80ee8f3b695e 693 * @}
EricLew 0:80ee8f3b695e 694 */
EricLew 0:80ee8f3b695e 695
EricLew 0:80ee8f3b695e 696 /** @defgroup TIM_ClearInput_Polarity TIM Clear Input Polarity
EricLew 0:80ee8f3b695e 697 * @{
EricLew 0:80ee8f3b695e 698 */
EricLew 0:80ee8f3b695e 699 #define TIM_CLEARINPUTPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /*!< Polarity for ETRx pin */
EricLew 0:80ee8f3b695e 700 #define TIM_CLEARINPUTPOLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /*!< Polarity for ETRx pin */
EricLew 0:80ee8f3b695e 701 /**
EricLew 0:80ee8f3b695e 702 * @}
EricLew 0:80ee8f3b695e 703 */
EricLew 0:80ee8f3b695e 704
EricLew 0:80ee8f3b695e 705 /** @defgroup TIM_ClearInput_Prescaler TIM Clear Input Prescaler
EricLew 0:80ee8f3b695e 706 * @{
EricLew 0:80ee8f3b695e 707 */
EricLew 0:80ee8f3b695e 708 #define TIM_CLEARINPUTPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /*!< No prescaler is used */
EricLew 0:80ee8f3b695e 709 #define TIM_CLEARINPUTPRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /*!< Prescaler for External ETR pin: Capture performed once every 2 events. */
EricLew 0:80ee8f3b695e 710 #define TIM_CLEARINPUTPRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /*!< Prescaler for External ETR pin: Capture performed once every 4 events. */
EricLew 0:80ee8f3b695e 711 #define TIM_CLEARINPUTPRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /*!< Prescaler for External ETR pin: Capture performed once every 8 events. */
EricLew 0:80ee8f3b695e 712 /**
EricLew 0:80ee8f3b695e 713 * @}
EricLew 0:80ee8f3b695e 714 */
EricLew 0:80ee8f3b695e 715
EricLew 0:80ee8f3b695e 716 /** @defgroup TIM_OSSR_Off_State_Selection_for_Run_mode_state TIM OSSR OffState Selection for Run mode state
EricLew 0:80ee8f3b695e 717 * @{
EricLew 0:80ee8f3b695e 718 */
EricLew 0:80ee8f3b695e 719 #define TIM_OSSR_ENABLE (TIM_BDTR_OSSR)
EricLew 0:80ee8f3b695e 720 #define TIM_OSSR_DISABLE ((uint32_t)0x0000)
EricLew 0:80ee8f3b695e 721 /**
EricLew 0:80ee8f3b695e 722 * @}
EricLew 0:80ee8f3b695e 723 */
EricLew 0:80ee8f3b695e 724
EricLew 0:80ee8f3b695e 725 /** @defgroup TIM_OSSI_Off_State_Selection_for_Idle_mode_state TIM OSSI OffState Selection for Idle mode state
EricLew 0:80ee8f3b695e 726 * @{
EricLew 0:80ee8f3b695e 727 */
EricLew 0:80ee8f3b695e 728 #define TIM_OSSI_ENABLE (TIM_BDTR_OSSI)
EricLew 0:80ee8f3b695e 729 #define TIM_OSSI_DISABLE ((uint32_t)0x0000)
EricLew 0:80ee8f3b695e 730 /**
EricLew 0:80ee8f3b695e 731 * @}
EricLew 0:80ee8f3b695e 732 */
EricLew 0:80ee8f3b695e 733 /** @defgroup TIM_Lock_level TIM Lock level
EricLew 0:80ee8f3b695e 734 * @{
EricLew 0:80ee8f3b695e 735 */
EricLew 0:80ee8f3b695e 736 #define TIM_LOCKLEVEL_OFF ((uint32_t)0x0000)
EricLew 0:80ee8f3b695e 737 #define TIM_LOCKLEVEL_1 (TIM_BDTR_LOCK_0)
EricLew 0:80ee8f3b695e 738 #define TIM_LOCKLEVEL_2 (TIM_BDTR_LOCK_1)
EricLew 0:80ee8f3b695e 739 #define TIM_LOCKLEVEL_3 (TIM_BDTR_LOCK)
EricLew 0:80ee8f3b695e 740 /**
EricLew 0:80ee8f3b695e 741 * @}
EricLew 0:80ee8f3b695e 742 */
EricLew 0:80ee8f3b695e 743
EricLew 0:80ee8f3b695e 744 /** @defgroup TIM_Break_Input_enable_disable TIM Break Input Enable
EricLew 0:80ee8f3b695e 745 * @{
EricLew 0:80ee8f3b695e 746 */
EricLew 0:80ee8f3b695e 747 #define TIM_BREAK_ENABLE (TIM_BDTR_BKE)
EricLew 0:80ee8f3b695e 748 #define TIM_BREAK_DISABLE ((uint32_t)0x0000)
EricLew 0:80ee8f3b695e 749 /**
EricLew 0:80ee8f3b695e 750 * @}
EricLew 0:80ee8f3b695e 751 */
EricLew 0:80ee8f3b695e 752
EricLew 0:80ee8f3b695e 753 /** @defgroup TIM_Break_Polarity TIM Break Input Polarity
EricLew 0:80ee8f3b695e 754 * @{
EricLew 0:80ee8f3b695e 755 */
EricLew 0:80ee8f3b695e 756 #define TIM_BREAKPOLARITY_LOW ((uint32_t)0x0000)
EricLew 0:80ee8f3b695e 757 #define TIM_BREAKPOLARITY_HIGH (TIM_BDTR_BKP)
EricLew 0:80ee8f3b695e 758 /**
EricLew 0:80ee8f3b695e 759 * @}
EricLew 0:80ee8f3b695e 760 */
EricLew 0:80ee8f3b695e 761
EricLew 0:80ee8f3b695e 762 /** @defgroup TIM_Break2_Input_enable_disable TIM Break input 2 Enable
EricLew 0:80ee8f3b695e 763 * @{
EricLew 0:80ee8f3b695e 764 */
EricLew 0:80ee8f3b695e 765 #define TIM_BREAK2_DISABLE ((uint32_t)0x00000000)
EricLew 0:80ee8f3b695e 766 #define TIM_BREAK2_ENABLE ((uint32_t)TIM_BDTR_BK2E)
EricLew 0:80ee8f3b695e 767 /**
EricLew 0:80ee8f3b695e 768 * @}
EricLew 0:80ee8f3b695e 769 */
EricLew 0:80ee8f3b695e 770
EricLew 0:80ee8f3b695e 771 /** @defgroup TIM_Break2_Polarity TIM Break Input 2 Polarity
EricLew 0:80ee8f3b695e 772 * @{
EricLew 0:80ee8f3b695e 773 */
EricLew 0:80ee8f3b695e 774 #define TIM_BREAK2POLARITY_LOW ((uint32_t)0x00000000)
EricLew 0:80ee8f3b695e 775 #define TIM_BREAK2POLARITY_HIGH ((uint32_t)TIM_BDTR_BK2P)
EricLew 0:80ee8f3b695e 776 /**
EricLew 0:80ee8f3b695e 777 * @}
EricLew 0:80ee8f3b695e 778 */
EricLew 0:80ee8f3b695e 779
EricLew 0:80ee8f3b695e 780 /** @defgroup TIM_AOE_Bit_Set_Reset TIM Automatic Output Enable
EricLew 0:80ee8f3b695e 781 * @{
EricLew 0:80ee8f3b695e 782 */
EricLew 0:80ee8f3b695e 783 #define TIM_AUTOMATICOUTPUT_ENABLE (TIM_BDTR_AOE)
EricLew 0:80ee8f3b695e 784 #define TIM_AUTOMATICOUTPUT_DISABLE ((uint32_t)0x0000)
EricLew 0:80ee8f3b695e 785 /**
EricLew 0:80ee8f3b695e 786 * @}
EricLew 0:80ee8f3b695e 787 */
EricLew 0:80ee8f3b695e 788
EricLew 0:80ee8f3b695e 789 /** @defgroup TIM_Group_Channel5 Group Channel 5 and Channel 1, 2 or 3
EricLew 0:80ee8f3b695e 790 * @{
EricLew 0:80ee8f3b695e 791 */
EricLew 0:80ee8f3b695e 792 #define TIM_GROUPCH5_NONE (uint32_t)0x00000000 /* !< No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC */
EricLew 0:80ee8f3b695e 793 #define TIM_GROUPCH5_OC1REFC (TIM_CCR5_GC5C1) /* !< OC1REFC is the logical AND of OC1REFC and OC5REF */
EricLew 0:80ee8f3b695e 794 #define TIM_GROUPCH5_OC2REFC (TIM_CCR5_GC5C2) /* !< OC2REFC is the logical AND of OC2REFC and OC5REF */
EricLew 0:80ee8f3b695e 795 #define TIM_GROUPCH5_OC3REFC (TIM_CCR5_GC5C3) /* !< OC3REFC is the logical AND of OC3REFC and OC5REF */
EricLew 0:80ee8f3b695e 796 /**
EricLew 0:80ee8f3b695e 797 * @}
EricLew 0:80ee8f3b695e 798 */
EricLew 0:80ee8f3b695e 799
EricLew 0:80ee8f3b695e 800 /** @defgroup TIM_Master_Mode_Selection TIM Master Mode Selection
EricLew 0:80ee8f3b695e 801 * @{
EricLew 0:80ee8f3b695e 802 */
EricLew 0:80ee8f3b695e 803 #define TIM_TRGO_RESET ((uint32_t)0x0000)
EricLew 0:80ee8f3b695e 804 #define TIM_TRGO_ENABLE (TIM_CR2_MMS_0)
EricLew 0:80ee8f3b695e 805 #define TIM_TRGO_UPDATE (TIM_CR2_MMS_1)
EricLew 0:80ee8f3b695e 806 #define TIM_TRGO_OC1 ((TIM_CR2_MMS_1 | TIM_CR2_MMS_0))
EricLew 0:80ee8f3b695e 807 #define TIM_TRGO_OC1REF (TIM_CR2_MMS_2)
EricLew 0:80ee8f3b695e 808 #define TIM_TRGO_OC2REF ((TIM_CR2_MMS_2 | TIM_CR2_MMS_0))
EricLew 0:80ee8f3b695e 809 #define TIM_TRGO_OC3REF ((TIM_CR2_MMS_2 | TIM_CR2_MMS_1))
EricLew 0:80ee8f3b695e 810 #define TIM_TRGO_OC4REF ((TIM_CR2_MMS_2 | TIM_CR2_MMS_1 | TIM_CR2_MMS_0))
EricLew 0:80ee8f3b695e 811 /**
EricLew 0:80ee8f3b695e 812 * @}
EricLew 0:80ee8f3b695e 813 */
EricLew 0:80ee8f3b695e 814
EricLew 0:80ee8f3b695e 815 /** @defgroup TIM_Master_Mode_Selection_2 TIM Master Mode Selection 2 (TRGO2)
EricLew 0:80ee8f3b695e 816 * @{
EricLew 0:80ee8f3b695e 817 */
EricLew 0:80ee8f3b695e 818 #define TIM_TRGO2_RESET ((uint32_t)0x00000000)
EricLew 0:80ee8f3b695e 819 #define TIM_TRGO2_ENABLE ((uint32_t)(TIM_CR2_MMS2_0))
EricLew 0:80ee8f3b695e 820 #define TIM_TRGO2_UPDATE ((uint32_t)(TIM_CR2_MMS2_1))
EricLew 0:80ee8f3b695e 821 #define TIM_TRGO2_OC1 ((uint32_t)(TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0))
EricLew 0:80ee8f3b695e 822 #define TIM_TRGO2_OC1REF ((uint32_t)(TIM_CR2_MMS2_2))
EricLew 0:80ee8f3b695e 823 #define TIM_TRGO2_OC2REF ((uint32_t)(TIM_CR2_MMS2_2 | TIM_CR2_MMS2_0))
EricLew 0:80ee8f3b695e 824 #define TIM_TRGO2_OC3REF ((uint32_t)(TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1))
EricLew 0:80ee8f3b695e 825 #define TIM_TRGO2_OC4REF ((uint32_t)(TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0))
EricLew 0:80ee8f3b695e 826 #define TIM_TRGO2_OC5REF ((uint32_t)(TIM_CR2_MMS2_3))
EricLew 0:80ee8f3b695e 827 #define TIM_TRGO2_OC6REF ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_0))
EricLew 0:80ee8f3b695e 828 #define TIM_TRGO2_OC4REF_RISINGFALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_1))
EricLew 0:80ee8f3b695e 829 #define TIM_TRGO2_OC6REF_RISINGFALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0))
EricLew 0:80ee8f3b695e 830 #define TIM_TRGO2_OC4REF_RISING_OC6REF_RISING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2))
EricLew 0:80ee8f3b695e 831 #define TIM_TRGO2_OC4REF_RISING_OC6REF_FALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 | TIM_CR2_MMS2_0))
EricLew 0:80ee8f3b695e 832 #define TIM_TRGO2_OC5REF_RISING_OC6REF_RISING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 |TIM_CR2_MMS2_1))
EricLew 0:80ee8f3b695e 833 #define TIM_TRGO2_OC5REF_RISING_OC6REF_FALLING ((uint32_t)(TIM_CR2_MMS2_3 | TIM_CR2_MMS2_2 | TIM_CR2_MMS2_1 | TIM_CR2_MMS2_0))
EricLew 0:80ee8f3b695e 834 /**
EricLew 0:80ee8f3b695e 835 * @}
EricLew 0:80ee8f3b695e 836 */
EricLew 0:80ee8f3b695e 837
EricLew 0:80ee8f3b695e 838 /** @defgroup TIM_Master_Slave_Mode TIM Master/Slave Mode
EricLew 0:80ee8f3b695e 839 * @{
EricLew 0:80ee8f3b695e 840 */
EricLew 0:80ee8f3b695e 841 #define TIM_MASTERSLAVEMODE_ENABLE ((uint32_t)0x0080)
EricLew 0:80ee8f3b695e 842 #define TIM_MASTERSLAVEMODE_DISABLE ((uint32_t)0x0000)
EricLew 0:80ee8f3b695e 843 /**
EricLew 0:80ee8f3b695e 844 * @}
EricLew 0:80ee8f3b695e 845 */
EricLew 0:80ee8f3b695e 846
EricLew 0:80ee8f3b695e 847 /** @defgroup TIM_Slave_Mode TIM Slave mode
EricLew 0:80ee8f3b695e 848 * @{
EricLew 0:80ee8f3b695e 849 */
EricLew 0:80ee8f3b695e 850 #define TIM_SLAVEMODE_DISABLE ((uint32_t)0x0000)
EricLew 0:80ee8f3b695e 851 #define TIM_SLAVEMODE_RESET ((uint32_t)(TIM_SMCR_SMS_2))
EricLew 0:80ee8f3b695e 852 #define TIM_SLAVEMODE_GATED ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_0))
EricLew 0:80ee8f3b695e 853 #define TIM_SLAVEMODE_TRIGGER ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1))
EricLew 0:80ee8f3b695e 854 #define TIM_SLAVEMODE_EXTERNAL1 ((uint32_t)(TIM_SMCR_SMS_2 | TIM_SMCR_SMS_1 | TIM_SMCR_SMS_0))
EricLew 0:80ee8f3b695e 855 #define TIM_SLAVEMODE_COMBINED_RESETTRIGGER ((uint32_t)(TIM_SMCR_SMS_3))
EricLew 0:80ee8f3b695e 856 /**
EricLew 0:80ee8f3b695e 857 * @}
EricLew 0:80ee8f3b695e 858 */
EricLew 0:80ee8f3b695e 859
EricLew 0:80ee8f3b695e 860 /** @defgroup TIM_Output_Compare_and_PWM_modes TIM Output Compare and PWM Modes
EricLew 0:80ee8f3b695e 861 * @{
EricLew 0:80ee8f3b695e 862 */
EricLew 0:80ee8f3b695e 863 #define TIM_OCMODE_TIMING ((uint32_t)0x0000)
EricLew 0:80ee8f3b695e 864 #define TIM_OCMODE_ACTIVE ((uint32_t)TIM_CCMR1_OC1M_0)
EricLew 0:80ee8f3b695e 865 #define TIM_OCMODE_INACTIVE ((uint32_t)TIM_CCMR1_OC1M_1)
EricLew 0:80ee8f3b695e 866 #define TIM_OCMODE_TOGGLE ((uint32_t)TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0)
EricLew 0:80ee8f3b695e 867 #define TIM_OCMODE_PWM1 ((uint32_t)TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1)
EricLew 0:80ee8f3b695e 868 #define TIM_OCMODE_PWM2 ((uint32_t)TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0)
EricLew 0:80ee8f3b695e 869 #define TIM_OCMODE_FORCED_ACTIVE ((uint32_t)TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0)
EricLew 0:80ee8f3b695e 870 #define TIM_OCMODE_FORCED_INACTIVE ((uint32_t)TIM_CCMR1_OC1M_2)
EricLew 0:80ee8f3b695e 871
EricLew 0:80ee8f3b695e 872 #define TIM_OCMODE_RETRIGERRABLE_OPM1 ((uint32_t)TIM_CCMR1_OC1M_3)
EricLew 0:80ee8f3b695e 873 #define TIM_OCMODE_RETRIGERRABLE_OPM2 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0)
EricLew 0:80ee8f3b695e 874 #define TIM_OCMODE_COMBINED_PWM1 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_2)
EricLew 0:80ee8f3b695e 875 #define TIM_OCMODE_COMBINED_PWM2 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_0 | TIM_CCMR1_OC1M_2)
EricLew 0:80ee8f3b695e 876 #define TIM_OCMODE_ASSYMETRIC_PWM1 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2)
EricLew 0:80ee8f3b695e 877 #define TIM_OCMODE_ASSYMETRIC_PWM2 ((uint32_t)TIM_CCMR1_OC1M_3 | TIM_CCMR1_OC1M)
EricLew 0:80ee8f3b695e 878 /**
EricLew 0:80ee8f3b695e 879 * @}
EricLew 0:80ee8f3b695e 880 */
EricLew 0:80ee8f3b695e 881
EricLew 0:80ee8f3b695e 882 /** @defgroup TIM_Trigger_Selection TIM Trigger Selection
EricLew 0:80ee8f3b695e 883 * @{
EricLew 0:80ee8f3b695e 884 */
EricLew 0:80ee8f3b695e 885 #define TIM_TS_ITR0 ((uint32_t)0x0000)
EricLew 0:80ee8f3b695e 886 #define TIM_TS_ITR1 ((uint32_t)0x0010)
EricLew 0:80ee8f3b695e 887 #define TIM_TS_ITR2 ((uint32_t)0x0020)
EricLew 0:80ee8f3b695e 888 #define TIM_TS_ITR3 ((uint32_t)0x0030)
EricLew 0:80ee8f3b695e 889 #define TIM_TS_TI1F_ED ((uint32_t)0x0040)
EricLew 0:80ee8f3b695e 890 #define TIM_TS_TI1FP1 ((uint32_t)0x0050)
EricLew 0:80ee8f3b695e 891 #define TIM_TS_TI2FP2 ((uint32_t)0x0060)
EricLew 0:80ee8f3b695e 892 #define TIM_TS_ETRF ((uint32_t)0x0070)
EricLew 0:80ee8f3b695e 893 #define TIM_TS_NONE ((uint32_t)0xFFFF)
EricLew 0:80ee8f3b695e 894 /**
EricLew 0:80ee8f3b695e 895 * @}
EricLew 0:80ee8f3b695e 896 */
EricLew 0:80ee8f3b695e 897
EricLew 0:80ee8f3b695e 898 /** @defgroup TIM_Trigger_Polarity TIM Trigger Polarity
EricLew 0:80ee8f3b695e 899 * @{
EricLew 0:80ee8f3b695e 900 */
EricLew 0:80ee8f3b695e 901 #define TIM_TRIGGERPOLARITY_INVERTED TIM_ETRPOLARITY_INVERTED /*!< Polarity for ETRx trigger sources */
EricLew 0:80ee8f3b695e 902 #define TIM_TRIGGERPOLARITY_NONINVERTED TIM_ETRPOLARITY_NONINVERTED /*!< Polarity for ETRx trigger sources */
EricLew 0:80ee8f3b695e 903 #define TIM_TRIGGERPOLARITY_RISING TIM_INPUTCHANNELPOLARITY_RISING /*!< Polarity for TIxFPx or TI1_ED trigger sources */
EricLew 0:80ee8f3b695e 904 #define TIM_TRIGGERPOLARITY_FALLING TIM_INPUTCHANNELPOLARITY_FALLING /*!< Polarity for TIxFPx or TI1_ED trigger sources */
EricLew 0:80ee8f3b695e 905 #define TIM_TRIGGERPOLARITY_BOTHEDGE TIM_INPUTCHANNELPOLARITY_BOTHEDGE /*!< Polarity for TIxFPx or TI1_ED trigger sources */
EricLew 0:80ee8f3b695e 906 /**
EricLew 0:80ee8f3b695e 907 * @}
EricLew 0:80ee8f3b695e 908 */
EricLew 0:80ee8f3b695e 909
EricLew 0:80ee8f3b695e 910 /** @defgroup TIM_Trigger_Prescaler TIM Trigger Prescaler
EricLew 0:80ee8f3b695e 911 * @{
EricLew 0:80ee8f3b695e 912 */
EricLew 0:80ee8f3b695e 913 #define TIM_TRIGGERPRESCALER_DIV1 TIM_ETRPRESCALER_DIV1 /*!< No prescaler is used */
EricLew 0:80ee8f3b695e 914 #define TIM_TRIGGERPRESCALER_DIV2 TIM_ETRPRESCALER_DIV2 /*!< Prescaler for External ETR Trigger: Capture performed once every 2 events. */
EricLew 0:80ee8f3b695e 915 #define TIM_TRIGGERPRESCALER_DIV4 TIM_ETRPRESCALER_DIV4 /*!< Prescaler for External ETR Trigger: Capture performed once every 4 events. */
EricLew 0:80ee8f3b695e 916 #define TIM_TRIGGERPRESCALER_DIV8 TIM_ETRPRESCALER_DIV8 /*!< Prescaler for External ETR Trigger: Capture performed once every 8 events. */
EricLew 0:80ee8f3b695e 917 /**
EricLew 0:80ee8f3b695e 918 * @}
EricLew 0:80ee8f3b695e 919 */
EricLew 0:80ee8f3b695e 920
EricLew 0:80ee8f3b695e 921 /** @defgroup TIM_TI1_Selection TIM TI1 Input Selection
EricLew 0:80ee8f3b695e 922 * @{
EricLew 0:80ee8f3b695e 923 */
EricLew 0:80ee8f3b695e 924 #define TIM_TI1SELECTION_CH1 ((uint32_t)0x0000)
EricLew 0:80ee8f3b695e 925 #define TIM_TI1SELECTION_XORCOMBINATION (TIM_CR2_TI1S)
EricLew 0:80ee8f3b695e 926 /**
EricLew 0:80ee8f3b695e 927 * @}
EricLew 0:80ee8f3b695e 928 */
EricLew 0:80ee8f3b695e 929
EricLew 0:80ee8f3b695e 930 /** @defgroup TIM_DMA_Burst_Length TIM DMA Burst Length
EricLew 0:80ee8f3b695e 931 * @{
EricLew 0:80ee8f3b695e 932 */
EricLew 0:80ee8f3b695e 933 #define TIM_DMABURSTLENGTH_1TRANSFER (0x00000000)
EricLew 0:80ee8f3b695e 934 #define TIM_DMABURSTLENGTH_2TRANSFERS (0x00000100)
EricLew 0:80ee8f3b695e 935 #define TIM_DMABURSTLENGTH_3TRANSFERS (0x00000200)
EricLew 0:80ee8f3b695e 936 #define TIM_DMABURSTLENGTH_4TRANSFERS (0x00000300)
EricLew 0:80ee8f3b695e 937 #define TIM_DMABURSTLENGTH_5TRANSFERS (0x00000400)
EricLew 0:80ee8f3b695e 938 #define TIM_DMABURSTLENGTH_6TRANSFERS (0x00000500)
EricLew 0:80ee8f3b695e 939 #define TIM_DMABURSTLENGTH_7TRANSFERS (0x00000600)
EricLew 0:80ee8f3b695e 940 #define TIM_DMABURSTLENGTH_8TRANSFERS (0x00000700)
EricLew 0:80ee8f3b695e 941 #define TIM_DMABURSTLENGTH_9TRANSFERS (0x00000800)
EricLew 0:80ee8f3b695e 942 #define TIM_DMABURSTLENGTH_10TRANSFERS (0x00000900)
EricLew 0:80ee8f3b695e 943 #define TIM_DMABURSTLENGTH_11TRANSFERS (0x00000A00)
EricLew 0:80ee8f3b695e 944 #define TIM_DMABURSTLENGTH_12TRANSFERS (0x00000B00)
EricLew 0:80ee8f3b695e 945 #define TIM_DMABURSTLENGTH_13TRANSFERS (0x00000C00)
EricLew 0:80ee8f3b695e 946 #define TIM_DMABURSTLENGTH_14TRANSFERS (0x00000D00)
EricLew 0:80ee8f3b695e 947 #define TIM_DMABURSTLENGTH_15TRANSFERS (0x00000E00)
EricLew 0:80ee8f3b695e 948 #define TIM_DMABURSTLENGTH_16TRANSFERS (0x00000F00)
EricLew 0:80ee8f3b695e 949 #define TIM_DMABURSTLENGTH_17TRANSFERS (0x00001000)
EricLew 0:80ee8f3b695e 950 #define TIM_DMABURSTLENGTH_18TRANSFERS (0x00001100)
EricLew 0:80ee8f3b695e 951 /**
EricLew 0:80ee8f3b695e 952 * @}
EricLew 0:80ee8f3b695e 953 */
EricLew 0:80ee8f3b695e 954
EricLew 0:80ee8f3b695e 955 /** @defgroup DMA_Handle_index TIM DMA Handle Index
EricLew 0:80ee8f3b695e 956 * @{
EricLew 0:80ee8f3b695e 957 */
EricLew 0:80ee8f3b695e 958 #define TIM_DMA_ID_UPDATE ((uint16_t) 0x0) /*!< Index of the DMA handle used for Update DMA requests */
EricLew 0:80ee8f3b695e 959 #define TIM_DMA_ID_CC1 ((uint16_t) 0x1) /*!< Index of the DMA handle used for Capture/Compare 1 DMA requests */
EricLew 0:80ee8f3b695e 960 #define TIM_DMA_ID_CC2 ((uint16_t) 0x2) /*!< Index of the DMA handle used for Capture/Compare 2 DMA requests */
EricLew 0:80ee8f3b695e 961 #define TIM_DMA_ID_CC3 ((uint16_t) 0x3) /*!< Index of the DMA handle used for Capture/Compare 3 DMA requests */
EricLew 0:80ee8f3b695e 962 #define TIM_DMA_ID_CC4 ((uint16_t) 0x4) /*!< Index of the DMA handle used for Capture/Compare 4 DMA requests */
EricLew 0:80ee8f3b695e 963 #define TIM_DMA_ID_COMMUTATION ((uint16_t) 0x5) /*!< Index of the DMA handle used for Commutation DMA requests */
EricLew 0:80ee8f3b695e 964 #define TIM_DMA_ID_TRIGGER ((uint16_t) 0x6) /*!< Index of the DMA handle used for Trigger DMA requests */
EricLew 0:80ee8f3b695e 965 /**
EricLew 0:80ee8f3b695e 966 * @}
EricLew 0:80ee8f3b695e 967 */
EricLew 0:80ee8f3b695e 968
EricLew 0:80ee8f3b695e 969 /** @defgroup Channel_CC_State TIM Capture/Compare Channel State
EricLew 0:80ee8f3b695e 970 * @{
EricLew 0:80ee8f3b695e 971 */
EricLew 0:80ee8f3b695e 972 #define TIM_CCx_ENABLE ((uint32_t)0x0001)
EricLew 0:80ee8f3b695e 973 #define TIM_CCx_DISABLE ((uint32_t)0x0000)
EricLew 0:80ee8f3b695e 974 #define TIM_CCxN_ENABLE ((uint32_t)0x0004)
EricLew 0:80ee8f3b695e 975 #define TIM_CCxN_DISABLE ((uint32_t)0x0000)
EricLew 0:80ee8f3b695e 976 /**
EricLew 0:80ee8f3b695e 977 * @}
EricLew 0:80ee8f3b695e 978 */
EricLew 0:80ee8f3b695e 979
EricLew 0:80ee8f3b695e 980 /** @defgroup TIM_Break_System TIM Break System
EricLew 0:80ee8f3b695e 981 * @{
EricLew 0:80ee8f3b695e 982 */
EricLew 0:80ee8f3b695e 983 #define TIM_BREAK_SYSTEM_ECC SYSCFG_CFGR2_ECCL /*!< Enables and locks the ECC error signal with Break Input of TIM1/8/15/16/17 */
EricLew 0:80ee8f3b695e 984 #define TIM_BREAK_SYSTEM_PVD SYSCFG_CFGR2_PVDL /*!< Enables and locks the PVD connection with TIM1/8/15/16/17 Break Input and also the PVDE and PLS bits of the Power Control Interface */
EricLew 0:80ee8f3b695e 985 #define TIM_BREAK_SYSTEM_SRAM2_PARITY_ERROR SYSCFG_CFGR2_SPL /*!< Enables and locks the SRAM2_PARITY error signal with Break Input of TIM1/8/15/16/17 */
EricLew 0:80ee8f3b695e 986 #define TIM_BREAK_SYSTEM_LOCKUP SYSCFG_CFGR2_CLL /*!< Enables and locks the LOCKUP output of CortexM4 with Break Input of TIM1/15/16/17 */
EricLew 0:80ee8f3b695e 987 /**
EricLew 0:80ee8f3b695e 988 * @}
EricLew 0:80ee8f3b695e 989 */
EricLew 0:80ee8f3b695e 990
EricLew 0:80ee8f3b695e 991 /**
EricLew 0:80ee8f3b695e 992 * @}
EricLew 0:80ee8f3b695e 993 */
EricLew 0:80ee8f3b695e 994 /* End of exported constants -------------------------------------------------*/
EricLew 0:80ee8f3b695e 995
EricLew 0:80ee8f3b695e 996 /* Exported macros -----------------------------------------------------------*/
EricLew 0:80ee8f3b695e 997 /** @defgroup TIM_Exported_Macros TIM Exported Macros
EricLew 0:80ee8f3b695e 998 * @{
EricLew 0:80ee8f3b695e 999 */
EricLew 0:80ee8f3b695e 1000
EricLew 0:80ee8f3b695e 1001 /** @brief Reset TIM handle state.
EricLew 0:80ee8f3b695e 1002 * @param __HANDLE__: TIM handle.
EricLew 0:80ee8f3b695e 1003 * @retval None
EricLew 0:80ee8f3b695e 1004 */
EricLew 0:80ee8f3b695e 1005 #define __HAL_TIM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_TIM_STATE_RESET)
EricLew 0:80ee8f3b695e 1006
EricLew 0:80ee8f3b695e 1007 /**
EricLew 0:80ee8f3b695e 1008 * @brief Enable the TIM peripheral.
EricLew 0:80ee8f3b695e 1009 * @param __HANDLE__: TIM handle
EricLew 0:80ee8f3b695e 1010 * @retval None
EricLew 0:80ee8f3b695e 1011 */
EricLew 0:80ee8f3b695e 1012 #define __HAL_TIM_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1|=(TIM_CR1_CEN))
EricLew 0:80ee8f3b695e 1013
EricLew 0:80ee8f3b695e 1014 /**
EricLew 0:80ee8f3b695e 1015 * @brief Enable the TIM main Output.
EricLew 0:80ee8f3b695e 1016 * @param __HANDLE__: TIM handle
EricLew 0:80ee8f3b695e 1017 * @retval None
EricLew 0:80ee8f3b695e 1018 */
EricLew 0:80ee8f3b695e 1019 #define __HAL_TIM_MOE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->BDTR|=(TIM_BDTR_MOE))
EricLew 0:80ee8f3b695e 1020
EricLew 0:80ee8f3b695e 1021 /**
EricLew 0:80ee8f3b695e 1022 * @brief Disable the TIM peripheral.
EricLew 0:80ee8f3b695e 1023 * @param __HANDLE__: TIM handle
EricLew 0:80ee8f3b695e 1024 * @retval None
EricLew 0:80ee8f3b695e 1025 */
EricLew 0:80ee8f3b695e 1026 #define __HAL_TIM_DISABLE(__HANDLE__) \
EricLew 0:80ee8f3b695e 1027 do { \
EricLew 0:80ee8f3b695e 1028 if (((__HANDLE__)->Instance->CCER & TIM_CCER_CCxE_MASK) == 0) \
EricLew 0:80ee8f3b695e 1029 { \
EricLew 0:80ee8f3b695e 1030 if(((__HANDLE__)->Instance->CCER & TIM_CCER_CCxNE_MASK) == 0) \
EricLew 0:80ee8f3b695e 1031 { \
EricLew 0:80ee8f3b695e 1032 (__HANDLE__)->Instance->CR1 &= ~(TIM_CR1_CEN); \
EricLew 0:80ee8f3b695e 1033 } \
EricLew 0:80ee8f3b695e 1034 } \
EricLew 0:80ee8f3b695e 1035 } while(0)
EricLew 0:80ee8f3b695e 1036
EricLew 0:80ee8f3b695e 1037 /**
EricLew 0:80ee8f3b695e 1038 * @brief Disable the TIM main Output.
EricLew 0:80ee8f3b695e 1039 * @param __HANDLE__: TIM handle
EricLew 0:80ee8f3b695e 1040 * @retval None
EricLew 0:80ee8f3b695e 1041 * @note The Main Output Enable of a timer instance is disabled only if all the CCx and CCxN channels have been disabled
EricLew 0:80ee8f3b695e 1042 */
EricLew 0:80ee8f3b695e 1043 #define __HAL_TIM_MOE_DISABLE(__HANDLE__) \
EricLew 0:80ee8f3b695e 1044 do { \
EricLew 0:80ee8f3b695e 1045 if (((__HANDLE__)->Instance->CCER & TIM_CCER_CCxE_MASK) == 0) \
EricLew 0:80ee8f3b695e 1046 { \
EricLew 0:80ee8f3b695e 1047 if(((__HANDLE__)->Instance->CCER & TIM_CCER_CCxNE_MASK) == 0) \
EricLew 0:80ee8f3b695e 1048 { \
EricLew 0:80ee8f3b695e 1049 (__HANDLE__)->Instance->BDTR &= ~(TIM_BDTR_MOE); \
EricLew 0:80ee8f3b695e 1050 } \
EricLew 0:80ee8f3b695e 1051 } \
EricLew 0:80ee8f3b695e 1052 } while(0)
EricLew 0:80ee8f3b695e 1053
EricLew 0:80ee8f3b695e 1054 /** @brief Enable the specified TIM interrupt.
EricLew 0:80ee8f3b695e 1055 * @param __HANDLE__: specifies the TIM Handle.
EricLew 0:80ee8f3b695e 1056 * @param __INTERRUPT__: specifies the TIM interrupt source to enable.
EricLew 0:80ee8f3b695e 1057 * This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 1058 * @arg TIM_IT_UPDATE: Update interrupt
EricLew 0:80ee8f3b695e 1059 * @arg TIM_IT_CC1: Capture/Compare 1 interrupt
EricLew 0:80ee8f3b695e 1060 * @arg TIM_IT_CC2: Capture/Compare 2 interrupt
EricLew 0:80ee8f3b695e 1061 * @arg TIM_IT_CC3: Capture/Compare 3 interrupt
EricLew 0:80ee8f3b695e 1062 * @arg TIM_IT_CC4: Capture/Compare 4 interrupt
EricLew 0:80ee8f3b695e 1063 * @arg TIM_IT_COM: Commutation interrupt
EricLew 0:80ee8f3b695e 1064 * @arg TIM_IT_TRIGGER: Trigger interrupt
EricLew 0:80ee8f3b695e 1065 * @arg TIM_IT_BREAK: Break interrupt
EricLew 0:80ee8f3b695e 1066 * @retval None
EricLew 0:80ee8f3b695e 1067 */
EricLew 0:80ee8f3b695e 1068 #define __HAL_TIM_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DIER |= (__INTERRUPT__))
EricLew 0:80ee8f3b695e 1069
EricLew 0:80ee8f3b695e 1070
EricLew 0:80ee8f3b695e 1071 /** @brief Disable the specified TIM interrupt.
EricLew 0:80ee8f3b695e 1072 * @param __HANDLE__: specifies the TIM Handle.
EricLew 0:80ee8f3b695e 1073 * @param __INTERRUPT__: specifies the TIM interrupt source to disable.
EricLew 0:80ee8f3b695e 1074 * This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 1075 * @arg TIM_IT_UPDATE: Update interrupt
EricLew 0:80ee8f3b695e 1076 * @arg TIM_IT_CC1: Capture/Compare 1 interrupt
EricLew 0:80ee8f3b695e 1077 * @arg TIM_IT_CC2: Capture/Compare 2 interrupt
EricLew 0:80ee8f3b695e 1078 * @arg TIM_IT_CC3: Capture/Compare 3 interrupt
EricLew 0:80ee8f3b695e 1079 * @arg TIM_IT_CC4: Capture/Compare 4 interrupt
EricLew 0:80ee8f3b695e 1080 * @arg TIM_IT_COM: Commutation interrupt
EricLew 0:80ee8f3b695e 1081 * @arg TIM_IT_TRIGGER: Trigger interrupt
EricLew 0:80ee8f3b695e 1082 * @arg TIM_IT_BREAK: Break interrupt
EricLew 0:80ee8f3b695e 1083 * @retval None
EricLew 0:80ee8f3b695e 1084 */
EricLew 0:80ee8f3b695e 1085 #define __HAL_TIM_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->DIER &= ~(__INTERRUPT__))
EricLew 0:80ee8f3b695e 1086
EricLew 0:80ee8f3b695e 1087 /** @brief Enable the specified DMA request.
EricLew 0:80ee8f3b695e 1088 * @param __HANDLE__: specifies the TIM Handle.
EricLew 0:80ee8f3b695e 1089 * @param __DMA__: specifies the TIM DMA request to enable.
EricLew 0:80ee8f3b695e 1090 * This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 1091 * @arg TIM_DMA_UPDATE: Update DMA request
EricLew 0:80ee8f3b695e 1092 * @arg TIM_DMA_CC1: Capture/Compare 1 DMA request
EricLew 0:80ee8f3b695e 1093 * @arg TIM_DMA_CC2: Capture/Compare 2 DMA request
EricLew 0:80ee8f3b695e 1094 * @arg TIM_DMA_CC3: Capture/Compare 3 DMA request
EricLew 0:80ee8f3b695e 1095 * @arg TIM_DMA_CC4: Capture/Compare 4 DMA request
EricLew 0:80ee8f3b695e 1096 * @arg TIM_DMA_COM: Commutation DMA request
EricLew 0:80ee8f3b695e 1097 * @arg TIM_DMA_TRIGGER: Trigger DMA request
EricLew 0:80ee8f3b695e 1098 * @arg TIM_DMA_BREAK: Break DMA request
EricLew 0:80ee8f3b695e 1099 * @retval None
EricLew 0:80ee8f3b695e 1100 */
EricLew 0:80ee8f3b695e 1101 #define __HAL_TIM_ENABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->DIER |= (__DMA__))
EricLew 0:80ee8f3b695e 1102
EricLew 0:80ee8f3b695e 1103 /** @brief Disable the specified DMA request.
EricLew 0:80ee8f3b695e 1104 * @param __HANDLE__: specifies the TIM Handle.
EricLew 0:80ee8f3b695e 1105 * @param __DMA__: specifies the TIM DMA request to disable.
EricLew 0:80ee8f3b695e 1106 * This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 1107 * @arg TIM_DMA_UPDATE: Update DMA request
EricLew 0:80ee8f3b695e 1108 * @arg TIM_DMA_CC1: Capture/Compare 1 DMA request
EricLew 0:80ee8f3b695e 1109 * @arg TIM_DMA_CC2: Capture/Compare 2 DMA request
EricLew 0:80ee8f3b695e 1110 * @arg TIM_DMA_CC3: Capture/Compare 3 DMA request
EricLew 0:80ee8f3b695e 1111 * @arg TIM_DMA_CC4: Capture/Compare 4 DMA request
EricLew 0:80ee8f3b695e 1112 * @arg TIM_DMA_COM: Commutation DMA request
EricLew 0:80ee8f3b695e 1113 * @arg TIM_DMA_TRIGGER: Trigger DMA request
EricLew 0:80ee8f3b695e 1114 * @arg TIM_DMA_BREAK: Break DMA request
EricLew 0:80ee8f3b695e 1115 * @retval None
EricLew 0:80ee8f3b695e 1116 */
EricLew 0:80ee8f3b695e 1117 #define __HAL_TIM_DISABLE_DMA(__HANDLE__, __DMA__) ((__HANDLE__)->Instance->DIER &= ~(__DMA__))
EricLew 0:80ee8f3b695e 1118
EricLew 0:80ee8f3b695e 1119 /** @brief Check whether the specified TIM interrupt flag is set or not.
EricLew 0:80ee8f3b695e 1120 * @param __HANDLE__: specifies the TIM Handle.
EricLew 0:80ee8f3b695e 1121 * @param __FLAG__: specifies the TIM interrupt flag to check.
EricLew 0:80ee8f3b695e 1122 * This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 1123 * @arg TIM_FLAG_UPDATE: Update interrupt flag
EricLew 0:80ee8f3b695e 1124 * @arg TIM_FLAG_CC1: Capture/Compare 1 interrupt flag
EricLew 0:80ee8f3b695e 1125 * @arg TIM_FLAG_CC2: Capture/Compare 2 interrupt flag
EricLew 0:80ee8f3b695e 1126 * @arg TIM_FLAG_CC3: Capture/Compare 3 interrupt flag
EricLew 0:80ee8f3b695e 1127 * @arg TIM_FLAG_CC4: Capture/Compare 4 interrupt flag
EricLew 0:80ee8f3b695e 1128 * @arg TIM_FLAG_CC5: Compare 5 interrupt flag
EricLew 0:80ee8f3b695e 1129 * @arg TIM_FLAG_CC6: Compare 5 interrupt flag
EricLew 0:80ee8f3b695e 1130 * @arg TIM_FLAG_COM: Commutation interrupt flag
EricLew 0:80ee8f3b695e 1131 * @arg TIM_FLAG_TRIGGER: Trigger interrupt flag
EricLew 0:80ee8f3b695e 1132 * @arg TIM_FLAG_BREAK: Break interrupt flag
EricLew 0:80ee8f3b695e 1133 * @arg TIM_FLAG_BREAK2: Break 2 interrupt flag
EricLew 0:80ee8f3b695e 1134 * @arg TIM_FLAG_SYSTEM_BREAK: System Break interrupt flag
EricLew 0:80ee8f3b695e 1135 * @arg TIM_FLAG_CC1OF: Capture/Compare 1 overcapture flag
EricLew 0:80ee8f3b695e 1136 * @arg TIM_FLAG_CC2OF: Capture/Compare 2 overcapture flag
EricLew 0:80ee8f3b695e 1137 * @arg TIM_FLAG_CC3OF: Capture/Compare 3 overcapture flag
EricLew 0:80ee8f3b695e 1138 * @arg TIM_FLAG_CC4OF: Capture/Compare 4 overcapture flag
EricLew 0:80ee8f3b695e 1139 * @retval The new state of __FLAG__ (TRUE or FALSE).
EricLew 0:80ee8f3b695e 1140 */
EricLew 0:80ee8f3b695e 1141 #define __HAL_TIM_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR &(__FLAG__)) == (__FLAG__))
EricLew 0:80ee8f3b695e 1142
EricLew 0:80ee8f3b695e 1143 /** @brief Clear the specified TIM interrupt flag.
EricLew 0:80ee8f3b695e 1144 * @param __HANDLE__: specifies the TIM Handle.
EricLew 0:80ee8f3b695e 1145 * @param __FLAG__: specifies the TIM interrupt flag to clear.
EricLew 0:80ee8f3b695e 1146 * This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 1147 * @arg TIM_FLAG_UPDATE: Update interrupt flag
EricLew 0:80ee8f3b695e 1148 * @arg TIM_FLAG_CC1: Capture/Compare 1 interrupt flag
EricLew 0:80ee8f3b695e 1149 * @arg TIM_FLAG_CC2: Capture/Compare 2 interrupt flag
EricLew 0:80ee8f3b695e 1150 * @arg TIM_FLAG_CC3: Capture/Compare 3 interrupt flag
EricLew 0:80ee8f3b695e 1151 * @arg TIM_FLAG_CC4: Capture/Compare 4 interrupt flag
EricLew 0:80ee8f3b695e 1152 * @arg TIM_FLAG_CC5: Compare 5 interrupt flag
EricLew 0:80ee8f3b695e 1153 * @arg TIM_FLAG_CC6: Compare 5 interrupt flag
EricLew 0:80ee8f3b695e 1154 * @arg TIM_FLAG_COM: Commutation interrupt flag
EricLew 0:80ee8f3b695e 1155 * @arg TIM_FLAG_TRIGGER: Trigger interrupt flag
EricLew 0:80ee8f3b695e 1156 * @arg TIM_FLAG_BREAK: Break interrupt flag
EricLew 0:80ee8f3b695e 1157 * @arg TIM_FLAG_BREAK2: Break 2 interrupt flag
EricLew 0:80ee8f3b695e 1158 * @arg TIM_FLAG_SYSTEM_BREAK: System Break interrupt flag
EricLew 0:80ee8f3b695e 1159 * @arg TIM_FLAG_CC1OF: Capture/Compare 1 overcapture flag
EricLew 0:80ee8f3b695e 1160 * @arg TIM_FLAG_CC2OF: Capture/Compare 2 overcapture flag
EricLew 0:80ee8f3b695e 1161 * @arg TIM_FLAG_CC3OF: Capture/Compare 3 overcapture flag
EricLew 0:80ee8f3b695e 1162 * @arg TIM_FLAG_CC4OF: Capture/Compare 4 overcapture flag
EricLew 0:80ee8f3b695e 1163 * @retval The new state of __FLAG__ (TRUE or FALSE).
EricLew 0:80ee8f3b695e 1164 */
EricLew 0:80ee8f3b695e 1165 #define __HAL_TIM_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
EricLew 0:80ee8f3b695e 1166
EricLew 0:80ee8f3b695e 1167 /**
EricLew 0:80ee8f3b695e 1168 * @brief Check whether the specified TIM interrupt source is enabled or not.
EricLew 0:80ee8f3b695e 1169 * @param __HANDLE__: TIM handle
EricLew 0:80ee8f3b695e 1170 * @param __INTERRUPT__: specifies the TIM interrupt source to check.
EricLew 0:80ee8f3b695e 1171 * This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 1172 * @arg TIM_IT_UPDATE: Update interrupt
EricLew 0:80ee8f3b695e 1173 * @arg TIM_IT_CC1: Capture/Compare 1 interrupt
EricLew 0:80ee8f3b695e 1174 * @arg TIM_IT_CC2: Capture/Compare 2 interrupt
EricLew 0:80ee8f3b695e 1175 * @arg TIM_IT_CC3: Capture/Compare 3 interrupt
EricLew 0:80ee8f3b695e 1176 * @arg TIM_IT_CC4: Capture/Compare 4 interrupt
EricLew 0:80ee8f3b695e 1177 * @arg TIM_IT_COM: Commutation interrupt
EricLew 0:80ee8f3b695e 1178 * @arg TIM_IT_TRIGGER: Trigger interrupt
EricLew 0:80ee8f3b695e 1179 * @arg TIM_IT_BREAK: Break interrupt
EricLew 0:80ee8f3b695e 1180 * @retval The state of TIM_IT (SET or RESET).
EricLew 0:80ee8f3b695e 1181 */
EricLew 0:80ee8f3b695e 1182 #define __HAL_TIM_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->DIER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
EricLew 0:80ee8f3b695e 1183
EricLew 0:80ee8f3b695e 1184 /** @brief Clear the TIM interrupt pending bits.
EricLew 0:80ee8f3b695e 1185 * @param __HANDLE__: TIM handle
EricLew 0:80ee8f3b695e 1186 * @param __INTERRUPT__: specifies the interrupt pending bit to clear.
EricLew 0:80ee8f3b695e 1187 * This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 1188 * @arg TIM_IT_UPDATE: Update interrupt
EricLew 0:80ee8f3b695e 1189 * @arg TIM_IT_CC1: Capture/Compare 1 interrupt
EricLew 0:80ee8f3b695e 1190 * @arg TIM_IT_CC2: Capture/Compare 2 interrupt
EricLew 0:80ee8f3b695e 1191 * @arg TIM_IT_CC3: Capture/Compare 3 interrupt
EricLew 0:80ee8f3b695e 1192 * @arg TIM_IT_CC4: Capture/Compare 4 interrupt
EricLew 0:80ee8f3b695e 1193 * @arg TIM_IT_COM: Commutation interrupt
EricLew 0:80ee8f3b695e 1194 * @arg TIM_IT_TRIGGER: Trigger interrupt
EricLew 0:80ee8f3b695e 1195 * @arg TIM_IT_BREAK: Break interrupt
EricLew 0:80ee8f3b695e 1196 * @retval None
EricLew 0:80ee8f3b695e 1197 */
EricLew 0:80ee8f3b695e 1198 #define __HAL_TIM_CLEAR_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->SR = ~(__INTERRUPT__))
EricLew 0:80ee8f3b695e 1199
EricLew 0:80ee8f3b695e 1200 /**
EricLew 0:80ee8f3b695e 1201 * @brief Indicates whether or not the TIM Counter is used as downcounter.
EricLew 0:80ee8f3b695e 1202 * @param __HANDLE__: TIM handle.
EricLew 0:80ee8f3b695e 1203 * @retval False (Counter used as upcounter) or True (Counter used as downcounter)
EricLew 0:80ee8f3b695e 1204 * @note This macro is particularly useful to get the counting mode when the timer operates in Center-aligned mode or Encoder
EricLew 0:80ee8f3b695e 1205 mode.
EricLew 0:80ee8f3b695e 1206 */
EricLew 0:80ee8f3b695e 1207 #define __HAL_TIM_IS_TIM_COUNTING_DOWN(__HANDLE__) (((__HANDLE__)->Instance->CR1 &(TIM_CR1_DIR)) == (TIM_CR1_DIR))
EricLew 0:80ee8f3b695e 1208
EricLew 0:80ee8f3b695e 1209
EricLew 0:80ee8f3b695e 1210 /**
EricLew 0:80ee8f3b695e 1211 * @brief Set the TIM Prescaler on runtime.
EricLew 0:80ee8f3b695e 1212 * @param __HANDLE__: TIM handle.
EricLew 0:80ee8f3b695e 1213 * @param __PRESC__: specifies the Prescaler new value.
EricLew 0:80ee8f3b695e 1214 * @retval None
EricLew 0:80ee8f3b695e 1215 */
EricLew 0:80ee8f3b695e 1216 #define __HAL_TIM_SET_PRESCALER(__HANDLE__, __PRESC__) ((__HANDLE__)->Instance->PSC = (__PRESC__))
EricLew 0:80ee8f3b695e 1217
EricLew 0:80ee8f3b695e 1218 /**
EricLew 0:80ee8f3b695e 1219 * @brief Set the TIM Counter Register value on runtime.
EricLew 0:80ee8f3b695e 1220 * @param __HANDLE__: TIM handle.
EricLew 0:80ee8f3b695e 1221 * @param __COUNTER__: specifies the Counter register new value.
EricLew 0:80ee8f3b695e 1222 * @retval None
EricLew 0:80ee8f3b695e 1223 */
EricLew 0:80ee8f3b695e 1224 #define __HAL_TIM_SET_COUNTER(__HANDLE__, __COUNTER__) ((__HANDLE__)->Instance->CNT = (__COUNTER__))
EricLew 0:80ee8f3b695e 1225
EricLew 0:80ee8f3b695e 1226 /**
EricLew 0:80ee8f3b695e 1227 * @brief Get the TIM Counter Register value on runtime.
EricLew 0:80ee8f3b695e 1228 * @param __HANDLE__: TIM handle.
EricLew 0:80ee8f3b695e 1229 * @retval None
EricLew 0:80ee8f3b695e 1230 */
EricLew 0:80ee8f3b695e 1231 #define __HAL_TIM_GET_COUNTER(__HANDLE__) \
EricLew 0:80ee8f3b695e 1232 ((__HANDLE__)->Instance->CNT)
EricLew 0:80ee8f3b695e 1233
EricLew 0:80ee8f3b695e 1234 /**
EricLew 0:80ee8f3b695e 1235 * @brief Set the TIM Autoreload Register value on runtime without calling another time any Init function.
EricLew 0:80ee8f3b695e 1236 * @param __HANDLE__: TIM handle.
EricLew 0:80ee8f3b695e 1237 * @param __AUTORELOAD__: specifies the Counter register new value.
EricLew 0:80ee8f3b695e 1238 * @retval None
EricLew 0:80ee8f3b695e 1239 */
EricLew 0:80ee8f3b695e 1240 #define __HAL_TIM_SET_AUTORELOAD(__HANDLE__, __AUTORELOAD__) \
EricLew 0:80ee8f3b695e 1241 do{ \
EricLew 0:80ee8f3b695e 1242 (__HANDLE__)->Instance->ARR = (__AUTORELOAD__); \
EricLew 0:80ee8f3b695e 1243 (__HANDLE__)->Init.Period = (__AUTORELOAD__); \
EricLew 0:80ee8f3b695e 1244 } while(0)
EricLew 0:80ee8f3b695e 1245
EricLew 0:80ee8f3b695e 1246 /**
EricLew 0:80ee8f3b695e 1247 * @brief Get the TIM Autoreload Register value on runtime.
EricLew 0:80ee8f3b695e 1248 * @param __HANDLE__: TIM handle.
EricLew 0:80ee8f3b695e 1249 * @retval None
EricLew 0:80ee8f3b695e 1250 */
EricLew 0:80ee8f3b695e 1251 #define __HAL_TIM_GET_AUTORELOAD(__HANDLE__) \
EricLew 0:80ee8f3b695e 1252 ((__HANDLE__)->Instance->ARR)
EricLew 0:80ee8f3b695e 1253
EricLew 0:80ee8f3b695e 1254 /**
EricLew 0:80ee8f3b695e 1255 * @brief Set the TIM Clock Division value on runtime without calling another time any Init function.
EricLew 0:80ee8f3b695e 1256 * @param __HANDLE__: TIM handle.
EricLew 0:80ee8f3b695e 1257 * @param __CKD__: specifies the clock division value.
EricLew 0:80ee8f3b695e 1258 * This parameter can be one of the following value:
EricLew 0:80ee8f3b695e 1259 * @arg TIM_CLOCKDIVISION_DIV1
EricLew 0:80ee8f3b695e 1260 * @arg TIM_CLOCKDIVISION_DIV2
EricLew 0:80ee8f3b695e 1261 * @arg TIM_CLOCKDIVISION_DIV4
EricLew 0:80ee8f3b695e 1262 * @retval None
EricLew 0:80ee8f3b695e 1263 */
EricLew 0:80ee8f3b695e 1264 #define __HAL_TIM_SET_CLOCKDIVISION(__HANDLE__, __CKD__) \
EricLew 0:80ee8f3b695e 1265 do{ \
EricLew 0:80ee8f3b695e 1266 (__HANDLE__)->Instance->CR1 &= (uint16_t)(~TIM_CR1_CKD); \
EricLew 0:80ee8f3b695e 1267 (__HANDLE__)->Instance->CR1 |= (__CKD__); \
EricLew 0:80ee8f3b695e 1268 (__HANDLE__)->Init.ClockDivision = (__CKD__); \
EricLew 0:80ee8f3b695e 1269 } while(0)
EricLew 0:80ee8f3b695e 1270
EricLew 0:80ee8f3b695e 1271 /**
EricLew 0:80ee8f3b695e 1272 * @brief Get the TIM Clock Division value on runtime.
EricLew 0:80ee8f3b695e 1273 * @param __HANDLE__: TIM handle.
EricLew 0:80ee8f3b695e 1274 * @retval None
EricLew 0:80ee8f3b695e 1275 */
EricLew 0:80ee8f3b695e 1276 #define __HAL_TIM_GET_CLOCKDIVISION(__HANDLE__) \
EricLew 0:80ee8f3b695e 1277 ((__HANDLE__)->Instance->CR1 & TIM_CR1_CKD)
EricLew 0:80ee8f3b695e 1278
EricLew 0:80ee8f3b695e 1279 /**
EricLew 0:80ee8f3b695e 1280 * @brief Set the TIM Input Capture prescaler on runtime without calling another time HAL_TIM_IC_ConfigChannel() function.
EricLew 0:80ee8f3b695e 1281 * @param __HANDLE__: TIM handle.
EricLew 0:80ee8f3b695e 1282 * @param __CHANNEL__: TIM Channels to be configured.
EricLew 0:80ee8f3b695e 1283 * This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 1284 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
EricLew 0:80ee8f3b695e 1285 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
EricLew 0:80ee8f3b695e 1286 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
EricLew 0:80ee8f3b695e 1287 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
EricLew 0:80ee8f3b695e 1288 * @param __ICPSC__: specifies the Input Capture4 prescaler new value.
EricLew 0:80ee8f3b695e 1289 * This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 1290 * @arg TIM_ICPSC_DIV1: no prescaler
EricLew 0:80ee8f3b695e 1291 * @arg TIM_ICPSC_DIV2: capture is done once every 2 events
EricLew 0:80ee8f3b695e 1292 * @arg TIM_ICPSC_DIV4: capture is done once every 4 events
EricLew 0:80ee8f3b695e 1293 * @arg TIM_ICPSC_DIV8: capture is done once every 8 events
EricLew 0:80ee8f3b695e 1294 * @retval None
EricLew 0:80ee8f3b695e 1295 */
EricLew 0:80ee8f3b695e 1296 #define __HAL_TIM_SET_ICPRESCALER(__HANDLE__, __CHANNEL__, __ICPSC__) \
EricLew 0:80ee8f3b695e 1297 do{ \
EricLew 0:80ee8f3b695e 1298 TIM_RESET_ICPRESCALERVALUE((__HANDLE__), (__CHANNEL__)); \
EricLew 0:80ee8f3b695e 1299 TIM_SET_ICPRESCALERVALUE((__HANDLE__), (__CHANNEL__), (__ICPSC__)); \
EricLew 0:80ee8f3b695e 1300 } while(0)
EricLew 0:80ee8f3b695e 1301
EricLew 0:80ee8f3b695e 1302 /**
EricLew 0:80ee8f3b695e 1303 * @brief Get the TIM Input Capture prescaler on runtime.
EricLew 0:80ee8f3b695e 1304 * @param __HANDLE__: TIM handle.
EricLew 0:80ee8f3b695e 1305 * @param __CHANNEL__: TIM Channels to be configured.
EricLew 0:80ee8f3b695e 1306 * This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 1307 * @arg TIM_CHANNEL_1: get input capture 1 prescaler value
EricLew 0:80ee8f3b695e 1308 * @arg TIM_CHANNEL_2: get input capture 2 prescaler value
EricLew 0:80ee8f3b695e 1309 * @arg TIM_CHANNEL_3: get input capture 3 prescaler value
EricLew 0:80ee8f3b695e 1310 * @arg TIM_CHANNEL_4: get input capture 4 prescaler value
EricLew 0:80ee8f3b695e 1311 * @retval None
EricLew 0:80ee8f3b695e 1312 */
EricLew 0:80ee8f3b695e 1313 #define __HAL_TIM_GET_ICPRESCALER(__HANDLE__, __CHANNEL__) \
EricLew 0:80ee8f3b695e 1314 (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC1PSC) :\
EricLew 0:80ee8f3b695e 1315 ((__CHANNEL__) == TIM_CHANNEL_2) ? (((__HANDLE__)->Instance->CCMR1 & TIM_CCMR1_IC2PSC) >> 8) :\
EricLew 0:80ee8f3b695e 1316 ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC3PSC) :\
EricLew 0:80ee8f3b695e 1317 (((__HANDLE__)->Instance->CCMR2 & TIM_CCMR2_IC4PSC)) >> 8)
EricLew 0:80ee8f3b695e 1318
EricLew 0:80ee8f3b695e 1319 /**
EricLew 0:80ee8f3b695e 1320 * @brief Set the TIM Capture Compare Register value on runtime without calling another time ConfigChannel function.
EricLew 0:80ee8f3b695e 1321 * @param __HANDLE__: TIM handle.
EricLew 0:80ee8f3b695e 1322 * @param __CHANNEL__: TIM Channels to be configured.
EricLew 0:80ee8f3b695e 1323 * This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 1324 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
EricLew 0:80ee8f3b695e 1325 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
EricLew 0:80ee8f3b695e 1326 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
EricLew 0:80ee8f3b695e 1327 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
EricLew 0:80ee8f3b695e 1328 * @arg TIM_CHANNEL_5: TIM Channel 5 selected
EricLew 0:80ee8f3b695e 1329 * @arg TIM_CHANNEL_6: TIM Channel 6 selected
EricLew 0:80ee8f3b695e 1330 * @param __COMPARE__: specifies the Capture Compare register new value.
EricLew 0:80ee8f3b695e 1331 * @retval None
EricLew 0:80ee8f3b695e 1332 */
EricLew 0:80ee8f3b695e 1333 #define __HAL_TIM_SET_COMPARE(__HANDLE__, __CHANNEL__, __COMPARE__) \
EricLew 0:80ee8f3b695e 1334 (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1 = (__COMPARE__)) :\
EricLew 0:80ee8f3b695e 1335 ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2 = (__COMPARE__)) :\
EricLew 0:80ee8f3b695e 1336 ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3 = (__COMPARE__)) :\
EricLew 0:80ee8f3b695e 1337 ((__CHANNEL__) == TIM_CHANNEL_4) ? ((__HANDLE__)->Instance->CCR4 = (__COMPARE__)) :\
EricLew 0:80ee8f3b695e 1338 ((__CHANNEL__) == TIM_CHANNEL_5) ? ((__HANDLE__)->Instance->CCR5 = (__COMPARE__)) :\
EricLew 0:80ee8f3b695e 1339 ((__HANDLE__)->Instance->CCR6 = (__COMPARE__)))
EricLew 0:80ee8f3b695e 1340
EricLew 0:80ee8f3b695e 1341 /**
EricLew 0:80ee8f3b695e 1342 * @brief Get the TIM Capture Compare Register value on runtime.
EricLew 0:80ee8f3b695e 1343 * @param __HANDLE__: TIM handle.
EricLew 0:80ee8f3b695e 1344 * @param __CHANNEL__: TIM Channel associated with the capture compare register
EricLew 0:80ee8f3b695e 1345 * This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 1346 * @arg TIM_CHANNEL_1: get capture/compare 1 register value
EricLew 0:80ee8f3b695e 1347 * @arg TIM_CHANNEL_2: get capture/compare 2 register value
EricLew 0:80ee8f3b695e 1348 * @arg TIM_CHANNEL_3: get capture/compare 3 register value
EricLew 0:80ee8f3b695e 1349 * @arg TIM_CHANNEL_4: get capture/compare 4 register value
EricLew 0:80ee8f3b695e 1350 * @arg TIM_CHANNEL_5: get capture/compare 5 register value
EricLew 0:80ee8f3b695e 1351 * @arg TIM_CHANNEL_6: get capture/compare 6 register value
EricLew 0:80ee8f3b695e 1352 * @retval None
EricLew 0:80ee8f3b695e 1353 */
EricLew 0:80ee8f3b695e 1354 #define __HAL_TIM_GET_COMPARE(__HANDLE__, __CHANNEL__) \
EricLew 0:80ee8f3b695e 1355 (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCR1) :\
EricLew 0:80ee8f3b695e 1356 ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCR2) :\
EricLew 0:80ee8f3b695e 1357 ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCR3) :\
EricLew 0:80ee8f3b695e 1358 ((__CHANNEL__) == TIM_CHANNEL_4) ? ((__HANDLE__)->Instance->CCR4) :\
EricLew 0:80ee8f3b695e 1359 ((__CHANNEL__) == TIM_CHANNEL_5) ? ((__HANDLE__)->Instance->CCR5) :\
EricLew 0:80ee8f3b695e 1360 ((__HANDLE__)->Instance->CCR6))
EricLew 0:80ee8f3b695e 1361
EricLew 0:80ee8f3b695e 1362 /**
EricLew 0:80ee8f3b695e 1363 * @brief Set the Update Request Source (URS) bit of the TIMx_CR1 register.
EricLew 0:80ee8f3b695e 1364 * @param __HANDLE__: TIM handle.
EricLew 0:80ee8f3b695e 1365 * @note When the USR bit of the TIMx_CR1 register is set, only counter
EricLew 0:80ee8f3b695e 1366 * overflow/underflow generates an update interrupt or DMA request (if
EricLew 0:80ee8f3b695e 1367 * enabled)
EricLew 0:80ee8f3b695e 1368 * @retval None
EricLew 0:80ee8f3b695e 1369 */
EricLew 0:80ee8f3b695e 1370 #define __HAL_TIM_URS_ENABLE(__HANDLE__) \
EricLew 0:80ee8f3b695e 1371 ((__HANDLE__)->Instance->CR1|= (TIM_CR1_URS))
EricLew 0:80ee8f3b695e 1372
EricLew 0:80ee8f3b695e 1373 /**
EricLew 0:80ee8f3b695e 1374 * @brief Reset the Update Request Source (URS) bit of the TIMx_CR1 register.
EricLew 0:80ee8f3b695e 1375 * @param __HANDLE__: TIM handle.
EricLew 0:80ee8f3b695e 1376 * @note When the USR bit of the TIMx_CR1 register is reset, any of the
EricLew 0:80ee8f3b695e 1377 * following events generate an update interrupt or DMA request (if
EricLew 0:80ee8f3b695e 1378 * enabled):
EricLew 0:80ee8f3b695e 1379 * _ Counter overflow underflow
EricLew 0:80ee8f3b695e 1380 * _ Setting the UG bit
EricLew 0:80ee8f3b695e 1381 * _ Update generation through the slave mode controller
EricLew 0:80ee8f3b695e 1382 * @retval None
EricLew 0:80ee8f3b695e 1383 */
EricLew 0:80ee8f3b695e 1384 #define __HAL_TIM_URS_DISABLE(__HANDLE__) \
EricLew 0:80ee8f3b695e 1385 ((__HANDLE__)->Instance->CR1&=~(TIM_CR1_URS))
EricLew 0:80ee8f3b695e 1386
EricLew 0:80ee8f3b695e 1387 /**
EricLew 0:80ee8f3b695e 1388 * @brief Set the TIM Capture x input polarity on runtime.
EricLew 0:80ee8f3b695e 1389 * @param __HANDLE__: TIM handle.
EricLew 0:80ee8f3b695e 1390 * @param __CHANNEL__: TIM Channels to be configured.
EricLew 0:80ee8f3b695e 1391 * This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 1392 * @arg TIM_CHANNEL_1: TIM Channel 1 selected
EricLew 0:80ee8f3b695e 1393 * @arg TIM_CHANNEL_2: TIM Channel 2 selected
EricLew 0:80ee8f3b695e 1394 * @arg TIM_CHANNEL_3: TIM Channel 3 selected
EricLew 0:80ee8f3b695e 1395 * @arg TIM_CHANNEL_4: TIM Channel 4 selected
EricLew 0:80ee8f3b695e 1396 * @param __POLARITY__: Polarity for TIx source
EricLew 0:80ee8f3b695e 1397 * @arg TIM_INPUTCHANNELPOLARITY_RISING: Rising Edge
EricLew 0:80ee8f3b695e 1398 * @arg TIM_INPUTCHANNELPOLARITY_FALLING: Falling Edge
EricLew 0:80ee8f3b695e 1399 * @arg TIM_INPUTCHANNELPOLARITY_BOTHEDGE: Rising and Falling Edge
EricLew 0:80ee8f3b695e 1400 * @retval None
EricLew 0:80ee8f3b695e 1401 */
EricLew 0:80ee8f3b695e 1402 #define __HAL_TIM_SET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__, __POLARITY__) \
EricLew 0:80ee8f3b695e 1403 do{ \
EricLew 0:80ee8f3b695e 1404 TIM_RESET_CAPTUREPOLARITY((__HANDLE__), (__CHANNEL__)); \
EricLew 0:80ee8f3b695e 1405 TIM_SET_CAPTUREPOLARITY((__HANDLE__), (__CHANNEL__), (__POLARITY__)); \
EricLew 0:80ee8f3b695e 1406 }while(0)
EricLew 0:80ee8f3b695e 1407
EricLew 0:80ee8f3b695e 1408 /**
EricLew 0:80ee8f3b695e 1409 * @}
EricLew 0:80ee8f3b695e 1410 */
EricLew 0:80ee8f3b695e 1411 /* End of exported macros ----------------------------------------------------*/
EricLew 0:80ee8f3b695e 1412
EricLew 0:80ee8f3b695e 1413 /* Private constants ---------------------------------------------------------*/
EricLew 0:80ee8f3b695e 1414 /** @defgroup TIM_Private_Constants TIM Private Constants
EricLew 0:80ee8f3b695e 1415 * @{
EricLew 0:80ee8f3b695e 1416 */
EricLew 0:80ee8f3b695e 1417 /* The counter of a timer instance is disabled only if all the CCx and CCxN
EricLew 0:80ee8f3b695e 1418 channels have been disabled */
EricLew 0:80ee8f3b695e 1419 #define TIM_CCER_CCxE_MASK ((uint32_t)(TIM_CCER_CC1E | TIM_CCER_CC2E | TIM_CCER_CC3E | TIM_CCER_CC4E))
EricLew 0:80ee8f3b695e 1420 #define TIM_CCER_CCxNE_MASK ((uint32_t)(TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE))
EricLew 0:80ee8f3b695e 1421 /**
EricLew 0:80ee8f3b695e 1422 * @}
EricLew 0:80ee8f3b695e 1423 */
EricLew 0:80ee8f3b695e 1424 /* End of private constants --------------------------------------------------*/
EricLew 0:80ee8f3b695e 1425
EricLew 0:80ee8f3b695e 1426 /* Private macros ------------------------------------------------------------*/
EricLew 0:80ee8f3b695e 1427 /** @defgroup TIM_Private_Macros TIM Private Macros
EricLew 0:80ee8f3b695e 1428 * @{
EricLew 0:80ee8f3b695e 1429 */
EricLew 0:80ee8f3b695e 1430
EricLew 0:80ee8f3b695e 1431 #define IS_TIM_CLEARINPUT_SOURCE(__MODE__) (((__MODE__) == TIM_CLEARINPUTSOURCE_ETR) || \
EricLew 0:80ee8f3b695e 1432 ((__MODE__) == TIM_CLEARINPUTSOURCE_OCREFCLR) || \
EricLew 0:80ee8f3b695e 1433 ((__MODE__) == TIM_CLEARINPUTSOURCE_NONE))
EricLew 0:80ee8f3b695e 1434
EricLew 0:80ee8f3b695e 1435 #define IS_TIM_DMA_BASE(__BASE__) (((__BASE__) == TIM_DMABASE_CR1) || \
EricLew 0:80ee8f3b695e 1436 ((__BASE__) == TIM_DMABASE_CR2) || \
EricLew 0:80ee8f3b695e 1437 ((__BASE__) == TIM_DMABASE_SMCR) || \
EricLew 0:80ee8f3b695e 1438 ((__BASE__) == TIM_DMABASE_DIER) || \
EricLew 0:80ee8f3b695e 1439 ((__BASE__) == TIM_DMABASE_SR) || \
EricLew 0:80ee8f3b695e 1440 ((__BASE__) == TIM_DMABASE_EGR) || \
EricLew 0:80ee8f3b695e 1441 ((__BASE__) == TIM_DMABASE_CCMR1) || \
EricLew 0:80ee8f3b695e 1442 ((__BASE__) == TIM_DMABASE_CCMR2) || \
EricLew 0:80ee8f3b695e 1443 ((__BASE__) == TIM_DMABASE_CCER) || \
EricLew 0:80ee8f3b695e 1444 ((__BASE__) == TIM_DMABASE_CNT) || \
EricLew 0:80ee8f3b695e 1445 ((__BASE__) == TIM_DMABASE_PSC) || \
EricLew 0:80ee8f3b695e 1446 ((__BASE__) == TIM_DMABASE_ARR) || \
EricLew 0:80ee8f3b695e 1447 ((__BASE__) == TIM_DMABASE_RCR) || \
EricLew 0:80ee8f3b695e 1448 ((__BASE__) == TIM_DMABASE_CCR1) || \
EricLew 0:80ee8f3b695e 1449 ((__BASE__) == TIM_DMABASE_CCR2) || \
EricLew 0:80ee8f3b695e 1450 ((__BASE__) == TIM_DMABASE_CCR3) || \
EricLew 0:80ee8f3b695e 1451 ((__BASE__) == TIM_DMABASE_CCR4) || \
EricLew 0:80ee8f3b695e 1452 ((__BASE__) == TIM_DMABASE_BDTR) || \
EricLew 0:80ee8f3b695e 1453 ((__BASE__) == TIM_DMABASE_CCMR3) || \
EricLew 0:80ee8f3b695e 1454 ((__BASE__) == TIM_DMABASE_CCR5) || \
EricLew 0:80ee8f3b695e 1455 ((__BASE__) == TIM_DMABASE_CCR6) || \
EricLew 0:80ee8f3b695e 1456 ((__BASE__) == TIM_DMABASE_OR1) || \
EricLew 0:80ee8f3b695e 1457 ((__BASE__) == TIM_DMABASE_OR2) || \
EricLew 0:80ee8f3b695e 1458 ((__BASE__) == TIM_DMABASE_OR3))
EricLew 0:80ee8f3b695e 1459
EricLew 0:80ee8f3b695e 1460
EricLew 0:80ee8f3b695e 1461 #define IS_TIM_EVENT_SOURCE(__SOURCE__) ((((__SOURCE__) & 0xFFFFFE00) == 0x00000000) && ((__SOURCE__) != 0x00000000))
EricLew 0:80ee8f3b695e 1462
EricLew 0:80ee8f3b695e 1463
EricLew 0:80ee8f3b695e 1464 #define IS_TIM_COUNTER_MODE(__MODE__) (((__MODE__) == TIM_COUNTERMODE_UP) || \
EricLew 0:80ee8f3b695e 1465 ((__MODE__) == TIM_COUNTERMODE_DOWN) || \
EricLew 0:80ee8f3b695e 1466 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED1) || \
EricLew 0:80ee8f3b695e 1467 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED2) || \
EricLew 0:80ee8f3b695e 1468 ((__MODE__) == TIM_COUNTERMODE_CENTERALIGNED3))
EricLew 0:80ee8f3b695e 1469
EricLew 0:80ee8f3b695e 1470 #define IS_TIM_CLOCKDIVISION_DIV(__DIV__) (((__DIV__) == TIM_CLOCKDIVISION_DIV1) || \
EricLew 0:80ee8f3b695e 1471 ((__DIV__) == TIM_CLOCKDIVISION_DIV2) || \
EricLew 0:80ee8f3b695e 1472 ((__DIV__) == TIM_CLOCKDIVISION_DIV4))
EricLew 0:80ee8f3b695e 1473
EricLew 0:80ee8f3b695e 1474 #define IS_TIM_FAST_STATE(__STATE__) (((__STATE__) == TIM_OCFAST_DISABLE) || \
EricLew 0:80ee8f3b695e 1475 ((__STATE__) == TIM_OCFAST_ENABLE))
EricLew 0:80ee8f3b695e 1476
EricLew 0:80ee8f3b695e 1477 #define IS_TIM_OC_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_OCPOLARITY_HIGH) || \
EricLew 0:80ee8f3b695e 1478 ((__POLARITY__) == TIM_OCPOLARITY_LOW))
EricLew 0:80ee8f3b695e 1479
EricLew 0:80ee8f3b695e 1480 #define IS_TIM_OCN_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_OCNPOLARITY_HIGH) || \
EricLew 0:80ee8f3b695e 1481 ((__POLARITY__) == TIM_OCNPOLARITY_LOW))
EricLew 0:80ee8f3b695e 1482
EricLew 0:80ee8f3b695e 1483 #define IS_TIM_OCIDLE_STATE(__STATE__) (((__STATE__) == TIM_OCIDLESTATE_SET) || \
EricLew 0:80ee8f3b695e 1484 ((__STATE__) == TIM_OCIDLESTATE_RESET))
EricLew 0:80ee8f3b695e 1485
EricLew 0:80ee8f3b695e 1486 #define IS_TIM_OCNIDLE_STATE(__STATE__) (((__STATE__) == TIM_OCNIDLESTATE_SET) || \
EricLew 0:80ee8f3b695e 1487 ((__STATE__) == TIM_OCNIDLESTATE_RESET))
EricLew 0:80ee8f3b695e 1488
EricLew 0:80ee8f3b695e 1489 #define IS_TIM_IC_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_ICPOLARITY_RISING) || \
EricLew 0:80ee8f3b695e 1490 ((__POLARITY__) == TIM_ICPOLARITY_FALLING) || \
EricLew 0:80ee8f3b695e 1491 ((__POLARITY__) == TIM_ICPOLARITY_BOTHEDGE))
EricLew 0:80ee8f3b695e 1492
EricLew 0:80ee8f3b695e 1493 #define IS_TIM_IC_SELECTION(__SELECTION__) (((__SELECTION__) == TIM_ICSELECTION_DIRECTTI) || \
EricLew 0:80ee8f3b695e 1494 ((__SELECTION__) == TIM_ICSELECTION_INDIRECTTI) || \
EricLew 0:80ee8f3b695e 1495 ((__SELECTION__) == TIM_ICSELECTION_TRC))
EricLew 0:80ee8f3b695e 1496
EricLew 0:80ee8f3b695e 1497 #define IS_TIM_IC_PRESCALER(__PRESCALER__) (((__PRESCALER__) == TIM_ICPSC_DIV1) || \
EricLew 0:80ee8f3b695e 1498 ((__PRESCALER__) == TIM_ICPSC_DIV2) || \
EricLew 0:80ee8f3b695e 1499 ((__PRESCALER__) == TIM_ICPSC_DIV4) || \
EricLew 0:80ee8f3b695e 1500 ((__PRESCALER__) == TIM_ICPSC_DIV8))
EricLew 0:80ee8f3b695e 1501
EricLew 0:80ee8f3b695e 1502 #define IS_TIM_OPM_MODE(__MODE__) (((__MODE__) == TIM_OPMODE_SINGLE) || \
EricLew 0:80ee8f3b695e 1503 ((__MODE__) == TIM_OPMODE_REPETITIVE))
EricLew 0:80ee8f3b695e 1504
EricLew 0:80ee8f3b695e 1505 #define IS_TIM_ENCODER_MODE(__MODE__) (((__MODE__) == TIM_ENCODERMODE_TI1) || \
EricLew 0:80ee8f3b695e 1506 ((__MODE__) == TIM_ENCODERMODE_TI2) || \
EricLew 0:80ee8f3b695e 1507 ((__MODE__) == TIM_ENCODERMODE_TI12))
EricLew 0:80ee8f3b695e 1508
EricLew 0:80ee8f3b695e 1509 #define IS_TIM_DMA_SOURCE(__SOURCE__) ((((__SOURCE__) & 0xFFFF80FF) == 0x00000000) && ((__SOURCE__) != 0x00000000))
EricLew 0:80ee8f3b695e 1510
EricLew 0:80ee8f3b695e 1511 #define IS_TIM_CHANNELS(__CHANNEL__) (((__CHANNEL__) == TIM_CHANNEL_1) || \
EricLew 0:80ee8f3b695e 1512 ((__CHANNEL__) == TIM_CHANNEL_2) || \
EricLew 0:80ee8f3b695e 1513 ((__CHANNEL__) == TIM_CHANNEL_3) || \
EricLew 0:80ee8f3b695e 1514 ((__CHANNEL__) == TIM_CHANNEL_4) || \
EricLew 0:80ee8f3b695e 1515 ((__CHANNEL__) == TIM_CHANNEL_5) || \
EricLew 0:80ee8f3b695e 1516 ((__CHANNEL__) == TIM_CHANNEL_6) || \
EricLew 0:80ee8f3b695e 1517 ((__CHANNEL__) == TIM_CHANNEL_ALL))
EricLew 0:80ee8f3b695e 1518
EricLew 0:80ee8f3b695e 1519 #define IS_TIM_OPM_CHANNELS(__CHANNEL__) (((__CHANNEL__) == TIM_CHANNEL_1) || \
EricLew 0:80ee8f3b695e 1520 ((__CHANNEL__) == TIM_CHANNEL_2))
EricLew 0:80ee8f3b695e 1521
EricLew 0:80ee8f3b695e 1522 #define IS_TIM_COMPLEMENTARY_CHANNELS(__CHANNEL__) (((__CHANNEL__) == TIM_CHANNEL_1) || \
EricLew 0:80ee8f3b695e 1523 ((__CHANNEL__) == TIM_CHANNEL_2) || \
EricLew 0:80ee8f3b695e 1524 ((__CHANNEL__) == TIM_CHANNEL_3))
EricLew 0:80ee8f3b695e 1525
EricLew 0:80ee8f3b695e 1526 #define IS_TIM_CLOCKSOURCE(__CLOCK__) (((__CLOCK__) == TIM_CLOCKSOURCE_INTERNAL) || \
EricLew 0:80ee8f3b695e 1527 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE2) || \
EricLew 0:80ee8f3b695e 1528 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR0) || \
EricLew 0:80ee8f3b695e 1529 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR1) || \
EricLew 0:80ee8f3b695e 1530 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR2) || \
EricLew 0:80ee8f3b695e 1531 ((__CLOCK__) == TIM_CLOCKSOURCE_ITR3) || \
EricLew 0:80ee8f3b695e 1532 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1ED) || \
EricLew 0:80ee8f3b695e 1533 ((__CLOCK__) == TIM_CLOCKSOURCE_TI1) || \
EricLew 0:80ee8f3b695e 1534 ((__CLOCK__) == TIM_CLOCKSOURCE_TI2) || \
EricLew 0:80ee8f3b695e 1535 ((__CLOCK__) == TIM_CLOCKSOURCE_ETRMODE1))
EricLew 0:80ee8f3b695e 1536
EricLew 0:80ee8f3b695e 1537 #define IS_TIM_CLOCKPOLARITY(__POLARITY__) (((__POLARITY__) == TIM_CLOCKPOLARITY_INVERTED) || \
EricLew 0:80ee8f3b695e 1538 ((__POLARITY__) == TIM_CLOCKPOLARITY_NONINVERTED) || \
EricLew 0:80ee8f3b695e 1539 ((__POLARITY__) == TIM_CLOCKPOLARITY_RISING) || \
EricLew 0:80ee8f3b695e 1540 ((__POLARITY__) == TIM_CLOCKPOLARITY_FALLING) || \
EricLew 0:80ee8f3b695e 1541 ((__POLARITY__) == TIM_CLOCKPOLARITY_BOTHEDGE))
EricLew 0:80ee8f3b695e 1542
EricLew 0:80ee8f3b695e 1543 #define IS_TIM_CLOCKPRESCALER(__PRESCALER__) (((__PRESCALER__) == TIM_CLOCKPRESCALER_DIV1) || \
EricLew 0:80ee8f3b695e 1544 ((__PRESCALER__) == TIM_CLOCKPRESCALER_DIV2) || \
EricLew 0:80ee8f3b695e 1545 ((__PRESCALER__) == TIM_CLOCKPRESCALER_DIV4) || \
EricLew 0:80ee8f3b695e 1546 ((__PRESCALER__) == TIM_CLOCKPRESCALER_DIV8))
EricLew 0:80ee8f3b695e 1547
EricLew 0:80ee8f3b695e 1548 #define IS_TIM_CLOCKFILTER(ICFILTER) ((ICFILTER) <= 0xF)
EricLew 0:80ee8f3b695e 1549
EricLew 0:80ee8f3b695e 1550 #define IS_TIM_CLEARINPUT_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_CLEARINPUTPOLARITY_INVERTED) || \
EricLew 0:80ee8f3b695e 1551 ((__POLARITY__) == TIM_CLEARINPUTPOLARITY_NONINVERTED))
EricLew 0:80ee8f3b695e 1552
EricLew 0:80ee8f3b695e 1553 #define IS_TIM_CLEARINPUT_PRESCALER(__PRESCALER__) (((__PRESCALER__) == TIM_CLEARINPUTPRESCALER_DIV1) || \
EricLew 0:80ee8f3b695e 1554 ((__PRESCALER__) == TIM_CLEARINPUTPRESCALER_DIV2) || \
EricLew 0:80ee8f3b695e 1555 ((__PRESCALER__) == TIM_CLEARINPUTPRESCALER_DIV4) || \
EricLew 0:80ee8f3b695e 1556 ((__PRESCALER__) == TIM_CLEARINPUTPRESCALER_DIV8))
EricLew 0:80ee8f3b695e 1557
EricLew 0:80ee8f3b695e 1558 #define IS_TIM_CLEARINPUT_FILTER(__ICFILTER__) ((__ICFILTER__) <= 0xF)
EricLew 0:80ee8f3b695e 1559
EricLew 0:80ee8f3b695e 1560
EricLew 0:80ee8f3b695e 1561 #define IS_TIM_OSSR_STATE(__STATE__) (((__STATE__) == TIM_OSSR_ENABLE) || \
EricLew 0:80ee8f3b695e 1562 ((__STATE__) == TIM_OSSR_DISABLE))
EricLew 0:80ee8f3b695e 1563
EricLew 0:80ee8f3b695e 1564 #define IS_TIM_OSSI_STATE(__STATE__) (((__STATE__) == TIM_OSSI_ENABLE) || \
EricLew 0:80ee8f3b695e 1565 ((__STATE__) == TIM_OSSI_DISABLE))
EricLew 0:80ee8f3b695e 1566
EricLew 0:80ee8f3b695e 1567 #define IS_TIM_LOCK_LEVEL(__LEVEL__) (((__LEVEL__) == TIM_LOCKLEVEL_OFF) || \
EricLew 0:80ee8f3b695e 1568 ((__LEVEL__) == TIM_LOCKLEVEL_1) || \
EricLew 0:80ee8f3b695e 1569 ((__LEVEL__) == TIM_LOCKLEVEL_2) || \
EricLew 0:80ee8f3b695e 1570 ((__LEVEL__) == TIM_LOCKLEVEL_3))
EricLew 0:80ee8f3b695e 1571
EricLew 0:80ee8f3b695e 1572 #define IS_TIM_BREAK_FILTER(__BRKFILTER__) ((__BRKFILTER__) <= 0xF)
EricLew 0:80ee8f3b695e 1573
EricLew 0:80ee8f3b695e 1574
EricLew 0:80ee8f3b695e 1575 #define IS_TIM_BREAK_STATE(__STATE__) (((__STATE__) == TIM_BREAK_ENABLE) || \
EricLew 0:80ee8f3b695e 1576 ((__STATE__) == TIM_BREAK_DISABLE))
EricLew 0:80ee8f3b695e 1577
EricLew 0:80ee8f3b695e 1578 #define IS_TIM_BREAK_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_BREAKPOLARITY_LOW) || \
EricLew 0:80ee8f3b695e 1579 ((__POLARITY__) == TIM_BREAKPOLARITY_HIGH))
EricLew 0:80ee8f3b695e 1580
EricLew 0:80ee8f3b695e 1581 #define IS_TIM_BREAK2_STATE(__STATE__) (((__STATE__) == TIM_BREAK2_ENABLE) || \
EricLew 0:80ee8f3b695e 1582 ((__STATE__) == TIM_BREAK2_DISABLE))
EricLew 0:80ee8f3b695e 1583
EricLew 0:80ee8f3b695e 1584 #define IS_TIM_BREAK2_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_BREAK2POLARITY_LOW) || \
EricLew 0:80ee8f3b695e 1585 ((__POLARITY__) == TIM_BREAK2POLARITY_HIGH))
EricLew 0:80ee8f3b695e 1586
EricLew 0:80ee8f3b695e 1587 #define IS_TIM_AUTOMATIC_OUTPUT_STATE(__STATE__) (((__STATE__) == TIM_AUTOMATICOUTPUT_ENABLE) || \
EricLew 0:80ee8f3b695e 1588 ((__STATE__) == TIM_AUTOMATICOUTPUT_DISABLE))
EricLew 0:80ee8f3b695e 1589
EricLew 0:80ee8f3b695e 1590 #define IS_TIM_GROUPCH5(__OCREF__) ((((__OCREF__) & 0x1FFFFFFF) == 0x00000000))
EricLew 0:80ee8f3b695e 1591
EricLew 0:80ee8f3b695e 1592 #define IS_TIM_TRGO_SOURCE(__SOURCE__) (((__SOURCE__) == TIM_TRGO_RESET) || \
EricLew 0:80ee8f3b695e 1593 ((__SOURCE__) == TIM_TRGO_ENABLE) || \
EricLew 0:80ee8f3b695e 1594 ((__SOURCE__) == TIM_TRGO_UPDATE) || \
EricLew 0:80ee8f3b695e 1595 ((__SOURCE__) == TIM_TRGO_OC1) || \
EricLew 0:80ee8f3b695e 1596 ((__SOURCE__) == TIM_TRGO_OC1REF) || \
EricLew 0:80ee8f3b695e 1597 ((__SOURCE__) == TIM_TRGO_OC2REF) || \
EricLew 0:80ee8f3b695e 1598 ((__SOURCE__) == TIM_TRGO_OC3REF) || \
EricLew 0:80ee8f3b695e 1599 ((__SOURCE__) == TIM_TRGO_OC4REF))
EricLew 0:80ee8f3b695e 1600
EricLew 0:80ee8f3b695e 1601 #define IS_TIM_TRGO2_SOURCE(__SOURCE__) (((__SOURCE__) == TIM_TRGO2_RESET) || \
EricLew 0:80ee8f3b695e 1602 ((__SOURCE__) == TIM_TRGO2_ENABLE) || \
EricLew 0:80ee8f3b695e 1603 ((__SOURCE__) == TIM_TRGO2_UPDATE) || \
EricLew 0:80ee8f3b695e 1604 ((__SOURCE__) == TIM_TRGO2_OC1) || \
EricLew 0:80ee8f3b695e 1605 ((__SOURCE__) == TIM_TRGO2_OC1REF) || \
EricLew 0:80ee8f3b695e 1606 ((__SOURCE__) == TIM_TRGO2_OC2REF) || \
EricLew 0:80ee8f3b695e 1607 ((__SOURCE__) == TIM_TRGO2_OC3REF) || \
EricLew 0:80ee8f3b695e 1608 ((__SOURCE__) == TIM_TRGO2_OC3REF) || \
EricLew 0:80ee8f3b695e 1609 ((__SOURCE__) == TIM_TRGO2_OC4REF) || \
EricLew 0:80ee8f3b695e 1610 ((__SOURCE__) == TIM_TRGO2_OC5REF) || \
EricLew 0:80ee8f3b695e 1611 ((__SOURCE__) == TIM_TRGO2_OC6REF) || \
EricLew 0:80ee8f3b695e 1612 ((__SOURCE__) == TIM_TRGO2_OC4REF_RISINGFALLING) || \
EricLew 0:80ee8f3b695e 1613 ((__SOURCE__) == TIM_TRGO2_OC6REF_RISINGFALLING) || \
EricLew 0:80ee8f3b695e 1614 ((__SOURCE__) == TIM_TRGO2_OC4REF_RISING_OC6REF_RISING) || \
EricLew 0:80ee8f3b695e 1615 ((__SOURCE__) == TIM_TRGO2_OC4REF_RISING_OC6REF_FALLING) || \
EricLew 0:80ee8f3b695e 1616 ((__SOURCE__) == TIM_TRGO2_OC5REF_RISING_OC6REF_RISING) || \
EricLew 0:80ee8f3b695e 1617 ((__SOURCE__) == TIM_TRGO2_OC5REF_RISING_OC6REF_FALLING))
EricLew 0:80ee8f3b695e 1618
EricLew 0:80ee8f3b695e 1619 #define IS_TIM_MSM_STATE(__STATE__) (((__STATE__) == TIM_MASTERSLAVEMODE_ENABLE) || \
EricLew 0:80ee8f3b695e 1620 ((__STATE__) == TIM_MASTERSLAVEMODE_DISABLE))
EricLew 0:80ee8f3b695e 1621
EricLew 0:80ee8f3b695e 1622 #define IS_TIM_SLAVE_MODE(__MODE__) (((__MODE__) == TIM_SLAVEMODE_DISABLE) || \
EricLew 0:80ee8f3b695e 1623 ((__MODE__) == TIM_SLAVEMODE_RESET) || \
EricLew 0:80ee8f3b695e 1624 ((__MODE__) == TIM_SLAVEMODE_GATED) || \
EricLew 0:80ee8f3b695e 1625 ((__MODE__) == TIM_SLAVEMODE_TRIGGER) || \
EricLew 0:80ee8f3b695e 1626 ((__MODE__) == TIM_SLAVEMODE_EXTERNAL1) || \
EricLew 0:80ee8f3b695e 1627 ((__MODE__) == TIM_SLAVEMODE_COMBINED_RESETTRIGGER))
EricLew 0:80ee8f3b695e 1628
EricLew 0:80ee8f3b695e 1629 #define IS_TIM_PWM_MODE(__MODE__) (((__MODE__) == TIM_OCMODE_PWM1) || \
EricLew 0:80ee8f3b695e 1630 ((__MODE__) == TIM_OCMODE_PWM2) || \
EricLew 0:80ee8f3b695e 1631 ((__MODE__) == TIM_OCMODE_COMBINED_PWM1) || \
EricLew 0:80ee8f3b695e 1632 ((__MODE__) == TIM_OCMODE_COMBINED_PWM2) || \
EricLew 0:80ee8f3b695e 1633 ((__MODE__) == TIM_OCMODE_ASSYMETRIC_PWM1) || \
EricLew 0:80ee8f3b695e 1634 ((__MODE__) == TIM_OCMODE_ASSYMETRIC_PWM2))
EricLew 0:80ee8f3b695e 1635
EricLew 0:80ee8f3b695e 1636 #define IS_TIM_OC_MODE(__MODE__) (((__MODE__) == TIM_OCMODE_TIMING) || \
EricLew 0:80ee8f3b695e 1637 ((__MODE__) == TIM_OCMODE_ACTIVE) || \
EricLew 0:80ee8f3b695e 1638 ((__MODE__) == TIM_OCMODE_INACTIVE) || \
EricLew 0:80ee8f3b695e 1639 ((__MODE__) == TIM_OCMODE_TOGGLE) || \
EricLew 0:80ee8f3b695e 1640 ((__MODE__) == TIM_OCMODE_FORCED_ACTIVE) || \
EricLew 0:80ee8f3b695e 1641 ((__MODE__) == TIM_OCMODE_FORCED_INACTIVE) || \
EricLew 0:80ee8f3b695e 1642 ((__MODE__) == TIM_OCMODE_RETRIGERRABLE_OPM1) || \
EricLew 0:80ee8f3b695e 1643 ((__MODE__) == TIM_OCMODE_RETRIGERRABLE_OPM2))
EricLew 0:80ee8f3b695e 1644
EricLew 0:80ee8f3b695e 1645 #define IS_TIM_TRIGGER_SELECTION(__SELECTION__) (((__SELECTION__) == TIM_TS_ITR0) || \
EricLew 0:80ee8f3b695e 1646 ((__SELECTION__) == TIM_TS_ITR1) || \
EricLew 0:80ee8f3b695e 1647 ((__SELECTION__) == TIM_TS_ITR2) || \
EricLew 0:80ee8f3b695e 1648 ((__SELECTION__) == TIM_TS_ITR3) || \
EricLew 0:80ee8f3b695e 1649 ((__SELECTION__) == TIM_TS_TI1F_ED) || \
EricLew 0:80ee8f3b695e 1650 ((__SELECTION__) == TIM_TS_TI1FP1) || \
EricLew 0:80ee8f3b695e 1651 ((__SELECTION__) == TIM_TS_TI2FP2) || \
EricLew 0:80ee8f3b695e 1652 ((__SELECTION__) == TIM_TS_ETRF))
EricLew 0:80ee8f3b695e 1653
EricLew 0:80ee8f3b695e 1654 #define IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(__SELECTION__) (((__SELECTION__) == TIM_TS_ITR0) || \
EricLew 0:80ee8f3b695e 1655 ((__SELECTION__) == TIM_TS_ITR1) || \
EricLew 0:80ee8f3b695e 1656 ((__SELECTION__) == TIM_TS_ITR2) || \
EricLew 0:80ee8f3b695e 1657 ((__SELECTION__) == TIM_TS_ITR3) || \
EricLew 0:80ee8f3b695e 1658 ((__SELECTION__) == TIM_TS_NONE))
EricLew 0:80ee8f3b695e 1659
EricLew 0:80ee8f3b695e 1660
EricLew 0:80ee8f3b695e 1661 #define IS_TIM_TRIGGERPOLARITY(__POLARITY__) (((__POLARITY__) == TIM_TRIGGERPOLARITY_INVERTED ) || \
EricLew 0:80ee8f3b695e 1662 ((__POLARITY__) == TIM_TRIGGERPOLARITY_NONINVERTED) || \
EricLew 0:80ee8f3b695e 1663 ((__POLARITY__) == TIM_TRIGGERPOLARITY_RISING ) || \
EricLew 0:80ee8f3b695e 1664 ((__POLARITY__) == TIM_TRIGGERPOLARITY_FALLING ) || \
EricLew 0:80ee8f3b695e 1665 ((__POLARITY__) == TIM_TRIGGERPOLARITY_BOTHEDGE ))
EricLew 0:80ee8f3b695e 1666
EricLew 0:80ee8f3b695e 1667 #define IS_TIM_TRIGGERPRESCALER(__PRESCALER__) (((__PRESCALER__) == TIM_TRIGGERPRESCALER_DIV1) || \
EricLew 0:80ee8f3b695e 1668 ((__PRESCALER__) == TIM_TRIGGERPRESCALER_DIV2) || \
EricLew 0:80ee8f3b695e 1669 ((__PRESCALER__) == TIM_TRIGGERPRESCALER_DIV4) || \
EricLew 0:80ee8f3b695e 1670 ((__PRESCALER__) == TIM_TRIGGERPRESCALER_DIV8))
EricLew 0:80ee8f3b695e 1671
EricLew 0:80ee8f3b695e 1672 #define IS_TIM_TRIGGERFILTER(__ICFILTER__) ((__ICFILTER__) <= 0xF)
EricLew 0:80ee8f3b695e 1673
EricLew 0:80ee8f3b695e 1674 #define IS_TIM_TI1SELECTION(__TI1SELECTION__) (((__TI1SELECTION__) == TIM_TI1SELECTION_CH1) || \
EricLew 0:80ee8f3b695e 1675 ((__TI1SELECTION__) == TIM_TI1SELECTION_XORCOMBINATION))
EricLew 0:80ee8f3b695e 1676
EricLew 0:80ee8f3b695e 1677 #define IS_TIM_DMA_LENGTH(__LENGTH__) (((__LENGTH__) == TIM_DMABURSTLENGTH_1TRANSFER) || \
EricLew 0:80ee8f3b695e 1678 ((__LENGTH__) == TIM_DMABURSTLENGTH_2TRANSFERS) || \
EricLew 0:80ee8f3b695e 1679 ((__LENGTH__) == TIM_DMABURSTLENGTH_3TRANSFERS) || \
EricLew 0:80ee8f3b695e 1680 ((__LENGTH__) == TIM_DMABURSTLENGTH_4TRANSFERS) || \
EricLew 0:80ee8f3b695e 1681 ((__LENGTH__) == TIM_DMABURSTLENGTH_5TRANSFERS) || \
EricLew 0:80ee8f3b695e 1682 ((__LENGTH__) == TIM_DMABURSTLENGTH_6TRANSFERS) || \
EricLew 0:80ee8f3b695e 1683 ((__LENGTH__) == TIM_DMABURSTLENGTH_7TRANSFERS) || \
EricLew 0:80ee8f3b695e 1684 ((__LENGTH__) == TIM_DMABURSTLENGTH_8TRANSFERS) || \
EricLew 0:80ee8f3b695e 1685 ((__LENGTH__) == TIM_DMABURSTLENGTH_9TRANSFERS) || \
EricLew 0:80ee8f3b695e 1686 ((__LENGTH__) == TIM_DMABURSTLENGTH_10TRANSFERS) || \
EricLew 0:80ee8f3b695e 1687 ((__LENGTH__) == TIM_DMABURSTLENGTH_11TRANSFERS) || \
EricLew 0:80ee8f3b695e 1688 ((__LENGTH__) == TIM_DMABURSTLENGTH_12TRANSFERS) || \
EricLew 0:80ee8f3b695e 1689 ((__LENGTH__) == TIM_DMABURSTLENGTH_13TRANSFERS) || \
EricLew 0:80ee8f3b695e 1690 ((__LENGTH__) == TIM_DMABURSTLENGTH_14TRANSFERS) || \
EricLew 0:80ee8f3b695e 1691 ((__LENGTH__) == TIM_DMABURSTLENGTH_15TRANSFERS) || \
EricLew 0:80ee8f3b695e 1692 ((__LENGTH__) == TIM_DMABURSTLENGTH_16TRANSFERS) || \
EricLew 0:80ee8f3b695e 1693 ((__LENGTH__) == TIM_DMABURSTLENGTH_17TRANSFERS) || \
EricLew 0:80ee8f3b695e 1694 ((__LENGTH__) == TIM_DMABURSTLENGTH_18TRANSFERS))
EricLew 0:80ee8f3b695e 1695
EricLew 0:80ee8f3b695e 1696 #define IS_TIM_IC_FILTER(__ICFILTER__) ((__ICFILTER__) <= 0xF)
EricLew 0:80ee8f3b695e 1697
EricLew 0:80ee8f3b695e 1698 #define IS_TIM_DEADTIME(__DEADTIME__) ((__DEADTIME__) <= 0xFF)
EricLew 0:80ee8f3b695e 1699
EricLew 0:80ee8f3b695e 1700 #define IS_TIM_BREAK_SYSTEM(__CONFIG__) (((__CONFIG__) == TIM_BREAK_SYSTEM_ECC) || \
EricLew 0:80ee8f3b695e 1701 ((__CONFIG__) == TIM_BREAK_SYSTEM_PVD) || \
EricLew 0:80ee8f3b695e 1702 ((__CONFIG__) == TIM_BREAK_SYSTEM_SRAM2_PARITY_ERROR) || \
EricLew 0:80ee8f3b695e 1703 ((__CONFIG__) == TIM_BREAK_SYSTEM_LOCKUP))
EricLew 0:80ee8f3b695e 1704
EricLew 0:80ee8f3b695e 1705 #define TIM_SET_ICPRESCALERVALUE(__HANDLE__, __CHANNEL__, __ICPSC__) \
EricLew 0:80ee8f3b695e 1706 (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 |= (__ICPSC__)) :\
EricLew 0:80ee8f3b695e 1707 ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 |= ((__ICPSC__) << 8)) :\
EricLew 0:80ee8f3b695e 1708 ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 |= (__ICPSC__)) :\
EricLew 0:80ee8f3b695e 1709 ((__HANDLE__)->Instance->CCMR2 |= ((__ICPSC__) << 8)))
EricLew 0:80ee8f3b695e 1710
EricLew 0:80ee8f3b695e 1711 #define TIM_RESET_ICPRESCALERVALUE(__HANDLE__, __CHANNEL__) \
EricLew 0:80ee8f3b695e 1712 (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCMR1 &= (uint16_t)~TIM_CCMR1_IC1PSC) :\
EricLew 0:80ee8f3b695e 1713 ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCMR1 &= (uint16_t)~TIM_CCMR1_IC2PSC) :\
EricLew 0:80ee8f3b695e 1714 ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCMR2 &= (uint16_t)~TIM_CCMR2_IC3PSC) :\
EricLew 0:80ee8f3b695e 1715 ((__HANDLE__)->Instance->CCMR2 &= (uint16_t)~TIM_CCMR2_IC4PSC))
EricLew 0:80ee8f3b695e 1716
EricLew 0:80ee8f3b695e 1717 #define TIM_SET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__, __POLARITY__) \
EricLew 0:80ee8f3b695e 1718 (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCER |= (__POLARITY__)) :\
EricLew 0:80ee8f3b695e 1719 ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCER |= ((__POLARITY__) << 4)) :\
EricLew 0:80ee8f3b695e 1720 ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCER |= ((__POLARITY__) << 8)) :\
EricLew 0:80ee8f3b695e 1721 ((__HANDLE__)->Instance->CCER |= (((__POLARITY__) << 12))))
EricLew 0:80ee8f3b695e 1722
EricLew 0:80ee8f3b695e 1723 #define TIM_RESET_CAPTUREPOLARITY(__HANDLE__, __CHANNEL__) \
EricLew 0:80ee8f3b695e 1724 (((__CHANNEL__) == TIM_CHANNEL_1) ? ((__HANDLE__)->Instance->CCER &= (uint16_t)~(TIM_CCER_CC1P | TIM_CCER_CC1NP)) :\
EricLew 0:80ee8f3b695e 1725 ((__CHANNEL__) == TIM_CHANNEL_2) ? ((__HANDLE__)->Instance->CCER &= (uint16_t)~(TIM_CCER_CC2P | TIM_CCER_CC2NP)) :\
EricLew 0:80ee8f3b695e 1726 ((__CHANNEL__) == TIM_CHANNEL_3) ? ((__HANDLE__)->Instance->CCER &= (uint16_t)~(TIM_CCER_CC3P | TIM_CCER_CC3NP)) :\
EricLew 0:80ee8f3b695e 1727 ((__HANDLE__)->Instance->CCER &= (uint16_t)~(TIM_CCER_CC4P | TIM_CCER_CC4NP)))
EricLew 0:80ee8f3b695e 1728
EricLew 0:80ee8f3b695e 1729 /**
EricLew 0:80ee8f3b695e 1730 * @}
EricLew 0:80ee8f3b695e 1731 */
EricLew 0:80ee8f3b695e 1732 /* End of private macros -----------------------------------------------------*/
EricLew 0:80ee8f3b695e 1733
EricLew 0:80ee8f3b695e 1734 /* Include TIM HAL Extended module */
EricLew 0:80ee8f3b695e 1735 #include "stm32l4xx_hal_tim_ex.h"
EricLew 0:80ee8f3b695e 1736
EricLew 0:80ee8f3b695e 1737 /* Exported functions --------------------------------------------------------*/
EricLew 0:80ee8f3b695e 1738 /** @addtogroup TIM_Exported_Functions TIM Exported Functions
EricLew 0:80ee8f3b695e 1739 * @{
EricLew 0:80ee8f3b695e 1740 */
EricLew 0:80ee8f3b695e 1741
EricLew 0:80ee8f3b695e 1742 /** @addtogroup TIM_Exported_Functions_Group1 Time Base functions
EricLew 0:80ee8f3b695e 1743 * @brief Time Base functions
EricLew 0:80ee8f3b695e 1744 * @{
EricLew 0:80ee8f3b695e 1745 */
EricLew 0:80ee8f3b695e 1746 /* Time Base functions ********************************************************/
EricLew 0:80ee8f3b695e 1747 HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim);
EricLew 0:80ee8f3b695e 1748 HAL_StatusTypeDef HAL_TIM_Base_DeInit(TIM_HandleTypeDef *htim);
EricLew 0:80ee8f3b695e 1749 void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim);
EricLew 0:80ee8f3b695e 1750 void HAL_TIM_Base_MspDeInit(TIM_HandleTypeDef *htim);
EricLew 0:80ee8f3b695e 1751 /* Blocking mode: Polling */
EricLew 0:80ee8f3b695e 1752 HAL_StatusTypeDef HAL_TIM_Base_Start(TIM_HandleTypeDef *htim);
EricLew 0:80ee8f3b695e 1753 HAL_StatusTypeDef HAL_TIM_Base_Stop(TIM_HandleTypeDef *htim);
EricLew 0:80ee8f3b695e 1754 /* Non-Blocking mode: Interrupt */
EricLew 0:80ee8f3b695e 1755 HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim);
EricLew 0:80ee8f3b695e 1756 HAL_StatusTypeDef HAL_TIM_Base_Stop_IT(TIM_HandleTypeDef *htim);
EricLew 0:80ee8f3b695e 1757 /* Non-Blocking mode: DMA */
EricLew 0:80ee8f3b695e 1758 HAL_StatusTypeDef HAL_TIM_Base_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length);
EricLew 0:80ee8f3b695e 1759 HAL_StatusTypeDef HAL_TIM_Base_Stop_DMA(TIM_HandleTypeDef *htim);
EricLew 0:80ee8f3b695e 1760 /**
EricLew 0:80ee8f3b695e 1761 * @}
EricLew 0:80ee8f3b695e 1762 */
EricLew 0:80ee8f3b695e 1763
EricLew 0:80ee8f3b695e 1764 /** @addtogroup TIM_Exported_Functions_Group2 Time Output Compare functions
EricLew 0:80ee8f3b695e 1765 * @brief Time Output Compare functions
EricLew 0:80ee8f3b695e 1766 * @{
EricLew 0:80ee8f3b695e 1767 */
EricLew 0:80ee8f3b695e 1768 /* Timer Output Compare functions *********************************************/
EricLew 0:80ee8f3b695e 1769 HAL_StatusTypeDef HAL_TIM_OC_Init(TIM_HandleTypeDef *htim);
EricLew 0:80ee8f3b695e 1770 HAL_StatusTypeDef HAL_TIM_OC_DeInit(TIM_HandleTypeDef *htim);
EricLew 0:80ee8f3b695e 1771 void HAL_TIM_OC_MspInit(TIM_HandleTypeDef *htim);
EricLew 0:80ee8f3b695e 1772 void HAL_TIM_OC_MspDeInit(TIM_HandleTypeDef *htim);
EricLew 0:80ee8f3b695e 1773 /* Blocking mode: Polling */
EricLew 0:80ee8f3b695e 1774 HAL_StatusTypeDef HAL_TIM_OC_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
EricLew 0:80ee8f3b695e 1775 HAL_StatusTypeDef HAL_TIM_OC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
EricLew 0:80ee8f3b695e 1776 /* Non-Blocking mode: Interrupt */
EricLew 0:80ee8f3b695e 1777 HAL_StatusTypeDef HAL_TIM_OC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
EricLew 0:80ee8f3b695e 1778 HAL_StatusTypeDef HAL_TIM_OC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
EricLew 0:80ee8f3b695e 1779 /* Non-Blocking mode: DMA */
EricLew 0:80ee8f3b695e 1780 HAL_StatusTypeDef HAL_TIM_OC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
EricLew 0:80ee8f3b695e 1781 HAL_StatusTypeDef HAL_TIM_OC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
EricLew 0:80ee8f3b695e 1782 /**
EricLew 0:80ee8f3b695e 1783 * @}
EricLew 0:80ee8f3b695e 1784 */
EricLew 0:80ee8f3b695e 1785
EricLew 0:80ee8f3b695e 1786 /** @addtogroup TIM_Exported_Functions_Group3 Time PWM functions
EricLew 0:80ee8f3b695e 1787 * @brief Time PWM functions
EricLew 0:80ee8f3b695e 1788 * @{
EricLew 0:80ee8f3b695e 1789 */
EricLew 0:80ee8f3b695e 1790 /* Timer PWM functions ********************************************************/
EricLew 0:80ee8f3b695e 1791 HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim);
EricLew 0:80ee8f3b695e 1792 HAL_StatusTypeDef HAL_TIM_PWM_DeInit(TIM_HandleTypeDef *htim);
EricLew 0:80ee8f3b695e 1793 void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim);
EricLew 0:80ee8f3b695e 1794 void HAL_TIM_PWM_MspDeInit(TIM_HandleTypeDef *htim);
EricLew 0:80ee8f3b695e 1795 /* Blocking mode: Polling */
EricLew 0:80ee8f3b695e 1796 HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
EricLew 0:80ee8f3b695e 1797 HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
EricLew 0:80ee8f3b695e 1798 /* Non-Blocking mode: Interrupt */
EricLew 0:80ee8f3b695e 1799 HAL_StatusTypeDef HAL_TIM_PWM_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
EricLew 0:80ee8f3b695e 1800 HAL_StatusTypeDef HAL_TIM_PWM_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
EricLew 0:80ee8f3b695e 1801 /* Non-Blocking mode: DMA */
EricLew 0:80ee8f3b695e 1802 HAL_StatusTypeDef HAL_TIM_PWM_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
EricLew 0:80ee8f3b695e 1803 HAL_StatusTypeDef HAL_TIM_PWM_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
EricLew 0:80ee8f3b695e 1804 /**
EricLew 0:80ee8f3b695e 1805 * @}
EricLew 0:80ee8f3b695e 1806 */
EricLew 0:80ee8f3b695e 1807
EricLew 0:80ee8f3b695e 1808 /** @addtogroup TIM_Exported_Functions_Group4 Time Input Capture functions
EricLew 0:80ee8f3b695e 1809 * @brief Time Input Capture functions
EricLew 0:80ee8f3b695e 1810 * @{
EricLew 0:80ee8f3b695e 1811 */
EricLew 0:80ee8f3b695e 1812 /* Timer Input Capture functions **********************************************/
EricLew 0:80ee8f3b695e 1813 HAL_StatusTypeDef HAL_TIM_IC_Init(TIM_HandleTypeDef *htim);
EricLew 0:80ee8f3b695e 1814 HAL_StatusTypeDef HAL_TIM_IC_DeInit(TIM_HandleTypeDef *htim);
EricLew 0:80ee8f3b695e 1815 void HAL_TIM_IC_MspInit(TIM_HandleTypeDef *htim);
EricLew 0:80ee8f3b695e 1816 void HAL_TIM_IC_MspDeInit(TIM_HandleTypeDef *htim);
EricLew 0:80ee8f3b695e 1817 /* Blocking mode: Polling */
EricLew 0:80ee8f3b695e 1818 HAL_StatusTypeDef HAL_TIM_IC_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
EricLew 0:80ee8f3b695e 1819 HAL_StatusTypeDef HAL_TIM_IC_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
EricLew 0:80ee8f3b695e 1820 /* Non-Blocking mode: Interrupt */
EricLew 0:80ee8f3b695e 1821 HAL_StatusTypeDef HAL_TIM_IC_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
EricLew 0:80ee8f3b695e 1822 HAL_StatusTypeDef HAL_TIM_IC_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
EricLew 0:80ee8f3b695e 1823 /* Non-Blocking mode: DMA */
EricLew 0:80ee8f3b695e 1824 HAL_StatusTypeDef HAL_TIM_IC_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
EricLew 0:80ee8f3b695e 1825 HAL_StatusTypeDef HAL_TIM_IC_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
EricLew 0:80ee8f3b695e 1826 /**
EricLew 0:80ee8f3b695e 1827 * @}
EricLew 0:80ee8f3b695e 1828 */
EricLew 0:80ee8f3b695e 1829
EricLew 0:80ee8f3b695e 1830 /** @addtogroup TIM_Exported_Functions_Group5 Time One Pulse functions
EricLew 0:80ee8f3b695e 1831 * @brief Time One Pulse functions
EricLew 0:80ee8f3b695e 1832 * @{
EricLew 0:80ee8f3b695e 1833 */
EricLew 0:80ee8f3b695e 1834 /* Timer One Pulse functions **************************************************/
EricLew 0:80ee8f3b695e 1835 HAL_StatusTypeDef HAL_TIM_OnePulse_Init(TIM_HandleTypeDef *htim, uint32_t OnePulseMode);
EricLew 0:80ee8f3b695e 1836 HAL_StatusTypeDef HAL_TIM_OnePulse_DeInit(TIM_HandleTypeDef *htim);
EricLew 0:80ee8f3b695e 1837 void HAL_TIM_OnePulse_MspInit(TIM_HandleTypeDef *htim);
EricLew 0:80ee8f3b695e 1838 void HAL_TIM_OnePulse_MspDeInit(TIM_HandleTypeDef *htim);
EricLew 0:80ee8f3b695e 1839 /* Blocking mode: Polling */
EricLew 0:80ee8f3b695e 1840 HAL_StatusTypeDef HAL_TIM_OnePulse_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
EricLew 0:80ee8f3b695e 1841 HAL_StatusTypeDef HAL_TIM_OnePulse_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
EricLew 0:80ee8f3b695e 1842 /* Non-Blocking mode: Interrupt */
EricLew 0:80ee8f3b695e 1843 HAL_StatusTypeDef HAL_TIM_OnePulse_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
EricLew 0:80ee8f3b695e 1844 HAL_StatusTypeDef HAL_TIM_OnePulse_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
EricLew 0:80ee8f3b695e 1845 /**
EricLew 0:80ee8f3b695e 1846 * @}
EricLew 0:80ee8f3b695e 1847 */
EricLew 0:80ee8f3b695e 1848
EricLew 0:80ee8f3b695e 1849 /** @addtogroup TIM_Exported_Functions_Group6 Time Encoder functions
EricLew 0:80ee8f3b695e 1850 * @brief Time Encoder functions
EricLew 0:80ee8f3b695e 1851 * @{
EricLew 0:80ee8f3b695e 1852 */
EricLew 0:80ee8f3b695e 1853 /* Timer Encoder functions ****************************************************/
EricLew 0:80ee8f3b695e 1854 HAL_StatusTypeDef HAL_TIM_Encoder_Init(TIM_HandleTypeDef *htim, TIM_Encoder_InitTypeDef* sConfig);
EricLew 0:80ee8f3b695e 1855 HAL_StatusTypeDef HAL_TIM_Encoder_DeInit(TIM_HandleTypeDef *htim);
EricLew 0:80ee8f3b695e 1856 void HAL_TIM_Encoder_MspInit(TIM_HandleTypeDef *htim);
EricLew 0:80ee8f3b695e 1857 void HAL_TIM_Encoder_MspDeInit(TIM_HandleTypeDef *htim);
EricLew 0:80ee8f3b695e 1858 /* Blocking mode: Polling */
EricLew 0:80ee8f3b695e 1859 HAL_StatusTypeDef HAL_TIM_Encoder_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
EricLew 0:80ee8f3b695e 1860 HAL_StatusTypeDef HAL_TIM_Encoder_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
EricLew 0:80ee8f3b695e 1861 /* Non-Blocking mode: Interrupt */
EricLew 0:80ee8f3b695e 1862 HAL_StatusTypeDef HAL_TIM_Encoder_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
EricLew 0:80ee8f3b695e 1863 HAL_StatusTypeDef HAL_TIM_Encoder_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
EricLew 0:80ee8f3b695e 1864 /* Non-Blocking mode: DMA */
EricLew 0:80ee8f3b695e 1865 HAL_StatusTypeDef HAL_TIM_Encoder_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData1, uint32_t *pData2, uint16_t Length);
EricLew 0:80ee8f3b695e 1866 HAL_StatusTypeDef HAL_TIM_Encoder_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
EricLew 0:80ee8f3b695e 1867 /**
EricLew 0:80ee8f3b695e 1868 * @}
EricLew 0:80ee8f3b695e 1869 */
EricLew 0:80ee8f3b695e 1870
EricLew 0:80ee8f3b695e 1871 /** @addtogroup TIM_Exported_Functions_Group7 TIM IRQ handler management
EricLew 0:80ee8f3b695e 1872 * @brief IRQ handler management
EricLew 0:80ee8f3b695e 1873 * @{
EricLew 0:80ee8f3b695e 1874 */
EricLew 0:80ee8f3b695e 1875 /* Interrupt Handler functions ***********************************************/
EricLew 0:80ee8f3b695e 1876 void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim);
EricLew 0:80ee8f3b695e 1877 /**
EricLew 0:80ee8f3b695e 1878 * @}
EricLew 0:80ee8f3b695e 1879 */
EricLew 0:80ee8f3b695e 1880
EricLew 0:80ee8f3b695e 1881 /** @defgroup TIM_Exported_Functions_Group8 Peripheral Control functions
EricLew 0:80ee8f3b695e 1882 * @brief Peripheral Control functions
EricLew 0:80ee8f3b695e 1883 * @{
EricLew 0:80ee8f3b695e 1884 */
EricLew 0:80ee8f3b695e 1885 /* Control functions *********************************************************/
EricLew 0:80ee8f3b695e 1886 HAL_StatusTypeDef HAL_TIM_OC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef* sConfig, uint32_t Channel);
EricLew 0:80ee8f3b695e 1887 HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OC_InitTypeDef* sConfig, uint32_t Channel);
EricLew 0:80ee8f3b695e 1888 HAL_StatusTypeDef HAL_TIM_IC_ConfigChannel(TIM_HandleTypeDef *htim, TIM_IC_InitTypeDef* sConfig, uint32_t Channel);
EricLew 0:80ee8f3b695e 1889 HAL_StatusTypeDef HAL_TIM_OnePulse_ConfigChannel(TIM_HandleTypeDef *htim, TIM_OnePulse_InitTypeDef* sConfig, uint32_t OutputChannel, uint32_t InputChannel);
EricLew 0:80ee8f3b695e 1890 HAL_StatusTypeDef HAL_TIM_ConfigOCrefClear(TIM_HandleTypeDef *htim, TIM_ClearInputConfigTypeDef * sClearInputConfig, uint32_t Channel);
EricLew 0:80ee8f3b695e 1891 HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, TIM_ClockConfigTypeDef * sClockSourceConfig);
EricLew 0:80ee8f3b695e 1892 HAL_StatusTypeDef HAL_TIM_ConfigTI1Input(TIM_HandleTypeDef *htim, uint32_t TI1_Selection);
EricLew 0:80ee8f3b695e 1893 HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization(TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef * sSlaveConfig);
EricLew 0:80ee8f3b695e 1894 HAL_StatusTypeDef HAL_TIM_SlaveConfigSynchronization_IT(TIM_HandleTypeDef *htim, TIM_SlaveConfigTypeDef * sSlaveConfig);
EricLew 0:80ee8f3b695e 1895 HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, \
EricLew 0:80ee8f3b695e 1896 uint32_t *BurstBuffer, uint32_t BurstLength);
EricLew 0:80ee8f3b695e 1897 HAL_StatusTypeDef HAL_TIM_DMABurst_WriteStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc);
EricLew 0:80ee8f3b695e 1898 HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStart(TIM_HandleTypeDef *htim, uint32_t BurstBaseAddress, uint32_t BurstRequestSrc, \
EricLew 0:80ee8f3b695e 1899 uint32_t *BurstBuffer, uint32_t BurstLength);
EricLew 0:80ee8f3b695e 1900 HAL_StatusTypeDef HAL_TIM_DMABurst_ReadStop(TIM_HandleTypeDef *htim, uint32_t BurstRequestSrc);
EricLew 0:80ee8f3b695e 1901 HAL_StatusTypeDef HAL_TIM_GenerateEvent(TIM_HandleTypeDef *htim, uint32_t EventSource);
EricLew 0:80ee8f3b695e 1902 uint32_t HAL_TIM_ReadCapturedValue(TIM_HandleTypeDef *htim, uint32_t Channel);
EricLew 0:80ee8f3b695e 1903 /**
EricLew 0:80ee8f3b695e 1904 * @}
EricLew 0:80ee8f3b695e 1905 */
EricLew 0:80ee8f3b695e 1906
EricLew 0:80ee8f3b695e 1907 /** @defgroup TIM_Exported_Functions_Group9 TIM Callbacks functions
EricLew 0:80ee8f3b695e 1908 * @brief TIM Callbacks functions
EricLew 0:80ee8f3b695e 1909 * @{
EricLew 0:80ee8f3b695e 1910 */
EricLew 0:80ee8f3b695e 1911 /* Callback in non blocking modes (Interrupt and DMA) *************************/
EricLew 0:80ee8f3b695e 1912 void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim);
EricLew 0:80ee8f3b695e 1913 void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim);
EricLew 0:80ee8f3b695e 1914 void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim);
EricLew 0:80ee8f3b695e 1915 void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim);
EricLew 0:80ee8f3b695e 1916 void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim);
EricLew 0:80ee8f3b695e 1917 void HAL_TIM_ErrorCallback(TIM_HandleTypeDef *htim);
EricLew 0:80ee8f3b695e 1918 /**
EricLew 0:80ee8f3b695e 1919 * @}
EricLew 0:80ee8f3b695e 1920 */
EricLew 0:80ee8f3b695e 1921
EricLew 0:80ee8f3b695e 1922 /** @defgroup TIM_Exported_Functions_Group10 Peripheral State functions
EricLew 0:80ee8f3b695e 1923 * @brief Peripheral State functions
EricLew 0:80ee8f3b695e 1924 * @{
EricLew 0:80ee8f3b695e 1925 */
EricLew 0:80ee8f3b695e 1926 /* Peripheral State functions ************************************************/
EricLew 0:80ee8f3b695e 1927 HAL_TIM_StateTypeDef HAL_TIM_Base_GetState(TIM_HandleTypeDef *htim);
EricLew 0:80ee8f3b695e 1928 HAL_TIM_StateTypeDef HAL_TIM_OC_GetState(TIM_HandleTypeDef *htim);
EricLew 0:80ee8f3b695e 1929 HAL_TIM_StateTypeDef HAL_TIM_PWM_GetState(TIM_HandleTypeDef *htim);
EricLew 0:80ee8f3b695e 1930 HAL_TIM_StateTypeDef HAL_TIM_IC_GetState(TIM_HandleTypeDef *htim);
EricLew 0:80ee8f3b695e 1931 HAL_TIM_StateTypeDef HAL_TIM_OnePulse_GetState(TIM_HandleTypeDef *htim);
EricLew 0:80ee8f3b695e 1932 HAL_TIM_StateTypeDef HAL_TIM_Encoder_GetState(TIM_HandleTypeDef *htim);
EricLew 0:80ee8f3b695e 1933 /**
EricLew 0:80ee8f3b695e 1934 * @}
EricLew 0:80ee8f3b695e 1935 */
EricLew 0:80ee8f3b695e 1936
EricLew 0:80ee8f3b695e 1937 /**
EricLew 0:80ee8f3b695e 1938 * @}
EricLew 0:80ee8f3b695e 1939 */
EricLew 0:80ee8f3b695e 1940 /* End of exported functions -------------------------------------------------*/
EricLew 0:80ee8f3b695e 1941
EricLew 0:80ee8f3b695e 1942 /* Private functions----------------------------------------------------------*/
EricLew 0:80ee8f3b695e 1943 /** @defgroup TIM_Private_Functions TIM Private Functions
EricLew 0:80ee8f3b695e 1944 * @{
EricLew 0:80ee8f3b695e 1945 */
EricLew 0:80ee8f3b695e 1946 void TIM_Base_SetConfig(TIM_TypeDef *TIMx, TIM_Base_InitTypeDef *Structure);
EricLew 0:80ee8f3b695e 1947 void TIM_TI1_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICSelection, uint32_t TIM_ICFilter);
EricLew 0:80ee8f3b695e 1948 void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config);
EricLew 0:80ee8f3b695e 1949 void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config);
EricLew 0:80ee8f3b695e 1950 void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config);
EricLew 0:80ee8f3b695e 1951 void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, TIM_OC_InitTypeDef *OC_Config);
EricLew 0:80ee8f3b695e 1952 void TIM_ETR_SetConfig(TIM_TypeDef* TIMx, uint32_t TIM_ExtTRGPrescaler,
EricLew 0:80ee8f3b695e 1953 uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter);
EricLew 0:80ee8f3b695e 1954
EricLew 0:80ee8f3b695e 1955 void TIM_DMADelayPulseCplt(DMA_HandleTypeDef *hdma);
EricLew 0:80ee8f3b695e 1956 void TIM_DMAError(DMA_HandleTypeDef *hdma);
EricLew 0:80ee8f3b695e 1957 void TIM_DMACaptureCplt(DMA_HandleTypeDef *hdma);
EricLew 0:80ee8f3b695e 1958 void TIM_CCxChannelCmd(TIM_TypeDef* TIMx, uint32_t Channel, uint32_t ChannelState);
EricLew 0:80ee8f3b695e 1959 /**
EricLew 0:80ee8f3b695e 1960 * @}
EricLew 0:80ee8f3b695e 1961 */
EricLew 0:80ee8f3b695e 1962 /* End of private functions --------------------------------------------------*/
EricLew 0:80ee8f3b695e 1963
EricLew 0:80ee8f3b695e 1964 /**
EricLew 0:80ee8f3b695e 1965 * @}
EricLew 0:80ee8f3b695e 1966 */
EricLew 0:80ee8f3b695e 1967
EricLew 0:80ee8f3b695e 1968 /**
EricLew 0:80ee8f3b695e 1969 * @}
EricLew 0:80ee8f3b695e 1970 */
EricLew 0:80ee8f3b695e 1971
EricLew 0:80ee8f3b695e 1972 #ifdef __cplusplus
EricLew 0:80ee8f3b695e 1973 }
EricLew 0:80ee8f3b695e 1974 #endif
EricLew 0:80ee8f3b695e 1975
EricLew 0:80ee8f3b695e 1976 #endif /* __STM32L4xx_HAL_TIM_H */
EricLew 0:80ee8f3b695e 1977
EricLew 0:80ee8f3b695e 1978 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
EricLew 0:80ee8f3b695e 1979