Eric Lewiston / STM32L4xx_HAL_Driver

Dependents:   BSP OneHopeOnePrayer FINAL_AUDIO_RECORD AudioDemo

Fork of STM32L4xx_HAL_Driver by Senior Design: Sound Monitor

Committer:
EricLew
Date:
Mon Nov 02 19:37:23 2015 +0000
Revision:
0:80ee8f3b695e
Errors are with definitions of LCD and QSPI functions. I believe all .h and .c files are  uploaded, but there may need to be certain functions called.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
EricLew 0:80ee8f3b695e 1 /**
EricLew 0:80ee8f3b695e 2 ******************************************************************************
EricLew 0:80ee8f3b695e 3 * @file stm32l4xx_hal_smbus.h
EricLew 0:80ee8f3b695e 4 * @author MCD Application Team
EricLew 0:80ee8f3b695e 5 * @version V1.1.0
EricLew 0:80ee8f3b695e 6 * @date 16-September-2015
EricLew 0:80ee8f3b695e 7 * @brief Header file of SMBUS HAL module.
EricLew 0:80ee8f3b695e 8 ******************************************************************************
EricLew 0:80ee8f3b695e 9 * @attention
EricLew 0:80ee8f3b695e 10 *
EricLew 0:80ee8f3b695e 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
EricLew 0:80ee8f3b695e 12 *
EricLew 0:80ee8f3b695e 13 * Redistribution and use in source and binary forms, with or without modification,
EricLew 0:80ee8f3b695e 14 * are permitted provided that the following conditions are met:
EricLew 0:80ee8f3b695e 15 * 1. Redistributions of source code must retain the above copyright notice,
EricLew 0:80ee8f3b695e 16 * this list of conditions and the following disclaimer.
EricLew 0:80ee8f3b695e 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
EricLew 0:80ee8f3b695e 18 * this list of conditions and the following disclaimer in the documentation
EricLew 0:80ee8f3b695e 19 * and/or other materials provided with the distribution.
EricLew 0:80ee8f3b695e 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
EricLew 0:80ee8f3b695e 21 * may be used to endorse or promote products derived from this software
EricLew 0:80ee8f3b695e 22 * without specific prior written permission.
EricLew 0:80ee8f3b695e 23 *
EricLew 0:80ee8f3b695e 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
EricLew 0:80ee8f3b695e 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
EricLew 0:80ee8f3b695e 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
EricLew 0:80ee8f3b695e 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
EricLew 0:80ee8f3b695e 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
EricLew 0:80ee8f3b695e 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
EricLew 0:80ee8f3b695e 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
EricLew 0:80ee8f3b695e 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
EricLew 0:80ee8f3b695e 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
EricLew 0:80ee8f3b695e 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
EricLew 0:80ee8f3b695e 34 *
EricLew 0:80ee8f3b695e 35 ******************************************************************************
EricLew 0:80ee8f3b695e 36 */
EricLew 0:80ee8f3b695e 37
EricLew 0:80ee8f3b695e 38 /* Define to prevent recursive inclusion -------------------------------------*/
EricLew 0:80ee8f3b695e 39 #ifndef __STM32L4xx_HAL_SMBUS_H
EricLew 0:80ee8f3b695e 40 #define __STM32L4xx_HAL_SMBUS_H
EricLew 0:80ee8f3b695e 41
EricLew 0:80ee8f3b695e 42 #ifdef __cplusplus
EricLew 0:80ee8f3b695e 43 extern "C" {
EricLew 0:80ee8f3b695e 44 #endif
EricLew 0:80ee8f3b695e 45
EricLew 0:80ee8f3b695e 46 /* Includes ------------------------------------------------------------------*/
EricLew 0:80ee8f3b695e 47 #include "stm32l4xx_hal_def.h"
EricLew 0:80ee8f3b695e 48
EricLew 0:80ee8f3b695e 49 /** @addtogroup STM32L4xx_HAL_Driver
EricLew 0:80ee8f3b695e 50 * @{
EricLew 0:80ee8f3b695e 51 */
EricLew 0:80ee8f3b695e 52
EricLew 0:80ee8f3b695e 53 /** @addtogroup SMBUS
EricLew 0:80ee8f3b695e 54 * @{
EricLew 0:80ee8f3b695e 55 */
EricLew 0:80ee8f3b695e 56
EricLew 0:80ee8f3b695e 57 /* Exported types ------------------------------------------------------------*/
EricLew 0:80ee8f3b695e 58 /** @defgroup SMBUS_Exported_Types SMBUS Exported Types
EricLew 0:80ee8f3b695e 59 * @{
EricLew 0:80ee8f3b695e 60 */
EricLew 0:80ee8f3b695e 61
EricLew 0:80ee8f3b695e 62 /** @defgroup SMBUS_Configuration_Structure_definition SMBUS Configuration Structure definition
EricLew 0:80ee8f3b695e 63 * @brief SMBUS Configuration Structure definition
EricLew 0:80ee8f3b695e 64 * @{
EricLew 0:80ee8f3b695e 65 */
EricLew 0:80ee8f3b695e 66 typedef struct
EricLew 0:80ee8f3b695e 67 {
EricLew 0:80ee8f3b695e 68 uint32_t Timing; /*!< Specifies the SMBUS_TIMINGR_register value.
EricLew 0:80ee8f3b695e 69 This parameter calculated by referring to SMBUS initialization
EricLew 0:80ee8f3b695e 70 section in Reference manual */
EricLew 0:80ee8f3b695e 71 uint32_t AnalogFilter; /*!< Specifies if Analog Filter is enable or not.
EricLew 0:80ee8f3b695e 72 This parameter can be a value of @ref SMBUS_Analog_Filter */
EricLew 0:80ee8f3b695e 73
EricLew 0:80ee8f3b695e 74 uint32_t OwnAddress1; /*!< Specifies the first device own address.
EricLew 0:80ee8f3b695e 75 This parameter can be a 7-bit or 10-bit address. */
EricLew 0:80ee8f3b695e 76
EricLew 0:80ee8f3b695e 77 uint32_t AddressingMode; /*!< Specifies if 7-bit or 10-bit addressing mode for master is selected.
EricLew 0:80ee8f3b695e 78 This parameter can be a value of @ref SMBUS_addressing_mode */
EricLew 0:80ee8f3b695e 79
EricLew 0:80ee8f3b695e 80 uint32_t DualAddressMode; /*!< Specifies if dual addressing mode is selected.
EricLew 0:80ee8f3b695e 81 This parameter can be a value of @ref SMBUS_dual_addressing_mode */
EricLew 0:80ee8f3b695e 82
EricLew 0:80ee8f3b695e 83 uint32_t OwnAddress2; /*!< Specifies the second device own address if dual addressing mode is selected
EricLew 0:80ee8f3b695e 84 This parameter can be a 7-bit address. */
EricLew 0:80ee8f3b695e 85
EricLew 0:80ee8f3b695e 86 uint32_t OwnAddress2Masks; /*!< Specifies the acknoledge mask address second device own address if dual addressing mode is selected
EricLew 0:80ee8f3b695e 87 This parameter can be a value of @ref SMBUS_own_address2_masks. */
EricLew 0:80ee8f3b695e 88
EricLew 0:80ee8f3b695e 89 uint32_t GeneralCallMode; /*!< Specifies if general call mode is selected.
EricLew 0:80ee8f3b695e 90 This parameter can be a value of @ref SMBUS_general_call_addressing_mode. */
EricLew 0:80ee8f3b695e 91
EricLew 0:80ee8f3b695e 92 uint32_t NoStretchMode; /*!< Specifies if nostretch mode is selected.
EricLew 0:80ee8f3b695e 93 This parameter can be a value of @ref SMBUS_nostretch_mode */
EricLew 0:80ee8f3b695e 94
EricLew 0:80ee8f3b695e 95 uint32_t PacketErrorCheckMode; /*!< Specifies if Packet Error Check mode is selected.
EricLew 0:80ee8f3b695e 96 This parameter can be a value of @ref SMBUS_packet_error_check_mode */
EricLew 0:80ee8f3b695e 97
EricLew 0:80ee8f3b695e 98 uint32_t PeripheralMode; /*!< Specifies which mode of Periphal is selected.
EricLew 0:80ee8f3b695e 99 This parameter can be a value of @ref SMBUS_peripheral_mode */
EricLew 0:80ee8f3b695e 100
EricLew 0:80ee8f3b695e 101 uint32_t SMBusTimeout; /*!< Specifies the content of the 32 Bits SMBUS_TIMEOUT_register value.
EricLew 0:80ee8f3b695e 102 (Enable bits and different timeout values)
EricLew 0:80ee8f3b695e 103 This parameter calculated by referring to SMBUS initialization
EricLew 0:80ee8f3b695e 104 section in Reference manual */
EricLew 0:80ee8f3b695e 105 } SMBUS_InitTypeDef;
EricLew 0:80ee8f3b695e 106 /**
EricLew 0:80ee8f3b695e 107 * @}
EricLew 0:80ee8f3b695e 108 */
EricLew 0:80ee8f3b695e 109
EricLew 0:80ee8f3b695e 110 /** @defgroup HAL_state_definition HAL state definition
EricLew 0:80ee8f3b695e 111 * @brief HAL State definition
EricLew 0:80ee8f3b695e 112 * @{
EricLew 0:80ee8f3b695e 113 */
EricLew 0:80ee8f3b695e 114 #define HAL_SMBUS_STATE_RESET ((uint32_t)0x00000000) /*!< SMBUS not yet initialized or disabled */
EricLew 0:80ee8f3b695e 115 #define HAL_SMBUS_STATE_READY ((uint32_t)0x00000001) /*!< SMBUS initialized and ready for use */
EricLew 0:80ee8f3b695e 116 #define HAL_SMBUS_STATE_BUSY ((uint32_t)0x00000002) /*!< SMBUS internal process is ongoing */
EricLew 0:80ee8f3b695e 117 #define HAL_SMBUS_STATE_MASTER_BUSY_TX ((uint32_t)0x00000012) /*!< Master Data Transmission process is ongoing */
EricLew 0:80ee8f3b695e 118 #define HAL_SMBUS_STATE_MASTER_BUSY_RX ((uint32_t)0x00000022) /*!< Master Data Reception process is ongoing */
EricLew 0:80ee8f3b695e 119 #define HAL_SMBUS_STATE_SLAVE_BUSY_TX ((uint32_t)0x00000032) /*!< Slave Data Transmission process is ongoing */
EricLew 0:80ee8f3b695e 120 #define HAL_SMBUS_STATE_SLAVE_BUSY_RX ((uint32_t)0x00000042) /*!< Slave Data Reception process is ongoing */
EricLew 0:80ee8f3b695e 121 #define HAL_SMBUS_STATE_TIMEOUT ((uint32_t)0x00000003) /*!< Timeout state */
EricLew 0:80ee8f3b695e 122 #define HAL_SMBUS_STATE_ERROR ((uint32_t)0x00000004) /*!< Reception process is ongoing */
EricLew 0:80ee8f3b695e 123 #define HAL_SMBUS_STATE_LISTEN ((uint32_t)0x00000008) /*!< Address Listen Mode is ongoing */
EricLew 0:80ee8f3b695e 124 /**
EricLew 0:80ee8f3b695e 125 * @}
EricLew 0:80ee8f3b695e 126 */
EricLew 0:80ee8f3b695e 127
EricLew 0:80ee8f3b695e 128 /** @defgroup SMBUS_Error_Code_definition SMBUS Error Code definition
EricLew 0:80ee8f3b695e 129 * @brief SMBUS Error Code definition
EricLew 0:80ee8f3b695e 130 * @{
EricLew 0:80ee8f3b695e 131 */
EricLew 0:80ee8f3b695e 132 #define HAL_SMBUS_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
EricLew 0:80ee8f3b695e 133 #define HAL_SMBUS_ERROR_BERR ((uint32_t)0x00000001) /*!< BERR error */
EricLew 0:80ee8f3b695e 134 #define HAL_SMBUS_ERROR_ARLO ((uint32_t)0x00000002) /*!< ARLO error */
EricLew 0:80ee8f3b695e 135 #define HAL_SMBUS_ERROR_ACKF ((uint32_t)0x00000004) /*!< ACKF error */
EricLew 0:80ee8f3b695e 136 #define HAL_SMBUS_ERROR_OVR ((uint32_t)0x00000008) /*!< OVR error */
EricLew 0:80ee8f3b695e 137 #define HAL_SMBUS_ERROR_HALTIMEOUT ((uint32_t)0x00000010) /*!< Timeout error */
EricLew 0:80ee8f3b695e 138 #define HAL_SMBUS_ERROR_BUSTIMEOUT ((uint32_t)0x00000020) /*!< Bus Timeout error */
EricLew 0:80ee8f3b695e 139 #define HAL_SMBUS_ERROR_ALERT ((uint32_t)0x00000040) /*!< Alert error */
EricLew 0:80ee8f3b695e 140 #define HAL_SMBUS_ERROR_PECERR ((uint32_t)0x00000080) /*!< PEC error */
EricLew 0:80ee8f3b695e 141 /**
EricLew 0:80ee8f3b695e 142 * @}
EricLew 0:80ee8f3b695e 143 */
EricLew 0:80ee8f3b695e 144
EricLew 0:80ee8f3b695e 145 /** @defgroup SMBUS_handle_Structure_definition SMBUS handle Structure definition
EricLew 0:80ee8f3b695e 146 * @brief SMBUS handle Structure definition
EricLew 0:80ee8f3b695e 147 * @{
EricLew 0:80ee8f3b695e 148 */
EricLew 0:80ee8f3b695e 149 typedef struct
EricLew 0:80ee8f3b695e 150 {
EricLew 0:80ee8f3b695e 151 I2C_TypeDef *Instance; /*!< SMBUS registers base address */
EricLew 0:80ee8f3b695e 152
EricLew 0:80ee8f3b695e 153 SMBUS_InitTypeDef Init; /*!< SMBUS communication parameters */
EricLew 0:80ee8f3b695e 154
EricLew 0:80ee8f3b695e 155 uint8_t *pBuffPtr; /*!< Pointer to SMBUS transfer buffer */
EricLew 0:80ee8f3b695e 156
EricLew 0:80ee8f3b695e 157 uint16_t XferSize; /*!< SMBUS transfer size */
EricLew 0:80ee8f3b695e 158
EricLew 0:80ee8f3b695e 159 __IO uint16_t XferCount; /*!< SMBUS transfer counter */
EricLew 0:80ee8f3b695e 160
EricLew 0:80ee8f3b695e 161 __IO uint32_t XferOptions; /*!< SMBUS transfer options */
EricLew 0:80ee8f3b695e 162
EricLew 0:80ee8f3b695e 163 __IO uint32_t PreviousState; /*!< SMBUS communication Previous state */
EricLew 0:80ee8f3b695e 164
EricLew 0:80ee8f3b695e 165 HAL_LockTypeDef Lock; /*!< SMBUS locking object */
EricLew 0:80ee8f3b695e 166
EricLew 0:80ee8f3b695e 167 __IO uint32_t State; /*!< SMBUS communication state */
EricLew 0:80ee8f3b695e 168
EricLew 0:80ee8f3b695e 169 __IO uint32_t ErrorCode; /*!< SMBUS Error code */
EricLew 0:80ee8f3b695e 170
EricLew 0:80ee8f3b695e 171 }SMBUS_HandleTypeDef;
EricLew 0:80ee8f3b695e 172 /**
EricLew 0:80ee8f3b695e 173 * @}
EricLew 0:80ee8f3b695e 174 */
EricLew 0:80ee8f3b695e 175
EricLew 0:80ee8f3b695e 176 /**
EricLew 0:80ee8f3b695e 177 * @}
EricLew 0:80ee8f3b695e 178 */
EricLew 0:80ee8f3b695e 179 /* Exported constants --------------------------------------------------------*/
EricLew 0:80ee8f3b695e 180
EricLew 0:80ee8f3b695e 181 /** @defgroup SMBUS_Exported_Constants SMBUS Exported Constants
EricLew 0:80ee8f3b695e 182 * @{
EricLew 0:80ee8f3b695e 183 */
EricLew 0:80ee8f3b695e 184
EricLew 0:80ee8f3b695e 185 /** @defgroup SMBUS_Analog_Filter SMBUS Analog Filter
EricLew 0:80ee8f3b695e 186 * @{
EricLew 0:80ee8f3b695e 187 */
EricLew 0:80ee8f3b695e 188 #define SMBUS_ANALOGFILTER_ENABLE ((uint32_t)0x00000000)
EricLew 0:80ee8f3b695e 189 #define SMBUS_ANALOGFILTER_DISABLE I2C_CR1_ANFOFF
EricLew 0:80ee8f3b695e 190 /**
EricLew 0:80ee8f3b695e 191 * @}
EricLew 0:80ee8f3b695e 192 */
EricLew 0:80ee8f3b695e 193
EricLew 0:80ee8f3b695e 194 /** @defgroup SMBUS_addressing_mode SMBUS addressing mode
EricLew 0:80ee8f3b695e 195 * @{
EricLew 0:80ee8f3b695e 196 */
EricLew 0:80ee8f3b695e 197 #define SMBUS_ADDRESSINGMODE_7BIT ((uint32_t)0x00000001)
EricLew 0:80ee8f3b695e 198 #define SMBUS_ADDRESSINGMODE_10BIT ((uint32_t)0x00000002)
EricLew 0:80ee8f3b695e 199 /**
EricLew 0:80ee8f3b695e 200 * @}
EricLew 0:80ee8f3b695e 201 */
EricLew 0:80ee8f3b695e 202
EricLew 0:80ee8f3b695e 203 /** @defgroup SMBUS_dual_addressing_mode SMBUS dual addressing mode
EricLew 0:80ee8f3b695e 204 * @{
EricLew 0:80ee8f3b695e 205 */
EricLew 0:80ee8f3b695e 206
EricLew 0:80ee8f3b695e 207 #define SMBUS_DUALADDRESS_DISABLE ((uint32_t)0x00000000)
EricLew 0:80ee8f3b695e 208 #define SMBUS_DUALADDRESS_ENABLE I2C_OAR2_OA2EN
EricLew 0:80ee8f3b695e 209 /**
EricLew 0:80ee8f3b695e 210 * @}
EricLew 0:80ee8f3b695e 211 */
EricLew 0:80ee8f3b695e 212
EricLew 0:80ee8f3b695e 213 /** @defgroup SMBUS_own_address2_masks SMBUS own address2 masks
EricLew 0:80ee8f3b695e 214 * @{
EricLew 0:80ee8f3b695e 215 */
EricLew 0:80ee8f3b695e 216
EricLew 0:80ee8f3b695e 217 #define SMBUS_OA2_NOMASK ((uint8_t)0x00)
EricLew 0:80ee8f3b695e 218 #define SMBUS_OA2_MASK01 ((uint8_t)0x01)
EricLew 0:80ee8f3b695e 219 #define SMBUS_OA2_MASK02 ((uint8_t)0x02)
EricLew 0:80ee8f3b695e 220 #define SMBUS_OA2_MASK03 ((uint8_t)0x03)
EricLew 0:80ee8f3b695e 221 #define SMBUS_OA2_MASK04 ((uint8_t)0x04)
EricLew 0:80ee8f3b695e 222 #define SMBUS_OA2_MASK05 ((uint8_t)0x05)
EricLew 0:80ee8f3b695e 223 #define SMBUS_OA2_MASK06 ((uint8_t)0x06)
EricLew 0:80ee8f3b695e 224 #define SMBUS_OA2_MASK07 ((uint8_t)0x07)
EricLew 0:80ee8f3b695e 225 /**
EricLew 0:80ee8f3b695e 226 * @}
EricLew 0:80ee8f3b695e 227 */
EricLew 0:80ee8f3b695e 228
EricLew 0:80ee8f3b695e 229
EricLew 0:80ee8f3b695e 230 /** @defgroup SMBUS_general_call_addressing_mode SMBUS general call addressing mode
EricLew 0:80ee8f3b695e 231 * @{
EricLew 0:80ee8f3b695e 232 */
EricLew 0:80ee8f3b695e 233 #define SMBUS_GENERALCALL_DISABLE ((uint32_t)0x00000000)
EricLew 0:80ee8f3b695e 234 #define SMBUS_GENERALCALL_ENABLE I2C_CR1_GCEN
EricLew 0:80ee8f3b695e 235 /**
EricLew 0:80ee8f3b695e 236 * @}
EricLew 0:80ee8f3b695e 237 */
EricLew 0:80ee8f3b695e 238
EricLew 0:80ee8f3b695e 239 /** @defgroup SMBUS_nostretch_mode SMBUS nostretch mode
EricLew 0:80ee8f3b695e 240 * @{
EricLew 0:80ee8f3b695e 241 */
EricLew 0:80ee8f3b695e 242 #define SMBUS_NOSTRETCH_DISABLE ((uint32_t)0x00000000)
EricLew 0:80ee8f3b695e 243 #define SMBUS_NOSTRETCH_ENABLE I2C_CR1_NOSTRETCH
EricLew 0:80ee8f3b695e 244 /**
EricLew 0:80ee8f3b695e 245 * @}
EricLew 0:80ee8f3b695e 246 */
EricLew 0:80ee8f3b695e 247
EricLew 0:80ee8f3b695e 248 /** @defgroup SMBUS_packet_error_check_mode SMBUS packet error check mode
EricLew 0:80ee8f3b695e 249 * @{
EricLew 0:80ee8f3b695e 250 */
EricLew 0:80ee8f3b695e 251 #define SMBUS_PEC_DISABLE ((uint32_t)0x00000000)
EricLew 0:80ee8f3b695e 252 #define SMBUS_PEC_ENABLE I2C_CR1_PECEN
EricLew 0:80ee8f3b695e 253 /**
EricLew 0:80ee8f3b695e 254 * @}
EricLew 0:80ee8f3b695e 255 */
EricLew 0:80ee8f3b695e 256
EricLew 0:80ee8f3b695e 257 /** @defgroup SMBUS_peripheral_mode SMBUS peripheral mode
EricLew 0:80ee8f3b695e 258 * @{
EricLew 0:80ee8f3b695e 259 */
EricLew 0:80ee8f3b695e 260 #define SMBUS_PERIPHERAL_MODE_SMBUS_HOST (uint32_t)(I2C_CR1_SMBHEN)
EricLew 0:80ee8f3b695e 261 #define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE (uint32_t)(0x00000000)
EricLew 0:80ee8f3b695e 262 #define SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP (uint32_t)(I2C_CR1_SMBDEN)
EricLew 0:80ee8f3b695e 263 /**
EricLew 0:80ee8f3b695e 264 * @}
EricLew 0:80ee8f3b695e 265 */
EricLew 0:80ee8f3b695e 266
EricLew 0:80ee8f3b695e 267 /** @defgroup SMBUS_ReloadEndMode_definition SMBUS ReloadEndMode definition
EricLew 0:80ee8f3b695e 268 * @{
EricLew 0:80ee8f3b695e 269 */
EricLew 0:80ee8f3b695e 270
EricLew 0:80ee8f3b695e 271 #define SMBUS_SOFTEND_MODE ((uint32_t)0x00000000)
EricLew 0:80ee8f3b695e 272 #define SMBUS_RELOAD_MODE I2C_CR2_RELOAD
EricLew 0:80ee8f3b695e 273 #define SMBUS_AUTOEND_MODE I2C_CR2_AUTOEND
EricLew 0:80ee8f3b695e 274 #define SMBUS_SENDPEC_MODE I2C_CR2_PECBYTE
EricLew 0:80ee8f3b695e 275 /**
EricLew 0:80ee8f3b695e 276 * @}
EricLew 0:80ee8f3b695e 277 */
EricLew 0:80ee8f3b695e 278
EricLew 0:80ee8f3b695e 279 /** @defgroup SMBUS_StartStopMode_definition SMBUS StartStopMode definition
EricLew 0:80ee8f3b695e 280 * @{
EricLew 0:80ee8f3b695e 281 */
EricLew 0:80ee8f3b695e 282
EricLew 0:80ee8f3b695e 283 #define SMBUS_NO_STARTSTOP ((uint32_t)0x00000000)
EricLew 0:80ee8f3b695e 284 #define SMBUS_GENERATE_STOP I2C_CR2_STOP
EricLew 0:80ee8f3b695e 285 #define SMBUS_GENERATE_START_READ (uint32_t)(I2C_CR2_START | I2C_CR2_RD_WRN)
EricLew 0:80ee8f3b695e 286 #define SMBUS_GENERATE_START_WRITE I2C_CR2_START
EricLew 0:80ee8f3b695e 287 /**
EricLew 0:80ee8f3b695e 288 * @}
EricLew 0:80ee8f3b695e 289 */
EricLew 0:80ee8f3b695e 290
EricLew 0:80ee8f3b695e 291 /** @defgroup SMBUS_XferOptions_definition SMBUS XferOptions definition
EricLew 0:80ee8f3b695e 292 * @{
EricLew 0:80ee8f3b695e 293 */
EricLew 0:80ee8f3b695e 294
EricLew 0:80ee8f3b695e 295 #define SMBUS_FIRST_FRAME ((uint32_t)(SMBUS_SOFTEND_MODE))
EricLew 0:80ee8f3b695e 296 #define SMBUS_NEXT_FRAME ((uint32_t)(SMBUS_RELOAD_MODE | SMBUS_SOFTEND_MODE))
EricLew 0:80ee8f3b695e 297 #define SMBUS_FIRST_AND_LAST_FRAME_NO_PEC SMBUS_AUTOEND_MODE
EricLew 0:80ee8f3b695e 298 #define SMBUS_LAST_FRAME_NO_PEC SMBUS_AUTOEND_MODE
EricLew 0:80ee8f3b695e 299 #define SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC ((uint32_t)(SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE))
EricLew 0:80ee8f3b695e 300 #define SMBUS_LAST_FRAME_WITH_PEC ((uint32_t)(SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE))
EricLew 0:80ee8f3b695e 301 /**
EricLew 0:80ee8f3b695e 302 * @}
EricLew 0:80ee8f3b695e 303 */
EricLew 0:80ee8f3b695e 304
EricLew 0:80ee8f3b695e 305 /** @defgroup SMBUS_Interrupt_configuration_definition SMBUS Interrupt configuration definition
EricLew 0:80ee8f3b695e 306 * @brief SMBUS Interrupt definition
EricLew 0:80ee8f3b695e 307 * Elements values convention: 0xXXXXXXXX
EricLew 0:80ee8f3b695e 308 * - XXXXXXXX : Interrupt control mask
EricLew 0:80ee8f3b695e 309 * @{
EricLew 0:80ee8f3b695e 310 */
EricLew 0:80ee8f3b695e 311 #define SMBUS_IT_ERRI I2C_CR1_ERRIE
EricLew 0:80ee8f3b695e 312 #define SMBUS_IT_TCI I2C_CR1_TCIE
EricLew 0:80ee8f3b695e 313 #define SMBUS_IT_STOPI I2C_CR1_STOPIE
EricLew 0:80ee8f3b695e 314 #define SMBUS_IT_NACKI I2C_CR1_NACKIE
EricLew 0:80ee8f3b695e 315 #define SMBUS_IT_ADDRI I2C_CR1_ADDRIE
EricLew 0:80ee8f3b695e 316 #define SMBUS_IT_RXI I2C_CR1_RXIE
EricLew 0:80ee8f3b695e 317 #define SMBUS_IT_TXI I2C_CR1_TXIE
EricLew 0:80ee8f3b695e 318 #define SMBUS_IT_TX (SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_STOPI | SMBUS_IT_NACKI | SMBUS_IT_TXI)
EricLew 0:80ee8f3b695e 319 #define SMBUS_IT_RX (SMBUS_IT_ERRI | SMBUS_IT_TCI | SMBUS_IT_NACKI | SMBUS_IT_RXI)
EricLew 0:80ee8f3b695e 320 #define SMBUS_IT_ALERT (SMBUS_IT_ERRI)
EricLew 0:80ee8f3b695e 321 #define SMBUS_IT_ADDR (SMBUS_IT_ADDRI | SMBUS_IT_STOPI | SMBUS_IT_NACKI)
EricLew 0:80ee8f3b695e 322 /**
EricLew 0:80ee8f3b695e 323 * @}
EricLew 0:80ee8f3b695e 324 */
EricLew 0:80ee8f3b695e 325
EricLew 0:80ee8f3b695e 326 /** @defgroup SMBUS_Flag_definition SMBUS Flag definition
EricLew 0:80ee8f3b695e 327 * @brief Flag definition
EricLew 0:80ee8f3b695e 328 * Elements values convention: 0xXXXXYYYY
EricLew 0:80ee8f3b695e 329 * - XXXXXXXX : Flag mask
EricLew 0:80ee8f3b695e 330 * @{
EricLew 0:80ee8f3b695e 331 */
EricLew 0:80ee8f3b695e 332
EricLew 0:80ee8f3b695e 333 #define SMBUS_FLAG_TXE I2C_ISR_TXE
EricLew 0:80ee8f3b695e 334 #define SMBUS_FLAG_TXIS I2C_ISR_TXIS
EricLew 0:80ee8f3b695e 335 #define SMBUS_FLAG_RXNE I2C_ISR_RXNE
EricLew 0:80ee8f3b695e 336 #define SMBUS_FLAG_ADDR I2C_ISR_ADDR
EricLew 0:80ee8f3b695e 337 #define SMBUS_FLAG_AF I2C_ISR_NACKF
EricLew 0:80ee8f3b695e 338 #define SMBUS_FLAG_STOPF I2C_ISR_STOPF
EricLew 0:80ee8f3b695e 339 #define SMBUS_FLAG_TC I2C_ISR_TC
EricLew 0:80ee8f3b695e 340 #define SMBUS_FLAG_TCR I2C_ISR_TCR
EricLew 0:80ee8f3b695e 341 #define SMBUS_FLAG_BERR I2C_ISR_BERR
EricLew 0:80ee8f3b695e 342 #define SMBUS_FLAG_ARLO I2C_ISR_ARLO
EricLew 0:80ee8f3b695e 343 #define SMBUS_FLAG_OVR I2C_ISR_OVR
EricLew 0:80ee8f3b695e 344 #define SMBUS_FLAG_PECERR I2C_ISR_PECERR
EricLew 0:80ee8f3b695e 345 #define SMBUS_FLAG_TIMEOUT I2C_ISR_TIMEOUT
EricLew 0:80ee8f3b695e 346 #define SMBUS_FLAG_ALERT I2C_ISR_ALERT
EricLew 0:80ee8f3b695e 347 #define SMBUS_FLAG_BUSY I2C_ISR_BUSY
EricLew 0:80ee8f3b695e 348 #define SMBUS_FLAG_DIR I2C_ISR_DIR
EricLew 0:80ee8f3b695e 349 /**
EricLew 0:80ee8f3b695e 350 * @}
EricLew 0:80ee8f3b695e 351 */
EricLew 0:80ee8f3b695e 352
EricLew 0:80ee8f3b695e 353 /**
EricLew 0:80ee8f3b695e 354 * @}
EricLew 0:80ee8f3b695e 355 */
EricLew 0:80ee8f3b695e 356
EricLew 0:80ee8f3b695e 357 /* Exported macros ------------------------------------------------------------*/
EricLew 0:80ee8f3b695e 358 /** @defgroup SMBUS_Exported_Macros SMBUS Exported Macros
EricLew 0:80ee8f3b695e 359 * @{
EricLew 0:80ee8f3b695e 360 */
EricLew 0:80ee8f3b695e 361
EricLew 0:80ee8f3b695e 362 /** @brief Reset SMBUS handle state.
EricLew 0:80ee8f3b695e 363 * @param __HANDLE__: specifies the SMBUS Handle.
EricLew 0:80ee8f3b695e 364 * @retval None
EricLew 0:80ee8f3b695e 365 */
EricLew 0:80ee8f3b695e 366 #define __HAL_SMBUS_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SMBUS_STATE_RESET)
EricLew 0:80ee8f3b695e 367
EricLew 0:80ee8f3b695e 368 /** @brief Enable the specified SMBUS interrupts.
EricLew 0:80ee8f3b695e 369 * @param __HANDLE__: specifies the SMBUS Handle.
EricLew 0:80ee8f3b695e 370 * @param __INTERRUPT__: specifies the interrupt source to enable.
EricLew 0:80ee8f3b695e 371 * This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 372 * @arg SMBUS_IT_ERRI: Errors interrupt enable
EricLew 0:80ee8f3b695e 373 * @arg SMBUS_IT_TCI: Transfer complete interrupt enable
EricLew 0:80ee8f3b695e 374 * @arg SMBUS_IT_STOPI: STOP detection interrupt enable
EricLew 0:80ee8f3b695e 375 * @arg SMBUS_IT_NACKI: NACK received interrupt enable
EricLew 0:80ee8f3b695e 376 * @arg SMBUS_IT_ADDRI: Address match interrupt enable
EricLew 0:80ee8f3b695e 377 * @arg SMBUS_IT_RXI: RX interrupt enable
EricLew 0:80ee8f3b695e 378 * @arg SMBUS_IT_TXI: TX interrupt enable
EricLew 0:80ee8f3b695e 379 *
EricLew 0:80ee8f3b695e 380 * @retval None
EricLew 0:80ee8f3b695e 381 */
EricLew 0:80ee8f3b695e 382 #define __HAL_SMBUS_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 |= (__INTERRUPT__))
EricLew 0:80ee8f3b695e 383
EricLew 0:80ee8f3b695e 384 /** @brief Disable the specified SMBUS interrupts.
EricLew 0:80ee8f3b695e 385 * @param __HANDLE__: specifies the SMBUS Handle.
EricLew 0:80ee8f3b695e 386 * @param __INTERRUPT__: specifies the interrupt source to disable.
EricLew 0:80ee8f3b695e 387 * This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 388 * @arg SMBUS_IT_ERRI: Errors interrupt enable
EricLew 0:80ee8f3b695e 389 * @arg SMBUS_IT_TCI: Transfer complete interrupt enable
EricLew 0:80ee8f3b695e 390 * @arg SMBUS_IT_STOPI: STOP detection interrupt enable
EricLew 0:80ee8f3b695e 391 * @arg SMBUS_IT_NACKI: NACK received interrupt enable
EricLew 0:80ee8f3b695e 392 * @arg SMBUS_IT_ADDRI: Address match interrupt enable
EricLew 0:80ee8f3b695e 393 * @arg SMBUS_IT_RXI: RX interrupt enable
EricLew 0:80ee8f3b695e 394 * @arg SMBUS_IT_TXI: TX interrupt enable
EricLew 0:80ee8f3b695e 395 *
EricLew 0:80ee8f3b695e 396 * @retval None
EricLew 0:80ee8f3b695e 397 */
EricLew 0:80ee8f3b695e 398 #define __HAL_SMBUS_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR1 &= (~(__INTERRUPT__)))
EricLew 0:80ee8f3b695e 399
EricLew 0:80ee8f3b695e 400 /** @brief Check whether the specified SMBUS interrupt source is enabled or not.
EricLew 0:80ee8f3b695e 401 * @param __HANDLE__: specifies the SMBUS Handle.
EricLew 0:80ee8f3b695e 402 * @param __INTERRUPT__: specifies the SMBUS interrupt source to check.
EricLew 0:80ee8f3b695e 403 * This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 404 * @arg SMBUS_IT_ERRI: Errors interrupt enable
EricLew 0:80ee8f3b695e 405 * @arg SMBUS_IT_TCI: Transfer complete interrupt enable
EricLew 0:80ee8f3b695e 406 * @arg SMBUS_IT_STOPI: STOP detection interrupt enable
EricLew 0:80ee8f3b695e 407 * @arg SMBUS_IT_NACKI: NACK received interrupt enable
EricLew 0:80ee8f3b695e 408 * @arg SMBUS_IT_ADDRI: Address match interrupt enable
EricLew 0:80ee8f3b695e 409 * @arg SMBUS_IT_RXI: RX interrupt enable
EricLew 0:80ee8f3b695e 410 * @arg SMBUS_IT_TXI: TX interrupt enable
EricLew 0:80ee8f3b695e 411 *
EricLew 0:80ee8f3b695e 412 * @retval The new state of __IT__ (TRUE or FALSE).
EricLew 0:80ee8f3b695e 413 */
EricLew 0:80ee8f3b695e 414 #define __HAL_SMBUS_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR1 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
EricLew 0:80ee8f3b695e 415
EricLew 0:80ee8f3b695e 416 /** @brief Check whether the specified SMBUS flag is set or not.
EricLew 0:80ee8f3b695e 417 * @param __HANDLE__: specifies the SMBUS Handle.
EricLew 0:80ee8f3b695e 418 * @param __FLAG__: specifies the flag to check.
EricLew 0:80ee8f3b695e 419 * This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 420 * @arg SMBUS_FLAG_TXE: Transmit data register empty
EricLew 0:80ee8f3b695e 421 * @arg SMBUS_FLAG_TXIS: Transmit interrupt status
EricLew 0:80ee8f3b695e 422 * @arg SMBUS_FLAG_RXNE: Receive data register not empty
EricLew 0:80ee8f3b695e 423 * @arg SMBUS_FLAG_ADDR: Address matched (slave mode)
EricLew 0:80ee8f3b695e 424 * @arg SMBUS_FLAG_AF: NACK received flag
EricLew 0:80ee8f3b695e 425 * @arg SMBUS_FLAG_STOPF: STOP detection flag
EricLew 0:80ee8f3b695e 426 * @arg SMBUS_FLAG_TC: Transfer complete (master mode)
EricLew 0:80ee8f3b695e 427 * @arg SMBUS_FLAG_TCR: Transfer complete reload
EricLew 0:80ee8f3b695e 428 * @arg SMBUS_FLAG_BERR: Bus error
EricLew 0:80ee8f3b695e 429 * @arg SMBUS_FLAG_ARLO: Arbitration lost
EricLew 0:80ee8f3b695e 430 * @arg SMBUS_FLAG_OVR: Overrun/Underrun
EricLew 0:80ee8f3b695e 431 * @arg SMBUS_FLAG_PECERR: PEC error in reception
EricLew 0:80ee8f3b695e 432 * @arg SMBUS_FLAG_TIMEOUT: Timeout or Tlow detection flag
EricLew 0:80ee8f3b695e 433 * @arg SMBUS_FLAG_ALERT: SMBus alert
EricLew 0:80ee8f3b695e 434 * @arg SMBUS_FLAG_BUSY: Bus busy
EricLew 0:80ee8f3b695e 435 * @arg SMBUS_FLAG_DIR: Transfer direction (slave mode)
EricLew 0:80ee8f3b695e 436 *
EricLew 0:80ee8f3b695e 437 * @retval The new state of __FLAG__ (TRUE or FALSE).
EricLew 0:80ee8f3b695e 438 */
EricLew 0:80ee8f3b695e 439 #define SMBUS_FLAG_MASK ((uint32_t)0x0001FFFF)
EricLew 0:80ee8f3b695e 440 #define __HAL_SMBUS_GET_FLAG(__HANDLE__, __FLAG__) (((((__HANDLE__)->Instance->ISR) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK)))
EricLew 0:80ee8f3b695e 441
EricLew 0:80ee8f3b695e 442 /** @brief Clear the SMBUS pending flags which are cleared by writing 1 in a specific bit.
EricLew 0:80ee8f3b695e 443 * @param __HANDLE__: specifies the SMBUS Handle.
EricLew 0:80ee8f3b695e 444 * @param __FLAG__: specifies the flag to clear.
EricLew 0:80ee8f3b695e 445 * This parameter can be any combination of the following values:
EricLew 0:80ee8f3b695e 446 * @arg SMBUS_FLAG_ADDR: Address matched (slave mode)
EricLew 0:80ee8f3b695e 447 * @arg SMBUS_FLAG_AF: NACK received flag
EricLew 0:80ee8f3b695e 448 * @arg SMBUS_FLAG_STOPF: STOP detection flag
EricLew 0:80ee8f3b695e 449 * @arg SMBUS_FLAG_BERR: Bus error
EricLew 0:80ee8f3b695e 450 * @arg SMBUS_FLAG_ARLO: Arbitration lost
EricLew 0:80ee8f3b695e 451 * @arg SMBUS_FLAG_OVR: Overrun/Underrun
EricLew 0:80ee8f3b695e 452 * @arg SMBUS_FLAG_PECERR: PEC error in reception
EricLew 0:80ee8f3b695e 453 * @arg SMBUS_FLAG_TIMEOUT: Timeout or Tlow detection flag
EricLew 0:80ee8f3b695e 454 * @arg SMBUS_FLAG_ALERT: SMBus alert
EricLew 0:80ee8f3b695e 455 *
EricLew 0:80ee8f3b695e 456 * @retval None
EricLew 0:80ee8f3b695e 457 */
EricLew 0:80ee8f3b695e 458 #define __HAL_SMBUS_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
EricLew 0:80ee8f3b695e 459
EricLew 0:80ee8f3b695e 460 /** @brief Enable the specified SMBUS peripheral.
EricLew 0:80ee8f3b695e 461 * @param __HANDLE__: specifies the SMBUS Handle.
EricLew 0:80ee8f3b695e 462 * @retval None
EricLew 0:80ee8f3b695e 463 */
EricLew 0:80ee8f3b695e 464 #define __HAL_SMBUS_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
EricLew 0:80ee8f3b695e 465
EricLew 0:80ee8f3b695e 466 /** @brief Disable the specified SMBUS peripheral.
EricLew 0:80ee8f3b695e 467 * @param __HANDLE__: specifies the SMBUS Handle.
EricLew 0:80ee8f3b695e 468 * @retval None
EricLew 0:80ee8f3b695e 469 */
EricLew 0:80ee8f3b695e 470 #define __HAL_SMBUS_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR1, I2C_CR1_PE))
EricLew 0:80ee8f3b695e 471
EricLew 0:80ee8f3b695e 472 /** @brief Generate a Non-Acknowledge SMBUS peripheral in Slave mode.
EricLew 0:80ee8f3b695e 473 * @param __HANDLE__: specifies the SMBUS Handle.
EricLew 0:80ee8f3b695e 474 * @retval None
EricLew 0:80ee8f3b695e 475 */
EricLew 0:80ee8f3b695e 476 #define __HAL_SMBUS_GENERATE_NACK(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR2, I2C_CR2_NACK))
EricLew 0:80ee8f3b695e 477
EricLew 0:80ee8f3b695e 478 /**
EricLew 0:80ee8f3b695e 479 * @}
EricLew 0:80ee8f3b695e 480 */
EricLew 0:80ee8f3b695e 481
EricLew 0:80ee8f3b695e 482
EricLew 0:80ee8f3b695e 483 /* Private constants ---------------------------------------------------------*/
EricLew 0:80ee8f3b695e 484
EricLew 0:80ee8f3b695e 485 /* Private macros ------------------------------------------------------------*/
EricLew 0:80ee8f3b695e 486 /** @defgroup SMBUS_Private_Macro SMBUS Private Macros
EricLew 0:80ee8f3b695e 487 * @{
EricLew 0:80ee8f3b695e 488 */
EricLew 0:80ee8f3b695e 489
EricLew 0:80ee8f3b695e 490 #define IS_SMBUS_ANALOG_FILTER(FILTER) (((FILTER) == SMBUS_ANALOGFILTER_ENABLE) || \
EricLew 0:80ee8f3b695e 491 ((FILTER) == SMBUS_ANALOGFILTER_DISABLE))
EricLew 0:80ee8f3b695e 492
EricLew 0:80ee8f3b695e 493 #define IS_SMBUS_ADDRESSING_MODE(MODE) (((MODE) == SMBUS_ADDRESSINGMODE_7BIT) || \
EricLew 0:80ee8f3b695e 494 ((MODE) == SMBUS_ADDRESSINGMODE_10BIT))
EricLew 0:80ee8f3b695e 495
EricLew 0:80ee8f3b695e 496 #define IS_SMBUS_DUAL_ADDRESS(ADDRESS) (((ADDRESS) == SMBUS_DUALADDRESS_DISABLE) || \
EricLew 0:80ee8f3b695e 497 ((ADDRESS) == SMBUS_DUALADDRESS_ENABLE))
EricLew 0:80ee8f3b695e 498
EricLew 0:80ee8f3b695e 499 #define IS_SMBUS_OWN_ADDRESS2_MASK(MASK) (((MASK) == SMBUS_OA2_NOMASK) || \
EricLew 0:80ee8f3b695e 500 ((MASK) == SMBUS_OA2_MASK01) || \
EricLew 0:80ee8f3b695e 501 ((MASK) == SMBUS_OA2_MASK02) || \
EricLew 0:80ee8f3b695e 502 ((MASK) == SMBUS_OA2_MASK03) || \
EricLew 0:80ee8f3b695e 503 ((MASK) == SMBUS_OA2_MASK04) || \
EricLew 0:80ee8f3b695e 504 ((MASK) == SMBUS_OA2_MASK05) || \
EricLew 0:80ee8f3b695e 505 ((MASK) == SMBUS_OA2_MASK06) || \
EricLew 0:80ee8f3b695e 506 ((MASK) == SMBUS_OA2_MASK07))
EricLew 0:80ee8f3b695e 507
EricLew 0:80ee8f3b695e 508 #define IS_SMBUS_GENERAL_CALL(CALL) (((CALL) == SMBUS_GENERALCALL_DISABLE) || \
EricLew 0:80ee8f3b695e 509 ((CALL) == SMBUS_GENERALCALL_ENABLE))
EricLew 0:80ee8f3b695e 510
EricLew 0:80ee8f3b695e 511 #define IS_SMBUS_NO_STRETCH(STRETCH) (((STRETCH) == SMBUS_NOSTRETCH_DISABLE) || \
EricLew 0:80ee8f3b695e 512 ((STRETCH) == SMBUS_NOSTRETCH_ENABLE))
EricLew 0:80ee8f3b695e 513
EricLew 0:80ee8f3b695e 514 #define IS_SMBUS_PEC(PEC) (((PEC) == SMBUS_PEC_DISABLE) || \
EricLew 0:80ee8f3b695e 515 ((PEC) == SMBUS_PEC_ENABLE))
EricLew 0:80ee8f3b695e 516
EricLew 0:80ee8f3b695e 517 #define IS_SMBUS_PERIPHERAL_MODE(MODE) (((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_HOST) || \
EricLew 0:80ee8f3b695e 518 ((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE) || \
EricLew 0:80ee8f3b695e 519 ((MODE) == SMBUS_PERIPHERAL_MODE_SMBUS_SLAVE_ARP))
EricLew 0:80ee8f3b695e 520
EricLew 0:80ee8f3b695e 521 #define IS_SMBUS_TRANSFER_MODE(MODE) (((MODE) == SMBUS_RELOAD_MODE) || \
EricLew 0:80ee8f3b695e 522 ((MODE) == SMBUS_AUTOEND_MODE) || \
EricLew 0:80ee8f3b695e 523 ((MODE) == SMBUS_SOFTEND_MODE) || \
EricLew 0:80ee8f3b695e 524 ((MODE) == (SMBUS_RELOAD_MODE | SMBUS_SENDPEC_MODE)) || \
EricLew 0:80ee8f3b695e 525 ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE)) || \
EricLew 0:80ee8f3b695e 526 ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_RELOAD_MODE)) || \
EricLew 0:80ee8f3b695e 527 ((MODE) == (SMBUS_AUTOEND_MODE | SMBUS_SENDPEC_MODE | SMBUS_RELOAD_MODE )))
EricLew 0:80ee8f3b695e 528
EricLew 0:80ee8f3b695e 529
EricLew 0:80ee8f3b695e 530 #define IS_SMBUS_TRANSFER_REQUEST(REQUEST) (((REQUEST) == SMBUS_GENERATE_STOP) || \
EricLew 0:80ee8f3b695e 531 ((REQUEST) == SMBUS_GENERATE_START_READ) || \
EricLew 0:80ee8f3b695e 532 ((REQUEST) == SMBUS_GENERATE_START_WRITE) || \
EricLew 0:80ee8f3b695e 533 ((REQUEST) == SMBUS_NO_STARTSTOP))
EricLew 0:80ee8f3b695e 534
EricLew 0:80ee8f3b695e 535
EricLew 0:80ee8f3b695e 536 #define IS_SMBUS_TRANSFER_OPTIONS_REQUEST(REQUEST) (((REQUEST) == SMBUS_FIRST_FRAME) || \
EricLew 0:80ee8f3b695e 537 ((REQUEST) == SMBUS_NEXT_FRAME) || \
EricLew 0:80ee8f3b695e 538 ((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_NO_PEC) || \
EricLew 0:80ee8f3b695e 539 ((REQUEST) == SMBUS_LAST_FRAME_NO_PEC) || \
EricLew 0:80ee8f3b695e 540 ((REQUEST) == SMBUS_FIRST_AND_LAST_FRAME_WITH_PEC) || \
EricLew 0:80ee8f3b695e 541 ((REQUEST) == SMBUS_LAST_FRAME_WITH_PEC))
EricLew 0:80ee8f3b695e 542
EricLew 0:80ee8f3b695e 543 #define SMBUS_RESET_CR1(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (uint32_t)~((uint32_t)(I2C_CR1_SMBHEN | I2C_CR1_SMBDEN | I2C_CR1_PECEN)))
EricLew 0:80ee8f3b695e 544 #define SMBUS_RESET_CR2(__HANDLE__) ((__HANDLE__)->Instance->CR2 &= (uint32_t)~((uint32_t)(I2C_CR2_SADD | I2C_CR2_HEAD10R | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_RD_WRN)))
EricLew 0:80ee8f3b695e 545
EricLew 0:80ee8f3b695e 546 #define SMBUS_GENERATE_START(__ADDMODE__,__ADDRESS__) (((__ADDMODE__) == SMBUS_ADDRESSINGMODE_7BIT) ? (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_START) | (I2C_CR2_AUTOEND)) & (~I2C_CR2_RD_WRN)) : \
EricLew 0:80ee8f3b695e 547 (uint32_t)((((uint32_t)(__ADDRESS__) & (I2C_CR2_SADD)) | (I2C_CR2_ADD10) | (I2C_CR2_START)) & (~I2C_CR2_RD_WRN)))
EricLew 0:80ee8f3b695e 548
EricLew 0:80ee8f3b695e 549 #define SMBUS_GET_ADDR_MATCH(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_ADDCODE) >> 17)
EricLew 0:80ee8f3b695e 550 #define SMBUS_GET_DIR(__HANDLE__) (((__HANDLE__)->Instance->ISR & I2C_ISR_DIR) >> 16)
EricLew 0:80ee8f3b695e 551 #define SMBUS_GET_STOP_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_AUTOEND)
EricLew 0:80ee8f3b695e 552 #define SMBUS_GET_PEC_MODE(__HANDLE__) ((__HANDLE__)->Instance->CR2 & I2C_CR2_PECBYTE)
EricLew 0:80ee8f3b695e 553 #define SMBUS_GET_ALERT_ENABLED(__HANDLE__) ((__HANDLE__)->Instance->CR1 & I2C_CR1_ALERTEN)
EricLew 0:80ee8f3b695e 554
EricLew 0:80ee8f3b695e 555 #define SMBUS_GET_ISR_REG(__HANDLE__) ((__HANDLE__)->Instance->ISR)
EricLew 0:80ee8f3b695e 556 #define SMBUS_CHECK_FLAG(__ISR__, __FLAG__) ((((__ISR__) & ((__FLAG__) & SMBUS_FLAG_MASK)) == ((__FLAG__) & SMBUS_FLAG_MASK)))
EricLew 0:80ee8f3b695e 557
EricLew 0:80ee8f3b695e 558 #define IS_SMBUS_OWN_ADDRESS1(ADDRESS1) ((ADDRESS1) <= (uint32_t)0x000003FF)
EricLew 0:80ee8f3b695e 559 #define IS_SMBUS_OWN_ADDRESS2(ADDRESS2) ((ADDRESS2) <= (uint16_t)0x00FF)
EricLew 0:80ee8f3b695e 560
EricLew 0:80ee8f3b695e 561 /**
EricLew 0:80ee8f3b695e 562 * @}
EricLew 0:80ee8f3b695e 563 */
EricLew 0:80ee8f3b695e 564
EricLew 0:80ee8f3b695e 565 /* Private Functions ---------------------------------------------------------*/
EricLew 0:80ee8f3b695e 566 /** @defgroup SMBUS_Private_Functions SMBUS Private Functions
EricLew 0:80ee8f3b695e 567 * @{
EricLew 0:80ee8f3b695e 568 */
EricLew 0:80ee8f3b695e 569 /* Private functions are defined in stm32l4xx_hal_smbus.c file */
EricLew 0:80ee8f3b695e 570 /**
EricLew 0:80ee8f3b695e 571 * @}
EricLew 0:80ee8f3b695e 572 */
EricLew 0:80ee8f3b695e 573
EricLew 0:80ee8f3b695e 574 /* Exported functions --------------------------------------------------------*/
EricLew 0:80ee8f3b695e 575 /** @addtogroup SMBUS_Exported_Functions SMBUS Exported Functions
EricLew 0:80ee8f3b695e 576 * @{
EricLew 0:80ee8f3b695e 577 */
EricLew 0:80ee8f3b695e 578
EricLew 0:80ee8f3b695e 579 /** @addtogroup SMBUS_Exported_Functions_Group1 Initialization and de-initialization functions
EricLew 0:80ee8f3b695e 580 * @{
EricLew 0:80ee8f3b695e 581 */
EricLew 0:80ee8f3b695e 582
EricLew 0:80ee8f3b695e 583 /* Initialization and de-initialization functions **********************************/
EricLew 0:80ee8f3b695e 584 HAL_StatusTypeDef HAL_SMBUS_Init(SMBUS_HandleTypeDef *hsmbus);
EricLew 0:80ee8f3b695e 585 HAL_StatusTypeDef HAL_SMBUS_DeInit (SMBUS_HandleTypeDef *hsmbus);
EricLew 0:80ee8f3b695e 586 void HAL_SMBUS_MspInit(SMBUS_HandleTypeDef *hsmbus);
EricLew 0:80ee8f3b695e 587 void HAL_SMBUS_MspDeInit(SMBUS_HandleTypeDef *hsmbus);
EricLew 0:80ee8f3b695e 588
EricLew 0:80ee8f3b695e 589 /**
EricLew 0:80ee8f3b695e 590 * @}
EricLew 0:80ee8f3b695e 591 */
EricLew 0:80ee8f3b695e 592
EricLew 0:80ee8f3b695e 593 /** @addtogroup SMBUS_Exported_Functions_Group2 Input and Output operation functions
EricLew 0:80ee8f3b695e 594 * @{
EricLew 0:80ee8f3b695e 595 */
EricLew 0:80ee8f3b695e 596
EricLew 0:80ee8f3b695e 597 /* IO operation functions *****************************************************/
EricLew 0:80ee8f3b695e 598 /** @addtogroup Blocking_mode_Polling Blocking mode Polling
EricLew 0:80ee8f3b695e 599 * @{
EricLew 0:80ee8f3b695e 600 */
EricLew 0:80ee8f3b695e 601 /******* Blocking mode: Polling */
EricLew 0:80ee8f3b695e 602 HAL_StatusTypeDef HAL_SMBUS_IsDeviceReady(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint32_t Trials, uint32_t Timeout);
EricLew 0:80ee8f3b695e 603 /**
EricLew 0:80ee8f3b695e 604 * @}
EricLew 0:80ee8f3b695e 605 */
EricLew 0:80ee8f3b695e 606
EricLew 0:80ee8f3b695e 607 /** @addtogroup Non-Blocking_mode_Interrupt Non-Blocking mode Interrupt
EricLew 0:80ee8f3b695e 608 * @{
EricLew 0:80ee8f3b695e 609 */
EricLew 0:80ee8f3b695e 610 /******* Non-Blocking mode: Interrupt */
EricLew 0:80ee8f3b695e 611 HAL_StatusTypeDef HAL_SMBUS_Master_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
EricLew 0:80ee8f3b695e 612 HAL_StatusTypeDef HAL_SMBUS_Master_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
EricLew 0:80ee8f3b695e 613 HAL_StatusTypeDef HAL_SMBUS_Master_Abort_IT(SMBUS_HandleTypeDef *hsmbus, uint16_t DevAddress);
EricLew 0:80ee8f3b695e 614 HAL_StatusTypeDef HAL_SMBUS_Slave_Transmit_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
EricLew 0:80ee8f3b695e 615 HAL_StatusTypeDef HAL_SMBUS_Slave_Receive_IT(SMBUS_HandleTypeDef *hsmbus, uint8_t *pData, uint16_t Size, uint32_t XferOptions);
EricLew 0:80ee8f3b695e 616
EricLew 0:80ee8f3b695e 617 HAL_StatusTypeDef HAL_SMBUS_EnableAlert_IT(SMBUS_HandleTypeDef *hsmbus);
EricLew 0:80ee8f3b695e 618 HAL_StatusTypeDef HAL_SMBUS_DisableAlert_IT(SMBUS_HandleTypeDef *hsmbus);
EricLew 0:80ee8f3b695e 619 HAL_StatusTypeDef HAL_SMBUS_EnableListen_IT(SMBUS_HandleTypeDef *hsmbus);
EricLew 0:80ee8f3b695e 620 HAL_StatusTypeDef HAL_SMBUS_DisableListen_IT(SMBUS_HandleTypeDef *hsmbus);
EricLew 0:80ee8f3b695e 621 /**
EricLew 0:80ee8f3b695e 622 * @}
EricLew 0:80ee8f3b695e 623 */
EricLew 0:80ee8f3b695e 624
EricLew 0:80ee8f3b695e 625 /** @addtogroup SMBUS_IRQ_Handler_and_Callbacks IRQ Handler and Callbacks
EricLew 0:80ee8f3b695e 626 * @{
EricLew 0:80ee8f3b695e 627 */
EricLew 0:80ee8f3b695e 628 /******* SMBUS IRQHandler and Callbacks used in non blocking modes (Interrupt) */
EricLew 0:80ee8f3b695e 629 void HAL_SMBUS_EV_IRQHandler(SMBUS_HandleTypeDef *hsmbus);
EricLew 0:80ee8f3b695e 630 void HAL_SMBUS_ER_IRQHandler(SMBUS_HandleTypeDef *hsmbus);
EricLew 0:80ee8f3b695e 631 void HAL_SMBUS_MasterTxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
EricLew 0:80ee8f3b695e 632 void HAL_SMBUS_MasterRxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
EricLew 0:80ee8f3b695e 633 void HAL_SMBUS_SlaveTxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
EricLew 0:80ee8f3b695e 634 void HAL_SMBUS_SlaveRxCpltCallback(SMBUS_HandleTypeDef *hsmbus);
EricLew 0:80ee8f3b695e 635 void HAL_SMBUS_AddrCallback(SMBUS_HandleTypeDef *hsmbus, uint8_t TransferDirection, uint16_t AddrMatchCode);
EricLew 0:80ee8f3b695e 636 void HAL_SMBUS_ListenCpltCallback(SMBUS_HandleTypeDef *hsmbus);
EricLew 0:80ee8f3b695e 637 void HAL_SMBUS_ErrorCallback(SMBUS_HandleTypeDef *hsmbus);
EricLew 0:80ee8f3b695e 638
EricLew 0:80ee8f3b695e 639 /**
EricLew 0:80ee8f3b695e 640 * @}
EricLew 0:80ee8f3b695e 641 */
EricLew 0:80ee8f3b695e 642
EricLew 0:80ee8f3b695e 643 /** @addtogroup SMBUS_Exported_Functions_Group3 Peripheral State and Errors functions
EricLew 0:80ee8f3b695e 644 * @{
EricLew 0:80ee8f3b695e 645 */
EricLew 0:80ee8f3b695e 646
EricLew 0:80ee8f3b695e 647 /* Peripheral State and Errors functions **************************************************/
EricLew 0:80ee8f3b695e 648 uint32_t HAL_SMBUS_GetState(SMBUS_HandleTypeDef *hsmbus);
EricLew 0:80ee8f3b695e 649 uint32_t HAL_SMBUS_GetError(SMBUS_HandleTypeDef *hsmbus);
EricLew 0:80ee8f3b695e 650
EricLew 0:80ee8f3b695e 651 /**
EricLew 0:80ee8f3b695e 652 * @}
EricLew 0:80ee8f3b695e 653 */
EricLew 0:80ee8f3b695e 654
EricLew 0:80ee8f3b695e 655 /**
EricLew 0:80ee8f3b695e 656 * @}
EricLew 0:80ee8f3b695e 657 */
EricLew 0:80ee8f3b695e 658
EricLew 0:80ee8f3b695e 659
EricLew 0:80ee8f3b695e 660
EricLew 0:80ee8f3b695e 661 /**
EricLew 0:80ee8f3b695e 662 * @}
EricLew 0:80ee8f3b695e 663 */
EricLew 0:80ee8f3b695e 664
EricLew 0:80ee8f3b695e 665 /**
EricLew 0:80ee8f3b695e 666 * @}
EricLew 0:80ee8f3b695e 667 */
EricLew 0:80ee8f3b695e 668
EricLew 0:80ee8f3b695e 669 /**
EricLew 0:80ee8f3b695e 670 * @}
EricLew 0:80ee8f3b695e 671 */
EricLew 0:80ee8f3b695e 672 #ifdef __cplusplus
EricLew 0:80ee8f3b695e 673 }
EricLew 0:80ee8f3b695e 674 #endif
EricLew 0:80ee8f3b695e 675
EricLew 0:80ee8f3b695e 676
EricLew 0:80ee8f3b695e 677 #endif /* __STM32L4xx_HAL_SMBUS_H */
EricLew 0:80ee8f3b695e 678
EricLew 0:80ee8f3b695e 679 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
EricLew 0:80ee8f3b695e 680