Eric Lewiston / STM32L4xx_HAL_Driver

Hal Drivers for L4

Dependents:   BSP OneHopeOnePrayer FINAL_AUDIO_RECORD AudioDemo

Fork of STM32L4xx_HAL_Driver by Senior Design: Sound Monitor

Inc/stm32l4xx_hal_dma.h@0:80ee8f3b695e, 2015-11-02 (annotated)

Committer:
EricLew
Date:
Mon Nov 02 19:37:23 2015 +0000
Revision:
0:80ee8f3b695e
Errors are with definitions of LCD and QSPI functions. I believe all .h and .c files are  uploaded, but there may need to be certain functions called.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
EricLew 0:80ee8f3b695e 1 /**
EricLew 0:80ee8f3b695e 2 ******************************************************************************
EricLew 0:80ee8f3b695e 3 * @file stm32l4xx_hal_dma.h
EricLew 0:80ee8f3b695e 4 * @author MCD Application Team
EricLew 0:80ee8f3b695e 5 * @version V1.1.0
EricLew 0:80ee8f3b695e 6 * @date 16-September-2015
EricLew 0:80ee8f3b695e 7 * @brief Header file of DMA HAL module.
EricLew 0:80ee8f3b695e 8 ******************************************************************************
EricLew 0:80ee8f3b695e 9 * @attention
EricLew 0:80ee8f3b695e 10 *
EricLew 0:80ee8f3b695e 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
EricLew 0:80ee8f3b695e 12 *
EricLew 0:80ee8f3b695e 13 * Redistribution and use in source and binary forms, with or without modification,
EricLew 0:80ee8f3b695e 14 * are permitted provided that the following conditions are met:
EricLew 0:80ee8f3b695e 15 * 1. Redistributions of source code must retain the above copyright notice,
EricLew 0:80ee8f3b695e 16 * this list of conditions and the following disclaimer.
EricLew 0:80ee8f3b695e 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
EricLew 0:80ee8f3b695e 18 * this list of conditions and the following disclaimer in the documentation
EricLew 0:80ee8f3b695e 19 * and/or other materials provided with the distribution.
EricLew 0:80ee8f3b695e 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
EricLew 0:80ee8f3b695e 21 * may be used to endorse or promote products derived from this software
EricLew 0:80ee8f3b695e 22 * without specific prior written permission.
EricLew 0:80ee8f3b695e 23 *
EricLew 0:80ee8f3b695e 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
EricLew 0:80ee8f3b695e 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
EricLew 0:80ee8f3b695e 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
EricLew 0:80ee8f3b695e 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
EricLew 0:80ee8f3b695e 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
EricLew 0:80ee8f3b695e 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
EricLew 0:80ee8f3b695e 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
EricLew 0:80ee8f3b695e 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
EricLew 0:80ee8f3b695e 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
EricLew 0:80ee8f3b695e 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
EricLew 0:80ee8f3b695e 34 *
EricLew 0:80ee8f3b695e 35 ******************************************************************************
EricLew 0:80ee8f3b695e 36 */
EricLew 0:80ee8f3b695e 37
EricLew 0:80ee8f3b695e 38 /* Define to prevent recursive inclusion -------------------------------------*/
EricLew 0:80ee8f3b695e 39 #ifndef __STM32L4xx_HAL_DMA_H
EricLew 0:80ee8f3b695e 40 #define __STM32L4xx_HAL_DMA_H
EricLew 0:80ee8f3b695e 41
EricLew 0:80ee8f3b695e 42 #ifdef __cplusplus
EricLew 0:80ee8f3b695e 43 extern "C" {
EricLew 0:80ee8f3b695e 44 #endif
EricLew 0:80ee8f3b695e 45
EricLew 0:80ee8f3b695e 46 /* Includes ------------------------------------------------------------------*/
EricLew 0:80ee8f3b695e 47 #include "stm32l4xx_hal_def.h"
EricLew 0:80ee8f3b695e 48
EricLew 0:80ee8f3b695e 49 /** @addtogroup STM32L4xx_HAL_Driver
EricLew 0:80ee8f3b695e 50 * @{
EricLew 0:80ee8f3b695e 51 */
EricLew 0:80ee8f3b695e 52
EricLew 0:80ee8f3b695e 53 /** @addtogroup DMA
EricLew 0:80ee8f3b695e 54 * @{
EricLew 0:80ee8f3b695e 55 */
EricLew 0:80ee8f3b695e 56
EricLew 0:80ee8f3b695e 57 /* Exported types ------------------------------------------------------------*/
EricLew 0:80ee8f3b695e 58 /** @defgroup DMA_Exported_Types DMA Exported Types
EricLew 0:80ee8f3b695e 59 * @{
EricLew 0:80ee8f3b695e 60 */
EricLew 0:80ee8f3b695e 61
EricLew 0:80ee8f3b695e 62 /**
EricLew 0:80ee8f3b695e 63 * @brief DMA Configuration Structure definition
EricLew 0:80ee8f3b695e 64 */
EricLew 0:80ee8f3b695e 65 typedef struct
EricLew 0:80ee8f3b695e 66 {
EricLew 0:80ee8f3b695e 67 uint32_t Request; /*!< Specifies the request selected for the specified channel.
EricLew 0:80ee8f3b695e 68 This parameter can be a value of @ref DMA_request */
EricLew 0:80ee8f3b695e 69
EricLew 0:80ee8f3b695e 70 uint32_t Direction; /*!< Specifies if the data will be transferred from memory to peripheral,
EricLew 0:80ee8f3b695e 71 from memory to memory or from peripheral to memory.
EricLew 0:80ee8f3b695e 72 This parameter can be a value of @ref DMA_Data_transfer_direction */
EricLew 0:80ee8f3b695e 73
EricLew 0:80ee8f3b695e 74 uint32_t PeriphInc; /*!< Specifies whether the Peripheral address register should be incremented or not.
EricLew 0:80ee8f3b695e 75 This parameter can be a value of @ref DMA_Peripheral_incremented_mode */
EricLew 0:80ee8f3b695e 76
EricLew 0:80ee8f3b695e 77 uint32_t MemInc; /*!< Specifies whether the memory address register should be incremented or not.
EricLew 0:80ee8f3b695e 78 This parameter can be a value of @ref DMA_Memory_incremented_mode */
EricLew 0:80ee8f3b695e 79
EricLew 0:80ee8f3b695e 80 uint32_t PeriphDataAlignment; /*!< Specifies the Peripheral data width.
EricLew 0:80ee8f3b695e 81 This parameter can be a value of @ref DMA_Peripheral_data_size */
EricLew 0:80ee8f3b695e 82
EricLew 0:80ee8f3b695e 83 uint32_t MemDataAlignment; /*!< Specifies the Memory data width.
EricLew 0:80ee8f3b695e 84 This parameter can be a value of @ref DMA_Memory_data_size */
EricLew 0:80ee8f3b695e 85
EricLew 0:80ee8f3b695e 86 uint32_t Mode; /*!< Specifies the operation mode of the DMAy Channelx.
EricLew 0:80ee8f3b695e 87 This parameter can be a value of @ref DMA_mode
EricLew 0:80ee8f3b695e 88 @note The circular buffer mode cannot be used if the memory-to-memory
EricLew 0:80ee8f3b695e 89 data transfer is configured on the selected Channel */
EricLew 0:80ee8f3b695e 90
EricLew 0:80ee8f3b695e 91 uint32_t Priority; /*!< Specifies the software priority for the DMAy Channelx.
EricLew 0:80ee8f3b695e 92 This parameter can be a value of @ref DMA_Priority_level */
EricLew 0:80ee8f3b695e 93 } DMA_InitTypeDef;
EricLew 0:80ee8f3b695e 94
EricLew 0:80ee8f3b695e 95 /**
EricLew 0:80ee8f3b695e 96 * @brief DMA Configuration enumeration values definition
EricLew 0:80ee8f3b695e 97 */
EricLew 0:80ee8f3b695e 98 typedef enum
EricLew 0:80ee8f3b695e 99 {
EricLew 0:80ee8f3b695e 100 DMA_MODE = 0, /*!< Control related DMA mode Parameter in DMA_InitTypeDef */
EricLew 0:80ee8f3b695e 101 DMA_PRIORITY = 1 /*!< Control related priority level Parameter in DMA_InitTypeDef */
EricLew 0:80ee8f3b695e 102
EricLew 0:80ee8f3b695e 103 } DMA_ControlTypeDef;
EricLew 0:80ee8f3b695e 104
EricLew 0:80ee8f3b695e 105 /**
EricLew 0:80ee8f3b695e 106 * @brief HAL DMA State structures definition
EricLew 0:80ee8f3b695e 107 */
EricLew 0:80ee8f3b695e 108 typedef enum
EricLew 0:80ee8f3b695e 109 {
EricLew 0:80ee8f3b695e 110 HAL_DMA_STATE_RESET = 0x00, /*!< DMA not yet initialized or disabled */
EricLew 0:80ee8f3b695e 111 HAL_DMA_STATE_READY = 0x01, /*!< DMA process success and ready for use */
EricLew 0:80ee8f3b695e 112 HAL_DMA_STATE_READY_HALF = 0x11, /*!< DMA Half process success */
EricLew 0:80ee8f3b695e 113 HAL_DMA_STATE_BUSY = 0x02, /*!< DMA process is ongoing */
EricLew 0:80ee8f3b695e 114 HAL_DMA_STATE_TIMEOUT = 0x03, /*!< DMA timeout state */
EricLew 0:80ee8f3b695e 115 HAL_DMA_STATE_ERROR = 0x04 /*!< DMA error state */
EricLew 0:80ee8f3b695e 116 }HAL_DMA_StateTypeDef;
EricLew 0:80ee8f3b695e 117
EricLew 0:80ee8f3b695e 118 /**
EricLew 0:80ee8f3b695e 119 * @brief HAL DMA Error Code structure definition
EricLew 0:80ee8f3b695e 120 */
EricLew 0:80ee8f3b695e 121 typedef enum
EricLew 0:80ee8f3b695e 122 {
EricLew 0:80ee8f3b695e 123 HAL_DMA_FULL_TRANSFER = 0x00, /*!< Full transfer */
EricLew 0:80ee8f3b695e 124 HAL_DMA_HALF_TRANSFER = 0x01 /*!< Half Transfer */
EricLew 0:80ee8f3b695e 125 }HAL_DMA_LevelCompleteTypeDef;
EricLew 0:80ee8f3b695e 126
EricLew 0:80ee8f3b695e 127
EricLew 0:80ee8f3b695e 128 /**
EricLew 0:80ee8f3b695e 129 * @brief DMA handle Structure definition
EricLew 0:80ee8f3b695e 130 */
EricLew 0:80ee8f3b695e 131 typedef struct __DMA_HandleTypeDef
EricLew 0:80ee8f3b695e 132 {
EricLew 0:80ee8f3b695e 133 DMA_Channel_TypeDef *Instance; /*!< Register base address */
EricLew 0:80ee8f3b695e 134
EricLew 0:80ee8f3b695e 135 DMA_InitTypeDef Init; /*!< DMA communication parameters */
EricLew 0:80ee8f3b695e 136
EricLew 0:80ee8f3b695e 137 HAL_LockTypeDef Lock; /*!< DMA locking object */
EricLew 0:80ee8f3b695e 138
EricLew 0:80ee8f3b695e 139 __IO HAL_DMA_StateTypeDef State; /*!< DMA transfer state */
EricLew 0:80ee8f3b695e 140
EricLew 0:80ee8f3b695e 141 void *Parent; /*!< Parent object state */
EricLew 0:80ee8f3b695e 142
EricLew 0:80ee8f3b695e 143 void (* XferCpltCallback)(struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer complete callback */
EricLew 0:80ee8f3b695e 144
EricLew 0:80ee8f3b695e 145 void (* XferHalfCpltCallback)(struct __DMA_HandleTypeDef * hdma); /*!< DMA Half transfer complete callback */
EricLew 0:80ee8f3b695e 146
EricLew 0:80ee8f3b695e 147 void (* XferErrorCallback)(struct __DMA_HandleTypeDef * hdma); /*!< DMA transfer error callback */
EricLew 0:80ee8f3b695e 148
EricLew 0:80ee8f3b695e 149 __IO uint32_t ErrorCode; /*!< DMA Error code */
EricLew 0:80ee8f3b695e 150 }DMA_HandleTypeDef;
EricLew 0:80ee8f3b695e 151
EricLew 0:80ee8f3b695e 152 /**
EricLew 0:80ee8f3b695e 153 * @}
EricLew 0:80ee8f3b695e 154 */
EricLew 0:80ee8f3b695e 155
EricLew 0:80ee8f3b695e 156 /* Exported constants --------------------------------------------------------*/
EricLew 0:80ee8f3b695e 157
EricLew 0:80ee8f3b695e 158 /** @defgroup DMA_Exported_Constants DMA Exported Constants
EricLew 0:80ee8f3b695e 159 * @{
EricLew 0:80ee8f3b695e 160 */
EricLew 0:80ee8f3b695e 161
EricLew 0:80ee8f3b695e 162 /** @defgroup DMA_Error_Code DMA Error Code
EricLew 0:80ee8f3b695e 163 * @{
EricLew 0:80ee8f3b695e 164 */
EricLew 0:80ee8f3b695e 165 #define HAL_DMA_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
EricLew 0:80ee8f3b695e 166 #define HAL_DMA_ERROR_TE ((uint32_t)0x00000001) /*!< Transfer error */
EricLew 0:80ee8f3b695e 167 #define HAL_DMA_ERROR_TIMEOUT ((uint32_t)0x00000020) /*!< Timeout error */
EricLew 0:80ee8f3b695e 168 /**
EricLew 0:80ee8f3b695e 169 * @}
EricLew 0:80ee8f3b695e 170 */
EricLew 0:80ee8f3b695e 171
EricLew 0:80ee8f3b695e 172 /** @defgroup DMA_request DMA request
EricLew 0:80ee8f3b695e 173 * @{
EricLew 0:80ee8f3b695e 174 */
EricLew 0:80ee8f3b695e 175 #define DMA_REQUEST_0 ((uint32_t)0x00000000)
EricLew 0:80ee8f3b695e 176 #define DMA_REQUEST_1 ((uint32_t)0x00000001)
EricLew 0:80ee8f3b695e 177 #define DMA_REQUEST_2 ((uint32_t)0x00000002)
EricLew 0:80ee8f3b695e 178 #define DMA_REQUEST_3 ((uint32_t)0x00000003)
EricLew 0:80ee8f3b695e 179 #define DMA_REQUEST_4 ((uint32_t)0x00000004)
EricLew 0:80ee8f3b695e 180 #define DMA_REQUEST_5 ((uint32_t)0x00000005)
EricLew 0:80ee8f3b695e 181 #define DMA_REQUEST_6 ((uint32_t)0x00000006)
EricLew 0:80ee8f3b695e 182 #define DMA_REQUEST_7 ((uint32_t)0x00000007)
EricLew 0:80ee8f3b695e 183 /**
EricLew 0:80ee8f3b695e 184 * @}
EricLew 0:80ee8f3b695e 185 */
EricLew 0:80ee8f3b695e 186
EricLew 0:80ee8f3b695e 187 /** @defgroup DMA_Data_transfer_direction DMA Data transfer direction
EricLew 0:80ee8f3b695e 188 * @{
EricLew 0:80ee8f3b695e 189 */
EricLew 0:80ee8f3b695e 190 #define DMA_PERIPH_TO_MEMORY ((uint32_t)0x00000000) /*!< Peripheral to memory direction */
EricLew 0:80ee8f3b695e 191 #define DMA_MEMORY_TO_PERIPH ((uint32_t)DMA_CCR_DIR) /*!< Memory to peripheral direction */
EricLew 0:80ee8f3b695e 192 #define DMA_MEMORY_TO_MEMORY ((uint32_t)DMA_CCR_MEM2MEM) /*!< Memory to memory direction */
EricLew 0:80ee8f3b695e 193 /**
EricLew 0:80ee8f3b695e 194 * @}
EricLew 0:80ee8f3b695e 195 */
EricLew 0:80ee8f3b695e 196
EricLew 0:80ee8f3b695e 197 /** @defgroup DMA_Peripheral_incremented_mode DMA Peripheral incremented mode
EricLew 0:80ee8f3b695e 198 * @{
EricLew 0:80ee8f3b695e 199 */
EricLew 0:80ee8f3b695e 200 #define DMA_PINC_ENABLE ((uint32_t)DMA_CCR_PINC) /*!< Peripheral increment mode Enable */
EricLew 0:80ee8f3b695e 201 #define DMA_PINC_DISABLE ((uint32_t)0x00000000) /*!< Peripheral increment mode Disable */
EricLew 0:80ee8f3b695e 202 /**
EricLew 0:80ee8f3b695e 203 * @}
EricLew 0:80ee8f3b695e 204 */
EricLew 0:80ee8f3b695e 205
EricLew 0:80ee8f3b695e 206 /** @defgroup DMA_Memory_incremented_mode DMA Memory incremented mode
EricLew 0:80ee8f3b695e 207 * @{
EricLew 0:80ee8f3b695e 208 */
EricLew 0:80ee8f3b695e 209 #define DMA_MINC_ENABLE ((uint32_t)DMA_CCR_MINC) /*!< Memory increment mode Enable */
EricLew 0:80ee8f3b695e 210 #define DMA_MINC_DISABLE ((uint32_t)0x00000000) /*!< Memory increment mode Disable */
EricLew 0:80ee8f3b695e 211 /**
EricLew 0:80ee8f3b695e 212 * @}
EricLew 0:80ee8f3b695e 213 */
EricLew 0:80ee8f3b695e 214
EricLew 0:80ee8f3b695e 215 /** @defgroup DMA_Peripheral_data_size DMA Peripheral data size
EricLew 0:80ee8f3b695e 216 * @{
EricLew 0:80ee8f3b695e 217 */
EricLew 0:80ee8f3b695e 218 #define DMA_PDATAALIGN_BYTE ((uint32_t)0x00000000) /*!< Peripheral data alignment : Byte */
EricLew 0:80ee8f3b695e 219 #define DMA_PDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_PSIZE_0) /*!< Peripheral data alignment : HalfWord */
EricLew 0:80ee8f3b695e 220 #define DMA_PDATAALIGN_WORD ((uint32_t)DMA_CCR_PSIZE_1) /*!< Peripheral data alignment : Word */
EricLew 0:80ee8f3b695e 221 /**
EricLew 0:80ee8f3b695e 222 * @}
EricLew 0:80ee8f3b695e 223 */
EricLew 0:80ee8f3b695e 224
EricLew 0:80ee8f3b695e 225 /** @defgroup DMA_Memory_data_size DMA Memory data size
EricLew 0:80ee8f3b695e 226 * @{
EricLew 0:80ee8f3b695e 227 */
EricLew 0:80ee8f3b695e 228 #define DMA_MDATAALIGN_BYTE ((uint32_t)0x00000000) /*!< Memory data alignment : Byte */
EricLew 0:80ee8f3b695e 229 #define DMA_MDATAALIGN_HALFWORD ((uint32_t)DMA_CCR_MSIZE_0) /*!< Memory data alignment : HalfWord */
EricLew 0:80ee8f3b695e 230 #define DMA_MDATAALIGN_WORD ((uint32_t)DMA_CCR_MSIZE_1) /*!< Memory data alignment : Word */
EricLew 0:80ee8f3b695e 231 /**
EricLew 0:80ee8f3b695e 232 * @}
EricLew 0:80ee8f3b695e 233 */
EricLew 0:80ee8f3b695e 234
EricLew 0:80ee8f3b695e 235 /** @defgroup DMA_mode DMA mode
EricLew 0:80ee8f3b695e 236 * @{
EricLew 0:80ee8f3b695e 237 */
EricLew 0:80ee8f3b695e 238 #define DMA_NORMAL ((uint32_t)0x00000000) /*!< Normal mode */
EricLew 0:80ee8f3b695e 239 #define DMA_CIRCULAR ((uint32_t)DMA_CCR_CIRC) /*!< Circular mode */
EricLew 0:80ee8f3b695e 240 /**
EricLew 0:80ee8f3b695e 241 * @}
EricLew 0:80ee8f3b695e 242 */
EricLew 0:80ee8f3b695e 243
EricLew 0:80ee8f3b695e 244 /** @defgroup DMA_Priority_level DMA Priority level
EricLew 0:80ee8f3b695e 245 * @{
EricLew 0:80ee8f3b695e 246 */
EricLew 0:80ee8f3b695e 247 #define DMA_PRIORITY_LOW ((uint32_t)0x00000000) /*!< Priority level : Low */
EricLew 0:80ee8f3b695e 248 #define DMA_PRIORITY_MEDIUM ((uint32_t)DMA_CCR_PL_0) /*!< Priority level : Medium */
EricLew 0:80ee8f3b695e 249 #define DMA_PRIORITY_HIGH ((uint32_t)DMA_CCR_PL_1) /*!< Priority level : High */
EricLew 0:80ee8f3b695e 250 #define DMA_PRIORITY_VERY_HIGH ((uint32_t)DMA_CCR_PL) /*!< Priority level : Very_High */
EricLew 0:80ee8f3b695e 251 /**
EricLew 0:80ee8f3b695e 252 * @}
EricLew 0:80ee8f3b695e 253 */
EricLew 0:80ee8f3b695e 254
EricLew 0:80ee8f3b695e 255
EricLew 0:80ee8f3b695e 256 /** @defgroup DMA_interrupt_enable_definitions DMA interrupt enable definitions
EricLew 0:80ee8f3b695e 257 * @{
EricLew 0:80ee8f3b695e 258 */
EricLew 0:80ee8f3b695e 259 #define DMA_IT_TC ((uint32_t)DMA_CCR_TCIE)
EricLew 0:80ee8f3b695e 260 #define DMA_IT_HT ((uint32_t)DMA_CCR_HTIE)
EricLew 0:80ee8f3b695e 261 #define DMA_IT_TE ((uint32_t)DMA_CCR_TEIE)
EricLew 0:80ee8f3b695e 262 /**
EricLew 0:80ee8f3b695e 263 * @}
EricLew 0:80ee8f3b695e 264 */
EricLew 0:80ee8f3b695e 265
EricLew 0:80ee8f3b695e 266 /** @defgroup DMA_flag_definitions DMA flag definitions
EricLew 0:80ee8f3b695e 267 * @{
EricLew 0:80ee8f3b695e 268 */
EricLew 0:80ee8f3b695e 269 #define DMA_FLAG_GL1 ((uint32_t)0x00000001)
EricLew 0:80ee8f3b695e 270 #define DMA_FLAG_TC1 ((uint32_t)0x00000002)
EricLew 0:80ee8f3b695e 271 #define DMA_FLAG_HT1 ((uint32_t)0x00000004)
EricLew 0:80ee8f3b695e 272 #define DMA_FLAG_TE1 ((uint32_t)0x00000008)
EricLew 0:80ee8f3b695e 273 #define DMA_FLAG_GL2 ((uint32_t)0x00000010)
EricLew 0:80ee8f3b695e 274 #define DMA_FLAG_TC2 ((uint32_t)0x00000020)
EricLew 0:80ee8f3b695e 275 #define DMA_FLAG_HT2 ((uint32_t)0x00000040)
EricLew 0:80ee8f3b695e 276 #define DMA_FLAG_TE2 ((uint32_t)0x00000080)
EricLew 0:80ee8f3b695e 277 #define DMA_FLAG_GL3 ((uint32_t)0x00000100)
EricLew 0:80ee8f3b695e 278 #define DMA_FLAG_TC3 ((uint32_t)0x00000200)
EricLew 0:80ee8f3b695e 279 #define DMA_FLAG_HT3 ((uint32_t)0x00000400)
EricLew 0:80ee8f3b695e 280 #define DMA_FLAG_TE3 ((uint32_t)0x00000800)
EricLew 0:80ee8f3b695e 281 #define DMA_FLAG_GL4 ((uint32_t)0x00001000)
EricLew 0:80ee8f3b695e 282 #define DMA_FLAG_TC4 ((uint32_t)0x00002000)
EricLew 0:80ee8f3b695e 283 #define DMA_FLAG_HT4 ((uint32_t)0x00004000)
EricLew 0:80ee8f3b695e 284 #define DMA_FLAG_TE4 ((uint32_t)0x00008000)
EricLew 0:80ee8f3b695e 285 #define DMA_FLAG_GL5 ((uint32_t)0x00010000)
EricLew 0:80ee8f3b695e 286 #define DMA_FLAG_TC5 ((uint32_t)0x00020000)
EricLew 0:80ee8f3b695e 287 #define DMA_FLAG_HT5 ((uint32_t)0x00040000)
EricLew 0:80ee8f3b695e 288 #define DMA_FLAG_TE5 ((uint32_t)0x00080000)
EricLew 0:80ee8f3b695e 289 #define DMA_FLAG_GL6 ((uint32_t)0x00100000)
EricLew 0:80ee8f3b695e 290 #define DMA_FLAG_TC6 ((uint32_t)0x00200000)
EricLew 0:80ee8f3b695e 291 #define DMA_FLAG_HT6 ((uint32_t)0x00400000)
EricLew 0:80ee8f3b695e 292 #define DMA_FLAG_TE6 ((uint32_t)0x00800000)
EricLew 0:80ee8f3b695e 293 #define DMA_FLAG_GL7 ((uint32_t)0x01000000)
EricLew 0:80ee8f3b695e 294 #define DMA_FLAG_TC7 ((uint32_t)0x02000000)
EricLew 0:80ee8f3b695e 295 #define DMA_FLAG_HT7 ((uint32_t)0x04000000)
EricLew 0:80ee8f3b695e 296 #define DMA_FLAG_TE7 ((uint32_t)0x08000000)
EricLew 0:80ee8f3b695e 297 /**
EricLew 0:80ee8f3b695e 298 * @}
EricLew 0:80ee8f3b695e 299 */
EricLew 0:80ee8f3b695e 300
EricLew 0:80ee8f3b695e 301 /**
EricLew 0:80ee8f3b695e 302 * @}
EricLew 0:80ee8f3b695e 303 */
EricLew 0:80ee8f3b695e 304
EricLew 0:80ee8f3b695e 305 /* Exported macros -----------------------------------------------------------*/
EricLew 0:80ee8f3b695e 306 /** @defgroup DMA_Exported_Macros DMA Exported Macros
EricLew 0:80ee8f3b695e 307 * @{
EricLew 0:80ee8f3b695e 308 */
EricLew 0:80ee8f3b695e 309
EricLew 0:80ee8f3b695e 310 /** @brief Reset DMA handle state.
EricLew 0:80ee8f3b695e 311 * @param __HANDLE__: DMA handle
EricLew 0:80ee8f3b695e 312 * @retval None
EricLew 0:80ee8f3b695e 313 */
EricLew 0:80ee8f3b695e 314 #define __HAL_DMA_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DMA_STATE_RESET)
EricLew 0:80ee8f3b695e 315
EricLew 0:80ee8f3b695e 316 /**
EricLew 0:80ee8f3b695e 317 * @brief Enable the specified DMA Channel.
EricLew 0:80ee8f3b695e 318 * @param __HANDLE__: DMA handle
EricLew 0:80ee8f3b695e 319 * @retval None
EricLew 0:80ee8f3b695e 320 */
EricLew 0:80ee8f3b695e 321 #define __HAL_DMA_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CCR |= DMA_CCR_EN)
EricLew 0:80ee8f3b695e 322
EricLew 0:80ee8f3b695e 323 /**
EricLew 0:80ee8f3b695e 324 * @brief Disable the specified DMA Channel.
EricLew 0:80ee8f3b695e 325 * @param __HANDLE__: DMA handle
EricLew 0:80ee8f3b695e 326 * @retval None
EricLew 0:80ee8f3b695e 327 */
EricLew 0:80ee8f3b695e 328 #define __HAL_DMA_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CCR &= ~DMA_CCR_EN)
EricLew 0:80ee8f3b695e 329
EricLew 0:80ee8f3b695e 330
EricLew 0:80ee8f3b695e 331 /* Interrupt & Flag management */
EricLew 0:80ee8f3b695e 332
EricLew 0:80ee8f3b695e 333 /**
EricLew 0:80ee8f3b695e 334 * @brief Return the current DMA Channel transfer complete flag.
EricLew 0:80ee8f3b695e 335 * @param __HANDLE__: DMA handle
EricLew 0:80ee8f3b695e 336 * @retval The specified transfer complete flag index.
EricLew 0:80ee8f3b695e 337 */
EricLew 0:80ee8f3b695e 338
EricLew 0:80ee8f3b695e 339 #define __HAL_DMA_GET_TC_FLAG_INDEX(__HANDLE__) \
EricLew 0:80ee8f3b695e 340 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TC1 :\
EricLew 0:80ee8f3b695e 341 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TC1 :\
EricLew 0:80ee8f3b695e 342 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TC2 :\
EricLew 0:80ee8f3b695e 343 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TC2 :\
EricLew 0:80ee8f3b695e 344 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TC3 :\
EricLew 0:80ee8f3b695e 345 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TC3 :\
EricLew 0:80ee8f3b695e 346 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TC4 :\
EricLew 0:80ee8f3b695e 347 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TC4 :\
EricLew 0:80ee8f3b695e 348 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TC5 :\
EricLew 0:80ee8f3b695e 349 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel5))? DMA_FLAG_TC5 :\
EricLew 0:80ee8f3b695e 350 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TC6 :\
EricLew 0:80ee8f3b695e 351 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel6))? DMA_FLAG_TC6 :\
EricLew 0:80ee8f3b695e 352 DMA_FLAG_TC7)
EricLew 0:80ee8f3b695e 353
EricLew 0:80ee8f3b695e 354 /**
EricLew 0:80ee8f3b695e 355 * @brief Return the current DMA Channel half transfer complete flag.
EricLew 0:80ee8f3b695e 356 * @param __HANDLE__: DMA handle
EricLew 0:80ee8f3b695e 357 * @retval The specified half transfer complete flag index.
EricLew 0:80ee8f3b695e 358 */
EricLew 0:80ee8f3b695e 359 #define __HAL_DMA_GET_HT_FLAG_INDEX(__HANDLE__)\
EricLew 0:80ee8f3b695e 360 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_HT1 :\
EricLew 0:80ee8f3b695e 361 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_HT1 :\
EricLew 0:80ee8f3b695e 362 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_HT2 :\
EricLew 0:80ee8f3b695e 363 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_HT2 :\
EricLew 0:80ee8f3b695e 364 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_HT3 :\
EricLew 0:80ee8f3b695e 365 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_HT3 :\
EricLew 0:80ee8f3b695e 366 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_HT4 :\
EricLew 0:80ee8f3b695e 367 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_HT4 :\
EricLew 0:80ee8f3b695e 368 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_HT5 :\
EricLew 0:80ee8f3b695e 369 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel5))? DMA_FLAG_HT5 :\
EricLew 0:80ee8f3b695e 370 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_HT6 :\
EricLew 0:80ee8f3b695e 371 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel6))? DMA_FLAG_HT6 :\
EricLew 0:80ee8f3b695e 372 DMA_FLAG_HT7)
EricLew 0:80ee8f3b695e 373
EricLew 0:80ee8f3b695e 374 /**
EricLew 0:80ee8f3b695e 375 * @brief Return the current DMA Channel transfer error flag.
EricLew 0:80ee8f3b695e 376 * @param __HANDLE__: DMA handle
EricLew 0:80ee8f3b695e 377 * @retval The specified transfer error flag index.
EricLew 0:80ee8f3b695e 378 */
EricLew 0:80ee8f3b695e 379 #define __HAL_DMA_GET_TE_FLAG_INDEX(__HANDLE__)\
EricLew 0:80ee8f3b695e 380 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_FLAG_TE1 :\
EricLew 0:80ee8f3b695e 381 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_FLAG_TE1 :\
EricLew 0:80ee8f3b695e 382 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_FLAG_TE2 :\
EricLew 0:80ee8f3b695e 383 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_FLAG_TE2 :\
EricLew 0:80ee8f3b695e 384 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_FLAG_TE3 :\
EricLew 0:80ee8f3b695e 385 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_FLAG_TE3 :\
EricLew 0:80ee8f3b695e 386 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_FLAG_TE4 :\
EricLew 0:80ee8f3b695e 387 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_FLAG_TE4 :\
EricLew 0:80ee8f3b695e 388 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_FLAG_TE5 :\
EricLew 0:80ee8f3b695e 389 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel5))? DMA_FLAG_TE5 :\
EricLew 0:80ee8f3b695e 390 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_FLAG_TE6 :\
EricLew 0:80ee8f3b695e 391 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel6))? DMA_FLAG_TE6 :\
EricLew 0:80ee8f3b695e 392 DMA_FLAG_TE7)
EricLew 0:80ee8f3b695e 393
EricLew 0:80ee8f3b695e 394 /**
EricLew 0:80ee8f3b695e 395 * @brief Return the current DMA Channel Global interrupt flag.
EricLew 0:80ee8f3b695e 396 * @param __HANDLE__: DMA handle
EricLew 0:80ee8f3b695e 397 * @retval The specified transfer error flag index.
EricLew 0:80ee8f3b695e 398 */
EricLew 0:80ee8f3b695e 399 #define __HAL_DMA_GET_GI_FLAG_INDEX(__HANDLE__)\
EricLew 0:80ee8f3b695e 400 (((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel1))? DMA_ISR_GIF1 :\
EricLew 0:80ee8f3b695e 401 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel1))? DMA_ISR_GIF1 :\
EricLew 0:80ee8f3b695e 402 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel2))? DMA_ISR_GIF2 :\
EricLew 0:80ee8f3b695e 403 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel2))? DMA_ISR_GIF2 :\
EricLew 0:80ee8f3b695e 404 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel3))? DMA_ISR_GIF3 :\
EricLew 0:80ee8f3b695e 405 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel3))? DMA_ISR_GIF3 :\
EricLew 0:80ee8f3b695e 406 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel4))? DMA_ISR_GIF4 :\
EricLew 0:80ee8f3b695e 407 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel4))? DMA_ISR_GIF4 :\
EricLew 0:80ee8f3b695e 408 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel5))? DMA_ISR_GIF5 :\
EricLew 0:80ee8f3b695e 409 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel5))? DMA_ISR_GIF5 :\
EricLew 0:80ee8f3b695e 410 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA1_Channel6))? DMA_ISR_GIF6 :\
EricLew 0:80ee8f3b695e 411 ((uint32_t)((__HANDLE__)->Instance) == ((uint32_t)DMA2_Channel6))? DMA_ISR_GIF6 :\
EricLew 0:80ee8f3b695e 412 DMA_ISR_GIF7)
EricLew 0:80ee8f3b695e 413
EricLew 0:80ee8f3b695e 414 /**
EricLew 0:80ee8f3b695e 415 * @brief Get the DMA Channel pending flags.
EricLew 0:80ee8f3b695e 416 * @param __HANDLE__: DMA handle
EricLew 0:80ee8f3b695e 417 * @param __FLAG__: Get the specified flag.
EricLew 0:80ee8f3b695e 418 * This parameter can be any combination of the following values:
EricLew 0:80ee8f3b695e 419 * @arg DMA_FLAG_TCIFx: Transfer complete flag
EricLew 0:80ee8f3b695e 420 * @arg DMA_FLAG_HTIFx: Half transfer complete flag
EricLew 0:80ee8f3b695e 421 * @arg DMA_FLAG_TEIFx: Transfer error flag
EricLew 0:80ee8f3b695e 422 * @arg DMA_ISR_GIFx: Global interrupt flag
EricLew 0:80ee8f3b695e 423 * Where x can be 0_4, 1_5, 2_6 or 3_7 to select the DMA Channel flag.
EricLew 0:80ee8f3b695e 424 * @retval The state of FLAG (SET or RESET).
EricLew 0:80ee8f3b695e 425 */
EricLew 0:80ee8f3b695e 426 #define __HAL_DMA_GET_FLAG(__HANDLE__, __FLAG__) (((uint32_t)((__HANDLE__)->Instance) > ((uint32_t)DMA1_Channel7))? \
EricLew 0:80ee8f3b695e 427 (DMA2->ISR & (__FLAG__)) : (DMA1->ISR & (__FLAG__)))
EricLew 0:80ee8f3b695e 428
EricLew 0:80ee8f3b695e 429 /**
EricLew 0:80ee8f3b695e 430 * @brief Clear the DMA Channel pending flags.
EricLew 0:80ee8f3b695e 431 * @param __HANDLE__: DMA handle
EricLew 0:80ee8f3b695e 432 * @param __FLAG__: specifies the flag to clear.
EricLew 0:80ee8f3b695e 433 * This parameter can be any combination of the following values:
EricLew 0:80ee8f3b695e 434 * @arg DMA_FLAG_TCIFx: Transfer complete flag
EricLew 0:80ee8f3b695e 435 * @arg DMA_FLAG_HTIFx: Half transfer complete flag
EricLew 0:80ee8f3b695e 436 * @arg DMA_FLAG_TEIFx: Transfer error flag
EricLew 0:80ee8f3b695e 437 * @arg DMA_ISR_GIFx: Global interrupt flag
EricLew 0:80ee8f3b695e 438 * Where x can be 0_4, 1_5, 2_6 or 3_7 to select the DMA Channel flag.
EricLew 0:80ee8f3b695e 439 * @retval None
EricLew 0:80ee8f3b695e 440 */
EricLew 0:80ee8f3b695e 441 #define __HAL_DMA_CLEAR_FLAG(__HANDLE__, __FLAG__) (((uint32_t)((__HANDLE__)->Instance) > ((uint32_t)DMA1_Channel7))? \
EricLew 0:80ee8f3b695e 442 (DMA2->IFCR |= (__FLAG__)) : (DMA1->IFCR |= (__FLAG__)))
EricLew 0:80ee8f3b695e 443
EricLew 0:80ee8f3b695e 444 /**
EricLew 0:80ee8f3b695e 445 * @brief Enable the specified DMA Channel interrupts.
EricLew 0:80ee8f3b695e 446 * @param __HANDLE__: DMA handle
EricLew 0:80ee8f3b695e 447 * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled.
EricLew 0:80ee8f3b695e 448 * This parameter can be any combination of the following values:
EricLew 0:80ee8f3b695e 449 * @arg DMA_IT_TC: Transfer complete interrupt mask
EricLew 0:80ee8f3b695e 450 * @arg DMA_IT_HT: Half transfer complete interrupt mask
EricLew 0:80ee8f3b695e 451 * @arg DMA_IT_TE: Transfer error interrupt mask
EricLew 0:80ee8f3b695e 452 * @retval None
EricLew 0:80ee8f3b695e 453 */
EricLew 0:80ee8f3b695e 454 #define __HAL_DMA_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CCR |= (__INTERRUPT__))
EricLew 0:80ee8f3b695e 455
EricLew 0:80ee8f3b695e 456 /**
EricLew 0:80ee8f3b695e 457 * @brief Disable the specified DMA Channel interrupts.
EricLew 0:80ee8f3b695e 458 * @param __HANDLE__: DMA handle
EricLew 0:80ee8f3b695e 459 * @param __INTERRUPT__: specifies the DMA interrupt sources to be enabled or disabled.
EricLew 0:80ee8f3b695e 460 * This parameter can be any combination of the following values:
EricLew 0:80ee8f3b695e 461 * @arg DMA_IT_TC: Transfer complete interrupt mask
EricLew 0:80ee8f3b695e 462 * @arg DMA_IT_HT: Half transfer complete interrupt mask
EricLew 0:80ee8f3b695e 463 * @arg DMA_IT_TE: Transfer error interrupt mask
EricLew 0:80ee8f3b695e 464 * @retval None
EricLew 0:80ee8f3b695e 465 */
EricLew 0:80ee8f3b695e 466 #define __HAL_DMA_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CCR &= ~(__INTERRUPT__))
EricLew 0:80ee8f3b695e 467
EricLew 0:80ee8f3b695e 468 /**
EricLew 0:80ee8f3b695e 469 * @brief Check whether the specified DMA Channel interrupt is enabled or not.
EricLew 0:80ee8f3b695e 470 * @param __HANDLE__: DMA handle
EricLew 0:80ee8f3b695e 471 * @param __INTERRUPT__: specifies the DMA interrupt source to check.
EricLew 0:80ee8f3b695e 472 * This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 473 * @arg DMA_IT_TC: Transfer complete interrupt mask
EricLew 0:80ee8f3b695e 474 * @arg DMA_IT_HT: Half transfer complete interrupt mask
EricLew 0:80ee8f3b695e 475 * @arg DMA_IT_TE: Transfer error interrupt mask
EricLew 0:80ee8f3b695e 476 * @retval The state of DMA_IT (SET or RESET).
EricLew 0:80ee8f3b695e 477 */
EricLew 0:80ee8f3b695e 478 #define __HAL_DMA_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CCR & (__INTERRUPT__)))
EricLew 0:80ee8f3b695e 479
EricLew 0:80ee8f3b695e 480 /**
EricLew 0:80ee8f3b695e 481 * @}
EricLew 0:80ee8f3b695e 482 */
EricLew 0:80ee8f3b695e 483
EricLew 0:80ee8f3b695e 484 /* Exported functions --------------------------------------------------------*/
EricLew 0:80ee8f3b695e 485
EricLew 0:80ee8f3b695e 486 /** @addtogroup DMA_Exported_Functions
EricLew 0:80ee8f3b695e 487 * @{
EricLew 0:80ee8f3b695e 488 */
EricLew 0:80ee8f3b695e 489
EricLew 0:80ee8f3b695e 490 /** @addtogroup DMA_Exported_Functions_Group1
EricLew 0:80ee8f3b695e 491 * @{
EricLew 0:80ee8f3b695e 492 */
EricLew 0:80ee8f3b695e 493 /* Initialization and de-initialization functions *****************************/
EricLew 0:80ee8f3b695e 494 HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma);
EricLew 0:80ee8f3b695e 495 HAL_StatusTypeDef HAL_DMA_DeInit (DMA_HandleTypeDef *hdma);
EricLew 0:80ee8f3b695e 496 /**
EricLew 0:80ee8f3b695e 497 * @}
EricLew 0:80ee8f3b695e 498 */
EricLew 0:80ee8f3b695e 499
EricLew 0:80ee8f3b695e 500 /** @addtogroup DMA_Exported_Functions_Group2
EricLew 0:80ee8f3b695e 501 * @{
EricLew 0:80ee8f3b695e 502 */
EricLew 0:80ee8f3b695e 503 /* IO operation functions *****************************************************/
EricLew 0:80ee8f3b695e 504 HAL_StatusTypeDef HAL_DMA_Start (DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
EricLew 0:80ee8f3b695e 505 HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
EricLew 0:80ee8f3b695e 506 HAL_StatusTypeDef HAL_DMA_Abort(DMA_HandleTypeDef *hdma);
EricLew 0:80ee8f3b695e 507 HAL_StatusTypeDef HAL_DMA_PollForTransfer(DMA_HandleTypeDef *hdma, uint32_t CompleteLevel, uint32_t Timeout);
EricLew 0:80ee8f3b695e 508 void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma);
EricLew 0:80ee8f3b695e 509 /**
EricLew 0:80ee8f3b695e 510 * @}
EricLew 0:80ee8f3b695e 511 */
EricLew 0:80ee8f3b695e 512
EricLew 0:80ee8f3b695e 513 /** @addtogroup DMA_Exported_Functions_Group3
EricLew 0:80ee8f3b695e 514 * @{
EricLew 0:80ee8f3b695e 515 */
EricLew 0:80ee8f3b695e 516 /* Peripheral State and Error functions ***************************************/
EricLew 0:80ee8f3b695e 517 HAL_DMA_StateTypeDef HAL_DMA_GetState(DMA_HandleTypeDef *hdma);
EricLew 0:80ee8f3b695e 518 uint32_t HAL_DMA_GetError(DMA_HandleTypeDef *hdma);
EricLew 0:80ee8f3b695e 519 /**
EricLew 0:80ee8f3b695e 520 * @}
EricLew 0:80ee8f3b695e 521 */
EricLew 0:80ee8f3b695e 522
EricLew 0:80ee8f3b695e 523 /**
EricLew 0:80ee8f3b695e 524 * @}
EricLew 0:80ee8f3b695e 525 */
EricLew 0:80ee8f3b695e 526
EricLew 0:80ee8f3b695e 527 /* Private macros ------------------------------------------------------------*/
EricLew 0:80ee8f3b695e 528 /** @defgroup DMA_Private_Macros DMA Private Macros
EricLew 0:80ee8f3b695e 529 * @{
EricLew 0:80ee8f3b695e 530 */
EricLew 0:80ee8f3b695e 531
EricLew 0:80ee8f3b695e 532 #define IS_DMA_DIRECTION(DIRECTION) (((DIRECTION) == DMA_PERIPH_TO_MEMORY ) || \
EricLew 0:80ee8f3b695e 533 ((DIRECTION) == DMA_MEMORY_TO_PERIPH) || \
EricLew 0:80ee8f3b695e 534 ((DIRECTION) == DMA_MEMORY_TO_MEMORY))
EricLew 0:80ee8f3b695e 535
EricLew 0:80ee8f3b695e 536 #define IS_DMA_BUFFER_SIZE(SIZE) (((SIZE) >= 0x1) && ((SIZE) < 0x10000))
EricLew 0:80ee8f3b695e 537
EricLew 0:80ee8f3b695e 538 #define IS_DMA_PERIPHERAL_INC_STATE(STATE) (((STATE) == DMA_PINC_ENABLE) || \
EricLew 0:80ee8f3b695e 539 ((STATE) == DMA_PINC_DISABLE))
EricLew 0:80ee8f3b695e 540
EricLew 0:80ee8f3b695e 541 #define IS_DMA_MEMORY_INC_STATE(STATE) (((STATE) == DMA_MINC_ENABLE) || \
EricLew 0:80ee8f3b695e 542 ((STATE) == DMA_MINC_DISABLE))
EricLew 0:80ee8f3b695e 543
EricLew 0:80ee8f3b695e 544 #define IS_DMA_ALL_REQUEST(REQUEST) (((REQUEST) == DMA_REQUEST_0) || \
EricLew 0:80ee8f3b695e 545 ((REQUEST) == DMA_REQUEST_1) || \
EricLew 0:80ee8f3b695e 546 ((REQUEST) == DMA_REQUEST_2) || \
EricLew 0:80ee8f3b695e 547 ((REQUEST) == DMA_REQUEST_3) || \
EricLew 0:80ee8f3b695e 548 ((REQUEST) == DMA_REQUEST_4) || \
EricLew 0:80ee8f3b695e 549 ((REQUEST) == DMA_REQUEST_5) || \
EricLew 0:80ee8f3b695e 550 ((REQUEST) == DMA_REQUEST_6) || \
EricLew 0:80ee8f3b695e 551 ((REQUEST) == DMA_REQUEST_7))
EricLew 0:80ee8f3b695e 552
EricLew 0:80ee8f3b695e 553 #define IS_DMA_PERIPHERAL_DATA_SIZE(SIZE) (((SIZE) == DMA_PDATAALIGN_BYTE) || \
EricLew 0:80ee8f3b695e 554 ((SIZE) == DMA_PDATAALIGN_HALFWORD) || \
EricLew 0:80ee8f3b695e 555 ((SIZE) == DMA_PDATAALIGN_WORD))
EricLew 0:80ee8f3b695e 556
EricLew 0:80ee8f3b695e 557 #define IS_DMA_MEMORY_DATA_SIZE(SIZE) (((SIZE) == DMA_MDATAALIGN_BYTE) || \
EricLew 0:80ee8f3b695e 558 ((SIZE) == DMA_MDATAALIGN_HALFWORD) || \
EricLew 0:80ee8f3b695e 559 ((SIZE) == DMA_MDATAALIGN_WORD ))
EricLew 0:80ee8f3b695e 560
EricLew 0:80ee8f3b695e 561 #define IS_DMA_MODE(MODE) (((MODE) == DMA_NORMAL ) || \
EricLew 0:80ee8f3b695e 562 ((MODE) == DMA_CIRCULAR))
EricLew 0:80ee8f3b695e 563
EricLew 0:80ee8f3b695e 564 #define IS_DMA_PRIORITY(PRIORITY) (((PRIORITY) == DMA_PRIORITY_LOW ) || \
EricLew 0:80ee8f3b695e 565 ((PRIORITY) == DMA_PRIORITY_MEDIUM) || \
EricLew 0:80ee8f3b695e 566 ((PRIORITY) == DMA_PRIORITY_HIGH) || \
EricLew 0:80ee8f3b695e 567 ((PRIORITY) == DMA_PRIORITY_VERY_HIGH))
EricLew 0:80ee8f3b695e 568
EricLew 0:80ee8f3b695e 569 /**
EricLew 0:80ee8f3b695e 570 * @}
EricLew 0:80ee8f3b695e 571 */
EricLew 0:80ee8f3b695e 572
EricLew 0:80ee8f3b695e 573 /* Private functions ---------------------------------------------------------*/
EricLew 0:80ee8f3b695e 574
EricLew 0:80ee8f3b695e 575 /**
EricLew 0:80ee8f3b695e 576 * @}
EricLew 0:80ee8f3b695e 577 */
EricLew 0:80ee8f3b695e 578
EricLew 0:80ee8f3b695e 579 /**
EricLew 0:80ee8f3b695e 580 * @}
EricLew 0:80ee8f3b695e 581 */
EricLew 0:80ee8f3b695e 582
EricLew 0:80ee8f3b695e 583 #ifdef __cplusplus
EricLew 0:80ee8f3b695e 584 }
EricLew 0:80ee8f3b695e 585 #endif
EricLew 0:80ee8f3b695e 586
EricLew 0:80ee8f3b695e 587 #endif /* __STM32L4xx_HAL_DMA_H */
EricLew 0:80ee8f3b695e 588
EricLew 0:80ee8f3b695e 589 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
EricLew 0:80ee8f3b695e 590