STM32L4xx_HAL_Driver - Hal Drivers for L4

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Hal Drivers for L4

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Fork of STM32L4xx_HAL_Driver by Senior Design: Sound Monitor

Src/stm32l4xx_ll_usb.c@2:7aef7655b0a8, 2015-11-25 (annotated)

Committer:: EricLew
Date:: Wed Nov 25 17:30:43 2015 +0000
Revision:: 2:7aef7655b0a8
Parent:: 0:80ee8f3b695e

commit;

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User	Revision	Line number	New contents of line
EricLew	0:80ee8f3b695e	1	/**
EricLew	0:80ee8f3b695e	2	******************************************************************************
EricLew	0:80ee8f3b695e	3	* @file stm32l4xx_ll_usb.c
EricLew	0:80ee8f3b695e	4	* @author MCD Application Team
EricLew	0:80ee8f3b695e	5	* @version V1.1.0
EricLew	0:80ee8f3b695e	6	* @date 16-September-2015
EricLew	0:80ee8f3b695e	7	* @brief USB Low Layer HAL module driver.
EricLew	0:80ee8f3b695e	8	*
EricLew	0:80ee8f3b695e	9	* This file provides firmware functions to manage the following
EricLew	0:80ee8f3b695e	10	* functionalities of the USB Peripheral Controller:
EricLew	0:80ee8f3b695e	11	* + Initialization/de-initialization functions
EricLew	0:80ee8f3b695e	12	* + I/O operation functions
EricLew	0:80ee8f3b695e	13	* + Peripheral Control functions
EricLew	0:80ee8f3b695e	14	* + Peripheral State functions
EricLew	0:80ee8f3b695e	15	*
EricLew	0:80ee8f3b695e	16	@verbatim
EricLew	0:80ee8f3b695e	17	==============================================================================
EricLew	0:80ee8f3b695e	18	##### How to use this driver #####
EricLew	0:80ee8f3b695e	19	==============================================================================
EricLew	0:80ee8f3b695e	20	[..]
EricLew	0:80ee8f3b695e	21	(#) Fill parameters of Init structure in USB_OTG_CfgTypeDef structure.
EricLew	0:80ee8f3b695e	22
EricLew	0:80ee8f3b695e	23	(#) Call USB_CoreInit() API to initialize the USB Core peripheral.
EricLew	0:80ee8f3b695e	24
EricLew	0:80ee8f3b695e	25	(#) The upper HAL HCD/PCD driver will call the right routines for its internal processes.
EricLew	0:80ee8f3b695e	26
EricLew	0:80ee8f3b695e	27	@endverbatim
EricLew	0:80ee8f3b695e	28	******************************************************************************
EricLew	0:80ee8f3b695e	29	* @attention
EricLew	0:80ee8f3b695e	30	*
EricLew	0:80ee8f3b695e	31	* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
EricLew	0:80ee8f3b695e	32	*
EricLew	0:80ee8f3b695e	33	* Redistribution and use in source and binary forms, with or without modification,
EricLew	0:80ee8f3b695e	34	* are permitted provided that the following conditions are met:
EricLew	0:80ee8f3b695e	35	* 1. Redistributions of source code must retain the above copyright notice,
EricLew	0:80ee8f3b695e	36	* this list of conditions and the following disclaimer.
EricLew	0:80ee8f3b695e	37	* 2. Redistributions in binary form must reproduce the above copyright notice,
EricLew	0:80ee8f3b695e	38	* this list of conditions and the following disclaimer in the documentation
EricLew	0:80ee8f3b695e	39	* and/or other materials provided with the distribution.
EricLew	0:80ee8f3b695e	40	* 3. Neither the name of STMicroelectronics nor the names of its contributors
EricLew	0:80ee8f3b695e	41	* may be used to endorse or promote products derived from this software
EricLew	0:80ee8f3b695e	42	* without specific prior written permission.
EricLew	0:80ee8f3b695e	43	*
EricLew	0:80ee8f3b695e	44	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
EricLew	0:80ee8f3b695e	45	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
EricLew	0:80ee8f3b695e	46	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
EricLew	0:80ee8f3b695e	47	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
EricLew	0:80ee8f3b695e	48	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
EricLew	0:80ee8f3b695e	49	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
EricLew	0:80ee8f3b695e	50	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
EricLew	0:80ee8f3b695e	51	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
EricLew	0:80ee8f3b695e	52	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
EricLew	0:80ee8f3b695e	53	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
EricLew	0:80ee8f3b695e	54	*
EricLew	0:80ee8f3b695e	55	******************************************************************************
EricLew	0:80ee8f3b695e	56	*/
EricLew	0:80ee8f3b695e	57
EricLew	0:80ee8f3b695e	58	/* Includes ------------------------------------------------------------------*/
EricLew	0:80ee8f3b695e	59	#include "stm32l4xx_hal.h"
EricLew	0:80ee8f3b695e	60
EricLew	0:80ee8f3b695e	61	#if defined(STM32L475xx) \|\| defined(STM32L476xx) \|\| defined(STM32L485xx) \|\| defined(STM32L486xx)
EricLew	0:80ee8f3b695e	62
EricLew	0:80ee8f3b695e	63	/** @addtogroup STM32L4xx_LL_USB_DRIVER
EricLew	0:80ee8f3b695e	64	* @{
EricLew	0:80ee8f3b695e	65	*/
EricLew	0:80ee8f3b695e	66
EricLew	0:80ee8f3b695e	67	#if defined (HAL_PCD_MODULE_ENABLED) \|\| defined (HAL_HCD_MODULE_ENABLED)
EricLew	0:80ee8f3b695e	68
EricLew	0:80ee8f3b695e	69	/* Private typedef -----------------------------------------------------------*/
EricLew	0:80ee8f3b695e	70	/* Private define ------------------------------------------------------------*/
EricLew	0:80ee8f3b695e	71	/* Private macro -------------------------------------------------------------*/
EricLew	0:80ee8f3b695e	72	/* Private variables ---------------------------------------------------------*/
EricLew	0:80ee8f3b695e	73	/* Private function prototypes -----------------------------------------------*/
EricLew	0:80ee8f3b695e	74	/* Private functions ---------------------------------------------------------*/
EricLew	0:80ee8f3b695e	75	static HAL_StatusTypeDef USB_CoreReset(USB_OTG_GlobalTypeDef *USBx);
EricLew	0:80ee8f3b695e	76
EricLew	0:80ee8f3b695e	77	/* Exported functions --------------------------------------------------------*/
EricLew	0:80ee8f3b695e	78
EricLew	0:80ee8f3b695e	79	/** @defgroup LL_USB_Exported_Functions USB Low Layer Exported Functions
EricLew	0:80ee8f3b695e	80	* @{
EricLew	0:80ee8f3b695e	81	*/
EricLew	0:80ee8f3b695e	82
EricLew	0:80ee8f3b695e	83	/** @defgroup LL_USB_Group1 Initialization/de-initialization functions
EricLew	0:80ee8f3b695e	84	* @brief Initialization and Configuration functions
EricLew	0:80ee8f3b695e	85	*
EricLew	0:80ee8f3b695e	86	@verbatim
EricLew	0:80ee8f3b695e	87	===============================================================================
EricLew	0:80ee8f3b695e	88	##### Initialization/de-initialization functions #####
EricLew	0:80ee8f3b695e	89	===============================================================================
EricLew	0:80ee8f3b695e	90	[..] This section provides functions allowing to:
EricLew	0:80ee8f3b695e	91
EricLew	0:80ee8f3b695e	92	@endverbatim
EricLew	0:80ee8f3b695e	93	* @{
EricLew	0:80ee8f3b695e	94	*/
EricLew	0:80ee8f3b695e	95
EricLew	0:80ee8f3b695e	96	/**
EricLew	0:80ee8f3b695e	97	* @brief Initializes the USB Core
EricLew	0:80ee8f3b695e	98	* @param USBx: USB Instance
EricLew	0:80ee8f3b695e	99	* @param cfg: pointer to a USB_OTG_CfgTypeDef structure that contains
EricLew	0:80ee8f3b695e	100	* the configuration information for the specified USBx peripheral.
EricLew	0:80ee8f3b695e	101	* @retval HAL status
EricLew	0:80ee8f3b695e	102	*/
EricLew	0:80ee8f3b695e	103	HAL_StatusTypeDef USB_CoreInit(USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg)
EricLew	0:80ee8f3b695e	104	{
EricLew	0:80ee8f3b695e	105	/* Select FS Embedded PHY */
EricLew	0:80ee8f3b695e	106	USBx->GUSBCFG \|= USB_OTG_GUSBCFG_PHYSEL;
EricLew	0:80ee8f3b695e	107
EricLew	0:80ee8f3b695e	108	/* Reset after a PHY select and set Host mode */
EricLew	0:80ee8f3b695e	109	USB_CoreReset(USBx);
EricLew	0:80ee8f3b695e	110
EricLew	0:80ee8f3b695e	111	/* Deactivate the power down*/
EricLew	0:80ee8f3b695e	112	USBx->GCCFG = USB_OTG_GCCFG_PWRDWN;
EricLew	0:80ee8f3b695e	113
EricLew	0:80ee8f3b695e	114	/* Enable srpcap*/
EricLew	0:80ee8f3b695e	115	USBx->GUSBCFG \|= USB_OTG_GUSBCFG_SRPCAP;
EricLew	0:80ee8f3b695e	116
EricLew	0:80ee8f3b695e	117	return HAL_OK;
EricLew	0:80ee8f3b695e	118	}
EricLew	0:80ee8f3b695e	119
EricLew	0:80ee8f3b695e	120	/**
EricLew	0:80ee8f3b695e	121	* @brief USB_EnableGlobalInt
EricLew	0:80ee8f3b695e	122	* Enables the controller's Global Int in the AHB Config reg
EricLew	0:80ee8f3b695e	123	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	124	* @retval HAL status
EricLew	0:80ee8f3b695e	125	*/
EricLew	0:80ee8f3b695e	126	HAL_StatusTypeDef USB_EnableGlobalInt(USB_OTG_GlobalTypeDef *USBx)
EricLew	0:80ee8f3b695e	127	{
EricLew	0:80ee8f3b695e	128	USBx->GAHBCFG \|= USB_OTG_GAHBCFG_GINT;
EricLew	0:80ee8f3b695e	129	return HAL_OK;
EricLew	0:80ee8f3b695e	130	}
EricLew	0:80ee8f3b695e	131
EricLew	0:80ee8f3b695e	132
EricLew	0:80ee8f3b695e	133	/**
EricLew	0:80ee8f3b695e	134	* @brief USB_DisableGlobalInt
EricLew	0:80ee8f3b695e	135	* Disable the controller's Global Int in the AHB Config reg
EricLew	0:80ee8f3b695e	136	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	137	* @retval HAL status
EricLew	0:80ee8f3b695e	138	*/
EricLew	0:80ee8f3b695e	139	HAL_StatusTypeDef USB_DisableGlobalInt(USB_OTG_GlobalTypeDef *USBx)
EricLew	0:80ee8f3b695e	140	{
EricLew	0:80ee8f3b695e	141	USBx->GAHBCFG &= ~USB_OTG_GAHBCFG_GINT;
EricLew	0:80ee8f3b695e	142	return HAL_OK;
EricLew	0:80ee8f3b695e	143	}
EricLew	0:80ee8f3b695e	144
EricLew	0:80ee8f3b695e	145	/**
EricLew	0:80ee8f3b695e	146	* @brief USB_SetCurrentMode : Set functional mode
EricLew	0:80ee8f3b695e	147	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	148	* @param mode: current core mode
EricLew	0:80ee8f3b695e	149	* This parameter can be one of these values:
EricLew	0:80ee8f3b695e	150	* @arg USB_OTG_DEVICE_MODE: Peripheral mode
EricLew	0:80ee8f3b695e	151	* @arg USB_OTG_HOST_MODE: Host mode
EricLew	0:80ee8f3b695e	152	* @arg USB_OTG_DRD_MODE: Dual Role Device mode
EricLew	0:80ee8f3b695e	153	* @retval HAL status
EricLew	0:80ee8f3b695e	154	*/
EricLew	0:80ee8f3b695e	155	HAL_StatusTypeDef USB_SetCurrentMode(USB_OTG_GlobalTypeDef *USBx , USB_OTG_ModeTypeDef mode)
EricLew	0:80ee8f3b695e	156	{
EricLew	0:80ee8f3b695e	157	USBx->GUSBCFG &= ~(USB_OTG_GUSBCFG_FHMOD \| USB_OTG_GUSBCFG_FDMOD);
EricLew	0:80ee8f3b695e	158
EricLew	0:80ee8f3b695e	159	if ( mode == USB_OTG_HOST_MODE)
EricLew	0:80ee8f3b695e	160	{
EricLew	0:80ee8f3b695e	161	USBx->GUSBCFG \|= USB_OTG_GUSBCFG_FHMOD;
EricLew	0:80ee8f3b695e	162	}
EricLew	0:80ee8f3b695e	163	else if ( mode == USB_OTG_DEVICE_MODE)
EricLew	0:80ee8f3b695e	164	{
EricLew	0:80ee8f3b695e	165	USBx->GUSBCFG \|= USB_OTG_GUSBCFG_FDMOD;
EricLew	0:80ee8f3b695e	166	}
EricLew	0:80ee8f3b695e	167	HAL_Delay(50);
EricLew	0:80ee8f3b695e	168
EricLew	0:80ee8f3b695e	169	return HAL_OK;
EricLew	0:80ee8f3b695e	170	}
EricLew	0:80ee8f3b695e	171
EricLew	0:80ee8f3b695e	172	/**
EricLew	0:80ee8f3b695e	173	* @brief USB_DevInit : Initializes the USB_OTG controller registers
EricLew	0:80ee8f3b695e	174	* for device mode
EricLew	0:80ee8f3b695e	175	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	176	* @param cfg: pointer to a USB_OTG_CfgTypeDef structure that contains
EricLew	0:80ee8f3b695e	177	* the configuration information for the specified USBx peripheral.
EricLew	0:80ee8f3b695e	178	* @retval HAL status
EricLew	0:80ee8f3b695e	179	*/
EricLew	0:80ee8f3b695e	180	HAL_StatusTypeDef USB_DevInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg)
EricLew	0:80ee8f3b695e	181	{
EricLew	0:80ee8f3b695e	182	uint32_t i = 0;
EricLew	0:80ee8f3b695e	183
EricLew	0:80ee8f3b695e	184	/Activate VBUS Sensing B /
EricLew	0:80ee8f3b695e	185	USBx->GCCFG \|= USB_OTG_GCCFG_VBDEN;
EricLew	0:80ee8f3b695e	186
EricLew	0:80ee8f3b695e	187	if (cfg.vbus_sensing_enable == 0)
EricLew	0:80ee8f3b695e	188	{
EricLew	0:80ee8f3b695e	189	/* Deactivate VBUS Sensing B */
EricLew	0:80ee8f3b695e	190	USBx->GCCFG &= ~ USB_OTG_GCCFG_VBDEN;
EricLew	0:80ee8f3b695e	191
EricLew	0:80ee8f3b695e	192	/* B-peripheral session valid override enable*/
EricLew	0:80ee8f3b695e	193	USBx->GOTGCTL \|= USB_OTG_GOTGCTL_BVALOEN;
EricLew	0:80ee8f3b695e	194	USBx->GOTGCTL \|= USB_OTG_GOTGCTL_BVALOVAL;
EricLew	0:80ee8f3b695e	195	}
EricLew	0:80ee8f3b695e	196
EricLew	0:80ee8f3b695e	197	/* Restart the Phy Clock */
EricLew	0:80ee8f3b695e	198	USBx_PCGCCTL = 0;
EricLew	0:80ee8f3b695e	199
EricLew	0:80ee8f3b695e	200	/* Device mode configuration */
EricLew	0:80ee8f3b695e	201	USBx_DEVICE->DCFG \|= DCFG_FRAME_INTERVAL_80;
EricLew	0:80ee8f3b695e	202
EricLew	0:80ee8f3b695e	203	/* Set Full speed phy */
EricLew	0:80ee8f3b695e	204	USB_SetDevSpeed (USBx , USB_OTG_SPEED_FULL);
EricLew	0:80ee8f3b695e	205
EricLew	0:80ee8f3b695e	206	/* Flush the FIFOs */
EricLew	0:80ee8f3b695e	207	USB_FlushTxFifo(USBx , 0x10); /* all Tx FIFOs */
EricLew	0:80ee8f3b695e	208	USB_FlushRxFifo(USBx);
EricLew	0:80ee8f3b695e	209
EricLew	0:80ee8f3b695e	210	/* Clear all pending Device Interrupts */
EricLew	0:80ee8f3b695e	211	USBx_DEVICE->DIEPMSK = 0;
EricLew	0:80ee8f3b695e	212	USBx_DEVICE->DOEPMSK = 0;
EricLew	0:80ee8f3b695e	213	USBx_DEVICE->DAINT = 0xFFFFFFFF;
EricLew	0:80ee8f3b695e	214	USBx_DEVICE->DAINTMSK = 0;
EricLew	0:80ee8f3b695e	215
EricLew	0:80ee8f3b695e	216	for (i = 0; i < cfg.dev_endpoints; i++)
EricLew	0:80ee8f3b695e	217	{
EricLew	0:80ee8f3b695e	218	if ((USBx_INEP(i)->DIEPCTL & USB_OTG_DIEPCTL_EPENA) == USB_OTG_DIEPCTL_EPENA)
EricLew	0:80ee8f3b695e	219	{
EricLew	0:80ee8f3b695e	220	USBx_INEP(i)->DIEPCTL = (USB_OTG_DIEPCTL_EPDIS \| USB_OTG_DIEPCTL_SNAK);
EricLew	0:80ee8f3b695e	221	}
EricLew	0:80ee8f3b695e	222	else
EricLew	0:80ee8f3b695e	223	{
EricLew	0:80ee8f3b695e	224	USBx_INEP(i)->DIEPCTL = 0;
EricLew	0:80ee8f3b695e	225	}
EricLew	0:80ee8f3b695e	226
EricLew	0:80ee8f3b695e	227	USBx_INEP(i)->DIEPTSIZ = 0;
EricLew	0:80ee8f3b695e	228	USBx_INEP(i)->DIEPINT = 0xFF;
EricLew	0:80ee8f3b695e	229	}
EricLew	0:80ee8f3b695e	230
EricLew	0:80ee8f3b695e	231	for (i = 0; i < cfg.dev_endpoints; i++)
EricLew	0:80ee8f3b695e	232	{
EricLew	0:80ee8f3b695e	233	if ((USBx_OUTEP(i)->DOEPCTL & USB_OTG_DOEPCTL_EPENA) == USB_OTG_DOEPCTL_EPENA)
EricLew	0:80ee8f3b695e	234	{
EricLew	0:80ee8f3b695e	235	USBx_OUTEP(i)->DOEPCTL = (USB_OTG_DOEPCTL_EPDIS \| USB_OTG_DOEPCTL_SNAK);
EricLew	0:80ee8f3b695e	236	}
EricLew	0:80ee8f3b695e	237	else
EricLew	0:80ee8f3b695e	238	{
EricLew	0:80ee8f3b695e	239	USBx_OUTEP(i)->DOEPCTL = 0;
EricLew	0:80ee8f3b695e	240	}
EricLew	0:80ee8f3b695e	241
EricLew	0:80ee8f3b695e	242	USBx_OUTEP(i)->DOEPTSIZ = 0;
EricLew	0:80ee8f3b695e	243	USBx_OUTEP(i)->DOEPINT = 0xFF;
EricLew	0:80ee8f3b695e	244	}
EricLew	0:80ee8f3b695e	245
EricLew	0:80ee8f3b695e	246	USBx_DEVICE->DIEPMSK &= ~(USB_OTG_DIEPMSK_TXFURM);
EricLew	0:80ee8f3b695e	247
EricLew	0:80ee8f3b695e	248	if (cfg.dma_enable == 1)
EricLew	0:80ee8f3b695e	249	{
EricLew	0:80ee8f3b695e	250	/Set threshold parameters /
EricLew	0:80ee8f3b695e	251	USBx_DEVICE->DTHRCTL = (USB_OTG_DTHRCTL_TXTHRLEN_6 \| USB_OTG_DTHRCTL_RXTHRLEN_6);
EricLew	0:80ee8f3b695e	252	USBx_DEVICE->DTHRCTL \|= (USB_OTG_DTHRCTL_RXTHREN \| USB_OTG_DTHRCTL_ISOTHREN \| USB_OTG_DTHRCTL_NONISOTHREN);
EricLew	0:80ee8f3b695e	253
EricLew	0:80ee8f3b695e	254	i= USBx_DEVICE->DTHRCTL;
EricLew	0:80ee8f3b695e	255	}
EricLew	0:80ee8f3b695e	256
EricLew	0:80ee8f3b695e	257	/* Disable all interrupts. */
EricLew	0:80ee8f3b695e	258	USBx->GINTMSK = 0;
EricLew	0:80ee8f3b695e	259
EricLew	0:80ee8f3b695e	260	/* Clear any pending interrupts */
EricLew	0:80ee8f3b695e	261	USBx->GINTSTS = 0xBFFFFFFF;
EricLew	0:80ee8f3b695e	262
EricLew	0:80ee8f3b695e	263	/* Enable the common interrupts */
EricLew	0:80ee8f3b695e	264	if (cfg.dma_enable == DISABLE)
EricLew	0:80ee8f3b695e	265	{
EricLew	0:80ee8f3b695e	266	USBx->GINTMSK \|= USB_OTG_GINTMSK_RXFLVLM;
EricLew	0:80ee8f3b695e	267	}
EricLew	0:80ee8f3b695e	268
EricLew	0:80ee8f3b695e	269	/* Enable interrupts matching to the Device mode ONLY */
EricLew	0:80ee8f3b695e	270	USBx->GINTMSK \|= (USB_OTG_GINTMSK_USBSUSPM \| USB_OTG_GINTMSK_USBRST \|\
EricLew	0:80ee8f3b695e	271	USB_OTG_GINTMSK_ENUMDNEM \| USB_OTG_GINTMSK_IEPINT \|\
EricLew	0:80ee8f3b695e	272	USB_OTG_GINTMSK_OEPINT \| USB_OTG_GINTMSK_IISOIXFRM\|\
EricLew	0:80ee8f3b695e	273	USB_OTG_GINTMSK_PXFRM_IISOOXFRM \| USB_OTG_GINTMSK_WUIM);
EricLew	0:80ee8f3b695e	274
EricLew	0:80ee8f3b695e	275	if(cfg.Sof_enable)
EricLew	0:80ee8f3b695e	276	{
EricLew	0:80ee8f3b695e	277	USBx->GINTMSK \|= USB_OTG_GINTMSK_SOFM;
EricLew	0:80ee8f3b695e	278	}
EricLew	0:80ee8f3b695e	279
EricLew	0:80ee8f3b695e	280	if (cfg.vbus_sensing_enable == ENABLE)
EricLew	0:80ee8f3b695e	281	{
EricLew	0:80ee8f3b695e	282	USBx->GINTMSK \|= (USB_OTG_GINTMSK_SRQIM \| USB_OTG_GINTMSK_OTGINT);
EricLew	0:80ee8f3b695e	283	}
EricLew	0:80ee8f3b695e	284
EricLew	0:80ee8f3b695e	285	return HAL_OK;
EricLew	0:80ee8f3b695e	286	}
EricLew	0:80ee8f3b695e	287
EricLew	0:80ee8f3b695e	288
EricLew	0:80ee8f3b695e	289	/**
EricLew	0:80ee8f3b695e	290	* @brief USB_OTG_FlushTxFifo : Flush a Tx FIFO
EricLew	0:80ee8f3b695e	291	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	292	* @param num: FIFO number
EricLew	0:80ee8f3b695e	293	* This parameter can be a value from 1 to 15
EricLew	0:80ee8f3b695e	294	15 means Flush all Tx FIFOs
EricLew	0:80ee8f3b695e	295	* @retval HAL status
EricLew	0:80ee8f3b695e	296	*/
EricLew	0:80ee8f3b695e	297	HAL_StatusTypeDef USB_FlushTxFifo (USB_OTG_GlobalTypeDef *USBx, uint32_t num )
EricLew	0:80ee8f3b695e	298	{
EricLew	0:80ee8f3b695e	299	uint32_t count = 0;
EricLew	0:80ee8f3b695e	300
EricLew	0:80ee8f3b695e	301	USBx->GRSTCTL = ( USB_OTG_GRSTCTL_TXFFLSH \|(uint32_t)( num << 6));
EricLew	0:80ee8f3b695e	302
EricLew	0:80ee8f3b695e	303	do
EricLew	0:80ee8f3b695e	304	{
EricLew	0:80ee8f3b695e	305	if (++count > 200000)
EricLew	0:80ee8f3b695e	306	{
EricLew	0:80ee8f3b695e	307	return HAL_TIMEOUT;
EricLew	0:80ee8f3b695e	308	}
EricLew	0:80ee8f3b695e	309	}
EricLew	0:80ee8f3b695e	310	while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_TXFFLSH) == USB_OTG_GRSTCTL_TXFFLSH);
EricLew	0:80ee8f3b695e	311
EricLew	0:80ee8f3b695e	312	return HAL_OK;
EricLew	0:80ee8f3b695e	313	}
EricLew	0:80ee8f3b695e	314
EricLew	0:80ee8f3b695e	315
EricLew	0:80ee8f3b695e	316	/**
EricLew	0:80ee8f3b695e	317	* @brief USB_FlushRxFifo : Flush Rx FIFO
EricLew	0:80ee8f3b695e	318	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	319	* @retval HAL status
EricLew	0:80ee8f3b695e	320	*/
EricLew	0:80ee8f3b695e	321	HAL_StatusTypeDef USB_FlushRxFifo(USB_OTG_GlobalTypeDef *USBx)
EricLew	0:80ee8f3b695e	322	{
EricLew	0:80ee8f3b695e	323	uint32_t count = 0;
EricLew	0:80ee8f3b695e	324
EricLew	0:80ee8f3b695e	325	USBx->GRSTCTL = USB_OTG_GRSTCTL_RXFFLSH;
EricLew	0:80ee8f3b695e	326
EricLew	0:80ee8f3b695e	327	do
EricLew	0:80ee8f3b695e	328	{
EricLew	0:80ee8f3b695e	329	if (++count > 200000)
EricLew	0:80ee8f3b695e	330	{
EricLew	0:80ee8f3b695e	331	return HAL_TIMEOUT;
EricLew	0:80ee8f3b695e	332	}
EricLew	0:80ee8f3b695e	333	}
EricLew	0:80ee8f3b695e	334	while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_RXFFLSH) == USB_OTG_GRSTCTL_RXFFLSH);
EricLew	0:80ee8f3b695e	335
EricLew	0:80ee8f3b695e	336	return HAL_OK;
EricLew	0:80ee8f3b695e	337	}
EricLew	0:80ee8f3b695e	338
EricLew	0:80ee8f3b695e	339	/**
EricLew	0:80ee8f3b695e	340	* @brief USB_SetDevSpeed :Initializes the DevSpd field of DCFG register
EricLew	0:80ee8f3b695e	341	* depending the PHY type and the enumeration speed of the device.
EricLew	0:80ee8f3b695e	342	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	343	* @param speed: device speed
EricLew	0:80ee8f3b695e	344	* This parameter can be one of these values:
EricLew	0:80ee8f3b695e	345	* @arg USB_OTG_SPEED_HIGH: High speed mode
EricLew	0:80ee8f3b695e	346	* @arg USB_OTG_SPEED_HIGH_IN_FULL: High speed core in Full Speed mode
EricLew	0:80ee8f3b695e	347	* @arg USB_OTG_SPEED_FULL: Full speed mode
EricLew	0:80ee8f3b695e	348	* @arg USB_OTG_SPEED_LOW: Low speed mode
EricLew	0:80ee8f3b695e	349	* @retval Hal status
EricLew	0:80ee8f3b695e	350	*/
EricLew	0:80ee8f3b695e	351	HAL_StatusTypeDef USB_SetDevSpeed(USB_OTG_GlobalTypeDef *USBx , uint8_t speed)
EricLew	0:80ee8f3b695e	352	{
EricLew	0:80ee8f3b695e	353	USBx_DEVICE->DCFG \|= speed;
EricLew	0:80ee8f3b695e	354	return HAL_OK;
EricLew	0:80ee8f3b695e	355	}
EricLew	0:80ee8f3b695e	356
EricLew	0:80ee8f3b695e	357	/**
EricLew	0:80ee8f3b695e	358	* @brief USB_GetDevSpeed :Return the Dev Speed
EricLew	0:80ee8f3b695e	359	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	360	* @retval speed : device speed
EricLew	0:80ee8f3b695e	361	* This parameter can be one of these values:
EricLew	0:80ee8f3b695e	362	* @arg USB_OTG_SPEED_HIGH: High speed mode
EricLew	0:80ee8f3b695e	363	* @arg USB_OTG_SPEED_FULL: Full speed mode
EricLew	0:80ee8f3b695e	364	* @arg USB_OTG_SPEED_LOW: Low speed mode
EricLew	0:80ee8f3b695e	365	*/
EricLew	0:80ee8f3b695e	366	uint8_t USB_GetDevSpeed(USB_OTG_GlobalTypeDef *USBx)
EricLew	0:80ee8f3b695e	367	{
EricLew	0:80ee8f3b695e	368	uint8_t speed = 0;
EricLew	0:80ee8f3b695e	369
EricLew	0:80ee8f3b695e	370	if((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ)
EricLew	0:80ee8f3b695e	371	{
EricLew	0:80ee8f3b695e	372	speed = USB_OTG_SPEED_HIGH;
EricLew	0:80ee8f3b695e	373	}
EricLew	0:80ee8f3b695e	374	else if (((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ)\|\|
EricLew	0:80ee8f3b695e	375	((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_FS_PHY_48MHZ))
EricLew	0:80ee8f3b695e	376	{
EricLew	0:80ee8f3b695e	377	speed = USB_OTG_SPEED_FULL;
EricLew	0:80ee8f3b695e	378	}
EricLew	0:80ee8f3b695e	379	else if((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_LS_PHY_6MHZ)
EricLew	0:80ee8f3b695e	380	{
EricLew	0:80ee8f3b695e	381	speed = USB_OTG_SPEED_LOW;
EricLew	0:80ee8f3b695e	382	}
EricLew	0:80ee8f3b695e	383
EricLew	0:80ee8f3b695e	384	return speed;
EricLew	0:80ee8f3b695e	385	}
EricLew	0:80ee8f3b695e	386
EricLew	0:80ee8f3b695e	387	/**
EricLew	0:80ee8f3b695e	388	* @brief Activate and configure an endpoint
EricLew	0:80ee8f3b695e	389	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	390	* @param ep: pointer to endpoint structure
EricLew	0:80ee8f3b695e	391	* @retval HAL status
EricLew	0:80ee8f3b695e	392	*/
EricLew	0:80ee8f3b695e	393	HAL_StatusTypeDef USB_ActivateEndpoint(USB_OTG_GlobalTypeDef USBx, USB_OTG_EPTypeDef ep)
EricLew	0:80ee8f3b695e	394	{
EricLew	0:80ee8f3b695e	395	if (ep->is_in == 1)
EricLew	0:80ee8f3b695e	396	{
EricLew	0:80ee8f3b695e	397	USBx_DEVICE->DAINTMSK \|= USB_OTG_DAINTMSK_IEPM & ((1 << (ep->num)));
EricLew	0:80ee8f3b695e	398
EricLew	0:80ee8f3b695e	399	if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_USBAEP) == 0)
EricLew	0:80ee8f3b695e	400	{
EricLew	0:80ee8f3b695e	401	USBx_INEP(ep->num)->DIEPCTL \|= ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) \| (ep->type << 18 ) \|\
EricLew	0:80ee8f3b695e	402	((ep->num) << 22 ) \| (USB_OTG_DIEPCTL_SD0PID_SEVNFRM) \| (USB_OTG_DIEPCTL_USBAEP));
EricLew	0:80ee8f3b695e	403	}
EricLew	0:80ee8f3b695e	404
EricLew	0:80ee8f3b695e	405	}
EricLew	0:80ee8f3b695e	406	else
EricLew	0:80ee8f3b695e	407	{
EricLew	0:80ee8f3b695e	408	USBx_DEVICE->DAINTMSK \|= USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16);
EricLew	0:80ee8f3b695e	409
EricLew	0:80ee8f3b695e	410	if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_USBAEP) == 0)
EricLew	0:80ee8f3b695e	411	{
EricLew	0:80ee8f3b695e	412	USBx_OUTEP(ep->num)->DOEPCTL \|= ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) \| (ep->type << 18 ) \|\
EricLew	0:80ee8f3b695e	413	(USB_OTG_DIEPCTL_SD0PID_SEVNFRM)\| (USB_OTG_DOEPCTL_USBAEP));
EricLew	0:80ee8f3b695e	414	}
EricLew	0:80ee8f3b695e	415	}
EricLew	0:80ee8f3b695e	416	return HAL_OK;
EricLew	0:80ee8f3b695e	417	}
EricLew	0:80ee8f3b695e	418	/**
EricLew	0:80ee8f3b695e	419	* @brief Activate and configure a dedicated endpoint
EricLew	0:80ee8f3b695e	420	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	421	* @param ep: pointer to endpoint structure
EricLew	0:80ee8f3b695e	422	* @retval HAL status
EricLew	0:80ee8f3b695e	423	*/
EricLew	0:80ee8f3b695e	424	HAL_StatusTypeDef USB_ActivateDedicatedEndpoint(USB_OTG_GlobalTypeDef USBx, USB_OTG_EPTypeDef ep)
EricLew	0:80ee8f3b695e	425	{
EricLew	0:80ee8f3b695e	426	static __IO uint32_t debug = 0;
EricLew	0:80ee8f3b695e	427
EricLew	0:80ee8f3b695e	428	/* Read DEPCTLn register */
EricLew	0:80ee8f3b695e	429	if (ep->is_in == 1)
EricLew	0:80ee8f3b695e	430	{
EricLew	0:80ee8f3b695e	431	if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_USBAEP) == 0)
EricLew	0:80ee8f3b695e	432	{
EricLew	0:80ee8f3b695e	433	USBx_INEP(ep->num)->DIEPCTL \|= ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) \| (ep->type << 18 ) \|\
EricLew	0:80ee8f3b695e	434	((ep->num) << 22 ) \| (USB_OTG_DIEPCTL_SD0PID_SEVNFRM) \| (USB_OTG_DIEPCTL_USBAEP));
EricLew	0:80ee8f3b695e	435	}
EricLew	0:80ee8f3b695e	436
EricLew	0:80ee8f3b695e	437
EricLew	0:80ee8f3b695e	438	debug \|= ((ep->maxpacket & USB_OTG_DIEPCTL_MPSIZ ) \| (ep->type << 18 ) \|\
EricLew	0:80ee8f3b695e	439	((ep->num) << 22 ) \| (USB_OTG_DIEPCTL_SD0PID_SEVNFRM) \| (USB_OTG_DIEPCTL_USBAEP));
EricLew	0:80ee8f3b695e	440
EricLew	0:80ee8f3b695e	441	USBx_DEVICE->DEACHMSK \|= USB_OTG_DAINTMSK_IEPM & ((1 << (ep->num)));
EricLew	0:80ee8f3b695e	442	}
EricLew	0:80ee8f3b695e	443	else
EricLew	0:80ee8f3b695e	444	{
EricLew	0:80ee8f3b695e	445	if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_USBAEP) == 0)
EricLew	0:80ee8f3b695e	446	{
EricLew	0:80ee8f3b695e	447	USBx_OUTEP(ep->num)->DOEPCTL \|= ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) \| (ep->type << 18 ) \|\
EricLew	0:80ee8f3b695e	448	((ep->num) << 22 ) \| (USB_OTG_DOEPCTL_USBAEP));
EricLew	0:80ee8f3b695e	449
EricLew	0:80ee8f3b695e	450	debug = (uint32_t)(((uint32_t )USBx) + USB_OTG_OUT_ENDPOINT_BASE + (0)*USB_OTG_EP_REG_SIZE);
EricLew	0:80ee8f3b695e	451	debug = (uint32_t )&USBx_OUTEP(ep->num)->DOEPCTL;
EricLew	0:80ee8f3b695e	452	debug \|= ((ep->maxpacket & USB_OTG_DOEPCTL_MPSIZ ) \| (ep->type << 18 ) \|\
EricLew	0:80ee8f3b695e	453	((ep->num) << 22 ) \| (USB_OTG_DOEPCTL_USBAEP));
EricLew	0:80ee8f3b695e	454	}
EricLew	0:80ee8f3b695e	455
EricLew	0:80ee8f3b695e	456	USBx_DEVICE->DEACHMSK \|= USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16);
EricLew	0:80ee8f3b695e	457	}
EricLew	0:80ee8f3b695e	458
EricLew	0:80ee8f3b695e	459	return HAL_OK;
EricLew	0:80ee8f3b695e	460	}
EricLew	0:80ee8f3b695e	461	/**
EricLew	0:80ee8f3b695e	462	* @brief De-activate and de-initialize an endpoint
EricLew	0:80ee8f3b695e	463	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	464	* @param ep: pointer to endpoint structure
EricLew	0:80ee8f3b695e	465	* @retval HAL status
EricLew	0:80ee8f3b695e	466	*/
EricLew	0:80ee8f3b695e	467	HAL_StatusTypeDef USB_DeactivateEndpoint(USB_OTG_GlobalTypeDef USBx, USB_OTG_EPTypeDef ep)
EricLew	0:80ee8f3b695e	468	{
EricLew	0:80ee8f3b695e	469	/* Read DEPCTLn register */
EricLew	0:80ee8f3b695e	470	if (ep->is_in == 1)
EricLew	0:80ee8f3b695e	471	{
EricLew	0:80ee8f3b695e	472	USBx_DEVICE->DEACHMSK &= ~(USB_OTG_DAINTMSK_IEPM & ((1 << (ep->num))));
EricLew	0:80ee8f3b695e	473	USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_IEPM & ((1 << (ep->num))));
EricLew	0:80ee8f3b695e	474	USBx_INEP(ep->num)->DIEPCTL &= ~ USB_OTG_DIEPCTL_USBAEP;
EricLew	0:80ee8f3b695e	475	}
EricLew	0:80ee8f3b695e	476	else
EricLew	0:80ee8f3b695e	477	{
EricLew	0:80ee8f3b695e	478	USBx_DEVICE->DEACHMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16));
EricLew	0:80ee8f3b695e	479	USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16));
EricLew	0:80ee8f3b695e	480	USBx_OUTEP(ep->num)->DOEPCTL &= ~USB_OTG_DOEPCTL_USBAEP;
EricLew	0:80ee8f3b695e	481	}
EricLew	0:80ee8f3b695e	482	return HAL_OK;
EricLew	0:80ee8f3b695e	483	}
EricLew	0:80ee8f3b695e	484
EricLew	0:80ee8f3b695e	485	/**
EricLew	0:80ee8f3b695e	486	* @brief De-activate and de-initialize a dedicated endpoint
EricLew	0:80ee8f3b695e	487	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	488	* @param ep: pointer to endpoint structure
EricLew	0:80ee8f3b695e	489	* @retval HAL status
EricLew	0:80ee8f3b695e	490	*/
EricLew	0:80ee8f3b695e	491	HAL_StatusTypeDef USB_DeactivateDedicatedEndpoint(USB_OTG_GlobalTypeDef USBx, USB_OTG_EPTypeDef ep)
EricLew	0:80ee8f3b695e	492	{
EricLew	0:80ee8f3b695e	493	/* Read DEPCTLn register */
EricLew	0:80ee8f3b695e	494	if (ep->is_in == 1)
EricLew	0:80ee8f3b695e	495	{
EricLew	0:80ee8f3b695e	496	USBx_INEP(ep->num)->DIEPCTL &= ~ USB_OTG_DIEPCTL_USBAEP;
EricLew	0:80ee8f3b695e	497	USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_IEPM & ((1 << (ep->num))));
EricLew	0:80ee8f3b695e	498	}
EricLew	0:80ee8f3b695e	499	else
EricLew	0:80ee8f3b695e	500	{
EricLew	0:80ee8f3b695e	501	USBx_OUTEP(ep->num)->DOEPCTL &= ~USB_OTG_DOEPCTL_USBAEP;
EricLew	0:80ee8f3b695e	502	USBx_DEVICE->DAINTMSK &= ~(USB_OTG_DAINTMSK_OEPM & ((1 << (ep->num)) << 16));
EricLew	0:80ee8f3b695e	503	}
EricLew	0:80ee8f3b695e	504	return HAL_OK;
EricLew	0:80ee8f3b695e	505	}
EricLew	0:80ee8f3b695e	506
EricLew	0:80ee8f3b695e	507	/**
EricLew	0:80ee8f3b695e	508	* @brief USB_EPStartXfer : setup and starts a transfer over an EP
EricLew	0:80ee8f3b695e	509	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	510	* @param ep: pointer to endpoint structure
EricLew	0:80ee8f3b695e	511	* @param dma: USB dma enabled or disabled
EricLew	0:80ee8f3b695e	512	* This parameter can be one of these values:
EricLew	0:80ee8f3b695e	513	* 0 : DMA feature not used
EricLew	0:80ee8f3b695e	514	* 1 : DMA feature used
EricLew	0:80ee8f3b695e	515	* @retval HAL status
EricLew	0:80ee8f3b695e	516	*/
EricLew	0:80ee8f3b695e	517	HAL_StatusTypeDef USB_EPStartXfer(USB_OTG_GlobalTypeDef USBx , USB_OTG_EPTypeDef ep, uint8_t dma)
EricLew	0:80ee8f3b695e	518	{
EricLew	0:80ee8f3b695e	519	uint16_t pktcnt = 0;
EricLew	0:80ee8f3b695e	520
EricLew	0:80ee8f3b695e	521	/* IN endpoint */
EricLew	0:80ee8f3b695e	522	if (ep->is_in == 1)
EricLew	0:80ee8f3b695e	523	{
EricLew	0:80ee8f3b695e	524	/* Zero Length Packet? */
EricLew	0:80ee8f3b695e	525	if (ep->xfer_len == 0)
EricLew	0:80ee8f3b695e	526	{
EricLew	0:80ee8f3b695e	527	USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT);
EricLew	0:80ee8f3b695e	528	USBx_INEP(ep->num)->DIEPTSIZ \|= (USB_OTG_DIEPTSIZ_PKTCNT & (1 << 19)) ;
EricLew	0:80ee8f3b695e	529	USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ);
EricLew	0:80ee8f3b695e	530	}
EricLew	0:80ee8f3b695e	531	else
EricLew	0:80ee8f3b695e	532	{
EricLew	0:80ee8f3b695e	533	/* Program the transfer size and packet count
EricLew	0:80ee8f3b695e	534	* as follows: xfersize = N * maxpacket +
EricLew	0:80ee8f3b695e	535	* short_packet pktcnt = N + (short_packet
EricLew	0:80ee8f3b695e	536	* exist ? 1 : 0)
EricLew	0:80ee8f3b695e	537	*/
EricLew	0:80ee8f3b695e	538	USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ);
EricLew	0:80ee8f3b695e	539	USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT);
EricLew	0:80ee8f3b695e	540	USBx_INEP(ep->num)->DIEPTSIZ \|= (USB_OTG_DIEPTSIZ_PKTCNT & (((ep->xfer_len + ep->maxpacket -1)/ ep->maxpacket) << 19)) ;
EricLew	0:80ee8f3b695e	541	USBx_INEP(ep->num)->DIEPTSIZ \|= (USB_OTG_DIEPTSIZ_XFRSIZ & ep->xfer_len);
EricLew	0:80ee8f3b695e	542
EricLew	0:80ee8f3b695e	543	if (ep->type == EP_TYPE_ISOC)
EricLew	0:80ee8f3b695e	544	{
EricLew	0:80ee8f3b695e	545	USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_MULCNT);
EricLew	0:80ee8f3b695e	546	USBx_INEP(ep->num)->DIEPTSIZ \|= (USB_OTG_DIEPTSIZ_MULCNT & (1 << 29));
EricLew	0:80ee8f3b695e	547	}
EricLew	0:80ee8f3b695e	548	}
EricLew	0:80ee8f3b695e	549
EricLew	0:80ee8f3b695e	550	if (dma == 1)
EricLew	0:80ee8f3b695e	551	{
EricLew	0:80ee8f3b695e	552	USBx_INEP(ep->num)->DIEPDMA = (uint32_t)(ep->dma_addr);
EricLew	0:80ee8f3b695e	553	}
EricLew	0:80ee8f3b695e	554	else
EricLew	0:80ee8f3b695e	555	{
EricLew	0:80ee8f3b695e	556	if (ep->type != EP_TYPE_ISOC)
EricLew	0:80ee8f3b695e	557	{
EricLew	0:80ee8f3b695e	558	/* Enable the Tx FIFO Empty Interrupt for this EP */
EricLew	0:80ee8f3b695e	559	if (ep->xfer_len > 0)
EricLew	0:80ee8f3b695e	560	{
EricLew	0:80ee8f3b695e	561	USBx_DEVICE->DIEPEMPMSK \|= 1 << ep->num;
EricLew	0:80ee8f3b695e	562	}
EricLew	0:80ee8f3b695e	563	}
EricLew	0:80ee8f3b695e	564	}
EricLew	0:80ee8f3b695e	565
EricLew	0:80ee8f3b695e	566	if (ep->type == EP_TYPE_ISOC)
EricLew	0:80ee8f3b695e	567	{
EricLew	0:80ee8f3b695e	568	if ((USBx_DEVICE->DSTS & ( 1 << 8 )) == 0)
EricLew	0:80ee8f3b695e	569	{
EricLew	0:80ee8f3b695e	570	USBx_INEP(ep->num)->DIEPCTL \|= USB_OTG_DIEPCTL_SODDFRM;
EricLew	0:80ee8f3b695e	571	}
EricLew	0:80ee8f3b695e	572	else
EricLew	0:80ee8f3b695e	573	{
EricLew	0:80ee8f3b695e	574	USBx_INEP(ep->num)->DIEPCTL \|= USB_OTG_DIEPCTL_SD0PID_SEVNFRM;
EricLew	0:80ee8f3b695e	575	}
EricLew	0:80ee8f3b695e	576	}
EricLew	0:80ee8f3b695e	577
EricLew	0:80ee8f3b695e	578	/* EP enable, IN data in FIFO */
EricLew	0:80ee8f3b695e	579	USBx_INEP(ep->num)->DIEPCTL \|= (USB_OTG_DIEPCTL_CNAK \| USB_OTG_DIEPCTL_EPENA);
EricLew	0:80ee8f3b695e	580
EricLew	0:80ee8f3b695e	581	if (ep->type == EP_TYPE_ISOC)
EricLew	0:80ee8f3b695e	582	{
EricLew	0:80ee8f3b695e	583	USB_WritePacket(USBx, ep->xfer_buff, ep->num, ep->xfer_len, dma);
EricLew	0:80ee8f3b695e	584	}
EricLew	0:80ee8f3b695e	585	}
EricLew	0:80ee8f3b695e	586	else /* OUT endpoint */
EricLew	0:80ee8f3b695e	587	{
EricLew	0:80ee8f3b695e	588	/* Program the transfer size and packet count as follows:
EricLew	0:80ee8f3b695e	589	* pktcnt = N
EricLew	0:80ee8f3b695e	590	* xfersize = N * maxpacket
EricLew	0:80ee8f3b695e	591	*/
EricLew	0:80ee8f3b695e	592	USBx_OUTEP(ep->num)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_XFRSIZ);
EricLew	0:80ee8f3b695e	593	USBx_OUTEP(ep->num)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_PKTCNT);
EricLew	0:80ee8f3b695e	594
EricLew	0:80ee8f3b695e	595	if (ep->xfer_len == 0)
EricLew	0:80ee8f3b695e	596	{
EricLew	0:80ee8f3b695e	597	USBx_OUTEP(ep->num)->DOEPTSIZ \|= (USB_OTG_DOEPTSIZ_XFRSIZ & ep->maxpacket);
EricLew	0:80ee8f3b695e	598	USBx_OUTEP(ep->num)->DOEPTSIZ \|= (USB_OTG_DOEPTSIZ_PKTCNT & (1 << 19)) ;
EricLew	0:80ee8f3b695e	599	}
EricLew	0:80ee8f3b695e	600	else
EricLew	0:80ee8f3b695e	601	{
EricLew	0:80ee8f3b695e	602	pktcnt = (ep->xfer_len + ep->maxpacket -1)/ ep->maxpacket;
EricLew	0:80ee8f3b695e	603	USBx_OUTEP(ep->num)->DOEPTSIZ \|= (USB_OTG_DOEPTSIZ_PKTCNT & (pktcnt << 19)); ;
EricLew	0:80ee8f3b695e	604	USBx_OUTEP(ep->num)->DOEPTSIZ \|= (USB_OTG_DOEPTSIZ_XFRSIZ & (ep->maxpacket * pktcnt));
EricLew	0:80ee8f3b695e	605	}
EricLew	0:80ee8f3b695e	606
EricLew	0:80ee8f3b695e	607	if (dma == 1)
EricLew	0:80ee8f3b695e	608	{
EricLew	0:80ee8f3b695e	609	USBx_OUTEP(ep->num)->DOEPDMA = (uint32_t)ep->xfer_buff;
EricLew	0:80ee8f3b695e	610	}
EricLew	0:80ee8f3b695e	611
EricLew	0:80ee8f3b695e	612	if (ep->type == EP_TYPE_ISOC)
EricLew	0:80ee8f3b695e	613	{
EricLew	0:80ee8f3b695e	614	if ((USBx_DEVICE->DSTS & ( 1 << 8 )) == 0)
EricLew	0:80ee8f3b695e	615	{
EricLew	0:80ee8f3b695e	616	USBx_OUTEP(ep->num)->DOEPCTL \|= USB_OTG_DOEPCTL_SODDFRM;
EricLew	0:80ee8f3b695e	617	}
EricLew	0:80ee8f3b695e	618	else
EricLew	0:80ee8f3b695e	619	{
EricLew	0:80ee8f3b695e	620	USBx_OUTEP(ep->num)->DOEPCTL \|= USB_OTG_DOEPCTL_SD0PID_SEVNFRM;
EricLew	0:80ee8f3b695e	621	}
EricLew	0:80ee8f3b695e	622	}
EricLew	0:80ee8f3b695e	623	/* EP enable */
EricLew	0:80ee8f3b695e	624	USBx_OUTEP(ep->num)->DOEPCTL \|= (USB_OTG_DOEPCTL_CNAK \| USB_OTG_DOEPCTL_EPENA);
EricLew	0:80ee8f3b695e	625	}
EricLew	0:80ee8f3b695e	626	return HAL_OK;
EricLew	0:80ee8f3b695e	627	}
EricLew	0:80ee8f3b695e	628
EricLew	0:80ee8f3b695e	629	/**
EricLew	0:80ee8f3b695e	630	* @brief USB_EP0StartXfer : setup and starts a transfer over the EP 0
EricLew	0:80ee8f3b695e	631	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	632	* @param ep: pointer to endpoint structure
EricLew	0:80ee8f3b695e	633	* @param dma: USB dma enabled or disabled
EricLew	0:80ee8f3b695e	634	* This parameter can be one of these values:
EricLew	0:80ee8f3b695e	635	* 0 : DMA feature not used
EricLew	0:80ee8f3b695e	636	* 1 : DMA feature used
EricLew	0:80ee8f3b695e	637	* @retval HAL status
EricLew	0:80ee8f3b695e	638	*/
EricLew	0:80ee8f3b695e	639	HAL_StatusTypeDef USB_EP0StartXfer(USB_OTG_GlobalTypeDef USBx , USB_OTG_EPTypeDef ep, uint8_t dma)
EricLew	0:80ee8f3b695e	640	{
EricLew	0:80ee8f3b695e	641	/* IN endpoint */
EricLew	0:80ee8f3b695e	642	if (ep->is_in == 1)
EricLew	0:80ee8f3b695e	643	{
EricLew	0:80ee8f3b695e	644	/* Zero Length Packet? */
EricLew	0:80ee8f3b695e	645	if (ep->xfer_len == 0)
EricLew	0:80ee8f3b695e	646	{
EricLew	0:80ee8f3b695e	647	USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT);
EricLew	0:80ee8f3b695e	648	USBx_INEP(ep->num)->DIEPTSIZ \|= (USB_OTG_DIEPTSIZ_PKTCNT & (1 << 19)) ;
EricLew	0:80ee8f3b695e	649	USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ);
EricLew	0:80ee8f3b695e	650	}
EricLew	0:80ee8f3b695e	651	else
EricLew	0:80ee8f3b695e	652	{
EricLew	0:80ee8f3b695e	653	/* Program the transfer size and packet count
EricLew	0:80ee8f3b695e	654	* as follows: xfersize = N * maxpacket +
EricLew	0:80ee8f3b695e	655	* short_packet pktcnt = N + (short_packet
EricLew	0:80ee8f3b695e	656	* exist ? 1 : 0)
EricLew	0:80ee8f3b695e	657	*/
EricLew	0:80ee8f3b695e	658	USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_XFRSIZ);
EricLew	0:80ee8f3b695e	659	USBx_INEP(ep->num)->DIEPTSIZ &= ~(USB_OTG_DIEPTSIZ_PKTCNT);
EricLew	0:80ee8f3b695e	660
EricLew	0:80ee8f3b695e	661	if(ep->xfer_len > ep->maxpacket)
EricLew	0:80ee8f3b695e	662	{
EricLew	0:80ee8f3b695e	663	ep->xfer_len = ep->maxpacket;
EricLew	0:80ee8f3b695e	664	}
EricLew	0:80ee8f3b695e	665	USBx_INEP(ep->num)->DIEPTSIZ \|= (USB_OTG_DIEPTSIZ_PKTCNT & (1 << 19)) ;
EricLew	0:80ee8f3b695e	666	USBx_INEP(ep->num)->DIEPTSIZ \|= (USB_OTG_DIEPTSIZ_XFRSIZ & ep->xfer_len);
EricLew	0:80ee8f3b695e	667
EricLew	0:80ee8f3b695e	668	}
EricLew	0:80ee8f3b695e	669
EricLew	0:80ee8f3b695e	670	if (dma == 1)
EricLew	0:80ee8f3b695e	671	{
EricLew	0:80ee8f3b695e	672	USBx_INEP(ep->num)->DIEPDMA = (uint32_t)(ep->dma_addr);
EricLew	0:80ee8f3b695e	673	}
EricLew	0:80ee8f3b695e	674	else
EricLew	0:80ee8f3b695e	675	{
EricLew	0:80ee8f3b695e	676	/* Enable the Tx FIFO Empty Interrupt for this EP */
EricLew	0:80ee8f3b695e	677	if (ep->xfer_len > 0)
EricLew	0:80ee8f3b695e	678	{
EricLew	0:80ee8f3b695e	679	USBx_DEVICE->DIEPEMPMSK \|= 1 << (ep->num);
EricLew	0:80ee8f3b695e	680	}
EricLew	0:80ee8f3b695e	681	}
EricLew	0:80ee8f3b695e	682
EricLew	0:80ee8f3b695e	683	/* EP enable, IN data in FIFO */
EricLew	0:80ee8f3b695e	684	USBx_INEP(ep->num)->DIEPCTL \|= (USB_OTG_DIEPCTL_CNAK \| USB_OTG_DIEPCTL_EPENA);
EricLew	0:80ee8f3b695e	685	}
EricLew	0:80ee8f3b695e	686	else /* OUT endpoint */
EricLew	0:80ee8f3b695e	687	{
EricLew	0:80ee8f3b695e	688	/* Program the transfer size and packet count as follows:
EricLew	0:80ee8f3b695e	689	* pktcnt = N
EricLew	0:80ee8f3b695e	690	* xfersize = N * maxpacket
EricLew	0:80ee8f3b695e	691	*/
EricLew	0:80ee8f3b695e	692	USBx_OUTEP(ep->num)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_XFRSIZ);
EricLew	0:80ee8f3b695e	693	USBx_OUTEP(ep->num)->DOEPTSIZ &= ~(USB_OTG_DOEPTSIZ_PKTCNT);
EricLew	0:80ee8f3b695e	694
EricLew	0:80ee8f3b695e	695	if (ep->xfer_len > 0)
EricLew	0:80ee8f3b695e	696	{
EricLew	0:80ee8f3b695e	697	ep->xfer_len = ep->maxpacket;
EricLew	0:80ee8f3b695e	698	}
EricLew	0:80ee8f3b695e	699
EricLew	0:80ee8f3b695e	700	USBx_OUTEP(ep->num)->DOEPTSIZ \|= (USB_OTG_DOEPTSIZ_PKTCNT & (1 << 19));
EricLew	0:80ee8f3b695e	701	USBx_OUTEP(ep->num)->DOEPTSIZ \|= (USB_OTG_DOEPTSIZ_XFRSIZ & (ep->maxpacket));
EricLew	0:80ee8f3b695e	702
EricLew	0:80ee8f3b695e	703
EricLew	0:80ee8f3b695e	704	if (dma == 1)
EricLew	0:80ee8f3b695e	705	{
EricLew	0:80ee8f3b695e	706	USBx_OUTEP(ep->num)->DOEPDMA = (uint32_t)(ep->xfer_buff);
EricLew	0:80ee8f3b695e	707	}
EricLew	0:80ee8f3b695e	708
EricLew	0:80ee8f3b695e	709	/* EP enable */
EricLew	0:80ee8f3b695e	710	USBx_OUTEP(ep->num)->DOEPCTL \|= (USB_OTG_DOEPCTL_CNAK \| USB_OTG_DOEPCTL_EPENA);
EricLew	0:80ee8f3b695e	711	}
EricLew	0:80ee8f3b695e	712	return HAL_OK;
EricLew	0:80ee8f3b695e	713	}
EricLew	0:80ee8f3b695e	714
EricLew	0:80ee8f3b695e	715	/**
EricLew	0:80ee8f3b695e	716	* @brief USB_WritePacket : Writes a packet into the Tx FIFO associated
EricLew	0:80ee8f3b695e	717	* with the EP/channel
EricLew	0:80ee8f3b695e	718	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	719	* @param src: pointer to source buffer
EricLew	0:80ee8f3b695e	720	* @param ch_ep_num: endpoint or host channel number
EricLew	0:80ee8f3b695e	721	* @param len: Number of bytes to write
EricLew	0:80ee8f3b695e	722	* @param dma: USB dma enabled or disabled
EricLew	0:80ee8f3b695e	723	* This parameter can be one of these values:
EricLew	0:80ee8f3b695e	724	* 0 : DMA feature not used
EricLew	0:80ee8f3b695e	725	* 1 : DMA feature used
EricLew	0:80ee8f3b695e	726	* @retval HAL status
EricLew	0:80ee8f3b695e	727	*/
EricLew	0:80ee8f3b695e	728	HAL_StatusTypeDef USB_WritePacket(USB_OTG_GlobalTypeDef USBx, uint8_t src, uint8_t ch_ep_num, uint16_t len, uint8_t dma)
EricLew	0:80ee8f3b695e	729	{
EricLew	0:80ee8f3b695e	730	uint32_t count32b= 0 , i= 0;
EricLew	0:80ee8f3b695e	731
EricLew	0:80ee8f3b695e	732	if (dma == 0)
EricLew	0:80ee8f3b695e	733	{
EricLew	0:80ee8f3b695e	734	count32b = (len + 3) / 4;
EricLew	0:80ee8f3b695e	735	for (i = 0; i < count32b; i++, src += 4)
EricLew	0:80ee8f3b695e	736	{
EricLew	0:80ee8f3b695e	737	USBx_DFIFO(ch_ep_num) = ((__packed uint32_t )src);
EricLew	0:80ee8f3b695e	738	}
EricLew	0:80ee8f3b695e	739	}
EricLew	0:80ee8f3b695e	740	return HAL_OK;
EricLew	0:80ee8f3b695e	741	}
EricLew	0:80ee8f3b695e	742
EricLew	0:80ee8f3b695e	743	/**
EricLew	0:80ee8f3b695e	744	* @brief USB_ReadPacket : read a packet from the Tx FIFO associated
EricLew	0:80ee8f3b695e	745	* with the EP/channel
EricLew	0:80ee8f3b695e	746	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	747	* @param src: source pointer
EricLew	0:80ee8f3b695e	748	* @param ch_ep_num: endpoint or host channel number
EricLew	0:80ee8f3b695e	749	* @param len: Number of bytes to read
EricLew	0:80ee8f3b695e	750	* @param dma: USB dma enabled or disabled
EricLew	0:80ee8f3b695e	751	* This parameter can be one of these values:
EricLew	0:80ee8f3b695e	752	* 0 : DMA feature not used
EricLew	0:80ee8f3b695e	753	* 1 : DMA feature used
EricLew	0:80ee8f3b695e	754	* @retval pointer to destination buffer
EricLew	0:80ee8f3b695e	755	*/
EricLew	0:80ee8f3b695e	756	void USB_ReadPacket(USB_OTG_GlobalTypeDef USBx, uint8_t *dest, uint16_t len)
EricLew	0:80ee8f3b695e	757	{
EricLew	0:80ee8f3b695e	758	uint32_t i=0;
EricLew	0:80ee8f3b695e	759	uint32_t count32b = (len + 3) / 4;
EricLew	0:80ee8f3b695e	760
EricLew	0:80ee8f3b695e	761	for ( i = 0; i < count32b; i++, dest += 4 )
EricLew	0:80ee8f3b695e	762	{
EricLew	0:80ee8f3b695e	763	(__packed uint32_t )dest = USBx_DFIFO(0);
EricLew	0:80ee8f3b695e	764
EricLew	0:80ee8f3b695e	765	}
EricLew	0:80ee8f3b695e	766	return ((void *)dest);
EricLew	0:80ee8f3b695e	767	}
EricLew	0:80ee8f3b695e	768
EricLew	0:80ee8f3b695e	769	/**
EricLew	0:80ee8f3b695e	770	* @brief USB_EPSetStall : set a stall condition over an EP
EricLew	0:80ee8f3b695e	771	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	772	* @param ep: pointer to endpoint structure
EricLew	0:80ee8f3b695e	773	* @retval HAL status
EricLew	0:80ee8f3b695e	774	*/
EricLew	0:80ee8f3b695e	775	HAL_StatusTypeDef USB_EPSetStall(USB_OTG_GlobalTypeDef USBx , USB_OTG_EPTypeDef ep)
EricLew	0:80ee8f3b695e	776	{
EricLew	0:80ee8f3b695e	777	if (ep->is_in == 1)
EricLew	0:80ee8f3b695e	778	{
EricLew	0:80ee8f3b695e	779	if (((USBx_INEP(ep->num)->DIEPCTL) & USB_OTG_DIEPCTL_EPENA) == 0)
EricLew	0:80ee8f3b695e	780	{
EricLew	0:80ee8f3b695e	781	USBx_INEP(ep->num)->DIEPCTL &= ~(USB_OTG_DIEPCTL_EPDIS);
EricLew	0:80ee8f3b695e	782	}
EricLew	0:80ee8f3b695e	783	USBx_INEP(ep->num)->DIEPCTL \|= USB_OTG_DIEPCTL_STALL;
EricLew	0:80ee8f3b695e	784	}
EricLew	0:80ee8f3b695e	785	else
EricLew	0:80ee8f3b695e	786	{
EricLew	0:80ee8f3b695e	787	if (((USBx_OUTEP(ep->num)->DOEPCTL) & USB_OTG_DOEPCTL_EPENA) == 0)
EricLew	0:80ee8f3b695e	788	{
EricLew	0:80ee8f3b695e	789	USBx_OUTEP(ep->num)->DOEPCTL &= ~(USB_OTG_DOEPCTL_EPDIS);
EricLew	0:80ee8f3b695e	790	}
EricLew	0:80ee8f3b695e	791	USBx_OUTEP(ep->num)->DOEPCTL \|= USB_OTG_DOEPCTL_STALL;
EricLew	0:80ee8f3b695e	792	}
EricLew	0:80ee8f3b695e	793	return HAL_OK;
EricLew	0:80ee8f3b695e	794	}
EricLew	0:80ee8f3b695e	795
EricLew	0:80ee8f3b695e	796
EricLew	0:80ee8f3b695e	797	/**
EricLew	0:80ee8f3b695e	798	* @brief USB_EPClearStall : Clear a stall condition over an EP
EricLew	0:80ee8f3b695e	799	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	800	* @param ep: pointer to endpoint structure
EricLew	0:80ee8f3b695e	801	* @retval HAL status
EricLew	0:80ee8f3b695e	802	*/
EricLew	0:80ee8f3b695e	803	HAL_StatusTypeDef USB_EPClearStall(USB_OTG_GlobalTypeDef USBx, USB_OTG_EPTypeDef ep)
EricLew	0:80ee8f3b695e	804	{
EricLew	0:80ee8f3b695e	805	if (ep->is_in == 1)
EricLew	0:80ee8f3b695e	806	{
EricLew	0:80ee8f3b695e	807	USBx_INEP(ep->num)->DIEPCTL &= ~USB_OTG_DIEPCTL_STALL;
EricLew	0:80ee8f3b695e	808	if (ep->type == EP_TYPE_INTR \|\| ep->type == EP_TYPE_BULK)
EricLew	0:80ee8f3b695e	809	{
EricLew	0:80ee8f3b695e	810	USBx_INEP(ep->num)->DIEPCTL \|= USB_OTG_DIEPCTL_SD0PID_SEVNFRM; /* DATA0 */
EricLew	0:80ee8f3b695e	811	}
EricLew	0:80ee8f3b695e	812	}
EricLew	0:80ee8f3b695e	813	else
EricLew	0:80ee8f3b695e	814	{
EricLew	0:80ee8f3b695e	815	USBx_OUTEP(ep->num)->DOEPCTL &= ~USB_OTG_DOEPCTL_STALL;
EricLew	0:80ee8f3b695e	816	if (ep->type == EP_TYPE_INTR \|\| ep->type == EP_TYPE_BULK)
EricLew	0:80ee8f3b695e	817	{
EricLew	0:80ee8f3b695e	818	USBx_OUTEP(ep->num)->DOEPCTL \|= USB_OTG_DOEPCTL_SD0PID_SEVNFRM; /* DATA0 */
EricLew	0:80ee8f3b695e	819	}
EricLew	0:80ee8f3b695e	820	}
EricLew	0:80ee8f3b695e	821	return HAL_OK;
EricLew	0:80ee8f3b695e	822	}
EricLew	0:80ee8f3b695e	823
EricLew	0:80ee8f3b695e	824	/**
EricLew	0:80ee8f3b695e	825	* @brief USB_StopDevice : Stop the USB device mode
EricLew	0:80ee8f3b695e	826	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	827	* @retval HAL status
EricLew	0:80ee8f3b695e	828	*/
EricLew	0:80ee8f3b695e	829	HAL_StatusTypeDef USB_StopDevice(USB_OTG_GlobalTypeDef *USBx)
EricLew	0:80ee8f3b695e	830	{
EricLew	0:80ee8f3b695e	831	uint32_t i;
EricLew	0:80ee8f3b695e	832
EricLew	0:80ee8f3b695e	833	/* Clear Pending interrupt */
EricLew	0:80ee8f3b695e	834	for (i = 0; i < 15 ; i++)
EricLew	0:80ee8f3b695e	835	{
EricLew	0:80ee8f3b695e	836	USBx_INEP(i)->DIEPINT = 0xFF;
EricLew	0:80ee8f3b695e	837	USBx_OUTEP(i)->DOEPINT = 0xFF;
EricLew	0:80ee8f3b695e	838	}
EricLew	0:80ee8f3b695e	839	USBx_DEVICE->DAINT = 0xFFFFFFFF;
EricLew	0:80ee8f3b695e	840
EricLew	0:80ee8f3b695e	841	/* Clear interrupt masks */
EricLew	0:80ee8f3b695e	842	USBx_DEVICE->DIEPMSK = 0;
EricLew	0:80ee8f3b695e	843	USBx_DEVICE->DOEPMSK = 0;
EricLew	0:80ee8f3b695e	844	USBx_DEVICE->DAINTMSK = 0;
EricLew	0:80ee8f3b695e	845
EricLew	0:80ee8f3b695e	846	/* Flush the FIFO */
EricLew	0:80ee8f3b695e	847	USB_FlushRxFifo(USBx);
EricLew	0:80ee8f3b695e	848	USB_FlushTxFifo(USBx , 0x10 );
EricLew	0:80ee8f3b695e	849
EricLew	0:80ee8f3b695e	850	return HAL_OK;
EricLew	0:80ee8f3b695e	851	}
EricLew	0:80ee8f3b695e	852
EricLew	0:80ee8f3b695e	853	/**
EricLew	0:80ee8f3b695e	854	* @brief USB_SetDevAddress : Stop the USB device mode
EricLew	0:80ee8f3b695e	855	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	856	* @param address: new device address to be assigned
EricLew	0:80ee8f3b695e	857	* This parameter can be a value from 0 to 255
EricLew	0:80ee8f3b695e	858	* @retval HAL status
EricLew	0:80ee8f3b695e	859	*/
EricLew	0:80ee8f3b695e	860	HAL_StatusTypeDef USB_SetDevAddress (USB_OTG_GlobalTypeDef *USBx, uint8_t address)
EricLew	0:80ee8f3b695e	861	{
EricLew	0:80ee8f3b695e	862	USBx_DEVICE->DCFG &= ~ (USB_OTG_DCFG_DAD);
EricLew	0:80ee8f3b695e	863	USBx_DEVICE->DCFG \|= (address << 4) & USB_OTG_DCFG_DAD ;
EricLew	0:80ee8f3b695e	864
EricLew	0:80ee8f3b695e	865	return HAL_OK;
EricLew	0:80ee8f3b695e	866	}
EricLew	0:80ee8f3b695e	867
EricLew	0:80ee8f3b695e	868	/**
EricLew	0:80ee8f3b695e	869	* @brief USB_DevConnect : Connect the USB device by enabling the pull-up/pull-down
EricLew	0:80ee8f3b695e	870	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	871	* @retval HAL status
EricLew	0:80ee8f3b695e	872	*/
EricLew	0:80ee8f3b695e	873	HAL_StatusTypeDef USB_DevConnect (USB_OTG_GlobalTypeDef *USBx)
EricLew	0:80ee8f3b695e	874	{
EricLew	0:80ee8f3b695e	875	USBx_DEVICE->DCTL &= ~USB_OTG_DCTL_SDIS ;
EricLew	0:80ee8f3b695e	876	HAL_Delay(3);
EricLew	0:80ee8f3b695e	877
EricLew	0:80ee8f3b695e	878	return HAL_OK;
EricLew	0:80ee8f3b695e	879	}
EricLew	0:80ee8f3b695e	880
EricLew	0:80ee8f3b695e	881	/**
EricLew	0:80ee8f3b695e	882	* @brief USB_DevDisconnect : Disconnect the USB device by disabling the pull-up/pull-down
EricLew	0:80ee8f3b695e	883	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	884	* @retval HAL status
EricLew	0:80ee8f3b695e	885	*/
EricLew	0:80ee8f3b695e	886	HAL_StatusTypeDef USB_DevDisconnect (USB_OTG_GlobalTypeDef *USBx)
EricLew	0:80ee8f3b695e	887	{
EricLew	0:80ee8f3b695e	888	USBx_DEVICE->DCTL \|= USB_OTG_DCTL_SDIS ;
EricLew	0:80ee8f3b695e	889	HAL_Delay(3);
EricLew	0:80ee8f3b695e	890
EricLew	0:80ee8f3b695e	891	return HAL_OK;
EricLew	0:80ee8f3b695e	892	}
EricLew	0:80ee8f3b695e	893
EricLew	0:80ee8f3b695e	894	/**
EricLew	0:80ee8f3b695e	895	* @brief USB_ReadInterrupts: return the global USB interrupt status
EricLew	0:80ee8f3b695e	896	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	897	* @retval HAL status
EricLew	0:80ee8f3b695e	898	*/
EricLew	0:80ee8f3b695e	899	uint32_t USB_ReadInterrupts (USB_OTG_GlobalTypeDef *USBx)
EricLew	0:80ee8f3b695e	900	{
EricLew	0:80ee8f3b695e	901	uint32_t v = 0;
EricLew	0:80ee8f3b695e	902
EricLew	0:80ee8f3b695e	903	v = USBx->GINTSTS;
EricLew	0:80ee8f3b695e	904	v &= USBx->GINTMSK;
EricLew	0:80ee8f3b695e	905	return v;
EricLew	0:80ee8f3b695e	906	}
EricLew	0:80ee8f3b695e	907
EricLew	0:80ee8f3b695e	908	/**
EricLew	0:80ee8f3b695e	909	* @brief USB_ReadDevAllOutEpInterrupt: return the USB device OUT endpoints interrupt status
EricLew	0:80ee8f3b695e	910	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	911	* @retval HAL status
EricLew	0:80ee8f3b695e	912	*/
EricLew	0:80ee8f3b695e	913	uint32_t USB_ReadDevAllOutEpInterrupt (USB_OTG_GlobalTypeDef *USBx)
EricLew	0:80ee8f3b695e	914	{
EricLew	0:80ee8f3b695e	915	uint32_t v;
EricLew	0:80ee8f3b695e	916	v = USBx_DEVICE->DAINT;
EricLew	0:80ee8f3b695e	917	v &= USBx_DEVICE->DAINTMSK;
EricLew	0:80ee8f3b695e	918	return ((v & 0xffff0000) >> 16);
EricLew	0:80ee8f3b695e	919	}
EricLew	0:80ee8f3b695e	920
EricLew	0:80ee8f3b695e	921	/**
EricLew	0:80ee8f3b695e	922	* @brief USB_ReadDevAllInEpInterrupt: return the USB device IN endpoints interrupt status
EricLew	0:80ee8f3b695e	923	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	924	* @retval HAL status
EricLew	0:80ee8f3b695e	925	*/
EricLew	0:80ee8f3b695e	926	uint32_t USB_ReadDevAllInEpInterrupt (USB_OTG_GlobalTypeDef *USBx)
EricLew	0:80ee8f3b695e	927	{
EricLew	0:80ee8f3b695e	928	uint32_t v;
EricLew	0:80ee8f3b695e	929	v = USBx_DEVICE->DAINT;
EricLew	0:80ee8f3b695e	930	v &= USBx_DEVICE->DAINTMSK;
EricLew	0:80ee8f3b695e	931	return ((v & 0xFFFF));
EricLew	0:80ee8f3b695e	932	}
EricLew	0:80ee8f3b695e	933
EricLew	0:80ee8f3b695e	934	/**
EricLew	0:80ee8f3b695e	935	* @brief Returns Device OUT EP Interrupt register
EricLew	0:80ee8f3b695e	936	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	937	* @param epnum: endpoint number
EricLew	0:80ee8f3b695e	938	* This parameter can be a value from 0 to 15
EricLew	0:80ee8f3b695e	939	* @retval Device OUT EP Interrupt register
EricLew	0:80ee8f3b695e	940	*/
EricLew	0:80ee8f3b695e	941	uint32_t USB_ReadDevOutEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum)
EricLew	0:80ee8f3b695e	942	{
EricLew	0:80ee8f3b695e	943	uint32_t v;
EricLew	0:80ee8f3b695e	944	v = USBx_OUTEP(epnum)->DOEPINT;
EricLew	0:80ee8f3b695e	945	v &= USBx_DEVICE->DOEPMSK;
EricLew	0:80ee8f3b695e	946	return v;
EricLew	0:80ee8f3b695e	947	}
EricLew	0:80ee8f3b695e	948
EricLew	0:80ee8f3b695e	949	/**
EricLew	0:80ee8f3b695e	950	* @brief Returns Device IN EP Interrupt register
EricLew	0:80ee8f3b695e	951	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	952	* @param epnum: endpoint number
EricLew	0:80ee8f3b695e	953	* This parameter can be a value from 0 to 15
EricLew	0:80ee8f3b695e	954	* @retval Device IN EP Interrupt register
EricLew	0:80ee8f3b695e	955	*/
EricLew	0:80ee8f3b695e	956	uint32_t USB_ReadDevInEPInterrupt (USB_OTG_GlobalTypeDef *USBx , uint8_t epnum)
EricLew	0:80ee8f3b695e	957	{
EricLew	0:80ee8f3b695e	958	uint32_t v, msk, emp;
EricLew	0:80ee8f3b695e	959
EricLew	0:80ee8f3b695e	960	msk = USBx_DEVICE->DIEPMSK;
EricLew	0:80ee8f3b695e	961	emp = USBx_DEVICE->DIEPEMPMSK;
EricLew	0:80ee8f3b695e	962	msk \|= ((emp >> epnum) & 0x1) << 7;
EricLew	0:80ee8f3b695e	963	v = USBx_INEP(epnum)->DIEPINT & msk;
EricLew	0:80ee8f3b695e	964	return v;
EricLew	0:80ee8f3b695e	965	}
EricLew	0:80ee8f3b695e	966
EricLew	0:80ee8f3b695e	967	/**
EricLew	0:80ee8f3b695e	968	* @brief USB_ClearInterrupts: clear a USB interrupt
EricLew	0:80ee8f3b695e	969	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	970	* @param interrupt: interrupt flag
EricLew	0:80ee8f3b695e	971	* @retval None
EricLew	0:80ee8f3b695e	972	*/
EricLew	0:80ee8f3b695e	973	void USB_ClearInterrupts (USB_OTG_GlobalTypeDef *USBx, uint32_t interrupt)
EricLew	0:80ee8f3b695e	974	{
EricLew	0:80ee8f3b695e	975	USBx->GINTSTS \|= interrupt;
EricLew	0:80ee8f3b695e	976	}
EricLew	0:80ee8f3b695e	977
EricLew	0:80ee8f3b695e	978	/**
EricLew	0:80ee8f3b695e	979	* @brief Returns USB core mode
EricLew	0:80ee8f3b695e	980	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	981	* @retval return core mode : Host or Device
EricLew	0:80ee8f3b695e	982	* This parameter can be one of these values:
EricLew	0:80ee8f3b695e	983	* 0 : Host
EricLew	0:80ee8f3b695e	984	* 1 : Device
EricLew	0:80ee8f3b695e	985	*/
EricLew	0:80ee8f3b695e	986	uint32_t USB_GetMode(USB_OTG_GlobalTypeDef *USBx)
EricLew	0:80ee8f3b695e	987	{
EricLew	0:80ee8f3b695e	988	return ((USBx->GINTSTS ) & 0x1);
EricLew	0:80ee8f3b695e	989	}
EricLew	0:80ee8f3b695e	990
EricLew	0:80ee8f3b695e	991
EricLew	0:80ee8f3b695e	992	/**
EricLew	0:80ee8f3b695e	993	* @brief Activate EP0 for Setup transactions
EricLew	0:80ee8f3b695e	994	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	995	* @retval HAL status
EricLew	0:80ee8f3b695e	996	*/
EricLew	0:80ee8f3b695e	997	HAL_StatusTypeDef USB_ActivateSetup (USB_OTG_GlobalTypeDef *USBx)
EricLew	0:80ee8f3b695e	998	{
EricLew	0:80ee8f3b695e	999	/* Set the MPS of the IN EP based on the enumeration speed */
EricLew	0:80ee8f3b695e	1000	USBx_INEP(0)->DIEPCTL &= ~USB_OTG_DIEPCTL_MPSIZ;
EricLew	0:80ee8f3b695e	1001
EricLew	0:80ee8f3b695e	1002	if((USBx_DEVICE->DSTS & USB_OTG_DSTS_ENUMSPD) == DSTS_ENUMSPD_LS_PHY_6MHZ)
EricLew	0:80ee8f3b695e	1003	{
EricLew	0:80ee8f3b695e	1004	USBx_INEP(0)->DIEPCTL \|= 3;
EricLew	0:80ee8f3b695e	1005	}
EricLew	0:80ee8f3b695e	1006	USBx_DEVICE->DCTL \|= USB_OTG_DCTL_CGINAK;
EricLew	0:80ee8f3b695e	1007
EricLew	0:80ee8f3b695e	1008	return HAL_OK;
EricLew	0:80ee8f3b695e	1009	}
EricLew	0:80ee8f3b695e	1010
EricLew	0:80ee8f3b695e	1011
EricLew	0:80ee8f3b695e	1012	/**
EricLew	0:80ee8f3b695e	1013	* @brief Prepare the EP0 to start the first control setup
EricLew	0:80ee8f3b695e	1014	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	1015	* @param dma: USB dma enabled or disabled
EricLew	0:80ee8f3b695e	1016	* This parameter can be one of these values:
EricLew	0:80ee8f3b695e	1017	* 0 : DMA feature not used
EricLew	0:80ee8f3b695e	1018	* 1 : DMA feature used
EricLew	0:80ee8f3b695e	1019	* @param psetup: pointer to setup packet
EricLew	0:80ee8f3b695e	1020	* @retval HAL status
EricLew	0:80ee8f3b695e	1021	*/
EricLew	0:80ee8f3b695e	1022	HAL_StatusTypeDef USB_EP0_OutStart(USB_OTG_GlobalTypeDef USBx, uint8_t dma, uint8_t psetup)
EricLew	0:80ee8f3b695e	1023	{
EricLew	0:80ee8f3b695e	1024	USBx_OUTEP(0)->DOEPTSIZ = 0;
EricLew	0:80ee8f3b695e	1025	USBx_OUTEP(0)->DOEPTSIZ \|= (USB_OTG_DOEPTSIZ_PKTCNT & (1 << 19)) ;
EricLew	0:80ee8f3b695e	1026	USBx_OUTEP(0)->DOEPTSIZ \|= (3 * 8);
EricLew	0:80ee8f3b695e	1027	USBx_OUTEP(0)->DOEPTSIZ \|= USB_OTG_DOEPTSIZ_STUPCNT;
EricLew	0:80ee8f3b695e	1028
EricLew	0:80ee8f3b695e	1029	if (dma == 1)
EricLew	0:80ee8f3b695e	1030	{
EricLew	0:80ee8f3b695e	1031	USBx_OUTEP(0)->DOEPDMA = (uint32_t)psetup;
EricLew	0:80ee8f3b695e	1032	/* EP enable */
EricLew	0:80ee8f3b695e	1033	USBx_OUTEP(0)->DOEPCTL = 0x80008000;
EricLew	0:80ee8f3b695e	1034	}
EricLew	0:80ee8f3b695e	1035
EricLew	0:80ee8f3b695e	1036	return HAL_OK;
EricLew	0:80ee8f3b695e	1037	}
EricLew	0:80ee8f3b695e	1038
EricLew	0:80ee8f3b695e	1039
EricLew	0:80ee8f3b695e	1040	/**
EricLew	0:80ee8f3b695e	1041	* @brief Reset the USB Core (needed after USB clock settings change)
EricLew	0:80ee8f3b695e	1042	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	1043	* @retval HAL status
EricLew	0:80ee8f3b695e	1044	*/
EricLew	0:80ee8f3b695e	1045	static HAL_StatusTypeDef USB_CoreReset(USB_OTG_GlobalTypeDef *USBx)
EricLew	0:80ee8f3b695e	1046	{
EricLew	0:80ee8f3b695e	1047	uint32_t count = 0;
EricLew	0:80ee8f3b695e	1048
EricLew	0:80ee8f3b695e	1049	/* Wait for AHB master IDLE state. */
EricLew	0:80ee8f3b695e	1050	do
EricLew	0:80ee8f3b695e	1051	{
EricLew	0:80ee8f3b695e	1052	if (++count > 200000)
EricLew	0:80ee8f3b695e	1053	{
EricLew	0:80ee8f3b695e	1054	return HAL_TIMEOUT;
EricLew	0:80ee8f3b695e	1055	}
EricLew	0:80ee8f3b695e	1056	}
EricLew	0:80ee8f3b695e	1057	while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_AHBIDL) == 0);
EricLew	0:80ee8f3b695e	1058
EricLew	0:80ee8f3b695e	1059	/* Core Soft Reset */
EricLew	0:80ee8f3b695e	1060	count = 0;
EricLew	0:80ee8f3b695e	1061	USBx->GRSTCTL \|= USB_OTG_GRSTCTL_CSRST;
EricLew	0:80ee8f3b695e	1062
EricLew	0:80ee8f3b695e	1063	do
EricLew	0:80ee8f3b695e	1064	{
EricLew	0:80ee8f3b695e	1065	if (++count > 200000)
EricLew	0:80ee8f3b695e	1066	{
EricLew	0:80ee8f3b695e	1067	return HAL_TIMEOUT;
EricLew	0:80ee8f3b695e	1068	}
EricLew	0:80ee8f3b695e	1069	}
EricLew	0:80ee8f3b695e	1070	while ((USBx->GRSTCTL & USB_OTG_GRSTCTL_CSRST) == USB_OTG_GRSTCTL_CSRST);
EricLew	0:80ee8f3b695e	1071
EricLew	0:80ee8f3b695e	1072	return HAL_OK;
EricLew	0:80ee8f3b695e	1073	}
EricLew	0:80ee8f3b695e	1074
EricLew	0:80ee8f3b695e	1075
EricLew	0:80ee8f3b695e	1076	/**
EricLew	0:80ee8f3b695e	1077	* @brief USB_HostInit : Initializes the USB OTG controller registers
EricLew	0:80ee8f3b695e	1078	* for Host mode
EricLew	0:80ee8f3b695e	1079	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	1080	* @param cfg: pointer to a USB_OTG_CfgTypeDef structure that contains
EricLew	0:80ee8f3b695e	1081	* the configuration information for the specified USBx peripheral.
EricLew	0:80ee8f3b695e	1082	* @retval HAL status
EricLew	0:80ee8f3b695e	1083	*/
EricLew	0:80ee8f3b695e	1084	HAL_StatusTypeDef USB_HostInit (USB_OTG_GlobalTypeDef *USBx, USB_OTG_CfgTypeDef cfg)
EricLew	0:80ee8f3b695e	1085	{
EricLew	0:80ee8f3b695e	1086	uint32_t i;
EricLew	0:80ee8f3b695e	1087
EricLew	0:80ee8f3b695e	1088	/* Restart the Phy Clock */
EricLew	0:80ee8f3b695e	1089	USBx_PCGCCTL = 0;
EricLew	0:80ee8f3b695e	1090
EricLew	0:80ee8f3b695e	1091	/Activate VBUS Sensing B /
EricLew	0:80ee8f3b695e	1092	USBx->GCCFG \|= USB_OTG_GCCFG_VBDEN;
EricLew	0:80ee8f3b695e	1093
EricLew	0:80ee8f3b695e	1094	/* Disable the FS/LS support mode only */
EricLew	0:80ee8f3b695e	1095	if((cfg.speed == USB_OTG_SPEED_FULL)&&
EricLew	0:80ee8f3b695e	1096	(USBx != USB_OTG_FS))
EricLew	0:80ee8f3b695e	1097	{
EricLew	0:80ee8f3b695e	1098	USBx_HOST->HCFG \|= USB_OTG_HCFG_FSLSS;
EricLew	0:80ee8f3b695e	1099	}
EricLew	0:80ee8f3b695e	1100	else
EricLew	0:80ee8f3b695e	1101	{
EricLew	0:80ee8f3b695e	1102	USBx_HOST->HCFG &= ~(USB_OTG_HCFG_FSLSS);
EricLew	0:80ee8f3b695e	1103	}
EricLew	0:80ee8f3b695e	1104
EricLew	0:80ee8f3b695e	1105	/* Make sure the FIFOs are flushed. */
EricLew	0:80ee8f3b695e	1106	USB_FlushTxFifo(USBx, 0x10 ); /* all Tx FIFOs */
EricLew	0:80ee8f3b695e	1107	USB_FlushRxFifo(USBx);
EricLew	0:80ee8f3b695e	1108
EricLew	0:80ee8f3b695e	1109	/* Clear all pending HC Interrupts */
EricLew	0:80ee8f3b695e	1110	for (i = 0; i < cfg.Host_channels; i++)
EricLew	0:80ee8f3b695e	1111	{
EricLew	0:80ee8f3b695e	1112	USBx_HC(i)->HCINT = 0xFFFFFFFF;
EricLew	0:80ee8f3b695e	1113	USBx_HC(i)->HCINTMSK = 0;
EricLew	0:80ee8f3b695e	1114	}
EricLew	0:80ee8f3b695e	1115
EricLew	0:80ee8f3b695e	1116	/* Enable VBUS driving */
EricLew	0:80ee8f3b695e	1117	USB_DriveVbus(USBx, 1);
EricLew	0:80ee8f3b695e	1118
EricLew	0:80ee8f3b695e	1119	HAL_Delay(200);
EricLew	0:80ee8f3b695e	1120
EricLew	0:80ee8f3b695e	1121	/* Disable all interrupts. */
EricLew	0:80ee8f3b695e	1122	USBx->GINTMSK = 0;
EricLew	0:80ee8f3b695e	1123
EricLew	0:80ee8f3b695e	1124	/* Clear any pending interrupts */
EricLew	0:80ee8f3b695e	1125	USBx->GINTSTS = 0xFFFFFFFF;
EricLew	0:80ee8f3b695e	1126
EricLew	0:80ee8f3b695e	1127	/* set Rx FIFO size */
EricLew	0:80ee8f3b695e	1128	USBx->GRXFSIZ = (uint32_t )0x80;
EricLew	0:80ee8f3b695e	1129	USBx->DIEPTXF0_HNPTXFSIZ = (uint32_t )(((0x60 << 16)& USB_OTG_NPTXFD) \| 0x80);
EricLew	0:80ee8f3b695e	1130	USBx->HPTXFSIZ = (uint32_t )(((0x40 << 16)& USB_OTG_HPTXFSIZ_PTXFD) \| 0xE0);
EricLew	0:80ee8f3b695e	1131
EricLew	0:80ee8f3b695e	1132	/* Enable the common interrupts */
EricLew	0:80ee8f3b695e	1133	if (cfg.dma_enable == DISABLE)
EricLew	0:80ee8f3b695e	1134	{
EricLew	0:80ee8f3b695e	1135	USBx->GINTMSK \|= USB_OTG_GINTMSK_RXFLVLM;
EricLew	0:80ee8f3b695e	1136	}
EricLew	0:80ee8f3b695e	1137
EricLew	0:80ee8f3b695e	1138	/* Enable interrupts matching to the Host mode ONLY */
EricLew	0:80ee8f3b695e	1139	USBx->GINTMSK \|= (USB_OTG_GINTMSK_PRTIM \| USB_OTG_GINTMSK_HCIM \|\
EricLew	0:80ee8f3b695e	1140	USB_OTG_GINTMSK_SOFM \|USB_OTG_GINTSTS_DISCINT\|\
EricLew	0:80ee8f3b695e	1141	USB_OTG_GINTMSK_PXFRM_IISOOXFRM \| USB_OTG_GINTMSK_WUIM);
EricLew	0:80ee8f3b695e	1142
EricLew	0:80ee8f3b695e	1143	return HAL_OK;
EricLew	0:80ee8f3b695e	1144	}
EricLew	0:80ee8f3b695e	1145
EricLew	0:80ee8f3b695e	1146	/**
EricLew	0:80ee8f3b695e	1147	* @brief USB_InitFSLSPClkSel : Initializes the FSLSPClkSel field of the
EricLew	0:80ee8f3b695e	1148	* HCFG register on the PHY type and set the right frame interval
EricLew	0:80ee8f3b695e	1149	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	1150	* @param freq: clock frequency
EricLew	0:80ee8f3b695e	1151	* This parameter can be one of these values:
EricLew	0:80ee8f3b695e	1152	* HCFG_48_MHZ : Full Speed 48 MHz Clock
EricLew	0:80ee8f3b695e	1153	* HCFG_6_MHZ : Low Speed 6 MHz Clock
EricLew	0:80ee8f3b695e	1154	* @retval HAL status
EricLew	0:80ee8f3b695e	1155	*/
EricLew	0:80ee8f3b695e	1156	HAL_StatusTypeDef USB_InitFSLSPClkSel(USB_OTG_GlobalTypeDef *USBx , uint8_t freq)
EricLew	0:80ee8f3b695e	1157	{
EricLew	0:80ee8f3b695e	1158	USBx_HOST->HCFG &= ~(USB_OTG_HCFG_FSLSPCS);
EricLew	0:80ee8f3b695e	1159	USBx_HOST->HCFG \|= (freq & USB_OTG_HCFG_FSLSPCS);
EricLew	0:80ee8f3b695e	1160
EricLew	0:80ee8f3b695e	1161	if (freq == HCFG_48_MHZ)
EricLew	0:80ee8f3b695e	1162	{
EricLew	0:80ee8f3b695e	1163	USBx_HOST->HFIR = (uint32_t)48000;
EricLew	0:80ee8f3b695e	1164	}
EricLew	0:80ee8f3b695e	1165	else if (freq == HCFG_6_MHZ)
EricLew	0:80ee8f3b695e	1166	{
EricLew	0:80ee8f3b695e	1167	USBx_HOST->HFIR = (uint32_t)6000;
EricLew	0:80ee8f3b695e	1168	}
EricLew	0:80ee8f3b695e	1169	return HAL_OK;
EricLew	0:80ee8f3b695e	1170	}
EricLew	0:80ee8f3b695e	1171
EricLew	0:80ee8f3b695e	1172	/**
EricLew	0:80ee8f3b695e	1173	* @brief USB_OTG_ResetPort : Reset Host Port
EricLew	0:80ee8f3b695e	1174	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	1175	* @retval HAL status
EricLew	0:80ee8f3b695e	1176	* @note (1)The application must wait at least 10 ms
EricLew	0:80ee8f3b695e	1177	* before clearing the reset bit.
EricLew	0:80ee8f3b695e	1178	*/
EricLew	0:80ee8f3b695e	1179	HAL_StatusTypeDef USB_ResetPort(USB_OTG_GlobalTypeDef *USBx)
EricLew	0:80ee8f3b695e	1180	{
EricLew	0:80ee8f3b695e	1181	__IO uint32_t hprt0;
EricLew	0:80ee8f3b695e	1182
EricLew	0:80ee8f3b695e	1183	hprt0 = USBx_HPRT0;
EricLew	0:80ee8f3b695e	1184
EricLew	0:80ee8f3b695e	1185	hprt0 &= ~(USB_OTG_HPRT_PENA \| USB_OTG_HPRT_PCDET \|\
EricLew	0:80ee8f3b695e	1186	USB_OTG_HPRT_PENCHNG \| USB_OTG_HPRT_POCCHNG );
EricLew	0:80ee8f3b695e	1187
EricLew	0:80ee8f3b695e	1188	USBx_HPRT0 = (USB_OTG_HPRT_PRST \| hprt0);
EricLew	0:80ee8f3b695e	1189	HAL_Delay (10); /* See Note #1 */
EricLew	0:80ee8f3b695e	1190	USBx_HPRT0 = ((~USB_OTG_HPRT_PRST) & hprt0);
EricLew	0:80ee8f3b695e	1191	return HAL_OK;
EricLew	0:80ee8f3b695e	1192	}
EricLew	0:80ee8f3b695e	1193
EricLew	0:80ee8f3b695e	1194	/**
EricLew	0:80ee8f3b695e	1195	* @brief USB_DriveVbus : activate or de-activate vbus
EricLew	0:80ee8f3b695e	1196	* @param state: VBUS state
EricLew	0:80ee8f3b695e	1197	* This parameter can be one of these values:
EricLew	0:80ee8f3b695e	1198	* 0 : VBUS Active
EricLew	0:80ee8f3b695e	1199	* 1 : VBUS Inactive
EricLew	0:80ee8f3b695e	1200	* @retval HAL status
EricLew	0:80ee8f3b695e	1201	*/
EricLew	0:80ee8f3b695e	1202	HAL_StatusTypeDef USB_DriveVbus (USB_OTG_GlobalTypeDef *USBx, uint8_t state)
EricLew	0:80ee8f3b695e	1203	{
EricLew	0:80ee8f3b695e	1204	__IO uint32_t hprt0;
EricLew	0:80ee8f3b695e	1205
EricLew	0:80ee8f3b695e	1206	hprt0 = USBx_HPRT0;
EricLew	0:80ee8f3b695e	1207	hprt0 &= ~(USB_OTG_HPRT_PENA \| USB_OTG_HPRT_PCDET \|\
EricLew	0:80ee8f3b695e	1208	USB_OTG_HPRT_PENCHNG \| USB_OTG_HPRT_POCCHNG );
EricLew	0:80ee8f3b695e	1209
EricLew	0:80ee8f3b695e	1210	if (((hprt0 & USB_OTG_HPRT_PPWR) == 0 ) && (state == 1 ))
EricLew	0:80ee8f3b695e	1211	{
EricLew	0:80ee8f3b695e	1212	USBx_HPRT0 = (USB_OTG_HPRT_PPWR \| hprt0);
EricLew	0:80ee8f3b695e	1213	}
EricLew	0:80ee8f3b695e	1214	if (((hprt0 & USB_OTG_HPRT_PPWR) == USB_OTG_HPRT_PPWR) && (state == 0 ))
EricLew	0:80ee8f3b695e	1215	{
EricLew	0:80ee8f3b695e	1216	USBx_HPRT0 = ((~USB_OTG_HPRT_PPWR) & hprt0);
EricLew	0:80ee8f3b695e	1217	}
EricLew	0:80ee8f3b695e	1218	return HAL_OK;
EricLew	0:80ee8f3b695e	1219	}
EricLew	0:80ee8f3b695e	1220
EricLew	0:80ee8f3b695e	1221	/**
EricLew	0:80ee8f3b695e	1222	* @brief Return Host Core speed
EricLew	0:80ee8f3b695e	1223	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	1224	* @retval speed : Host speed
EricLew	0:80ee8f3b695e	1225	* This parameter can be one of these values:
EricLew	0:80ee8f3b695e	1226	* @arg USB_OTG_SPEED_HIGH: High speed mode
EricLew	0:80ee8f3b695e	1227	* @arg USB_OTG_SPEED_FULL: Full speed mode
EricLew	0:80ee8f3b695e	1228	* @arg USB_OTG_SPEED_LOW: Low speed mode
EricLew	0:80ee8f3b695e	1229	*/
EricLew	0:80ee8f3b695e	1230	uint32_t USB_GetHostSpeed (USB_OTG_GlobalTypeDef *USBx)
EricLew	0:80ee8f3b695e	1231	{
EricLew	0:80ee8f3b695e	1232	__IO uint32_t hprt0;
EricLew	0:80ee8f3b695e	1233
EricLew	0:80ee8f3b695e	1234	hprt0 = USBx_HPRT0;
EricLew	0:80ee8f3b695e	1235	return ((hprt0 & USB_OTG_HPRT_PSPD) >> 17);
EricLew	0:80ee8f3b695e	1236	}
EricLew	0:80ee8f3b695e	1237
EricLew	0:80ee8f3b695e	1238	/**
EricLew	0:80ee8f3b695e	1239	* @brief Return Host Current Frame number
EricLew	0:80ee8f3b695e	1240	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	1241	* @retval current frame number
EricLew	0:80ee8f3b695e	1242	*/
EricLew	0:80ee8f3b695e	1243	uint32_t USB_GetCurrentFrame (USB_OTG_GlobalTypeDef *USBx)
EricLew	0:80ee8f3b695e	1244	{
EricLew	0:80ee8f3b695e	1245	return (USBx_HOST->HFNUM & USB_OTG_HFNUM_FRNUM);
EricLew	0:80ee8f3b695e	1246	}
EricLew	0:80ee8f3b695e	1247
EricLew	0:80ee8f3b695e	1248	/**
EricLew	0:80ee8f3b695e	1249	* @brief Initialize a host channel
EricLew	0:80ee8f3b695e	1250	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	1251	* @param ch_num : Channel number
EricLew	0:80ee8f3b695e	1252	* This parameter can be a value from 1 to 15
EricLew	0:80ee8f3b695e	1253	* @param epnum: Endpoint number
EricLew	0:80ee8f3b695e	1254	* This parameter can be a value from 1 to 15
EricLew	0:80ee8f3b695e	1255	* @param dev_address: Current device address
EricLew	0:80ee8f3b695e	1256	* This parameter can be a value from 0 to 255
EricLew	0:80ee8f3b695e	1257	* @param speed: Current device speed
EricLew	0:80ee8f3b695e	1258	* This parameter can be one of these values:
EricLew	0:80ee8f3b695e	1259	* @arg USB_OTG_SPEED_HIGH: High speed mode
EricLew	0:80ee8f3b695e	1260	* @arg USB_OTG_SPEED_FULL: Full speed mode
EricLew	0:80ee8f3b695e	1261	* @arg USB_OTG_SPEED_LOW: Low speed mode
EricLew	0:80ee8f3b695e	1262	* @param ep_type: Endpoint Type
EricLew	0:80ee8f3b695e	1263	* This parameter can be one of these values:
EricLew	0:80ee8f3b695e	1264	* @arg EP_TYPE_CTRL: Control type
EricLew	0:80ee8f3b695e	1265	* @arg EP_TYPE_ISOC: Isochronous type
EricLew	0:80ee8f3b695e	1266	* @arg EP_TYPE_BULK: Bulk type
EricLew	0:80ee8f3b695e	1267	* @arg EP_TYPE_INTR: Interrupt type
EricLew	0:80ee8f3b695e	1268	* @param mps: Max Packet Size
EricLew	0:80ee8f3b695e	1269	* This parameter can be a value from 0 to32K
EricLew	0:80ee8f3b695e	1270	* @retval HAL state
EricLew	0:80ee8f3b695e	1271	*/
EricLew	0:80ee8f3b695e	1272	HAL_StatusTypeDef USB_HC_Init(USB_OTG_GlobalTypeDef *USBx,
EricLew	0:80ee8f3b695e	1273	uint8_t ch_num,
EricLew	0:80ee8f3b695e	1274	uint8_t epnum,
EricLew	0:80ee8f3b695e	1275	uint8_t dev_address,
EricLew	0:80ee8f3b695e	1276	uint8_t speed,
EricLew	0:80ee8f3b695e	1277	uint8_t ep_type,
EricLew	0:80ee8f3b695e	1278	uint16_t mps)
EricLew	0:80ee8f3b695e	1279	{
EricLew	0:80ee8f3b695e	1280
EricLew	0:80ee8f3b695e	1281	/* Clear old interrupt conditions for this host channel. */
EricLew	0:80ee8f3b695e	1282	USBx_HC(ch_num)->HCINT = 0xFFFFFFFF;
EricLew	0:80ee8f3b695e	1283
EricLew	0:80ee8f3b695e	1284	/* Enable channel interrupts required for this transfer. */
EricLew	0:80ee8f3b695e	1285	switch (ep_type)
EricLew	0:80ee8f3b695e	1286	{
EricLew	0:80ee8f3b695e	1287	case EP_TYPE_CTRL:
EricLew	0:80ee8f3b695e	1288	case EP_TYPE_BULK:
EricLew	0:80ee8f3b695e	1289
EricLew	0:80ee8f3b695e	1290	USBx_HC(ch_num)->HCINTMSK = USB_OTG_HCINTMSK_XFRCM \|\
EricLew	0:80ee8f3b695e	1291	USB_OTG_HCINTMSK_STALLM \|\
EricLew	0:80ee8f3b695e	1292	USB_OTG_HCINTMSK_TXERRM \|\
EricLew	0:80ee8f3b695e	1293	USB_OTG_HCINTMSK_DTERRM \|\
EricLew	0:80ee8f3b695e	1294	USB_OTG_HCINTMSK_AHBERR \|\
EricLew	0:80ee8f3b695e	1295	USB_OTG_HCINTMSK_NAKM ;
EricLew	0:80ee8f3b695e	1296
EricLew	0:80ee8f3b695e	1297	if (epnum & 0x80)
EricLew	0:80ee8f3b695e	1298	{
EricLew	0:80ee8f3b695e	1299	USBx_HC(ch_num)->HCINTMSK \|= USB_OTG_HCINTMSK_BBERRM;
EricLew	0:80ee8f3b695e	1300	}
EricLew	0:80ee8f3b695e	1301	break;
EricLew	0:80ee8f3b695e	1302
EricLew	0:80ee8f3b695e	1303	case EP_TYPE_INTR:
EricLew	0:80ee8f3b695e	1304
EricLew	0:80ee8f3b695e	1305	USBx_HC(ch_num)->HCINTMSK = USB_OTG_HCINTMSK_XFRCM \|\
EricLew	0:80ee8f3b695e	1306	USB_OTG_HCINTMSK_STALLM \|\
EricLew	0:80ee8f3b695e	1307	USB_OTG_HCINTMSK_TXERRM \|\
EricLew	0:80ee8f3b695e	1308	USB_OTG_HCINTMSK_DTERRM \|\
EricLew	0:80ee8f3b695e	1309	USB_OTG_HCINTMSK_NAKM \|\
EricLew	0:80ee8f3b695e	1310	USB_OTG_HCINTMSK_AHBERR \|\
EricLew	0:80ee8f3b695e	1311	USB_OTG_HCINTMSK_FRMORM ;
EricLew	0:80ee8f3b695e	1312
EricLew	0:80ee8f3b695e	1313	if (epnum & 0x80)
EricLew	0:80ee8f3b695e	1314	{
EricLew	0:80ee8f3b695e	1315	USBx_HC(ch_num)->HCINTMSK \|= USB_OTG_HCINTMSK_BBERRM;
EricLew	0:80ee8f3b695e	1316	}
EricLew	0:80ee8f3b695e	1317
EricLew	0:80ee8f3b695e	1318	break;
EricLew	0:80ee8f3b695e	1319	case EP_TYPE_ISOC:
EricLew	0:80ee8f3b695e	1320
EricLew	0:80ee8f3b695e	1321	USBx_HC(ch_num)->HCINTMSK = USB_OTG_HCINTMSK_XFRCM \|\
EricLew	0:80ee8f3b695e	1322	USB_OTG_HCINTMSK_ACKM \|\
EricLew	0:80ee8f3b695e	1323	USB_OTG_HCINTMSK_AHBERR \|\
EricLew	0:80ee8f3b695e	1324	USB_OTG_HCINTMSK_FRMORM ;
EricLew	0:80ee8f3b695e	1325
EricLew	0:80ee8f3b695e	1326	if (epnum & 0x80)
EricLew	0:80ee8f3b695e	1327	{
EricLew	0:80ee8f3b695e	1328	USBx_HC(ch_num)->HCINTMSK \|= (USB_OTG_HCINTMSK_TXERRM \| USB_OTG_HCINTMSK_BBERRM);
EricLew	0:80ee8f3b695e	1329	}
EricLew	0:80ee8f3b695e	1330	break;
EricLew	0:80ee8f3b695e	1331	}
EricLew	0:80ee8f3b695e	1332
EricLew	0:80ee8f3b695e	1333	/* Enable the top level host channel interrupt. */
EricLew	0:80ee8f3b695e	1334	USBx_HOST->HAINTMSK \|= (1 << ch_num);
EricLew	0:80ee8f3b695e	1335
EricLew	0:80ee8f3b695e	1336	/* Make sure host channel interrupts are enabled. */
EricLew	0:80ee8f3b695e	1337	USBx->GINTMSK \|= USB_OTG_GINTMSK_HCIM;
EricLew	0:80ee8f3b695e	1338
EricLew	0:80ee8f3b695e	1339	/* Program the HCCHAR register */
EricLew	0:80ee8f3b695e	1340	USBx_HC(ch_num)->HCCHAR = (((dev_address << 22) & USB_OTG_HCCHAR_DAD) \|\
EricLew	0:80ee8f3b695e	1341	(((epnum & 0x7F)<< 11) & USB_OTG_HCCHAR_EPNUM)\|\
EricLew	0:80ee8f3b695e	1342	((((epnum & 0x80) == 0x80)<< 15) & USB_OTG_HCCHAR_EPDIR)\|\
EricLew	0:80ee8f3b695e	1343	(((speed == HPRT0_PRTSPD_LOW_SPEED)<< 17) & USB_OTG_HCCHAR_LSDEV)\|\
EricLew	0:80ee8f3b695e	1344	((ep_type << 18) & USB_OTG_HCCHAR_EPTYP)\|\
EricLew	0:80ee8f3b695e	1345	(mps & USB_OTG_HCCHAR_MPSIZ));
EricLew	0:80ee8f3b695e	1346
EricLew	0:80ee8f3b695e	1347	if (ep_type == EP_TYPE_INTR)
EricLew	0:80ee8f3b695e	1348	{
EricLew	0:80ee8f3b695e	1349	USBx_HC(ch_num)->HCCHAR \|= USB_OTG_HCCHAR_ODDFRM ;
EricLew	0:80ee8f3b695e	1350	}
EricLew	0:80ee8f3b695e	1351
EricLew	0:80ee8f3b695e	1352	return HAL_OK;
EricLew	0:80ee8f3b695e	1353	}
EricLew	0:80ee8f3b695e	1354
EricLew	0:80ee8f3b695e	1355	/**
EricLew	0:80ee8f3b695e	1356	* @brief Start a transfer over a host channel
EricLew	0:80ee8f3b695e	1357	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	1358	* @param hc: pointer to host channel structure
EricLew	0:80ee8f3b695e	1359	* @param dma: USB dma enabled or disabled
EricLew	0:80ee8f3b695e	1360	* This parameter can be one of these values:
EricLew	0:80ee8f3b695e	1361	* 0 : DMA feature not used
EricLew	0:80ee8f3b695e	1362	* 1 : DMA feature used
EricLew	0:80ee8f3b695e	1363	* @retval HAL state
EricLew	0:80ee8f3b695e	1364	*/
EricLew	0:80ee8f3b695e	1365	#if defined (__CC_ARM) /!< ARM Compiler /
EricLew	0:80ee8f3b695e	1366	#pragma O0
EricLew	0:80ee8f3b695e	1367	#elif defined (__GNUC__) /!< GNU Compiler /
EricLew	0:80ee8f3b695e	1368	#pragma GCC optimize ("O0")
EricLew	0:80ee8f3b695e	1369	#endif /* __CC_ARM */
EricLew	0:80ee8f3b695e	1370	HAL_StatusTypeDef USB_HC_StartXfer(USB_OTG_GlobalTypeDef USBx, USB_OTG_HCTypeDef hc, uint8_t dma)
EricLew	0:80ee8f3b695e	1371	{
EricLew	0:80ee8f3b695e	1372	uint8_t is_oddframe = 0;
EricLew	0:80ee8f3b695e	1373	uint16_t len_words = 0;
EricLew	0:80ee8f3b695e	1374	uint16_t num_packets = 0;
EricLew	0:80ee8f3b695e	1375	uint16_t max_hc_pkt_count = 256;
EricLew	0:80ee8f3b695e	1376	uint32_t tmpreg = 0;
EricLew	0:80ee8f3b695e	1377
EricLew	0:80ee8f3b695e	1378	/* Compute the expected number of packets associated to the transfer */
EricLew	0:80ee8f3b695e	1379	if (hc->xfer_len > 0)
EricLew	0:80ee8f3b695e	1380	{
EricLew	0:80ee8f3b695e	1381	num_packets = (hc->xfer_len + hc->max_packet - 1) / hc->max_packet;
EricLew	0:80ee8f3b695e	1382
EricLew	0:80ee8f3b695e	1383	if (num_packets > max_hc_pkt_count)
EricLew	0:80ee8f3b695e	1384	{
EricLew	0:80ee8f3b695e	1385	num_packets = max_hc_pkt_count;
EricLew	0:80ee8f3b695e	1386	hc->xfer_len = num_packets * hc->max_packet;
EricLew	0:80ee8f3b695e	1387	}
EricLew	0:80ee8f3b695e	1388	}
EricLew	0:80ee8f3b695e	1389	else
EricLew	0:80ee8f3b695e	1390	{
EricLew	0:80ee8f3b695e	1391	num_packets = 1;
EricLew	0:80ee8f3b695e	1392	}
EricLew	0:80ee8f3b695e	1393	if (hc->ep_is_in)
EricLew	0:80ee8f3b695e	1394	{
EricLew	0:80ee8f3b695e	1395	hc->xfer_len = num_packets * hc->max_packet;
EricLew	0:80ee8f3b695e	1396	}
EricLew	0:80ee8f3b695e	1397
EricLew	0:80ee8f3b695e	1398	/* Initialize the HCTSIZn register */
EricLew	0:80ee8f3b695e	1399	USBx_HC(hc->ch_num)->HCTSIZ = (((hc->xfer_len) & USB_OTG_HCTSIZ_XFRSIZ)) \|\
EricLew	0:80ee8f3b695e	1400	((num_packets << 19) & USB_OTG_HCTSIZ_PKTCNT) \|\
EricLew	0:80ee8f3b695e	1401	(((hc->data_pid) << 29) & USB_OTG_HCTSIZ_DPID);
EricLew	0:80ee8f3b695e	1402
EricLew	0:80ee8f3b695e	1403	if (dma)
EricLew	0:80ee8f3b695e	1404	{
EricLew	0:80ee8f3b695e	1405	/* xfer_buff MUST be 32-bits aligned */
EricLew	0:80ee8f3b695e	1406	USBx_HC(hc->ch_num)->HCDMA = (uint32_t)hc->xfer_buff;
EricLew	0:80ee8f3b695e	1407	}
EricLew	0:80ee8f3b695e	1408
EricLew	0:80ee8f3b695e	1409	is_oddframe = (USBx_HOST->HFNUM & 0x01) ? 0 : 1;
EricLew	0:80ee8f3b695e	1410	USBx_HC(hc->ch_num)->HCCHAR &= ~USB_OTG_HCCHAR_ODDFRM;
EricLew	0:80ee8f3b695e	1411	USBx_HC(hc->ch_num)->HCCHAR \|= (is_oddframe << 29);
EricLew	0:80ee8f3b695e	1412
EricLew	0:80ee8f3b695e	1413	/* Set host channel enable */
EricLew	0:80ee8f3b695e	1414	tmpreg = USBx_HC(hc->ch_num)->HCCHAR;
EricLew	0:80ee8f3b695e	1415	tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
EricLew	0:80ee8f3b695e	1416	tmpreg \|= USB_OTG_HCCHAR_CHENA;
EricLew	0:80ee8f3b695e	1417	USBx_HC(hc->ch_num)->HCCHAR = tmpreg;
EricLew	0:80ee8f3b695e	1418
EricLew	0:80ee8f3b695e	1419	if (dma == 0) /* Slave mode */
EricLew	0:80ee8f3b695e	1420	{
EricLew	0:80ee8f3b695e	1421	if((hc->ep_is_in == 0) && (hc->xfer_len > 0))
EricLew	0:80ee8f3b695e	1422	{
EricLew	0:80ee8f3b695e	1423	switch(hc->ep_type)
EricLew	0:80ee8f3b695e	1424	{
EricLew	0:80ee8f3b695e	1425	/* Non periodic transfer */
EricLew	0:80ee8f3b695e	1426	case EP_TYPE_CTRL:
EricLew	0:80ee8f3b695e	1427	case EP_TYPE_BULK:
EricLew	0:80ee8f3b695e	1428
EricLew	0:80ee8f3b695e	1429	len_words = (hc->xfer_len + 3) / 4;
EricLew	0:80ee8f3b695e	1430
EricLew	0:80ee8f3b695e	1431	/* check if there is enough space in FIFO space */
EricLew	0:80ee8f3b695e	1432	if(len_words > (USBx->HNPTXSTS & 0xFFFF))
EricLew	0:80ee8f3b695e	1433	{
EricLew	0:80ee8f3b695e	1434	/* need to process data in nptxfempty interrupt */
EricLew	0:80ee8f3b695e	1435	USBx->GINTMSK \|= USB_OTG_GINTMSK_NPTXFEM;
EricLew	0:80ee8f3b695e	1436	}
EricLew	0:80ee8f3b695e	1437	break;
EricLew	0:80ee8f3b695e	1438	/* Periodic transfer */
EricLew	0:80ee8f3b695e	1439	case EP_TYPE_INTR:
EricLew	0:80ee8f3b695e	1440	case EP_TYPE_ISOC:
EricLew	0:80ee8f3b695e	1441	len_words = (hc->xfer_len + 3) / 4;
EricLew	0:80ee8f3b695e	1442	/* check if there is enough space in FIFO space */
EricLew	0:80ee8f3b695e	1443	if(len_words > (USBx_HOST->HPTXSTS & 0xFFFF)) /* split the transfer */
EricLew	0:80ee8f3b695e	1444	{
EricLew	0:80ee8f3b695e	1445	/* need to process data in ptxfempty interrupt */
EricLew	0:80ee8f3b695e	1446	USBx->GINTMSK \|= USB_OTG_GINTMSK_PTXFEM;
EricLew	0:80ee8f3b695e	1447	}
EricLew	0:80ee8f3b695e	1448	break;
EricLew	0:80ee8f3b695e	1449
EricLew	0:80ee8f3b695e	1450	default:
EricLew	0:80ee8f3b695e	1451	break;
EricLew	0:80ee8f3b695e	1452	}
EricLew	0:80ee8f3b695e	1453
EricLew	0:80ee8f3b695e	1454	/* Write packet into the Tx FIFO. */
EricLew	0:80ee8f3b695e	1455	USB_WritePacket(USBx, hc->xfer_buff, hc->ch_num, hc->xfer_len, 0);
EricLew	0:80ee8f3b695e	1456	}
EricLew	0:80ee8f3b695e	1457	}
EricLew	0:80ee8f3b695e	1458
EricLew	0:80ee8f3b695e	1459	return HAL_OK;
EricLew	0:80ee8f3b695e	1460	}
EricLew	0:80ee8f3b695e	1461
EricLew	0:80ee8f3b695e	1462	/**
EricLew	0:80ee8f3b695e	1463	* @brief Read all host channel interrupts status
EricLew	0:80ee8f3b695e	1464	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	1465	* @retval HAL state
EricLew	0:80ee8f3b695e	1466	*/
EricLew	0:80ee8f3b695e	1467	uint32_t USB_HC_ReadInterrupt (USB_OTG_GlobalTypeDef *USBx)
EricLew	0:80ee8f3b695e	1468	{
EricLew	0:80ee8f3b695e	1469	return ((USBx_HOST->HAINT) & 0xFFFF);
EricLew	0:80ee8f3b695e	1470	}
EricLew	0:80ee8f3b695e	1471
EricLew	0:80ee8f3b695e	1472	/**
EricLew	0:80ee8f3b695e	1473	* @brief Halt a host channel
EricLew	0:80ee8f3b695e	1474	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	1475	* @param hc_num: Host Channel number
EricLew	0:80ee8f3b695e	1476	* This parameter can be a value from 1 to 15
EricLew	0:80ee8f3b695e	1477	* @retval HAL state
EricLew	0:80ee8f3b695e	1478	*/
EricLew	0:80ee8f3b695e	1479	HAL_StatusTypeDef USB_HC_Halt(USB_OTG_GlobalTypeDef *USBx , uint8_t hc_num)
EricLew	0:80ee8f3b695e	1480	{
EricLew	0:80ee8f3b695e	1481	uint32_t count = 0;
EricLew	0:80ee8f3b695e	1482
EricLew	0:80ee8f3b695e	1483	/* Check for space in the request queue to issue the halt. */
EricLew	0:80ee8f3b695e	1484	if (((USBx_HC(hc_num)->HCCHAR) & (HCCHAR_CTRL << 18)) \|\| ((USBx_HC(hc_num)->HCCHAR) & (HCCHAR_BULK << 18)))
EricLew	0:80ee8f3b695e	1485	{
EricLew	0:80ee8f3b695e	1486	USBx_HC(hc_num)->HCCHAR \|= USB_OTG_HCCHAR_CHDIS;
EricLew	0:80ee8f3b695e	1487
EricLew	0:80ee8f3b695e	1488	if ((USBx->HNPTXSTS & 0xFFFF) == 0)
EricLew	0:80ee8f3b695e	1489	{
EricLew	0:80ee8f3b695e	1490	USBx_HC(hc_num)->HCCHAR &= ~USB_OTG_HCCHAR_CHENA;
EricLew	0:80ee8f3b695e	1491	USBx_HC(hc_num)->HCCHAR \|= USB_OTG_HCCHAR_CHENA;
EricLew	0:80ee8f3b695e	1492	USBx_HC(hc_num)->HCCHAR &= ~USB_OTG_HCCHAR_EPDIR;
EricLew	0:80ee8f3b695e	1493	do
EricLew	0:80ee8f3b695e	1494	{
EricLew	0:80ee8f3b695e	1495	if (++count > 1000)
EricLew	0:80ee8f3b695e	1496	{
EricLew	0:80ee8f3b695e	1497	break;
EricLew	0:80ee8f3b695e	1498	}
EricLew	0:80ee8f3b695e	1499	}
EricLew	0:80ee8f3b695e	1500	while ((USBx_HC(hc_num)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
EricLew	0:80ee8f3b695e	1501	}
EricLew	0:80ee8f3b695e	1502	else
EricLew	0:80ee8f3b695e	1503	{
EricLew	0:80ee8f3b695e	1504	USBx_HC(hc_num)->HCCHAR \|= USB_OTG_HCCHAR_CHENA;
EricLew	0:80ee8f3b695e	1505	}
EricLew	0:80ee8f3b695e	1506	}
EricLew	0:80ee8f3b695e	1507	else
EricLew	0:80ee8f3b695e	1508	{
EricLew	0:80ee8f3b695e	1509	USBx_HC(hc_num)->HCCHAR \|= USB_OTG_HCCHAR_CHDIS;
EricLew	0:80ee8f3b695e	1510
EricLew	0:80ee8f3b695e	1511	if ((USBx_HOST->HPTXSTS & 0xFFFF) == 0)
EricLew	0:80ee8f3b695e	1512	{
EricLew	0:80ee8f3b695e	1513	USBx_HC(hc_num)->HCCHAR &= ~USB_OTG_HCCHAR_CHENA;
EricLew	0:80ee8f3b695e	1514	USBx_HC(hc_num)->HCCHAR \|= USB_OTG_HCCHAR_CHENA;
EricLew	0:80ee8f3b695e	1515	USBx_HC(hc_num)->HCCHAR &= ~USB_OTG_HCCHAR_EPDIR;
EricLew	0:80ee8f3b695e	1516	do
EricLew	0:80ee8f3b695e	1517	{
EricLew	0:80ee8f3b695e	1518	if (++count > 1000)
EricLew	0:80ee8f3b695e	1519	{
EricLew	0:80ee8f3b695e	1520	break;
EricLew	0:80ee8f3b695e	1521	}
EricLew	0:80ee8f3b695e	1522	}
EricLew	0:80ee8f3b695e	1523	while ((USBx_HC(hc_num)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
EricLew	0:80ee8f3b695e	1524	}
EricLew	0:80ee8f3b695e	1525	else
EricLew	0:80ee8f3b695e	1526	{
EricLew	0:80ee8f3b695e	1527	USBx_HC(hc_num)->HCCHAR \|= USB_OTG_HCCHAR_CHENA;
EricLew	0:80ee8f3b695e	1528	}
EricLew	0:80ee8f3b695e	1529	}
EricLew	0:80ee8f3b695e	1530
EricLew	0:80ee8f3b695e	1531	return HAL_OK;
EricLew	0:80ee8f3b695e	1532	}
EricLew	0:80ee8f3b695e	1533
EricLew	0:80ee8f3b695e	1534	/**
EricLew	0:80ee8f3b695e	1535	* @brief Initiate Do Ping protocol
EricLew	0:80ee8f3b695e	1536	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	1537	* @param hc_num: Host Channel number
EricLew	0:80ee8f3b695e	1538	* This parameter can be a value from 1 to 15
EricLew	0:80ee8f3b695e	1539	* @retval HAL state
EricLew	0:80ee8f3b695e	1540	*/
EricLew	0:80ee8f3b695e	1541	HAL_StatusTypeDef USB_DoPing(USB_OTG_GlobalTypeDef *USBx , uint8_t ch_num)
EricLew	0:80ee8f3b695e	1542	{
EricLew	0:80ee8f3b695e	1543	uint8_t num_packets = 1;
EricLew	0:80ee8f3b695e	1544	uint32_t tmpreg = 0;
EricLew	0:80ee8f3b695e	1545
EricLew	0:80ee8f3b695e	1546	USBx_HC(ch_num)->HCTSIZ = ((num_packets << 19) & USB_OTG_HCTSIZ_PKTCNT) \|\
EricLew	0:80ee8f3b695e	1547	USB_OTG_HCTSIZ_DOPING;
EricLew	0:80ee8f3b695e	1548
EricLew	0:80ee8f3b695e	1549	/* Set host channel enable */
EricLew	0:80ee8f3b695e	1550	tmpreg = USBx_HC(ch_num)->HCCHAR;
EricLew	0:80ee8f3b695e	1551	tmpreg &= ~USB_OTG_HCCHAR_CHDIS;
EricLew	0:80ee8f3b695e	1552	tmpreg \|= USB_OTG_HCCHAR_CHENA;
EricLew	0:80ee8f3b695e	1553	USBx_HC(ch_num)->HCCHAR = tmpreg;
EricLew	0:80ee8f3b695e	1554
EricLew	0:80ee8f3b695e	1555	return HAL_OK;
EricLew	0:80ee8f3b695e	1556	}
EricLew	0:80ee8f3b695e	1557
EricLew	0:80ee8f3b695e	1558	/**
EricLew	0:80ee8f3b695e	1559	* @brief Stop Host Core
EricLew	0:80ee8f3b695e	1560	* @param USBx: Selected device
EricLew	0:80ee8f3b695e	1561	* @retval HAL state
EricLew	0:80ee8f3b695e	1562	*/
EricLew	0:80ee8f3b695e	1563	HAL_StatusTypeDef USB_StopHost(USB_OTG_GlobalTypeDef *USBx)
EricLew	0:80ee8f3b695e	1564	{
EricLew	0:80ee8f3b695e	1565	uint8_t i;
EricLew	0:80ee8f3b695e	1566	uint32_t count = 0;
EricLew	0:80ee8f3b695e	1567	uint32_t value;
EricLew	0:80ee8f3b695e	1568
EricLew	0:80ee8f3b695e	1569	USB_DisableGlobalInt(USBx);
EricLew	0:80ee8f3b695e	1570
EricLew	0:80ee8f3b695e	1571	/* Flush FIFO */
EricLew	0:80ee8f3b695e	1572	USB_FlushTxFifo(USBx, 0x10);
EricLew	0:80ee8f3b695e	1573	USB_FlushRxFifo(USBx);
EricLew	0:80ee8f3b695e	1574
EricLew	0:80ee8f3b695e	1575	/* Flush out any leftover queued requests. */
EricLew	0:80ee8f3b695e	1576	for (i = 0; i <= 15; i++)
EricLew	0:80ee8f3b695e	1577	{
EricLew	0:80ee8f3b695e	1578
EricLew	0:80ee8f3b695e	1579	value = USBx_HC(i)->HCCHAR ;
EricLew	0:80ee8f3b695e	1580	value \|= USB_OTG_HCCHAR_CHDIS;
EricLew	0:80ee8f3b695e	1581	value &= ~USB_OTG_HCCHAR_CHENA;
EricLew	0:80ee8f3b695e	1582	value &= ~USB_OTG_HCCHAR_EPDIR;
EricLew	0:80ee8f3b695e	1583	USBx_HC(i)->HCCHAR = value;
EricLew	0:80ee8f3b695e	1584	}
EricLew	0:80ee8f3b695e	1585
EricLew	0:80ee8f3b695e	1586	/* Halt all channels to put them into a known state. */
EricLew	0:80ee8f3b695e	1587	for (i = 0; i <= 15; i++)
EricLew	0:80ee8f3b695e	1588	{
EricLew	0:80ee8f3b695e	1589	value = USBx_HC(i)->HCCHAR ;
EricLew	0:80ee8f3b695e	1590
EricLew	0:80ee8f3b695e	1591	value \|= USB_OTG_HCCHAR_CHDIS;
EricLew	0:80ee8f3b695e	1592	value \|= USB_OTG_HCCHAR_CHENA;
EricLew	0:80ee8f3b695e	1593	value &= ~USB_OTG_HCCHAR_EPDIR;
EricLew	0:80ee8f3b695e	1594
EricLew	0:80ee8f3b695e	1595	USBx_HC(i)->HCCHAR = value;
EricLew	0:80ee8f3b695e	1596	do
EricLew	0:80ee8f3b695e	1597	{
EricLew	0:80ee8f3b695e	1598	if (++count > 1000)
EricLew	0:80ee8f3b695e	1599	{
EricLew	0:80ee8f3b695e	1600	break;
EricLew	0:80ee8f3b695e	1601	}
EricLew	0:80ee8f3b695e	1602	}
EricLew	0:80ee8f3b695e	1603	while ((USBx_HC(i)->HCCHAR & USB_OTG_HCCHAR_CHENA) == USB_OTG_HCCHAR_CHENA);
EricLew	0:80ee8f3b695e	1604	}
EricLew	0:80ee8f3b695e	1605
EricLew	0:80ee8f3b695e	1606	/* Clear any pending Host interrupts */
EricLew	0:80ee8f3b695e	1607	USBx_HOST->HAINT = 0xFFFFFFFF;
EricLew	0:80ee8f3b695e	1608	USBx->GINTSTS = 0xFFFFFFFF;
EricLew	0:80ee8f3b695e	1609	USB_EnableGlobalInt(USBx);
EricLew	0:80ee8f3b695e	1610	return HAL_OK;
EricLew	0:80ee8f3b695e	1611	}
EricLew	0:80ee8f3b695e	1612	/**
EricLew	0:80ee8f3b695e	1613	* @}
EricLew	0:80ee8f3b695e	1614	*/
EricLew	0:80ee8f3b695e	1615
EricLew	0:80ee8f3b695e	1616	#endif /* defined (HAL_PCD_MODULE_ENABLED) \|\| defined (HAL_HCD_MODULE_ENABLED) */
EricLew	0:80ee8f3b695e	1617
EricLew	0:80ee8f3b695e	1618	/**
EricLew	0:80ee8f3b695e	1619	* @}
EricLew	0:80ee8f3b695e	1620	*/
EricLew	0:80ee8f3b695e	1621
EricLew	0:80ee8f3b695e	1622	#endif /* STM32L475xx \|\| STM32L476xx \|\| STM32L485xx \|\| STM32L486xx */
EricLew	0:80ee8f3b695e	1623
EricLew	0:80ee8f3b695e	1624	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/
EricLew	0:80ee8f3b695e	1625

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Type:	Library
Created:	12 Nov 2015
Imports:	198
Forks:	0
Commits:	3
Dependents:	4
Dependencies:	0
Followers:	14

Src/stm32l4xx_ll_usb.c@2:7aef7655b0a8, 2015-11-25 (annotated)

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