Hal Drivers for L4
Dependents: BSP OneHopeOnePrayer FINAL_AUDIO_RECORD AudioDemo
Fork of STM32L4xx_HAL_Driver by
Src/stm32l4xx_hal_rcc_ex.c@2:7aef7655b0a8, 2015-11-25 (annotated)
- Committer:
- EricLew
- Date:
- Wed Nov 25 17:30:43 2015 +0000
- Revision:
- 2:7aef7655b0a8
- Parent:
- 0:80ee8f3b695e
commit;
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
EricLew | 0:80ee8f3b695e | 1 | /** |
EricLew | 0:80ee8f3b695e | 2 | ****************************************************************************** |
EricLew | 0:80ee8f3b695e | 3 | * @file stm32l4xx_hal_rcc_ex.c |
EricLew | 0:80ee8f3b695e | 4 | * @author MCD Application Team |
EricLew | 0:80ee8f3b695e | 5 | * @version V1.1.0 |
EricLew | 0:80ee8f3b695e | 6 | * @date 16-September-2015 |
EricLew | 0:80ee8f3b695e | 7 | * @brief Extended RCC HAL module driver. |
EricLew | 0:80ee8f3b695e | 8 | * This file provides firmware functions to manage the following |
EricLew | 0:80ee8f3b695e | 9 | * functionalities RCC extended peripheral: |
EricLew | 0:80ee8f3b695e | 10 | * + Extended Peripheral Control functions |
EricLew | 0:80ee8f3b695e | 11 | * |
EricLew | 0:80ee8f3b695e | 12 | ****************************************************************************** |
EricLew | 0:80ee8f3b695e | 13 | * @attention |
EricLew | 0:80ee8f3b695e | 14 | * |
EricLew | 0:80ee8f3b695e | 15 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
EricLew | 0:80ee8f3b695e | 16 | * |
EricLew | 0:80ee8f3b695e | 17 | * Redistribution and use in source and binary forms, with or without modification, |
EricLew | 0:80ee8f3b695e | 18 | * are permitted provided that the following conditions are met: |
EricLew | 0:80ee8f3b695e | 19 | * 1. Redistributions of source code must retain the above copyright notice, |
EricLew | 0:80ee8f3b695e | 20 | * this list of conditions and the following disclaimer. |
EricLew | 0:80ee8f3b695e | 21 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
EricLew | 0:80ee8f3b695e | 22 | * this list of conditions and the following disclaimer in the documentation |
EricLew | 0:80ee8f3b695e | 23 | * and/or other materials provided with the distribution. |
EricLew | 0:80ee8f3b695e | 24 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
EricLew | 0:80ee8f3b695e | 25 | * may be used to endorse or promote products derived from this software |
EricLew | 0:80ee8f3b695e | 26 | * without specific prior written permission. |
EricLew | 0:80ee8f3b695e | 27 | * |
EricLew | 0:80ee8f3b695e | 28 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
EricLew | 0:80ee8f3b695e | 29 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
EricLew | 0:80ee8f3b695e | 30 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
EricLew | 0:80ee8f3b695e | 31 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
EricLew | 0:80ee8f3b695e | 32 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
EricLew | 0:80ee8f3b695e | 33 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
EricLew | 0:80ee8f3b695e | 34 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
EricLew | 0:80ee8f3b695e | 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
EricLew | 0:80ee8f3b695e | 36 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
EricLew | 0:80ee8f3b695e | 37 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
EricLew | 0:80ee8f3b695e | 38 | * |
EricLew | 0:80ee8f3b695e | 39 | ****************************************************************************** |
EricLew | 0:80ee8f3b695e | 40 | */ |
EricLew | 0:80ee8f3b695e | 41 | |
EricLew | 0:80ee8f3b695e | 42 | /* Includes ------------------------------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 43 | #include "stm32l4xx_hal.h" |
EricLew | 0:80ee8f3b695e | 44 | |
EricLew | 0:80ee8f3b695e | 45 | /** @addtogroup STM32L4xx_HAL_Driver |
EricLew | 0:80ee8f3b695e | 46 | * @{ |
EricLew | 0:80ee8f3b695e | 47 | */ |
EricLew | 0:80ee8f3b695e | 48 | |
EricLew | 0:80ee8f3b695e | 49 | /** @defgroup RCCEx RCCEx |
EricLew | 0:80ee8f3b695e | 50 | * @brief RCC Extended HAL module driver |
EricLew | 0:80ee8f3b695e | 51 | * @{ |
EricLew | 0:80ee8f3b695e | 52 | */ |
EricLew | 0:80ee8f3b695e | 53 | |
EricLew | 0:80ee8f3b695e | 54 | #ifdef HAL_RCC_MODULE_ENABLED |
EricLew | 0:80ee8f3b695e | 55 | |
EricLew | 0:80ee8f3b695e | 56 | /* Private typedef -----------------------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 57 | /* Private defines -----------------------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 58 | /** @defgroup RCCEx_Private_Constants RCCEx Private Constants |
EricLew | 0:80ee8f3b695e | 59 | * @{ |
EricLew | 0:80ee8f3b695e | 60 | */ |
EricLew | 0:80ee8f3b695e | 61 | #define PLLSAI1_TIMEOUT_VALUE 1000U /* Timeout value fixed to 100 ms */ |
EricLew | 0:80ee8f3b695e | 62 | #define PLLSAI2_TIMEOUT_VALUE 1000U /* Timeout value fixed to 100 ms */ |
EricLew | 0:80ee8f3b695e | 63 | #define PLL_TIMEOUT_VALUE 100U /* Timeout value fixed to 100 ms */ |
EricLew | 0:80ee8f3b695e | 64 | |
EricLew | 0:80ee8f3b695e | 65 | #define __LSCO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE() |
EricLew | 0:80ee8f3b695e | 66 | #define LSCO_GPIO_PORT GPIOA |
EricLew | 0:80ee8f3b695e | 67 | #define LSCO_PIN GPIO_PIN_2 |
EricLew | 0:80ee8f3b695e | 68 | /** |
EricLew | 0:80ee8f3b695e | 69 | * @} |
EricLew | 0:80ee8f3b695e | 70 | */ |
EricLew | 0:80ee8f3b695e | 71 | |
EricLew | 0:80ee8f3b695e | 72 | /* Private macros ------------------------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 73 | /* Private variables ---------------------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 74 | /* Private function prototypes -----------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 75 | /** @defgroup RCCEx_Private_Functions RCCEx Private Functions |
EricLew | 0:80ee8f3b695e | 76 | * @{ |
EricLew | 0:80ee8f3b695e | 77 | */ |
EricLew | 0:80ee8f3b695e | 78 | static HAL_StatusTypeDef RCCEx_PLLSAI1_ConfigNP(RCC_PLLSAI1InitTypeDef *PllSai1); |
EricLew | 0:80ee8f3b695e | 79 | static HAL_StatusTypeDef RCCEx_PLLSAI1_ConfigNQ(RCC_PLLSAI1InitTypeDef *PllSai1); |
EricLew | 0:80ee8f3b695e | 80 | static HAL_StatusTypeDef RCCEx_PLLSAI1_ConfigNR(RCC_PLLSAI1InitTypeDef *PllSai1); |
EricLew | 0:80ee8f3b695e | 81 | static HAL_StatusTypeDef RCCEx_PLLSAI2_ConfigNP(RCC_PLLSAI2InitTypeDef *PllSai2); |
EricLew | 0:80ee8f3b695e | 82 | static HAL_StatusTypeDef RCCEx_PLLSAI2_ConfigNR(RCC_PLLSAI2InitTypeDef *PllSai2); |
EricLew | 0:80ee8f3b695e | 83 | /** |
EricLew | 0:80ee8f3b695e | 84 | * @} |
EricLew | 0:80ee8f3b695e | 85 | */ |
EricLew | 0:80ee8f3b695e | 86 | |
EricLew | 0:80ee8f3b695e | 87 | /* Exported functions --------------------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 88 | |
EricLew | 0:80ee8f3b695e | 89 | /** @defgroup RCCEx_Exported_Functions RCCEx Exported Functions |
EricLew | 0:80ee8f3b695e | 90 | * @{ |
EricLew | 0:80ee8f3b695e | 91 | */ |
EricLew | 0:80ee8f3b695e | 92 | |
EricLew | 0:80ee8f3b695e | 93 | /** @defgroup RCCEx_Exported_Functions_Group1 Extended Peripheral Control functions |
EricLew | 0:80ee8f3b695e | 94 | * @brief Extended Peripheral Control functions |
EricLew | 0:80ee8f3b695e | 95 | * |
EricLew | 0:80ee8f3b695e | 96 | @verbatim |
EricLew | 0:80ee8f3b695e | 97 | =============================================================================== |
EricLew | 0:80ee8f3b695e | 98 | ##### Extended Peripheral Control functions ##### |
EricLew | 0:80ee8f3b695e | 99 | =============================================================================== |
EricLew | 0:80ee8f3b695e | 100 | [..] |
EricLew | 0:80ee8f3b695e | 101 | This subsection provides a set of functions allowing to control the RCC Clocks |
EricLew | 0:80ee8f3b695e | 102 | frequencies. |
EricLew | 0:80ee8f3b695e | 103 | [..] |
EricLew | 0:80ee8f3b695e | 104 | (@) Important note: Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to |
EricLew | 0:80ee8f3b695e | 105 | select the RTC clock source; in this case the Backup domain will be reset in |
EricLew | 0:80ee8f3b695e | 106 | order to modify the RTC Clock source, as consequence RTC registers (including |
EricLew | 0:80ee8f3b695e | 107 | the backup registers) and RCC_BDCR register are set to their reset values. |
EricLew | 0:80ee8f3b695e | 108 | |
EricLew | 0:80ee8f3b695e | 109 | @endverbatim |
EricLew | 0:80ee8f3b695e | 110 | * @{ |
EricLew | 0:80ee8f3b695e | 111 | */ |
EricLew | 0:80ee8f3b695e | 112 | /** |
EricLew | 0:80ee8f3b695e | 113 | * @brief Initialize the RCC extended peripherals clocks according to the specified |
EricLew | 0:80ee8f3b695e | 114 | * parameters in the RCC_PeriphCLKInitTypeDef. |
EricLew | 0:80ee8f3b695e | 115 | * @param PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that |
EricLew | 0:80ee8f3b695e | 116 | * contains a field PeriphClockSelection which can be a combination of the following values: |
EricLew | 0:80ee8f3b695e | 117 | * @arg @ref RCC_PERIPHCLK_RTC RTC peripheral clock |
EricLew | 0:80ee8f3b695e | 118 | * @arg @ref RCC_PERIPHCLK_ADC ADC peripheral clock |
EricLew | 0:80ee8f3b695e | 119 | * @arg @ref RCC_PERIPHCLK_DFSDM DFSDM peripheral clock |
EricLew | 0:80ee8f3b695e | 120 | * @arg @ref RCC_PERIPHCLK_I2C1 I2C1 peripheral clock |
EricLew | 0:80ee8f3b695e | 121 | * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock |
EricLew | 0:80ee8f3b695e | 122 | * @arg @ref RCC_PERIPHCLK_I2C3 I2C3 peripheral clock |
EricLew | 0:80ee8f3b695e | 123 | * @arg @ref RCC_PERIPHCLK_LPTIM1 LPTIM1 peripheral clock |
EricLew | 0:80ee8f3b695e | 124 | * @arg @ref RCC_PERIPHCLK_LPTIM2 LPTIM2 peripheral clock |
EricLew | 0:80ee8f3b695e | 125 | * @arg @ref RCC_PERIPHCLK_LPUART1 LPUART1 peripheral clock |
EricLew | 0:80ee8f3b695e | 126 | * @arg @ref RCC_PERIPHCLK_RNG RNG peripheral clock |
EricLew | 0:80ee8f3b695e | 127 | * @arg @ref RCC_PERIPHCLK_SAI1 SAI1 peripheral clock |
EricLew | 0:80ee8f3b695e | 128 | * @arg @ref RCC_PERIPHCLK_SAI2 SAI2 peripheral clock |
EricLew | 0:80ee8f3b695e | 129 | * @arg @ref RCC_PERIPHCLK_SDMMC1 SDMMC1 peripheral clock |
EricLew | 0:80ee8f3b695e | 130 | * @arg @ref RCC_PERIPHCLK_SWPMI1 SWPMI1 peripheral clock |
EricLew | 0:80ee8f3b695e | 131 | * @arg @ref RCC_PERIPHCLK_USART1 USART1 peripheral clock |
EricLew | 0:80ee8f3b695e | 132 | * @arg @ref RCC_PERIPHCLK_USART2 USART1 peripheral clock |
EricLew | 0:80ee8f3b695e | 133 | * @arg @ref RCC_PERIPHCLK_USART3 USART1 peripheral clock |
EricLew | 0:80ee8f3b695e | 134 | * @arg @ref RCC_PERIPHCLK_UART4 USART1 peripheral clock |
EricLew | 0:80ee8f3b695e | 135 | * @arg @ref RCC_PERIPHCLK_UART5 USART1 peripheral clock |
EricLew | 0:80ee8f3b695e | 136 | * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock (only for devices with USB) |
EricLew | 0:80ee8f3b695e | 137 | * |
EricLew | 0:80ee8f3b695e | 138 | * @note Care must be taken when HAL_RCCEx_PeriphCLKConfig() is used to select |
EricLew | 0:80ee8f3b695e | 139 | * the RTC clock source: in this case the access to Backup domain is enabled. |
EricLew | 0:80ee8f3b695e | 140 | * |
EricLew | 0:80ee8f3b695e | 141 | * @retval HAL status |
EricLew | 0:80ee8f3b695e | 142 | */ |
EricLew | 0:80ee8f3b695e | 143 | HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) |
EricLew | 0:80ee8f3b695e | 144 | { |
EricLew | 0:80ee8f3b695e | 145 | uint32_t tmpregister = 0; |
EricLew | 0:80ee8f3b695e | 146 | uint32_t tickstart = 0; |
EricLew | 0:80ee8f3b695e | 147 | HAL_StatusTypeDef ret = HAL_OK; /* Intermediate status */ |
EricLew | 0:80ee8f3b695e | 148 | HAL_StatusTypeDef status = HAL_OK; /* Final status */ |
EricLew | 0:80ee8f3b695e | 149 | |
EricLew | 0:80ee8f3b695e | 150 | /* Check the parameters */ |
EricLew | 0:80ee8f3b695e | 151 | assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); |
EricLew | 0:80ee8f3b695e | 152 | |
EricLew | 0:80ee8f3b695e | 153 | /*-------------------------- SAI1 clock source configuration ---------------------*/ |
EricLew | 0:80ee8f3b695e | 154 | if((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1)) |
EricLew | 0:80ee8f3b695e | 155 | { |
EricLew | 0:80ee8f3b695e | 156 | /* Check the parameters */ |
EricLew | 0:80ee8f3b695e | 157 | assert_param(IS_RCC_SAI1CLK(PeriphClkInit->Sai1ClockSelection)); |
EricLew | 0:80ee8f3b695e | 158 | |
EricLew | 0:80ee8f3b695e | 159 | switch(PeriphClkInit->Sai1ClockSelection) |
EricLew | 0:80ee8f3b695e | 160 | { |
EricLew | 0:80ee8f3b695e | 161 | case RCC_SAI1CLKSOURCE_PLL: /* PLL is used as clock source for SAI1*/ |
EricLew | 0:80ee8f3b695e | 162 | /* Enable SAI Clock output generated form System PLL . */ |
EricLew | 0:80ee8f3b695e | 163 | __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_SAI3CLK); |
EricLew | 0:80ee8f3b695e | 164 | /* SAI1 clock source config set later after clock selection check */ |
EricLew | 0:80ee8f3b695e | 165 | break; |
EricLew | 0:80ee8f3b695e | 166 | |
EricLew | 0:80ee8f3b695e | 167 | case RCC_SAI1CLKSOURCE_PLLSAI1: /* PLLSAI1 is used as clock source for SAI1*/ |
EricLew | 0:80ee8f3b695e | 168 | /* PLLSAI1 parameters N & P configuration and clock output (PLLSAI1ClockOut) */ |
EricLew | 0:80ee8f3b695e | 169 | ret = RCCEx_PLLSAI1_ConfigNP(&(PeriphClkInit->PLLSAI1)); |
EricLew | 0:80ee8f3b695e | 170 | /* SAI1 clock source config set later after clock selection check */ |
EricLew | 0:80ee8f3b695e | 171 | break; |
EricLew | 0:80ee8f3b695e | 172 | |
EricLew | 0:80ee8f3b695e | 173 | case RCC_SAI1CLKSOURCE_PLLSAI2: /* PLLSAI2 is used as clock source for SAI1*/ |
EricLew | 0:80ee8f3b695e | 174 | /* PLLSAI2 parameters N & P configuration and clock output (PLLSAI2ClockOut) */ |
EricLew | 0:80ee8f3b695e | 175 | ret = RCCEx_PLLSAI2_ConfigNP(&(PeriphClkInit->PLLSAI2)); |
EricLew | 0:80ee8f3b695e | 176 | /* SAI1 clock source config set later after clock selection check */ |
EricLew | 0:80ee8f3b695e | 177 | break; |
EricLew | 0:80ee8f3b695e | 178 | |
EricLew | 0:80ee8f3b695e | 179 | case RCC_SAI1CLKSOURCE_PIN: /* External clock is used as source of SAI1 clock*/ |
EricLew | 0:80ee8f3b695e | 180 | /* SAI1 clock source config set later after clock selection check */ |
EricLew | 0:80ee8f3b695e | 181 | break; |
EricLew | 0:80ee8f3b695e | 182 | |
EricLew | 0:80ee8f3b695e | 183 | default: |
EricLew | 0:80ee8f3b695e | 184 | ret = HAL_ERROR; |
EricLew | 0:80ee8f3b695e | 185 | break; |
EricLew | 0:80ee8f3b695e | 186 | } |
EricLew | 0:80ee8f3b695e | 187 | |
EricLew | 0:80ee8f3b695e | 188 | if(ret == HAL_OK) |
EricLew | 0:80ee8f3b695e | 189 | { |
EricLew | 0:80ee8f3b695e | 190 | /* Set the source of SAI1 clock*/ |
EricLew | 0:80ee8f3b695e | 191 | __HAL_RCC_SAI1_CONFIG(PeriphClkInit->Sai1ClockSelection); |
EricLew | 0:80ee8f3b695e | 192 | } |
EricLew | 0:80ee8f3b695e | 193 | else |
EricLew | 0:80ee8f3b695e | 194 | { |
EricLew | 0:80ee8f3b695e | 195 | /* set overall return value */ |
EricLew | 0:80ee8f3b695e | 196 | status = ret; |
EricLew | 0:80ee8f3b695e | 197 | } |
EricLew | 0:80ee8f3b695e | 198 | } |
EricLew | 0:80ee8f3b695e | 199 | |
EricLew | 0:80ee8f3b695e | 200 | /*-------------------------- SAI2 clock source configuration ---------------------*/ |
EricLew | 0:80ee8f3b695e | 201 | if((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2)) |
EricLew | 0:80ee8f3b695e | 202 | { |
EricLew | 0:80ee8f3b695e | 203 | /* Check the parameters */ |
EricLew | 0:80ee8f3b695e | 204 | assert_param(IS_RCC_SAI2CLK(PeriphClkInit->Sai2ClockSelection)); |
EricLew | 0:80ee8f3b695e | 205 | |
EricLew | 0:80ee8f3b695e | 206 | switch(PeriphClkInit->Sai2ClockSelection) |
EricLew | 0:80ee8f3b695e | 207 | { |
EricLew | 0:80ee8f3b695e | 208 | case RCC_SAI2CLKSOURCE_PLL: /* PLL is used as clock source for SAI2*/ |
EricLew | 0:80ee8f3b695e | 209 | /* Enable SAI Clock output generated form System PLL . */ |
EricLew | 0:80ee8f3b695e | 210 | __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_SAI3CLK); |
EricLew | 0:80ee8f3b695e | 211 | /* SAI2 clock source config set later after clock selection check */ |
EricLew | 0:80ee8f3b695e | 212 | break; |
EricLew | 0:80ee8f3b695e | 213 | |
EricLew | 0:80ee8f3b695e | 214 | case RCC_SAI2CLKSOURCE_PLLSAI1: /* PLLSAI1 is used as clock source for SAI2*/ |
EricLew | 0:80ee8f3b695e | 215 | /* PLLSAI1 parameters N & P configuration and clock output (PLLSAI1ClockOut) */ |
EricLew | 0:80ee8f3b695e | 216 | ret = RCCEx_PLLSAI1_ConfigNP(&(PeriphClkInit->PLLSAI1)); |
EricLew | 0:80ee8f3b695e | 217 | /* SAI2 clock source config set later after clock selection check */ |
EricLew | 0:80ee8f3b695e | 218 | break; |
EricLew | 0:80ee8f3b695e | 219 | |
EricLew | 0:80ee8f3b695e | 220 | case RCC_SAI2CLKSOURCE_PLLSAI2: /* PLLSAI2 is used as clock source for SAI2*/ |
EricLew | 0:80ee8f3b695e | 221 | /* PLLSAI2 parameters N & P configuration and clock output (PLLSAI2ClockOut) */ |
EricLew | 0:80ee8f3b695e | 222 | ret = RCCEx_PLLSAI2_ConfigNP(&(PeriphClkInit->PLLSAI2)); |
EricLew | 0:80ee8f3b695e | 223 | /* SAI2 clock source config set later after clock selection check */ |
EricLew | 0:80ee8f3b695e | 224 | break; |
EricLew | 0:80ee8f3b695e | 225 | |
EricLew | 0:80ee8f3b695e | 226 | case RCC_SAI2CLKSOURCE_PIN: /* External clock is used as source of SAI2 clock*/ |
EricLew | 0:80ee8f3b695e | 227 | /* SAI2 clock source config set later after clock selection check */ |
EricLew | 0:80ee8f3b695e | 228 | break; |
EricLew | 0:80ee8f3b695e | 229 | |
EricLew | 0:80ee8f3b695e | 230 | default: |
EricLew | 0:80ee8f3b695e | 231 | ret = HAL_ERROR; |
EricLew | 0:80ee8f3b695e | 232 | break; |
EricLew | 0:80ee8f3b695e | 233 | } |
EricLew | 0:80ee8f3b695e | 234 | |
EricLew | 0:80ee8f3b695e | 235 | if(ret == HAL_OK) |
EricLew | 0:80ee8f3b695e | 236 | { |
EricLew | 0:80ee8f3b695e | 237 | /* Set the source of SAI2 clock*/ |
EricLew | 0:80ee8f3b695e | 238 | __HAL_RCC_SAI2_CONFIG(PeriphClkInit->Sai2ClockSelection); |
EricLew | 0:80ee8f3b695e | 239 | } |
EricLew | 0:80ee8f3b695e | 240 | else |
EricLew | 0:80ee8f3b695e | 241 | { |
EricLew | 0:80ee8f3b695e | 242 | /* set overall return value */ |
EricLew | 0:80ee8f3b695e | 243 | status = ret; |
EricLew | 0:80ee8f3b695e | 244 | } |
EricLew | 0:80ee8f3b695e | 245 | } |
EricLew | 0:80ee8f3b695e | 246 | |
EricLew | 0:80ee8f3b695e | 247 | /*-------------------------- RTC clock source configuration ----------------------*/ |
EricLew | 0:80ee8f3b695e | 248 | if((PeriphClkInit->PeriphClockSelection & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC) |
EricLew | 0:80ee8f3b695e | 249 | { |
EricLew | 0:80ee8f3b695e | 250 | FlagStatus pwrclkchanged = RESET; |
EricLew | 0:80ee8f3b695e | 251 | |
EricLew | 0:80ee8f3b695e | 252 | /* Check for RTC Parameters used to output RTCCLK */ |
EricLew | 0:80ee8f3b695e | 253 | assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); |
EricLew | 0:80ee8f3b695e | 254 | |
EricLew | 0:80ee8f3b695e | 255 | /* Enable Power Clock */ |
EricLew | 0:80ee8f3b695e | 256 | if(__HAL_RCC_PWR_IS_CLK_DISABLED()) |
EricLew | 0:80ee8f3b695e | 257 | { |
EricLew | 0:80ee8f3b695e | 258 | __HAL_RCC_PWR_CLK_ENABLE(); |
EricLew | 0:80ee8f3b695e | 259 | pwrclkchanged = SET; |
EricLew | 0:80ee8f3b695e | 260 | } |
EricLew | 0:80ee8f3b695e | 261 | |
EricLew | 0:80ee8f3b695e | 262 | /* Enable write access to Backup domain */ |
EricLew | 0:80ee8f3b695e | 263 | SET_BIT(PWR->CR1, PWR_CR1_DBP); |
EricLew | 0:80ee8f3b695e | 264 | |
EricLew | 0:80ee8f3b695e | 265 | /* Wait for Backup domain Write protection disable */ |
EricLew | 0:80ee8f3b695e | 266 | tickstart = HAL_GetTick(); |
EricLew | 0:80ee8f3b695e | 267 | |
EricLew | 0:80ee8f3b695e | 268 | while((PWR->CR1 & PWR_CR1_DBP) == RESET) |
EricLew | 0:80ee8f3b695e | 269 | { |
EricLew | 0:80ee8f3b695e | 270 | if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) |
EricLew | 0:80ee8f3b695e | 271 | { |
EricLew | 0:80ee8f3b695e | 272 | ret = HAL_TIMEOUT; |
EricLew | 0:80ee8f3b695e | 273 | break; |
EricLew | 0:80ee8f3b695e | 274 | } |
EricLew | 0:80ee8f3b695e | 275 | } |
EricLew | 0:80ee8f3b695e | 276 | |
EricLew | 0:80ee8f3b695e | 277 | if(ret == HAL_OK) |
EricLew | 0:80ee8f3b695e | 278 | { |
EricLew | 0:80ee8f3b695e | 279 | /* Reset the Backup domain only if the RTC Clock source selection is modified */ |
EricLew | 0:80ee8f3b695e | 280 | if(READ_BIT(RCC->BDCR, RCC_BDCR_RTCSEL) != PeriphClkInit->RTCClockSelection) |
EricLew | 0:80ee8f3b695e | 281 | { |
EricLew | 0:80ee8f3b695e | 282 | /* Store the content of BDCR register before the reset of Backup Domain */ |
EricLew | 0:80ee8f3b695e | 283 | tmpregister = READ_BIT(RCC->BDCR, ~(RCC_BDCR_RTCSEL)); |
EricLew | 0:80ee8f3b695e | 284 | /* RTC Clock selection can be changed only if the Backup Domain is reset */ |
EricLew | 0:80ee8f3b695e | 285 | __HAL_RCC_BACKUPRESET_FORCE(); |
EricLew | 0:80ee8f3b695e | 286 | __HAL_RCC_BACKUPRESET_RELEASE(); |
EricLew | 0:80ee8f3b695e | 287 | /* Restore the Content of BDCR register */ |
EricLew | 0:80ee8f3b695e | 288 | RCC->BDCR = tmpregister; |
EricLew | 0:80ee8f3b695e | 289 | } |
EricLew | 0:80ee8f3b695e | 290 | |
EricLew | 0:80ee8f3b695e | 291 | /* Wait for LSE reactivation if LSE was enable prior to Backup Domain reset */ |
EricLew | 0:80ee8f3b695e | 292 | if (HAL_IS_BIT_SET(tmpregister, RCC_BDCR_LSERDY)) |
EricLew | 0:80ee8f3b695e | 293 | { |
EricLew | 0:80ee8f3b695e | 294 | /* Get Start Tick*/ |
EricLew | 0:80ee8f3b695e | 295 | tickstart = HAL_GetTick(); |
EricLew | 0:80ee8f3b695e | 296 | |
EricLew | 0:80ee8f3b695e | 297 | /* Wait till LSE is ready */ |
EricLew | 0:80ee8f3b695e | 298 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) |
EricLew | 0:80ee8f3b695e | 299 | { |
EricLew | 0:80ee8f3b695e | 300 | if((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) |
EricLew | 0:80ee8f3b695e | 301 | { |
EricLew | 0:80ee8f3b695e | 302 | ret = HAL_TIMEOUT; |
EricLew | 0:80ee8f3b695e | 303 | break; |
EricLew | 0:80ee8f3b695e | 304 | } |
EricLew | 0:80ee8f3b695e | 305 | } |
EricLew | 0:80ee8f3b695e | 306 | } |
EricLew | 0:80ee8f3b695e | 307 | |
EricLew | 0:80ee8f3b695e | 308 | if(ret == HAL_OK) |
EricLew | 0:80ee8f3b695e | 309 | { |
EricLew | 0:80ee8f3b695e | 310 | /* Apply new RTC clock source selection */ |
EricLew | 0:80ee8f3b695e | 311 | __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); |
EricLew | 0:80ee8f3b695e | 312 | } |
EricLew | 0:80ee8f3b695e | 313 | else |
EricLew | 0:80ee8f3b695e | 314 | { |
EricLew | 0:80ee8f3b695e | 315 | /* set overall return value */ |
EricLew | 0:80ee8f3b695e | 316 | status = ret; |
EricLew | 0:80ee8f3b695e | 317 | } |
EricLew | 0:80ee8f3b695e | 318 | } |
EricLew | 0:80ee8f3b695e | 319 | else |
EricLew | 0:80ee8f3b695e | 320 | { |
EricLew | 0:80ee8f3b695e | 321 | /* set overall return value */ |
EricLew | 0:80ee8f3b695e | 322 | status = ret; |
EricLew | 0:80ee8f3b695e | 323 | } |
EricLew | 0:80ee8f3b695e | 324 | |
EricLew | 0:80ee8f3b695e | 325 | /* Restore clock configuration if changed */ |
EricLew | 0:80ee8f3b695e | 326 | if(pwrclkchanged == SET) |
EricLew | 0:80ee8f3b695e | 327 | { |
EricLew | 0:80ee8f3b695e | 328 | __HAL_RCC_PWR_CLK_DISABLE(); |
EricLew | 0:80ee8f3b695e | 329 | } |
EricLew | 0:80ee8f3b695e | 330 | } |
EricLew | 0:80ee8f3b695e | 331 | |
EricLew | 0:80ee8f3b695e | 332 | /*-------------------------- USART1 clock source configuration -------------------*/ |
EricLew | 0:80ee8f3b695e | 333 | if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) |
EricLew | 0:80ee8f3b695e | 334 | { |
EricLew | 0:80ee8f3b695e | 335 | /* Check the parameters */ |
EricLew | 0:80ee8f3b695e | 336 | assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection)); |
EricLew | 0:80ee8f3b695e | 337 | |
EricLew | 0:80ee8f3b695e | 338 | /* Configure the USART1 clock source */ |
EricLew | 0:80ee8f3b695e | 339 | __HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection); |
EricLew | 0:80ee8f3b695e | 340 | } |
EricLew | 0:80ee8f3b695e | 341 | |
EricLew | 0:80ee8f3b695e | 342 | /*-------------------------- USART2 clock source configuration -------------------*/ |
EricLew | 0:80ee8f3b695e | 343 | if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2) |
EricLew | 0:80ee8f3b695e | 344 | { |
EricLew | 0:80ee8f3b695e | 345 | /* Check the parameters */ |
EricLew | 0:80ee8f3b695e | 346 | assert_param(IS_RCC_USART2CLKSOURCE(PeriphClkInit->Usart2ClockSelection)); |
EricLew | 0:80ee8f3b695e | 347 | |
EricLew | 0:80ee8f3b695e | 348 | /* Configure the USART2 clock source */ |
EricLew | 0:80ee8f3b695e | 349 | __HAL_RCC_USART2_CONFIG(PeriphClkInit->Usart2ClockSelection); |
EricLew | 0:80ee8f3b695e | 350 | } |
EricLew | 0:80ee8f3b695e | 351 | |
EricLew | 0:80ee8f3b695e | 352 | /*-------------------------- USART3 clock source configuration -------------------*/ |
EricLew | 0:80ee8f3b695e | 353 | if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3) |
EricLew | 0:80ee8f3b695e | 354 | { |
EricLew | 0:80ee8f3b695e | 355 | /* Check the parameters */ |
EricLew | 0:80ee8f3b695e | 356 | assert_param(IS_RCC_USART3CLKSOURCE(PeriphClkInit->Usart3ClockSelection)); |
EricLew | 0:80ee8f3b695e | 357 | |
EricLew | 0:80ee8f3b695e | 358 | /* Configure the USART3 clock source */ |
EricLew | 0:80ee8f3b695e | 359 | __HAL_RCC_USART3_CONFIG(PeriphClkInit->Usart3ClockSelection); |
EricLew | 0:80ee8f3b695e | 360 | } |
EricLew | 0:80ee8f3b695e | 361 | |
EricLew | 0:80ee8f3b695e | 362 | /*-------------------------- UART4 clock source configuration --------------------*/ |
EricLew | 0:80ee8f3b695e | 363 | if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART4) == RCC_PERIPHCLK_UART4) |
EricLew | 0:80ee8f3b695e | 364 | { |
EricLew | 0:80ee8f3b695e | 365 | /* Check the parameters */ |
EricLew | 0:80ee8f3b695e | 366 | assert_param(IS_RCC_UART4CLKSOURCE(PeriphClkInit->Uart4ClockSelection)); |
EricLew | 0:80ee8f3b695e | 367 | |
EricLew | 0:80ee8f3b695e | 368 | /* Configure the UART4 clock source */ |
EricLew | 0:80ee8f3b695e | 369 | __HAL_RCC_UART4_CONFIG(PeriphClkInit->Uart4ClockSelection); |
EricLew | 0:80ee8f3b695e | 370 | } |
EricLew | 0:80ee8f3b695e | 371 | |
EricLew | 0:80ee8f3b695e | 372 | /*-------------------------- UART5 clock source configuration --------------------*/ |
EricLew | 0:80ee8f3b695e | 373 | if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART5) == RCC_PERIPHCLK_UART5) |
EricLew | 0:80ee8f3b695e | 374 | { |
EricLew | 0:80ee8f3b695e | 375 | /* Check the parameters */ |
EricLew | 0:80ee8f3b695e | 376 | assert_param(IS_RCC_UART5CLKSOURCE(PeriphClkInit->Uart5ClockSelection)); |
EricLew | 0:80ee8f3b695e | 377 | |
EricLew | 0:80ee8f3b695e | 378 | /* Configure the UART5 clock source */ |
EricLew | 0:80ee8f3b695e | 379 | __HAL_RCC_UART5_CONFIG(PeriphClkInit->Uart5ClockSelection); |
EricLew | 0:80ee8f3b695e | 380 | } |
EricLew | 0:80ee8f3b695e | 381 | |
EricLew | 0:80ee8f3b695e | 382 | /*-------------------------- LPUART1 clock source configuration ------------------*/ |
EricLew | 0:80ee8f3b695e | 383 | if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPUART1) == RCC_PERIPHCLK_LPUART1) |
EricLew | 0:80ee8f3b695e | 384 | { |
EricLew | 0:80ee8f3b695e | 385 | /* Check the parameters */ |
EricLew | 0:80ee8f3b695e | 386 | assert_param(IS_RCC_LPUART1CLKSOURCE(PeriphClkInit->Lpuart1ClockSelection)); |
EricLew | 0:80ee8f3b695e | 387 | |
EricLew | 0:80ee8f3b695e | 388 | /* Configure the LPUAR1 clock source */ |
EricLew | 0:80ee8f3b695e | 389 | __HAL_RCC_LPUART1_CONFIG(PeriphClkInit->Lpuart1ClockSelection); |
EricLew | 0:80ee8f3b695e | 390 | } |
EricLew | 0:80ee8f3b695e | 391 | |
EricLew | 0:80ee8f3b695e | 392 | /*-------------------------- LPTIM1 clock source configuration -------------------*/ |
EricLew | 0:80ee8f3b695e | 393 | if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM1) == (RCC_PERIPHCLK_LPTIM1)) |
EricLew | 0:80ee8f3b695e | 394 | { |
EricLew | 0:80ee8f3b695e | 395 | assert_param(IS_RCC_LPTIM1CLK(PeriphClkInit->Lptim1ClockSelection)); |
EricLew | 0:80ee8f3b695e | 396 | __HAL_RCC_LPTIM1_CONFIG(PeriphClkInit->Lptim1ClockSelection); |
EricLew | 0:80ee8f3b695e | 397 | } |
EricLew | 0:80ee8f3b695e | 398 | |
EricLew | 0:80ee8f3b695e | 399 | /*-------------------------- LPTIM2 clock source configuration -------------------*/ |
EricLew | 0:80ee8f3b695e | 400 | if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM2) == (RCC_PERIPHCLK_LPTIM2)) |
EricLew | 0:80ee8f3b695e | 401 | { |
EricLew | 0:80ee8f3b695e | 402 | assert_param(IS_RCC_LPTIM2CLK(PeriphClkInit->Lptim2ClockSelection)); |
EricLew | 0:80ee8f3b695e | 403 | __HAL_RCC_LPTIM2_CONFIG(PeriphClkInit->Lptim2ClockSelection); |
EricLew | 0:80ee8f3b695e | 404 | } |
EricLew | 0:80ee8f3b695e | 405 | |
EricLew | 0:80ee8f3b695e | 406 | /*-------------------------- I2C1 clock source configuration ---------------------*/ |
EricLew | 0:80ee8f3b695e | 407 | if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) |
EricLew | 0:80ee8f3b695e | 408 | { |
EricLew | 0:80ee8f3b695e | 409 | /* Check the parameters */ |
EricLew | 0:80ee8f3b695e | 410 | assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection)); |
EricLew | 0:80ee8f3b695e | 411 | |
EricLew | 0:80ee8f3b695e | 412 | /* Configure the I2C1 clock source */ |
EricLew | 0:80ee8f3b695e | 413 | __HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection); |
EricLew | 0:80ee8f3b695e | 414 | } |
EricLew | 0:80ee8f3b695e | 415 | |
EricLew | 0:80ee8f3b695e | 416 | /*-------------------------- I2C2 clock source configuration ---------------------*/ |
EricLew | 0:80ee8f3b695e | 417 | if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2) |
EricLew | 0:80ee8f3b695e | 418 | { |
EricLew | 0:80ee8f3b695e | 419 | /* Check the parameters */ |
EricLew | 0:80ee8f3b695e | 420 | assert_param(IS_RCC_I2C2CLKSOURCE(PeriphClkInit->I2c2ClockSelection)); |
EricLew | 0:80ee8f3b695e | 421 | |
EricLew | 0:80ee8f3b695e | 422 | /* Configure the I2C2 clock source */ |
EricLew | 0:80ee8f3b695e | 423 | __HAL_RCC_I2C2_CONFIG(PeriphClkInit->I2c2ClockSelection); |
EricLew | 0:80ee8f3b695e | 424 | } |
EricLew | 0:80ee8f3b695e | 425 | |
EricLew | 0:80ee8f3b695e | 426 | /*-------------------------- I2C3 clock source configuration ---------------------*/ |
EricLew | 0:80ee8f3b695e | 427 | if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3) |
EricLew | 0:80ee8f3b695e | 428 | { |
EricLew | 0:80ee8f3b695e | 429 | /* Check the parameters */ |
EricLew | 0:80ee8f3b695e | 430 | assert_param(IS_RCC_I2C3CLKSOURCE(PeriphClkInit->I2c3ClockSelection)); |
EricLew | 0:80ee8f3b695e | 431 | |
EricLew | 0:80ee8f3b695e | 432 | /* Configure the I2C3 clock source */ |
EricLew | 0:80ee8f3b695e | 433 | __HAL_RCC_I2C3_CONFIG(PeriphClkInit->I2c3ClockSelection); |
EricLew | 0:80ee8f3b695e | 434 | } |
EricLew | 0:80ee8f3b695e | 435 | |
EricLew | 0:80ee8f3b695e | 436 | #if defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) |
EricLew | 0:80ee8f3b695e | 437 | /*-------------------------- USB clock source configuration ----------------------*/ |
EricLew | 0:80ee8f3b695e | 438 | if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == (RCC_PERIPHCLK_USB)) |
EricLew | 0:80ee8f3b695e | 439 | { |
EricLew | 0:80ee8f3b695e | 440 | assert_param(IS_RCC_USBCLKSOURCE(PeriphClkInit->UsbClockSelection)); |
EricLew | 0:80ee8f3b695e | 441 | __HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection); |
EricLew | 0:80ee8f3b695e | 442 | |
EricLew | 0:80ee8f3b695e | 443 | if(PeriphClkInit->UsbClockSelection == RCC_USBCLKSOURCE_PLL) |
EricLew | 0:80ee8f3b695e | 444 | { |
EricLew | 0:80ee8f3b695e | 445 | /* Enable PLL48M1CLK output */ |
EricLew | 0:80ee8f3b695e | 446 | __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_48M1CLK); |
EricLew | 0:80ee8f3b695e | 447 | } |
EricLew | 0:80ee8f3b695e | 448 | else if(PeriphClkInit->UsbClockSelection == RCC_USBCLKSOURCE_PLLSAI1) |
EricLew | 0:80ee8f3b695e | 449 | { |
EricLew | 0:80ee8f3b695e | 450 | /* PLLSAI1 parameters N & Q configuration and clock output (PLLSAI1ClockOut) */ |
EricLew | 0:80ee8f3b695e | 451 | ret = RCCEx_PLLSAI1_ConfigNQ(&(PeriphClkInit->PLLSAI1)); |
EricLew | 0:80ee8f3b695e | 452 | |
EricLew | 0:80ee8f3b695e | 453 | if(ret != HAL_OK) |
EricLew | 0:80ee8f3b695e | 454 | { |
EricLew | 0:80ee8f3b695e | 455 | /* set overall return value */ |
EricLew | 0:80ee8f3b695e | 456 | status = ret; |
EricLew | 0:80ee8f3b695e | 457 | } |
EricLew | 0:80ee8f3b695e | 458 | } |
EricLew | 0:80ee8f3b695e | 459 | } |
EricLew | 0:80ee8f3b695e | 460 | #endif /* STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */ |
EricLew | 0:80ee8f3b695e | 461 | |
EricLew | 0:80ee8f3b695e | 462 | /*-------------------------- SDMMC1 clock source configuration -------------------*/ |
EricLew | 0:80ee8f3b695e | 463 | if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDMMC1) == (RCC_PERIPHCLK_SDMMC1)) |
EricLew | 0:80ee8f3b695e | 464 | { |
EricLew | 0:80ee8f3b695e | 465 | assert_param(IS_RCC_SDMMC1CLKSOURCE(PeriphClkInit->Sdmmc1ClockSelection)); |
EricLew | 0:80ee8f3b695e | 466 | __HAL_RCC_SDMMC1_CONFIG(PeriphClkInit->Sdmmc1ClockSelection); |
EricLew | 0:80ee8f3b695e | 467 | |
EricLew | 0:80ee8f3b695e | 468 | if(PeriphClkInit->Sdmmc1ClockSelection == RCC_SDMMC1CLKSOURCE_PLL) |
EricLew | 0:80ee8f3b695e | 469 | { |
EricLew | 0:80ee8f3b695e | 470 | /* Enable PLL48M1CLK output */ |
EricLew | 0:80ee8f3b695e | 471 | __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_48M1CLK); |
EricLew | 0:80ee8f3b695e | 472 | } |
EricLew | 0:80ee8f3b695e | 473 | else if(PeriphClkInit->Sdmmc1ClockSelection == RCC_SDMMC1CLKSOURCE_PLLSAI1) |
EricLew | 0:80ee8f3b695e | 474 | { |
EricLew | 0:80ee8f3b695e | 475 | /* PLLSAI1 parameters N & Q configuration and clock output (PLLSAI1ClockOut) */ |
EricLew | 0:80ee8f3b695e | 476 | ret = RCCEx_PLLSAI1_ConfigNQ(&(PeriphClkInit->PLLSAI1)); |
EricLew | 0:80ee8f3b695e | 477 | |
EricLew | 0:80ee8f3b695e | 478 | if(ret != HAL_OK) |
EricLew | 0:80ee8f3b695e | 479 | { |
EricLew | 0:80ee8f3b695e | 480 | /* set overall return value */ |
EricLew | 0:80ee8f3b695e | 481 | status = ret; |
EricLew | 0:80ee8f3b695e | 482 | } |
EricLew | 0:80ee8f3b695e | 483 | } |
EricLew | 0:80ee8f3b695e | 484 | } |
EricLew | 0:80ee8f3b695e | 485 | |
EricLew | 0:80ee8f3b695e | 486 | /*-------------------------- RNG clock source configuration ----------------------*/ |
EricLew | 0:80ee8f3b695e | 487 | if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RNG) == (RCC_PERIPHCLK_RNG)) |
EricLew | 0:80ee8f3b695e | 488 | { |
EricLew | 0:80ee8f3b695e | 489 | assert_param(IS_RCC_RNGCLKSOURCE(PeriphClkInit->RngClockSelection)); |
EricLew | 0:80ee8f3b695e | 490 | __HAL_RCC_RNG_CONFIG(PeriphClkInit->RngClockSelection); |
EricLew | 0:80ee8f3b695e | 491 | |
EricLew | 0:80ee8f3b695e | 492 | if(PeriphClkInit->RngClockSelection == RCC_RNGCLKSOURCE_PLL) |
EricLew | 0:80ee8f3b695e | 493 | { |
EricLew | 0:80ee8f3b695e | 494 | /* Enable PLL48M1CLK output */ |
EricLew | 0:80ee8f3b695e | 495 | __HAL_RCC_PLLCLKOUT_ENABLE(RCC_PLL_48M1CLK); |
EricLew | 0:80ee8f3b695e | 496 | } |
EricLew | 0:80ee8f3b695e | 497 | else if(PeriphClkInit->RngClockSelection == RCC_RNGCLKSOURCE_PLLSAI1) |
EricLew | 0:80ee8f3b695e | 498 | { |
EricLew | 0:80ee8f3b695e | 499 | /* PLLSAI1 parameters N & Q configuration and clock output (PLLSAI1ClockOut) */ |
EricLew | 0:80ee8f3b695e | 500 | ret = RCCEx_PLLSAI1_ConfigNQ(&(PeriphClkInit->PLLSAI1)); |
EricLew | 0:80ee8f3b695e | 501 | |
EricLew | 0:80ee8f3b695e | 502 | if(ret != HAL_OK) |
EricLew | 0:80ee8f3b695e | 503 | { |
EricLew | 0:80ee8f3b695e | 504 | /* set overall return value */ |
EricLew | 0:80ee8f3b695e | 505 | status = ret; |
EricLew | 0:80ee8f3b695e | 506 | } |
EricLew | 0:80ee8f3b695e | 507 | } |
EricLew | 0:80ee8f3b695e | 508 | } |
EricLew | 0:80ee8f3b695e | 509 | |
EricLew | 0:80ee8f3b695e | 510 | /*-------------------------- ADC clock source configuration ----------------------*/ |
EricLew | 0:80ee8f3b695e | 511 | if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC) |
EricLew | 0:80ee8f3b695e | 512 | { |
EricLew | 0:80ee8f3b695e | 513 | /* Check the parameters */ |
EricLew | 0:80ee8f3b695e | 514 | assert_param(IS_RCC_ADCCLKSOURCE(PeriphClkInit->AdcClockSelection)); |
EricLew | 0:80ee8f3b695e | 515 | |
EricLew | 0:80ee8f3b695e | 516 | /* Configure the ADC interface clock source */ |
EricLew | 0:80ee8f3b695e | 517 | __HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection); |
EricLew | 0:80ee8f3b695e | 518 | |
EricLew | 0:80ee8f3b695e | 519 | if(PeriphClkInit->AdcClockSelection == RCC_ADCCLKSOURCE_PLLSAI1) |
EricLew | 0:80ee8f3b695e | 520 | { |
EricLew | 0:80ee8f3b695e | 521 | /* PLLSAI1 parameters N & R configuration and clock output (PLLSAI1ClockOut) */ |
EricLew | 0:80ee8f3b695e | 522 | ret = RCCEx_PLLSAI1_ConfigNR(&(PeriphClkInit->PLLSAI1)); |
EricLew | 0:80ee8f3b695e | 523 | |
EricLew | 0:80ee8f3b695e | 524 | if(ret != HAL_OK) |
EricLew | 0:80ee8f3b695e | 525 | { |
EricLew | 0:80ee8f3b695e | 526 | /* set overall return value */ |
EricLew | 0:80ee8f3b695e | 527 | status = ret; |
EricLew | 0:80ee8f3b695e | 528 | } |
EricLew | 0:80ee8f3b695e | 529 | } |
EricLew | 0:80ee8f3b695e | 530 | else if(PeriphClkInit->AdcClockSelection == RCC_ADCCLKSOURCE_PLLSAI2) |
EricLew | 0:80ee8f3b695e | 531 | { |
EricLew | 0:80ee8f3b695e | 532 | /* PLLSAI2 parameters N & R configuration and clock output (PLLSAI2ClockOut) */ |
EricLew | 0:80ee8f3b695e | 533 | ret = RCCEx_PLLSAI2_ConfigNR(&(PeriphClkInit->PLLSAI2)); |
EricLew | 0:80ee8f3b695e | 534 | |
EricLew | 0:80ee8f3b695e | 535 | if(ret != HAL_OK) |
EricLew | 0:80ee8f3b695e | 536 | { |
EricLew | 0:80ee8f3b695e | 537 | /* set overall return value */ |
EricLew | 0:80ee8f3b695e | 538 | status = ret; |
EricLew | 0:80ee8f3b695e | 539 | } |
EricLew | 0:80ee8f3b695e | 540 | } |
EricLew | 0:80ee8f3b695e | 541 | } |
EricLew | 0:80ee8f3b695e | 542 | |
EricLew | 0:80ee8f3b695e | 543 | /*-------------------------- SWPMI1 clock source configuration -------------------*/ |
EricLew | 0:80ee8f3b695e | 544 | if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SWPMI1) == RCC_PERIPHCLK_SWPMI1) |
EricLew | 0:80ee8f3b695e | 545 | { |
EricLew | 0:80ee8f3b695e | 546 | /* Check the parameters */ |
EricLew | 0:80ee8f3b695e | 547 | assert_param(IS_RCC_SWPMI1CLKSOURCE(PeriphClkInit->Swpmi1ClockSelection)); |
EricLew | 0:80ee8f3b695e | 548 | |
EricLew | 0:80ee8f3b695e | 549 | /* Configure the SWPMI1 clock source */ |
EricLew | 0:80ee8f3b695e | 550 | __HAL_RCC_SWPMI1_CONFIG(PeriphClkInit->Swpmi1ClockSelection); |
EricLew | 0:80ee8f3b695e | 551 | } |
EricLew | 0:80ee8f3b695e | 552 | |
EricLew | 0:80ee8f3b695e | 553 | /*-------------------------- DFSDM clock source configuration --------------------*/ |
EricLew | 0:80ee8f3b695e | 554 | if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_DFSDM) == RCC_PERIPHCLK_DFSDM) |
EricLew | 0:80ee8f3b695e | 555 | { |
EricLew | 0:80ee8f3b695e | 556 | /* Check the parameters */ |
EricLew | 0:80ee8f3b695e | 557 | assert_param(IS_RCC_DFSDMCLKSOURCE(PeriphClkInit->DfsdmClockSelection)); |
EricLew | 0:80ee8f3b695e | 558 | |
EricLew | 0:80ee8f3b695e | 559 | /* Configure the DFSDM interface clock source */ |
EricLew | 0:80ee8f3b695e | 560 | __HAL_RCC_DFSDM_CONFIG(PeriphClkInit->DfsdmClockSelection); |
EricLew | 0:80ee8f3b695e | 561 | } |
EricLew | 0:80ee8f3b695e | 562 | |
EricLew | 0:80ee8f3b695e | 563 | return status; |
EricLew | 0:80ee8f3b695e | 564 | } |
EricLew | 0:80ee8f3b695e | 565 | |
EricLew | 0:80ee8f3b695e | 566 | /** |
EricLew | 0:80ee8f3b695e | 567 | * @brief Get the RCC_ClkInitStruct according to the internal RCC configuration registers. |
EricLew | 0:80ee8f3b695e | 568 | * @param PeriphClkInit pointer to an RCC_PeriphCLKInitTypeDef structure that |
EricLew | 0:80ee8f3b695e | 569 | * returns the configuration information for the Extended Peripherals |
EricLew | 0:80ee8f3b695e | 570 | * clocks(SAI1, SAI2, LPTIM1, LPTIM2, I2C1, I2C2, I2C3, LPUART, |
EricLew | 0:80ee8f3b695e | 571 | * USART1, USART2, USART3, UART4, UART5, RTC, ADCx, DFSDMx, SWPMI1, USB, SDMMC1 and RNG). |
EricLew | 0:80ee8f3b695e | 572 | * @retval None |
EricLew | 0:80ee8f3b695e | 573 | */ |
EricLew | 0:80ee8f3b695e | 574 | void HAL_RCCEx_GetPeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) |
EricLew | 0:80ee8f3b695e | 575 | { |
EricLew | 0:80ee8f3b695e | 576 | /* Set all possible values for the extended clock type parameter------------*/ |
EricLew | 0:80ee8f3b695e | 577 | |
EricLew | 0:80ee8f3b695e | 578 | #if defined(STM32L471xx) |
EricLew | 0:80ee8f3b695e | 579 | |
EricLew | 0:80ee8f3b695e | 580 | PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCLK_USART3 | RCC_PERIPHCLK_UART4 | RCC_PERIPHCLK_UART5 | \ |
EricLew | 0:80ee8f3b695e | 581 | RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK_I2C2 | RCC_PERIPHCLK_I2C3 | RCC_PERIPHCLK_LPTIM1 | \ |
EricLew | 0:80ee8f3b695e | 582 | RCC_PERIPHCLK_LPTIM2 | RCC_PERIPHCLK_SAI1 | RCC_PERIPHCLK_SAI2 | RCC_PERIPHCLK_SDMMC1 | \ |
EricLew | 0:80ee8f3b695e | 583 | RCC_PERIPHCLK_RNG | RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_SWPMI1 | RCC_PERIPHCLK_DFSDM | RCC_PERIPHCLK_RTC ; |
EricLew | 0:80ee8f3b695e | 584 | |
EricLew | 0:80ee8f3b695e | 585 | #else /* defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) */ |
EricLew | 0:80ee8f3b695e | 586 | |
EricLew | 0:80ee8f3b695e | 587 | PeriphClkInit->PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2 | RCC_PERIPHCLK_USART3 | RCC_PERIPHCLK_UART4 | RCC_PERIPHCLK_UART5 | \ |
EricLew | 0:80ee8f3b695e | 588 | RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_I2C1 | RCC_PERIPHCLK_I2C2 | RCC_PERIPHCLK_I2C3 | RCC_PERIPHCLK_LPTIM1 | \ |
EricLew | 0:80ee8f3b695e | 589 | RCC_PERIPHCLK_LPTIM2 | RCC_PERIPHCLK_SAI1 | RCC_PERIPHCLK_SAI2 | RCC_PERIPHCLK_USB | RCC_PERIPHCLK_SDMMC1 | \ |
EricLew | 0:80ee8f3b695e | 590 | RCC_PERIPHCLK_RNG | RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_SWPMI1 | RCC_PERIPHCLK_DFSDM | RCC_PERIPHCLK_RTC ; |
EricLew | 0:80ee8f3b695e | 591 | |
EricLew | 0:80ee8f3b695e | 592 | #endif /* STM32L471xx */ |
EricLew | 0:80ee8f3b695e | 593 | |
EricLew | 0:80ee8f3b695e | 594 | /* Get the PLLSAI1 Clock configuration -----------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 595 | PeriphClkInit->PLLSAI1.PLLSAI1N = (uint32_t)((RCC->PLLSAI1CFGR & RCC_PLLSAI1CFGR_PLLSAI1N) >> POSITION_VAL(RCC_PLLSAI1CFGR_PLLSAI1N)); |
EricLew | 0:80ee8f3b695e | 596 | PeriphClkInit->PLLSAI1.PLLSAI1P = (uint32_t)(((RCC->PLLSAI1CFGR & RCC_PLLSAI1CFGR_PLLSAI1P) >> POSITION_VAL(RCC_PLLSAI1CFGR_PLLSAI1P)) << 4)+7; |
EricLew | 0:80ee8f3b695e | 597 | PeriphClkInit->PLLSAI1.PLLSAI1R = (uint32_t)(((RCC->PLLSAI1CFGR & RCC_PLLSAI1CFGR_PLLSAI1R) >> POSITION_VAL(RCC_PLLSAI1CFGR_PLLSAI1R))+1)* 2; |
EricLew | 0:80ee8f3b695e | 598 | PeriphClkInit->PLLSAI1.PLLSAI1Q = (uint32_t)(((RCC->PLLSAI1CFGR & RCC_PLLSAI1CFGR_PLLSAI1Q) >> POSITION_VAL(RCC_PLLSAI1CFGR_PLLSAI1Q))+1)* 2; |
EricLew | 0:80ee8f3b695e | 599 | /* Get the PLLSAI2 Clock configuration -----------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 600 | PeriphClkInit->PLLSAI2.PLLSAI2N = (uint32_t)((RCC->PLLSAI2CFGR & RCC_PLLSAI2CFGR_PLLSAI2N) >> POSITION_VAL(RCC_PLLSAI2CFGR_PLLSAI2N)); |
EricLew | 0:80ee8f3b695e | 601 | PeriphClkInit->PLLSAI2.PLLSAI2P = (uint32_t)(((RCC->PLLSAI2CFGR & RCC_PLLSAI2CFGR_PLLSAI2P) >> POSITION_VAL(RCC_PLLSAI2CFGR_PLLSAI2P)) << 4)+7; |
EricLew | 0:80ee8f3b695e | 602 | PeriphClkInit->PLLSAI2.PLLSAI2R = (uint32_t)(((RCC->PLLSAI2CFGR & RCC_PLLSAI2CFGR_PLLSAI2R)>> POSITION_VAL(RCC_PLLSAI2CFGR_PLLSAI2R))+1)* 2; |
EricLew | 0:80ee8f3b695e | 603 | |
EricLew | 0:80ee8f3b695e | 604 | /* Get the USART1 clock source ---------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 605 | PeriphClkInit->Usart1ClockSelection = __HAL_RCC_GET_USART1_SOURCE(); |
EricLew | 0:80ee8f3b695e | 606 | /* Get the USART2 clock source ---------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 607 | PeriphClkInit->Usart2ClockSelection = __HAL_RCC_GET_USART2_SOURCE(); |
EricLew | 0:80ee8f3b695e | 608 | /* Get the USART3 clock source ---------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 609 | PeriphClkInit->Usart3ClockSelection = __HAL_RCC_GET_USART3_SOURCE(); |
EricLew | 0:80ee8f3b695e | 610 | /* Get the UART4 clock source ----------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 611 | PeriphClkInit->Uart4ClockSelection = __HAL_RCC_GET_UART4_SOURCE(); |
EricLew | 0:80ee8f3b695e | 612 | /* Get the UART5 clock source ----------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 613 | PeriphClkInit->Uart5ClockSelection = __HAL_RCC_GET_UART5_SOURCE(); |
EricLew | 0:80ee8f3b695e | 614 | /* Get the LPUART1 clock source --------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 615 | PeriphClkInit->Lpuart1ClockSelection = __HAL_RCC_GET_LPUART1_SOURCE(); |
EricLew | 0:80ee8f3b695e | 616 | /* Get the I2C1 clock source -----------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 617 | PeriphClkInit->I2c1ClockSelection = __HAL_RCC_GET_I2C1_SOURCE(); |
EricLew | 0:80ee8f3b695e | 618 | /* Get the I2C2 clock source ----------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 619 | PeriphClkInit->I2c2ClockSelection = __HAL_RCC_GET_I2C2_SOURCE(); |
EricLew | 0:80ee8f3b695e | 620 | /* Get the I2C3 clock source -----------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 621 | PeriphClkInit->I2c3ClockSelection = __HAL_RCC_GET_I2C3_SOURCE(); |
EricLew | 0:80ee8f3b695e | 622 | /* Get the LPTIM1 clock source ---------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 623 | PeriphClkInit->Lptim1ClockSelection = __HAL_RCC_GET_LPTIM1_SOURCE(); |
EricLew | 0:80ee8f3b695e | 624 | /* Get the LPTIM2 clock source ---------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 625 | PeriphClkInit->Lptim2ClockSelection = __HAL_RCC_GET_LPTIM2_SOURCE(); |
EricLew | 0:80ee8f3b695e | 626 | /* Get the SAI1 clock source -----------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 627 | PeriphClkInit->Sai1ClockSelection = __HAL_RCC_GET_SAI1_SOURCE(); |
EricLew | 0:80ee8f3b695e | 628 | /* Get the SAI2 clock source -----------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 629 | PeriphClkInit->Sai2ClockSelection = __HAL_RCC_GET_SAI2_SOURCE(); |
EricLew | 0:80ee8f3b695e | 630 | /* Get the RTC clock source ------------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 631 | PeriphClkInit->RTCClockSelection = __HAL_RCC_GET_RTC_SOURCE(); |
EricLew | 0:80ee8f3b695e | 632 | |
EricLew | 0:80ee8f3b695e | 633 | #if defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) |
EricLew | 0:80ee8f3b695e | 634 | /* Get the USB clock source ------------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 635 | PeriphClkInit->UsbClockSelection = __HAL_RCC_GET_USB_SOURCE(); |
EricLew | 0:80ee8f3b695e | 636 | #endif /* STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */ |
EricLew | 0:80ee8f3b695e | 637 | |
EricLew | 0:80ee8f3b695e | 638 | /* Get the SDMMC1 clock source ---------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 639 | PeriphClkInit->Sdmmc1ClockSelection = __HAL_RCC_GET_SDMMC1_SOURCE(); |
EricLew | 0:80ee8f3b695e | 640 | /* Get the RNG clock source ------------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 641 | PeriphClkInit->RngClockSelection = __HAL_RCC_GET_RNG_SOURCE(); |
EricLew | 0:80ee8f3b695e | 642 | /* Get the ADC clock source -----------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 643 | PeriphClkInit->AdcClockSelection = __HAL_RCC_GET_ADC_SOURCE(); |
EricLew | 0:80ee8f3b695e | 644 | /* Get the SWPMI1 clock source ----------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 645 | PeriphClkInit->Swpmi1ClockSelection = __HAL_RCC_GET_SWPMI1_SOURCE(); |
EricLew | 0:80ee8f3b695e | 646 | /* Get the DFSDM clock source -------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 647 | PeriphClkInit->DfsdmClockSelection = __HAL_RCC_GET_DFSDM_SOURCE(); |
EricLew | 0:80ee8f3b695e | 648 | } |
EricLew | 0:80ee8f3b695e | 649 | |
EricLew | 0:80ee8f3b695e | 650 | /** |
EricLew | 0:80ee8f3b695e | 651 | * @brief Return the peripheral clock frequency for peripherals with clock source from PLLSAIs |
EricLew | 0:80ee8f3b695e | 652 | * @note Return 0 if peripheral clock identifier not managed by this API |
EricLew | 0:80ee8f3b695e | 653 | * @param PeriphClk Peripheral clock identifier |
EricLew | 0:80ee8f3b695e | 654 | * This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 655 | * @arg @ref RCC_PERIPHCLK_RTC RTC peripheral clock |
EricLew | 0:80ee8f3b695e | 656 | * @arg @ref RCC_PERIPHCLK_ADC ADC peripheral clock |
EricLew | 0:80ee8f3b695e | 657 | * @arg @ref RCC_PERIPHCLK_DFSDM DFSDM peripheral clock |
EricLew | 0:80ee8f3b695e | 658 | * @arg @ref RCC_PERIPHCLK_I2C1 I2C1 peripheral clock |
EricLew | 0:80ee8f3b695e | 659 | * @arg @ref RCC_PERIPHCLK_I2C2 I2C2 peripheral clock |
EricLew | 0:80ee8f3b695e | 660 | * @arg @ref RCC_PERIPHCLK_I2C3 I2C3 peripheral clock |
EricLew | 0:80ee8f3b695e | 661 | * @arg @ref RCC_PERIPHCLK_LPTIM1 LPTIM1 peripheral clock |
EricLew | 0:80ee8f3b695e | 662 | * @arg @ref RCC_PERIPHCLK_LPTIM2 LPTIM2 peripheral clock |
EricLew | 0:80ee8f3b695e | 663 | * @arg @ref RCC_PERIPHCLK_LPUART1 LPUART1 peripheral clock |
EricLew | 0:80ee8f3b695e | 664 | * @arg @ref RCC_PERIPHCLK_RNG RNG peripheral clock |
EricLew | 0:80ee8f3b695e | 665 | * @arg @ref RCC_PERIPHCLK_SAI1 SAI1 peripheral clock |
EricLew | 0:80ee8f3b695e | 666 | * @arg @ref RCC_PERIPHCLK_SAI2 SAI2 peripheral clock |
EricLew | 0:80ee8f3b695e | 667 | * @arg @ref RCC_PERIPHCLK_SDMMC1 SDMMC1 peripheral clock |
EricLew | 0:80ee8f3b695e | 668 | * @arg @ref RCC_PERIPHCLK_SWPMI1 SWPMI1 peripheral clock |
EricLew | 0:80ee8f3b695e | 669 | * @arg @ref RCC_PERIPHCLK_USART1 USART1 peripheral clock |
EricLew | 0:80ee8f3b695e | 670 | * @arg @ref RCC_PERIPHCLK_USART2 USART1 peripheral clock |
EricLew | 0:80ee8f3b695e | 671 | * @arg @ref RCC_PERIPHCLK_USART3 USART1 peripheral clock |
EricLew | 0:80ee8f3b695e | 672 | * @arg @ref RCC_PERIPHCLK_UART4 USART1 peripheral clock |
EricLew | 0:80ee8f3b695e | 673 | * @arg @ref RCC_PERIPHCLK_UART5 USART1 peripheral clock |
EricLew | 0:80ee8f3b695e | 674 | * @arg @ref RCC_PERIPHCLK_USB USB peripheral clock (only for devices with USB) |
EricLew | 0:80ee8f3b695e | 675 | * @retval Frequency in Hz |
EricLew | 0:80ee8f3b695e | 676 | */ |
EricLew | 0:80ee8f3b695e | 677 | uint32_t HAL_RCCEx_GetPeriphCLKFreq(uint32_t PeriphClk) |
EricLew | 0:80ee8f3b695e | 678 | { |
EricLew | 0:80ee8f3b695e | 679 | uint32_t frequency = 0; |
EricLew | 0:80ee8f3b695e | 680 | uint32_t srcclk = 0; |
EricLew | 0:80ee8f3b695e | 681 | uint32_t pllvco = 0, plln = 0, pllp = 0; |
EricLew | 0:80ee8f3b695e | 682 | |
EricLew | 0:80ee8f3b695e | 683 | /* Check the parameters */ |
EricLew | 0:80ee8f3b695e | 684 | assert_param(IS_RCC_PERIPHCLOCK(PeriphClk)); |
EricLew | 0:80ee8f3b695e | 685 | |
EricLew | 0:80ee8f3b695e | 686 | if(PeriphClk == RCC_PERIPHCLK_RTC) |
EricLew | 0:80ee8f3b695e | 687 | { |
EricLew | 0:80ee8f3b695e | 688 | /* Get the current RTC source */ |
EricLew | 0:80ee8f3b695e | 689 | srcclk = __HAL_RCC_GET_RTC_SOURCE(); |
EricLew | 0:80ee8f3b695e | 690 | |
EricLew | 0:80ee8f3b695e | 691 | /* Check if LSE is ready and if RTC clock selection is LSE */ |
EricLew | 0:80ee8f3b695e | 692 | if ((srcclk == RCC_RTCCLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) |
EricLew | 0:80ee8f3b695e | 693 | { |
EricLew | 0:80ee8f3b695e | 694 | frequency = LSE_VALUE; |
EricLew | 0:80ee8f3b695e | 695 | } |
EricLew | 0:80ee8f3b695e | 696 | /* Check if LSI is ready and if RTC clock selection is LSI */ |
EricLew | 0:80ee8f3b695e | 697 | else if ((srcclk == RCC_RTCCLKSOURCE_LSI) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSIRDY))) |
EricLew | 0:80ee8f3b695e | 698 | { |
EricLew | 0:80ee8f3b695e | 699 | frequency = LSI_VALUE; |
EricLew | 0:80ee8f3b695e | 700 | } |
EricLew | 0:80ee8f3b695e | 701 | /* Check if HSE is ready and if RTC clock selection is HSI_DIV32*/ |
EricLew | 0:80ee8f3b695e | 702 | else if ((srcclk == RCC_RTCCLKSOURCE_HSE_DIV32) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSERDY))) |
EricLew | 0:80ee8f3b695e | 703 | { |
EricLew | 0:80ee8f3b695e | 704 | frequency = HSE_VALUE / 32; |
EricLew | 0:80ee8f3b695e | 705 | } |
EricLew | 0:80ee8f3b695e | 706 | /* Clock not enabled for RTC*/ |
EricLew | 0:80ee8f3b695e | 707 | else |
EricLew | 0:80ee8f3b695e | 708 | { |
EricLew | 0:80ee8f3b695e | 709 | frequency = 0; |
EricLew | 0:80ee8f3b695e | 710 | } |
EricLew | 0:80ee8f3b695e | 711 | } |
EricLew | 0:80ee8f3b695e | 712 | else |
EricLew | 0:80ee8f3b695e | 713 | { |
EricLew | 0:80ee8f3b695e | 714 | /* Other external peripheral clock source than RTC */ |
EricLew | 0:80ee8f3b695e | 715 | |
EricLew | 0:80ee8f3b695e | 716 | /* Compute PLL clock input */ |
EricLew | 0:80ee8f3b695e | 717 | if(__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_MSI) /* MSI ? */ |
EricLew | 0:80ee8f3b695e | 718 | { |
EricLew | 0:80ee8f3b695e | 719 | pllvco = (1 << ((__HAL_RCC_GET_MSI_RANGE() >> 4) - 4)) * 1000000; |
EricLew | 0:80ee8f3b695e | 720 | } |
EricLew | 0:80ee8f3b695e | 721 | else if(__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI) /* HSI ? */ |
EricLew | 0:80ee8f3b695e | 722 | { |
EricLew | 0:80ee8f3b695e | 723 | pllvco = HSI_VALUE; |
EricLew | 0:80ee8f3b695e | 724 | } |
EricLew | 0:80ee8f3b695e | 725 | else if(__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE) /* HSE ? */ |
EricLew | 0:80ee8f3b695e | 726 | { |
EricLew | 0:80ee8f3b695e | 727 | pllvco = HSE_VALUE; |
EricLew | 0:80ee8f3b695e | 728 | } |
EricLew | 0:80ee8f3b695e | 729 | else /* No source */ |
EricLew | 0:80ee8f3b695e | 730 | { |
EricLew | 0:80ee8f3b695e | 731 | pllvco = 0; |
EricLew | 0:80ee8f3b695e | 732 | } |
EricLew | 0:80ee8f3b695e | 733 | |
EricLew | 0:80ee8f3b695e | 734 | /* f(PLL Source) / PLLM */ |
EricLew | 0:80ee8f3b695e | 735 | pllvco = (pllvco / ((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLM) >> 4) + 1)); |
EricLew | 0:80ee8f3b695e | 736 | |
EricLew | 0:80ee8f3b695e | 737 | switch(PeriphClk) |
EricLew | 0:80ee8f3b695e | 738 | { |
EricLew | 0:80ee8f3b695e | 739 | case RCC_PERIPHCLK_SAI1: |
EricLew | 0:80ee8f3b695e | 740 | case RCC_PERIPHCLK_SAI2: |
EricLew | 0:80ee8f3b695e | 741 | |
EricLew | 0:80ee8f3b695e | 742 | if(PeriphClk == RCC_PERIPHCLK_SAI1) |
EricLew | 0:80ee8f3b695e | 743 | { |
EricLew | 0:80ee8f3b695e | 744 | srcclk = READ_BIT(RCC->CCIPR, RCC_CCIPR_SAI1SEL); |
EricLew | 0:80ee8f3b695e | 745 | |
EricLew | 0:80ee8f3b695e | 746 | if(srcclk == RCC_SAI1CLKSOURCE_PIN) |
EricLew | 0:80ee8f3b695e | 747 | { |
EricLew | 0:80ee8f3b695e | 748 | frequency = EXTERNAL_SAI1_CLOCK_VALUE; |
EricLew | 0:80ee8f3b695e | 749 | } |
EricLew | 0:80ee8f3b695e | 750 | /* Else, PLL clock output to check below */ |
EricLew | 0:80ee8f3b695e | 751 | } |
EricLew | 0:80ee8f3b695e | 752 | else /* RCC_PERIPHCLK_SAI2 */ |
EricLew | 0:80ee8f3b695e | 753 | { |
EricLew | 0:80ee8f3b695e | 754 | srcclk = READ_BIT(RCC->CCIPR, RCC_CCIPR_SAI2SEL); |
EricLew | 0:80ee8f3b695e | 755 | |
EricLew | 0:80ee8f3b695e | 756 | if(srcclk == RCC_SAI2CLKSOURCE_PIN) |
EricLew | 0:80ee8f3b695e | 757 | { |
EricLew | 0:80ee8f3b695e | 758 | frequency = EXTERNAL_SAI2_CLOCK_VALUE; |
EricLew | 0:80ee8f3b695e | 759 | } |
EricLew | 0:80ee8f3b695e | 760 | /* Else, PLL clock output to check below */ |
EricLew | 0:80ee8f3b695e | 761 | } |
EricLew | 0:80ee8f3b695e | 762 | |
EricLew | 0:80ee8f3b695e | 763 | if(frequency == 0) |
EricLew | 0:80ee8f3b695e | 764 | { |
EricLew | 0:80ee8f3b695e | 765 | if((srcclk == RCC_SAI1CLKSOURCE_PLL) || (srcclk == RCC_SAI2CLKSOURCE_PLL)) |
EricLew | 0:80ee8f3b695e | 766 | { |
EricLew | 0:80ee8f3b695e | 767 | if(__HAL_RCC_GET_PLLCLKOUT_CONFIG(RCC_PLL_SAI3CLK) != RESET) |
EricLew | 0:80ee8f3b695e | 768 | { |
EricLew | 0:80ee8f3b695e | 769 | /* f(PLLSAI3CLK) = f(VCO input) * PLLN / PLLP */ |
EricLew | 0:80ee8f3b695e | 770 | plln = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> 8; |
EricLew | 0:80ee8f3b695e | 771 | if(READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLP) != RESET) |
EricLew | 0:80ee8f3b695e | 772 | { |
EricLew | 0:80ee8f3b695e | 773 | pllp = 17; |
EricLew | 0:80ee8f3b695e | 774 | } |
EricLew | 0:80ee8f3b695e | 775 | else |
EricLew | 0:80ee8f3b695e | 776 | { |
EricLew | 0:80ee8f3b695e | 777 | pllp = 7; |
EricLew | 0:80ee8f3b695e | 778 | } |
EricLew | 0:80ee8f3b695e | 779 | frequency = (pllvco * plln) / pllp; |
EricLew | 0:80ee8f3b695e | 780 | } |
EricLew | 0:80ee8f3b695e | 781 | } |
EricLew | 0:80ee8f3b695e | 782 | else if(srcclk == 0) /* RCC_SAI1CLKSOURCE_PLLSAI1 || RCC_SAI2CLKSOURCE_PLLSAI1 */ |
EricLew | 0:80ee8f3b695e | 783 | { |
EricLew | 0:80ee8f3b695e | 784 | if(__HAL_RCC_GET_PLLSAI1CLKOUT_CONFIG(RCC_PLLSAI1_SAI1CLK) != RESET) |
EricLew | 0:80ee8f3b695e | 785 | { |
EricLew | 0:80ee8f3b695e | 786 | /* f(PLLSAI1CLK) = f(VCOSAI1 input) * PLLSAI1N / PLLSAI1P */ |
EricLew | 0:80ee8f3b695e | 787 | plln = READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1N) >> 8; |
EricLew | 0:80ee8f3b695e | 788 | if(READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1P) != RESET) |
EricLew | 0:80ee8f3b695e | 789 | { |
EricLew | 0:80ee8f3b695e | 790 | pllp = 17; |
EricLew | 0:80ee8f3b695e | 791 | } |
EricLew | 0:80ee8f3b695e | 792 | else |
EricLew | 0:80ee8f3b695e | 793 | { |
EricLew | 0:80ee8f3b695e | 794 | pllp = 7; |
EricLew | 0:80ee8f3b695e | 795 | } |
EricLew | 0:80ee8f3b695e | 796 | frequency = (pllvco * plln) / pllp; |
EricLew | 0:80ee8f3b695e | 797 | } |
EricLew | 0:80ee8f3b695e | 798 | } |
EricLew | 0:80ee8f3b695e | 799 | else if((srcclk == RCC_SAI1CLKSOURCE_PLLSAI2) || (srcclk == RCC_SAI2CLKSOURCE_PLLSAI2)) |
EricLew | 0:80ee8f3b695e | 800 | { |
EricLew | 0:80ee8f3b695e | 801 | if(__HAL_RCC_GET_PLLSAI2CLKOUT_CONFIG(RCC_PLLSAI2_SAI2CLK) != RESET) |
EricLew | 0:80ee8f3b695e | 802 | { |
EricLew | 0:80ee8f3b695e | 803 | /* f(PLLSAI2CLK) = f(VCOSAI2 input) * PLLSAI2N / PLLSAI2P */ |
EricLew | 0:80ee8f3b695e | 804 | plln = READ_BIT(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2N) >> 8; |
EricLew | 0:80ee8f3b695e | 805 | if(READ_BIT(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2P) != RESET) |
EricLew | 0:80ee8f3b695e | 806 | { |
EricLew | 0:80ee8f3b695e | 807 | pllp = 17; |
EricLew | 0:80ee8f3b695e | 808 | } |
EricLew | 0:80ee8f3b695e | 809 | else |
EricLew | 0:80ee8f3b695e | 810 | { |
EricLew | 0:80ee8f3b695e | 811 | pllp = 7; |
EricLew | 0:80ee8f3b695e | 812 | } |
EricLew | 0:80ee8f3b695e | 813 | frequency = (pllvco * plln) / pllp; |
EricLew | 0:80ee8f3b695e | 814 | } |
EricLew | 0:80ee8f3b695e | 815 | } |
EricLew | 0:80ee8f3b695e | 816 | else |
EricLew | 0:80ee8f3b695e | 817 | { |
EricLew | 0:80ee8f3b695e | 818 | /* No clock source */ |
EricLew | 0:80ee8f3b695e | 819 | frequency = 0; |
EricLew | 0:80ee8f3b695e | 820 | } |
EricLew | 0:80ee8f3b695e | 821 | } |
EricLew | 0:80ee8f3b695e | 822 | break; |
EricLew | 0:80ee8f3b695e | 823 | |
EricLew | 0:80ee8f3b695e | 824 | #if defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) |
EricLew | 0:80ee8f3b695e | 825 | |
EricLew | 0:80ee8f3b695e | 826 | case RCC_PERIPHCLK_USB: |
EricLew | 0:80ee8f3b695e | 827 | |
EricLew | 0:80ee8f3b695e | 828 | #endif /* STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */ |
EricLew | 0:80ee8f3b695e | 829 | |
EricLew | 0:80ee8f3b695e | 830 | case RCC_PERIPHCLK_RNG: |
EricLew | 0:80ee8f3b695e | 831 | case RCC_PERIPHCLK_SDMMC1: |
EricLew | 0:80ee8f3b695e | 832 | |
EricLew | 0:80ee8f3b695e | 833 | srcclk = READ_BIT(RCC->CCIPR, RCC_CCIPR_CLK48SEL); |
EricLew | 0:80ee8f3b695e | 834 | |
EricLew | 0:80ee8f3b695e | 835 | if(srcclk == RCC_CCIPR_CLK48SEL) /* MSI ? */ |
EricLew | 0:80ee8f3b695e | 836 | { |
EricLew | 0:80ee8f3b695e | 837 | frequency = (1 << ((__HAL_RCC_GET_MSI_RANGE() >> 4) - 4)) * 1000000; |
EricLew | 0:80ee8f3b695e | 838 | } |
EricLew | 0:80ee8f3b695e | 839 | else if(srcclk == RCC_CCIPR_CLK48SEL_1) /* PLL ? */ |
EricLew | 0:80ee8f3b695e | 840 | { |
EricLew | 0:80ee8f3b695e | 841 | /* f(PLL48M1CLK) = f(VCO input) * PLLN / PLLQ */ |
EricLew | 0:80ee8f3b695e | 842 | plln = READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLN) >> 8; |
EricLew | 0:80ee8f3b695e | 843 | frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLCFGR, RCC_PLLCFGR_PLLQ) >> 21) + 1) << 1); |
EricLew | 0:80ee8f3b695e | 844 | } |
EricLew | 0:80ee8f3b695e | 845 | else if(srcclk == RCC_CCIPR_CLK48SEL_0) /* PLLSAI1 ? */ |
EricLew | 0:80ee8f3b695e | 846 | { |
EricLew | 0:80ee8f3b695e | 847 | /* f(PLL48M2CLK) = f(VCOSAI1 input) * PLLSAI1N / PLLSAI1Q */ |
EricLew | 0:80ee8f3b695e | 848 | plln = READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1N) >> 8; |
EricLew | 0:80ee8f3b695e | 849 | frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1Q) >> 21) + 1) << 1); |
EricLew | 0:80ee8f3b695e | 850 | } |
EricLew | 0:80ee8f3b695e | 851 | else /* No clock source */ |
EricLew | 0:80ee8f3b695e | 852 | { |
EricLew | 0:80ee8f3b695e | 853 | frequency = 0; |
EricLew | 0:80ee8f3b695e | 854 | } |
EricLew | 0:80ee8f3b695e | 855 | break; |
EricLew | 0:80ee8f3b695e | 856 | |
EricLew | 0:80ee8f3b695e | 857 | case RCC_PERIPHCLK_USART1: |
EricLew | 0:80ee8f3b695e | 858 | /* Get the current USART1 source */ |
EricLew | 0:80ee8f3b695e | 859 | srcclk = __HAL_RCC_GET_USART1_SOURCE(); |
EricLew | 0:80ee8f3b695e | 860 | |
EricLew | 0:80ee8f3b695e | 861 | if(srcclk == RCC_USART1CLKSOURCE_PCLK2) |
EricLew | 0:80ee8f3b695e | 862 | { |
EricLew | 0:80ee8f3b695e | 863 | frequency = HAL_RCC_GetPCLK2Freq(); |
EricLew | 0:80ee8f3b695e | 864 | } |
EricLew | 0:80ee8f3b695e | 865 | else if(srcclk == RCC_USART1CLKSOURCE_SYSCLK) |
EricLew | 0:80ee8f3b695e | 866 | { |
EricLew | 0:80ee8f3b695e | 867 | frequency = HAL_RCC_GetSysClockFreq(); |
EricLew | 0:80ee8f3b695e | 868 | } |
EricLew | 0:80ee8f3b695e | 869 | else if((srcclk == RCC_USART1CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) |
EricLew | 0:80ee8f3b695e | 870 | { |
EricLew | 0:80ee8f3b695e | 871 | frequency = HSI_VALUE; |
EricLew | 0:80ee8f3b695e | 872 | } |
EricLew | 0:80ee8f3b695e | 873 | else if((srcclk == RCC_USART1CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) |
EricLew | 0:80ee8f3b695e | 874 | { |
EricLew | 0:80ee8f3b695e | 875 | frequency = LSE_VALUE; |
EricLew | 0:80ee8f3b695e | 876 | } |
EricLew | 0:80ee8f3b695e | 877 | /* Clock not enabled for USART1 */ |
EricLew | 0:80ee8f3b695e | 878 | else |
EricLew | 0:80ee8f3b695e | 879 | { |
EricLew | 0:80ee8f3b695e | 880 | frequency = 0; |
EricLew | 0:80ee8f3b695e | 881 | } |
EricLew | 0:80ee8f3b695e | 882 | break; |
EricLew | 0:80ee8f3b695e | 883 | |
EricLew | 0:80ee8f3b695e | 884 | case RCC_PERIPHCLK_USART2: |
EricLew | 0:80ee8f3b695e | 885 | /* Get the current USART2 source */ |
EricLew | 0:80ee8f3b695e | 886 | srcclk = __HAL_RCC_GET_USART2_SOURCE(); |
EricLew | 0:80ee8f3b695e | 887 | |
EricLew | 0:80ee8f3b695e | 888 | if(srcclk == RCC_USART2CLKSOURCE_PCLK1) |
EricLew | 0:80ee8f3b695e | 889 | { |
EricLew | 0:80ee8f3b695e | 890 | frequency = HAL_RCC_GetPCLK1Freq(); |
EricLew | 0:80ee8f3b695e | 891 | } |
EricLew | 0:80ee8f3b695e | 892 | else if(srcclk == RCC_USART2CLKSOURCE_SYSCLK) |
EricLew | 0:80ee8f3b695e | 893 | { |
EricLew | 0:80ee8f3b695e | 894 | frequency = HAL_RCC_GetSysClockFreq(); |
EricLew | 0:80ee8f3b695e | 895 | } |
EricLew | 0:80ee8f3b695e | 896 | else if((srcclk == RCC_USART2CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) |
EricLew | 0:80ee8f3b695e | 897 | { |
EricLew | 0:80ee8f3b695e | 898 | frequency = HSI_VALUE; |
EricLew | 0:80ee8f3b695e | 899 | } |
EricLew | 0:80ee8f3b695e | 900 | else if((srcclk == RCC_USART2CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) |
EricLew | 0:80ee8f3b695e | 901 | { |
EricLew | 0:80ee8f3b695e | 902 | frequency = LSE_VALUE; |
EricLew | 0:80ee8f3b695e | 903 | } |
EricLew | 0:80ee8f3b695e | 904 | /* Clock not enabled for USART2 */ |
EricLew | 0:80ee8f3b695e | 905 | else |
EricLew | 0:80ee8f3b695e | 906 | { |
EricLew | 0:80ee8f3b695e | 907 | frequency = 0; |
EricLew | 0:80ee8f3b695e | 908 | } |
EricLew | 0:80ee8f3b695e | 909 | break; |
EricLew | 0:80ee8f3b695e | 910 | |
EricLew | 0:80ee8f3b695e | 911 | case RCC_PERIPHCLK_USART3: |
EricLew | 0:80ee8f3b695e | 912 | /* Get the current USART3 source */ |
EricLew | 0:80ee8f3b695e | 913 | srcclk = __HAL_RCC_GET_USART3_SOURCE(); |
EricLew | 0:80ee8f3b695e | 914 | |
EricLew | 0:80ee8f3b695e | 915 | if(srcclk == RCC_USART3CLKSOURCE_PCLK1) |
EricLew | 0:80ee8f3b695e | 916 | { |
EricLew | 0:80ee8f3b695e | 917 | frequency = HAL_RCC_GetPCLK1Freq(); |
EricLew | 0:80ee8f3b695e | 918 | } |
EricLew | 0:80ee8f3b695e | 919 | else if(srcclk == RCC_USART3CLKSOURCE_SYSCLK) |
EricLew | 0:80ee8f3b695e | 920 | { |
EricLew | 0:80ee8f3b695e | 921 | frequency = HAL_RCC_GetSysClockFreq(); |
EricLew | 0:80ee8f3b695e | 922 | } |
EricLew | 0:80ee8f3b695e | 923 | else if((srcclk == RCC_USART3CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) |
EricLew | 0:80ee8f3b695e | 924 | { |
EricLew | 0:80ee8f3b695e | 925 | frequency = HSI_VALUE; |
EricLew | 0:80ee8f3b695e | 926 | } |
EricLew | 0:80ee8f3b695e | 927 | else if((srcclk == RCC_USART3CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) |
EricLew | 0:80ee8f3b695e | 928 | { |
EricLew | 0:80ee8f3b695e | 929 | frequency = LSE_VALUE; |
EricLew | 0:80ee8f3b695e | 930 | } |
EricLew | 0:80ee8f3b695e | 931 | /* Clock not enabled for USART3 */ |
EricLew | 0:80ee8f3b695e | 932 | else |
EricLew | 0:80ee8f3b695e | 933 | { |
EricLew | 0:80ee8f3b695e | 934 | frequency = 0; |
EricLew | 0:80ee8f3b695e | 935 | } |
EricLew | 0:80ee8f3b695e | 936 | break; |
EricLew | 0:80ee8f3b695e | 937 | |
EricLew | 0:80ee8f3b695e | 938 | case RCC_PERIPHCLK_UART4: |
EricLew | 0:80ee8f3b695e | 939 | /* Get the current UART4 source */ |
EricLew | 0:80ee8f3b695e | 940 | srcclk = __HAL_RCC_GET_UART4_SOURCE(); |
EricLew | 0:80ee8f3b695e | 941 | |
EricLew | 0:80ee8f3b695e | 942 | if(srcclk == RCC_UART4CLKSOURCE_PCLK1) |
EricLew | 0:80ee8f3b695e | 943 | { |
EricLew | 0:80ee8f3b695e | 944 | frequency = HAL_RCC_GetPCLK1Freq(); |
EricLew | 0:80ee8f3b695e | 945 | } |
EricLew | 0:80ee8f3b695e | 946 | else if(srcclk == RCC_UART4CLKSOURCE_SYSCLK) |
EricLew | 0:80ee8f3b695e | 947 | { |
EricLew | 0:80ee8f3b695e | 948 | frequency = HAL_RCC_GetSysClockFreq(); |
EricLew | 0:80ee8f3b695e | 949 | } |
EricLew | 0:80ee8f3b695e | 950 | else if((srcclk == RCC_UART4CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) |
EricLew | 0:80ee8f3b695e | 951 | { |
EricLew | 0:80ee8f3b695e | 952 | frequency = HSI_VALUE; |
EricLew | 0:80ee8f3b695e | 953 | } |
EricLew | 0:80ee8f3b695e | 954 | else if((srcclk == RCC_UART4CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) |
EricLew | 0:80ee8f3b695e | 955 | { |
EricLew | 0:80ee8f3b695e | 956 | frequency = LSE_VALUE; |
EricLew | 0:80ee8f3b695e | 957 | } |
EricLew | 0:80ee8f3b695e | 958 | /* Clock not enabled for UART4 */ |
EricLew | 0:80ee8f3b695e | 959 | else |
EricLew | 0:80ee8f3b695e | 960 | { |
EricLew | 0:80ee8f3b695e | 961 | frequency = 0; |
EricLew | 0:80ee8f3b695e | 962 | } |
EricLew | 0:80ee8f3b695e | 963 | break; |
EricLew | 0:80ee8f3b695e | 964 | |
EricLew | 0:80ee8f3b695e | 965 | case RCC_PERIPHCLK_UART5: |
EricLew | 0:80ee8f3b695e | 966 | /* Get the current UART5 source */ |
EricLew | 0:80ee8f3b695e | 967 | srcclk = __HAL_RCC_GET_UART5_SOURCE(); |
EricLew | 0:80ee8f3b695e | 968 | |
EricLew | 0:80ee8f3b695e | 969 | if(srcclk == RCC_UART5CLKSOURCE_PCLK1) |
EricLew | 0:80ee8f3b695e | 970 | { |
EricLew | 0:80ee8f3b695e | 971 | frequency = HAL_RCC_GetPCLK1Freq(); |
EricLew | 0:80ee8f3b695e | 972 | } |
EricLew | 0:80ee8f3b695e | 973 | else if(srcclk == RCC_UART5CLKSOURCE_SYSCLK) |
EricLew | 0:80ee8f3b695e | 974 | { |
EricLew | 0:80ee8f3b695e | 975 | frequency = HAL_RCC_GetSysClockFreq(); |
EricLew | 0:80ee8f3b695e | 976 | } |
EricLew | 0:80ee8f3b695e | 977 | else if((srcclk == RCC_UART5CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) |
EricLew | 0:80ee8f3b695e | 978 | { |
EricLew | 0:80ee8f3b695e | 979 | frequency = HSI_VALUE; |
EricLew | 0:80ee8f3b695e | 980 | } |
EricLew | 0:80ee8f3b695e | 981 | else if((srcclk == RCC_UART5CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) |
EricLew | 0:80ee8f3b695e | 982 | { |
EricLew | 0:80ee8f3b695e | 983 | frequency = LSE_VALUE; |
EricLew | 0:80ee8f3b695e | 984 | } |
EricLew | 0:80ee8f3b695e | 985 | /* Clock not enabled for UART5 */ |
EricLew | 0:80ee8f3b695e | 986 | else |
EricLew | 0:80ee8f3b695e | 987 | { |
EricLew | 0:80ee8f3b695e | 988 | frequency = 0; |
EricLew | 0:80ee8f3b695e | 989 | } |
EricLew | 0:80ee8f3b695e | 990 | break; |
EricLew | 0:80ee8f3b695e | 991 | |
EricLew | 0:80ee8f3b695e | 992 | case RCC_PERIPHCLK_LPUART1: |
EricLew | 0:80ee8f3b695e | 993 | /* Get the current LPUART1 source */ |
EricLew | 0:80ee8f3b695e | 994 | srcclk = __HAL_RCC_GET_LPUART1_SOURCE(); |
EricLew | 0:80ee8f3b695e | 995 | |
EricLew | 0:80ee8f3b695e | 996 | if(srcclk == RCC_LPUART1CLKSOURCE_PCLK1) |
EricLew | 0:80ee8f3b695e | 997 | { |
EricLew | 0:80ee8f3b695e | 998 | frequency = HAL_RCC_GetPCLK1Freq(); |
EricLew | 0:80ee8f3b695e | 999 | } |
EricLew | 0:80ee8f3b695e | 1000 | else if(srcclk == RCC_LPUART1CLKSOURCE_SYSCLK) |
EricLew | 0:80ee8f3b695e | 1001 | { |
EricLew | 0:80ee8f3b695e | 1002 | frequency = HAL_RCC_GetSysClockFreq(); |
EricLew | 0:80ee8f3b695e | 1003 | } |
EricLew | 0:80ee8f3b695e | 1004 | else if((srcclk == RCC_LPUART1CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) |
EricLew | 0:80ee8f3b695e | 1005 | { |
EricLew | 0:80ee8f3b695e | 1006 | frequency = HSI_VALUE; |
EricLew | 0:80ee8f3b695e | 1007 | } |
EricLew | 0:80ee8f3b695e | 1008 | else if((srcclk == RCC_LPUART1CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) |
EricLew | 0:80ee8f3b695e | 1009 | { |
EricLew | 0:80ee8f3b695e | 1010 | frequency = LSE_VALUE; |
EricLew | 0:80ee8f3b695e | 1011 | } |
EricLew | 0:80ee8f3b695e | 1012 | /* Clock not enabled for LPUART1 */ |
EricLew | 0:80ee8f3b695e | 1013 | else |
EricLew | 0:80ee8f3b695e | 1014 | { |
EricLew | 0:80ee8f3b695e | 1015 | frequency = 0; |
EricLew | 0:80ee8f3b695e | 1016 | } |
EricLew | 0:80ee8f3b695e | 1017 | break; |
EricLew | 0:80ee8f3b695e | 1018 | |
EricLew | 0:80ee8f3b695e | 1019 | case RCC_PERIPHCLK_ADC: |
EricLew | 0:80ee8f3b695e | 1020 | |
EricLew | 0:80ee8f3b695e | 1021 | srcclk = __HAL_RCC_GET_ADC_SOURCE(); |
EricLew | 0:80ee8f3b695e | 1022 | |
EricLew | 0:80ee8f3b695e | 1023 | if(srcclk == RCC_ADCCLKSOURCE_SYSCLK) |
EricLew | 0:80ee8f3b695e | 1024 | { |
EricLew | 0:80ee8f3b695e | 1025 | frequency = HAL_RCC_GetSysClockFreq(); |
EricLew | 0:80ee8f3b695e | 1026 | } |
EricLew | 0:80ee8f3b695e | 1027 | else if(srcclk == RCC_ADCCLKSOURCE_PLLSAI1) |
EricLew | 0:80ee8f3b695e | 1028 | { |
EricLew | 0:80ee8f3b695e | 1029 | if(__HAL_RCC_GET_PLLSAI1CLKOUT_CONFIG(RCC_PLLSAI1_ADC1CLK) != RESET) |
EricLew | 0:80ee8f3b695e | 1030 | { |
EricLew | 0:80ee8f3b695e | 1031 | /* f(PLLADC1CLK) = f(VCOSAI1 input) * PLLSAI1N / PLLSAI1R */ |
EricLew | 0:80ee8f3b695e | 1032 | plln = READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1N) >> 8; |
EricLew | 0:80ee8f3b695e | 1033 | frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLSAI1CFGR, RCC_PLLSAI1CFGR_PLLSAI1R) >> 24) + 1) << 1); |
EricLew | 0:80ee8f3b695e | 1034 | } |
EricLew | 0:80ee8f3b695e | 1035 | } |
EricLew | 0:80ee8f3b695e | 1036 | else if(srcclk == RCC_ADCCLKSOURCE_PLLSAI2) |
EricLew | 0:80ee8f3b695e | 1037 | { |
EricLew | 0:80ee8f3b695e | 1038 | if(__HAL_RCC_GET_PLLSAI2CLKOUT_CONFIG(RCC_PLLSAI2_ADC2CLK) != RESET) |
EricLew | 0:80ee8f3b695e | 1039 | { |
EricLew | 0:80ee8f3b695e | 1040 | /* f(PLLADC2CLK) = f(VCOSAI2 input) * PLLSAI2N / PLLSAI2R */ |
EricLew | 0:80ee8f3b695e | 1041 | plln = READ_BIT(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2N) >> 8; |
EricLew | 0:80ee8f3b695e | 1042 | frequency = (pllvco * plln) / (((READ_BIT(RCC->PLLSAI2CFGR, RCC_PLLSAI2CFGR_PLLSAI2R) >> 24) + 1) << 1); |
EricLew | 0:80ee8f3b695e | 1043 | } |
EricLew | 0:80ee8f3b695e | 1044 | } |
EricLew | 0:80ee8f3b695e | 1045 | /* Clock not enabled for ADC */ |
EricLew | 0:80ee8f3b695e | 1046 | else |
EricLew | 0:80ee8f3b695e | 1047 | { |
EricLew | 0:80ee8f3b695e | 1048 | frequency = 0; |
EricLew | 0:80ee8f3b695e | 1049 | } |
EricLew | 0:80ee8f3b695e | 1050 | break; |
EricLew | 0:80ee8f3b695e | 1051 | |
EricLew | 0:80ee8f3b695e | 1052 | case RCC_PERIPHCLK_DFSDM: |
EricLew | 0:80ee8f3b695e | 1053 | /* Get the current DFSDM source */ |
EricLew | 0:80ee8f3b695e | 1054 | srcclk = __HAL_RCC_GET_DFSDM_SOURCE(); |
EricLew | 0:80ee8f3b695e | 1055 | |
EricLew | 0:80ee8f3b695e | 1056 | if(srcclk == RCC_DFSDMCLKSOURCE_PCLK) |
EricLew | 0:80ee8f3b695e | 1057 | { |
EricLew | 0:80ee8f3b695e | 1058 | frequency = HAL_RCC_GetPCLK1Freq(); |
EricLew | 0:80ee8f3b695e | 1059 | } |
EricLew | 0:80ee8f3b695e | 1060 | else |
EricLew | 0:80ee8f3b695e | 1061 | { |
EricLew | 0:80ee8f3b695e | 1062 | frequency = HAL_RCC_GetSysClockFreq(); |
EricLew | 0:80ee8f3b695e | 1063 | } |
EricLew | 0:80ee8f3b695e | 1064 | break; |
EricLew | 0:80ee8f3b695e | 1065 | |
EricLew | 0:80ee8f3b695e | 1066 | case RCC_PERIPHCLK_I2C1: |
EricLew | 0:80ee8f3b695e | 1067 | /* Get the current I2C1 source */ |
EricLew | 0:80ee8f3b695e | 1068 | srcclk = __HAL_RCC_GET_I2C1_SOURCE(); |
EricLew | 0:80ee8f3b695e | 1069 | |
EricLew | 0:80ee8f3b695e | 1070 | if(srcclk == RCC_I2C1CLKSOURCE_PCLK1) |
EricLew | 0:80ee8f3b695e | 1071 | { |
EricLew | 0:80ee8f3b695e | 1072 | frequency = HAL_RCC_GetPCLK1Freq(); |
EricLew | 0:80ee8f3b695e | 1073 | } |
EricLew | 0:80ee8f3b695e | 1074 | else if(srcclk == RCC_I2C1CLKSOURCE_SYSCLK) |
EricLew | 0:80ee8f3b695e | 1075 | { |
EricLew | 0:80ee8f3b695e | 1076 | frequency = HAL_RCC_GetSysClockFreq(); |
EricLew | 0:80ee8f3b695e | 1077 | } |
EricLew | 0:80ee8f3b695e | 1078 | else if((srcclk == RCC_I2C1CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) |
EricLew | 0:80ee8f3b695e | 1079 | { |
EricLew | 0:80ee8f3b695e | 1080 | frequency = HSI_VALUE; |
EricLew | 0:80ee8f3b695e | 1081 | } |
EricLew | 0:80ee8f3b695e | 1082 | /* Clock not enabled for I2C1 */ |
EricLew | 0:80ee8f3b695e | 1083 | else |
EricLew | 0:80ee8f3b695e | 1084 | { |
EricLew | 0:80ee8f3b695e | 1085 | frequency = 0; |
EricLew | 0:80ee8f3b695e | 1086 | } |
EricLew | 0:80ee8f3b695e | 1087 | break; |
EricLew | 0:80ee8f3b695e | 1088 | |
EricLew | 0:80ee8f3b695e | 1089 | case RCC_PERIPHCLK_I2C2: |
EricLew | 0:80ee8f3b695e | 1090 | /* Get the current I2C2 source */ |
EricLew | 0:80ee8f3b695e | 1091 | srcclk = __HAL_RCC_GET_I2C2_SOURCE(); |
EricLew | 0:80ee8f3b695e | 1092 | |
EricLew | 0:80ee8f3b695e | 1093 | if(srcclk == RCC_I2C2CLKSOURCE_PCLK1) |
EricLew | 0:80ee8f3b695e | 1094 | { |
EricLew | 0:80ee8f3b695e | 1095 | frequency = HAL_RCC_GetPCLK1Freq(); |
EricLew | 0:80ee8f3b695e | 1096 | } |
EricLew | 0:80ee8f3b695e | 1097 | else if(srcclk == RCC_I2C2CLKSOURCE_SYSCLK) |
EricLew | 0:80ee8f3b695e | 1098 | { |
EricLew | 0:80ee8f3b695e | 1099 | frequency = HAL_RCC_GetSysClockFreq(); |
EricLew | 0:80ee8f3b695e | 1100 | } |
EricLew | 0:80ee8f3b695e | 1101 | else if((srcclk == RCC_I2C2CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) |
EricLew | 0:80ee8f3b695e | 1102 | { |
EricLew | 0:80ee8f3b695e | 1103 | frequency = HSI_VALUE; |
EricLew | 0:80ee8f3b695e | 1104 | } |
EricLew | 0:80ee8f3b695e | 1105 | /* Clock not enabled for I2C2 */ |
EricLew | 0:80ee8f3b695e | 1106 | else |
EricLew | 0:80ee8f3b695e | 1107 | { |
EricLew | 0:80ee8f3b695e | 1108 | frequency = 0; |
EricLew | 0:80ee8f3b695e | 1109 | } |
EricLew | 0:80ee8f3b695e | 1110 | break; |
EricLew | 0:80ee8f3b695e | 1111 | |
EricLew | 0:80ee8f3b695e | 1112 | case RCC_PERIPHCLK_I2C3: |
EricLew | 0:80ee8f3b695e | 1113 | /* Get the current I2C3 source */ |
EricLew | 0:80ee8f3b695e | 1114 | srcclk = __HAL_RCC_GET_I2C3_SOURCE(); |
EricLew | 0:80ee8f3b695e | 1115 | |
EricLew | 0:80ee8f3b695e | 1116 | if(srcclk == RCC_I2C3CLKSOURCE_PCLK1) |
EricLew | 0:80ee8f3b695e | 1117 | { |
EricLew | 0:80ee8f3b695e | 1118 | frequency = HAL_RCC_GetPCLK1Freq(); |
EricLew | 0:80ee8f3b695e | 1119 | } |
EricLew | 0:80ee8f3b695e | 1120 | else if(srcclk == RCC_I2C3CLKSOURCE_SYSCLK) |
EricLew | 0:80ee8f3b695e | 1121 | { |
EricLew | 0:80ee8f3b695e | 1122 | frequency = HAL_RCC_GetSysClockFreq(); |
EricLew | 0:80ee8f3b695e | 1123 | } |
EricLew | 0:80ee8f3b695e | 1124 | else if((srcclk == RCC_I2C3CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) |
EricLew | 0:80ee8f3b695e | 1125 | { |
EricLew | 0:80ee8f3b695e | 1126 | frequency = HSI_VALUE; |
EricLew | 0:80ee8f3b695e | 1127 | } |
EricLew | 0:80ee8f3b695e | 1128 | /* Clock not enabled for I2C3 */ |
EricLew | 0:80ee8f3b695e | 1129 | else |
EricLew | 0:80ee8f3b695e | 1130 | { |
EricLew | 0:80ee8f3b695e | 1131 | frequency = 0; |
EricLew | 0:80ee8f3b695e | 1132 | } |
EricLew | 0:80ee8f3b695e | 1133 | break; |
EricLew | 0:80ee8f3b695e | 1134 | |
EricLew | 0:80ee8f3b695e | 1135 | case RCC_PERIPHCLK_LPTIM1: |
EricLew | 0:80ee8f3b695e | 1136 | /* Get the current LPTIM1 source */ |
EricLew | 0:80ee8f3b695e | 1137 | srcclk = __HAL_RCC_GET_LPTIM1_SOURCE(); |
EricLew | 0:80ee8f3b695e | 1138 | |
EricLew | 0:80ee8f3b695e | 1139 | if(srcclk == RCC_LPTIM1CLKSOURCE_PCLK) |
EricLew | 0:80ee8f3b695e | 1140 | { |
EricLew | 0:80ee8f3b695e | 1141 | frequency = HAL_RCC_GetPCLK1Freq(); |
EricLew | 0:80ee8f3b695e | 1142 | } |
EricLew | 0:80ee8f3b695e | 1143 | else if((srcclk == RCC_LPTIM1CLKSOURCE_LSI) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSIRDY))) |
EricLew | 0:80ee8f3b695e | 1144 | { |
EricLew | 0:80ee8f3b695e | 1145 | frequency = LSI_VALUE; |
EricLew | 0:80ee8f3b695e | 1146 | } |
EricLew | 0:80ee8f3b695e | 1147 | else if((srcclk == RCC_LPTIM1CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) |
EricLew | 0:80ee8f3b695e | 1148 | { |
EricLew | 0:80ee8f3b695e | 1149 | frequency = HSI_VALUE; |
EricLew | 0:80ee8f3b695e | 1150 | } |
EricLew | 0:80ee8f3b695e | 1151 | else if ((srcclk == RCC_LPTIM1CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) |
EricLew | 0:80ee8f3b695e | 1152 | { |
EricLew | 0:80ee8f3b695e | 1153 | frequency = LSE_VALUE; |
EricLew | 0:80ee8f3b695e | 1154 | } |
EricLew | 0:80ee8f3b695e | 1155 | /* Clock not enabled for LPTIM1 */ |
EricLew | 0:80ee8f3b695e | 1156 | else |
EricLew | 0:80ee8f3b695e | 1157 | { |
EricLew | 0:80ee8f3b695e | 1158 | frequency = 0; |
EricLew | 0:80ee8f3b695e | 1159 | } |
EricLew | 0:80ee8f3b695e | 1160 | break; |
EricLew | 0:80ee8f3b695e | 1161 | |
EricLew | 0:80ee8f3b695e | 1162 | case RCC_PERIPHCLK_LPTIM2: |
EricLew | 0:80ee8f3b695e | 1163 | /* Get the current LPTIM2 source */ |
EricLew | 0:80ee8f3b695e | 1164 | srcclk = __HAL_RCC_GET_LPTIM2_SOURCE(); |
EricLew | 0:80ee8f3b695e | 1165 | |
EricLew | 0:80ee8f3b695e | 1166 | if(srcclk == RCC_LPTIM2CLKSOURCE_PCLK) |
EricLew | 0:80ee8f3b695e | 1167 | { |
EricLew | 0:80ee8f3b695e | 1168 | frequency = HAL_RCC_GetPCLK1Freq(); |
EricLew | 0:80ee8f3b695e | 1169 | } |
EricLew | 0:80ee8f3b695e | 1170 | else if((srcclk == RCC_LPTIM2CLKSOURCE_LSI) && (HAL_IS_BIT_SET(RCC->CSR, RCC_CSR_LSIRDY))) |
EricLew | 0:80ee8f3b695e | 1171 | { |
EricLew | 0:80ee8f3b695e | 1172 | frequency = LSI_VALUE; |
EricLew | 0:80ee8f3b695e | 1173 | } |
EricLew | 0:80ee8f3b695e | 1174 | else if((srcclk == RCC_LPTIM2CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) |
EricLew | 0:80ee8f3b695e | 1175 | { |
EricLew | 0:80ee8f3b695e | 1176 | frequency = HSI_VALUE; |
EricLew | 0:80ee8f3b695e | 1177 | } |
EricLew | 0:80ee8f3b695e | 1178 | else if ((srcclk == RCC_LPTIM2CLKSOURCE_LSE) && (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSERDY))) |
EricLew | 0:80ee8f3b695e | 1179 | { |
EricLew | 0:80ee8f3b695e | 1180 | frequency = LSE_VALUE; |
EricLew | 0:80ee8f3b695e | 1181 | } |
EricLew | 0:80ee8f3b695e | 1182 | /* Clock not enabled for LPTIM2 */ |
EricLew | 0:80ee8f3b695e | 1183 | else |
EricLew | 0:80ee8f3b695e | 1184 | { |
EricLew | 0:80ee8f3b695e | 1185 | frequency = 0; |
EricLew | 0:80ee8f3b695e | 1186 | } |
EricLew | 0:80ee8f3b695e | 1187 | break; |
EricLew | 0:80ee8f3b695e | 1188 | |
EricLew | 0:80ee8f3b695e | 1189 | case RCC_PERIPHCLK_SWPMI1: |
EricLew | 0:80ee8f3b695e | 1190 | /* Get the current SWPMI1 source */ |
EricLew | 0:80ee8f3b695e | 1191 | srcclk = __HAL_RCC_GET_SWPMI1_SOURCE(); |
EricLew | 0:80ee8f3b695e | 1192 | |
EricLew | 0:80ee8f3b695e | 1193 | if(srcclk == RCC_SWPMI1CLKSOURCE_PCLK) |
EricLew | 0:80ee8f3b695e | 1194 | { |
EricLew | 0:80ee8f3b695e | 1195 | frequency = HAL_RCC_GetPCLK1Freq(); |
EricLew | 0:80ee8f3b695e | 1196 | } |
EricLew | 0:80ee8f3b695e | 1197 | else if((srcclk == RCC_SWPMI1CLKSOURCE_HSI) && (HAL_IS_BIT_SET(RCC->CR, RCC_CR_HSIRDY))) |
EricLew | 0:80ee8f3b695e | 1198 | { |
EricLew | 0:80ee8f3b695e | 1199 | frequency = HSI_VALUE; |
EricLew | 0:80ee8f3b695e | 1200 | } |
EricLew | 0:80ee8f3b695e | 1201 | /* Clock not enabled for SWPMI1 */ |
EricLew | 0:80ee8f3b695e | 1202 | else |
EricLew | 0:80ee8f3b695e | 1203 | { |
EricLew | 0:80ee8f3b695e | 1204 | frequency = 0; |
EricLew | 0:80ee8f3b695e | 1205 | } |
EricLew | 0:80ee8f3b695e | 1206 | break; |
EricLew | 0:80ee8f3b695e | 1207 | |
EricLew | 0:80ee8f3b695e | 1208 | default: |
EricLew | 0:80ee8f3b695e | 1209 | break; |
EricLew | 0:80ee8f3b695e | 1210 | } |
EricLew | 0:80ee8f3b695e | 1211 | } |
EricLew | 0:80ee8f3b695e | 1212 | |
EricLew | 0:80ee8f3b695e | 1213 | return(frequency); |
EricLew | 0:80ee8f3b695e | 1214 | } |
EricLew | 0:80ee8f3b695e | 1215 | |
EricLew | 0:80ee8f3b695e | 1216 | /** |
EricLew | 0:80ee8f3b695e | 1217 | * @} |
EricLew | 0:80ee8f3b695e | 1218 | */ |
EricLew | 0:80ee8f3b695e | 1219 | |
EricLew | 0:80ee8f3b695e | 1220 | /** @defgroup RCCEx_Exported_Functions_Group2 Extended clock management functions |
EricLew | 0:80ee8f3b695e | 1221 | * @brief Extended clock management functions |
EricLew | 0:80ee8f3b695e | 1222 | * |
EricLew | 0:80ee8f3b695e | 1223 | @verbatim |
EricLew | 0:80ee8f3b695e | 1224 | =============================================================================== |
EricLew | 0:80ee8f3b695e | 1225 | ##### Extended clock management functions ##### |
EricLew | 0:80ee8f3b695e | 1226 | =============================================================================== |
EricLew | 0:80ee8f3b695e | 1227 | [..] |
EricLew | 0:80ee8f3b695e | 1228 | This subsection provides a set of functions allowing to control the |
EricLew | 0:80ee8f3b695e | 1229 | activation or deactivation of MSI PLL-mode, PLLSAI1, PLLSAI2, LSE CSS, |
EricLew | 0:80ee8f3b695e | 1230 | Low speed clock output and clock after wake-up from STOP mode. |
EricLew | 0:80ee8f3b695e | 1231 | @endverbatim |
EricLew | 0:80ee8f3b695e | 1232 | * @{ |
EricLew | 0:80ee8f3b695e | 1233 | */ |
EricLew | 0:80ee8f3b695e | 1234 | |
EricLew | 0:80ee8f3b695e | 1235 | /** |
EricLew | 0:80ee8f3b695e | 1236 | * @brief Enable PLLSAI1. |
EricLew | 0:80ee8f3b695e | 1237 | * @param PLLSAI1Init pointer to an RCC_PLLSAI1InitTypeDef structure that |
EricLew | 0:80ee8f3b695e | 1238 | * contains the configuration information for the PLLSAI1 |
EricLew | 0:80ee8f3b695e | 1239 | * @retval HAL status |
EricLew | 0:80ee8f3b695e | 1240 | */ |
EricLew | 0:80ee8f3b695e | 1241 | HAL_StatusTypeDef HAL_RCCEx_EnablePLLSAI1(RCC_PLLSAI1InitTypeDef *PLLSAI1Init) |
EricLew | 0:80ee8f3b695e | 1242 | { |
EricLew | 0:80ee8f3b695e | 1243 | uint32_t tickstart = 0; |
EricLew | 0:80ee8f3b695e | 1244 | HAL_StatusTypeDef status = HAL_OK; |
EricLew | 0:80ee8f3b695e | 1245 | |
EricLew | 0:80ee8f3b695e | 1246 | /* check for PLLSAI1 Parameters used to output PLLSAI1CLK */ |
EricLew | 0:80ee8f3b695e | 1247 | assert_param(IS_RCC_PLLSAI1N_VALUE(PLLSAI1Init->PLLSAI1N)); |
EricLew | 0:80ee8f3b695e | 1248 | assert_param(IS_RCC_PLLSAI1P_VALUE(PLLSAI1Init->PLLSAI1P)); |
EricLew | 0:80ee8f3b695e | 1249 | assert_param(IS_RCC_PLLSAI1Q_VALUE(PLLSAI1Init->PLLSAI1Q)); |
EricLew | 0:80ee8f3b695e | 1250 | assert_param(IS_RCC_PLLSAI1R_VALUE(PLLSAI1Init->PLLSAI1R)); |
EricLew | 0:80ee8f3b695e | 1251 | assert_param(IS_RCC_PLLSAI1CLOCKOUT_VALUE(PLLSAI1Init->PLLSAI1ClockOut)); |
EricLew | 0:80ee8f3b695e | 1252 | |
EricLew | 0:80ee8f3b695e | 1253 | /* Disable the PLLSAI1 */ |
EricLew | 0:80ee8f3b695e | 1254 | __HAL_RCC_PLLSAI1_DISABLE(); |
EricLew | 0:80ee8f3b695e | 1255 | |
EricLew | 0:80ee8f3b695e | 1256 | /* Get Start Tick*/ |
EricLew | 0:80ee8f3b695e | 1257 | tickstart = HAL_GetTick(); |
EricLew | 0:80ee8f3b695e | 1258 | |
EricLew | 0:80ee8f3b695e | 1259 | /* Wait till PLLSAI1 is ready to be updated */ |
EricLew | 0:80ee8f3b695e | 1260 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLSAI1RDY) != RESET) |
EricLew | 0:80ee8f3b695e | 1261 | { |
EricLew | 0:80ee8f3b695e | 1262 | if((HAL_GetTick() - tickstart) > PLLSAI1_TIMEOUT_VALUE) |
EricLew | 0:80ee8f3b695e | 1263 | { |
EricLew | 0:80ee8f3b695e | 1264 | status = HAL_TIMEOUT; |
EricLew | 0:80ee8f3b695e | 1265 | break; |
EricLew | 0:80ee8f3b695e | 1266 | } |
EricLew | 0:80ee8f3b695e | 1267 | } |
EricLew | 0:80ee8f3b695e | 1268 | |
EricLew | 0:80ee8f3b695e | 1269 | if(status == HAL_OK) |
EricLew | 0:80ee8f3b695e | 1270 | { |
EricLew | 0:80ee8f3b695e | 1271 | /* Configure the PLLSAI1 Multiplication factor N */ |
EricLew | 0:80ee8f3b695e | 1272 | /* Configure the PLLSAI1 Division factors P, Q and R */ |
EricLew | 0:80ee8f3b695e | 1273 | __HAL_RCC_PLLSAI1_CONFIG(PLLSAI1Init->PLLSAI1N, PLLSAI1Init->PLLSAI1P, PLLSAI1Init->PLLSAI1Q, PLLSAI1Init->PLLSAI1R); |
EricLew | 0:80ee8f3b695e | 1274 | /* Configure the PLLSAI1 Clock output(s) */ |
EricLew | 0:80ee8f3b695e | 1275 | __HAL_RCC_PLLSAI1CLKOUT_ENABLE(PLLSAI1Init->PLLSAI1ClockOut); |
EricLew | 0:80ee8f3b695e | 1276 | |
EricLew | 0:80ee8f3b695e | 1277 | /* Enable the PLLSAI1 again by setting PLLSAI1ON to 1*/ |
EricLew | 0:80ee8f3b695e | 1278 | __HAL_RCC_PLLSAI1_ENABLE(); |
EricLew | 0:80ee8f3b695e | 1279 | |
EricLew | 0:80ee8f3b695e | 1280 | /* Get Start Tick*/ |
EricLew | 0:80ee8f3b695e | 1281 | tickstart = HAL_GetTick(); |
EricLew | 0:80ee8f3b695e | 1282 | |
EricLew | 0:80ee8f3b695e | 1283 | /* Wait till PLLSAI1 is ready */ |
EricLew | 0:80ee8f3b695e | 1284 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLSAI1RDY) == RESET) |
EricLew | 0:80ee8f3b695e | 1285 | { |
EricLew | 0:80ee8f3b695e | 1286 | if((HAL_GetTick() - tickstart) > PLLSAI1_TIMEOUT_VALUE) |
EricLew | 0:80ee8f3b695e | 1287 | { |
EricLew | 0:80ee8f3b695e | 1288 | status = HAL_TIMEOUT; |
EricLew | 0:80ee8f3b695e | 1289 | break; |
EricLew | 0:80ee8f3b695e | 1290 | } |
EricLew | 0:80ee8f3b695e | 1291 | } |
EricLew | 0:80ee8f3b695e | 1292 | } |
EricLew | 0:80ee8f3b695e | 1293 | |
EricLew | 0:80ee8f3b695e | 1294 | return status; |
EricLew | 0:80ee8f3b695e | 1295 | } |
EricLew | 0:80ee8f3b695e | 1296 | |
EricLew | 0:80ee8f3b695e | 1297 | /** |
EricLew | 0:80ee8f3b695e | 1298 | * @brief Disable PLLSAI1. |
EricLew | 0:80ee8f3b695e | 1299 | * @retval HAL status |
EricLew | 0:80ee8f3b695e | 1300 | */ |
EricLew | 0:80ee8f3b695e | 1301 | HAL_StatusTypeDef HAL_RCCEx_DisablePLLSAI1(void) |
EricLew | 0:80ee8f3b695e | 1302 | { |
EricLew | 0:80ee8f3b695e | 1303 | uint32_t tickstart = 0; |
EricLew | 0:80ee8f3b695e | 1304 | HAL_StatusTypeDef status = HAL_OK; |
EricLew | 0:80ee8f3b695e | 1305 | |
EricLew | 0:80ee8f3b695e | 1306 | /* Disable the PLLSAI1 */ |
EricLew | 0:80ee8f3b695e | 1307 | __HAL_RCC_PLLSAI1_DISABLE(); |
EricLew | 0:80ee8f3b695e | 1308 | |
EricLew | 0:80ee8f3b695e | 1309 | /* Get Start Tick*/ |
EricLew | 0:80ee8f3b695e | 1310 | tickstart = HAL_GetTick(); |
EricLew | 0:80ee8f3b695e | 1311 | |
EricLew | 0:80ee8f3b695e | 1312 | /* Wait till PLLSAI1 is ready */ |
EricLew | 0:80ee8f3b695e | 1313 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLSAI1RDY) != RESET) |
EricLew | 0:80ee8f3b695e | 1314 | { |
EricLew | 0:80ee8f3b695e | 1315 | if((HAL_GetTick() - tickstart) > PLLSAI1_TIMEOUT_VALUE) |
EricLew | 0:80ee8f3b695e | 1316 | { |
EricLew | 0:80ee8f3b695e | 1317 | status = HAL_TIMEOUT; |
EricLew | 0:80ee8f3b695e | 1318 | break; |
EricLew | 0:80ee8f3b695e | 1319 | } |
EricLew | 0:80ee8f3b695e | 1320 | } |
EricLew | 0:80ee8f3b695e | 1321 | |
EricLew | 0:80ee8f3b695e | 1322 | /* Disable the PLLSAI1 Clock outputs */ |
EricLew | 0:80ee8f3b695e | 1323 | __HAL_RCC_PLLSAI1CLKOUT_DISABLE(RCC_PLLSAI1_SAI1CLK|RCC_PLLSAI1_48M2CLK|RCC_PLLSAI1_ADC1CLK); |
EricLew | 0:80ee8f3b695e | 1324 | |
EricLew | 0:80ee8f3b695e | 1325 | return status; |
EricLew | 0:80ee8f3b695e | 1326 | } |
EricLew | 0:80ee8f3b695e | 1327 | |
EricLew | 0:80ee8f3b695e | 1328 | /** |
EricLew | 0:80ee8f3b695e | 1329 | * @brief Enable PLLSAI2. |
EricLew | 0:80ee8f3b695e | 1330 | * @param PLLSAI2Init pointer to an RCC_PLLSAI2InitTypeDef structure that |
EricLew | 0:80ee8f3b695e | 1331 | * contains the configuration information for the PLLSAI2 |
EricLew | 0:80ee8f3b695e | 1332 | * @retval HAL status |
EricLew | 0:80ee8f3b695e | 1333 | */ |
EricLew | 0:80ee8f3b695e | 1334 | HAL_StatusTypeDef HAL_RCCEx_EnablePLLSAI2(RCC_PLLSAI2InitTypeDef *PLLSAI2Init) |
EricLew | 0:80ee8f3b695e | 1335 | { |
EricLew | 0:80ee8f3b695e | 1336 | uint32_t tickstart = 0; |
EricLew | 0:80ee8f3b695e | 1337 | HAL_StatusTypeDef status = HAL_OK; |
EricLew | 0:80ee8f3b695e | 1338 | |
EricLew | 0:80ee8f3b695e | 1339 | /* check for PLLSAI2 Parameters used to output PLLSAI2CLK */ |
EricLew | 0:80ee8f3b695e | 1340 | assert_param(IS_RCC_PLLSAI2N_VALUE(PLLSAI2Init->PLLSAI2N)); |
EricLew | 0:80ee8f3b695e | 1341 | assert_param(IS_RCC_PLLSAI2P_VALUE(PLLSAI2Init->PLLSAI2P)); |
EricLew | 0:80ee8f3b695e | 1342 | assert_param(IS_RCC_PLLSAI2R_VALUE(PLLSAI2Init->PLLSAI2R)); |
EricLew | 0:80ee8f3b695e | 1343 | assert_param(IS_RCC_PLLSAI2CLOCKOUT_VALUE(PLLSAI2Init->PLLSAI2ClockOut)); |
EricLew | 0:80ee8f3b695e | 1344 | |
EricLew | 0:80ee8f3b695e | 1345 | /* Disable the PLLSAI2 */ |
EricLew | 0:80ee8f3b695e | 1346 | __HAL_RCC_PLLSAI2_DISABLE(); |
EricLew | 0:80ee8f3b695e | 1347 | |
EricLew | 0:80ee8f3b695e | 1348 | /* Get Start Tick*/ |
EricLew | 0:80ee8f3b695e | 1349 | tickstart = HAL_GetTick(); |
EricLew | 0:80ee8f3b695e | 1350 | |
EricLew | 0:80ee8f3b695e | 1351 | /* Wait till PLLSAI2 is ready to be updated */ |
EricLew | 0:80ee8f3b695e | 1352 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLSAI2RDY) != RESET) |
EricLew | 0:80ee8f3b695e | 1353 | { |
EricLew | 0:80ee8f3b695e | 1354 | if((HAL_GetTick() - tickstart) > PLLSAI2_TIMEOUT_VALUE) |
EricLew | 0:80ee8f3b695e | 1355 | { |
EricLew | 0:80ee8f3b695e | 1356 | status = HAL_TIMEOUT; |
EricLew | 0:80ee8f3b695e | 1357 | break; |
EricLew | 0:80ee8f3b695e | 1358 | } |
EricLew | 0:80ee8f3b695e | 1359 | } |
EricLew | 0:80ee8f3b695e | 1360 | |
EricLew | 0:80ee8f3b695e | 1361 | if(status == HAL_OK) |
EricLew | 0:80ee8f3b695e | 1362 | { |
EricLew | 0:80ee8f3b695e | 1363 | /* Configure the PLLSAI2 Multiplication factor N */ |
EricLew | 0:80ee8f3b695e | 1364 | /* Configure the PLLSAI2 Division factors P and R */ |
EricLew | 0:80ee8f3b695e | 1365 | __HAL_RCC_PLLSAI2_CONFIG(PLLSAI2Init->PLLSAI2N, PLLSAI2Init->PLLSAI2P, PLLSAI2Init->PLLSAI2R); |
EricLew | 0:80ee8f3b695e | 1366 | /* Configure the PLLSAI2 Clock output(s) */ |
EricLew | 0:80ee8f3b695e | 1367 | __HAL_RCC_PLLSAI2CLKOUT_ENABLE(PLLSAI2Init->PLLSAI2ClockOut); |
EricLew | 0:80ee8f3b695e | 1368 | |
EricLew | 0:80ee8f3b695e | 1369 | /* Enable the PLLSAI2 again by setting PLLSAI2ON to 1*/ |
EricLew | 0:80ee8f3b695e | 1370 | __HAL_RCC_PLLSAI2_ENABLE(); |
EricLew | 0:80ee8f3b695e | 1371 | |
EricLew | 0:80ee8f3b695e | 1372 | /* Get Start Tick*/ |
EricLew | 0:80ee8f3b695e | 1373 | tickstart = HAL_GetTick(); |
EricLew | 0:80ee8f3b695e | 1374 | |
EricLew | 0:80ee8f3b695e | 1375 | /* Wait till PLLSAI2 is ready */ |
EricLew | 0:80ee8f3b695e | 1376 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLSAI2RDY) == RESET) |
EricLew | 0:80ee8f3b695e | 1377 | { |
EricLew | 0:80ee8f3b695e | 1378 | if((HAL_GetTick() - tickstart) > PLLSAI2_TIMEOUT_VALUE) |
EricLew | 0:80ee8f3b695e | 1379 | { |
EricLew | 0:80ee8f3b695e | 1380 | status = HAL_TIMEOUT; |
EricLew | 0:80ee8f3b695e | 1381 | break; |
EricLew | 0:80ee8f3b695e | 1382 | } |
EricLew | 0:80ee8f3b695e | 1383 | } |
EricLew | 0:80ee8f3b695e | 1384 | } |
EricLew | 0:80ee8f3b695e | 1385 | |
EricLew | 0:80ee8f3b695e | 1386 | return status; |
EricLew | 0:80ee8f3b695e | 1387 | } |
EricLew | 0:80ee8f3b695e | 1388 | |
EricLew | 0:80ee8f3b695e | 1389 | /** |
EricLew | 0:80ee8f3b695e | 1390 | * @brief Disable PLLISAI2. |
EricLew | 0:80ee8f3b695e | 1391 | * @retval HAL status |
EricLew | 0:80ee8f3b695e | 1392 | */ |
EricLew | 0:80ee8f3b695e | 1393 | HAL_StatusTypeDef HAL_RCCEx_DisablePLLSAI2(void) |
EricLew | 0:80ee8f3b695e | 1394 | { |
EricLew | 0:80ee8f3b695e | 1395 | uint32_t tickstart = 0; |
EricLew | 0:80ee8f3b695e | 1396 | HAL_StatusTypeDef status = HAL_OK; |
EricLew | 0:80ee8f3b695e | 1397 | |
EricLew | 0:80ee8f3b695e | 1398 | /* Disable the PLLSAI2 */ |
EricLew | 0:80ee8f3b695e | 1399 | __HAL_RCC_PLLSAI2_DISABLE(); |
EricLew | 0:80ee8f3b695e | 1400 | |
EricLew | 0:80ee8f3b695e | 1401 | /* Get Start Tick*/ |
EricLew | 0:80ee8f3b695e | 1402 | tickstart = HAL_GetTick(); |
EricLew | 0:80ee8f3b695e | 1403 | |
EricLew | 0:80ee8f3b695e | 1404 | /* Wait till PLLSAI2 is ready */ |
EricLew | 0:80ee8f3b695e | 1405 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLSAI2RDY) != RESET) |
EricLew | 0:80ee8f3b695e | 1406 | { |
EricLew | 0:80ee8f3b695e | 1407 | if((HAL_GetTick() - tickstart) > PLLSAI2_TIMEOUT_VALUE) |
EricLew | 0:80ee8f3b695e | 1408 | { |
EricLew | 0:80ee8f3b695e | 1409 | status = HAL_TIMEOUT; |
EricLew | 0:80ee8f3b695e | 1410 | break; |
EricLew | 0:80ee8f3b695e | 1411 | } |
EricLew | 0:80ee8f3b695e | 1412 | } |
EricLew | 0:80ee8f3b695e | 1413 | |
EricLew | 0:80ee8f3b695e | 1414 | /* Disable the PLLSAI2 Clock outputs */ |
EricLew | 0:80ee8f3b695e | 1415 | __HAL_RCC_PLLSAI2CLKOUT_DISABLE(RCC_PLLSAI2_SAI2CLK|RCC_PLLSAI2_ADC2CLK); |
EricLew | 0:80ee8f3b695e | 1416 | |
EricLew | 0:80ee8f3b695e | 1417 | return status; |
EricLew | 0:80ee8f3b695e | 1418 | } |
EricLew | 0:80ee8f3b695e | 1419 | |
EricLew | 0:80ee8f3b695e | 1420 | /** |
EricLew | 0:80ee8f3b695e | 1421 | * @brief Configure the oscillator clock source for wakeup from Stop and CSS backup clock. |
EricLew | 0:80ee8f3b695e | 1422 | * @param WakeUpClk Wakeup clock |
EricLew | 0:80ee8f3b695e | 1423 | * This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 1424 | * @arg @ref RCC_STOP_WAKEUPCLOCK_MSI MSI oscillator selection |
EricLew | 0:80ee8f3b695e | 1425 | * @arg @ref RCC_STOP_WAKEUPCLOCK_HSI HSI oscillator selection |
EricLew | 0:80ee8f3b695e | 1426 | * @note This function shall not be called after the Clock Security System on HSE has been |
EricLew | 0:80ee8f3b695e | 1427 | * enabled. |
EricLew | 0:80ee8f3b695e | 1428 | * @retval None |
EricLew | 0:80ee8f3b695e | 1429 | */ |
EricLew | 0:80ee8f3b695e | 1430 | void HAL_RCCEx_WakeUpStopCLKConfig(uint32_t WakeUpClk) |
EricLew | 0:80ee8f3b695e | 1431 | { |
EricLew | 0:80ee8f3b695e | 1432 | assert_param(IS_RCC_STOP_WAKEUPCLOCK(WakeUpClk)); |
EricLew | 0:80ee8f3b695e | 1433 | |
EricLew | 0:80ee8f3b695e | 1434 | __HAL_RCC_WAKEUPSTOP_CLK_CONFIG(WakeUpClk); |
EricLew | 0:80ee8f3b695e | 1435 | } |
EricLew | 0:80ee8f3b695e | 1436 | |
EricLew | 0:80ee8f3b695e | 1437 | /** |
EricLew | 0:80ee8f3b695e | 1438 | * @brief Configure the MSI range after standby mode. |
EricLew | 0:80ee8f3b695e | 1439 | * @note After Standby its frequency can be selected between 4 possible values (1, 2, 4 or 8 MHz). |
EricLew | 0:80ee8f3b695e | 1440 | * @param MSIRange MSI range |
EricLew | 0:80ee8f3b695e | 1441 | * This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 1442 | * @arg @ref RCC_MSIRANGE_4 Range 4 around 1 MHz |
EricLew | 0:80ee8f3b695e | 1443 | * @arg @ref RCC_MSIRANGE_5 Range 5 around 2 MHz |
EricLew | 0:80ee8f3b695e | 1444 | * @arg @ref RCC_MSIRANGE_6 Range 6 around 4 MHz (reset value) |
EricLew | 0:80ee8f3b695e | 1445 | * @arg @ref RCC_MSIRANGE_7 Range 7 around 8 MHz |
EricLew | 0:80ee8f3b695e | 1446 | * @retval None |
EricLew | 0:80ee8f3b695e | 1447 | */ |
EricLew | 0:80ee8f3b695e | 1448 | void HAL_RCCEx_StandbyMSIRangeConfig(uint32_t MSIRange) |
EricLew | 0:80ee8f3b695e | 1449 | { |
EricLew | 0:80ee8f3b695e | 1450 | assert_param(IS_RCC_MSI_STANDBY_CLOCK_RANGE(MSIRange)); |
EricLew | 0:80ee8f3b695e | 1451 | |
EricLew | 0:80ee8f3b695e | 1452 | __HAL_RCC_MSI_STANDBY_RANGE_CONFIG(MSIRange); |
EricLew | 0:80ee8f3b695e | 1453 | } |
EricLew | 0:80ee8f3b695e | 1454 | |
EricLew | 0:80ee8f3b695e | 1455 | /** |
EricLew | 0:80ee8f3b695e | 1456 | * @brief Enable the LSE Clock Security System. |
EricLew | 0:80ee8f3b695e | 1457 | * @note Prior to enable the LSE Clock Security System, LSE oscillator is to be enabled |
EricLew | 0:80ee8f3b695e | 1458 | * with HAL_RCC_OscConfig() and the LSE oscillator clock is to be selected as RTC |
EricLew | 0:80ee8f3b695e | 1459 | * clock with HAL_RCCEx_PeriphCLKConfig(). |
EricLew | 0:80ee8f3b695e | 1460 | * @retval None |
EricLew | 0:80ee8f3b695e | 1461 | */ |
EricLew | 0:80ee8f3b695e | 1462 | void HAL_RCCEx_EnableLSECSS(void) |
EricLew | 0:80ee8f3b695e | 1463 | { |
EricLew | 0:80ee8f3b695e | 1464 | SET_BIT(RCC->BDCR, RCC_BDCR_LSECSSON) ; |
EricLew | 0:80ee8f3b695e | 1465 | } |
EricLew | 0:80ee8f3b695e | 1466 | |
EricLew | 0:80ee8f3b695e | 1467 | /** |
EricLew | 0:80ee8f3b695e | 1468 | * @brief Disable the LSE Clock Security System. |
EricLew | 0:80ee8f3b695e | 1469 | * @note LSE Clock Security System can only be disabled after a LSE failure detection. |
EricLew | 0:80ee8f3b695e | 1470 | * @retval None |
EricLew | 0:80ee8f3b695e | 1471 | */ |
EricLew | 0:80ee8f3b695e | 1472 | void HAL_RCCEx_DisableLSECSS(void) |
EricLew | 0:80ee8f3b695e | 1473 | { |
EricLew | 0:80ee8f3b695e | 1474 | CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSECSSON) ; |
EricLew | 0:80ee8f3b695e | 1475 | |
EricLew | 0:80ee8f3b695e | 1476 | /* Disable LSE CSS IT if any */ |
EricLew | 0:80ee8f3b695e | 1477 | __HAL_RCC_DISABLE_IT(RCC_IT_LSECSS); |
EricLew | 0:80ee8f3b695e | 1478 | } |
EricLew | 0:80ee8f3b695e | 1479 | |
EricLew | 0:80ee8f3b695e | 1480 | /** |
EricLew | 0:80ee8f3b695e | 1481 | * @brief Enable the LSE Clock Security System Interrupt & corresponding EXTI line. |
EricLew | 0:80ee8f3b695e | 1482 | * @note LSE Clock Security System Interrupt is mapped on RTC EXTI line 19 |
EricLew | 0:80ee8f3b695e | 1483 | * @retval None |
EricLew | 0:80ee8f3b695e | 1484 | */ |
EricLew | 0:80ee8f3b695e | 1485 | void HAL_RCCEx_EnableLSECSS_IT(void) |
EricLew | 0:80ee8f3b695e | 1486 | { |
EricLew | 0:80ee8f3b695e | 1487 | /* Enable LSE CSS */ |
EricLew | 0:80ee8f3b695e | 1488 | SET_BIT(RCC->BDCR, RCC_BDCR_LSECSSON) ; |
EricLew | 0:80ee8f3b695e | 1489 | |
EricLew | 0:80ee8f3b695e | 1490 | /* Enable LSE CSS IT */ |
EricLew | 0:80ee8f3b695e | 1491 | __HAL_RCC_ENABLE_IT(RCC_IT_LSECSS); |
EricLew | 0:80ee8f3b695e | 1492 | |
EricLew | 0:80ee8f3b695e | 1493 | /* Enable IT on EXTI Line 19 */ |
EricLew | 0:80ee8f3b695e | 1494 | __HAL_RCC_LSECSS_EXTI_ENABLE_IT(); |
EricLew | 0:80ee8f3b695e | 1495 | __HAL_RCC_LSECSS_EXTI_ENABLE_RISING_EDGE(); |
EricLew | 0:80ee8f3b695e | 1496 | } |
EricLew | 0:80ee8f3b695e | 1497 | |
EricLew | 0:80ee8f3b695e | 1498 | /** |
EricLew | 0:80ee8f3b695e | 1499 | * @brief Handle the RCC LSE Clock Security System interrupt request. |
EricLew | 0:80ee8f3b695e | 1500 | * @retval None |
EricLew | 0:80ee8f3b695e | 1501 | */ |
EricLew | 0:80ee8f3b695e | 1502 | void HAL_RCCEx_LSECSS_IRQHandler(void) |
EricLew | 0:80ee8f3b695e | 1503 | { |
EricLew | 0:80ee8f3b695e | 1504 | /* Check RCC LSE CSSF flag */ |
EricLew | 0:80ee8f3b695e | 1505 | if(__HAL_RCC_GET_IT(RCC_IT_LSECSS)) |
EricLew | 0:80ee8f3b695e | 1506 | { |
EricLew | 0:80ee8f3b695e | 1507 | /* RCC LSE Clock Security System interrupt user callback */ |
EricLew | 0:80ee8f3b695e | 1508 | HAL_RCCEx_LSECSS_Callback(); |
EricLew | 0:80ee8f3b695e | 1509 | |
EricLew | 0:80ee8f3b695e | 1510 | /* Clear RCC LSE CSS pending bit */ |
EricLew | 0:80ee8f3b695e | 1511 | __HAL_RCC_CLEAR_IT(RCC_IT_LSECSS); |
EricLew | 0:80ee8f3b695e | 1512 | } |
EricLew | 0:80ee8f3b695e | 1513 | } |
EricLew | 0:80ee8f3b695e | 1514 | |
EricLew | 0:80ee8f3b695e | 1515 | /** |
EricLew | 0:80ee8f3b695e | 1516 | * @brief RCCEx LSE Clock Security System interrupt callback. |
EricLew | 0:80ee8f3b695e | 1517 | * @retval none |
EricLew | 0:80ee8f3b695e | 1518 | */ |
EricLew | 0:80ee8f3b695e | 1519 | __weak void HAL_RCCEx_LSECSS_Callback(void) |
EricLew | 0:80ee8f3b695e | 1520 | { |
EricLew | 0:80ee8f3b695e | 1521 | /* NOTE : This function should not be modified, when the callback is needed, |
EricLew | 0:80ee8f3b695e | 1522 | the @ref HAL_RCCEx_LSECSS_Callback should be implemented in the user file |
EricLew | 0:80ee8f3b695e | 1523 | */ |
EricLew | 0:80ee8f3b695e | 1524 | } |
EricLew | 0:80ee8f3b695e | 1525 | |
EricLew | 0:80ee8f3b695e | 1526 | /** |
EricLew | 0:80ee8f3b695e | 1527 | * @brief Select the Low Speed clock source to output on LSCO pin (PA2). |
EricLew | 0:80ee8f3b695e | 1528 | * @param LSCOSource specifies the Low Speed clock source to output. |
EricLew | 0:80ee8f3b695e | 1529 | * This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 1530 | * @arg @ref RCC_LSCOSOURCE_LSI LSI clock selected as LSCO source |
EricLew | 0:80ee8f3b695e | 1531 | * @arg @ref RCC_LSCOSOURCE_LSE LSE clock selected as LSCO source |
EricLew | 0:80ee8f3b695e | 1532 | * @retval None |
EricLew | 0:80ee8f3b695e | 1533 | */ |
EricLew | 0:80ee8f3b695e | 1534 | void HAL_RCCEx_EnableLSCO(uint32_t LSCOSource) |
EricLew | 0:80ee8f3b695e | 1535 | { |
EricLew | 0:80ee8f3b695e | 1536 | GPIO_InitTypeDef GPIO_InitStruct; |
EricLew | 0:80ee8f3b695e | 1537 | FlagStatus pwrclkchanged = RESET; |
EricLew | 0:80ee8f3b695e | 1538 | FlagStatus backupchanged = RESET; |
EricLew | 0:80ee8f3b695e | 1539 | |
EricLew | 0:80ee8f3b695e | 1540 | /* Check the parameters */ |
EricLew | 0:80ee8f3b695e | 1541 | assert_param(IS_RCC_LSCOSOURCE(LSCOSource)); |
EricLew | 0:80ee8f3b695e | 1542 | |
EricLew | 0:80ee8f3b695e | 1543 | /* LSCO Pin Clock Enable */ |
EricLew | 0:80ee8f3b695e | 1544 | __LSCO_CLK_ENABLE(); |
EricLew | 0:80ee8f3b695e | 1545 | |
EricLew | 0:80ee8f3b695e | 1546 | /* Configue the LSCO pin in analog mode */ |
EricLew | 0:80ee8f3b695e | 1547 | GPIO_InitStruct.Pin = LSCO_PIN; |
EricLew | 0:80ee8f3b695e | 1548 | GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; |
EricLew | 0:80ee8f3b695e | 1549 | GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH; |
EricLew | 0:80ee8f3b695e | 1550 | GPIO_InitStruct.Pull = GPIO_NOPULL; |
EricLew | 0:80ee8f3b695e | 1551 | HAL_GPIO_Init(LSCO_GPIO_PORT, &GPIO_InitStruct); |
EricLew | 0:80ee8f3b695e | 1552 | |
EricLew | 0:80ee8f3b695e | 1553 | /* Update LSCOSEL clock source in Backup Domain control register */ |
EricLew | 0:80ee8f3b695e | 1554 | if(__HAL_RCC_PWR_IS_CLK_DISABLED()) |
EricLew | 0:80ee8f3b695e | 1555 | { |
EricLew | 0:80ee8f3b695e | 1556 | __HAL_RCC_PWR_CLK_ENABLE(); |
EricLew | 0:80ee8f3b695e | 1557 | pwrclkchanged = SET; |
EricLew | 0:80ee8f3b695e | 1558 | } |
EricLew | 0:80ee8f3b695e | 1559 | if(HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP)) |
EricLew | 0:80ee8f3b695e | 1560 | { |
EricLew | 0:80ee8f3b695e | 1561 | HAL_PWR_EnableBkUpAccess(); |
EricLew | 0:80ee8f3b695e | 1562 | backupchanged = SET; |
EricLew | 0:80ee8f3b695e | 1563 | } |
EricLew | 0:80ee8f3b695e | 1564 | |
EricLew | 0:80ee8f3b695e | 1565 | MODIFY_REG(RCC->BDCR, RCC_BDCR_LSCOSEL | RCC_BDCR_LSCOEN, LSCOSource | RCC_BDCR_LSCOEN); |
EricLew | 0:80ee8f3b695e | 1566 | |
EricLew | 0:80ee8f3b695e | 1567 | if(backupchanged == SET) |
EricLew | 0:80ee8f3b695e | 1568 | { |
EricLew | 0:80ee8f3b695e | 1569 | HAL_PWR_DisableBkUpAccess(); |
EricLew | 0:80ee8f3b695e | 1570 | } |
EricLew | 0:80ee8f3b695e | 1571 | if(pwrclkchanged == SET) |
EricLew | 0:80ee8f3b695e | 1572 | { |
EricLew | 0:80ee8f3b695e | 1573 | __HAL_RCC_PWR_CLK_DISABLE(); |
EricLew | 0:80ee8f3b695e | 1574 | } |
EricLew | 0:80ee8f3b695e | 1575 | } |
EricLew | 0:80ee8f3b695e | 1576 | |
EricLew | 0:80ee8f3b695e | 1577 | /** |
EricLew | 0:80ee8f3b695e | 1578 | * @brief Disable the Low Speed clock output. |
EricLew | 0:80ee8f3b695e | 1579 | * @retval None |
EricLew | 0:80ee8f3b695e | 1580 | */ |
EricLew | 0:80ee8f3b695e | 1581 | void HAL_RCCEx_DisableLSCO(void) |
EricLew | 0:80ee8f3b695e | 1582 | { |
EricLew | 0:80ee8f3b695e | 1583 | FlagStatus pwrclkchanged = RESET; |
EricLew | 0:80ee8f3b695e | 1584 | FlagStatus backupchanged = RESET; |
EricLew | 0:80ee8f3b695e | 1585 | |
EricLew | 0:80ee8f3b695e | 1586 | /* Update LSCOEN bit in Backup Domain control register */ |
EricLew | 0:80ee8f3b695e | 1587 | if(__HAL_RCC_PWR_IS_CLK_DISABLED()) |
EricLew | 0:80ee8f3b695e | 1588 | { |
EricLew | 0:80ee8f3b695e | 1589 | __HAL_RCC_PWR_CLK_ENABLE(); |
EricLew | 0:80ee8f3b695e | 1590 | pwrclkchanged = SET; |
EricLew | 0:80ee8f3b695e | 1591 | } |
EricLew | 0:80ee8f3b695e | 1592 | if(HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP)) |
EricLew | 0:80ee8f3b695e | 1593 | { |
EricLew | 0:80ee8f3b695e | 1594 | /* Enable access to the backup domain */ |
EricLew | 0:80ee8f3b695e | 1595 | HAL_PWR_EnableBkUpAccess(); |
EricLew | 0:80ee8f3b695e | 1596 | backupchanged = SET; |
EricLew | 0:80ee8f3b695e | 1597 | } |
EricLew | 0:80ee8f3b695e | 1598 | |
EricLew | 0:80ee8f3b695e | 1599 | CLEAR_BIT(RCC->BDCR, RCC_BDCR_LSCOEN); |
EricLew | 0:80ee8f3b695e | 1600 | |
EricLew | 0:80ee8f3b695e | 1601 | /* Restore previous configuration */ |
EricLew | 0:80ee8f3b695e | 1602 | if(backupchanged == SET) |
EricLew | 0:80ee8f3b695e | 1603 | { |
EricLew | 0:80ee8f3b695e | 1604 | /* Disable access to the backup domain */ |
EricLew | 0:80ee8f3b695e | 1605 | HAL_PWR_DisableBkUpAccess(); |
EricLew | 0:80ee8f3b695e | 1606 | } |
EricLew | 0:80ee8f3b695e | 1607 | if(pwrclkchanged == SET) |
EricLew | 0:80ee8f3b695e | 1608 | { |
EricLew | 0:80ee8f3b695e | 1609 | __HAL_RCC_PWR_CLK_DISABLE(); |
EricLew | 0:80ee8f3b695e | 1610 | } |
EricLew | 0:80ee8f3b695e | 1611 | } |
EricLew | 0:80ee8f3b695e | 1612 | |
EricLew | 0:80ee8f3b695e | 1613 | /** |
EricLew | 0:80ee8f3b695e | 1614 | * @brief Enable the PLL-mode of the MSI. |
EricLew | 0:80ee8f3b695e | 1615 | * @note Prior to enable the PLL-mode of the MSI for automatic hardware |
EricLew | 0:80ee8f3b695e | 1616 | * calibration LSE oscillator is to be enabled with HAL_RCC_OscConfig(). |
EricLew | 0:80ee8f3b695e | 1617 | * @retval None |
EricLew | 0:80ee8f3b695e | 1618 | */ |
EricLew | 0:80ee8f3b695e | 1619 | void HAL_RCCEx_EnableMSIPLLMode(void) |
EricLew | 0:80ee8f3b695e | 1620 | { |
EricLew | 0:80ee8f3b695e | 1621 | SET_BIT(RCC->CR, RCC_CR_MSIPLLEN) ; |
EricLew | 0:80ee8f3b695e | 1622 | } |
EricLew | 0:80ee8f3b695e | 1623 | |
EricLew | 0:80ee8f3b695e | 1624 | /** |
EricLew | 0:80ee8f3b695e | 1625 | * @brief Disable the PLL-mode of the MSI. |
EricLew | 0:80ee8f3b695e | 1626 | * @note PLL-mode of the MSI is automatically reset when LSE oscillator is disabled. |
EricLew | 0:80ee8f3b695e | 1627 | * @retval None |
EricLew | 0:80ee8f3b695e | 1628 | */ |
EricLew | 0:80ee8f3b695e | 1629 | void HAL_RCCEx_DisableMSIPLLMode(void) |
EricLew | 0:80ee8f3b695e | 1630 | { |
EricLew | 0:80ee8f3b695e | 1631 | CLEAR_BIT(RCC->CR, RCC_CR_MSIPLLEN) ; |
EricLew | 0:80ee8f3b695e | 1632 | } |
EricLew | 0:80ee8f3b695e | 1633 | |
EricLew | 0:80ee8f3b695e | 1634 | /** |
EricLew | 0:80ee8f3b695e | 1635 | * @} |
EricLew | 0:80ee8f3b695e | 1636 | */ |
EricLew | 0:80ee8f3b695e | 1637 | |
EricLew | 0:80ee8f3b695e | 1638 | /** |
EricLew | 0:80ee8f3b695e | 1639 | * @} |
EricLew | 0:80ee8f3b695e | 1640 | */ |
EricLew | 0:80ee8f3b695e | 1641 | |
EricLew | 0:80ee8f3b695e | 1642 | /** @addtogroup RCCEx_Private_Functions |
EricLew | 0:80ee8f3b695e | 1643 | * @{ |
EricLew | 0:80ee8f3b695e | 1644 | */ |
EricLew | 0:80ee8f3b695e | 1645 | |
EricLew | 0:80ee8f3b695e | 1646 | /** |
EricLew | 0:80ee8f3b695e | 1647 | * @brief Configure the parameters N & P of PLLSAI1 and enable PLLSAI1 output clock(s). |
EricLew | 0:80ee8f3b695e | 1648 | * @param PllSai1 pointer to an RCC_PLLSAI1InitTypeDef structure that |
EricLew | 0:80ee8f3b695e | 1649 | * contains the configuration parameters N & P as well as PLLSAI1 output clock(s) |
EricLew | 0:80ee8f3b695e | 1650 | * |
EricLew | 0:80ee8f3b695e | 1651 | * @note PLLSAI1 is temporary disable to apply new parameters |
EricLew | 0:80ee8f3b695e | 1652 | * |
EricLew | 0:80ee8f3b695e | 1653 | * @retval HAL status |
EricLew | 0:80ee8f3b695e | 1654 | */ |
EricLew | 0:80ee8f3b695e | 1655 | static HAL_StatusTypeDef RCCEx_PLLSAI1_ConfigNP(RCC_PLLSAI1InitTypeDef *PllSai1) |
EricLew | 0:80ee8f3b695e | 1656 | { |
EricLew | 0:80ee8f3b695e | 1657 | uint32_t tickstart = 0; |
EricLew | 0:80ee8f3b695e | 1658 | HAL_StatusTypeDef status = HAL_OK; |
EricLew | 0:80ee8f3b695e | 1659 | |
EricLew | 0:80ee8f3b695e | 1660 | /* check for PLLSAI1 Parameters used to output PLLSAI1CLK */ |
EricLew | 0:80ee8f3b695e | 1661 | assert_param(IS_RCC_PLLSAI1N_VALUE(PllSai1->PLLSAI1N)); |
EricLew | 0:80ee8f3b695e | 1662 | assert_param(IS_RCC_PLLSAI1P_VALUE(PllSai1->PLLSAI1P)); |
EricLew | 0:80ee8f3b695e | 1663 | assert_param(IS_RCC_PLLSAI1CLOCKOUT_VALUE(PllSai1->PLLSAI1ClockOut)); |
EricLew | 0:80ee8f3b695e | 1664 | |
EricLew | 0:80ee8f3b695e | 1665 | /* Disable the PLLSAI1 */ |
EricLew | 0:80ee8f3b695e | 1666 | __HAL_RCC_PLLSAI1_DISABLE(); |
EricLew | 0:80ee8f3b695e | 1667 | |
EricLew | 0:80ee8f3b695e | 1668 | /* Get Start Tick*/ |
EricLew | 0:80ee8f3b695e | 1669 | tickstart = HAL_GetTick(); |
EricLew | 0:80ee8f3b695e | 1670 | |
EricLew | 0:80ee8f3b695e | 1671 | /* Wait till PLLSAI1 is ready to be updated */ |
EricLew | 0:80ee8f3b695e | 1672 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLSAI1RDY) != RESET) |
EricLew | 0:80ee8f3b695e | 1673 | { |
EricLew | 0:80ee8f3b695e | 1674 | if((HAL_GetTick() - tickstart) > PLLSAI1_TIMEOUT_VALUE) |
EricLew | 0:80ee8f3b695e | 1675 | { |
EricLew | 0:80ee8f3b695e | 1676 | status = HAL_TIMEOUT; |
EricLew | 0:80ee8f3b695e | 1677 | break; |
EricLew | 0:80ee8f3b695e | 1678 | } |
EricLew | 0:80ee8f3b695e | 1679 | } |
EricLew | 0:80ee8f3b695e | 1680 | |
EricLew | 0:80ee8f3b695e | 1681 | if(status == HAL_OK) |
EricLew | 0:80ee8f3b695e | 1682 | { |
EricLew | 0:80ee8f3b695e | 1683 | /* Configure the PLLSAI1 Multiplication factor N */ |
EricLew | 0:80ee8f3b695e | 1684 | __HAL_RCC_PLLSAI1_MULN_CONFIG(PllSai1->PLLSAI1N); |
EricLew | 0:80ee8f3b695e | 1685 | /* Configure the PLLSAI1 Division factor P */ |
EricLew | 0:80ee8f3b695e | 1686 | __HAL_RCC_PLLSAI1_DIVP_CONFIG(PllSai1->PLLSAI1P); |
EricLew | 0:80ee8f3b695e | 1687 | |
EricLew | 0:80ee8f3b695e | 1688 | /* Enable the PLLSAI1 again by setting PLLSAI1ON to 1*/ |
EricLew | 0:80ee8f3b695e | 1689 | __HAL_RCC_PLLSAI1_ENABLE(); |
EricLew | 0:80ee8f3b695e | 1690 | |
EricLew | 0:80ee8f3b695e | 1691 | /* Get Start Tick*/ |
EricLew | 0:80ee8f3b695e | 1692 | tickstart = HAL_GetTick(); |
EricLew | 0:80ee8f3b695e | 1693 | |
EricLew | 0:80ee8f3b695e | 1694 | /* Wait till PLLSAI1 is ready */ |
EricLew | 0:80ee8f3b695e | 1695 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLSAI1RDY) == RESET) |
EricLew | 0:80ee8f3b695e | 1696 | { |
EricLew | 0:80ee8f3b695e | 1697 | if((HAL_GetTick() - tickstart) > PLLSAI1_TIMEOUT_VALUE) |
EricLew | 0:80ee8f3b695e | 1698 | { |
EricLew | 0:80ee8f3b695e | 1699 | status = HAL_TIMEOUT; |
EricLew | 0:80ee8f3b695e | 1700 | break; |
EricLew | 0:80ee8f3b695e | 1701 | } |
EricLew | 0:80ee8f3b695e | 1702 | } |
EricLew | 0:80ee8f3b695e | 1703 | |
EricLew | 0:80ee8f3b695e | 1704 | if(status == HAL_OK) |
EricLew | 0:80ee8f3b695e | 1705 | { |
EricLew | 0:80ee8f3b695e | 1706 | /* Configure the PLLSAI1 Clock output(s) */ |
EricLew | 0:80ee8f3b695e | 1707 | __HAL_RCC_PLLSAI1CLKOUT_ENABLE(PllSai1->PLLSAI1ClockOut); |
EricLew | 0:80ee8f3b695e | 1708 | } |
EricLew | 0:80ee8f3b695e | 1709 | } |
EricLew | 0:80ee8f3b695e | 1710 | |
EricLew | 0:80ee8f3b695e | 1711 | return status; |
EricLew | 0:80ee8f3b695e | 1712 | } |
EricLew | 0:80ee8f3b695e | 1713 | |
EricLew | 0:80ee8f3b695e | 1714 | /** |
EricLew | 0:80ee8f3b695e | 1715 | * @brief Configure the parameters N & Q of PLLSAI1 and enable PLLSAI1 output clock(s). |
EricLew | 0:80ee8f3b695e | 1716 | * @param PllSai1 pointer to an RCC_PLLSAI1InitTypeDef structure that |
EricLew | 0:80ee8f3b695e | 1717 | * contains the configuration parameters N & Q as well as PLLSAI1 output clock(s) |
EricLew | 0:80ee8f3b695e | 1718 | * |
EricLew | 0:80ee8f3b695e | 1719 | * @note PLLSAI1 is temporary disable to apply new parameters |
EricLew | 0:80ee8f3b695e | 1720 | * |
EricLew | 0:80ee8f3b695e | 1721 | * @retval HAL status |
EricLew | 0:80ee8f3b695e | 1722 | */ |
EricLew | 0:80ee8f3b695e | 1723 | static HAL_StatusTypeDef RCCEx_PLLSAI1_ConfigNQ(RCC_PLLSAI1InitTypeDef *PllSai1) |
EricLew | 0:80ee8f3b695e | 1724 | { |
EricLew | 0:80ee8f3b695e | 1725 | uint32_t tickstart = 0; |
EricLew | 0:80ee8f3b695e | 1726 | HAL_StatusTypeDef status = HAL_OK; |
EricLew | 0:80ee8f3b695e | 1727 | |
EricLew | 0:80ee8f3b695e | 1728 | /* check for PLLSAI1 Parameters used to output PLLSAI1CLK */ |
EricLew | 0:80ee8f3b695e | 1729 | assert_param(IS_RCC_PLLSAI1N_VALUE(PllSai1->PLLSAI1N)); |
EricLew | 0:80ee8f3b695e | 1730 | assert_param(IS_RCC_PLLSAI1Q_VALUE(PllSai1->PLLSAI1Q)); |
EricLew | 0:80ee8f3b695e | 1731 | assert_param(IS_RCC_PLLSAI1CLOCKOUT_VALUE(PllSai1->PLLSAI1ClockOut)); |
EricLew | 0:80ee8f3b695e | 1732 | |
EricLew | 0:80ee8f3b695e | 1733 | /* Disable the PLLSAI1 */ |
EricLew | 0:80ee8f3b695e | 1734 | __HAL_RCC_PLLSAI1_DISABLE(); |
EricLew | 0:80ee8f3b695e | 1735 | |
EricLew | 0:80ee8f3b695e | 1736 | /* Get Start Tick*/ |
EricLew | 0:80ee8f3b695e | 1737 | tickstart = HAL_GetTick(); |
EricLew | 0:80ee8f3b695e | 1738 | |
EricLew | 0:80ee8f3b695e | 1739 | /* Wait till PLLSAI1 is ready to be updated */ |
EricLew | 0:80ee8f3b695e | 1740 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLSAI1RDY) != RESET) |
EricLew | 0:80ee8f3b695e | 1741 | { |
EricLew | 0:80ee8f3b695e | 1742 | if((HAL_GetTick() - tickstart) > PLLSAI1_TIMEOUT_VALUE) |
EricLew | 0:80ee8f3b695e | 1743 | { |
EricLew | 0:80ee8f3b695e | 1744 | status = HAL_TIMEOUT; |
EricLew | 0:80ee8f3b695e | 1745 | break; |
EricLew | 0:80ee8f3b695e | 1746 | } |
EricLew | 0:80ee8f3b695e | 1747 | } |
EricLew | 0:80ee8f3b695e | 1748 | |
EricLew | 0:80ee8f3b695e | 1749 | if(status == HAL_OK) |
EricLew | 0:80ee8f3b695e | 1750 | { |
EricLew | 0:80ee8f3b695e | 1751 | /* Configure the PLLSAI1 Multiplication factor N */ |
EricLew | 0:80ee8f3b695e | 1752 | __HAL_RCC_PLLSAI1_MULN_CONFIG(PllSai1->PLLSAI1N); |
EricLew | 0:80ee8f3b695e | 1753 | /* Configure the PLLSAI1 Division factor Q */ |
EricLew | 0:80ee8f3b695e | 1754 | __HAL_RCC_PLLSAI1_DIVQ_CONFIG(PllSai1->PLLSAI1Q); |
EricLew | 0:80ee8f3b695e | 1755 | |
EricLew | 0:80ee8f3b695e | 1756 | /* Enable the PLLSAI1 again by setting PLLSAI1ON to 1*/ |
EricLew | 0:80ee8f3b695e | 1757 | __HAL_RCC_PLLSAI1_ENABLE(); |
EricLew | 0:80ee8f3b695e | 1758 | |
EricLew | 0:80ee8f3b695e | 1759 | /* Get Start Tick*/ |
EricLew | 0:80ee8f3b695e | 1760 | tickstart = HAL_GetTick(); |
EricLew | 0:80ee8f3b695e | 1761 | |
EricLew | 0:80ee8f3b695e | 1762 | /* Wait till PLLSAI1 is ready */ |
EricLew | 0:80ee8f3b695e | 1763 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLSAI1RDY) == RESET) |
EricLew | 0:80ee8f3b695e | 1764 | { |
EricLew | 0:80ee8f3b695e | 1765 | if((HAL_GetTick() - tickstart) > PLLSAI1_TIMEOUT_VALUE) |
EricLew | 0:80ee8f3b695e | 1766 | { |
EricLew | 0:80ee8f3b695e | 1767 | status = HAL_TIMEOUT; |
EricLew | 0:80ee8f3b695e | 1768 | break; |
EricLew | 0:80ee8f3b695e | 1769 | } |
EricLew | 0:80ee8f3b695e | 1770 | } |
EricLew | 0:80ee8f3b695e | 1771 | |
EricLew | 0:80ee8f3b695e | 1772 | if(status == HAL_OK) |
EricLew | 0:80ee8f3b695e | 1773 | { |
EricLew | 0:80ee8f3b695e | 1774 | /* Configure the PLLSAI1 Clock output(s) */ |
EricLew | 0:80ee8f3b695e | 1775 | __HAL_RCC_PLLSAI1CLKOUT_ENABLE(PllSai1->PLLSAI1ClockOut); |
EricLew | 0:80ee8f3b695e | 1776 | } |
EricLew | 0:80ee8f3b695e | 1777 | } |
EricLew | 0:80ee8f3b695e | 1778 | |
EricLew | 0:80ee8f3b695e | 1779 | return status; |
EricLew | 0:80ee8f3b695e | 1780 | } |
EricLew | 0:80ee8f3b695e | 1781 | |
EricLew | 0:80ee8f3b695e | 1782 | /** |
EricLew | 0:80ee8f3b695e | 1783 | * @brief Configure the parameters N & R of PLLSAI1 and enable PLLSAI1 output clock(s). |
EricLew | 0:80ee8f3b695e | 1784 | * @param PllSai1 pointer to an RCC_PLLSAI1InitTypeDef structure that |
EricLew | 0:80ee8f3b695e | 1785 | * contains the configuration parameters N & R as well as PLLSAI1 output clock(s) |
EricLew | 0:80ee8f3b695e | 1786 | * |
EricLew | 0:80ee8f3b695e | 1787 | * @note PLLSAI1 is temporary disable to apply new parameters |
EricLew | 0:80ee8f3b695e | 1788 | * |
EricLew | 0:80ee8f3b695e | 1789 | * @retval HAL status |
EricLew | 0:80ee8f3b695e | 1790 | */ |
EricLew | 0:80ee8f3b695e | 1791 | static HAL_StatusTypeDef RCCEx_PLLSAI1_ConfigNR(RCC_PLLSAI1InitTypeDef *PllSai1) |
EricLew | 0:80ee8f3b695e | 1792 | { |
EricLew | 0:80ee8f3b695e | 1793 | uint32_t tickstart = 0; |
EricLew | 0:80ee8f3b695e | 1794 | HAL_StatusTypeDef status = HAL_OK; |
EricLew | 0:80ee8f3b695e | 1795 | |
EricLew | 0:80ee8f3b695e | 1796 | /* check for PLLSAI1 Parameters used to output PLLSAI1CLK */ |
EricLew | 0:80ee8f3b695e | 1797 | assert_param(IS_RCC_PLLSAI1N_VALUE(PllSai1->PLLSAI1N)); |
EricLew | 0:80ee8f3b695e | 1798 | assert_param(IS_RCC_PLLSAI1R_VALUE(PllSai1->PLLSAI1R)); |
EricLew | 0:80ee8f3b695e | 1799 | assert_param(IS_RCC_PLLSAI1CLOCKOUT_VALUE(PllSai1->PLLSAI1ClockOut)); |
EricLew | 0:80ee8f3b695e | 1800 | |
EricLew | 0:80ee8f3b695e | 1801 | /* Disable the PLLSAI1 */ |
EricLew | 0:80ee8f3b695e | 1802 | __HAL_RCC_PLLSAI1_DISABLE(); |
EricLew | 0:80ee8f3b695e | 1803 | |
EricLew | 0:80ee8f3b695e | 1804 | /* Get Start Tick*/ |
EricLew | 0:80ee8f3b695e | 1805 | tickstart = HAL_GetTick(); |
EricLew | 0:80ee8f3b695e | 1806 | |
EricLew | 0:80ee8f3b695e | 1807 | /* Wait till PLLSAI1 is ready to be updated */ |
EricLew | 0:80ee8f3b695e | 1808 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLSAI1RDY) != RESET) |
EricLew | 0:80ee8f3b695e | 1809 | { |
EricLew | 0:80ee8f3b695e | 1810 | if((HAL_GetTick() - tickstart) > PLLSAI1_TIMEOUT_VALUE) |
EricLew | 0:80ee8f3b695e | 1811 | { |
EricLew | 0:80ee8f3b695e | 1812 | status = HAL_TIMEOUT; |
EricLew | 0:80ee8f3b695e | 1813 | break; |
EricLew | 0:80ee8f3b695e | 1814 | } |
EricLew | 0:80ee8f3b695e | 1815 | } |
EricLew | 0:80ee8f3b695e | 1816 | |
EricLew | 0:80ee8f3b695e | 1817 | if(status == HAL_OK) |
EricLew | 0:80ee8f3b695e | 1818 | { |
EricLew | 0:80ee8f3b695e | 1819 | /* Configure the PLLSAI1 Multiplication factor N */ |
EricLew | 0:80ee8f3b695e | 1820 | __HAL_RCC_PLLSAI1_MULN_CONFIG(PllSai1->PLLSAI1N); |
EricLew | 0:80ee8f3b695e | 1821 | /* Configure the PLLSAI1 Division factor R */ |
EricLew | 0:80ee8f3b695e | 1822 | __HAL_RCC_PLLSAI1_DIVR_CONFIG(PllSai1->PLLSAI1R); |
EricLew | 0:80ee8f3b695e | 1823 | |
EricLew | 0:80ee8f3b695e | 1824 | /* Enable the PLLSAI1 again by setting PLLSAI1ON to 1*/ |
EricLew | 0:80ee8f3b695e | 1825 | __HAL_RCC_PLLSAI1_ENABLE(); |
EricLew | 0:80ee8f3b695e | 1826 | |
EricLew | 0:80ee8f3b695e | 1827 | /* Get Start Tick*/ |
EricLew | 0:80ee8f3b695e | 1828 | tickstart = HAL_GetTick(); |
EricLew | 0:80ee8f3b695e | 1829 | |
EricLew | 0:80ee8f3b695e | 1830 | /* Wait till PLLSAI1 is ready */ |
EricLew | 0:80ee8f3b695e | 1831 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLSAI1RDY) == RESET) |
EricLew | 0:80ee8f3b695e | 1832 | { |
EricLew | 0:80ee8f3b695e | 1833 | if((HAL_GetTick() - tickstart) > PLLSAI1_TIMEOUT_VALUE) |
EricLew | 0:80ee8f3b695e | 1834 | { |
EricLew | 0:80ee8f3b695e | 1835 | status = HAL_TIMEOUT; |
EricLew | 0:80ee8f3b695e | 1836 | break; |
EricLew | 0:80ee8f3b695e | 1837 | } |
EricLew | 0:80ee8f3b695e | 1838 | } |
EricLew | 0:80ee8f3b695e | 1839 | |
EricLew | 0:80ee8f3b695e | 1840 | if(status == HAL_OK) |
EricLew | 0:80ee8f3b695e | 1841 | { |
EricLew | 0:80ee8f3b695e | 1842 | /* Configure the PLLSAI1 Clock output(s) */ |
EricLew | 0:80ee8f3b695e | 1843 | __HAL_RCC_PLLSAI1CLKOUT_ENABLE(PllSai1->PLLSAI1ClockOut); |
EricLew | 0:80ee8f3b695e | 1844 | } |
EricLew | 0:80ee8f3b695e | 1845 | } |
EricLew | 0:80ee8f3b695e | 1846 | |
EricLew | 0:80ee8f3b695e | 1847 | return status; |
EricLew | 0:80ee8f3b695e | 1848 | } |
EricLew | 0:80ee8f3b695e | 1849 | |
EricLew | 0:80ee8f3b695e | 1850 | /** |
EricLew | 0:80ee8f3b695e | 1851 | * @brief Configure the parameters N & P of PLLSAI2 and enable PLLSAI2 output clock(s). |
EricLew | 0:80ee8f3b695e | 1852 | * @param PllSai2 pointer to an RCC_PLLSAI2InitTypeDef structure that |
EricLew | 0:80ee8f3b695e | 1853 | * contains the configuration parameters N & P as well as PLLSAI2 output clock(s) |
EricLew | 0:80ee8f3b695e | 1854 | * |
EricLew | 0:80ee8f3b695e | 1855 | * @note PLLSAI2 is temporary disable to apply new parameters |
EricLew | 0:80ee8f3b695e | 1856 | * |
EricLew | 0:80ee8f3b695e | 1857 | * @retval HAL status |
EricLew | 0:80ee8f3b695e | 1858 | */ |
EricLew | 0:80ee8f3b695e | 1859 | static HAL_StatusTypeDef RCCEx_PLLSAI2_ConfigNP(RCC_PLLSAI2InitTypeDef *PllSai2) |
EricLew | 0:80ee8f3b695e | 1860 | { |
EricLew | 0:80ee8f3b695e | 1861 | uint32_t tickstart = 0; |
EricLew | 0:80ee8f3b695e | 1862 | HAL_StatusTypeDef status = HAL_OK; |
EricLew | 0:80ee8f3b695e | 1863 | |
EricLew | 0:80ee8f3b695e | 1864 | /* check for PLLSAI2 Parameters */ |
EricLew | 0:80ee8f3b695e | 1865 | assert_param(IS_RCC_PLLSAI2N_VALUE(PllSai2->PLLSAI2N)); |
EricLew | 0:80ee8f3b695e | 1866 | assert_param(IS_RCC_PLLSAI2P_VALUE(PllSai2->PLLSAI2P)); |
EricLew | 0:80ee8f3b695e | 1867 | assert_param(IS_RCC_PLLSAI2CLOCKOUT_VALUE(PllSai2->PLLSAI2ClockOut)); |
EricLew | 0:80ee8f3b695e | 1868 | |
EricLew | 0:80ee8f3b695e | 1869 | /* Disable the PLLSAI2 */ |
EricLew | 0:80ee8f3b695e | 1870 | __HAL_RCC_PLLSAI2_DISABLE(); |
EricLew | 0:80ee8f3b695e | 1871 | |
EricLew | 0:80ee8f3b695e | 1872 | /* Get Start Tick*/ |
EricLew | 0:80ee8f3b695e | 1873 | tickstart = HAL_GetTick(); |
EricLew | 0:80ee8f3b695e | 1874 | |
EricLew | 0:80ee8f3b695e | 1875 | /* Wait till PLLSAI2 is ready */ |
EricLew | 0:80ee8f3b695e | 1876 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLSAI2RDY) != RESET) |
EricLew | 0:80ee8f3b695e | 1877 | { |
EricLew | 0:80ee8f3b695e | 1878 | if((HAL_GetTick() - tickstart) > PLLSAI2_TIMEOUT_VALUE) |
EricLew | 0:80ee8f3b695e | 1879 | { |
EricLew | 0:80ee8f3b695e | 1880 | status = HAL_TIMEOUT; |
EricLew | 0:80ee8f3b695e | 1881 | break; |
EricLew | 0:80ee8f3b695e | 1882 | } |
EricLew | 0:80ee8f3b695e | 1883 | } |
EricLew | 0:80ee8f3b695e | 1884 | |
EricLew | 0:80ee8f3b695e | 1885 | if(status == HAL_OK) |
EricLew | 0:80ee8f3b695e | 1886 | { |
EricLew | 0:80ee8f3b695e | 1887 | /* Configure the PLLSAI2 Multiplication factor N */ |
EricLew | 0:80ee8f3b695e | 1888 | __HAL_RCC_PLLSAI2_MULN_CONFIG(PllSai2->PLLSAI2N); |
EricLew | 0:80ee8f3b695e | 1889 | /* Configure the PLLSAI2 Division factor P */ |
EricLew | 0:80ee8f3b695e | 1890 | __HAL_RCC_PLLSAI2_DIVP_CONFIG(PllSai2->PLLSAI2P); |
EricLew | 0:80ee8f3b695e | 1891 | |
EricLew | 0:80ee8f3b695e | 1892 | /* Enable the PLLSAI2 again by setting PLLSAI2ON to 1*/ |
EricLew | 0:80ee8f3b695e | 1893 | __HAL_RCC_PLLSAI2_ENABLE(); |
EricLew | 0:80ee8f3b695e | 1894 | |
EricLew | 0:80ee8f3b695e | 1895 | /* Get Start Tick*/ |
EricLew | 0:80ee8f3b695e | 1896 | tickstart = HAL_GetTick(); |
EricLew | 0:80ee8f3b695e | 1897 | |
EricLew | 0:80ee8f3b695e | 1898 | /* Wait till PLLSAI2 is ready */ |
EricLew | 0:80ee8f3b695e | 1899 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLSAI2RDY) == RESET) |
EricLew | 0:80ee8f3b695e | 1900 | { |
EricLew | 0:80ee8f3b695e | 1901 | if((HAL_GetTick() - tickstart) > PLLSAI2_TIMEOUT_VALUE) |
EricLew | 0:80ee8f3b695e | 1902 | { |
EricLew | 0:80ee8f3b695e | 1903 | status = HAL_TIMEOUT; |
EricLew | 0:80ee8f3b695e | 1904 | break; |
EricLew | 0:80ee8f3b695e | 1905 | } |
EricLew | 0:80ee8f3b695e | 1906 | } |
EricLew | 0:80ee8f3b695e | 1907 | |
EricLew | 0:80ee8f3b695e | 1908 | if(status == HAL_OK) |
EricLew | 0:80ee8f3b695e | 1909 | { |
EricLew | 0:80ee8f3b695e | 1910 | /* Configure the PLLSAI2 Clock output(s) */ |
EricLew | 0:80ee8f3b695e | 1911 | __HAL_RCC_PLLSAI2CLKOUT_ENABLE(PllSai2->PLLSAI2ClockOut); |
EricLew | 0:80ee8f3b695e | 1912 | } |
EricLew | 0:80ee8f3b695e | 1913 | } |
EricLew | 0:80ee8f3b695e | 1914 | |
EricLew | 0:80ee8f3b695e | 1915 | return status; |
EricLew | 0:80ee8f3b695e | 1916 | } |
EricLew | 0:80ee8f3b695e | 1917 | |
EricLew | 0:80ee8f3b695e | 1918 | /** |
EricLew | 0:80ee8f3b695e | 1919 | * @brief Configure the parameters N & R of PLLSAI2 and enable PLLSAI2 output clock(s). |
EricLew | 0:80ee8f3b695e | 1920 | * @param PllSai2 pointer to an RCC_PLLSAI2InitTypeDef structure that |
EricLew | 0:80ee8f3b695e | 1921 | * contains the configuration parameters N & R as well as PLLSAI2 output clock(s) |
EricLew | 0:80ee8f3b695e | 1922 | * |
EricLew | 0:80ee8f3b695e | 1923 | * @note PLLSAI2 is temporary disable to apply new parameters |
EricLew | 0:80ee8f3b695e | 1924 | * |
EricLew | 0:80ee8f3b695e | 1925 | * @retval HAL status |
EricLew | 0:80ee8f3b695e | 1926 | */ |
EricLew | 0:80ee8f3b695e | 1927 | static HAL_StatusTypeDef RCCEx_PLLSAI2_ConfigNR(RCC_PLLSAI2InitTypeDef *PllSai2) |
EricLew | 0:80ee8f3b695e | 1928 | { |
EricLew | 0:80ee8f3b695e | 1929 | uint32_t tickstart = 0; |
EricLew | 0:80ee8f3b695e | 1930 | HAL_StatusTypeDef status = HAL_OK; |
EricLew | 0:80ee8f3b695e | 1931 | |
EricLew | 0:80ee8f3b695e | 1932 | /* check for PLLSAI2 Parameters */ |
EricLew | 0:80ee8f3b695e | 1933 | assert_param(IS_RCC_PLLSAI2N_VALUE(PllSai2->PLLSAI2N)); |
EricLew | 0:80ee8f3b695e | 1934 | assert_param(IS_RCC_PLLSAI2R_VALUE(PllSai2->PLLSAI2R)); |
EricLew | 0:80ee8f3b695e | 1935 | assert_param(IS_RCC_PLLSAI2CLOCKOUT_VALUE(PllSai2->PLLSAI2ClockOut)); |
EricLew | 0:80ee8f3b695e | 1936 | |
EricLew | 0:80ee8f3b695e | 1937 | /* Disable the PLLSAI2 */ |
EricLew | 0:80ee8f3b695e | 1938 | __HAL_RCC_PLLSAI2_DISABLE(); |
EricLew | 0:80ee8f3b695e | 1939 | |
EricLew | 0:80ee8f3b695e | 1940 | /* Get Start Tick*/ |
EricLew | 0:80ee8f3b695e | 1941 | tickstart = HAL_GetTick(); |
EricLew | 0:80ee8f3b695e | 1942 | |
EricLew | 0:80ee8f3b695e | 1943 | /* Wait till PLLSAI2 is ready */ |
EricLew | 0:80ee8f3b695e | 1944 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLSAI2RDY) != RESET) |
EricLew | 0:80ee8f3b695e | 1945 | { |
EricLew | 0:80ee8f3b695e | 1946 | if((HAL_GetTick() - tickstart) > PLLSAI2_TIMEOUT_VALUE) |
EricLew | 0:80ee8f3b695e | 1947 | { |
EricLew | 0:80ee8f3b695e | 1948 | status = HAL_TIMEOUT; |
EricLew | 0:80ee8f3b695e | 1949 | break; |
EricLew | 0:80ee8f3b695e | 1950 | } |
EricLew | 0:80ee8f3b695e | 1951 | } |
EricLew | 0:80ee8f3b695e | 1952 | |
EricLew | 0:80ee8f3b695e | 1953 | if(status == HAL_OK) |
EricLew | 0:80ee8f3b695e | 1954 | { |
EricLew | 0:80ee8f3b695e | 1955 | /* Configure the PLLSAI2 Multiplication factor N */ |
EricLew | 0:80ee8f3b695e | 1956 | __HAL_RCC_PLLSAI2_MULN_CONFIG(PllSai2->PLLSAI2N); |
EricLew | 0:80ee8f3b695e | 1957 | /* Configure the PLLSAI2 Division factor R */ |
EricLew | 0:80ee8f3b695e | 1958 | __HAL_RCC_PLLSAI2_DIVR_CONFIG(PllSai2->PLLSAI2R); |
EricLew | 0:80ee8f3b695e | 1959 | |
EricLew | 0:80ee8f3b695e | 1960 | /* Enable the PLLSAI2 again by setting PLLSAI2ON to 1*/ |
EricLew | 0:80ee8f3b695e | 1961 | __HAL_RCC_PLLSAI2_ENABLE(); |
EricLew | 0:80ee8f3b695e | 1962 | |
EricLew | 0:80ee8f3b695e | 1963 | /* Get Start Tick*/ |
EricLew | 0:80ee8f3b695e | 1964 | tickstart = HAL_GetTick(); |
EricLew | 0:80ee8f3b695e | 1965 | |
EricLew | 0:80ee8f3b695e | 1966 | /* Wait till PLLSAI2 is ready */ |
EricLew | 0:80ee8f3b695e | 1967 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLSAI2RDY) == RESET) |
EricLew | 0:80ee8f3b695e | 1968 | { |
EricLew | 0:80ee8f3b695e | 1969 | if((HAL_GetTick() - tickstart) > PLLSAI2_TIMEOUT_VALUE) |
EricLew | 0:80ee8f3b695e | 1970 | { |
EricLew | 0:80ee8f3b695e | 1971 | status = HAL_TIMEOUT; |
EricLew | 0:80ee8f3b695e | 1972 | break; |
EricLew | 0:80ee8f3b695e | 1973 | } |
EricLew | 0:80ee8f3b695e | 1974 | } |
EricLew | 0:80ee8f3b695e | 1975 | |
EricLew | 0:80ee8f3b695e | 1976 | if(status == HAL_OK) |
EricLew | 0:80ee8f3b695e | 1977 | { |
EricLew | 0:80ee8f3b695e | 1978 | /* Configure the PLLSAI2 Clock output(s) */ |
EricLew | 0:80ee8f3b695e | 1979 | __HAL_RCC_PLLSAI2CLKOUT_ENABLE(PllSai2->PLLSAI2ClockOut); |
EricLew | 0:80ee8f3b695e | 1980 | } |
EricLew | 0:80ee8f3b695e | 1981 | } |
EricLew | 0:80ee8f3b695e | 1982 | |
EricLew | 0:80ee8f3b695e | 1983 | return status; |
EricLew | 0:80ee8f3b695e | 1984 | } |
EricLew | 0:80ee8f3b695e | 1985 | |
EricLew | 0:80ee8f3b695e | 1986 | /** |
EricLew | 0:80ee8f3b695e | 1987 | * @} |
EricLew | 0:80ee8f3b695e | 1988 | */ |
EricLew | 0:80ee8f3b695e | 1989 | |
EricLew | 0:80ee8f3b695e | 1990 | /** |
EricLew | 0:80ee8f3b695e | 1991 | * @} |
EricLew | 0:80ee8f3b695e | 1992 | */ |
EricLew | 0:80ee8f3b695e | 1993 | |
EricLew | 0:80ee8f3b695e | 1994 | #endif /* HAL_RCC_MODULE_ENABLED */ |
EricLew | 0:80ee8f3b695e | 1995 | /** |
EricLew | 0:80ee8f3b695e | 1996 | * @} |
EricLew | 0:80ee8f3b695e | 1997 | */ |
EricLew | 0:80ee8f3b695e | 1998 | |
EricLew | 0:80ee8f3b695e | 1999 | /** |
EricLew | 0:80ee8f3b695e | 2000 | * @} |
EricLew | 0:80ee8f3b695e | 2001 | */ |
EricLew | 0:80ee8f3b695e | 2002 | |
EricLew | 0:80ee8f3b695e | 2003 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
EricLew | 0:80ee8f3b695e | 2004 | |
EricLew | 0:80ee8f3b695e | 2005 |