Eric Lewiston / STM32L4xx_HAL_Driver

Hal Drivers for L4

Dependents:   BSP OneHopeOnePrayer FINAL_AUDIO_RECORD AudioDemo

Fork of STM32L4xx_HAL_Driver by Senior Design: Sound Monitor

Inc/stm32l4xx_ll_swpmi.h@2:7aef7655b0a8, 2015-11-25 (annotated)

Committer:
EricLew
Date:
Wed Nov 25 17:30:43 2015 +0000
Revision:
2:7aef7655b0a8
Parent:
0:80ee8f3b695e 
commit;

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EricLew 0:80ee8f3b695e 1 /**
EricLew 0:80ee8f3b695e 2 ******************************************************************************
EricLew 0:80ee8f3b695e 3 * @file stm32l4xx_ll_swpmi.h
EricLew 0:80ee8f3b695e 4 * @author MCD Application Team
EricLew 0:80ee8f3b695e 5 * @version V1.1.0
EricLew 0:80ee8f3b695e 6 * @date 16-September-2015
EricLew 0:80ee8f3b695e 7 * @brief Header file of SWPMI LL module.
EricLew 0:80ee8f3b695e 8 ******************************************************************************
EricLew 0:80ee8f3b695e 9 * @attention
EricLew 0:80ee8f3b695e 10 *
EricLew 0:80ee8f3b695e 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
EricLew 0:80ee8f3b695e 12 *
EricLew 0:80ee8f3b695e 13 * Redistribution and use in source and binary forms, with or without modification,
EricLew 0:80ee8f3b695e 14 * are permitted provided that the following conditions are met:
EricLew 0:80ee8f3b695e 15 * 1. Redistributions of source code must retain the above copyright notice,
EricLew 0:80ee8f3b695e 16 * this list of conditions and the following disclaimer.
EricLew 0:80ee8f3b695e 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
EricLew 0:80ee8f3b695e 18 * this list of conditions and the following disclaimer in the documentation
EricLew 0:80ee8f3b695e 19 * and/or other materials provided with the distribution.
EricLew 0:80ee8f3b695e 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
EricLew 0:80ee8f3b695e 21 * may be used to endorse or promote products derived from this software
EricLew 0:80ee8f3b695e 22 * without specific prior written permission.
EricLew 0:80ee8f3b695e 23 *
EricLew 0:80ee8f3b695e 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
EricLew 0:80ee8f3b695e 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
EricLew 0:80ee8f3b695e 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
EricLew 0:80ee8f3b695e 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
EricLew 0:80ee8f3b695e 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
EricLew 0:80ee8f3b695e 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
EricLew 0:80ee8f3b695e 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
EricLew 0:80ee8f3b695e 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
EricLew 0:80ee8f3b695e 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
EricLew 0:80ee8f3b695e 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
EricLew 0:80ee8f3b695e 34 *
EricLew 0:80ee8f3b695e 35 ******************************************************************************
EricLew 0:80ee8f3b695e 36 */
EricLew 0:80ee8f3b695e 37
EricLew 0:80ee8f3b695e 38 /* Define to prevent recursive inclusion -------------------------------------*/
EricLew 0:80ee8f3b695e 39 #ifndef __STM32L4xx_LL_SWPMI_H
EricLew 0:80ee8f3b695e 40 #define __STM32L4xx_LL_SWPMI_H
EricLew 0:80ee8f3b695e 41
EricLew 0:80ee8f3b695e 42 #ifdef __cplusplus
EricLew 0:80ee8f3b695e 43 extern "C" {
EricLew 0:80ee8f3b695e 44 #endif
EricLew 0:80ee8f3b695e 45
EricLew 0:80ee8f3b695e 46 /* Includes ------------------------------------------------------------------*/
EricLew 0:80ee8f3b695e 47 #include "stm32l4xx.h"
EricLew 0:80ee8f3b695e 48
EricLew 0:80ee8f3b695e 49 /** @addtogroup STM32L4xx_LL_Driver
EricLew 0:80ee8f3b695e 50 * @{
EricLew 0:80ee8f3b695e 51 */
EricLew 0:80ee8f3b695e 52
EricLew 0:80ee8f3b695e 53 #if defined (SWPMI1)
EricLew 0:80ee8f3b695e 54
EricLew 0:80ee8f3b695e 55 /** @defgroup SWPMI_LL SWPMI
EricLew 0:80ee8f3b695e 56 * @{
EricLew 0:80ee8f3b695e 57 */
EricLew 0:80ee8f3b695e 58
EricLew 0:80ee8f3b695e 59 /* Private types -------------------------------------------------------------*/
EricLew 0:80ee8f3b695e 60 /* Private variables ---------------------------------------------------------*/
EricLew 0:80ee8f3b695e 61
EricLew 0:80ee8f3b695e 62 /* Private constants ---------------------------------------------------------*/
EricLew 0:80ee8f3b695e 63
EricLew 0:80ee8f3b695e 64 /* Private macros ------------------------------------------------------------*/
EricLew 0:80ee8f3b695e 65
EricLew 0:80ee8f3b695e 66 /* Exported types ------------------------------------------------------------*/
EricLew 0:80ee8f3b695e 67 /* Exported constants --------------------------------------------------------*/
EricLew 0:80ee8f3b695e 68 /** @defgroup SWPMI_LL_Exported_Constants SWPMI Exported Constants
EricLew 0:80ee8f3b695e 69 * @{
EricLew 0:80ee8f3b695e 70 */
EricLew 0:80ee8f3b695e 71
EricLew 0:80ee8f3b695e 72 /** @defgroup SWPMI_LL_EC_CLEAR_FLAG Clear Flags Defines
EricLew 0:80ee8f3b695e 73 * @brief Flags defines which can be used with LL_SWPMI_WriteReg function
EricLew 0:80ee8f3b695e 74 * @{
EricLew 0:80ee8f3b695e 75 */
EricLew 0:80ee8f3b695e 76 #define LL_SWPMI_ICR_CRXBFF SWPMI_ICR_CRXBFF
EricLew 0:80ee8f3b695e 77 #define LL_SWPMI_ICR_CTXBEF SWPMI_ICR_CTXBEF
EricLew 0:80ee8f3b695e 78 #define LL_SWPMI_ICR_CRXBERF SWPMI_ICR_CRXBERF
EricLew 0:80ee8f3b695e 79 #define LL_SWPMI_ICR_CRXOVRF SWPMI_ICR_CRXOVRF
EricLew 0:80ee8f3b695e 80 #define LL_SWPMI_ICR_CTXUNRF SWPMI_ICR_CTXUNRF
EricLew 0:80ee8f3b695e 81 #define LL_SWPMI_ICR_CTCF SWPMI_ICR_CTCF
EricLew 0:80ee8f3b695e 82 #define LL_SWPMI_ICR_CSRF SWPMI_ICR_CSRF
EricLew 0:80ee8f3b695e 83 /**
EricLew 0:80ee8f3b695e 84 * @}
EricLew 0:80ee8f3b695e 85 */
EricLew 0:80ee8f3b695e 86
EricLew 0:80ee8f3b695e 87 /** @defgroup SWPMI_LL_EC_GET_FLAG Get Flags Defines
EricLew 0:80ee8f3b695e 88 * @brief Flags defines which can be used with LL_SWPMI_ReadReg function
EricLew 0:80ee8f3b695e 89 * @{
EricLew 0:80ee8f3b695e 90 */
EricLew 0:80ee8f3b695e 91 #define LL_SWPMI_ISR_RXBFF SWPMI_ISR_RXBFF
EricLew 0:80ee8f3b695e 92 #define LL_SWPMI_ISR_TXBEF SWPMI_ISR_TXBEF
EricLew 0:80ee8f3b695e 93 #define LL_SWPMI_ISR_RXBERF SWPMI_ISR_RXBERF
EricLew 0:80ee8f3b695e 94 #define LL_SWPMI_ISR_RXOVRF SWPMI_ISR_RXOVRF
EricLew 0:80ee8f3b695e 95 #define LL_SWPMI_ISR_TXUNRF SWPMI_ISR_TXUNRF
EricLew 0:80ee8f3b695e 96 #define LL_SWPMI_ISR_RXNE SWPMI_ISR_RXNE
EricLew 0:80ee8f3b695e 97 #define LL_SWPMI_ISR_TXE SWPMI_ISR_TXE
EricLew 0:80ee8f3b695e 98 #define LL_SWPMI_ISR_TCF SWPMI_ISR_TCF
EricLew 0:80ee8f3b695e 99 #define LL_SWPMI_ISR_SRF SWPMI_ISR_SRF
EricLew 0:80ee8f3b695e 100 #define LL_SWPMI_ISR_SUSP SWPMI_ISR_SUSP
EricLew 0:80ee8f3b695e 101 #define LL_SWPMI_ISR_DEACTF SWPMI_ISR_DEACTF
EricLew 0:80ee8f3b695e 102 /**
EricLew 0:80ee8f3b695e 103 * @}
EricLew 0:80ee8f3b695e 104 */
EricLew 0:80ee8f3b695e 105
EricLew 0:80ee8f3b695e 106 /** @defgroup SWPMI_LL_EC_IT IT Defines
EricLew 0:80ee8f3b695e 107 * @brief IT defines which can be used with LL_SWPMI_ReadReg and LL_SWPMI_WriteReg functions
EricLew 0:80ee8f3b695e 108 * @{
EricLew 0:80ee8f3b695e 109 */
EricLew 0:80ee8f3b695e 110 #define LL_SWPMI_IER_SRIE SWPMI_IER_SRIE
EricLew 0:80ee8f3b695e 111 #define LL_SWPMI_IER_TCIE SWPMI_IER_TCIE
EricLew 0:80ee8f3b695e 112 #define LL_SWPMI_IER_TIE SWPMI_IER_TIE
EricLew 0:80ee8f3b695e 113 #define LL_SWPMI_IER_RIE SWPMI_IER_RIE
EricLew 0:80ee8f3b695e 114 #define LL_SWPMI_IER_TXUNRIE SWPMI_IER_TXUNRIE
EricLew 0:80ee8f3b695e 115 #define LL_SWPMI_IER_RXOVRIE SWPMI_IER_RXOVRIE
EricLew 0:80ee8f3b695e 116 #define LL_SWPMI_IER_RXBERIE SWPMI_IER_RXBERIE
EricLew 0:80ee8f3b695e 117 #define LL_SWPMI_IER_TXBEIE SWPMI_IER_TXBEIE
EricLew 0:80ee8f3b695e 118 #define LL_SWPMI_IER_RXBFIE SWPMI_IER_RXBFIE
EricLew 0:80ee8f3b695e 119 /**
EricLew 0:80ee8f3b695e 120 * @}
EricLew 0:80ee8f3b695e 121 */
EricLew 0:80ee8f3b695e 122
EricLew 0:80ee8f3b695e 123 /** @defgroup SWPMI_LL_EC_SW_BUFFER_RX SW BUFFER RX
EricLew 0:80ee8f3b695e 124 * @{
EricLew 0:80ee8f3b695e 125 */
EricLew 0:80ee8f3b695e 126 #define LL_SWPMI_SW_BUFFER_RX_SINGLE ((uint32_t)0x00000000) /* Single software buffer mode for reception */
EricLew 0:80ee8f3b695e 127 #define LL_SWPMI_SW_BUFFER_RX_MULTI SWPMI_CR_RXMODE /* Multi software buffermode for reception */
EricLew 0:80ee8f3b695e 128 /**
EricLew 0:80ee8f3b695e 129 * @}
EricLew 0:80ee8f3b695e 130 */
EricLew 0:80ee8f3b695e 131
EricLew 0:80ee8f3b695e 132 /** @defgroup SWPMI_LL_EC_SW_BUFFER_TX SW BUFFER TX
EricLew 0:80ee8f3b695e 133 * @{
EricLew 0:80ee8f3b695e 134 */
EricLew 0:80ee8f3b695e 135 #define LL_SWPMI_SW_BUFFER_TX_SINGLE ((uint32_t)0x00000000) /* Single software buffer mode for transmission */
EricLew 0:80ee8f3b695e 136 #define LL_SWPMI_SW_BUFFER_TX_MULTI SWPMI_CR_TXMODE /* Multi software buffermode for transmission */
EricLew 0:80ee8f3b695e 137 /**
EricLew 0:80ee8f3b695e 138 * @}
EricLew 0:80ee8f3b695e 139 */
EricLew 0:80ee8f3b695e 140
EricLew 0:80ee8f3b695e 141 /** @defgroup SWPMI_LL_EC_VOLTAGE_CLASS VOLTAGE CLASS
EricLew 0:80ee8f3b695e 142 * @{
EricLew 0:80ee8f3b695e 143 */
EricLew 0:80ee8f3b695e 144 #define LL_SWPMI_VOLTAGE_CLASS_C ((uint32_t)0x00000000) /* SWPMI_IO uses directly VDD voltage to operate in class C */
EricLew 0:80ee8f3b695e 145 #define LL_SWPMI_VOLTAGE_CLASS_B SWPMI_OR_CLASS /* SWPMI_IO uses an internal voltage regulator to operate in class B */
EricLew 0:80ee8f3b695e 146 /**
EricLew 0:80ee8f3b695e 147 * @}
EricLew 0:80ee8f3b695e 148 */
EricLew 0:80ee8f3b695e 149
EricLew 0:80ee8f3b695e 150 /** @defgroup SWPMI_LL_EC_DMA_REG_DATA DMA register data
EricLew 0:80ee8f3b695e 151 * @{
EricLew 0:80ee8f3b695e 152 */
EricLew 0:80ee8f3b695e 153 #define LL_SWPMI_DMA_REG_DATA_TRANSMIT (uint32_t)0 /*!< Get address of data register used for transmission */
EricLew 0:80ee8f3b695e 154 #define LL_SWPMI_DMA_REG_DATA_RECEIVE (uint32_t)1 /*!< Get address of data register used for reception */
EricLew 0:80ee8f3b695e 155 /**
EricLew 0:80ee8f3b695e 156 * @}
EricLew 0:80ee8f3b695e 157 */
EricLew 0:80ee8f3b695e 158
EricLew 0:80ee8f3b695e 159 /**
EricLew 0:80ee8f3b695e 160 * @}
EricLew 0:80ee8f3b695e 161 */
EricLew 0:80ee8f3b695e 162
EricLew 0:80ee8f3b695e 163 /* Exported macro ------------------------------------------------------------*/
EricLew 0:80ee8f3b695e 164 /** @defgroup SWPMI_LL_Exported_Macros SWPMI Exported Macros
EricLew 0:80ee8f3b695e 165 * @{
EricLew 0:80ee8f3b695e 166 */
EricLew 0:80ee8f3b695e 167
EricLew 0:80ee8f3b695e 168 /** @defgroup SWPMI_LL_EM_WRITE_READ Common Write and read registers Macros
EricLew 0:80ee8f3b695e 169 * @{
EricLew 0:80ee8f3b695e 170 */
EricLew 0:80ee8f3b695e 171
EricLew 0:80ee8f3b695e 172 /**
EricLew 0:80ee8f3b695e 173 * @brief Write a value in SWPMI register
EricLew 0:80ee8f3b695e 174 * @param __INSTANCE__ SWPMI Instance
EricLew 0:80ee8f3b695e 175 * @param __REG__ Register to be written
EricLew 0:80ee8f3b695e 176 * @param __VALUE__ Value to be written in the register
EricLew 0:80ee8f3b695e 177 * @retval None
EricLew 0:80ee8f3b695e 178 */
EricLew 0:80ee8f3b695e 179 #define LL_SWPMI_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
EricLew 0:80ee8f3b695e 180
EricLew 0:80ee8f3b695e 181 /**
EricLew 0:80ee8f3b695e 182 * @brief Read a value in SWPMI register
EricLew 0:80ee8f3b695e 183 * @param __INSTANCE__ SWPMI Instance
EricLew 0:80ee8f3b695e 184 * @param __REG__ Register to be read
EricLew 0:80ee8f3b695e 185 * @retval Register value
EricLew 0:80ee8f3b695e 186 */
EricLew 0:80ee8f3b695e 187 #define LL_SWPMI_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
EricLew 0:80ee8f3b695e 188 /**
EricLew 0:80ee8f3b695e 189 * @}
EricLew 0:80ee8f3b695e 190 */
EricLew 0:80ee8f3b695e 191
EricLew 0:80ee8f3b695e 192 /** @defgroup SWPMI_LL_EM_BitRate Bit rate calculation helper Macros
EricLew 0:80ee8f3b695e 193 * @{
EricLew 0:80ee8f3b695e 194 */
EricLew 0:80ee8f3b695e 195
EricLew 0:80ee8f3b695e 196 /**
EricLew 0:80ee8f3b695e 197 * @brief Helper macro to calculate bit rate value to set in BRR register (LL_SWPMI_SetBitRatePrescaler function)
EricLew 0:80ee8f3b695e 198 * @note ex: __LL_SWPMI_CALC_BITRATE_PRESCALER(2000000, 80000000);
EricLew 0:80ee8f3b695e 199 * @param __FSWP__ Within the following range: from 100 kbit/s up to 2Mbit/s (in bit/s)
EricLew 0:80ee8f3b695e 200 * @param __FSWPCLK__ PCLK or HSI frequency (in hz)
EricLew 0:80ee8f3b695e 201 * @retval Bitrate prescaler (BRR register)
EricLew 0:80ee8f3b695e 202 */
EricLew 0:80ee8f3b695e 203 #define __LL_SWPMI_CALC_BITRATE_PRESCALER(__FSWP__, __FSWPCLK__) ((uint32_t)(((__FSWPCLK__) / ((__FSWP__) * 4)) - 1))
EricLew 0:80ee8f3b695e 204
EricLew 0:80ee8f3b695e 205 /**
EricLew 0:80ee8f3b695e 206 * @}
EricLew 0:80ee8f3b695e 207 */
EricLew 0:80ee8f3b695e 208
EricLew 0:80ee8f3b695e 209 /**
EricLew 0:80ee8f3b695e 210 * @}
EricLew 0:80ee8f3b695e 211 */
EricLew 0:80ee8f3b695e 212
EricLew 0:80ee8f3b695e 213 /* Exported functions --------------------------------------------------------*/
EricLew 0:80ee8f3b695e 214 /** @defgroup SWPMI_LL_Exported_Functions SWPMI Exported Functions
EricLew 0:80ee8f3b695e 215 * @{
EricLew 0:80ee8f3b695e 216 */
EricLew 0:80ee8f3b695e 217
EricLew 0:80ee8f3b695e 218 /** @defgroup SWPMI_LL_EF_Configuration Configuration
EricLew 0:80ee8f3b695e 219 * @{
EricLew 0:80ee8f3b695e 220 */
EricLew 0:80ee8f3b695e 221
EricLew 0:80ee8f3b695e 222 /**
EricLew 0:80ee8f3b695e 223 * @brief Set Reception buffering mode
EricLew 0:80ee8f3b695e 224 * @note If Multi software buffer mode is chosen, RXDMA bits must also be set.
EricLew 0:80ee8f3b695e 225 * @rmtoll CR RXMODE LL_SWPMI_SetReceptionMode
EricLew 0:80ee8f3b695e 226 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 227 * @param Mode This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 228 * @arg @ref LL_SWPMI_SW_BUFFER_RX_SINGLE
EricLew 0:80ee8f3b695e 229 * @arg @ref LL_SWPMI_SW_BUFFER_RX_MULTI
EricLew 0:80ee8f3b695e 230 * @retval None
EricLew 0:80ee8f3b695e 231 */
EricLew 0:80ee8f3b695e 232 __STATIC_INLINE void LL_SWPMI_SetReceptionMode(SWPMI_TypeDef *SWPMIx, uint32_t Mode)
EricLew 0:80ee8f3b695e 233 {
EricLew 0:80ee8f3b695e 234 MODIFY_REG(SWPMIx->CR, SWPMI_CR_RXMODE, Mode);
EricLew 0:80ee8f3b695e 235 }
EricLew 0:80ee8f3b695e 236
EricLew 0:80ee8f3b695e 237 /**
EricLew 0:80ee8f3b695e 238 * @brief Get Reception buffering mode
EricLew 0:80ee8f3b695e 239 * @rmtoll CR RXMODE LL_SWPMI_GetReceptionMode
EricLew 0:80ee8f3b695e 240 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 241 * @retval Returned value can be one of the following values:
EricLew 0:80ee8f3b695e 242 * @arg @ref LL_SWPMI_SW_BUFFER_RX_SINGLE
EricLew 0:80ee8f3b695e 243 * @arg @ref LL_SWPMI_SW_BUFFER_RX_MULTI
EricLew 0:80ee8f3b695e 244 */
EricLew 0:80ee8f3b695e 245 __STATIC_INLINE uint32_t LL_SWPMI_GetReceptionMode(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 246 {
EricLew 0:80ee8f3b695e 247 return (uint32_t)(READ_BIT(SWPMIx->CR, SWPMI_CR_RXMODE));
EricLew 0:80ee8f3b695e 248 }
EricLew 0:80ee8f3b695e 249
EricLew 0:80ee8f3b695e 250 /**
EricLew 0:80ee8f3b695e 251 * @brief Set Transmission buffering mode
EricLew 0:80ee8f3b695e 252 * @note If Multi software buffer mode is chosen, TXDMA bits must also be set.
EricLew 0:80ee8f3b695e 253 * @rmtoll CR TXMODE LL_SWPMI_SetTransmissionMode
EricLew 0:80ee8f3b695e 254 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 255 * @param Mode This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 256 * @arg @ref LL_SWPMI_SW_BUFFER_TX_SINGLE
EricLew 0:80ee8f3b695e 257 * @arg @ref LL_SWPMI_SW_BUFFER_TX_MULTI
EricLew 0:80ee8f3b695e 258 * @retval None
EricLew 0:80ee8f3b695e 259 */
EricLew 0:80ee8f3b695e 260 __STATIC_INLINE void LL_SWPMI_SetTransmissionMode(SWPMI_TypeDef *SWPMIx, uint32_t Mode)
EricLew 0:80ee8f3b695e 261 {
EricLew 0:80ee8f3b695e 262 MODIFY_REG(SWPMIx->CR, SWPMI_CR_TXMODE, Mode);
EricLew 0:80ee8f3b695e 263 }
EricLew 0:80ee8f3b695e 264
EricLew 0:80ee8f3b695e 265 /**
EricLew 0:80ee8f3b695e 266 * @brief Get Transmission buffering mode
EricLew 0:80ee8f3b695e 267 * @rmtoll CR TXMODE LL_SWPMI_GetTransmissionMode
EricLew 0:80ee8f3b695e 268 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 269 * @retval Returned value can be one of the following values:
EricLew 0:80ee8f3b695e 270 * @arg @ref LL_SWPMI_SW_BUFFER_TX_SINGLE
EricLew 0:80ee8f3b695e 271 * @arg @ref LL_SWPMI_SW_BUFFER_TX_MULTI
EricLew 0:80ee8f3b695e 272 */
EricLew 0:80ee8f3b695e 273 __STATIC_INLINE uint32_t LL_SWPMI_GetTransmissionMode(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 274 {
EricLew 0:80ee8f3b695e 275 return (uint32_t)(READ_BIT(SWPMIx->CR, SWPMI_CR_TXMODE));
EricLew 0:80ee8f3b695e 276 }
EricLew 0:80ee8f3b695e 277
EricLew 0:80ee8f3b695e 278 /**
EricLew 0:80ee8f3b695e 279 * @brief Enable Loopback mode
EricLew 0:80ee8f3b695e 280 * @rmtoll CR LPBK LL_SWPMI_EnableLoopback
EricLew 0:80ee8f3b695e 281 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 282 * @retval None
EricLew 0:80ee8f3b695e 283 */
EricLew 0:80ee8f3b695e 284 __STATIC_INLINE void LL_SWPMI_EnableLoopback(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 285 {
EricLew 0:80ee8f3b695e 286 SET_BIT(SWPMIx->CR, SWPMI_CR_LPBK);
EricLew 0:80ee8f3b695e 287 }
EricLew 0:80ee8f3b695e 288
EricLew 0:80ee8f3b695e 289 /**
EricLew 0:80ee8f3b695e 290 * @brief Disable Loopback mode
EricLew 0:80ee8f3b695e 291 * @rmtoll CR LPBK LL_SWPMI_DisableLoopback
EricLew 0:80ee8f3b695e 292 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 293 * @retval None
EricLew 0:80ee8f3b695e 294 */
EricLew 0:80ee8f3b695e 295 __STATIC_INLINE void LL_SWPMI_DisableLoopback(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 296 {
EricLew 0:80ee8f3b695e 297 CLEAR_BIT(SWPMIx->CR, SWPMI_CR_LPBK);
EricLew 0:80ee8f3b695e 298 }
EricLew 0:80ee8f3b695e 299
EricLew 0:80ee8f3b695e 300 /**
EricLew 0:80ee8f3b695e 301 * @brief Activate Single wire protocol bus (SUSPENDED or ACTIVATED state)
EricLew 0:80ee8f3b695e 302 * @note SWP bus stays in the ACTIVATED state as long as there is a communication
EricLew 0:80ee8f3b695e 303 * with the slave, either in transmission or in reception. The SWP bus switches back
EricLew 0:80ee8f3b695e 304 * to the SUSPENDED state as soon as there is no more transmission or reception
EricLew 0:80ee8f3b695e 305 * activity, after 7 idle bits.
EricLew 0:80ee8f3b695e 306 * @rmtoll CR SWPACT LL_SWPMI_Activate
EricLew 0:80ee8f3b695e 307 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 308 * @retval None
EricLew 0:80ee8f3b695e 309 */
EricLew 0:80ee8f3b695e 310 __STATIC_INLINE void LL_SWPMI_Activate(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 311 {
EricLew 0:80ee8f3b695e 312 /* In order to activate SWP again, the software must clear DEACT bit*/
EricLew 0:80ee8f3b695e 313 CLEAR_BIT(SWPMIx->CR, SWPMI_CR_DEACT);
EricLew 0:80ee8f3b695e 314
EricLew 0:80ee8f3b695e 315 /* Set SWACT bit */
EricLew 0:80ee8f3b695e 316 SET_BIT(SWPMIx->CR, SWPMI_CR_SWPACT);
EricLew 0:80ee8f3b695e 317 }
EricLew 0:80ee8f3b695e 318
EricLew 0:80ee8f3b695e 319 /**
EricLew 0:80ee8f3b695e 320 * @brief Deactivate immediately Single wire protocol bus (immediate transition to
EricLew 0:80ee8f3b695e 321 * DEACTIVATED state)
EricLew 0:80ee8f3b695e 322 * @rmtoll CR SWPACT LL_SWPMI_Deactivate
EricLew 0:80ee8f3b695e 323 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 324 * @retval None
EricLew 0:80ee8f3b695e 325 */
EricLew 0:80ee8f3b695e 326 __STATIC_INLINE void LL_SWPMI_Deactivate(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 327 {
EricLew 0:80ee8f3b695e 328 CLEAR_BIT(SWPMIx->CR, SWPMI_CR_SWPACT);
EricLew 0:80ee8f3b695e 329 }
EricLew 0:80ee8f3b695e 330
EricLew 0:80ee8f3b695e 331 /**
EricLew 0:80ee8f3b695e 332 * @brief Request a deactivation of Single wire protocol bus (request to go in DEACTIVATED
EricLew 0:80ee8f3b695e 333 * state if no resume from slave)
EricLew 0:80ee8f3b695e 334 * @rmtoll CR DEACT LL_SWPMI_RequestDeactivation
EricLew 0:80ee8f3b695e 335 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 336 * @retval None
EricLew 0:80ee8f3b695e 337 */
EricLew 0:80ee8f3b695e 338 __STATIC_INLINE void LL_SWPMI_RequestDeactivation(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 339 {
EricLew 0:80ee8f3b695e 340 SET_BIT(SWPMIx->CR, SWPMI_CR_DEACT);
EricLew 0:80ee8f3b695e 341 }
EricLew 0:80ee8f3b695e 342
EricLew 0:80ee8f3b695e 343 /**
EricLew 0:80ee8f3b695e 344 * @brief Set Bitrate prescaler SWPMI_freq = SWPMI_clk / (((BitRate) + 1) * 4)
EricLew 0:80ee8f3b695e 345 * @rmtoll BRR BR LL_SWPMI_SetBitRatePrescaler
EricLew 0:80ee8f3b695e 346 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 347 * @param Prescaler A number between 0 and 63
EricLew 0:80ee8f3b695e 348 * @retval None
EricLew 0:80ee8f3b695e 349 */
EricLew 0:80ee8f3b695e 350 __STATIC_INLINE void LL_SWPMI_SetBitRatePrescaler(SWPMI_TypeDef *SWPMIx, uint32_t Prescaler)
EricLew 0:80ee8f3b695e 351 {
EricLew 0:80ee8f3b695e 352 WRITE_REG(SWPMIx->BRR, Prescaler);
EricLew 0:80ee8f3b695e 353 }
EricLew 0:80ee8f3b695e 354
EricLew 0:80ee8f3b695e 355 /**
EricLew 0:80ee8f3b695e 356 * @brief Get Bitrate prescaler
EricLew 0:80ee8f3b695e 357 * @rmtoll BRR BR LL_SWPMI_GetBitRatePrescaler
EricLew 0:80ee8f3b695e 358 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 359 * @retval A number between 0 and 63
EricLew 0:80ee8f3b695e 360 */
EricLew 0:80ee8f3b695e 361 __STATIC_INLINE uint32_t LL_SWPMI_GetBitRatePrescaler(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 362 {
EricLew 0:80ee8f3b695e 363 return (uint32_t)(READ_BIT(SWPMIx->BRR, SWPMI_BRR_BR));
EricLew 0:80ee8f3b695e 364 }
EricLew 0:80ee8f3b695e 365
EricLew 0:80ee8f3b695e 366 /**
EricLew 0:80ee8f3b695e 367 * @brief Set SWP Voltage Class
EricLew 0:80ee8f3b695e 368 * @rmtoll OR CLASS LL_SWPMI_SetVoltageClass
EricLew 0:80ee8f3b695e 369 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 370 * @param Class This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 371 * @arg @ref LL_SWPMI_VOLTAGE_CLASS_C
EricLew 0:80ee8f3b695e 372 * @arg @ref LL_SWPMI_VOLTAGE_CLASS_B
EricLew 0:80ee8f3b695e 373 * @retval None
EricLew 0:80ee8f3b695e 374 */
EricLew 0:80ee8f3b695e 375 __STATIC_INLINE void LL_SWPMI_SetVoltageClass(SWPMI_TypeDef *SWPMIx, uint32_t Class)
EricLew 0:80ee8f3b695e 376 {
EricLew 0:80ee8f3b695e 377 MODIFY_REG(SWPMIx->OR, SWPMI_OR_CLASS, Class);
EricLew 0:80ee8f3b695e 378 }
EricLew 0:80ee8f3b695e 379
EricLew 0:80ee8f3b695e 380 /**
EricLew 0:80ee8f3b695e 381 * @brief Get SWP Voltage Class
EricLew 0:80ee8f3b695e 382 * @rmtoll OR CLASS LL_SWPMI_GetVoltageClass
EricLew 0:80ee8f3b695e 383 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 384 * @retval Returned value can be one of the following values:
EricLew 0:80ee8f3b695e 385 * @arg @ref LL_SWPMI_VOLTAGE_CLASS_C
EricLew 0:80ee8f3b695e 386 * @arg @ref LL_SWPMI_VOLTAGE_CLASS_B
EricLew 0:80ee8f3b695e 387 */
EricLew 0:80ee8f3b695e 388 __STATIC_INLINE uint32_t LL_SWPMI_GetVoltageClass(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 389 {
EricLew 0:80ee8f3b695e 390 return (uint32_t)(READ_BIT(SWPMIx->OR, SWPMI_OR_CLASS));
EricLew 0:80ee8f3b695e 391 }
EricLew 0:80ee8f3b695e 392
EricLew 0:80ee8f3b695e 393 /**
EricLew 0:80ee8f3b695e 394 * @}
EricLew 0:80ee8f3b695e 395 */
EricLew 0:80ee8f3b695e 396
EricLew 0:80ee8f3b695e 397 /** @defgroup SWPMI_LL_EF_FLAG_Management FLAG_Management
EricLew 0:80ee8f3b695e 398 * @{
EricLew 0:80ee8f3b695e 399 */
EricLew 0:80ee8f3b695e 400
EricLew 0:80ee8f3b695e 401 /**
EricLew 0:80ee8f3b695e 402 * @brief Check if the last word of the frame underreception has arrived in SWPMI_RDR.
EricLew 0:80ee8f3b695e 403 * @rmtoll ISR RXBFF LL_SWPMI_IsActiveFlag_RXBF
EricLew 0:80ee8f3b695e 404 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 405 * @retval State of bit (1 or 0).
EricLew 0:80ee8f3b695e 406 */
EricLew 0:80ee8f3b695e 407 __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_RXBF(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 408 {
EricLew 0:80ee8f3b695e 409 return (READ_BIT(SWPMIx->ISR, SWPMI_ISR_RXBFF) == (SWPMI_ISR_RXBFF));
EricLew 0:80ee8f3b695e 410 }
EricLew 0:80ee8f3b695e 411
EricLew 0:80ee8f3b695e 412 /**
EricLew 0:80ee8f3b695e 413 * @brief Check if Frame transmission buffer has been emptied
EricLew 0:80ee8f3b695e 414 * @rmtoll ISR TXBEF LL_SWPMI_IsActiveFlag_TXBE
EricLew 0:80ee8f3b695e 415 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 416 * @retval State of bit (1 or 0).
EricLew 0:80ee8f3b695e 417 */
EricLew 0:80ee8f3b695e 418 __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_TXBE(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 419 {
EricLew 0:80ee8f3b695e 420 return (READ_BIT(SWPMIx->ISR, SWPMI_ISR_TXBEF) == (SWPMI_ISR_TXBEF));
EricLew 0:80ee8f3b695e 421 }
EricLew 0:80ee8f3b695e 422
EricLew 0:80ee8f3b695e 423 /**
EricLew 0:80ee8f3b695e 424 * @brief Check if CRC error in reception has been detected
EricLew 0:80ee8f3b695e 425 * @rmtoll ISR RXBERF LL_SWPMI_IsActiveFlag_RXBER
EricLew 0:80ee8f3b695e 426 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 427 * @retval State of bit (1 or 0).
EricLew 0:80ee8f3b695e 428 */
EricLew 0:80ee8f3b695e 429 __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_RXBER(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 430 {
EricLew 0:80ee8f3b695e 431 return (READ_BIT(SWPMIx->ISR, SWPMI_ISR_RXBERF) == (SWPMI_ISR_RXBERF));
EricLew 0:80ee8f3b695e 432 }
EricLew 0:80ee8f3b695e 433
EricLew 0:80ee8f3b695e 434 /**
EricLew 0:80ee8f3b695e 435 * @brief Check if Overrun in reception has been detected
EricLew 0:80ee8f3b695e 436 * @rmtoll ISR RXOVRF LL_SWPMI_IsActiveFlag_RXOVR
EricLew 0:80ee8f3b695e 437 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 438 * @retval State of bit (1 or 0).
EricLew 0:80ee8f3b695e 439 */
EricLew 0:80ee8f3b695e 440 __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_RXOVR(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 441 {
EricLew 0:80ee8f3b695e 442 return (READ_BIT(SWPMIx->ISR, SWPMI_ISR_RXOVRF) == (SWPMI_ISR_RXOVRF));
EricLew 0:80ee8f3b695e 443 }
EricLew 0:80ee8f3b695e 444
EricLew 0:80ee8f3b695e 445 /**
EricLew 0:80ee8f3b695e 446 * @brief Check if Underrun error in transmission has been detected
EricLew 0:80ee8f3b695e 447 * @rmtoll ISR TXUNRF LL_SWPMI_IsActiveFlag_TXUNR
EricLew 0:80ee8f3b695e 448 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 449 * @retval State of bit (1 or 0).
EricLew 0:80ee8f3b695e 450 */
EricLew 0:80ee8f3b695e 451 __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_TXUNR(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 452 {
EricLew 0:80ee8f3b695e 453 return (READ_BIT(SWPMIx->ISR, SWPMI_ISR_TXUNRF) == (SWPMI_ISR_TXUNRF));
EricLew 0:80ee8f3b695e 454 }
EricLew 0:80ee8f3b695e 455
EricLew 0:80ee8f3b695e 456 /**
EricLew 0:80ee8f3b695e 457 * @brief Check if Receive data register not empty (it means that Received data is ready
EricLew 0:80ee8f3b695e 458 * to be read in the SWPMI_RDR register)
EricLew 0:80ee8f3b695e 459 * @rmtoll ISR RXNE LL_SWPMI_IsActiveFlag_RXNE
EricLew 0:80ee8f3b695e 460 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 461 * @retval State of bit (1 or 0).
EricLew 0:80ee8f3b695e 462 */
EricLew 0:80ee8f3b695e 463 __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_RXNE(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 464 {
EricLew 0:80ee8f3b695e 465 return (READ_BIT(SWPMIx->ISR, SWPMI_ISR_RXNE) == (SWPMI_ISR_RXNE));
EricLew 0:80ee8f3b695e 466 }
EricLew 0:80ee8f3b695e 467
EricLew 0:80ee8f3b695e 468 /**
EricLew 0:80ee8f3b695e 469 * @brief Check if Transmit data register is empty (it means that Data written in transmit
EricLew 0:80ee8f3b695e 470 * data register SWPMI_TDR has been transmitted and SWPMI_TDR can be written to again)
EricLew 0:80ee8f3b695e 471 * @rmtoll ISR TXE LL_SWPMI_IsActiveFlag_TXE
EricLew 0:80ee8f3b695e 472 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 473 * @retval State of bit (1 or 0).
EricLew 0:80ee8f3b695e 474 */
EricLew 0:80ee8f3b695e 475 __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_TXE(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 476 {
EricLew 0:80ee8f3b695e 477 return (READ_BIT(SWPMIx->ISR, SWPMI_ISR_TXE) == (SWPMI_ISR_TXE));
EricLew 0:80ee8f3b695e 478 }
EricLew 0:80ee8f3b695e 479
EricLew 0:80ee8f3b695e 480 /**
EricLew 0:80ee8f3b695e 481 * @brief Check if Both transmission and reception are completed and SWP is switched to
EricLew 0:80ee8f3b695e 482 * the SUSPENDED state
EricLew 0:80ee8f3b695e 483 * @rmtoll ISR TCF LL_SWPMI_IsActiveFlag_TC
EricLew 0:80ee8f3b695e 484 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 485 * @retval State of bit (1 or 0).
EricLew 0:80ee8f3b695e 486 */
EricLew 0:80ee8f3b695e 487 __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_TC(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 488 {
EricLew 0:80ee8f3b695e 489 return (READ_BIT(SWPMIx->ISR, SWPMI_ISR_TCF) == (SWPMI_ISR_TCF));
EricLew 0:80ee8f3b695e 490 }
EricLew 0:80ee8f3b695e 491
EricLew 0:80ee8f3b695e 492 /**
EricLew 0:80ee8f3b695e 493 * @brief Check if a Resume by slave state has been detected during the SWP bus SUSPENDED
EricLew 0:80ee8f3b695e 494 * state
EricLew 0:80ee8f3b695e 495 * @rmtoll ISR SRF LL_SWPMI_IsActiveFlag_SR
EricLew 0:80ee8f3b695e 496 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 497 * @retval State of bit (1 or 0).
EricLew 0:80ee8f3b695e 498 */
EricLew 0:80ee8f3b695e 499 __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_SR(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 500 {
EricLew 0:80ee8f3b695e 501 return (READ_BIT(SWPMIx->ISR, SWPMI_ISR_SRF) == (SWPMI_ISR_SRF));
EricLew 0:80ee8f3b695e 502 }
EricLew 0:80ee8f3b695e 503
EricLew 0:80ee8f3b695e 504 /**
EricLew 0:80ee8f3b695e 505 * @brief Check if SWP bus is in SUSPENDED or DEACTIVATED state
EricLew 0:80ee8f3b695e 506 * @rmtoll ISR SUSP LL_SWPMI_IsActiveFlag_SUSP
EricLew 0:80ee8f3b695e 507 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 508 * @retval State of bit (1 or 0).
EricLew 0:80ee8f3b695e 509 */
EricLew 0:80ee8f3b695e 510 __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_SUSP(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 511 {
EricLew 0:80ee8f3b695e 512 return (READ_BIT(SWPMIx->ISR, SWPMI_ISR_SUSP) == (SWPMI_ISR_SUSP));
EricLew 0:80ee8f3b695e 513 }
EricLew 0:80ee8f3b695e 514
EricLew 0:80ee8f3b695e 515 /**
EricLew 0:80ee8f3b695e 516 * @brief Check if SWP bus is in DEACTIVATED state
EricLew 0:80ee8f3b695e 517 * @rmtoll ISR DEACTF LL_SWPMI_IsActiveFlag_DEACT
EricLew 0:80ee8f3b695e 518 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 519 * @retval State of bit (1 or 0).
EricLew 0:80ee8f3b695e 520 */
EricLew 0:80ee8f3b695e 521 __STATIC_INLINE uint32_t LL_SWPMI_IsActiveFlag_DEACT(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 522 {
EricLew 0:80ee8f3b695e 523 return (READ_BIT(SWPMIx->ISR, SWPMI_ISR_DEACTF) == (SWPMI_ISR_DEACTF));
EricLew 0:80ee8f3b695e 524 }
EricLew 0:80ee8f3b695e 525
EricLew 0:80ee8f3b695e 526 /**
EricLew 0:80ee8f3b695e 527 * @brief Clear receive buffer full flag
EricLew 0:80ee8f3b695e 528 * @rmtoll ICR CRXBFF LL_SWPMI_ClearFlag_RXBF
EricLew 0:80ee8f3b695e 529 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 530 * @retval None
EricLew 0:80ee8f3b695e 531 */
EricLew 0:80ee8f3b695e 532 __STATIC_INLINE void LL_SWPMI_ClearFlag_RXBF(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 533 {
EricLew 0:80ee8f3b695e 534 WRITE_REG(SWPMIx->ICR, SWPMI_ICR_CRXBFF);
EricLew 0:80ee8f3b695e 535 }
EricLew 0:80ee8f3b695e 536
EricLew 0:80ee8f3b695e 537 /**
EricLew 0:80ee8f3b695e 538 * @brief Clear transmit buffer empty flag
EricLew 0:80ee8f3b695e 539 * @rmtoll ICR CTXBEF LL_SWPMI_ClearFlag_TXBE
EricLew 0:80ee8f3b695e 540 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 541 * @retval None
EricLew 0:80ee8f3b695e 542 */
EricLew 0:80ee8f3b695e 543 __STATIC_INLINE void LL_SWPMI_ClearFlag_TXBE(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 544 {
EricLew 0:80ee8f3b695e 545 WRITE_REG(SWPMIx->ICR, SWPMI_ICR_CTXBEF);
EricLew 0:80ee8f3b695e 546 }
EricLew 0:80ee8f3b695e 547
EricLew 0:80ee8f3b695e 548 /**
EricLew 0:80ee8f3b695e 549 * @brief Clear receive CRC error flag
EricLew 0:80ee8f3b695e 550 * @rmtoll ICR CRXBERF LL_SWPMI_ClearFlag_RXBER
EricLew 0:80ee8f3b695e 551 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 552 * @retval None
EricLew 0:80ee8f3b695e 553 */
EricLew 0:80ee8f3b695e 554 __STATIC_INLINE void LL_SWPMI_ClearFlag_RXBER(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 555 {
EricLew 0:80ee8f3b695e 556 WRITE_REG(SWPMIx->ICR, SWPMI_ICR_CRXBERF);
EricLew 0:80ee8f3b695e 557 }
EricLew 0:80ee8f3b695e 558
EricLew 0:80ee8f3b695e 559 /**
EricLew 0:80ee8f3b695e 560 * @brief Clear receive overrun error flag
EricLew 0:80ee8f3b695e 561 * @rmtoll ICR CRXOVRF LL_SWPMI_ClearFlag_RXOVR
EricLew 0:80ee8f3b695e 562 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 563 * @retval None
EricLew 0:80ee8f3b695e 564 */
EricLew 0:80ee8f3b695e 565 __STATIC_INLINE void LL_SWPMI_ClearFlag_RXOVR(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 566 {
EricLew 0:80ee8f3b695e 567 WRITE_REG(SWPMIx->ICR, SWPMI_ICR_CRXOVRF);
EricLew 0:80ee8f3b695e 568 }
EricLew 0:80ee8f3b695e 569
EricLew 0:80ee8f3b695e 570 /**
EricLew 0:80ee8f3b695e 571 * @brief Clear transmit underrun error flag
EricLew 0:80ee8f3b695e 572 * @rmtoll ICR CTXUNRF LL_SWPMI_ClearFlag_TXUNR
EricLew 0:80ee8f3b695e 573 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 574 * @retval None
EricLew 0:80ee8f3b695e 575 */
EricLew 0:80ee8f3b695e 576 __STATIC_INLINE void LL_SWPMI_ClearFlag_TXUNR(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 577 {
EricLew 0:80ee8f3b695e 578 WRITE_REG(SWPMIx->ICR, SWPMI_ICR_CTXUNRF);
EricLew 0:80ee8f3b695e 579 }
EricLew 0:80ee8f3b695e 580
EricLew 0:80ee8f3b695e 581 /**
EricLew 0:80ee8f3b695e 582 * @brief Clear transfer complete flag
EricLew 0:80ee8f3b695e 583 * @rmtoll ICR CTCF LL_SWPMI_ClearFlag_TC
EricLew 0:80ee8f3b695e 584 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 585 * @retval None
EricLew 0:80ee8f3b695e 586 */
EricLew 0:80ee8f3b695e 587 __STATIC_INLINE void LL_SWPMI_ClearFlag_TC(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 588 {
EricLew 0:80ee8f3b695e 589 WRITE_REG(SWPMIx->ICR, SWPMI_ICR_CTCF);
EricLew 0:80ee8f3b695e 590 }
EricLew 0:80ee8f3b695e 591
EricLew 0:80ee8f3b695e 592 /**
EricLew 0:80ee8f3b695e 593 * @brief Clear slave resume flag
EricLew 0:80ee8f3b695e 594 * @rmtoll ICR CSRF LL_SWPMI_ClearFlag_SR
EricLew 0:80ee8f3b695e 595 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 596 * @retval None
EricLew 0:80ee8f3b695e 597 */
EricLew 0:80ee8f3b695e 598 __STATIC_INLINE void LL_SWPMI_ClearFlag_SR(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 599 {
EricLew 0:80ee8f3b695e 600 WRITE_REG(SWPMIx->ICR, SWPMI_ICR_CSRF);
EricLew 0:80ee8f3b695e 601 }
EricLew 0:80ee8f3b695e 602
EricLew 0:80ee8f3b695e 603 /**
EricLew 0:80ee8f3b695e 604 * @}
EricLew 0:80ee8f3b695e 605 */
EricLew 0:80ee8f3b695e 606
EricLew 0:80ee8f3b695e 607 /** @defgroup SWPMI_LL_EF_IT_Management IT_Management
EricLew 0:80ee8f3b695e 608 * @{
EricLew 0:80ee8f3b695e 609 */
EricLew 0:80ee8f3b695e 610
EricLew 0:80ee8f3b695e 611 /**
EricLew 0:80ee8f3b695e 612 * @brief Enable Slave resume interrupt
EricLew 0:80ee8f3b695e 613 * @rmtoll IER SRIE LL_SWPMI_EnableIT_SR
EricLew 0:80ee8f3b695e 614 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 615 * @retval None
EricLew 0:80ee8f3b695e 616 */
EricLew 0:80ee8f3b695e 617 __STATIC_INLINE void LL_SWPMI_EnableIT_SR(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 618 {
EricLew 0:80ee8f3b695e 619 SET_BIT(SWPMIx->IER, SWPMI_IER_SRIE);
EricLew 0:80ee8f3b695e 620 }
EricLew 0:80ee8f3b695e 621
EricLew 0:80ee8f3b695e 622 /**
EricLew 0:80ee8f3b695e 623 * @brief Enable Transmit complete interrupt
EricLew 0:80ee8f3b695e 624 * @rmtoll IER TCIE LL_SWPMI_EnableIT_TC
EricLew 0:80ee8f3b695e 625 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 626 * @retval None
EricLew 0:80ee8f3b695e 627 */
EricLew 0:80ee8f3b695e 628 __STATIC_INLINE void LL_SWPMI_EnableIT_TC(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 629 {
EricLew 0:80ee8f3b695e 630 SET_BIT(SWPMIx->IER, SWPMI_IER_TCIE);
EricLew 0:80ee8f3b695e 631 }
EricLew 0:80ee8f3b695e 632
EricLew 0:80ee8f3b695e 633 /**
EricLew 0:80ee8f3b695e 634 * @brief Enable Transmit interrupt
EricLew 0:80ee8f3b695e 635 * @rmtoll IER TIE LL_SWPMI_EnableIT_TX
EricLew 0:80ee8f3b695e 636 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 637 * @retval None
EricLew 0:80ee8f3b695e 638 */
EricLew 0:80ee8f3b695e 639 __STATIC_INLINE void LL_SWPMI_EnableIT_TX(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 640 {
EricLew 0:80ee8f3b695e 641 SET_BIT(SWPMIx->IER, SWPMI_IER_TIE);
EricLew 0:80ee8f3b695e 642 }
EricLew 0:80ee8f3b695e 643
EricLew 0:80ee8f3b695e 644 /**
EricLew 0:80ee8f3b695e 645 * @brief Enable Receive interrupt
EricLew 0:80ee8f3b695e 646 * @rmtoll IER RIE LL_SWPMI_EnableIT_RX
EricLew 0:80ee8f3b695e 647 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 648 * @retval None
EricLew 0:80ee8f3b695e 649 */
EricLew 0:80ee8f3b695e 650 __STATIC_INLINE void LL_SWPMI_EnableIT_RX(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 651 {
EricLew 0:80ee8f3b695e 652 SET_BIT(SWPMIx->IER, SWPMI_IER_RIE);
EricLew 0:80ee8f3b695e 653 }
EricLew 0:80ee8f3b695e 654
EricLew 0:80ee8f3b695e 655 /**
EricLew 0:80ee8f3b695e 656 * @brief Enable Transmit underrun error interrupt
EricLew 0:80ee8f3b695e 657 * @rmtoll IER TXUNRIE LL_SWPMI_EnableIT_TXUNR
EricLew 0:80ee8f3b695e 658 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 659 * @retval None
EricLew 0:80ee8f3b695e 660 */
EricLew 0:80ee8f3b695e 661 __STATIC_INLINE void LL_SWPMI_EnableIT_TXUNR(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 662 {
EricLew 0:80ee8f3b695e 663 SET_BIT(SWPMIx->IER, SWPMI_IER_TXUNRIE);
EricLew 0:80ee8f3b695e 664 }
EricLew 0:80ee8f3b695e 665
EricLew 0:80ee8f3b695e 666 /**
EricLew 0:80ee8f3b695e 667 * @brief Enable Receive overrun error interrupt
EricLew 0:80ee8f3b695e 668 * @rmtoll IER RXOVRIE LL_SWPMI_EnableIT_RXOVR
EricLew 0:80ee8f3b695e 669 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 670 * @retval None
EricLew 0:80ee8f3b695e 671 */
EricLew 0:80ee8f3b695e 672 __STATIC_INLINE void LL_SWPMI_EnableIT_RXOVR(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 673 {
EricLew 0:80ee8f3b695e 674 SET_BIT(SWPMIx->IER, SWPMI_IER_RXOVRIE);
EricLew 0:80ee8f3b695e 675 }
EricLew 0:80ee8f3b695e 676
EricLew 0:80ee8f3b695e 677 /**
EricLew 0:80ee8f3b695e 678 * @brief Enable Receive CRC error interrupt
EricLew 0:80ee8f3b695e 679 * @rmtoll IER RXBERIE LL_SWPMI_EnableIT_RXBER
EricLew 0:80ee8f3b695e 680 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 681 * @retval None
EricLew 0:80ee8f3b695e 682 */
EricLew 0:80ee8f3b695e 683 __STATIC_INLINE void LL_SWPMI_EnableIT_RXBER(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 684 {
EricLew 0:80ee8f3b695e 685 SET_BIT(SWPMIx->IER, SWPMI_IER_RXBERIE);
EricLew 0:80ee8f3b695e 686 }
EricLew 0:80ee8f3b695e 687
EricLew 0:80ee8f3b695e 688 /**
EricLew 0:80ee8f3b695e 689 * @brief Enable Transmit buffer empty interrupt
EricLew 0:80ee8f3b695e 690 * @rmtoll IER TXBEIE LL_SWPMI_EnableIT_TXBE
EricLew 0:80ee8f3b695e 691 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 692 * @retval None
EricLew 0:80ee8f3b695e 693 */
EricLew 0:80ee8f3b695e 694 __STATIC_INLINE void LL_SWPMI_EnableIT_TXBE(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 695 {
EricLew 0:80ee8f3b695e 696 SET_BIT(SWPMIx->IER, SWPMI_IER_TXBEIE);
EricLew 0:80ee8f3b695e 697 }
EricLew 0:80ee8f3b695e 698
EricLew 0:80ee8f3b695e 699 /**
EricLew 0:80ee8f3b695e 700 * @brief Enable Receive buffer full interrupt
EricLew 0:80ee8f3b695e 701 * @rmtoll IER RXBFIE LL_SWPMI_EnableIT_RXBF
EricLew 0:80ee8f3b695e 702 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 703 * @retval None
EricLew 0:80ee8f3b695e 704 */
EricLew 0:80ee8f3b695e 705 __STATIC_INLINE void LL_SWPMI_EnableIT_RXBF(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 706 {
EricLew 0:80ee8f3b695e 707 SET_BIT(SWPMIx->IER, SWPMI_IER_RXBFIE);
EricLew 0:80ee8f3b695e 708 }
EricLew 0:80ee8f3b695e 709
EricLew 0:80ee8f3b695e 710 /**
EricLew 0:80ee8f3b695e 711 * @brief Disable Slave resume interrupt
EricLew 0:80ee8f3b695e 712 * @rmtoll IER SRIE LL_SWPMI_DisableIT_SR
EricLew 0:80ee8f3b695e 713 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 714 * @retval None
EricLew 0:80ee8f3b695e 715 */
EricLew 0:80ee8f3b695e 716 __STATIC_INLINE void LL_SWPMI_DisableIT_SR(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 717 {
EricLew 0:80ee8f3b695e 718 CLEAR_BIT(SWPMIx->IER, SWPMI_IER_SRIE);
EricLew 0:80ee8f3b695e 719 }
EricLew 0:80ee8f3b695e 720
EricLew 0:80ee8f3b695e 721 /**
EricLew 0:80ee8f3b695e 722 * @brief Disable Transmit complete interrupt
EricLew 0:80ee8f3b695e 723 * @rmtoll IER TCIE LL_SWPMI_DisableIT_TC
EricLew 0:80ee8f3b695e 724 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 725 * @retval None
EricLew 0:80ee8f3b695e 726 */
EricLew 0:80ee8f3b695e 727 __STATIC_INLINE void LL_SWPMI_DisableIT_TC(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 728 {
EricLew 0:80ee8f3b695e 729 CLEAR_BIT(SWPMIx->IER, SWPMI_IER_TCIE);
EricLew 0:80ee8f3b695e 730 }
EricLew 0:80ee8f3b695e 731
EricLew 0:80ee8f3b695e 732 /**
EricLew 0:80ee8f3b695e 733 * @brief Disable Transmit interrupt
EricLew 0:80ee8f3b695e 734 * @rmtoll IER TIE LL_SWPMI_DisableIT_TX
EricLew 0:80ee8f3b695e 735 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 736 * @retval None
EricLew 0:80ee8f3b695e 737 */
EricLew 0:80ee8f3b695e 738 __STATIC_INLINE void LL_SWPMI_DisableIT_TX(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 739 {
EricLew 0:80ee8f3b695e 740 CLEAR_BIT(SWPMIx->IER, SWPMI_IER_TIE);
EricLew 0:80ee8f3b695e 741 }
EricLew 0:80ee8f3b695e 742
EricLew 0:80ee8f3b695e 743 /**
EricLew 0:80ee8f3b695e 744 * @brief Disable Receive interrupt
EricLew 0:80ee8f3b695e 745 * @rmtoll IER RIE LL_SWPMI_DisableIT_RX
EricLew 0:80ee8f3b695e 746 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 747 * @retval None
EricLew 0:80ee8f3b695e 748 */
EricLew 0:80ee8f3b695e 749 __STATIC_INLINE void LL_SWPMI_DisableIT_RX(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 750 {
EricLew 0:80ee8f3b695e 751 CLEAR_BIT(SWPMIx->IER, SWPMI_IER_RIE);
EricLew 0:80ee8f3b695e 752 }
EricLew 0:80ee8f3b695e 753
EricLew 0:80ee8f3b695e 754 /**
EricLew 0:80ee8f3b695e 755 * @brief Disable Transmit underrun error interrupt
EricLew 0:80ee8f3b695e 756 * @rmtoll IER TXUNRIE LL_SWPMI_DisableIT_TXUNR
EricLew 0:80ee8f3b695e 757 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 758 * @retval None
EricLew 0:80ee8f3b695e 759 */
EricLew 0:80ee8f3b695e 760 __STATIC_INLINE void LL_SWPMI_DisableIT_TXUNR(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 761 {
EricLew 0:80ee8f3b695e 762 CLEAR_BIT(SWPMIx->IER, SWPMI_IER_TXUNRIE);
EricLew 0:80ee8f3b695e 763 }
EricLew 0:80ee8f3b695e 764
EricLew 0:80ee8f3b695e 765 /**
EricLew 0:80ee8f3b695e 766 * @brief Disable Receive overrun error interrupt
EricLew 0:80ee8f3b695e 767 * @rmtoll IER RXOVRIE LL_SWPMI_DisableIT_RXOVR
EricLew 0:80ee8f3b695e 768 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 769 * @retval None
EricLew 0:80ee8f3b695e 770 */
EricLew 0:80ee8f3b695e 771 __STATIC_INLINE void LL_SWPMI_DisableIT_RXOVR(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 772 {
EricLew 0:80ee8f3b695e 773 CLEAR_BIT(SWPMIx->IER, SWPMI_IER_RXOVRIE);
EricLew 0:80ee8f3b695e 774 }
EricLew 0:80ee8f3b695e 775
EricLew 0:80ee8f3b695e 776 /**
EricLew 0:80ee8f3b695e 777 * @brief Disable Receive CRC error interrupt
EricLew 0:80ee8f3b695e 778 * @rmtoll IER RXBERIE LL_SWPMI_DisableIT_RXBER
EricLew 0:80ee8f3b695e 779 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 780 * @retval None
EricLew 0:80ee8f3b695e 781 */
EricLew 0:80ee8f3b695e 782 __STATIC_INLINE void LL_SWPMI_DisableIT_RXBER(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 783 {
EricLew 0:80ee8f3b695e 784 CLEAR_BIT(SWPMIx->IER, SWPMI_IER_RXBERIE);
EricLew 0:80ee8f3b695e 785 }
EricLew 0:80ee8f3b695e 786
EricLew 0:80ee8f3b695e 787 /**
EricLew 0:80ee8f3b695e 788 * @brief Disable Transmit buffer empty interrupt
EricLew 0:80ee8f3b695e 789 * @rmtoll IER TXBEIE LL_SWPMI_DisableIT_TXBE
EricLew 0:80ee8f3b695e 790 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 791 * @retval None
EricLew 0:80ee8f3b695e 792 */
EricLew 0:80ee8f3b695e 793 __STATIC_INLINE void LL_SWPMI_DisableIT_TXBE(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 794 {
EricLew 0:80ee8f3b695e 795 CLEAR_BIT(SWPMIx->IER, SWPMI_IER_TXBEIE);
EricLew 0:80ee8f3b695e 796 }
EricLew 0:80ee8f3b695e 797
EricLew 0:80ee8f3b695e 798 /**
EricLew 0:80ee8f3b695e 799 * @brief Disable Receive buffer full interrupt
EricLew 0:80ee8f3b695e 800 * @rmtoll IER RXBFIE LL_SWPMI_DisableIT_RXBF
EricLew 0:80ee8f3b695e 801 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 802 * @retval None
EricLew 0:80ee8f3b695e 803 */
EricLew 0:80ee8f3b695e 804 __STATIC_INLINE void LL_SWPMI_DisableIT_RXBF(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 805 {
EricLew 0:80ee8f3b695e 806 CLEAR_BIT(SWPMIx->IER, SWPMI_IER_RXBFIE);
EricLew 0:80ee8f3b695e 807 }
EricLew 0:80ee8f3b695e 808
EricLew 0:80ee8f3b695e 809 /**
EricLew 0:80ee8f3b695e 810 * @brief Check if Slave resume interrupt is enabled
EricLew 0:80ee8f3b695e 811 * @rmtoll IER SRIE LL_SWPMI_IsEnabledIT_SR
EricLew 0:80ee8f3b695e 812 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 813 * @retval State of bit (1 or 0).
EricLew 0:80ee8f3b695e 814 */
EricLew 0:80ee8f3b695e 815 __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_SR(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 816 {
EricLew 0:80ee8f3b695e 817 return (READ_BIT(SWPMIx->IER, SWPMI_IER_SRIE) == (SWPMI_IER_SRIE));
EricLew 0:80ee8f3b695e 818 }
EricLew 0:80ee8f3b695e 819
EricLew 0:80ee8f3b695e 820 /**
EricLew 0:80ee8f3b695e 821 * @brief Check if Transmit complete interrupt is enabled
EricLew 0:80ee8f3b695e 822 * @rmtoll IER TCIE LL_SWPMI_IsEnabledIT_TC
EricLew 0:80ee8f3b695e 823 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 824 * @retval State of bit (1 or 0).
EricLew 0:80ee8f3b695e 825 */
EricLew 0:80ee8f3b695e 826 __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_TC(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 827 {
EricLew 0:80ee8f3b695e 828 return (READ_BIT(SWPMIx->IER, SWPMI_IER_TCIE) == (SWPMI_IER_TCIE));
EricLew 0:80ee8f3b695e 829 }
EricLew 0:80ee8f3b695e 830
EricLew 0:80ee8f3b695e 831 /**
EricLew 0:80ee8f3b695e 832 * @brief Check if Transmit interrupt is enabled
EricLew 0:80ee8f3b695e 833 * @rmtoll IER TIE LL_SWPMI_IsEnabledIT_TX
EricLew 0:80ee8f3b695e 834 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 835 * @retval State of bit (1 or 0).
EricLew 0:80ee8f3b695e 836 */
EricLew 0:80ee8f3b695e 837 __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_TX(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 838 {
EricLew 0:80ee8f3b695e 839 return (READ_BIT(SWPMIx->IER, SWPMI_IER_TIE) == (SWPMI_IER_TIE));
EricLew 0:80ee8f3b695e 840 }
EricLew 0:80ee8f3b695e 841
EricLew 0:80ee8f3b695e 842 /**
EricLew 0:80ee8f3b695e 843 * @brief Check if Receive interrupt is enabled
EricLew 0:80ee8f3b695e 844 * @rmtoll IER RIE LL_SWPMI_IsEnabledIT_RX
EricLew 0:80ee8f3b695e 845 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 846 * @retval State of bit (1 or 0).
EricLew 0:80ee8f3b695e 847 */
EricLew 0:80ee8f3b695e 848 __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_RX(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 849 {
EricLew 0:80ee8f3b695e 850 return (READ_BIT(SWPMIx->IER, SWPMI_IER_RIE) == (SWPMI_IER_RIE));
EricLew 0:80ee8f3b695e 851 }
EricLew 0:80ee8f3b695e 852
EricLew 0:80ee8f3b695e 853 /**
EricLew 0:80ee8f3b695e 854 * @brief Check if Transmit underrun error interrupt is enabled
EricLew 0:80ee8f3b695e 855 * @rmtoll IER TXUNRIE LL_SWPMI_IsEnabledIT_TXUNR
EricLew 0:80ee8f3b695e 856 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 857 * @retval State of bit (1 or 0).
EricLew 0:80ee8f3b695e 858 */
EricLew 0:80ee8f3b695e 859 __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_TXUNR(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 860 {
EricLew 0:80ee8f3b695e 861 return (READ_BIT(SWPMIx->IER, SWPMI_IER_TXUNRIE) == (SWPMI_IER_TXUNRIE));
EricLew 0:80ee8f3b695e 862 }
EricLew 0:80ee8f3b695e 863
EricLew 0:80ee8f3b695e 864 /**
EricLew 0:80ee8f3b695e 865 * @brief Check if Receive overrun error interrupt is enabled
EricLew 0:80ee8f3b695e 866 * @rmtoll IER RXOVRIE LL_SWPMI_IsEnabledIT_RXOVR
EricLew 0:80ee8f3b695e 867 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 868 * @retval State of bit (1 or 0).
EricLew 0:80ee8f3b695e 869 */
EricLew 0:80ee8f3b695e 870 __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_RXOVR(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 871 {
EricLew 0:80ee8f3b695e 872 return (READ_BIT(SWPMIx->IER, SWPMI_IER_RXOVRIE) == (SWPMI_IER_RXOVRIE));
EricLew 0:80ee8f3b695e 873 }
EricLew 0:80ee8f3b695e 874
EricLew 0:80ee8f3b695e 875 /**
EricLew 0:80ee8f3b695e 876 * @brief Check if Receive CRC error interrupt is enabled
EricLew 0:80ee8f3b695e 877 * @rmtoll IER RXBERIE LL_SWPMI_IsEnabledIT_RXBER
EricLew 0:80ee8f3b695e 878 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 879 * @retval State of bit (1 or 0).
EricLew 0:80ee8f3b695e 880 */
EricLew 0:80ee8f3b695e 881 __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_RXBER(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 882 {
EricLew 0:80ee8f3b695e 883 return (READ_BIT(SWPMIx->IER, SWPMI_IER_RXBERIE) == (SWPMI_IER_RXBERIE));
EricLew 0:80ee8f3b695e 884 }
EricLew 0:80ee8f3b695e 885
EricLew 0:80ee8f3b695e 886 /**
EricLew 0:80ee8f3b695e 887 * @brief Check if Transmit buffer empty interrupt is enabled
EricLew 0:80ee8f3b695e 888 * @rmtoll IER TXBEIE LL_SWPMI_IsEnabledIT_TXBE
EricLew 0:80ee8f3b695e 889 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 890 * @retval State of bit (1 or 0).
EricLew 0:80ee8f3b695e 891 */
EricLew 0:80ee8f3b695e 892 __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_TXBE(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 893 {
EricLew 0:80ee8f3b695e 894 return (READ_BIT(SWPMIx->IER, SWPMI_IER_TXBEIE) == (SWPMI_IER_TXBEIE));
EricLew 0:80ee8f3b695e 895 }
EricLew 0:80ee8f3b695e 896
EricLew 0:80ee8f3b695e 897 /**
EricLew 0:80ee8f3b695e 898 * @brief Check if Receive buffer full interrupt is enabled
EricLew 0:80ee8f3b695e 899 * @rmtoll IER RXBFIE LL_SWPMI_IsEnabledIT_RXBF
EricLew 0:80ee8f3b695e 900 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 901 * @retval State of bit (1 or 0).
EricLew 0:80ee8f3b695e 902 */
EricLew 0:80ee8f3b695e 903 __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledIT_RXBF(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 904 {
EricLew 0:80ee8f3b695e 905 return (READ_BIT(SWPMIx->IER, SWPMI_IER_RXBFIE) == (SWPMI_IER_RXBFIE));
EricLew 0:80ee8f3b695e 906 }
EricLew 0:80ee8f3b695e 907
EricLew 0:80ee8f3b695e 908 /**
EricLew 0:80ee8f3b695e 909 * @}
EricLew 0:80ee8f3b695e 910 */
EricLew 0:80ee8f3b695e 911
EricLew 0:80ee8f3b695e 912 /** @defgroup SWPMI_LL_EF_DMA_Management DMA_Management
EricLew 0:80ee8f3b695e 913 * @{
EricLew 0:80ee8f3b695e 914 */
EricLew 0:80ee8f3b695e 915
EricLew 0:80ee8f3b695e 916 /**
EricLew 0:80ee8f3b695e 917 * @brief Enable DMA mode for reception
EricLew 0:80ee8f3b695e 918 * @rmtoll CR RXDMA LL_SWPMI_EnableDMAReq_RX
EricLew 0:80ee8f3b695e 919 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 920 * @retval None
EricLew 0:80ee8f3b695e 921 */
EricLew 0:80ee8f3b695e 922 __STATIC_INLINE void LL_SWPMI_EnableDMAReq_RX(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 923 {
EricLew 0:80ee8f3b695e 924 SET_BIT(SWPMIx->CR, SWPMI_CR_RXDMA);
EricLew 0:80ee8f3b695e 925 }
EricLew 0:80ee8f3b695e 926
EricLew 0:80ee8f3b695e 927 /**
EricLew 0:80ee8f3b695e 928 * @brief Disable DMA mode for reception
EricLew 0:80ee8f3b695e 929 * @rmtoll CR RXDMA LL_SWPMI_DisableDMAReq_RX
EricLew 0:80ee8f3b695e 930 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 931 * @retval None
EricLew 0:80ee8f3b695e 932 */
EricLew 0:80ee8f3b695e 933 __STATIC_INLINE void LL_SWPMI_DisableDMAReq_RX(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 934 {
EricLew 0:80ee8f3b695e 935 CLEAR_BIT(SWPMIx->CR, SWPMI_CR_RXDMA);
EricLew 0:80ee8f3b695e 936 }
EricLew 0:80ee8f3b695e 937
EricLew 0:80ee8f3b695e 938 /**
EricLew 0:80ee8f3b695e 939 * @brief Check if DMA mode for reception is enabled
EricLew 0:80ee8f3b695e 940 * @rmtoll CR RXDMA LL_SWPMI_IsEnabledDMAReq_RX
EricLew 0:80ee8f3b695e 941 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 942 * @retval State of bit (1 or 0).
EricLew 0:80ee8f3b695e 943 */
EricLew 0:80ee8f3b695e 944 __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledDMAReq_RX(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 945 {
EricLew 0:80ee8f3b695e 946 return (READ_BIT(SWPMIx->CR, SWPMI_CR_RXDMA) == (SWPMI_CR_RXDMA));
EricLew 0:80ee8f3b695e 947 }
EricLew 0:80ee8f3b695e 948
EricLew 0:80ee8f3b695e 949 /**
EricLew 0:80ee8f3b695e 950 * @brief Enable DMA mode for transmission
EricLew 0:80ee8f3b695e 951 * @rmtoll CR TXDMA LL_SWPMI_EnableDMAReq_TX
EricLew 0:80ee8f3b695e 952 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 953 * @retval None
EricLew 0:80ee8f3b695e 954 */
EricLew 0:80ee8f3b695e 955 __STATIC_INLINE void LL_SWPMI_EnableDMAReq_TX(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 956 {
EricLew 0:80ee8f3b695e 957 SET_BIT(SWPMIx->CR, SWPMI_CR_TXDMA);
EricLew 0:80ee8f3b695e 958 }
EricLew 0:80ee8f3b695e 959
EricLew 0:80ee8f3b695e 960 /**
EricLew 0:80ee8f3b695e 961 * @brief Disable DMA mode for transmission
EricLew 0:80ee8f3b695e 962 * @rmtoll CR TXDMA LL_SWPMI_DisableDMAReq_TX
EricLew 0:80ee8f3b695e 963 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 964 * @retval None
EricLew 0:80ee8f3b695e 965 */
EricLew 0:80ee8f3b695e 966 __STATIC_INLINE void LL_SWPMI_DisableDMAReq_TX(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 967 {
EricLew 0:80ee8f3b695e 968 CLEAR_BIT(SWPMIx->CR, SWPMI_CR_TXDMA);
EricLew 0:80ee8f3b695e 969 }
EricLew 0:80ee8f3b695e 970
EricLew 0:80ee8f3b695e 971 /**
EricLew 0:80ee8f3b695e 972 * @brief Check if DMA mode for transmission is enabled
EricLew 0:80ee8f3b695e 973 * @rmtoll CR TXDMA LL_SWPMI_IsEnabledDMAReq_TX
EricLew 0:80ee8f3b695e 974 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 975 * @retval State of bit (1 or 0).
EricLew 0:80ee8f3b695e 976 */
EricLew 0:80ee8f3b695e 977 __STATIC_INLINE uint32_t LL_SWPMI_IsEnabledDMAReq_TX(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 978 {
EricLew 0:80ee8f3b695e 979 return (READ_BIT(SWPMIx->CR, SWPMI_CR_TXDMA) == (SWPMI_CR_TXDMA));
EricLew 0:80ee8f3b695e 980 }
EricLew 0:80ee8f3b695e 981
EricLew 0:80ee8f3b695e 982 /**
EricLew 0:80ee8f3b695e 983 * @brief Get the data register address used for DMA transfer
EricLew 0:80ee8f3b695e 984 * @rmtoll TDR TD LL_SWPMI_DMA_GetRegAddr\n
EricLew 0:80ee8f3b695e 985 * RDR RD LL_SWPMI_DMA_GetRegAddr
EricLew 0:80ee8f3b695e 986 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 987 * @param Direction This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 988 * @arg @ref LL_SWPMI_DMA_REG_DATA_TRANSMIT
EricLew 0:80ee8f3b695e 989 * @arg @ref LL_SWPMI_DMA_REG_DATA_RECEIVE
EricLew 0:80ee8f3b695e 990 * @retval Address of data register
EricLew 0:80ee8f3b695e 991 */
EricLew 0:80ee8f3b695e 992 __STATIC_INLINE uint32_t LL_SWPMI_DMA_GetRegAddr(SWPMI_TypeDef * SWPMIx, uint32_t Direction)
EricLew 0:80ee8f3b695e 993 {
EricLew 0:80ee8f3b695e 994 register uint32_t data_reg_addr = 0;
EricLew 0:80ee8f3b695e 995
EricLew 0:80ee8f3b695e 996 if (Direction == LL_SWPMI_DMA_REG_DATA_TRANSMIT)
EricLew 0:80ee8f3b695e 997 {
EricLew 0:80ee8f3b695e 998 /* return address of TDR register */
EricLew 0:80ee8f3b695e 999 data_reg_addr = (uint32_t)&(SWPMIx->TDR);
EricLew 0:80ee8f3b695e 1000 }
EricLew 0:80ee8f3b695e 1001 else
EricLew 0:80ee8f3b695e 1002 {
EricLew 0:80ee8f3b695e 1003 /* return address of RDR register */
EricLew 0:80ee8f3b695e 1004 data_reg_addr = (uint32_t)&(SWPMIx->RDR);
EricLew 0:80ee8f3b695e 1005 }
EricLew 0:80ee8f3b695e 1006
EricLew 0:80ee8f3b695e 1007 return data_reg_addr;
EricLew 0:80ee8f3b695e 1008 }
EricLew 0:80ee8f3b695e 1009
EricLew 0:80ee8f3b695e 1010 /**
EricLew 0:80ee8f3b695e 1011 * @}
EricLew 0:80ee8f3b695e 1012 */
EricLew 0:80ee8f3b695e 1013
EricLew 0:80ee8f3b695e 1014 /** @defgroup SWPMI_LL_EF_Data_Management Data_Management
EricLew 0:80ee8f3b695e 1015 * @{
EricLew 0:80ee8f3b695e 1016 */
EricLew 0:80ee8f3b695e 1017
EricLew 0:80ee8f3b695e 1018 /**
EricLew 0:80ee8f3b695e 1019 * @brief Retrieve number of data bytes present in payload of received frame
EricLew 0:80ee8f3b695e 1020 * @rmtoll RFL RFL LL_SWPMI_GetReceiveFrameLength
EricLew 0:80ee8f3b695e 1021 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 1022 * @retval Between 0 and 0x1F
EricLew 0:80ee8f3b695e 1023 */
EricLew 0:80ee8f3b695e 1024 __STATIC_INLINE uint32_t LL_SWPMI_GetReceiveFrameLength(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 1025 {
EricLew 0:80ee8f3b695e 1026 return (uint32_t)(READ_BIT(SWPMIx->RFL, SWPMI_RFL_RFL));
EricLew 0:80ee8f3b695e 1027 }
EricLew 0:80ee8f3b695e 1028
EricLew 0:80ee8f3b695e 1029 /**
EricLew 0:80ee8f3b695e 1030 * @brief Transmit Data Register
EricLew 0:80ee8f3b695e 1031 * @rmtoll TDR TD LL_SWPMI_TransmitData32
EricLew 0:80ee8f3b695e 1032 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 1033 * @param TxData Between 0 and 0xFFFFFFFF
EricLew 0:80ee8f3b695e 1034 * @retval None
EricLew 0:80ee8f3b695e 1035 */
EricLew 0:80ee8f3b695e 1036 __STATIC_INLINE void LL_SWPMI_TransmitData32(SWPMI_TypeDef *SWPMIx, uint32_t TxData)
EricLew 0:80ee8f3b695e 1037 {
EricLew 0:80ee8f3b695e 1038 WRITE_REG(SWPMIx->TDR, TxData);
EricLew 0:80ee8f3b695e 1039 }
EricLew 0:80ee8f3b695e 1040
EricLew 0:80ee8f3b695e 1041 /**
EricLew 0:80ee8f3b695e 1042 * @brief Receive Data Register
EricLew 0:80ee8f3b695e 1043 * @rmtoll RDR RD LL_SWPMI_ReceiveData32
EricLew 0:80ee8f3b695e 1044 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 1045 * @retval Between 0 and 0xFFFFFFFF
EricLew 0:80ee8f3b695e 1046 */
EricLew 0:80ee8f3b695e 1047 __STATIC_INLINE uint32_t LL_SWPMI_ReceiveData32(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 1048 {
EricLew 0:80ee8f3b695e 1049 return (uint32_t)(READ_BIT(SWPMIx->RDR, SWPMI_RDR_RD));
EricLew 0:80ee8f3b695e 1050 }
EricLew 0:80ee8f3b695e 1051
EricLew 0:80ee8f3b695e 1052 /**
EricLew 0:80ee8f3b695e 1053 * @brief Enable SWP Transceiver Bypass
EricLew 0:80ee8f3b695e 1054 * @note The external interface for SWPMI is SWPMI_IO
EricLew 0:80ee8f3b695e 1055 * (SWPMI_RX, SWPMI_TX and SWPMI_SUSPEND signals are not available on GPIOs)
EricLew 0:80ee8f3b695e 1056 * @rmtoll OR TBYP LL_SWPMI_EnableTXBypass
EricLew 0:80ee8f3b695e 1057 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 1058 * @retval None
EricLew 0:80ee8f3b695e 1059 */
EricLew 0:80ee8f3b695e 1060 __STATIC_INLINE void LL_SWPMI_EnableTXBypass(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 1061 {
EricLew 0:80ee8f3b695e 1062 CLEAR_BIT(SWPMIx->OR, SWPMI_OR_TBYP);
EricLew 0:80ee8f3b695e 1063 }
EricLew 0:80ee8f3b695e 1064
EricLew 0:80ee8f3b695e 1065 /**
EricLew 0:80ee8f3b695e 1066 * @brief Disable SWP Transceiver Bypass
EricLew 0:80ee8f3b695e 1067 * @note SWPMI_RX, SWPMI_TX and SWPMI_SUSPEND signals are available as alternate
EricLew 0:80ee8f3b695e 1068 * function on GPIOs. This configuration is selected to connect an external transceiver
EricLew 0:80ee8f3b695e 1069 * @rmtoll OR TBYP LL_SWPMI_DisableTXBypass
EricLew 0:80ee8f3b695e 1070 * @param SWPMIx SWPMI Instance
EricLew 0:80ee8f3b695e 1071 * @retval None
EricLew 0:80ee8f3b695e 1072 */
EricLew 0:80ee8f3b695e 1073 __STATIC_INLINE void LL_SWPMI_DisableTXBypass(SWPMI_TypeDef *SWPMIx)
EricLew 0:80ee8f3b695e 1074 {
EricLew 0:80ee8f3b695e 1075 SET_BIT(SWPMIx->OR, SWPMI_OR_TBYP);
EricLew 0:80ee8f3b695e 1076 }
EricLew 0:80ee8f3b695e 1077
EricLew 0:80ee8f3b695e 1078 /**
EricLew 0:80ee8f3b695e 1079 * @}
EricLew 0:80ee8f3b695e 1080 */
EricLew 0:80ee8f3b695e 1081
EricLew 0:80ee8f3b695e 1082
EricLew 0:80ee8f3b695e 1083 /**
EricLew 0:80ee8f3b695e 1084 * @}
EricLew 0:80ee8f3b695e 1085 */
EricLew 0:80ee8f3b695e 1086
EricLew 0:80ee8f3b695e 1087 /**
EricLew 0:80ee8f3b695e 1088 * @}
EricLew 0:80ee8f3b695e 1089 */
EricLew 0:80ee8f3b695e 1090
EricLew 0:80ee8f3b695e 1091 #endif /* defined (SWPMI1) */
EricLew 0:80ee8f3b695e 1092
EricLew 0:80ee8f3b695e 1093 /**
EricLew 0:80ee8f3b695e 1094 * @}
EricLew 0:80ee8f3b695e 1095 */
EricLew 0:80ee8f3b695e 1096
EricLew 0:80ee8f3b695e 1097 #ifdef __cplusplus
EricLew 0:80ee8f3b695e 1098 }
EricLew 0:80ee8f3b695e 1099 #endif
EricLew 0:80ee8f3b695e 1100
EricLew 0:80ee8f3b695e 1101 #endif /* __STM32L4xx_LL_SWPMI_H */
EricLew 0:80ee8f3b695e 1102
EricLew 0:80ee8f3b695e 1103 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
EricLew 0:80ee8f3b695e 1104