Hal Drivers for L4
Dependents: BSP OneHopeOnePrayer FINAL_AUDIO_RECORD AudioDemo
Fork of STM32L4xx_HAL_Driver by
Inc/stm32l4xx_ll_dma.h@2:7aef7655b0a8, 2015-11-25 (annotated)
- Committer:
- EricLew
- Date:
- Wed Nov 25 17:30:43 2015 +0000
- Revision:
- 2:7aef7655b0a8
- Parent:
- 0:80ee8f3b695e
commit;
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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EricLew | 0:80ee8f3b695e | 1 | /** |
EricLew | 0:80ee8f3b695e | 2 | ****************************************************************************** |
EricLew | 0:80ee8f3b695e | 3 | * @file stm32l4xx_ll_dma.h |
EricLew | 0:80ee8f3b695e | 4 | * @author MCD Application Team |
EricLew | 0:80ee8f3b695e | 5 | * @version V1.1.0 |
EricLew | 0:80ee8f3b695e | 6 | * @date 16-September-2015 |
EricLew | 0:80ee8f3b695e | 7 | * @brief Header file of DMA LL module. |
EricLew | 0:80ee8f3b695e | 8 | ****************************************************************************** |
EricLew | 0:80ee8f3b695e | 9 | * @attention |
EricLew | 0:80ee8f3b695e | 10 | * |
EricLew | 0:80ee8f3b695e | 11 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
EricLew | 0:80ee8f3b695e | 12 | * |
EricLew | 0:80ee8f3b695e | 13 | * Redistribution and use in source and binary forms, with or without modification, |
EricLew | 0:80ee8f3b695e | 14 | * are permitted provided that the following conditions are met: |
EricLew | 0:80ee8f3b695e | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
EricLew | 0:80ee8f3b695e | 16 | * this list of conditions and the following disclaimer. |
EricLew | 0:80ee8f3b695e | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
EricLew | 0:80ee8f3b695e | 18 | * this list of conditions and the following disclaimer in the documentation |
EricLew | 0:80ee8f3b695e | 19 | * and/or other materials provided with the distribution. |
EricLew | 0:80ee8f3b695e | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
EricLew | 0:80ee8f3b695e | 21 | * may be used to endorse or promote products derived from this software |
EricLew | 0:80ee8f3b695e | 22 | * without specific prior written permission. |
EricLew | 0:80ee8f3b695e | 23 | * |
EricLew | 0:80ee8f3b695e | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
EricLew | 0:80ee8f3b695e | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
EricLew | 0:80ee8f3b695e | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
EricLew | 0:80ee8f3b695e | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
EricLew | 0:80ee8f3b695e | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
EricLew | 0:80ee8f3b695e | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
EricLew | 0:80ee8f3b695e | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
EricLew | 0:80ee8f3b695e | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
EricLew | 0:80ee8f3b695e | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
EricLew | 0:80ee8f3b695e | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
EricLew | 0:80ee8f3b695e | 34 | * |
EricLew | 0:80ee8f3b695e | 35 | ****************************************************************************** |
EricLew | 0:80ee8f3b695e | 36 | */ |
EricLew | 0:80ee8f3b695e | 37 | |
EricLew | 0:80ee8f3b695e | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 39 | #ifndef __STM32L4xx_LL_DMA_H |
EricLew | 0:80ee8f3b695e | 40 | #define __STM32L4xx_LL_DMA_H |
EricLew | 0:80ee8f3b695e | 41 | |
EricLew | 0:80ee8f3b695e | 42 | #ifdef __cplusplus |
EricLew | 0:80ee8f3b695e | 43 | extern "C" { |
EricLew | 0:80ee8f3b695e | 44 | #endif |
EricLew | 0:80ee8f3b695e | 45 | |
EricLew | 0:80ee8f3b695e | 46 | /* Includes ------------------------------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 47 | #include "stm32l4xx.h" |
EricLew | 0:80ee8f3b695e | 48 | |
EricLew | 0:80ee8f3b695e | 49 | /** @addtogroup STM32L4xx_LL_Driver |
EricLew | 0:80ee8f3b695e | 50 | * @{ |
EricLew | 0:80ee8f3b695e | 51 | */ |
EricLew | 0:80ee8f3b695e | 52 | |
EricLew | 0:80ee8f3b695e | 53 | #if defined (DMA1) || defined (DMA2) |
EricLew | 0:80ee8f3b695e | 54 | |
EricLew | 0:80ee8f3b695e | 55 | /** @defgroup DMA_LL DMA |
EricLew | 0:80ee8f3b695e | 56 | * @{ |
EricLew | 0:80ee8f3b695e | 57 | */ |
EricLew | 0:80ee8f3b695e | 58 | |
EricLew | 0:80ee8f3b695e | 59 | /* Private types -------------------------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 60 | /* Private variables ---------------------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 61 | /** @defgroup DMA_LL_Private_Variables DMA Private Variables |
EricLew | 0:80ee8f3b695e | 62 | * @{ |
EricLew | 0:80ee8f3b695e | 63 | */ |
EricLew | 0:80ee8f3b695e | 64 | /* Array used to get the DMA channel register offset versus channel index LL_DMA_CHANNEL_x */ |
EricLew | 0:80ee8f3b695e | 65 | static const uint8_t CHANNEL_OFFSET_TAB[] = |
EricLew | 0:80ee8f3b695e | 66 | { |
EricLew | 0:80ee8f3b695e | 67 | (uint8_t)(DMA1_Channel1_BASE - DMA1_BASE), |
EricLew | 0:80ee8f3b695e | 68 | (uint8_t)(DMA1_Channel2_BASE - DMA1_BASE), |
EricLew | 0:80ee8f3b695e | 69 | (uint8_t)(DMA1_Channel3_BASE - DMA1_BASE), |
EricLew | 0:80ee8f3b695e | 70 | (uint8_t)(DMA1_Channel4_BASE - DMA1_BASE), |
EricLew | 0:80ee8f3b695e | 71 | (uint8_t)(DMA1_Channel5_BASE - DMA1_BASE), |
EricLew | 0:80ee8f3b695e | 72 | (uint8_t)(DMA1_Channel6_BASE - DMA1_BASE), |
EricLew | 0:80ee8f3b695e | 73 | (uint8_t)(DMA1_Channel7_BASE - DMA1_BASE) |
EricLew | 0:80ee8f3b695e | 74 | }; |
EricLew | 0:80ee8f3b695e | 75 | /** |
EricLew | 0:80ee8f3b695e | 76 | * @} |
EricLew | 0:80ee8f3b695e | 77 | */ |
EricLew | 0:80ee8f3b695e | 78 | |
EricLew | 0:80ee8f3b695e | 79 | /* Private constants ---------------------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 80 | /** @defgroup DMA_LL_Private_Constants DMA Private Constants |
EricLew | 0:80ee8f3b695e | 81 | * @{ |
EricLew | 0:80ee8f3b695e | 82 | */ |
EricLew | 0:80ee8f3b695e | 83 | /* Define used to get CSELR register offset */ |
EricLew | 0:80ee8f3b695e | 84 | #define DMA_CSELR_OFFSET (uint32_t)(DMA1_CSELR_BASE - DMA1_BASE) |
EricLew | 0:80ee8f3b695e | 85 | /** |
EricLew | 0:80ee8f3b695e | 86 | * @} |
EricLew | 0:80ee8f3b695e | 87 | */ |
EricLew | 0:80ee8f3b695e | 88 | |
EricLew | 0:80ee8f3b695e | 89 | /* Private macros ------------------------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 90 | |
EricLew | 0:80ee8f3b695e | 91 | /* Exported types ------------------------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 92 | /* Exported constants --------------------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 93 | /** @defgroup DMA_LL_Exported_Constants DMA Exported Constants |
EricLew | 0:80ee8f3b695e | 94 | * @{ |
EricLew | 0:80ee8f3b695e | 95 | */ |
EricLew | 0:80ee8f3b695e | 96 | /** @defgroup DMA_LL_EC_CLEAR_FLAG Clear Flags Defines |
EricLew | 0:80ee8f3b695e | 97 | * @brief Flags defines which can be used with LL_DMA_WriteReg function |
EricLew | 0:80ee8f3b695e | 98 | * @{ |
EricLew | 0:80ee8f3b695e | 99 | */ |
EricLew | 0:80ee8f3b695e | 100 | #define LL_DMA_IFCR_CGIF1 DMA_IFCR_CGIF1 |
EricLew | 0:80ee8f3b695e | 101 | #define LL_DMA_IFCR_CTCIF1 DMA_IFCR_CTCIF1 |
EricLew | 0:80ee8f3b695e | 102 | #define LL_DMA_IFCR_CHTIF1 DMA_IFCR_CHTIF1 |
EricLew | 0:80ee8f3b695e | 103 | #define LL_DMA_IFCR_CTEIF1 DMA_IFCR_CTEIF1 |
EricLew | 0:80ee8f3b695e | 104 | #define LL_DMA_IFCR_CGIF2 DMA_IFCR_CGIF2 |
EricLew | 0:80ee8f3b695e | 105 | #define LL_DMA_IFCR_CTCIF2 DMA_IFCR_CTCIF2 |
EricLew | 0:80ee8f3b695e | 106 | #define LL_DMA_IFCR_CHTIF2 DMA_IFCR_CHTIF2 |
EricLew | 0:80ee8f3b695e | 107 | #define LL_DMA_IFCR_CTEIF2 DMA_IFCR_CTEIF2 |
EricLew | 0:80ee8f3b695e | 108 | #define LL_DMA_IFCR_CGIF3 DMA_IFCR_CGIF3 |
EricLew | 0:80ee8f3b695e | 109 | #define LL_DMA_IFCR_CTCIF3 DMA_IFCR_CTCIF3 |
EricLew | 0:80ee8f3b695e | 110 | #define LL_DMA_IFCR_CHTIF3 DMA_IFCR_CHTIF3 |
EricLew | 0:80ee8f3b695e | 111 | #define LL_DMA_IFCR_CTEIF3 DMA_IFCR_CTEIF3 |
EricLew | 0:80ee8f3b695e | 112 | #define LL_DMA_IFCR_CGIF4 DMA_IFCR_CGIF4 |
EricLew | 0:80ee8f3b695e | 113 | #define LL_DMA_IFCR_CTCIF4 DMA_IFCR_CTCIF4 |
EricLew | 0:80ee8f3b695e | 114 | #define LL_DMA_IFCR_CHTIF4 DMA_IFCR_CHTIF4 |
EricLew | 0:80ee8f3b695e | 115 | #define LL_DMA_IFCR_CTEIF4 DMA_IFCR_CTEIF4 |
EricLew | 0:80ee8f3b695e | 116 | #define LL_DMA_IFCR_CGIF5 DMA_IFCR_CGIF5 |
EricLew | 0:80ee8f3b695e | 117 | #define LL_DMA_IFCR_CTCIF5 DMA_IFCR_CTCIF5 |
EricLew | 0:80ee8f3b695e | 118 | #define LL_DMA_IFCR_CHTIF5 DMA_IFCR_CHTIF5 |
EricLew | 0:80ee8f3b695e | 119 | #define LL_DMA_IFCR_CTEIF5 DMA_IFCR_CTEIF5 |
EricLew | 0:80ee8f3b695e | 120 | #define LL_DMA_IFCR_CGIF6 DMA_IFCR_CGIF6 |
EricLew | 0:80ee8f3b695e | 121 | #define LL_DMA_IFCR_CTCIF6 DMA_IFCR_CTCIF6 |
EricLew | 0:80ee8f3b695e | 122 | #define LL_DMA_IFCR_CHTIF6 DMA_IFCR_CHTIF6 |
EricLew | 0:80ee8f3b695e | 123 | #define LL_DMA_IFCR_CTEIF6 DMA_IFCR_CTEIF6 |
EricLew | 0:80ee8f3b695e | 124 | #define LL_DMA_IFCR_CGIF7 DMA_IFCR_CGIF7 |
EricLew | 0:80ee8f3b695e | 125 | #define LL_DMA_IFCR_CTCIF7 DMA_IFCR_CTCIF7 |
EricLew | 0:80ee8f3b695e | 126 | #define LL_DMA_IFCR_CHTIF7 DMA_IFCR_CHTIF7 |
EricLew | 0:80ee8f3b695e | 127 | #define LL_DMA_IFCR_CTEIF7 DMA_IFCR_CTEIF7 |
EricLew | 0:80ee8f3b695e | 128 | /** |
EricLew | 0:80ee8f3b695e | 129 | * @} |
EricLew | 0:80ee8f3b695e | 130 | */ |
EricLew | 0:80ee8f3b695e | 131 | |
EricLew | 0:80ee8f3b695e | 132 | /** @defgroup DMA_LL_EC_GET_FLAG Get Flags Defines |
EricLew | 0:80ee8f3b695e | 133 | * @brief Flags defines which can be used with LL_DMA_ReadReg function |
EricLew | 0:80ee8f3b695e | 134 | * @{ |
EricLew | 0:80ee8f3b695e | 135 | */ |
EricLew | 0:80ee8f3b695e | 136 | #define LL_DMA_ISR_GIF1 DMA_ISR_GIF1 |
EricLew | 0:80ee8f3b695e | 137 | #define LL_DMA_ISR_GIF2 DMA_ISR_GIF2 |
EricLew | 0:80ee8f3b695e | 138 | #define LL_DMA_ISR_GIF3 DMA_ISR_GIF3 |
EricLew | 0:80ee8f3b695e | 139 | #define LL_DMA_ISR_GIF4 DMA_ISR_GIF4 |
EricLew | 0:80ee8f3b695e | 140 | #define LL_DMA_ISR_GIF5 DMA_ISR_GIF5 |
EricLew | 0:80ee8f3b695e | 141 | #define LL_DMA_ISR_GIF6 DMA_ISR_GIF6 |
EricLew | 0:80ee8f3b695e | 142 | #define LL_DMA_ISR_GIF7 DMA_ISR_GIF7 |
EricLew | 0:80ee8f3b695e | 143 | #define LL_DMA_ISR_TCIF1 DMA_ISR_TCIF1 |
EricLew | 0:80ee8f3b695e | 144 | #define LL_DMA_ISR_TCIF2 DMA_ISR_TCIF2 |
EricLew | 0:80ee8f3b695e | 145 | #define LL_DMA_ISR_TCIF3 DMA_ISR_TCIF3 |
EricLew | 0:80ee8f3b695e | 146 | #define LL_DMA_ISR_TCIF4 DMA_ISR_TCIF4 |
EricLew | 0:80ee8f3b695e | 147 | #define LL_DMA_ISR_TCIF5 DMA_ISR_TCIF5 |
EricLew | 0:80ee8f3b695e | 148 | #define LL_DMA_ISR_TCIF6 DMA_ISR_TCIF6 |
EricLew | 0:80ee8f3b695e | 149 | #define LL_DMA_ISR_TCIF7 DMA_ISR_TCIF7 |
EricLew | 0:80ee8f3b695e | 150 | #define LL_DMA_ISR_HTIF1 DMA_ISR_HTIF1 |
EricLew | 0:80ee8f3b695e | 151 | #define LL_DMA_ISR_HTIF2 DMA_ISR_HTIF2 |
EricLew | 0:80ee8f3b695e | 152 | #define LL_DMA_ISR_HTIF3 DMA_ISR_HTIF3 |
EricLew | 0:80ee8f3b695e | 153 | #define LL_DMA_ISR_HTIF4 DMA_ISR_HTIF4 |
EricLew | 0:80ee8f3b695e | 154 | #define LL_DMA_ISR_HTIF5 DMA_ISR_HTIF5 |
EricLew | 0:80ee8f3b695e | 155 | #define LL_DMA_ISR_HTIF6 DMA_ISR_HTIF6 |
EricLew | 0:80ee8f3b695e | 156 | #define LL_DMA_ISR_HTIF7 DMA_ISR_HTIF7 |
EricLew | 0:80ee8f3b695e | 157 | #define LL_DMA_ISR_TEIF1 DMA_ISR_TEIF1 |
EricLew | 0:80ee8f3b695e | 158 | #define LL_DMA_ISR_TEIF2 DMA_ISR_TEIF2 |
EricLew | 0:80ee8f3b695e | 159 | #define LL_DMA_ISR_TEIF3 DMA_ISR_TEIF3 |
EricLew | 0:80ee8f3b695e | 160 | #define LL_DMA_ISR_TEIF4 DMA_ISR_TEIF4 |
EricLew | 0:80ee8f3b695e | 161 | #define LL_DMA_ISR_TEIF5 DMA_ISR_TEIF5 |
EricLew | 0:80ee8f3b695e | 162 | #define LL_DMA_ISR_TEIF6 DMA_ISR_TEIF6 |
EricLew | 0:80ee8f3b695e | 163 | #define LL_DMA_ISR_TEIF7 DMA_ISR_TEIF7 |
EricLew | 0:80ee8f3b695e | 164 | /** |
EricLew | 0:80ee8f3b695e | 165 | * @} |
EricLew | 0:80ee8f3b695e | 166 | */ |
EricLew | 0:80ee8f3b695e | 167 | |
EricLew | 0:80ee8f3b695e | 168 | /** @defgroup DMA_LL_EC_IT IT Defines |
EricLew | 0:80ee8f3b695e | 169 | * @brief IT defines which can be used with LL_DMA_ReadReg and LL_DMA_WriteReg functions |
EricLew | 0:80ee8f3b695e | 170 | * @{ |
EricLew | 0:80ee8f3b695e | 171 | */ |
EricLew | 0:80ee8f3b695e | 172 | #define LL_DMA_CCR_TCIE DMA_CCR_TCIE |
EricLew | 0:80ee8f3b695e | 173 | #define LL_DMA_CCR_HTIE DMA_CCR_HTIE |
EricLew | 0:80ee8f3b695e | 174 | #define LL_DMA_CCR_TEIE DMA_CCR_TEIE |
EricLew | 0:80ee8f3b695e | 175 | /** |
EricLew | 0:80ee8f3b695e | 176 | * @} |
EricLew | 0:80ee8f3b695e | 177 | */ |
EricLew | 0:80ee8f3b695e | 178 | |
EricLew | 0:80ee8f3b695e | 179 | /** @defgroup DMA_LL_EC_CHANNEL CHANNEL |
EricLew | 0:80ee8f3b695e | 180 | * @{ |
EricLew | 0:80ee8f3b695e | 181 | */ |
EricLew | 0:80ee8f3b695e | 182 | #define LL_DMA_CHANNEL_1 ((uint32_t)0x00000001) |
EricLew | 0:80ee8f3b695e | 183 | #define LL_DMA_CHANNEL_2 ((uint32_t)0x00000002) |
EricLew | 0:80ee8f3b695e | 184 | #define LL_DMA_CHANNEL_3 ((uint32_t)0x00000003) |
EricLew | 0:80ee8f3b695e | 185 | #define LL_DMA_CHANNEL_4 ((uint32_t)0x00000004) |
EricLew | 0:80ee8f3b695e | 186 | #define LL_DMA_CHANNEL_5 ((uint32_t)0x00000005) |
EricLew | 0:80ee8f3b695e | 187 | #define LL_DMA_CHANNEL_6 ((uint32_t)0x00000006) |
EricLew | 0:80ee8f3b695e | 188 | #define LL_DMA_CHANNEL_7 ((uint32_t)0x00000007) |
EricLew | 0:80ee8f3b695e | 189 | /** |
EricLew | 0:80ee8f3b695e | 190 | * @} |
EricLew | 0:80ee8f3b695e | 191 | */ |
EricLew | 0:80ee8f3b695e | 192 | |
EricLew | 0:80ee8f3b695e | 193 | /** @defgroup DMA_LL_EC_DIRECTION DIRECTION |
EricLew | 0:80ee8f3b695e | 194 | * @{ |
EricLew | 0:80ee8f3b695e | 195 | */ |
EricLew | 0:80ee8f3b695e | 196 | #define LL_DMA_DIRECTION_PERIPH_TO_MEMORY ((uint32_t)0x00000000) /*!< Peripheral to memory direction */ |
EricLew | 0:80ee8f3b695e | 197 | #define LL_DMA_DIRECTION_MEMORY_TO_PERIPH DMA_CCR_DIR /*!< Memory to peripheral direction */ |
EricLew | 0:80ee8f3b695e | 198 | #define LL_DMA_DIRECTION_MEMORY_TO_MEMORY DMA_CCR_MEM2MEM /*!< Memory to memory direction */ |
EricLew | 0:80ee8f3b695e | 199 | /** |
EricLew | 0:80ee8f3b695e | 200 | * @} |
EricLew | 0:80ee8f3b695e | 201 | */ |
EricLew | 0:80ee8f3b695e | 202 | |
EricLew | 0:80ee8f3b695e | 203 | /** @defgroup DMA_LL_EC_MODE MODE |
EricLew | 0:80ee8f3b695e | 204 | * @{ |
EricLew | 0:80ee8f3b695e | 205 | */ |
EricLew | 0:80ee8f3b695e | 206 | #define LL_DMA_MODE_NORMAL ((uint32_t)0x00000000) /*!< Normal Mode */ |
EricLew | 0:80ee8f3b695e | 207 | #define LL_DMA_MODE_CIRCULAR DMA_CCR_CIRC /*!< Circular Mode */ |
EricLew | 0:80ee8f3b695e | 208 | /** |
EricLew | 0:80ee8f3b695e | 209 | * @} |
EricLew | 0:80ee8f3b695e | 210 | */ |
EricLew | 0:80ee8f3b695e | 211 | |
EricLew | 0:80ee8f3b695e | 212 | /** @defgroup DMA_LL_EC_PERIPH PERIPH |
EricLew | 0:80ee8f3b695e | 213 | * @{ |
EricLew | 0:80ee8f3b695e | 214 | */ |
EricLew | 0:80ee8f3b695e | 215 | #define LL_DMA_PERIPH_INCREMENT DMA_CCR_PINC /*!< Peripheral increment mode Enable */ |
EricLew | 0:80ee8f3b695e | 216 | #define LL_DMA_PERIPH_NOINCREMENT ((uint32_t)0x00000000) /*!< Peripheral increment mode Disable */ |
EricLew | 0:80ee8f3b695e | 217 | /** |
EricLew | 0:80ee8f3b695e | 218 | * @} |
EricLew | 0:80ee8f3b695e | 219 | */ |
EricLew | 0:80ee8f3b695e | 220 | |
EricLew | 0:80ee8f3b695e | 221 | /** @defgroup DMA_LL_EC_MEMORY MEMORY |
EricLew | 0:80ee8f3b695e | 222 | * @{ |
EricLew | 0:80ee8f3b695e | 223 | */ |
EricLew | 0:80ee8f3b695e | 224 | #define LL_DMA_MEMORY_INCREMENT DMA_CCR_MINC /*!< Memory increment mode Enable */ |
EricLew | 0:80ee8f3b695e | 225 | #define LL_DMA_MEMORY_NOINCREMENT ((uint32_t)0x00000000) /*!< Memory increment mode Disable */ |
EricLew | 0:80ee8f3b695e | 226 | /** |
EricLew | 0:80ee8f3b695e | 227 | * @} |
EricLew | 0:80ee8f3b695e | 228 | */ |
EricLew | 0:80ee8f3b695e | 229 | |
EricLew | 0:80ee8f3b695e | 230 | /** @defgroup DMA_LL_EC_PDATAALIGN PDATAALIGN |
EricLew | 0:80ee8f3b695e | 231 | * @{ |
EricLew | 0:80ee8f3b695e | 232 | */ |
EricLew | 0:80ee8f3b695e | 233 | #define LL_DMA_PDATAALIGN_BYTE ((uint32_t)0x00000000) /*!< Peripheral data alignment : Byte */ |
EricLew | 0:80ee8f3b695e | 234 | #define LL_DMA_PDATAALIGN_HALFWORD DMA_CCR_PSIZE_0 /*!< Peripheral data alignment : HalfWord */ |
EricLew | 0:80ee8f3b695e | 235 | #define LL_DMA_PDATAALIGN_WORD DMA_CCR_PSIZE_1 /*!< Peripheral data alignment : Word */ |
EricLew | 0:80ee8f3b695e | 236 | /** |
EricLew | 0:80ee8f3b695e | 237 | * @} |
EricLew | 0:80ee8f3b695e | 238 | */ |
EricLew | 0:80ee8f3b695e | 239 | |
EricLew | 0:80ee8f3b695e | 240 | /** @defgroup DMA_LL_EC_MDATAALIGN MDATAALIGN |
EricLew | 0:80ee8f3b695e | 241 | * @{ |
EricLew | 0:80ee8f3b695e | 242 | */ |
EricLew | 0:80ee8f3b695e | 243 | #define LL_DMA_MDATAALIGN_BYTE ((uint32_t)0x00000000) /*!< Memory data alignment : Byte */ |
EricLew | 0:80ee8f3b695e | 244 | #define LL_DMA_MDATAALIGN_HALFWORD DMA_CCR_MSIZE_0 /*!< Memory data alignment : HalfWord */ |
EricLew | 0:80ee8f3b695e | 245 | #define LL_DMA_MDATAALIGN_WORD DMA_CCR_MSIZE_1 /*!< Memory data alignment : Word */ |
EricLew | 0:80ee8f3b695e | 246 | /** |
EricLew | 0:80ee8f3b695e | 247 | * @} |
EricLew | 0:80ee8f3b695e | 248 | */ |
EricLew | 0:80ee8f3b695e | 249 | |
EricLew | 0:80ee8f3b695e | 250 | /** @defgroup DMA_LL_EC_PRIORITY PRIORITY |
EricLew | 0:80ee8f3b695e | 251 | * @{ |
EricLew | 0:80ee8f3b695e | 252 | */ |
EricLew | 0:80ee8f3b695e | 253 | #define LL_DMA_PRIORITY_LOW ((uint32_t)0x00000000) /*!< Priority level : Low */ |
EricLew | 0:80ee8f3b695e | 254 | #define LL_DMA_PRIORITY_MEDIUM DMA_CCR_PL_0 /*!< Priority level : Medium */ |
EricLew | 0:80ee8f3b695e | 255 | #define LL_DMA_PRIORITY_HIGH DMA_CCR_PL_1 /*!< Priority level : High */ |
EricLew | 0:80ee8f3b695e | 256 | #define LL_DMA_PRIORITY_VERYHIGH DMA_CCR_PL /*!< Priority level : Very_High */ |
EricLew | 0:80ee8f3b695e | 257 | /** |
EricLew | 0:80ee8f3b695e | 258 | * @} |
EricLew | 0:80ee8f3b695e | 259 | */ |
EricLew | 0:80ee8f3b695e | 260 | |
EricLew | 0:80ee8f3b695e | 261 | /** @defgroup DMA_LL_EC_REQUEST REQUEST |
EricLew | 0:80ee8f3b695e | 262 | * @{ |
EricLew | 0:80ee8f3b695e | 263 | */ |
EricLew | 0:80ee8f3b695e | 264 | #define LL_DMA_REQUEST_0 ((uint32_t)0x00000000) |
EricLew | 0:80ee8f3b695e | 265 | #define LL_DMA_REQUEST_1 ((uint32_t)0x00000001) |
EricLew | 0:80ee8f3b695e | 266 | #define LL_DMA_REQUEST_2 ((uint32_t)0x00000002) |
EricLew | 0:80ee8f3b695e | 267 | #define LL_DMA_REQUEST_3 ((uint32_t)0x00000003) |
EricLew | 0:80ee8f3b695e | 268 | #define LL_DMA_REQUEST_4 ((uint32_t)0x00000004) |
EricLew | 0:80ee8f3b695e | 269 | #define LL_DMA_REQUEST_5 ((uint32_t)0x00000005) |
EricLew | 0:80ee8f3b695e | 270 | #define LL_DMA_REQUEST_6 ((uint32_t)0x00000006) |
EricLew | 0:80ee8f3b695e | 271 | #define LL_DMA_REQUEST_7 ((uint32_t)0x00000007) |
EricLew | 0:80ee8f3b695e | 272 | /** |
EricLew | 0:80ee8f3b695e | 273 | * @} |
EricLew | 0:80ee8f3b695e | 274 | */ |
EricLew | 0:80ee8f3b695e | 275 | |
EricLew | 0:80ee8f3b695e | 276 | /** |
EricLew | 0:80ee8f3b695e | 277 | * @} |
EricLew | 0:80ee8f3b695e | 278 | */ |
EricLew | 0:80ee8f3b695e | 279 | |
EricLew | 0:80ee8f3b695e | 280 | /* Exported macro ------------------------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 281 | /** @defgroup DMA_LL_Exported_Macros DMA Exported Macros |
EricLew | 0:80ee8f3b695e | 282 | * @{ |
EricLew | 0:80ee8f3b695e | 283 | */ |
EricLew | 0:80ee8f3b695e | 284 | |
EricLew | 0:80ee8f3b695e | 285 | /** @defgroup DMA_LL_EM_WRITE_READ Common Write and read registers macros |
EricLew | 0:80ee8f3b695e | 286 | * @{ |
EricLew | 0:80ee8f3b695e | 287 | */ |
EricLew | 0:80ee8f3b695e | 288 | /** |
EricLew | 0:80ee8f3b695e | 289 | * @brief Write a value in DMA register |
EricLew | 0:80ee8f3b695e | 290 | * @param __INSTANCE__ DMA Instance |
EricLew | 0:80ee8f3b695e | 291 | * @param __REG__ Register to be written |
EricLew | 0:80ee8f3b695e | 292 | * @param __VALUE__ Value to be written in the register |
EricLew | 0:80ee8f3b695e | 293 | * @retval None |
EricLew | 0:80ee8f3b695e | 294 | */ |
EricLew | 0:80ee8f3b695e | 295 | #define LL_DMA_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) |
EricLew | 0:80ee8f3b695e | 296 | |
EricLew | 0:80ee8f3b695e | 297 | /** |
EricLew | 0:80ee8f3b695e | 298 | * @brief Read a value in DMA register |
EricLew | 0:80ee8f3b695e | 299 | * @param __INSTANCE__ DMA Instance |
EricLew | 0:80ee8f3b695e | 300 | * @param __REG__ Register to be read |
EricLew | 0:80ee8f3b695e | 301 | * @retval Register value |
EricLew | 0:80ee8f3b695e | 302 | */ |
EricLew | 0:80ee8f3b695e | 303 | #define LL_DMA_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) |
EricLew | 0:80ee8f3b695e | 304 | /** |
EricLew | 0:80ee8f3b695e | 305 | * @} |
EricLew | 0:80ee8f3b695e | 306 | */ |
EricLew | 0:80ee8f3b695e | 307 | |
EricLew | 0:80ee8f3b695e | 308 | /** @defgroup DMA_LL_EM_CONVERT_DMAxCHANNELy Convert DMAxChannely |
EricLew | 0:80ee8f3b695e | 309 | * @{ |
EricLew | 0:80ee8f3b695e | 310 | */ |
EricLew | 0:80ee8f3b695e | 311 | /** |
EricLew | 0:80ee8f3b695e | 312 | * @brief Convert DMAx_Channely into DMAx |
EricLew | 0:80ee8f3b695e | 313 | * @param __CHANNEL_INSTANCE__ DMAx_Channely |
EricLew | 0:80ee8f3b695e | 314 | * @retval DMAx |
EricLew | 0:80ee8f3b695e | 315 | */ |
EricLew | 0:80ee8f3b695e | 316 | #define __LL_DMA_GET_INSTANCE(__CHANNEL_INSTANCE__) \ |
EricLew | 0:80ee8f3b695e | 317 | (((uint32_t)(__CHANNEL_INSTANCE__) > ((uint32_t)DMA1_Channel7)) ? DMA2 : DMA1) |
EricLew | 0:80ee8f3b695e | 318 | |
EricLew | 0:80ee8f3b695e | 319 | /** |
EricLew | 0:80ee8f3b695e | 320 | * @brief Convert DMAx_Channely into LL_DMA_CHANNEL_y |
EricLew | 0:80ee8f3b695e | 321 | * @param __CHANNEL_INSTANCE__ DMAx_Channely |
EricLew | 0:80ee8f3b695e | 322 | * @retval LL_DMA_CHANNEL_y |
EricLew | 0:80ee8f3b695e | 323 | */ |
EricLew | 0:80ee8f3b695e | 324 | #define __LL_DMA_GET_CHANNEL(__CHANNEL_INSTANCE__) \ |
EricLew | 0:80ee8f3b695e | 325 | (((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel1)) ? LL_DMA_CHANNEL_1 : \ |
EricLew | 0:80ee8f3b695e | 326 | ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA2_Channel1)) ? LL_DMA_CHANNEL_1 : \ |
EricLew | 0:80ee8f3b695e | 327 | ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel2)) ? LL_DMA_CHANNEL_2 : \ |
EricLew | 0:80ee8f3b695e | 328 | ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA2_Channel2)) ? LL_DMA_CHANNEL_2 : \ |
EricLew | 0:80ee8f3b695e | 329 | ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel3)) ? LL_DMA_CHANNEL_3 : \ |
EricLew | 0:80ee8f3b695e | 330 | ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA2_Channel3)) ? LL_DMA_CHANNEL_3 : \ |
EricLew | 0:80ee8f3b695e | 331 | ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel4)) ? LL_DMA_CHANNEL_4 : \ |
EricLew | 0:80ee8f3b695e | 332 | ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA2_Channel4)) ? LL_DMA_CHANNEL_4 : \ |
EricLew | 0:80ee8f3b695e | 333 | ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel5)) ? LL_DMA_CHANNEL_5 : \ |
EricLew | 0:80ee8f3b695e | 334 | ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA2_Channel5)) ? LL_DMA_CHANNEL_5 : \ |
EricLew | 0:80ee8f3b695e | 335 | ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA1_Channel6)) ? LL_DMA_CHANNEL_6 : \ |
EricLew | 0:80ee8f3b695e | 336 | ((uint32_t)(__CHANNEL_INSTANCE__) == ((uint32_t)DMA2_Channel6)) ? LL_DMA_CHANNEL_6 : \ |
EricLew | 0:80ee8f3b695e | 337 | LL_DMA_CHANNEL_7) |
EricLew | 0:80ee8f3b695e | 338 | |
EricLew | 0:80ee8f3b695e | 339 | /** |
EricLew | 0:80ee8f3b695e | 340 | * @} |
EricLew | 0:80ee8f3b695e | 341 | */ |
EricLew | 0:80ee8f3b695e | 342 | |
EricLew | 0:80ee8f3b695e | 343 | /** |
EricLew | 0:80ee8f3b695e | 344 | * @} |
EricLew | 0:80ee8f3b695e | 345 | */ |
EricLew | 0:80ee8f3b695e | 346 | |
EricLew | 0:80ee8f3b695e | 347 | /* Exported functions --------------------------------------------------------*/ |
EricLew | 0:80ee8f3b695e | 348 | /** @defgroup DMA_LL_Exported_Functions DMA Exported Functions |
EricLew | 0:80ee8f3b695e | 349 | * @{ |
EricLew | 0:80ee8f3b695e | 350 | */ |
EricLew | 0:80ee8f3b695e | 351 | |
EricLew | 0:80ee8f3b695e | 352 | /** @defgroup DMA_LL_EF_Configuration Configuration |
EricLew | 0:80ee8f3b695e | 353 | * @{ |
EricLew | 0:80ee8f3b695e | 354 | */ |
EricLew | 0:80ee8f3b695e | 355 | /** |
EricLew | 0:80ee8f3b695e | 356 | * @brief Enable DMA channel. |
EricLew | 0:80ee8f3b695e | 357 | * @rmtoll CCR EN LL_DMA_EnableChannel |
EricLew | 0:80ee8f3b695e | 358 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 359 | * @param Channel This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 360 | * @arg @ref LL_DMA_CHANNEL_1 |
EricLew | 0:80ee8f3b695e | 361 | * @arg @ref LL_DMA_CHANNEL_2 |
EricLew | 0:80ee8f3b695e | 362 | * @arg @ref LL_DMA_CHANNEL_3 |
EricLew | 0:80ee8f3b695e | 363 | * @arg @ref LL_DMA_CHANNEL_4 |
EricLew | 0:80ee8f3b695e | 364 | * @arg @ref LL_DMA_CHANNEL_5 |
EricLew | 0:80ee8f3b695e | 365 | * @arg @ref LL_DMA_CHANNEL_6 |
EricLew | 0:80ee8f3b695e | 366 | * @arg @ref LL_DMA_CHANNEL_7 |
EricLew | 0:80ee8f3b695e | 367 | * @retval None |
EricLew | 0:80ee8f3b695e | 368 | */ |
EricLew | 0:80ee8f3b695e | 369 | __STATIC_INLINE void LL_DMA_EnableChannel(DMA_TypeDef *DMAx, uint32_t Channel) |
EricLew | 0:80ee8f3b695e | 370 | { |
EricLew | 0:80ee8f3b695e | 371 | SET_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1])))->CCR, DMA_CCR_EN); |
EricLew | 0:80ee8f3b695e | 372 | } |
EricLew | 0:80ee8f3b695e | 373 | |
EricLew | 0:80ee8f3b695e | 374 | /** |
EricLew | 0:80ee8f3b695e | 375 | * @brief Disable DMA channel. |
EricLew | 0:80ee8f3b695e | 376 | * @rmtoll CCR EN LL_DMA_DisableChannel |
EricLew | 0:80ee8f3b695e | 377 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 378 | * @param Channel This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 379 | * @arg @ref LL_DMA_CHANNEL_1 |
EricLew | 0:80ee8f3b695e | 380 | * @arg @ref LL_DMA_CHANNEL_2 |
EricLew | 0:80ee8f3b695e | 381 | * @arg @ref LL_DMA_CHANNEL_3 |
EricLew | 0:80ee8f3b695e | 382 | * @arg @ref LL_DMA_CHANNEL_4 |
EricLew | 0:80ee8f3b695e | 383 | * @arg @ref LL_DMA_CHANNEL_5 |
EricLew | 0:80ee8f3b695e | 384 | * @arg @ref LL_DMA_CHANNEL_6 |
EricLew | 0:80ee8f3b695e | 385 | * @arg @ref LL_DMA_CHANNEL_7 |
EricLew | 0:80ee8f3b695e | 386 | * @retval None |
EricLew | 0:80ee8f3b695e | 387 | */ |
EricLew | 0:80ee8f3b695e | 388 | __STATIC_INLINE void LL_DMA_DisableChannel(DMA_TypeDef *DMAx, uint32_t Channel) |
EricLew | 0:80ee8f3b695e | 389 | { |
EricLew | 0:80ee8f3b695e | 390 | CLEAR_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1])))->CCR, DMA_CCR_EN); |
EricLew | 0:80ee8f3b695e | 391 | } |
EricLew | 0:80ee8f3b695e | 392 | |
EricLew | 0:80ee8f3b695e | 393 | /** |
EricLew | 0:80ee8f3b695e | 394 | * @brief Check if DMA channel is enabled or disabled. |
EricLew | 0:80ee8f3b695e | 395 | * @rmtoll CCR EN LL_DMA_IsEnabledChannel |
EricLew | 0:80ee8f3b695e | 396 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 397 | * @param Channel This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 398 | * @arg @ref LL_DMA_CHANNEL_1 |
EricLew | 0:80ee8f3b695e | 399 | * @arg @ref LL_DMA_CHANNEL_2 |
EricLew | 0:80ee8f3b695e | 400 | * @arg @ref LL_DMA_CHANNEL_3 |
EricLew | 0:80ee8f3b695e | 401 | * @arg @ref LL_DMA_CHANNEL_4 |
EricLew | 0:80ee8f3b695e | 402 | * @arg @ref LL_DMA_CHANNEL_5 |
EricLew | 0:80ee8f3b695e | 403 | * @arg @ref LL_DMA_CHANNEL_6 |
EricLew | 0:80ee8f3b695e | 404 | * @arg @ref LL_DMA_CHANNEL_7 |
EricLew | 0:80ee8f3b695e | 405 | * @retval State of bit (1 or 0). |
EricLew | 0:80ee8f3b695e | 406 | */ |
EricLew | 0:80ee8f3b695e | 407 | __STATIC_INLINE uint32_t LL_DMA_IsEnabledChannel(DMA_TypeDef *DMAx, uint32_t Channel) |
EricLew | 0:80ee8f3b695e | 408 | { |
EricLew | 0:80ee8f3b695e | 409 | return (READ_BIT(((DMA_Channel_TypeDef*)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel-1])))->CCR, DMA_CCR_EN) == (DMA_CCR_EN)); |
EricLew | 0:80ee8f3b695e | 410 | } |
EricLew | 0:80ee8f3b695e | 411 | |
EricLew | 0:80ee8f3b695e | 412 | /** |
EricLew | 0:80ee8f3b695e | 413 | * @brief Configure all parameters link to DMA transfer. |
EricLew | 0:80ee8f3b695e | 414 | * @rmtoll CCR DIR LL_DMA_ConfigTransfer\n |
EricLew | 0:80ee8f3b695e | 415 | * CCR MEM2MEM LL_DMA_ConfigTransfer\n |
EricLew | 0:80ee8f3b695e | 416 | * CCR CIRC LL_DMA_ConfigTransfer\n |
EricLew | 0:80ee8f3b695e | 417 | * CCR PINC LL_DMA_ConfigTransfer\n |
EricLew | 0:80ee8f3b695e | 418 | * CCR MINC LL_DMA_ConfigTransfer\n |
EricLew | 0:80ee8f3b695e | 419 | * CCR PSIZE LL_DMA_ConfigTransfer\n |
EricLew | 0:80ee8f3b695e | 420 | * CCR MSIZE LL_DMA_ConfigTransfer\n |
EricLew | 0:80ee8f3b695e | 421 | * CCR PL LL_DMA_ConfigTransfer |
EricLew | 0:80ee8f3b695e | 422 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 423 | * @param Channel This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 424 | * @arg @ref LL_DMA_CHANNEL_1 |
EricLew | 0:80ee8f3b695e | 425 | * @arg @ref LL_DMA_CHANNEL_2 |
EricLew | 0:80ee8f3b695e | 426 | * @arg @ref LL_DMA_CHANNEL_3 |
EricLew | 0:80ee8f3b695e | 427 | * @arg @ref LL_DMA_CHANNEL_4 |
EricLew | 0:80ee8f3b695e | 428 | * @arg @ref LL_DMA_CHANNEL_5 |
EricLew | 0:80ee8f3b695e | 429 | * @arg @ref LL_DMA_CHANNEL_6 |
EricLew | 0:80ee8f3b695e | 430 | * @arg @ref LL_DMA_CHANNEL_7 |
EricLew | 0:80ee8f3b695e | 431 | * @param Configuration This parameter must be a combination of all the following values: |
EricLew | 0:80ee8f3b695e | 432 | * @arg @ref LL_DMA_DIRECTION_PERIPH_TO_MEMORY or @ref LL_DMA_DIRECTION_MEMORY_TO_PERIPH or @ref LL_DMA_DIRECTION_MEMORY_TO_MEMORY |
EricLew | 0:80ee8f3b695e | 433 | * @arg @ref LL_DMA_MODE_NORMAL or @ref LL_DMA_MODE_CIRCULAR |
EricLew | 0:80ee8f3b695e | 434 | * @arg @ref LL_DMA_PERIPH_INCREMENT or @ref LL_DMA_PERIPH_NOINCREMENT |
EricLew | 0:80ee8f3b695e | 435 | * @arg @ref LL_DMA_MEMORY_INCREMENT or @ref LL_DMA_MEMORY_NOINCREMENT |
EricLew | 0:80ee8f3b695e | 436 | * @arg @ref LL_DMA_PDATAALIGN_BYTE or @ref LL_DMA_PDATAALIGN_HALFWORD or @ref LL_DMA_PDATAALIGN_WORD |
EricLew | 0:80ee8f3b695e | 437 | * @arg @ref LL_DMA_MDATAALIGN_BYTE or @ref LL_DMA_MDATAALIGN_HALFWORD or @ref LL_DMA_MDATAALIGN_WORD |
EricLew | 0:80ee8f3b695e | 438 | * @arg @ref LL_DMA_PRIORITY_LOW or @ref LL_DMA_PRIORITY_MEDIUM or @ref LL_DMA_PRIORITY_HIGH or @ref LL_DMA_PRIORITY_VERYHIGH |
EricLew | 0:80ee8f3b695e | 439 | * @retval None |
EricLew | 0:80ee8f3b695e | 440 | */ |
EricLew | 0:80ee8f3b695e | 441 | __STATIC_INLINE void LL_DMA_ConfigTransfer(DMA_TypeDef* DMAx, uint32_t Channel, uint32_t Configuration) |
EricLew | 0:80ee8f3b695e | 442 | { |
EricLew | 0:80ee8f3b695e | 443 | MODIFY_REG(((DMA_Channel_TypeDef*)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel-1])))->CCR, DMA_CCR_DIR | DMA_CCR_MEM2MEM | DMA_CCR_CIRC | DMA_CCR_PINC | DMA_CCR_MINC | DMA_CCR_PSIZE | DMA_CCR_MSIZE | DMA_CCR_PL, Configuration); |
EricLew | 0:80ee8f3b695e | 444 | } |
EricLew | 0:80ee8f3b695e | 445 | |
EricLew | 0:80ee8f3b695e | 446 | /** |
EricLew | 0:80ee8f3b695e | 447 | * @brief Set Data transfer direction (read from peripheral or from memory). |
EricLew | 0:80ee8f3b695e | 448 | * @rmtoll CCR DIR LL_DMA_SetDataTransferDirection\n |
EricLew | 0:80ee8f3b695e | 449 | * CCR MEM2MEM LL_DMA_SetDataTransferDirection |
EricLew | 0:80ee8f3b695e | 450 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 451 | * @param Channel This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 452 | * @arg @ref LL_DMA_CHANNEL_1 |
EricLew | 0:80ee8f3b695e | 453 | * @arg @ref LL_DMA_CHANNEL_2 |
EricLew | 0:80ee8f3b695e | 454 | * @arg @ref LL_DMA_CHANNEL_3 |
EricLew | 0:80ee8f3b695e | 455 | * @arg @ref LL_DMA_CHANNEL_4 |
EricLew | 0:80ee8f3b695e | 456 | * @arg @ref LL_DMA_CHANNEL_5 |
EricLew | 0:80ee8f3b695e | 457 | * @arg @ref LL_DMA_CHANNEL_6 |
EricLew | 0:80ee8f3b695e | 458 | * @arg @ref LL_DMA_CHANNEL_7 |
EricLew | 0:80ee8f3b695e | 459 | * @param Direction This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 460 | * @arg @ref LL_DMA_DIRECTION_PERIPH_TO_MEMORY |
EricLew | 0:80ee8f3b695e | 461 | * @arg @ref LL_DMA_DIRECTION_MEMORY_TO_PERIPH |
EricLew | 0:80ee8f3b695e | 462 | * @arg @ref LL_DMA_DIRECTION_MEMORY_TO_MEMORY |
EricLew | 0:80ee8f3b695e | 463 | * @retval None |
EricLew | 0:80ee8f3b695e | 464 | */ |
EricLew | 0:80ee8f3b695e | 465 | __STATIC_INLINE void LL_DMA_SetDataTransferDirection(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Direction) |
EricLew | 0:80ee8f3b695e | 466 | { |
EricLew | 0:80ee8f3b695e | 467 | MODIFY_REG(((DMA_Channel_TypeDef*)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel-1])))->CCR, DMA_CCR_DIR | DMA_CCR_MEM2MEM, Direction); |
EricLew | 0:80ee8f3b695e | 468 | } |
EricLew | 0:80ee8f3b695e | 469 | |
EricLew | 0:80ee8f3b695e | 470 | /** |
EricLew | 0:80ee8f3b695e | 471 | * @brief Get Data transfer direction (read from peripheral or from memory). |
EricLew | 0:80ee8f3b695e | 472 | * @rmtoll CCR DIR LL_DMA_GetDataTransferDirection\n |
EricLew | 0:80ee8f3b695e | 473 | * CCR MEM2MEM LL_DMA_GetDataTransferDirection |
EricLew | 0:80ee8f3b695e | 474 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 475 | * @param Channel This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 476 | * @arg @ref LL_DMA_CHANNEL_1 |
EricLew | 0:80ee8f3b695e | 477 | * @arg @ref LL_DMA_CHANNEL_2 |
EricLew | 0:80ee8f3b695e | 478 | * @arg @ref LL_DMA_CHANNEL_3 |
EricLew | 0:80ee8f3b695e | 479 | * @arg @ref LL_DMA_CHANNEL_4 |
EricLew | 0:80ee8f3b695e | 480 | * @arg @ref LL_DMA_CHANNEL_5 |
EricLew | 0:80ee8f3b695e | 481 | * @arg @ref LL_DMA_CHANNEL_6 |
EricLew | 0:80ee8f3b695e | 482 | * @arg @ref LL_DMA_CHANNEL_7 |
EricLew | 0:80ee8f3b695e | 483 | * @retval Returned value can be one of the following values: |
EricLew | 0:80ee8f3b695e | 484 | * @arg @ref LL_DMA_DIRECTION_PERIPH_TO_MEMORY |
EricLew | 0:80ee8f3b695e | 485 | * @arg @ref LL_DMA_DIRECTION_MEMORY_TO_PERIPH |
EricLew | 0:80ee8f3b695e | 486 | * @arg @ref LL_DMA_DIRECTION_MEMORY_TO_MEMORY |
EricLew | 0:80ee8f3b695e | 487 | */ |
EricLew | 0:80ee8f3b695e | 488 | __STATIC_INLINE uint32_t LL_DMA_GetDataTransferDirection(DMA_TypeDef *DMAx, uint32_t Channel) |
EricLew | 0:80ee8f3b695e | 489 | { |
EricLew | 0:80ee8f3b695e | 490 | return (READ_BIT(((DMA_Channel_TypeDef*)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel-1])))->CCR, DMA_CCR_DIR | DMA_CCR_MEM2MEM)); |
EricLew | 0:80ee8f3b695e | 491 | } |
EricLew | 0:80ee8f3b695e | 492 | |
EricLew | 0:80ee8f3b695e | 493 | /** |
EricLew | 0:80ee8f3b695e | 494 | * @brief Set DMA mode circular or normal. |
EricLew | 0:80ee8f3b695e | 495 | * @note The circular buffer mode cannot be used if the memory-to-memory |
EricLew | 0:80ee8f3b695e | 496 | * data transfer is configured on the selected Channel. |
EricLew | 0:80ee8f3b695e | 497 | * @rmtoll CCR CIRC LL_DMA_SetMode |
EricLew | 0:80ee8f3b695e | 498 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 499 | * @param Channel This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 500 | * @arg @ref LL_DMA_CHANNEL_1 |
EricLew | 0:80ee8f3b695e | 501 | * @arg @ref LL_DMA_CHANNEL_2 |
EricLew | 0:80ee8f3b695e | 502 | * @arg @ref LL_DMA_CHANNEL_3 |
EricLew | 0:80ee8f3b695e | 503 | * @arg @ref LL_DMA_CHANNEL_4 |
EricLew | 0:80ee8f3b695e | 504 | * @arg @ref LL_DMA_CHANNEL_5 |
EricLew | 0:80ee8f3b695e | 505 | * @arg @ref LL_DMA_CHANNEL_6 |
EricLew | 0:80ee8f3b695e | 506 | * @arg @ref LL_DMA_CHANNEL_7 |
EricLew | 0:80ee8f3b695e | 507 | * @param Mode This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 508 | * @arg @ref LL_DMA_MODE_NORMAL |
EricLew | 0:80ee8f3b695e | 509 | * @arg @ref LL_DMA_MODE_CIRCULAR |
EricLew | 0:80ee8f3b695e | 510 | * @retval None |
EricLew | 0:80ee8f3b695e | 511 | */ |
EricLew | 0:80ee8f3b695e | 512 | __STATIC_INLINE void LL_DMA_SetMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Mode) |
EricLew | 0:80ee8f3b695e | 513 | { |
EricLew | 0:80ee8f3b695e | 514 | MODIFY_REG(((DMA_Channel_TypeDef*)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel-1])))->CCR, DMA_CCR_CIRC, Mode); |
EricLew | 0:80ee8f3b695e | 515 | } |
EricLew | 0:80ee8f3b695e | 516 | |
EricLew | 0:80ee8f3b695e | 517 | /** |
EricLew | 0:80ee8f3b695e | 518 | * @brief Get DMA mode circular or normal. |
EricLew | 0:80ee8f3b695e | 519 | * @rmtoll CCR CIRC LL_DMA_GetMode |
EricLew | 0:80ee8f3b695e | 520 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 521 | * @param Channel This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 522 | * @arg @ref LL_DMA_CHANNEL_1 |
EricLew | 0:80ee8f3b695e | 523 | * @arg @ref LL_DMA_CHANNEL_2 |
EricLew | 0:80ee8f3b695e | 524 | * @arg @ref LL_DMA_CHANNEL_3 |
EricLew | 0:80ee8f3b695e | 525 | * @arg @ref LL_DMA_CHANNEL_4 |
EricLew | 0:80ee8f3b695e | 526 | * @arg @ref LL_DMA_CHANNEL_5 |
EricLew | 0:80ee8f3b695e | 527 | * @arg @ref LL_DMA_CHANNEL_6 |
EricLew | 0:80ee8f3b695e | 528 | * @arg @ref LL_DMA_CHANNEL_7 |
EricLew | 0:80ee8f3b695e | 529 | * @retval Returned value can be one of the following values: |
EricLew | 0:80ee8f3b695e | 530 | * @arg @ref LL_DMA_MODE_NORMAL |
EricLew | 0:80ee8f3b695e | 531 | * @arg @ref LL_DMA_MODE_CIRCULAR |
EricLew | 0:80ee8f3b695e | 532 | */ |
EricLew | 0:80ee8f3b695e | 533 | __STATIC_INLINE uint32_t LL_DMA_GetMode(DMA_TypeDef *DMAx, uint32_t Channel) |
EricLew | 0:80ee8f3b695e | 534 | { |
EricLew | 0:80ee8f3b695e | 535 | return (READ_BIT(((DMA_Channel_TypeDef*)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel-1])))->CCR, DMA_CCR_CIRC)); |
EricLew | 0:80ee8f3b695e | 536 | } |
EricLew | 0:80ee8f3b695e | 537 | |
EricLew | 0:80ee8f3b695e | 538 | /** |
EricLew | 0:80ee8f3b695e | 539 | * @brief Set Peripheral increment mode. |
EricLew | 0:80ee8f3b695e | 540 | * @rmtoll CCR PINC LL_DMA_SetPeriphIncMode |
EricLew | 0:80ee8f3b695e | 541 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 542 | * @param Channel This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 543 | * @arg @ref LL_DMA_CHANNEL_1 |
EricLew | 0:80ee8f3b695e | 544 | * @arg @ref LL_DMA_CHANNEL_2 |
EricLew | 0:80ee8f3b695e | 545 | * @arg @ref LL_DMA_CHANNEL_3 |
EricLew | 0:80ee8f3b695e | 546 | * @arg @ref LL_DMA_CHANNEL_4 |
EricLew | 0:80ee8f3b695e | 547 | * @arg @ref LL_DMA_CHANNEL_5 |
EricLew | 0:80ee8f3b695e | 548 | * @arg @ref LL_DMA_CHANNEL_6 |
EricLew | 0:80ee8f3b695e | 549 | * @arg @ref LL_DMA_CHANNEL_7 |
EricLew | 0:80ee8f3b695e | 550 | * @param IncrementMode This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 551 | * @arg @ref LL_DMA_PERIPH_INCREMENT |
EricLew | 0:80ee8f3b695e | 552 | * @arg @ref LL_DMA_PERIPH_NOINCREMENT |
EricLew | 0:80ee8f3b695e | 553 | * @retval None |
EricLew | 0:80ee8f3b695e | 554 | */ |
EricLew | 0:80ee8f3b695e | 555 | __STATIC_INLINE void LL_DMA_SetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t IncrementMode) |
EricLew | 0:80ee8f3b695e | 556 | { |
EricLew | 0:80ee8f3b695e | 557 | MODIFY_REG(((DMA_Channel_TypeDef*)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel-1])))->CCR, DMA_CCR_PINC, IncrementMode); |
EricLew | 0:80ee8f3b695e | 558 | } |
EricLew | 0:80ee8f3b695e | 559 | |
EricLew | 0:80ee8f3b695e | 560 | /** |
EricLew | 0:80ee8f3b695e | 561 | * @brief Get Peripheral increment mode. |
EricLew | 0:80ee8f3b695e | 562 | * @rmtoll CCR PINC LL_DMA_GetPeriphIncMode |
EricLew | 0:80ee8f3b695e | 563 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 564 | * @param Channel This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 565 | * @arg @ref LL_DMA_CHANNEL_1 |
EricLew | 0:80ee8f3b695e | 566 | * @arg @ref LL_DMA_CHANNEL_2 |
EricLew | 0:80ee8f3b695e | 567 | * @arg @ref LL_DMA_CHANNEL_3 |
EricLew | 0:80ee8f3b695e | 568 | * @arg @ref LL_DMA_CHANNEL_4 |
EricLew | 0:80ee8f3b695e | 569 | * @arg @ref LL_DMA_CHANNEL_5 |
EricLew | 0:80ee8f3b695e | 570 | * @arg @ref LL_DMA_CHANNEL_6 |
EricLew | 0:80ee8f3b695e | 571 | * @arg @ref LL_DMA_CHANNEL_7 |
EricLew | 0:80ee8f3b695e | 572 | * @retval Returned value can be one of the following values: |
EricLew | 0:80ee8f3b695e | 573 | * @arg @ref LL_DMA_PERIPH_INCREMENT |
EricLew | 0:80ee8f3b695e | 574 | * @arg @ref LL_DMA_PERIPH_NOINCREMENT |
EricLew | 0:80ee8f3b695e | 575 | */ |
EricLew | 0:80ee8f3b695e | 576 | __STATIC_INLINE uint32_t LL_DMA_GetPeriphIncMode(DMA_TypeDef *DMAx, uint32_t Channel) |
EricLew | 0:80ee8f3b695e | 577 | { |
EricLew | 0:80ee8f3b695e | 578 | return (READ_BIT(((DMA_Channel_TypeDef*)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel-1])))->CCR, DMA_CCR_PINC)); |
EricLew | 0:80ee8f3b695e | 579 | } |
EricLew | 0:80ee8f3b695e | 580 | |
EricLew | 0:80ee8f3b695e | 581 | /** |
EricLew | 0:80ee8f3b695e | 582 | * @brief Set Memory increment mode. |
EricLew | 0:80ee8f3b695e | 583 | * @rmtoll CCR MINC LL_DMA_SetMemoryIncMode |
EricLew | 0:80ee8f3b695e | 584 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 585 | * @param Channel This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 586 | * @arg @ref LL_DMA_CHANNEL_1 |
EricLew | 0:80ee8f3b695e | 587 | * @arg @ref LL_DMA_CHANNEL_2 |
EricLew | 0:80ee8f3b695e | 588 | * @arg @ref LL_DMA_CHANNEL_3 |
EricLew | 0:80ee8f3b695e | 589 | * @arg @ref LL_DMA_CHANNEL_4 |
EricLew | 0:80ee8f3b695e | 590 | * @arg @ref LL_DMA_CHANNEL_5 |
EricLew | 0:80ee8f3b695e | 591 | * @arg @ref LL_DMA_CHANNEL_6 |
EricLew | 0:80ee8f3b695e | 592 | * @arg @ref LL_DMA_CHANNEL_7 |
EricLew | 0:80ee8f3b695e | 593 | * @param IncrementMode This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 594 | * @arg @ref LL_DMA_MEMORY_INCREMENT |
EricLew | 0:80ee8f3b695e | 595 | * @arg @ref LL_DMA_MEMORY_NOINCREMENT |
EricLew | 0:80ee8f3b695e | 596 | * @retval None |
EricLew | 0:80ee8f3b695e | 597 | */ |
EricLew | 0:80ee8f3b695e | 598 | __STATIC_INLINE void LL_DMA_SetMemoryIncMode(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t IncrementMode) |
EricLew | 0:80ee8f3b695e | 599 | { |
EricLew | 0:80ee8f3b695e | 600 | MODIFY_REG(((DMA_Channel_TypeDef*)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel-1])))->CCR, DMA_CCR_MINC, IncrementMode); |
EricLew | 0:80ee8f3b695e | 601 | } |
EricLew | 0:80ee8f3b695e | 602 | |
EricLew | 0:80ee8f3b695e | 603 | /** |
EricLew | 0:80ee8f3b695e | 604 | * @brief Get Memory increment mode. |
EricLew | 0:80ee8f3b695e | 605 | * @rmtoll CCR MINC LL_DMA_GetMemoryIncMode |
EricLew | 0:80ee8f3b695e | 606 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 607 | * @param Channel This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 608 | * @arg @ref LL_DMA_CHANNEL_1 |
EricLew | 0:80ee8f3b695e | 609 | * @arg @ref LL_DMA_CHANNEL_2 |
EricLew | 0:80ee8f3b695e | 610 | * @arg @ref LL_DMA_CHANNEL_3 |
EricLew | 0:80ee8f3b695e | 611 | * @arg @ref LL_DMA_CHANNEL_4 |
EricLew | 0:80ee8f3b695e | 612 | * @arg @ref LL_DMA_CHANNEL_5 |
EricLew | 0:80ee8f3b695e | 613 | * @arg @ref LL_DMA_CHANNEL_6 |
EricLew | 0:80ee8f3b695e | 614 | * @arg @ref LL_DMA_CHANNEL_7 |
EricLew | 0:80ee8f3b695e | 615 | * @retval Returned value can be one of the following values: |
EricLew | 0:80ee8f3b695e | 616 | * @arg @ref LL_DMA_MEMORY_INCREMENT |
EricLew | 0:80ee8f3b695e | 617 | * @arg @ref LL_DMA_MEMORY_NOINCREMENT |
EricLew | 0:80ee8f3b695e | 618 | */ |
EricLew | 0:80ee8f3b695e | 619 | __STATIC_INLINE uint32_t LL_DMA_GetMemoryIncMode(DMA_TypeDef *DMAx, uint32_t Channel) |
EricLew | 0:80ee8f3b695e | 620 | { |
EricLew | 0:80ee8f3b695e | 621 | return (READ_BIT(((DMA_Channel_TypeDef*)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel-1])))->CCR, DMA_CCR_MINC)); |
EricLew | 0:80ee8f3b695e | 622 | } |
EricLew | 0:80ee8f3b695e | 623 | |
EricLew | 0:80ee8f3b695e | 624 | /** |
EricLew | 0:80ee8f3b695e | 625 | * @brief Set Peripheral size. |
EricLew | 0:80ee8f3b695e | 626 | * @rmtoll CCR PSIZE LL_DMA_SetPeriphSize |
EricLew | 0:80ee8f3b695e | 627 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 628 | * @param Channel This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 629 | * @arg @ref LL_DMA_CHANNEL_1 |
EricLew | 0:80ee8f3b695e | 630 | * @arg @ref LL_DMA_CHANNEL_2 |
EricLew | 0:80ee8f3b695e | 631 | * @arg @ref LL_DMA_CHANNEL_3 |
EricLew | 0:80ee8f3b695e | 632 | * @arg @ref LL_DMA_CHANNEL_4 |
EricLew | 0:80ee8f3b695e | 633 | * @arg @ref LL_DMA_CHANNEL_5 |
EricLew | 0:80ee8f3b695e | 634 | * @arg @ref LL_DMA_CHANNEL_6 |
EricLew | 0:80ee8f3b695e | 635 | * @arg @ref LL_DMA_CHANNEL_7 |
EricLew | 0:80ee8f3b695e | 636 | * @param Size This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 637 | * @arg @ref LL_DMA_PDATAALIGN_BYTE |
EricLew | 0:80ee8f3b695e | 638 | * @arg @ref LL_DMA_PDATAALIGN_HALFWORD |
EricLew | 0:80ee8f3b695e | 639 | * @arg @ref LL_DMA_PDATAALIGN_WORD |
EricLew | 0:80ee8f3b695e | 640 | * @retval None |
EricLew | 0:80ee8f3b695e | 641 | */ |
EricLew | 0:80ee8f3b695e | 642 | __STATIC_INLINE void LL_DMA_SetPeriphSize(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Size) |
EricLew | 0:80ee8f3b695e | 643 | { |
EricLew | 0:80ee8f3b695e | 644 | MODIFY_REG(((DMA_Channel_TypeDef*)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel-1])))->CCR, DMA_CCR_PSIZE, Size); |
EricLew | 0:80ee8f3b695e | 645 | } |
EricLew | 0:80ee8f3b695e | 646 | |
EricLew | 0:80ee8f3b695e | 647 | /** |
EricLew | 0:80ee8f3b695e | 648 | * @brief Get Peripheral size. |
EricLew | 0:80ee8f3b695e | 649 | * @rmtoll CCR PSIZE LL_DMA_GetPeriphSize |
EricLew | 0:80ee8f3b695e | 650 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 651 | * @param Channel This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 652 | * @arg @ref LL_DMA_CHANNEL_1 |
EricLew | 0:80ee8f3b695e | 653 | * @arg @ref LL_DMA_CHANNEL_2 |
EricLew | 0:80ee8f3b695e | 654 | * @arg @ref LL_DMA_CHANNEL_3 |
EricLew | 0:80ee8f3b695e | 655 | * @arg @ref LL_DMA_CHANNEL_4 |
EricLew | 0:80ee8f3b695e | 656 | * @arg @ref LL_DMA_CHANNEL_5 |
EricLew | 0:80ee8f3b695e | 657 | * @arg @ref LL_DMA_CHANNEL_6 |
EricLew | 0:80ee8f3b695e | 658 | * @arg @ref LL_DMA_CHANNEL_7 |
EricLew | 0:80ee8f3b695e | 659 | * @retval Returned value can be one of the following values: |
EricLew | 0:80ee8f3b695e | 660 | * @arg @ref LL_DMA_PDATAALIGN_BYTE |
EricLew | 0:80ee8f3b695e | 661 | * @arg @ref LL_DMA_PDATAALIGN_HALFWORD |
EricLew | 0:80ee8f3b695e | 662 | * @arg @ref LL_DMA_PDATAALIGN_WORD |
EricLew | 0:80ee8f3b695e | 663 | */ |
EricLew | 0:80ee8f3b695e | 664 | __STATIC_INLINE uint32_t LL_DMA_GetPeriphSize(DMA_TypeDef *DMAx, uint32_t Channel) |
EricLew | 0:80ee8f3b695e | 665 | { |
EricLew | 0:80ee8f3b695e | 666 | return (READ_BIT(((DMA_Channel_TypeDef*)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel-1])))->CCR, DMA_CCR_PSIZE)); |
EricLew | 0:80ee8f3b695e | 667 | } |
EricLew | 0:80ee8f3b695e | 668 | |
EricLew | 0:80ee8f3b695e | 669 | /** |
EricLew | 0:80ee8f3b695e | 670 | * @brief Set Memory size. |
EricLew | 0:80ee8f3b695e | 671 | * @rmtoll CCR MSIZE LL_DMA_SetMemorySize |
EricLew | 0:80ee8f3b695e | 672 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 673 | * @param Channel This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 674 | * @arg @ref LL_DMA_CHANNEL_1 |
EricLew | 0:80ee8f3b695e | 675 | * @arg @ref LL_DMA_CHANNEL_2 |
EricLew | 0:80ee8f3b695e | 676 | * @arg @ref LL_DMA_CHANNEL_3 |
EricLew | 0:80ee8f3b695e | 677 | * @arg @ref LL_DMA_CHANNEL_4 |
EricLew | 0:80ee8f3b695e | 678 | * @arg @ref LL_DMA_CHANNEL_5 |
EricLew | 0:80ee8f3b695e | 679 | * @arg @ref LL_DMA_CHANNEL_6 |
EricLew | 0:80ee8f3b695e | 680 | * @arg @ref LL_DMA_CHANNEL_7 |
EricLew | 0:80ee8f3b695e | 681 | * @param Size This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 682 | * @arg @ref LL_DMA_MDATAALIGN_BYTE |
EricLew | 0:80ee8f3b695e | 683 | * @arg @ref LL_DMA_MDATAALIGN_HALFWORD |
EricLew | 0:80ee8f3b695e | 684 | * @arg @ref LL_DMA_MDATAALIGN_WORD |
EricLew | 0:80ee8f3b695e | 685 | * @retval None |
EricLew | 0:80ee8f3b695e | 686 | */ |
EricLew | 0:80ee8f3b695e | 687 | __STATIC_INLINE void LL_DMA_SetMemorySize(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Size) |
EricLew | 0:80ee8f3b695e | 688 | { |
EricLew | 0:80ee8f3b695e | 689 | MODIFY_REG(((DMA_Channel_TypeDef*)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel-1])))->CCR, DMA_CCR_MSIZE, Size); |
EricLew | 0:80ee8f3b695e | 690 | } |
EricLew | 0:80ee8f3b695e | 691 | |
EricLew | 0:80ee8f3b695e | 692 | /** |
EricLew | 0:80ee8f3b695e | 693 | * @brief Get Memory size. |
EricLew | 0:80ee8f3b695e | 694 | * @rmtoll CCR MSIZE LL_DMA_GetMemorySize |
EricLew | 0:80ee8f3b695e | 695 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 696 | * @param Channel This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 697 | * @arg @ref LL_DMA_CHANNEL_1 |
EricLew | 0:80ee8f3b695e | 698 | * @arg @ref LL_DMA_CHANNEL_2 |
EricLew | 0:80ee8f3b695e | 699 | * @arg @ref LL_DMA_CHANNEL_3 |
EricLew | 0:80ee8f3b695e | 700 | * @arg @ref LL_DMA_CHANNEL_4 |
EricLew | 0:80ee8f3b695e | 701 | * @arg @ref LL_DMA_CHANNEL_5 |
EricLew | 0:80ee8f3b695e | 702 | * @arg @ref LL_DMA_CHANNEL_6 |
EricLew | 0:80ee8f3b695e | 703 | * @arg @ref LL_DMA_CHANNEL_7 |
EricLew | 0:80ee8f3b695e | 704 | * @retval Returned value can be one of the following values: |
EricLew | 0:80ee8f3b695e | 705 | * @arg @ref LL_DMA_MDATAALIGN_BYTE |
EricLew | 0:80ee8f3b695e | 706 | * @arg @ref LL_DMA_MDATAALIGN_HALFWORD |
EricLew | 0:80ee8f3b695e | 707 | * @arg @ref LL_DMA_MDATAALIGN_WORD |
EricLew | 0:80ee8f3b695e | 708 | */ |
EricLew | 0:80ee8f3b695e | 709 | __STATIC_INLINE uint32_t LL_DMA_GetMemorySize(DMA_TypeDef *DMAx, uint32_t Channel) |
EricLew | 0:80ee8f3b695e | 710 | { |
EricLew | 0:80ee8f3b695e | 711 | return (READ_BIT(((DMA_Channel_TypeDef*)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel-1])))->CCR, DMA_CCR_MSIZE)); |
EricLew | 0:80ee8f3b695e | 712 | } |
EricLew | 0:80ee8f3b695e | 713 | |
EricLew | 0:80ee8f3b695e | 714 | /** |
EricLew | 0:80ee8f3b695e | 715 | * @brief Set Channel priority level. |
EricLew | 0:80ee8f3b695e | 716 | * @rmtoll CCR PL LL_DMA_SetChannelPriorityLevel |
EricLew | 0:80ee8f3b695e | 717 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 718 | * @param Channel This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 719 | * @arg @ref LL_DMA_CHANNEL_1 |
EricLew | 0:80ee8f3b695e | 720 | * @arg @ref LL_DMA_CHANNEL_2 |
EricLew | 0:80ee8f3b695e | 721 | * @arg @ref LL_DMA_CHANNEL_3 |
EricLew | 0:80ee8f3b695e | 722 | * @arg @ref LL_DMA_CHANNEL_4 |
EricLew | 0:80ee8f3b695e | 723 | * @arg @ref LL_DMA_CHANNEL_5 |
EricLew | 0:80ee8f3b695e | 724 | * @arg @ref LL_DMA_CHANNEL_6 |
EricLew | 0:80ee8f3b695e | 725 | * @arg @ref LL_DMA_CHANNEL_7 |
EricLew | 0:80ee8f3b695e | 726 | * @param Priority This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 727 | * @arg @ref LL_DMA_PRIORITY_LOW |
EricLew | 0:80ee8f3b695e | 728 | * @arg @ref LL_DMA_PRIORITY_MEDIUM |
EricLew | 0:80ee8f3b695e | 729 | * @arg @ref LL_DMA_PRIORITY_HIGH |
EricLew | 0:80ee8f3b695e | 730 | * @arg @ref LL_DMA_PRIORITY_VERYHIGH |
EricLew | 0:80ee8f3b695e | 731 | * @retval None |
EricLew | 0:80ee8f3b695e | 732 | */ |
EricLew | 0:80ee8f3b695e | 733 | __STATIC_INLINE void LL_DMA_SetChannelPriorityLevel(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Priority) |
EricLew | 0:80ee8f3b695e | 734 | { |
EricLew | 0:80ee8f3b695e | 735 | MODIFY_REG(((DMA_Channel_TypeDef*)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel-1])))->CCR, DMA_CCR_PL, Priority); |
EricLew | 0:80ee8f3b695e | 736 | } |
EricLew | 0:80ee8f3b695e | 737 | |
EricLew | 0:80ee8f3b695e | 738 | /** |
EricLew | 0:80ee8f3b695e | 739 | * @brief Get Channel priority level. |
EricLew | 0:80ee8f3b695e | 740 | * @rmtoll CCR PL LL_DMA_GetChannelPriorityLevel |
EricLew | 0:80ee8f3b695e | 741 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 742 | * @param Channel This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 743 | * @arg @ref LL_DMA_CHANNEL_1 |
EricLew | 0:80ee8f3b695e | 744 | * @arg @ref LL_DMA_CHANNEL_2 |
EricLew | 0:80ee8f3b695e | 745 | * @arg @ref LL_DMA_CHANNEL_3 |
EricLew | 0:80ee8f3b695e | 746 | * @arg @ref LL_DMA_CHANNEL_4 |
EricLew | 0:80ee8f3b695e | 747 | * @arg @ref LL_DMA_CHANNEL_5 |
EricLew | 0:80ee8f3b695e | 748 | * @arg @ref LL_DMA_CHANNEL_6 |
EricLew | 0:80ee8f3b695e | 749 | * @arg @ref LL_DMA_CHANNEL_7 |
EricLew | 0:80ee8f3b695e | 750 | * @retval Returned value can be one of the following values: |
EricLew | 0:80ee8f3b695e | 751 | * @arg @ref LL_DMA_PRIORITY_LOW |
EricLew | 0:80ee8f3b695e | 752 | * @arg @ref LL_DMA_PRIORITY_MEDIUM |
EricLew | 0:80ee8f3b695e | 753 | * @arg @ref LL_DMA_PRIORITY_HIGH |
EricLew | 0:80ee8f3b695e | 754 | * @arg @ref LL_DMA_PRIORITY_VERYHIGH |
EricLew | 0:80ee8f3b695e | 755 | */ |
EricLew | 0:80ee8f3b695e | 756 | __STATIC_INLINE uint32_t LL_DMA_GetChannelPriorityLevel(DMA_TypeDef *DMAx, uint32_t Channel) |
EricLew | 0:80ee8f3b695e | 757 | { |
EricLew | 0:80ee8f3b695e | 758 | return (READ_BIT(((DMA_Channel_TypeDef*)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel-1])))->CCR, DMA_CCR_PL)); |
EricLew | 0:80ee8f3b695e | 759 | } |
EricLew | 0:80ee8f3b695e | 760 | |
EricLew | 0:80ee8f3b695e | 761 | /** |
EricLew | 0:80ee8f3b695e | 762 | * @brief Set Number of data to transfer. |
EricLew | 0:80ee8f3b695e | 763 | * @note This action has no effect if |
EricLew | 0:80ee8f3b695e | 764 | * channel is enabled. |
EricLew | 0:80ee8f3b695e | 765 | * @rmtoll CNDTR NDT LL_DMA_SetDataLength |
EricLew | 0:80ee8f3b695e | 766 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 767 | * @param Channel This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 768 | * @arg @ref LL_DMA_CHANNEL_1 |
EricLew | 0:80ee8f3b695e | 769 | * @arg @ref LL_DMA_CHANNEL_2 |
EricLew | 0:80ee8f3b695e | 770 | * @arg @ref LL_DMA_CHANNEL_3 |
EricLew | 0:80ee8f3b695e | 771 | * @arg @ref LL_DMA_CHANNEL_4 |
EricLew | 0:80ee8f3b695e | 772 | * @arg @ref LL_DMA_CHANNEL_5 |
EricLew | 0:80ee8f3b695e | 773 | * @arg @ref LL_DMA_CHANNEL_6 |
EricLew | 0:80ee8f3b695e | 774 | * @arg @ref LL_DMA_CHANNEL_7 |
EricLew | 0:80ee8f3b695e | 775 | * @param NbData Between 0 to 0xFFFFFFFF |
EricLew | 0:80ee8f3b695e | 776 | * @retval None |
EricLew | 0:80ee8f3b695e | 777 | */ |
EricLew | 0:80ee8f3b695e | 778 | __STATIC_INLINE void LL_DMA_SetDataLength(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t NbData) |
EricLew | 0:80ee8f3b695e | 779 | { |
EricLew | 0:80ee8f3b695e | 780 | MODIFY_REG(((DMA_Channel_TypeDef*)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel-1])))->CNDTR, DMA_CNDTR_NDT, NbData); |
EricLew | 0:80ee8f3b695e | 781 | } |
EricLew | 0:80ee8f3b695e | 782 | |
EricLew | 0:80ee8f3b695e | 783 | /** |
EricLew | 0:80ee8f3b695e | 784 | * @brief Get Number of data to transfer. |
EricLew | 0:80ee8f3b695e | 785 | * @note Once the channel is enabled, the return value indicate the |
EricLew | 0:80ee8f3b695e | 786 | * remaining bytes to be transmitted. |
EricLew | 0:80ee8f3b695e | 787 | * @rmtoll CNDTR NDT LL_DMA_GetDataLength |
EricLew | 0:80ee8f3b695e | 788 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 789 | * @param Channel This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 790 | * @arg @ref LL_DMA_CHANNEL_1 |
EricLew | 0:80ee8f3b695e | 791 | * @arg @ref LL_DMA_CHANNEL_2 |
EricLew | 0:80ee8f3b695e | 792 | * @arg @ref LL_DMA_CHANNEL_3 |
EricLew | 0:80ee8f3b695e | 793 | * @arg @ref LL_DMA_CHANNEL_4 |
EricLew | 0:80ee8f3b695e | 794 | * @arg @ref LL_DMA_CHANNEL_5 |
EricLew | 0:80ee8f3b695e | 795 | * @arg @ref LL_DMA_CHANNEL_6 |
EricLew | 0:80ee8f3b695e | 796 | * @arg @ref LL_DMA_CHANNEL_7 |
EricLew | 0:80ee8f3b695e | 797 | * @retval Between 0 to 0xFFFFFFFF |
EricLew | 0:80ee8f3b695e | 798 | */ |
EricLew | 0:80ee8f3b695e | 799 | __STATIC_INLINE uint32_t LL_DMA_GetDataLength(DMA_TypeDef *DMAx, uint32_t Channel) |
EricLew | 0:80ee8f3b695e | 800 | { |
EricLew | 0:80ee8f3b695e | 801 | return (READ_BIT(((DMA_Channel_TypeDef*)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel-1])))->CNDTR, DMA_CNDTR_NDT)); |
EricLew | 0:80ee8f3b695e | 802 | } |
EricLew | 0:80ee8f3b695e | 803 | |
EricLew | 0:80ee8f3b695e | 804 | /** |
EricLew | 0:80ee8f3b695e | 805 | * @brief Configure the Source and Destination addresses. |
EricLew | 0:80ee8f3b695e | 806 | * @note Each IP using DMA provides an API to get directly the register adress (LL_PPP_DMA_GetRegAddr) |
EricLew | 0:80ee8f3b695e | 807 | * @rmtoll CPAR PA LL_DMA_ConfigAddresses\n |
EricLew | 0:80ee8f3b695e | 808 | * CMAR MA LL_DMA_ConfigAddresses |
EricLew | 0:80ee8f3b695e | 809 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 810 | * @param Channel This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 811 | * @arg @ref LL_DMA_CHANNEL_1 |
EricLew | 0:80ee8f3b695e | 812 | * @arg @ref LL_DMA_CHANNEL_2 |
EricLew | 0:80ee8f3b695e | 813 | * @arg @ref LL_DMA_CHANNEL_3 |
EricLew | 0:80ee8f3b695e | 814 | * @arg @ref LL_DMA_CHANNEL_4 |
EricLew | 0:80ee8f3b695e | 815 | * @arg @ref LL_DMA_CHANNEL_5 |
EricLew | 0:80ee8f3b695e | 816 | * @arg @ref LL_DMA_CHANNEL_6 |
EricLew | 0:80ee8f3b695e | 817 | * @arg @ref LL_DMA_CHANNEL_7 |
EricLew | 0:80ee8f3b695e | 818 | * @param SrcAddress Between 0 to 0xFFFFFFFF |
EricLew | 0:80ee8f3b695e | 819 | * @param DstAddress Between 0 to 0xFFFFFFFF |
EricLew | 0:80ee8f3b695e | 820 | * @param Direction This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 821 | * @arg @ref LL_DMA_DIRECTION_PERIPH_TO_MEMORY |
EricLew | 0:80ee8f3b695e | 822 | * @arg @ref LL_DMA_DIRECTION_MEMORY_TO_PERIPH |
EricLew | 0:80ee8f3b695e | 823 | * @arg @ref LL_DMA_DIRECTION_MEMORY_TO_MEMORY |
EricLew | 0:80ee8f3b695e | 824 | * @retval None |
EricLew | 0:80ee8f3b695e | 825 | */ |
EricLew | 0:80ee8f3b695e | 826 | __STATIC_INLINE void LL_DMA_ConfigAddresses(DMA_TypeDef* DMAx, uint32_t Channel, uint32_t SrcAddress, uint32_t DstAddress, uint32_t Direction) |
EricLew | 0:80ee8f3b695e | 827 | { |
EricLew | 0:80ee8f3b695e | 828 | /* Direction Memory to Periph */ |
EricLew | 0:80ee8f3b695e | 829 | if (Direction == LL_DMA_DIRECTION_MEMORY_TO_PERIPH) |
EricLew | 0:80ee8f3b695e | 830 | { |
EricLew | 0:80ee8f3b695e | 831 | MODIFY_REG(((DMA_Channel_TypeDef*)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel-1])))->CMAR, DMA_CMAR_MA, SrcAddress); |
EricLew | 0:80ee8f3b695e | 832 | MODIFY_REG(((DMA_Channel_TypeDef*)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel-1])))->CPAR, DMA_CPAR_PA, DstAddress); |
EricLew | 0:80ee8f3b695e | 833 | } |
EricLew | 0:80ee8f3b695e | 834 | /* Direction Periph to Memory and Memory to Memory */ |
EricLew | 0:80ee8f3b695e | 835 | else |
EricLew | 0:80ee8f3b695e | 836 | { |
EricLew | 0:80ee8f3b695e | 837 | MODIFY_REG(((DMA_Channel_TypeDef*)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel-1])))->CPAR, DMA_CPAR_PA, SrcAddress); |
EricLew | 0:80ee8f3b695e | 838 | MODIFY_REG(((DMA_Channel_TypeDef*)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel-1])))->CMAR, DMA_CMAR_MA, DstAddress); |
EricLew | 0:80ee8f3b695e | 839 | } |
EricLew | 0:80ee8f3b695e | 840 | } |
EricLew | 0:80ee8f3b695e | 841 | |
EricLew | 0:80ee8f3b695e | 842 | /** |
EricLew | 0:80ee8f3b695e | 843 | * @brief Set the Memory address. |
EricLew | 0:80ee8f3b695e | 844 | * @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMORY_TO_PERIPH only. |
EricLew | 0:80ee8f3b695e | 845 | * @rmtoll CMAR MA LL_DMA_SetMemoryAddress |
EricLew | 0:80ee8f3b695e | 846 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 847 | * @param Channel This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 848 | * @arg @ref LL_DMA_CHANNEL_1 |
EricLew | 0:80ee8f3b695e | 849 | * @arg @ref LL_DMA_CHANNEL_2 |
EricLew | 0:80ee8f3b695e | 850 | * @arg @ref LL_DMA_CHANNEL_3 |
EricLew | 0:80ee8f3b695e | 851 | * @arg @ref LL_DMA_CHANNEL_4 |
EricLew | 0:80ee8f3b695e | 852 | * @arg @ref LL_DMA_CHANNEL_5 |
EricLew | 0:80ee8f3b695e | 853 | * @arg @ref LL_DMA_CHANNEL_6 |
EricLew | 0:80ee8f3b695e | 854 | * @arg @ref LL_DMA_CHANNEL_7 |
EricLew | 0:80ee8f3b695e | 855 | * @param MemoryAddress Between 0 to 0xFFFFFFFF |
EricLew | 0:80ee8f3b695e | 856 | * @retval None |
EricLew | 0:80ee8f3b695e | 857 | */ |
EricLew | 0:80ee8f3b695e | 858 | __STATIC_INLINE void LL_DMA_SetMemoryAddress(DMA_TypeDef* DMAx, uint32_t Channel, uint32_t MemoryAddress) |
EricLew | 0:80ee8f3b695e | 859 | { |
EricLew | 0:80ee8f3b695e | 860 | MODIFY_REG(((DMA_Channel_TypeDef*)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel-1])))->CMAR, DMA_CMAR_MA, MemoryAddress); |
EricLew | 0:80ee8f3b695e | 861 | } |
EricLew | 0:80ee8f3b695e | 862 | |
EricLew | 0:80ee8f3b695e | 863 | /** |
EricLew | 0:80ee8f3b695e | 864 | * @brief Set the Peripheral address. |
EricLew | 0:80ee8f3b695e | 865 | * @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMORY_TO_PERIPH only. |
EricLew | 0:80ee8f3b695e | 866 | * @rmtoll CPAR PA LL_DMA_SetPeriphAddress |
EricLew | 0:80ee8f3b695e | 867 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 868 | * @param Channel This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 869 | * @arg @ref LL_DMA_CHANNEL_1 |
EricLew | 0:80ee8f3b695e | 870 | * @arg @ref LL_DMA_CHANNEL_2 |
EricLew | 0:80ee8f3b695e | 871 | * @arg @ref LL_DMA_CHANNEL_3 |
EricLew | 0:80ee8f3b695e | 872 | * @arg @ref LL_DMA_CHANNEL_4 |
EricLew | 0:80ee8f3b695e | 873 | * @arg @ref LL_DMA_CHANNEL_5 |
EricLew | 0:80ee8f3b695e | 874 | * @arg @ref LL_DMA_CHANNEL_6 |
EricLew | 0:80ee8f3b695e | 875 | * @arg @ref LL_DMA_CHANNEL_7 |
EricLew | 0:80ee8f3b695e | 876 | * @param PeriphAddress Between 0 to 0xFFFFFFFF |
EricLew | 0:80ee8f3b695e | 877 | * @retval None |
EricLew | 0:80ee8f3b695e | 878 | */ |
EricLew | 0:80ee8f3b695e | 879 | __STATIC_INLINE void LL_DMA_SetPeriphAddress(DMA_TypeDef* DMAx, uint32_t Channel, uint32_t PeriphAddress) |
EricLew | 0:80ee8f3b695e | 880 | { |
EricLew | 0:80ee8f3b695e | 881 | MODIFY_REG(((DMA_Channel_TypeDef*)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel-1])))->CPAR, DMA_CPAR_PA, PeriphAddress); |
EricLew | 0:80ee8f3b695e | 882 | } |
EricLew | 0:80ee8f3b695e | 883 | |
EricLew | 0:80ee8f3b695e | 884 | /** |
EricLew | 0:80ee8f3b695e | 885 | * @brief Get Memory address. |
EricLew | 0:80ee8f3b695e | 886 | * @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMORY_TO_PERIPH only. |
EricLew | 0:80ee8f3b695e | 887 | * @rmtoll CMAR MA LL_DMA_GetMemoryAddress |
EricLew | 0:80ee8f3b695e | 888 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 889 | * @param Channel This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 890 | * @arg @ref LL_DMA_CHANNEL_1 |
EricLew | 0:80ee8f3b695e | 891 | * @arg @ref LL_DMA_CHANNEL_2 |
EricLew | 0:80ee8f3b695e | 892 | * @arg @ref LL_DMA_CHANNEL_3 |
EricLew | 0:80ee8f3b695e | 893 | * @arg @ref LL_DMA_CHANNEL_4 |
EricLew | 0:80ee8f3b695e | 894 | * @arg @ref LL_DMA_CHANNEL_5 |
EricLew | 0:80ee8f3b695e | 895 | * @arg @ref LL_DMA_CHANNEL_6 |
EricLew | 0:80ee8f3b695e | 896 | * @arg @ref LL_DMA_CHANNEL_7 |
EricLew | 0:80ee8f3b695e | 897 | * @retval Between 0 to 0xFFFFFFFF |
EricLew | 0:80ee8f3b695e | 898 | */ |
EricLew | 0:80ee8f3b695e | 899 | __STATIC_INLINE uint32_t LL_DMA_GetMemoryAddress(DMA_TypeDef* DMAx, uint32_t Channel) |
EricLew | 0:80ee8f3b695e | 900 | { |
EricLew | 0:80ee8f3b695e | 901 | return (READ_BIT(((DMA_Channel_TypeDef*)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel-1])))->CMAR, DMA_CMAR_MA)); |
EricLew | 0:80ee8f3b695e | 902 | } |
EricLew | 0:80ee8f3b695e | 903 | |
EricLew | 0:80ee8f3b695e | 904 | /** |
EricLew | 0:80ee8f3b695e | 905 | * @brief Get Peripheral address. |
EricLew | 0:80ee8f3b695e | 906 | * @note Interface used for direction LL_DMA_DIRECTION_PERIPH_TO_MEMORY or LL_DMA_DIRECTION_MEMORY_TO_PERIPH only. |
EricLew | 0:80ee8f3b695e | 907 | * @rmtoll CPAR PA LL_DMA_GetPeriphAddress |
EricLew | 0:80ee8f3b695e | 908 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 909 | * @param Channel This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 910 | * @arg @ref LL_DMA_CHANNEL_1 |
EricLew | 0:80ee8f3b695e | 911 | * @arg @ref LL_DMA_CHANNEL_2 |
EricLew | 0:80ee8f3b695e | 912 | * @arg @ref LL_DMA_CHANNEL_3 |
EricLew | 0:80ee8f3b695e | 913 | * @arg @ref LL_DMA_CHANNEL_4 |
EricLew | 0:80ee8f3b695e | 914 | * @arg @ref LL_DMA_CHANNEL_5 |
EricLew | 0:80ee8f3b695e | 915 | * @arg @ref LL_DMA_CHANNEL_6 |
EricLew | 0:80ee8f3b695e | 916 | * @arg @ref LL_DMA_CHANNEL_7 |
EricLew | 0:80ee8f3b695e | 917 | * @retval Between 0 to 0xFFFFFFFF |
EricLew | 0:80ee8f3b695e | 918 | */ |
EricLew | 0:80ee8f3b695e | 919 | __STATIC_INLINE uint32_t LL_DMA_GetPeriphAddress(DMA_TypeDef* DMAx, uint32_t Channel) |
EricLew | 0:80ee8f3b695e | 920 | { |
EricLew | 0:80ee8f3b695e | 921 | return (READ_BIT(((DMA_Channel_TypeDef*)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel-1])))->CPAR, DMA_CPAR_PA)); |
EricLew | 0:80ee8f3b695e | 922 | } |
EricLew | 0:80ee8f3b695e | 923 | |
EricLew | 0:80ee8f3b695e | 924 | /** |
EricLew | 0:80ee8f3b695e | 925 | * @brief Set the Memory to Memory Source address. |
EricLew | 0:80ee8f3b695e | 926 | * @note Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only. |
EricLew | 0:80ee8f3b695e | 927 | * @rmtoll CPAR PA LL_DMA_SetM2MSrcAddress |
EricLew | 0:80ee8f3b695e | 928 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 929 | * @param Channel This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 930 | * @arg @ref LL_DMA_CHANNEL_1 |
EricLew | 0:80ee8f3b695e | 931 | * @arg @ref LL_DMA_CHANNEL_2 |
EricLew | 0:80ee8f3b695e | 932 | * @arg @ref LL_DMA_CHANNEL_3 |
EricLew | 0:80ee8f3b695e | 933 | * @arg @ref LL_DMA_CHANNEL_4 |
EricLew | 0:80ee8f3b695e | 934 | * @arg @ref LL_DMA_CHANNEL_5 |
EricLew | 0:80ee8f3b695e | 935 | * @arg @ref LL_DMA_CHANNEL_6 |
EricLew | 0:80ee8f3b695e | 936 | * @arg @ref LL_DMA_CHANNEL_7 |
EricLew | 0:80ee8f3b695e | 937 | * @param MemoryAddress Between 0 to 0xFFFFFFFF |
EricLew | 0:80ee8f3b695e | 938 | * @retval None |
EricLew | 0:80ee8f3b695e | 939 | */ |
EricLew | 0:80ee8f3b695e | 940 | __STATIC_INLINE void LL_DMA_SetM2MSrcAddress(DMA_TypeDef* DMAx, uint32_t Channel, uint32_t MemoryAddress) |
EricLew | 0:80ee8f3b695e | 941 | { |
EricLew | 0:80ee8f3b695e | 942 | MODIFY_REG(((DMA_Channel_TypeDef*)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel-1])))->CPAR, DMA_CPAR_PA, MemoryAddress); |
EricLew | 0:80ee8f3b695e | 943 | } |
EricLew | 0:80ee8f3b695e | 944 | |
EricLew | 0:80ee8f3b695e | 945 | /** |
EricLew | 0:80ee8f3b695e | 946 | * @brief Set the Memory to Memory Destination address. |
EricLew | 0:80ee8f3b695e | 947 | * @note Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only. |
EricLew | 0:80ee8f3b695e | 948 | * @rmtoll CMAR MA LL_DMA_SetM2MDstAddress |
EricLew | 0:80ee8f3b695e | 949 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 950 | * @param Channel This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 951 | * @arg @ref LL_DMA_CHANNEL_1 |
EricLew | 0:80ee8f3b695e | 952 | * @arg @ref LL_DMA_CHANNEL_2 |
EricLew | 0:80ee8f3b695e | 953 | * @arg @ref LL_DMA_CHANNEL_3 |
EricLew | 0:80ee8f3b695e | 954 | * @arg @ref LL_DMA_CHANNEL_4 |
EricLew | 0:80ee8f3b695e | 955 | * @arg @ref LL_DMA_CHANNEL_5 |
EricLew | 0:80ee8f3b695e | 956 | * @arg @ref LL_DMA_CHANNEL_6 |
EricLew | 0:80ee8f3b695e | 957 | * @arg @ref LL_DMA_CHANNEL_7 |
EricLew | 0:80ee8f3b695e | 958 | * @param MemoryAddress Between 0 to 0xFFFFFFFF |
EricLew | 0:80ee8f3b695e | 959 | * @retval None |
EricLew | 0:80ee8f3b695e | 960 | */ |
EricLew | 0:80ee8f3b695e | 961 | __STATIC_INLINE void LL_DMA_SetM2MDstAddress(DMA_TypeDef* DMAx, uint32_t Channel, uint32_t MemoryAddress) |
EricLew | 0:80ee8f3b695e | 962 | { |
EricLew | 0:80ee8f3b695e | 963 | MODIFY_REG(((DMA_Channel_TypeDef*)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel-1])))->CMAR, DMA_CMAR_MA, MemoryAddress); |
EricLew | 0:80ee8f3b695e | 964 | } |
EricLew | 0:80ee8f3b695e | 965 | |
EricLew | 0:80ee8f3b695e | 966 | /** |
EricLew | 0:80ee8f3b695e | 967 | * @brief Get the Memory to Memory Source address. |
EricLew | 0:80ee8f3b695e | 968 | * @note Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only. |
EricLew | 0:80ee8f3b695e | 969 | * @rmtoll CPAR PA LL_DMA_GetM2MSrcAddress |
EricLew | 0:80ee8f3b695e | 970 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 971 | * @param Channel This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 972 | * @arg @ref LL_DMA_CHANNEL_1 |
EricLew | 0:80ee8f3b695e | 973 | * @arg @ref LL_DMA_CHANNEL_2 |
EricLew | 0:80ee8f3b695e | 974 | * @arg @ref LL_DMA_CHANNEL_3 |
EricLew | 0:80ee8f3b695e | 975 | * @arg @ref LL_DMA_CHANNEL_4 |
EricLew | 0:80ee8f3b695e | 976 | * @arg @ref LL_DMA_CHANNEL_5 |
EricLew | 0:80ee8f3b695e | 977 | * @arg @ref LL_DMA_CHANNEL_6 |
EricLew | 0:80ee8f3b695e | 978 | * @arg @ref LL_DMA_CHANNEL_7 |
EricLew | 0:80ee8f3b695e | 979 | * @retval Between 0 to 0xFFFFFFFF |
EricLew | 0:80ee8f3b695e | 980 | */ |
EricLew | 0:80ee8f3b695e | 981 | __STATIC_INLINE uint32_t LL_DMA_GetM2MSrcAddress(DMA_TypeDef* DMAx, uint32_t Channel) |
EricLew | 0:80ee8f3b695e | 982 | { |
EricLew | 0:80ee8f3b695e | 983 | return (READ_BIT(((DMA_Channel_TypeDef*)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel-1])))->CPAR, DMA_CPAR_PA)); |
EricLew | 0:80ee8f3b695e | 984 | } |
EricLew | 0:80ee8f3b695e | 985 | |
EricLew | 0:80ee8f3b695e | 986 | /** |
EricLew | 0:80ee8f3b695e | 987 | * @brief Get the Memory to Memory Destination address. |
EricLew | 0:80ee8f3b695e | 988 | * @note Interface used for direction LL_DMA_DIRECTION_MEMORY_TO_MEMORY only. |
EricLew | 0:80ee8f3b695e | 989 | * @rmtoll CMAR MA LL_DMA_GetM2MDstAddress |
EricLew | 0:80ee8f3b695e | 990 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 991 | * @param Channel This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 992 | * @arg @ref LL_DMA_CHANNEL_1 |
EricLew | 0:80ee8f3b695e | 993 | * @arg @ref LL_DMA_CHANNEL_2 |
EricLew | 0:80ee8f3b695e | 994 | * @arg @ref LL_DMA_CHANNEL_3 |
EricLew | 0:80ee8f3b695e | 995 | * @arg @ref LL_DMA_CHANNEL_4 |
EricLew | 0:80ee8f3b695e | 996 | * @arg @ref LL_DMA_CHANNEL_5 |
EricLew | 0:80ee8f3b695e | 997 | * @arg @ref LL_DMA_CHANNEL_6 |
EricLew | 0:80ee8f3b695e | 998 | * @arg @ref LL_DMA_CHANNEL_7 |
EricLew | 0:80ee8f3b695e | 999 | * @retval Between 0 to 0xFFFFFFFF |
EricLew | 0:80ee8f3b695e | 1000 | */ |
EricLew | 0:80ee8f3b695e | 1001 | __STATIC_INLINE uint32_t LL_DMA_GetM2MDstAddress(DMA_TypeDef* DMAx, uint32_t Channel) |
EricLew | 0:80ee8f3b695e | 1002 | { |
EricLew | 0:80ee8f3b695e | 1003 | return (READ_BIT(((DMA_Channel_TypeDef*)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel-1])))->CMAR, DMA_CMAR_MA)); |
EricLew | 0:80ee8f3b695e | 1004 | } |
EricLew | 0:80ee8f3b695e | 1005 | |
EricLew | 0:80ee8f3b695e | 1006 | /** |
EricLew | 0:80ee8f3b695e | 1007 | * @brief Set DMA request for DMA instance on Channel x. |
EricLew | 0:80ee8f3b695e | 1008 | * @note Please refer to Reference Manual to get the available mapping of Request value link to Channel Selection. |
EricLew | 0:80ee8f3b695e | 1009 | * @rmtoll CSELR C1S LL_DMA_SetPeriphRequest\n |
EricLew | 0:80ee8f3b695e | 1010 | * CSELR C2S LL_DMA_SetPeriphRequest\n |
EricLew | 0:80ee8f3b695e | 1011 | * CSELR C3S LL_DMA_SetPeriphRequest\n |
EricLew | 0:80ee8f3b695e | 1012 | * CSELR C4S LL_DMA_SetPeriphRequest\n |
EricLew | 0:80ee8f3b695e | 1013 | * CSELR C5S LL_DMA_SetPeriphRequest\n |
EricLew | 0:80ee8f3b695e | 1014 | * CSELR C6S LL_DMA_SetPeriphRequest\n |
EricLew | 0:80ee8f3b695e | 1015 | * CSELR C7S LL_DMA_SetPeriphRequest |
EricLew | 0:80ee8f3b695e | 1016 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1017 | * @param Channel This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 1018 | * @arg @ref LL_DMA_CHANNEL_1 |
EricLew | 0:80ee8f3b695e | 1019 | * @arg @ref LL_DMA_CHANNEL_2 |
EricLew | 0:80ee8f3b695e | 1020 | * @arg @ref LL_DMA_CHANNEL_3 |
EricLew | 0:80ee8f3b695e | 1021 | * @arg @ref LL_DMA_CHANNEL_4 |
EricLew | 0:80ee8f3b695e | 1022 | * @arg @ref LL_DMA_CHANNEL_5 |
EricLew | 0:80ee8f3b695e | 1023 | * @arg @ref LL_DMA_CHANNEL_6 |
EricLew | 0:80ee8f3b695e | 1024 | * @arg @ref LL_DMA_CHANNEL_7 |
EricLew | 0:80ee8f3b695e | 1025 | * @param Request This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 1026 | * @arg @ref LL_DMA_REQUEST_0 |
EricLew | 0:80ee8f3b695e | 1027 | * @arg @ref LL_DMA_REQUEST_1 |
EricLew | 0:80ee8f3b695e | 1028 | * @arg @ref LL_DMA_REQUEST_2 |
EricLew | 0:80ee8f3b695e | 1029 | * @arg @ref LL_DMA_REQUEST_3 |
EricLew | 0:80ee8f3b695e | 1030 | * @arg @ref LL_DMA_REQUEST_4 |
EricLew | 0:80ee8f3b695e | 1031 | * @arg @ref LL_DMA_REQUEST_5 |
EricLew | 0:80ee8f3b695e | 1032 | * @arg @ref LL_DMA_REQUEST_6 |
EricLew | 0:80ee8f3b695e | 1033 | * @arg @ref LL_DMA_REQUEST_7 |
EricLew | 0:80ee8f3b695e | 1034 | * @retval None |
EricLew | 0:80ee8f3b695e | 1035 | */ |
EricLew | 0:80ee8f3b695e | 1036 | __STATIC_INLINE void LL_DMA_SetPeriphRequest(DMA_TypeDef *DMAx, uint32_t Channel, uint32_t Request) |
EricLew | 0:80ee8f3b695e | 1037 | { |
EricLew | 0:80ee8f3b695e | 1038 | MODIFY_REG(((DMA_request_TypeDef*)((uint32_t)((uint32_t)DMAx + DMA_CSELR_OFFSET)))->CSELR, DMA_CSELR_C1S << ((Channel-1)*4), Request << POSITION_VAL(DMA_CSELR_C1S << ((Channel-1)*4))); |
EricLew | 0:80ee8f3b695e | 1039 | } |
EricLew | 0:80ee8f3b695e | 1040 | |
EricLew | 0:80ee8f3b695e | 1041 | /** |
EricLew | 0:80ee8f3b695e | 1042 | * @brief Get DMA request for DMA instance on Channel x. |
EricLew | 0:80ee8f3b695e | 1043 | * @rmtoll CSELR C1S LL_DMA_GetPeriphRequest\n |
EricLew | 0:80ee8f3b695e | 1044 | * CSELR C2S LL_DMA_GetPeriphRequest\n |
EricLew | 0:80ee8f3b695e | 1045 | * CSELR C3S LL_DMA_GetPeriphRequest\n |
EricLew | 0:80ee8f3b695e | 1046 | * CSELR C4S LL_DMA_GetPeriphRequest\n |
EricLew | 0:80ee8f3b695e | 1047 | * CSELR C5S LL_DMA_GetPeriphRequest\n |
EricLew | 0:80ee8f3b695e | 1048 | * CSELR C6S LL_DMA_GetPeriphRequest\n |
EricLew | 0:80ee8f3b695e | 1049 | * CSELR C7S LL_DMA_GetPeriphRequest |
EricLew | 0:80ee8f3b695e | 1050 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1051 | * @param Channel This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 1052 | * @arg @ref LL_DMA_CHANNEL_1 |
EricLew | 0:80ee8f3b695e | 1053 | * @arg @ref LL_DMA_CHANNEL_2 |
EricLew | 0:80ee8f3b695e | 1054 | * @arg @ref LL_DMA_CHANNEL_3 |
EricLew | 0:80ee8f3b695e | 1055 | * @arg @ref LL_DMA_CHANNEL_4 |
EricLew | 0:80ee8f3b695e | 1056 | * @arg @ref LL_DMA_CHANNEL_5 |
EricLew | 0:80ee8f3b695e | 1057 | * @arg @ref LL_DMA_CHANNEL_6 |
EricLew | 0:80ee8f3b695e | 1058 | * @arg @ref LL_DMA_CHANNEL_7 |
EricLew | 0:80ee8f3b695e | 1059 | * @retval Returned value can be one of the following values: |
EricLew | 0:80ee8f3b695e | 1060 | * @arg @ref LL_DMA_REQUEST_0 |
EricLew | 0:80ee8f3b695e | 1061 | * @arg @ref LL_DMA_REQUEST_1 |
EricLew | 0:80ee8f3b695e | 1062 | * @arg @ref LL_DMA_REQUEST_2 |
EricLew | 0:80ee8f3b695e | 1063 | * @arg @ref LL_DMA_REQUEST_3 |
EricLew | 0:80ee8f3b695e | 1064 | * @arg @ref LL_DMA_REQUEST_4 |
EricLew | 0:80ee8f3b695e | 1065 | * @arg @ref LL_DMA_REQUEST_5 |
EricLew | 0:80ee8f3b695e | 1066 | * @arg @ref LL_DMA_REQUEST_6 |
EricLew | 0:80ee8f3b695e | 1067 | * @arg @ref LL_DMA_REQUEST_7 |
EricLew | 0:80ee8f3b695e | 1068 | */ |
EricLew | 0:80ee8f3b695e | 1069 | __STATIC_INLINE uint32_t LL_DMA_GetPeriphRequest(DMA_TypeDef *DMAx, uint32_t Channel) |
EricLew | 0:80ee8f3b695e | 1070 | { |
EricLew | 0:80ee8f3b695e | 1071 | return (READ_BIT(((DMA_request_TypeDef*)((uint32_t)((uint32_t)DMAx + DMA_CSELR_OFFSET)))->CSELR, DMA_CSELR_C1S << ((Channel-1)*4)) >> POSITION_VAL(DMA_CSELR_C1S << ((Channel-1)*4))); |
EricLew | 0:80ee8f3b695e | 1072 | } |
EricLew | 0:80ee8f3b695e | 1073 | |
EricLew | 0:80ee8f3b695e | 1074 | /** |
EricLew | 0:80ee8f3b695e | 1075 | * @} |
EricLew | 0:80ee8f3b695e | 1076 | */ |
EricLew | 0:80ee8f3b695e | 1077 | |
EricLew | 0:80ee8f3b695e | 1078 | /** @defgroup DMA_LL_EF_FLAG_Management FLAG_Management |
EricLew | 0:80ee8f3b695e | 1079 | * @{ |
EricLew | 0:80ee8f3b695e | 1080 | */ |
EricLew | 0:80ee8f3b695e | 1081 | |
EricLew | 0:80ee8f3b695e | 1082 | /** |
EricLew | 0:80ee8f3b695e | 1083 | * @brief Get Channel 1 global interrupt flag. |
EricLew | 0:80ee8f3b695e | 1084 | * @rmtoll ISR GIF1 LL_DMA_IsActiveFlag_GI1 |
EricLew | 0:80ee8f3b695e | 1085 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1086 | * @retval State of bit (1 or 0). |
EricLew | 0:80ee8f3b695e | 1087 | */ |
EricLew | 0:80ee8f3b695e | 1088 | __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI1(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1089 | { |
EricLew | 0:80ee8f3b695e | 1090 | return (READ_BIT(DMAx->ISR, DMA_ISR_GIF1) == (DMA_ISR_GIF1)); |
EricLew | 0:80ee8f3b695e | 1091 | } |
EricLew | 0:80ee8f3b695e | 1092 | |
EricLew | 0:80ee8f3b695e | 1093 | /** |
EricLew | 0:80ee8f3b695e | 1094 | * @brief Get Channel 2 global interrupt flag. |
EricLew | 0:80ee8f3b695e | 1095 | * @rmtoll ISR GIF2 LL_DMA_IsActiveFlag_GI2 |
EricLew | 0:80ee8f3b695e | 1096 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1097 | * @retval State of bit (1 or 0). |
EricLew | 0:80ee8f3b695e | 1098 | */ |
EricLew | 0:80ee8f3b695e | 1099 | __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI2(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1100 | { |
EricLew | 0:80ee8f3b695e | 1101 | return (READ_BIT(DMAx->ISR, DMA_ISR_GIF2) == (DMA_ISR_GIF2)); |
EricLew | 0:80ee8f3b695e | 1102 | } |
EricLew | 0:80ee8f3b695e | 1103 | |
EricLew | 0:80ee8f3b695e | 1104 | /** |
EricLew | 0:80ee8f3b695e | 1105 | * @brief Get Channel 3 global interrupt flag. |
EricLew | 0:80ee8f3b695e | 1106 | * @rmtoll ISR GIF3 LL_DMA_IsActiveFlag_GI3 |
EricLew | 0:80ee8f3b695e | 1107 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1108 | * @retval State of bit (1 or 0). |
EricLew | 0:80ee8f3b695e | 1109 | */ |
EricLew | 0:80ee8f3b695e | 1110 | __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI3(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1111 | { |
EricLew | 0:80ee8f3b695e | 1112 | return (READ_BIT(DMAx->ISR, DMA_ISR_GIF3) == (DMA_ISR_GIF3)); |
EricLew | 0:80ee8f3b695e | 1113 | } |
EricLew | 0:80ee8f3b695e | 1114 | |
EricLew | 0:80ee8f3b695e | 1115 | /** |
EricLew | 0:80ee8f3b695e | 1116 | * @brief Get Channel 4 global interrupt flag. |
EricLew | 0:80ee8f3b695e | 1117 | * @rmtoll ISR GIF4 LL_DMA_IsActiveFlag_GI4 |
EricLew | 0:80ee8f3b695e | 1118 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1119 | * @retval State of bit (1 or 0). |
EricLew | 0:80ee8f3b695e | 1120 | */ |
EricLew | 0:80ee8f3b695e | 1121 | __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI4(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1122 | { |
EricLew | 0:80ee8f3b695e | 1123 | return (READ_BIT(DMAx->ISR, DMA_ISR_GIF4) == (DMA_ISR_GIF4)); |
EricLew | 0:80ee8f3b695e | 1124 | } |
EricLew | 0:80ee8f3b695e | 1125 | |
EricLew | 0:80ee8f3b695e | 1126 | /** |
EricLew | 0:80ee8f3b695e | 1127 | * @brief Get Channel 5 global interrupt flag. |
EricLew | 0:80ee8f3b695e | 1128 | * @rmtoll ISR GIF5 LL_DMA_IsActiveFlag_GI5 |
EricLew | 0:80ee8f3b695e | 1129 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1130 | * @retval State of bit (1 or 0). |
EricLew | 0:80ee8f3b695e | 1131 | */ |
EricLew | 0:80ee8f3b695e | 1132 | __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI5(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1133 | { |
EricLew | 0:80ee8f3b695e | 1134 | return (READ_BIT(DMAx->ISR, DMA_ISR_GIF5) == (DMA_ISR_GIF5)); |
EricLew | 0:80ee8f3b695e | 1135 | } |
EricLew | 0:80ee8f3b695e | 1136 | |
EricLew | 0:80ee8f3b695e | 1137 | /** |
EricLew | 0:80ee8f3b695e | 1138 | * @brief Get Channel 6 global interrupt flag. |
EricLew | 0:80ee8f3b695e | 1139 | * @rmtoll ISR GIF6 LL_DMA_IsActiveFlag_GI6 |
EricLew | 0:80ee8f3b695e | 1140 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1141 | * @retval State of bit (1 or 0). |
EricLew | 0:80ee8f3b695e | 1142 | */ |
EricLew | 0:80ee8f3b695e | 1143 | __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI6(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1144 | { |
EricLew | 0:80ee8f3b695e | 1145 | return (READ_BIT(DMAx->ISR, DMA_ISR_GIF6) == (DMA_ISR_GIF6)); |
EricLew | 0:80ee8f3b695e | 1146 | } |
EricLew | 0:80ee8f3b695e | 1147 | |
EricLew | 0:80ee8f3b695e | 1148 | /** |
EricLew | 0:80ee8f3b695e | 1149 | * @brief Get Channel 7 global interrupt flag. |
EricLew | 0:80ee8f3b695e | 1150 | * @rmtoll ISR GIF7 LL_DMA_IsActiveFlag_GI7 |
EricLew | 0:80ee8f3b695e | 1151 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1152 | * @retval State of bit (1 or 0). |
EricLew | 0:80ee8f3b695e | 1153 | */ |
EricLew | 0:80ee8f3b695e | 1154 | __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_GI7(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1155 | { |
EricLew | 0:80ee8f3b695e | 1156 | return (READ_BIT(DMAx->ISR, DMA_ISR_GIF7) == (DMA_ISR_GIF7)); |
EricLew | 0:80ee8f3b695e | 1157 | } |
EricLew | 0:80ee8f3b695e | 1158 | |
EricLew | 0:80ee8f3b695e | 1159 | /** |
EricLew | 0:80ee8f3b695e | 1160 | * @brief Get Channel 1 transfer complete flag. |
EricLew | 0:80ee8f3b695e | 1161 | * @rmtoll ISR TCIF1 LL_DMA_IsActiveFlag_TC1 |
EricLew | 0:80ee8f3b695e | 1162 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1163 | * @retval State of bit (1 or 0). |
EricLew | 0:80ee8f3b695e | 1164 | */ |
EricLew | 0:80ee8f3b695e | 1165 | __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC1(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1166 | { |
EricLew | 0:80ee8f3b695e | 1167 | return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF1) == (DMA_ISR_TCIF1)); |
EricLew | 0:80ee8f3b695e | 1168 | } |
EricLew | 0:80ee8f3b695e | 1169 | |
EricLew | 0:80ee8f3b695e | 1170 | /** |
EricLew | 0:80ee8f3b695e | 1171 | * @brief Get Channel 2 transfer complete flag. |
EricLew | 0:80ee8f3b695e | 1172 | * @rmtoll ISR TCIF2 LL_DMA_IsActiveFlag_TC2 |
EricLew | 0:80ee8f3b695e | 1173 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1174 | * @retval State of bit (1 or 0). |
EricLew | 0:80ee8f3b695e | 1175 | */ |
EricLew | 0:80ee8f3b695e | 1176 | __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC2(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1177 | { |
EricLew | 0:80ee8f3b695e | 1178 | return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF2) == (DMA_ISR_TCIF2)); |
EricLew | 0:80ee8f3b695e | 1179 | } |
EricLew | 0:80ee8f3b695e | 1180 | |
EricLew | 0:80ee8f3b695e | 1181 | /** |
EricLew | 0:80ee8f3b695e | 1182 | * @brief Get Channel 3 transfer complete flag. |
EricLew | 0:80ee8f3b695e | 1183 | * @rmtoll ISR TCIF3 LL_DMA_IsActiveFlag_TC3 |
EricLew | 0:80ee8f3b695e | 1184 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1185 | * @retval State of bit (1 or 0). |
EricLew | 0:80ee8f3b695e | 1186 | */ |
EricLew | 0:80ee8f3b695e | 1187 | __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC3(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1188 | { |
EricLew | 0:80ee8f3b695e | 1189 | return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF3) == (DMA_ISR_TCIF3)); |
EricLew | 0:80ee8f3b695e | 1190 | } |
EricLew | 0:80ee8f3b695e | 1191 | |
EricLew | 0:80ee8f3b695e | 1192 | /** |
EricLew | 0:80ee8f3b695e | 1193 | * @brief Get Channel 4 transfer complete flag. |
EricLew | 0:80ee8f3b695e | 1194 | * @rmtoll ISR TCIF4 LL_DMA_IsActiveFlag_TC4 |
EricLew | 0:80ee8f3b695e | 1195 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1196 | * @retval State of bit (1 or 0). |
EricLew | 0:80ee8f3b695e | 1197 | */ |
EricLew | 0:80ee8f3b695e | 1198 | __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC4(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1199 | { |
EricLew | 0:80ee8f3b695e | 1200 | return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF4) == (DMA_ISR_TCIF4)); |
EricLew | 0:80ee8f3b695e | 1201 | } |
EricLew | 0:80ee8f3b695e | 1202 | |
EricLew | 0:80ee8f3b695e | 1203 | /** |
EricLew | 0:80ee8f3b695e | 1204 | * @brief Get Channel 5 transfer complete flag. |
EricLew | 0:80ee8f3b695e | 1205 | * @rmtoll ISR TCIF5 LL_DMA_IsActiveFlag_TC5 |
EricLew | 0:80ee8f3b695e | 1206 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1207 | * @retval State of bit (1 or 0). |
EricLew | 0:80ee8f3b695e | 1208 | */ |
EricLew | 0:80ee8f3b695e | 1209 | __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC5(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1210 | { |
EricLew | 0:80ee8f3b695e | 1211 | return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF5) == (DMA_ISR_TCIF5)); |
EricLew | 0:80ee8f3b695e | 1212 | } |
EricLew | 0:80ee8f3b695e | 1213 | |
EricLew | 0:80ee8f3b695e | 1214 | /** |
EricLew | 0:80ee8f3b695e | 1215 | * @brief Get Channel 6 transfer complete flag. |
EricLew | 0:80ee8f3b695e | 1216 | * @rmtoll ISR TCIF6 LL_DMA_IsActiveFlag_TC6 |
EricLew | 0:80ee8f3b695e | 1217 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1218 | * @retval State of bit (1 or 0). |
EricLew | 0:80ee8f3b695e | 1219 | */ |
EricLew | 0:80ee8f3b695e | 1220 | __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC6(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1221 | { |
EricLew | 0:80ee8f3b695e | 1222 | return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF6) == (DMA_ISR_TCIF6)); |
EricLew | 0:80ee8f3b695e | 1223 | } |
EricLew | 0:80ee8f3b695e | 1224 | |
EricLew | 0:80ee8f3b695e | 1225 | /** |
EricLew | 0:80ee8f3b695e | 1226 | * @brief Get Channel 7 transfer complete flag. |
EricLew | 0:80ee8f3b695e | 1227 | * @rmtoll ISR TCIF7 LL_DMA_IsActiveFlag_TC7 |
EricLew | 0:80ee8f3b695e | 1228 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1229 | * @retval State of bit (1 or 0). |
EricLew | 0:80ee8f3b695e | 1230 | */ |
EricLew | 0:80ee8f3b695e | 1231 | __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TC7(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1232 | { |
EricLew | 0:80ee8f3b695e | 1233 | return (READ_BIT(DMAx->ISR, DMA_ISR_TCIF7) == (DMA_ISR_TCIF7)); |
EricLew | 0:80ee8f3b695e | 1234 | } |
EricLew | 0:80ee8f3b695e | 1235 | |
EricLew | 0:80ee8f3b695e | 1236 | /** |
EricLew | 0:80ee8f3b695e | 1237 | * @brief Get Channel 1 half transfer flag. |
EricLew | 0:80ee8f3b695e | 1238 | * @rmtoll ISR HTIF1 LL_DMA_IsActiveFlag_HT1 |
EricLew | 0:80ee8f3b695e | 1239 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1240 | * @retval State of bit (1 or 0). |
EricLew | 0:80ee8f3b695e | 1241 | */ |
EricLew | 0:80ee8f3b695e | 1242 | __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT1(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1243 | { |
EricLew | 0:80ee8f3b695e | 1244 | return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF1) == (DMA_ISR_HTIF1)); |
EricLew | 0:80ee8f3b695e | 1245 | } |
EricLew | 0:80ee8f3b695e | 1246 | |
EricLew | 0:80ee8f3b695e | 1247 | /** |
EricLew | 0:80ee8f3b695e | 1248 | * @brief Get Channel 2 half transfer flag. |
EricLew | 0:80ee8f3b695e | 1249 | * @rmtoll ISR HTIF2 LL_DMA_IsActiveFlag_HT2 |
EricLew | 0:80ee8f3b695e | 1250 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1251 | * @retval State of bit (1 or 0). |
EricLew | 0:80ee8f3b695e | 1252 | */ |
EricLew | 0:80ee8f3b695e | 1253 | __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT2(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1254 | { |
EricLew | 0:80ee8f3b695e | 1255 | return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF2) == (DMA_ISR_HTIF2)); |
EricLew | 0:80ee8f3b695e | 1256 | } |
EricLew | 0:80ee8f3b695e | 1257 | |
EricLew | 0:80ee8f3b695e | 1258 | /** |
EricLew | 0:80ee8f3b695e | 1259 | * @brief Get Channel 3 half transfer flag. |
EricLew | 0:80ee8f3b695e | 1260 | * @rmtoll ISR HTIF3 LL_DMA_IsActiveFlag_HT3 |
EricLew | 0:80ee8f3b695e | 1261 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1262 | * @retval State of bit (1 or 0). |
EricLew | 0:80ee8f3b695e | 1263 | */ |
EricLew | 0:80ee8f3b695e | 1264 | __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT3(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1265 | { |
EricLew | 0:80ee8f3b695e | 1266 | return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF3) == (DMA_ISR_HTIF3)); |
EricLew | 0:80ee8f3b695e | 1267 | } |
EricLew | 0:80ee8f3b695e | 1268 | |
EricLew | 0:80ee8f3b695e | 1269 | /** |
EricLew | 0:80ee8f3b695e | 1270 | * @brief Get Channel 4 half transfer flag. |
EricLew | 0:80ee8f3b695e | 1271 | * @rmtoll ISR HTIF4 LL_DMA_IsActiveFlag_HT4 |
EricLew | 0:80ee8f3b695e | 1272 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1273 | * @retval State of bit (1 or 0). |
EricLew | 0:80ee8f3b695e | 1274 | */ |
EricLew | 0:80ee8f3b695e | 1275 | __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT4(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1276 | { |
EricLew | 0:80ee8f3b695e | 1277 | return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF4) == (DMA_ISR_HTIF4)); |
EricLew | 0:80ee8f3b695e | 1278 | } |
EricLew | 0:80ee8f3b695e | 1279 | |
EricLew | 0:80ee8f3b695e | 1280 | /** |
EricLew | 0:80ee8f3b695e | 1281 | * @brief Get Channel 5 half transfer flag. |
EricLew | 0:80ee8f3b695e | 1282 | * @rmtoll ISR HTIF5 LL_DMA_IsActiveFlag_HT5 |
EricLew | 0:80ee8f3b695e | 1283 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1284 | * @retval State of bit (1 or 0). |
EricLew | 0:80ee8f3b695e | 1285 | */ |
EricLew | 0:80ee8f3b695e | 1286 | __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT5(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1287 | { |
EricLew | 0:80ee8f3b695e | 1288 | return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF5) == (DMA_ISR_HTIF5)); |
EricLew | 0:80ee8f3b695e | 1289 | } |
EricLew | 0:80ee8f3b695e | 1290 | |
EricLew | 0:80ee8f3b695e | 1291 | /** |
EricLew | 0:80ee8f3b695e | 1292 | * @brief Get Channel 6 half transfer flag. |
EricLew | 0:80ee8f3b695e | 1293 | * @rmtoll ISR HTIF6 LL_DMA_IsActiveFlag_HT6 |
EricLew | 0:80ee8f3b695e | 1294 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1295 | * @retval State of bit (1 or 0). |
EricLew | 0:80ee8f3b695e | 1296 | */ |
EricLew | 0:80ee8f3b695e | 1297 | __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT6(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1298 | { |
EricLew | 0:80ee8f3b695e | 1299 | return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF6) == (DMA_ISR_HTIF6)); |
EricLew | 0:80ee8f3b695e | 1300 | } |
EricLew | 0:80ee8f3b695e | 1301 | |
EricLew | 0:80ee8f3b695e | 1302 | /** |
EricLew | 0:80ee8f3b695e | 1303 | * @brief Get Channel 7 half transfer flag. |
EricLew | 0:80ee8f3b695e | 1304 | * @rmtoll ISR HTIF7 LL_DMA_IsActiveFlag_HT7 |
EricLew | 0:80ee8f3b695e | 1305 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1306 | * @retval State of bit (1 or 0). |
EricLew | 0:80ee8f3b695e | 1307 | */ |
EricLew | 0:80ee8f3b695e | 1308 | __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_HT7(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1309 | { |
EricLew | 0:80ee8f3b695e | 1310 | return (READ_BIT(DMAx->ISR, DMA_ISR_HTIF7) == (DMA_ISR_HTIF7)); |
EricLew | 0:80ee8f3b695e | 1311 | } |
EricLew | 0:80ee8f3b695e | 1312 | |
EricLew | 0:80ee8f3b695e | 1313 | /** |
EricLew | 0:80ee8f3b695e | 1314 | * @brief Get Channel 1 transfer error flag. |
EricLew | 0:80ee8f3b695e | 1315 | * @rmtoll ISR TEIF1 LL_DMA_IsActiveFlag_TE1 |
EricLew | 0:80ee8f3b695e | 1316 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1317 | * @retval State of bit (1 or 0). |
EricLew | 0:80ee8f3b695e | 1318 | */ |
EricLew | 0:80ee8f3b695e | 1319 | __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE1(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1320 | { |
EricLew | 0:80ee8f3b695e | 1321 | return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF1) == (DMA_ISR_TEIF1)); |
EricLew | 0:80ee8f3b695e | 1322 | } |
EricLew | 0:80ee8f3b695e | 1323 | |
EricLew | 0:80ee8f3b695e | 1324 | /** |
EricLew | 0:80ee8f3b695e | 1325 | * @brief Get Channel 2 transfer error flag. |
EricLew | 0:80ee8f3b695e | 1326 | * @rmtoll ISR TEIF2 LL_DMA_IsActiveFlag_TE2 |
EricLew | 0:80ee8f3b695e | 1327 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1328 | * @retval State of bit (1 or 0). |
EricLew | 0:80ee8f3b695e | 1329 | */ |
EricLew | 0:80ee8f3b695e | 1330 | __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE2(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1331 | { |
EricLew | 0:80ee8f3b695e | 1332 | return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF2) == (DMA_ISR_TEIF2)); |
EricLew | 0:80ee8f3b695e | 1333 | } |
EricLew | 0:80ee8f3b695e | 1334 | |
EricLew | 0:80ee8f3b695e | 1335 | /** |
EricLew | 0:80ee8f3b695e | 1336 | * @brief Get Channel 3 transfer error flag. |
EricLew | 0:80ee8f3b695e | 1337 | * @rmtoll ISR TEIF3 LL_DMA_IsActiveFlag_TE3 |
EricLew | 0:80ee8f3b695e | 1338 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1339 | * @retval State of bit (1 or 0). |
EricLew | 0:80ee8f3b695e | 1340 | */ |
EricLew | 0:80ee8f3b695e | 1341 | __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE3(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1342 | { |
EricLew | 0:80ee8f3b695e | 1343 | return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF3) == (DMA_ISR_TEIF3)); |
EricLew | 0:80ee8f3b695e | 1344 | } |
EricLew | 0:80ee8f3b695e | 1345 | |
EricLew | 0:80ee8f3b695e | 1346 | /** |
EricLew | 0:80ee8f3b695e | 1347 | * @brief Get Channel 4 transfer error flag. |
EricLew | 0:80ee8f3b695e | 1348 | * @rmtoll ISR TEIF4 LL_DMA_IsActiveFlag_TE4 |
EricLew | 0:80ee8f3b695e | 1349 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1350 | * @retval State of bit (1 or 0). |
EricLew | 0:80ee8f3b695e | 1351 | */ |
EricLew | 0:80ee8f3b695e | 1352 | __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE4(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1353 | { |
EricLew | 0:80ee8f3b695e | 1354 | return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF4) == (DMA_ISR_TEIF4)); |
EricLew | 0:80ee8f3b695e | 1355 | } |
EricLew | 0:80ee8f3b695e | 1356 | |
EricLew | 0:80ee8f3b695e | 1357 | /** |
EricLew | 0:80ee8f3b695e | 1358 | * @brief Get Channel 5 transfer error flag. |
EricLew | 0:80ee8f3b695e | 1359 | * @rmtoll ISR TEIF5 LL_DMA_IsActiveFlag_TE5 |
EricLew | 0:80ee8f3b695e | 1360 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1361 | * @retval State of bit (1 or 0). |
EricLew | 0:80ee8f3b695e | 1362 | */ |
EricLew | 0:80ee8f3b695e | 1363 | __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE5(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1364 | { |
EricLew | 0:80ee8f3b695e | 1365 | return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF5) == (DMA_ISR_TEIF5)); |
EricLew | 0:80ee8f3b695e | 1366 | } |
EricLew | 0:80ee8f3b695e | 1367 | |
EricLew | 0:80ee8f3b695e | 1368 | /** |
EricLew | 0:80ee8f3b695e | 1369 | * @brief Get Channel 6 transfer error flag. |
EricLew | 0:80ee8f3b695e | 1370 | * @rmtoll ISR TEIF6 LL_DMA_IsActiveFlag_TE6 |
EricLew | 0:80ee8f3b695e | 1371 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1372 | * @retval State of bit (1 or 0). |
EricLew | 0:80ee8f3b695e | 1373 | */ |
EricLew | 0:80ee8f3b695e | 1374 | __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE6(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1375 | { |
EricLew | 0:80ee8f3b695e | 1376 | return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF6) == (DMA_ISR_TEIF6)); |
EricLew | 0:80ee8f3b695e | 1377 | } |
EricLew | 0:80ee8f3b695e | 1378 | |
EricLew | 0:80ee8f3b695e | 1379 | /** |
EricLew | 0:80ee8f3b695e | 1380 | * @brief Get Channel 7 transfer error flag. |
EricLew | 0:80ee8f3b695e | 1381 | * @rmtoll ISR TEIF7 LL_DMA_IsActiveFlag_TE7 |
EricLew | 0:80ee8f3b695e | 1382 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1383 | * @retval State of bit (1 or 0). |
EricLew | 0:80ee8f3b695e | 1384 | */ |
EricLew | 0:80ee8f3b695e | 1385 | __STATIC_INLINE uint32_t LL_DMA_IsActiveFlag_TE7(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1386 | { |
EricLew | 0:80ee8f3b695e | 1387 | return (READ_BIT(DMAx->ISR, DMA_ISR_TEIF7) == (DMA_ISR_TEIF7)); |
EricLew | 0:80ee8f3b695e | 1388 | } |
EricLew | 0:80ee8f3b695e | 1389 | |
EricLew | 0:80ee8f3b695e | 1390 | /** |
EricLew | 0:80ee8f3b695e | 1391 | * @brief Clear Channel 1 global interrupt flag. |
EricLew | 0:80ee8f3b695e | 1392 | * @rmtoll IFCR CGIF1 LL_DMA_ClearFlag_GI1 |
EricLew | 0:80ee8f3b695e | 1393 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1394 | * @retval None |
EricLew | 0:80ee8f3b695e | 1395 | */ |
EricLew | 0:80ee8f3b695e | 1396 | __STATIC_INLINE void LL_DMA_ClearFlag_GI1(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1397 | { |
EricLew | 0:80ee8f3b695e | 1398 | SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF1); |
EricLew | 0:80ee8f3b695e | 1399 | } |
EricLew | 0:80ee8f3b695e | 1400 | |
EricLew | 0:80ee8f3b695e | 1401 | /** |
EricLew | 0:80ee8f3b695e | 1402 | * @brief Clear Channel 2 global interrupt flag. |
EricLew | 0:80ee8f3b695e | 1403 | * @rmtoll IFCR CGIF2 LL_DMA_ClearFlag_GI2 |
EricLew | 0:80ee8f3b695e | 1404 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1405 | * @retval None |
EricLew | 0:80ee8f3b695e | 1406 | */ |
EricLew | 0:80ee8f3b695e | 1407 | __STATIC_INLINE void LL_DMA_ClearFlag_GI2(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1408 | { |
EricLew | 0:80ee8f3b695e | 1409 | SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF2); |
EricLew | 0:80ee8f3b695e | 1410 | } |
EricLew | 0:80ee8f3b695e | 1411 | |
EricLew | 0:80ee8f3b695e | 1412 | /** |
EricLew | 0:80ee8f3b695e | 1413 | * @brief Clear Channel 3 global interrupt flag. |
EricLew | 0:80ee8f3b695e | 1414 | * @rmtoll IFCR CGIF3 LL_DMA_ClearFlag_GI3 |
EricLew | 0:80ee8f3b695e | 1415 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1416 | * @retval None |
EricLew | 0:80ee8f3b695e | 1417 | */ |
EricLew | 0:80ee8f3b695e | 1418 | __STATIC_INLINE void LL_DMA_ClearFlag_GI3(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1419 | { |
EricLew | 0:80ee8f3b695e | 1420 | SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF3); |
EricLew | 0:80ee8f3b695e | 1421 | } |
EricLew | 0:80ee8f3b695e | 1422 | |
EricLew | 0:80ee8f3b695e | 1423 | /** |
EricLew | 0:80ee8f3b695e | 1424 | * @brief Clear Channel 4 global interrupt flag. |
EricLew | 0:80ee8f3b695e | 1425 | * @rmtoll IFCR CGIF4 LL_DMA_ClearFlag_GI4 |
EricLew | 0:80ee8f3b695e | 1426 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1427 | * @retval None |
EricLew | 0:80ee8f3b695e | 1428 | */ |
EricLew | 0:80ee8f3b695e | 1429 | __STATIC_INLINE void LL_DMA_ClearFlag_GI4(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1430 | { |
EricLew | 0:80ee8f3b695e | 1431 | SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF4); |
EricLew | 0:80ee8f3b695e | 1432 | } |
EricLew | 0:80ee8f3b695e | 1433 | |
EricLew | 0:80ee8f3b695e | 1434 | /** |
EricLew | 0:80ee8f3b695e | 1435 | * @brief Clear Channel 5 global interrupt flag. |
EricLew | 0:80ee8f3b695e | 1436 | * @rmtoll IFCR CGIF5 LL_DMA_ClearFlag_GI5 |
EricLew | 0:80ee8f3b695e | 1437 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1438 | * @retval None |
EricLew | 0:80ee8f3b695e | 1439 | */ |
EricLew | 0:80ee8f3b695e | 1440 | __STATIC_INLINE void LL_DMA_ClearFlag_GI5(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1441 | { |
EricLew | 0:80ee8f3b695e | 1442 | SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF5); |
EricLew | 0:80ee8f3b695e | 1443 | } |
EricLew | 0:80ee8f3b695e | 1444 | |
EricLew | 0:80ee8f3b695e | 1445 | /** |
EricLew | 0:80ee8f3b695e | 1446 | * @brief Clear Channel 6 global interrupt flag. |
EricLew | 0:80ee8f3b695e | 1447 | * @rmtoll IFCR CGIF6 LL_DMA_ClearFlag_GI6 |
EricLew | 0:80ee8f3b695e | 1448 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1449 | * @retval None |
EricLew | 0:80ee8f3b695e | 1450 | */ |
EricLew | 0:80ee8f3b695e | 1451 | __STATIC_INLINE void LL_DMA_ClearFlag_GI6(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1452 | { |
EricLew | 0:80ee8f3b695e | 1453 | SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF6); |
EricLew | 0:80ee8f3b695e | 1454 | } |
EricLew | 0:80ee8f3b695e | 1455 | |
EricLew | 0:80ee8f3b695e | 1456 | /** |
EricLew | 0:80ee8f3b695e | 1457 | * @brief Clear Channel 7 global interrupt flag. |
EricLew | 0:80ee8f3b695e | 1458 | * @rmtoll IFCR CGIF7 LL_DMA_ClearFlag_GI7 |
EricLew | 0:80ee8f3b695e | 1459 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1460 | * @retval None |
EricLew | 0:80ee8f3b695e | 1461 | */ |
EricLew | 0:80ee8f3b695e | 1462 | __STATIC_INLINE void LL_DMA_ClearFlag_GI7(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1463 | { |
EricLew | 0:80ee8f3b695e | 1464 | SET_BIT(DMAx->IFCR, DMA_IFCR_CGIF7); |
EricLew | 0:80ee8f3b695e | 1465 | } |
EricLew | 0:80ee8f3b695e | 1466 | |
EricLew | 0:80ee8f3b695e | 1467 | /** |
EricLew | 0:80ee8f3b695e | 1468 | * @brief Clear Channel 1 transfer complete flag. |
EricLew | 0:80ee8f3b695e | 1469 | * @rmtoll IFCR CTCIF1 LL_DMA_ClearFlag_TC1 |
EricLew | 0:80ee8f3b695e | 1470 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1471 | * @retval None |
EricLew | 0:80ee8f3b695e | 1472 | */ |
EricLew | 0:80ee8f3b695e | 1473 | __STATIC_INLINE void LL_DMA_ClearFlag_TC1(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1474 | { |
EricLew | 0:80ee8f3b695e | 1475 | SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF1); |
EricLew | 0:80ee8f3b695e | 1476 | } |
EricLew | 0:80ee8f3b695e | 1477 | |
EricLew | 0:80ee8f3b695e | 1478 | /** |
EricLew | 0:80ee8f3b695e | 1479 | * @brief Clear Channel 2 transfer complete flag. |
EricLew | 0:80ee8f3b695e | 1480 | * @rmtoll IFCR CTCIF2 LL_DMA_ClearFlag_TC2 |
EricLew | 0:80ee8f3b695e | 1481 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1482 | * @retval None |
EricLew | 0:80ee8f3b695e | 1483 | */ |
EricLew | 0:80ee8f3b695e | 1484 | __STATIC_INLINE void LL_DMA_ClearFlag_TC2(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1485 | { |
EricLew | 0:80ee8f3b695e | 1486 | SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF2); |
EricLew | 0:80ee8f3b695e | 1487 | } |
EricLew | 0:80ee8f3b695e | 1488 | |
EricLew | 0:80ee8f3b695e | 1489 | /** |
EricLew | 0:80ee8f3b695e | 1490 | * @brief Clear Channel 3 transfer complete flag. |
EricLew | 0:80ee8f3b695e | 1491 | * @rmtoll IFCR CTCIF3 LL_DMA_ClearFlag_TC3 |
EricLew | 0:80ee8f3b695e | 1492 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1493 | * @retval None |
EricLew | 0:80ee8f3b695e | 1494 | */ |
EricLew | 0:80ee8f3b695e | 1495 | __STATIC_INLINE void LL_DMA_ClearFlag_TC3(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1496 | { |
EricLew | 0:80ee8f3b695e | 1497 | SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF3); |
EricLew | 0:80ee8f3b695e | 1498 | } |
EricLew | 0:80ee8f3b695e | 1499 | |
EricLew | 0:80ee8f3b695e | 1500 | /** |
EricLew | 0:80ee8f3b695e | 1501 | * @brief Clear Channel 4 transfer complete flag. |
EricLew | 0:80ee8f3b695e | 1502 | * @rmtoll IFCR CTCIF4 LL_DMA_ClearFlag_TC4 |
EricLew | 0:80ee8f3b695e | 1503 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1504 | * @retval None |
EricLew | 0:80ee8f3b695e | 1505 | */ |
EricLew | 0:80ee8f3b695e | 1506 | __STATIC_INLINE void LL_DMA_ClearFlag_TC4(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1507 | { |
EricLew | 0:80ee8f3b695e | 1508 | SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF4); |
EricLew | 0:80ee8f3b695e | 1509 | } |
EricLew | 0:80ee8f3b695e | 1510 | |
EricLew | 0:80ee8f3b695e | 1511 | /** |
EricLew | 0:80ee8f3b695e | 1512 | * @brief Clear Channel 5 transfer complete flag. |
EricLew | 0:80ee8f3b695e | 1513 | * @rmtoll IFCR CTCIF5 LL_DMA_ClearFlag_TC5 |
EricLew | 0:80ee8f3b695e | 1514 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1515 | * @retval None |
EricLew | 0:80ee8f3b695e | 1516 | */ |
EricLew | 0:80ee8f3b695e | 1517 | __STATIC_INLINE void LL_DMA_ClearFlag_TC5(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1518 | { |
EricLew | 0:80ee8f3b695e | 1519 | SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF5); |
EricLew | 0:80ee8f3b695e | 1520 | } |
EricLew | 0:80ee8f3b695e | 1521 | |
EricLew | 0:80ee8f3b695e | 1522 | /** |
EricLew | 0:80ee8f3b695e | 1523 | * @brief Clear Channel 6 transfer complete flag. |
EricLew | 0:80ee8f3b695e | 1524 | * @rmtoll IFCR CTCIF6 LL_DMA_ClearFlag_TC6 |
EricLew | 0:80ee8f3b695e | 1525 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1526 | * @retval None |
EricLew | 0:80ee8f3b695e | 1527 | */ |
EricLew | 0:80ee8f3b695e | 1528 | __STATIC_INLINE void LL_DMA_ClearFlag_TC6(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1529 | { |
EricLew | 0:80ee8f3b695e | 1530 | SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF6); |
EricLew | 0:80ee8f3b695e | 1531 | } |
EricLew | 0:80ee8f3b695e | 1532 | |
EricLew | 0:80ee8f3b695e | 1533 | /** |
EricLew | 0:80ee8f3b695e | 1534 | * @brief Clear Channel 7 transfer complete flag. |
EricLew | 0:80ee8f3b695e | 1535 | * @rmtoll IFCR CTCIF7 LL_DMA_ClearFlag_TC7 |
EricLew | 0:80ee8f3b695e | 1536 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1537 | * @retval None |
EricLew | 0:80ee8f3b695e | 1538 | */ |
EricLew | 0:80ee8f3b695e | 1539 | __STATIC_INLINE void LL_DMA_ClearFlag_TC7(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1540 | { |
EricLew | 0:80ee8f3b695e | 1541 | SET_BIT(DMAx->IFCR, DMA_IFCR_CTCIF7); |
EricLew | 0:80ee8f3b695e | 1542 | } |
EricLew | 0:80ee8f3b695e | 1543 | |
EricLew | 0:80ee8f3b695e | 1544 | /** |
EricLew | 0:80ee8f3b695e | 1545 | * @brief Clear Channel 1 half transfer flag. |
EricLew | 0:80ee8f3b695e | 1546 | * @rmtoll IFCR CHTIF1 LL_DMA_ClearFlag_HT1 |
EricLew | 0:80ee8f3b695e | 1547 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1548 | * @retval None |
EricLew | 0:80ee8f3b695e | 1549 | */ |
EricLew | 0:80ee8f3b695e | 1550 | __STATIC_INLINE void LL_DMA_ClearFlag_HT1(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1551 | { |
EricLew | 0:80ee8f3b695e | 1552 | SET_BIT(DMAx->IFCR, DMA_IFCR_CHTIF1); |
EricLew | 0:80ee8f3b695e | 1553 | } |
EricLew | 0:80ee8f3b695e | 1554 | |
EricLew | 0:80ee8f3b695e | 1555 | /** |
EricLew | 0:80ee8f3b695e | 1556 | * @brief Clear Channel 2 half transfer flag. |
EricLew | 0:80ee8f3b695e | 1557 | * @rmtoll IFCR CHTIF2 LL_DMA_ClearFlag_HT2 |
EricLew | 0:80ee8f3b695e | 1558 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1559 | * @retval None |
EricLew | 0:80ee8f3b695e | 1560 | */ |
EricLew | 0:80ee8f3b695e | 1561 | __STATIC_INLINE void LL_DMA_ClearFlag_HT2(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1562 | { |
EricLew | 0:80ee8f3b695e | 1563 | SET_BIT(DMAx->IFCR, DMA_IFCR_CHTIF2); |
EricLew | 0:80ee8f3b695e | 1564 | } |
EricLew | 0:80ee8f3b695e | 1565 | |
EricLew | 0:80ee8f3b695e | 1566 | /** |
EricLew | 0:80ee8f3b695e | 1567 | * @brief Clear Channel 3 half transfer flag. |
EricLew | 0:80ee8f3b695e | 1568 | * @rmtoll IFCR CHTIF3 LL_DMA_ClearFlag_HT3 |
EricLew | 0:80ee8f3b695e | 1569 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1570 | * @retval None |
EricLew | 0:80ee8f3b695e | 1571 | */ |
EricLew | 0:80ee8f3b695e | 1572 | __STATIC_INLINE void LL_DMA_ClearFlag_HT3(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1573 | { |
EricLew | 0:80ee8f3b695e | 1574 | SET_BIT(DMAx->IFCR, DMA_IFCR_CHTIF3); |
EricLew | 0:80ee8f3b695e | 1575 | } |
EricLew | 0:80ee8f3b695e | 1576 | |
EricLew | 0:80ee8f3b695e | 1577 | /** |
EricLew | 0:80ee8f3b695e | 1578 | * @brief Clear Channel 4 half transfer flag. |
EricLew | 0:80ee8f3b695e | 1579 | * @rmtoll IFCR CHTIF4 LL_DMA_ClearFlag_HT4 |
EricLew | 0:80ee8f3b695e | 1580 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1581 | * @retval None |
EricLew | 0:80ee8f3b695e | 1582 | */ |
EricLew | 0:80ee8f3b695e | 1583 | __STATIC_INLINE void LL_DMA_ClearFlag_HT4(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1584 | { |
EricLew | 0:80ee8f3b695e | 1585 | SET_BIT(DMAx->IFCR, DMA_IFCR_CHTIF4); |
EricLew | 0:80ee8f3b695e | 1586 | } |
EricLew | 0:80ee8f3b695e | 1587 | |
EricLew | 0:80ee8f3b695e | 1588 | /** |
EricLew | 0:80ee8f3b695e | 1589 | * @brief Clear Channel 5 half transfer flag. |
EricLew | 0:80ee8f3b695e | 1590 | * @rmtoll IFCR CHTIF5 LL_DMA_ClearFlag_HT5 |
EricLew | 0:80ee8f3b695e | 1591 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1592 | * @retval None |
EricLew | 0:80ee8f3b695e | 1593 | */ |
EricLew | 0:80ee8f3b695e | 1594 | __STATIC_INLINE void LL_DMA_ClearFlag_HT5(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1595 | { |
EricLew | 0:80ee8f3b695e | 1596 | SET_BIT(DMAx->IFCR, DMA_IFCR_CHTIF5); |
EricLew | 0:80ee8f3b695e | 1597 | } |
EricLew | 0:80ee8f3b695e | 1598 | |
EricLew | 0:80ee8f3b695e | 1599 | /** |
EricLew | 0:80ee8f3b695e | 1600 | * @brief Clear Channel 6 half transfer flag. |
EricLew | 0:80ee8f3b695e | 1601 | * @rmtoll IFCR CHTIF6 LL_DMA_ClearFlag_HT6 |
EricLew | 0:80ee8f3b695e | 1602 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1603 | * @retval None |
EricLew | 0:80ee8f3b695e | 1604 | */ |
EricLew | 0:80ee8f3b695e | 1605 | __STATIC_INLINE void LL_DMA_ClearFlag_HT6(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1606 | { |
EricLew | 0:80ee8f3b695e | 1607 | SET_BIT(DMAx->IFCR, DMA_IFCR_CHTIF6); |
EricLew | 0:80ee8f3b695e | 1608 | } |
EricLew | 0:80ee8f3b695e | 1609 | |
EricLew | 0:80ee8f3b695e | 1610 | /** |
EricLew | 0:80ee8f3b695e | 1611 | * @brief Clear Channel 7 half transfer flag. |
EricLew | 0:80ee8f3b695e | 1612 | * @rmtoll IFCR CHTIF7 LL_DMA_ClearFlag_HT7 |
EricLew | 0:80ee8f3b695e | 1613 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1614 | * @retval None |
EricLew | 0:80ee8f3b695e | 1615 | */ |
EricLew | 0:80ee8f3b695e | 1616 | __STATIC_INLINE void LL_DMA_ClearFlag_HT7(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1617 | { |
EricLew | 0:80ee8f3b695e | 1618 | SET_BIT(DMAx->IFCR, DMA_IFCR_CHTIF7); |
EricLew | 0:80ee8f3b695e | 1619 | } |
EricLew | 0:80ee8f3b695e | 1620 | |
EricLew | 0:80ee8f3b695e | 1621 | /** |
EricLew | 0:80ee8f3b695e | 1622 | * @brief Clear Channel 1 transfer error flag. |
EricLew | 0:80ee8f3b695e | 1623 | * @rmtoll IFCR CTEIF1 LL_DMA_ClearFlag_TE1 |
EricLew | 0:80ee8f3b695e | 1624 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1625 | * @retval None |
EricLew | 0:80ee8f3b695e | 1626 | */ |
EricLew | 0:80ee8f3b695e | 1627 | __STATIC_INLINE void LL_DMA_ClearFlag_TE1(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1628 | { |
EricLew | 0:80ee8f3b695e | 1629 | SET_BIT(DMAx->IFCR, DMA_IFCR_CTEIF1); |
EricLew | 0:80ee8f3b695e | 1630 | } |
EricLew | 0:80ee8f3b695e | 1631 | |
EricLew | 0:80ee8f3b695e | 1632 | /** |
EricLew | 0:80ee8f3b695e | 1633 | * @brief Clear Channel 2 transfer error flag. |
EricLew | 0:80ee8f3b695e | 1634 | * @rmtoll IFCR CTEIF2 LL_DMA_ClearFlag_TE2 |
EricLew | 0:80ee8f3b695e | 1635 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1636 | * @retval None |
EricLew | 0:80ee8f3b695e | 1637 | */ |
EricLew | 0:80ee8f3b695e | 1638 | __STATIC_INLINE void LL_DMA_ClearFlag_TE2(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1639 | { |
EricLew | 0:80ee8f3b695e | 1640 | SET_BIT(DMAx->IFCR, DMA_IFCR_CTEIF2); |
EricLew | 0:80ee8f3b695e | 1641 | } |
EricLew | 0:80ee8f3b695e | 1642 | |
EricLew | 0:80ee8f3b695e | 1643 | /** |
EricLew | 0:80ee8f3b695e | 1644 | * @brief Clear Channel 3 transfer error flag. |
EricLew | 0:80ee8f3b695e | 1645 | * @rmtoll IFCR CTEIF3 LL_DMA_ClearFlag_TE3 |
EricLew | 0:80ee8f3b695e | 1646 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1647 | * @retval None |
EricLew | 0:80ee8f3b695e | 1648 | */ |
EricLew | 0:80ee8f3b695e | 1649 | __STATIC_INLINE void LL_DMA_ClearFlag_TE3(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1650 | { |
EricLew | 0:80ee8f3b695e | 1651 | SET_BIT(DMAx->IFCR, DMA_IFCR_CTEIF3); |
EricLew | 0:80ee8f3b695e | 1652 | } |
EricLew | 0:80ee8f3b695e | 1653 | |
EricLew | 0:80ee8f3b695e | 1654 | /** |
EricLew | 0:80ee8f3b695e | 1655 | * @brief Clear Channel 4 transfer error flag. |
EricLew | 0:80ee8f3b695e | 1656 | * @rmtoll IFCR CTEIF4 LL_DMA_ClearFlag_TE4 |
EricLew | 0:80ee8f3b695e | 1657 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1658 | * @retval None |
EricLew | 0:80ee8f3b695e | 1659 | */ |
EricLew | 0:80ee8f3b695e | 1660 | __STATIC_INLINE void LL_DMA_ClearFlag_TE4(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1661 | { |
EricLew | 0:80ee8f3b695e | 1662 | SET_BIT(DMAx->IFCR, DMA_IFCR_CTEIF4); |
EricLew | 0:80ee8f3b695e | 1663 | } |
EricLew | 0:80ee8f3b695e | 1664 | |
EricLew | 0:80ee8f3b695e | 1665 | /** |
EricLew | 0:80ee8f3b695e | 1666 | * @brief Clear Channel 5 transfer error flag. |
EricLew | 0:80ee8f3b695e | 1667 | * @rmtoll IFCR CTEIF5 LL_DMA_ClearFlag_TE5 |
EricLew | 0:80ee8f3b695e | 1668 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1669 | * @retval None |
EricLew | 0:80ee8f3b695e | 1670 | */ |
EricLew | 0:80ee8f3b695e | 1671 | __STATIC_INLINE void LL_DMA_ClearFlag_TE5(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1672 | { |
EricLew | 0:80ee8f3b695e | 1673 | SET_BIT(DMAx->IFCR, DMA_IFCR_CTEIF5); |
EricLew | 0:80ee8f3b695e | 1674 | } |
EricLew | 0:80ee8f3b695e | 1675 | |
EricLew | 0:80ee8f3b695e | 1676 | /** |
EricLew | 0:80ee8f3b695e | 1677 | * @brief Clear Channel 6 transfer error flag. |
EricLew | 0:80ee8f3b695e | 1678 | * @rmtoll IFCR CTEIF6 LL_DMA_ClearFlag_TE6 |
EricLew | 0:80ee8f3b695e | 1679 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1680 | * @retval None |
EricLew | 0:80ee8f3b695e | 1681 | */ |
EricLew | 0:80ee8f3b695e | 1682 | __STATIC_INLINE void LL_DMA_ClearFlag_TE6(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1683 | { |
EricLew | 0:80ee8f3b695e | 1684 | SET_BIT(DMAx->IFCR, DMA_IFCR_CTEIF6); |
EricLew | 0:80ee8f3b695e | 1685 | } |
EricLew | 0:80ee8f3b695e | 1686 | |
EricLew | 0:80ee8f3b695e | 1687 | /** |
EricLew | 0:80ee8f3b695e | 1688 | * @brief Clear Channel 7 transfer error flag. |
EricLew | 0:80ee8f3b695e | 1689 | * @rmtoll IFCR CTEIF7 LL_DMA_ClearFlag_TE7 |
EricLew | 0:80ee8f3b695e | 1690 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1691 | * @retval None |
EricLew | 0:80ee8f3b695e | 1692 | */ |
EricLew | 0:80ee8f3b695e | 1693 | __STATIC_INLINE void LL_DMA_ClearFlag_TE7(DMA_TypeDef* DMAx) |
EricLew | 0:80ee8f3b695e | 1694 | { |
EricLew | 0:80ee8f3b695e | 1695 | SET_BIT(DMAx->IFCR, DMA_IFCR_CTEIF7); |
EricLew | 0:80ee8f3b695e | 1696 | } |
EricLew | 0:80ee8f3b695e | 1697 | |
EricLew | 0:80ee8f3b695e | 1698 | /** |
EricLew | 0:80ee8f3b695e | 1699 | * @} |
EricLew | 0:80ee8f3b695e | 1700 | */ |
EricLew | 0:80ee8f3b695e | 1701 | |
EricLew | 0:80ee8f3b695e | 1702 | /** @defgroup DMA_LL_EF_IT_Management IT_Management |
EricLew | 0:80ee8f3b695e | 1703 | * @{ |
EricLew | 0:80ee8f3b695e | 1704 | */ |
EricLew | 0:80ee8f3b695e | 1705 | /** |
EricLew | 0:80ee8f3b695e | 1706 | * @brief Enable Transfer complete interrupt. |
EricLew | 0:80ee8f3b695e | 1707 | * @rmtoll CCR TCIE LL_DMA_EnableIT_TC |
EricLew | 0:80ee8f3b695e | 1708 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1709 | * @param Channel This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 1710 | * @arg @ref LL_DMA_CHANNEL_1 |
EricLew | 0:80ee8f3b695e | 1711 | * @arg @ref LL_DMA_CHANNEL_2 |
EricLew | 0:80ee8f3b695e | 1712 | * @arg @ref LL_DMA_CHANNEL_3 |
EricLew | 0:80ee8f3b695e | 1713 | * @arg @ref LL_DMA_CHANNEL_4 |
EricLew | 0:80ee8f3b695e | 1714 | * @arg @ref LL_DMA_CHANNEL_5 |
EricLew | 0:80ee8f3b695e | 1715 | * @arg @ref LL_DMA_CHANNEL_6 |
EricLew | 0:80ee8f3b695e | 1716 | * @arg @ref LL_DMA_CHANNEL_7 |
EricLew | 0:80ee8f3b695e | 1717 | * @retval None |
EricLew | 0:80ee8f3b695e | 1718 | */ |
EricLew | 0:80ee8f3b695e | 1719 | __STATIC_INLINE void LL_DMA_EnableIT_TC(DMA_TypeDef *DMAx, uint32_t Channel) |
EricLew | 0:80ee8f3b695e | 1720 | { |
EricLew | 0:80ee8f3b695e | 1721 | SET_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1])))->CCR, DMA_CCR_TCIE); |
EricLew | 0:80ee8f3b695e | 1722 | } |
EricLew | 0:80ee8f3b695e | 1723 | |
EricLew | 0:80ee8f3b695e | 1724 | /** |
EricLew | 0:80ee8f3b695e | 1725 | * @brief Enable Half transfer interrupt. |
EricLew | 0:80ee8f3b695e | 1726 | * @rmtoll CCR HTIE LL_DMA_EnableIT_HT |
EricLew | 0:80ee8f3b695e | 1727 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1728 | * @param Channel This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 1729 | * @arg @ref LL_DMA_CHANNEL_1 |
EricLew | 0:80ee8f3b695e | 1730 | * @arg @ref LL_DMA_CHANNEL_2 |
EricLew | 0:80ee8f3b695e | 1731 | * @arg @ref LL_DMA_CHANNEL_3 |
EricLew | 0:80ee8f3b695e | 1732 | * @arg @ref LL_DMA_CHANNEL_4 |
EricLew | 0:80ee8f3b695e | 1733 | * @arg @ref LL_DMA_CHANNEL_5 |
EricLew | 0:80ee8f3b695e | 1734 | * @arg @ref LL_DMA_CHANNEL_6 |
EricLew | 0:80ee8f3b695e | 1735 | * @arg @ref LL_DMA_CHANNEL_7 |
EricLew | 0:80ee8f3b695e | 1736 | * @retval None |
EricLew | 0:80ee8f3b695e | 1737 | */ |
EricLew | 0:80ee8f3b695e | 1738 | __STATIC_INLINE void LL_DMA_EnableIT_HT(DMA_TypeDef *DMAx, uint32_t Channel) |
EricLew | 0:80ee8f3b695e | 1739 | { |
EricLew | 0:80ee8f3b695e | 1740 | SET_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1])))->CCR, DMA_CCR_HTIE); |
EricLew | 0:80ee8f3b695e | 1741 | } |
EricLew | 0:80ee8f3b695e | 1742 | |
EricLew | 0:80ee8f3b695e | 1743 | /** |
EricLew | 0:80ee8f3b695e | 1744 | * @brief Enable Transfer error interrupt. |
EricLew | 0:80ee8f3b695e | 1745 | * @rmtoll CCR TEIE LL_DMA_EnableIT_TE |
EricLew | 0:80ee8f3b695e | 1746 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1747 | * @param Channel This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 1748 | * @arg @ref LL_DMA_CHANNEL_1 |
EricLew | 0:80ee8f3b695e | 1749 | * @arg @ref LL_DMA_CHANNEL_2 |
EricLew | 0:80ee8f3b695e | 1750 | * @arg @ref LL_DMA_CHANNEL_3 |
EricLew | 0:80ee8f3b695e | 1751 | * @arg @ref LL_DMA_CHANNEL_4 |
EricLew | 0:80ee8f3b695e | 1752 | * @arg @ref LL_DMA_CHANNEL_5 |
EricLew | 0:80ee8f3b695e | 1753 | * @arg @ref LL_DMA_CHANNEL_6 |
EricLew | 0:80ee8f3b695e | 1754 | * @arg @ref LL_DMA_CHANNEL_7 |
EricLew | 0:80ee8f3b695e | 1755 | * @retval None |
EricLew | 0:80ee8f3b695e | 1756 | */ |
EricLew | 0:80ee8f3b695e | 1757 | __STATIC_INLINE void LL_DMA_EnableIT_TE(DMA_TypeDef *DMAx, uint32_t Channel) |
EricLew | 0:80ee8f3b695e | 1758 | { |
EricLew | 0:80ee8f3b695e | 1759 | SET_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1])))->CCR, DMA_CCR_TEIE); |
EricLew | 0:80ee8f3b695e | 1760 | } |
EricLew | 0:80ee8f3b695e | 1761 | |
EricLew | 0:80ee8f3b695e | 1762 | /** |
EricLew | 0:80ee8f3b695e | 1763 | * @brief Disable Transfer complete interrupt. |
EricLew | 0:80ee8f3b695e | 1764 | * @rmtoll CCR TCIE LL_DMA_DisableIT_TC |
EricLew | 0:80ee8f3b695e | 1765 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1766 | * @param Channel This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 1767 | * @arg @ref LL_DMA_CHANNEL_1 |
EricLew | 0:80ee8f3b695e | 1768 | * @arg @ref LL_DMA_CHANNEL_2 |
EricLew | 0:80ee8f3b695e | 1769 | * @arg @ref LL_DMA_CHANNEL_3 |
EricLew | 0:80ee8f3b695e | 1770 | * @arg @ref LL_DMA_CHANNEL_4 |
EricLew | 0:80ee8f3b695e | 1771 | * @arg @ref LL_DMA_CHANNEL_5 |
EricLew | 0:80ee8f3b695e | 1772 | * @arg @ref LL_DMA_CHANNEL_6 |
EricLew | 0:80ee8f3b695e | 1773 | * @arg @ref LL_DMA_CHANNEL_7 |
EricLew | 0:80ee8f3b695e | 1774 | * @retval None |
EricLew | 0:80ee8f3b695e | 1775 | */ |
EricLew | 0:80ee8f3b695e | 1776 | __STATIC_INLINE void LL_DMA_DisableIT_TC(DMA_TypeDef *DMAx, uint32_t Channel) |
EricLew | 0:80ee8f3b695e | 1777 | { |
EricLew | 0:80ee8f3b695e | 1778 | CLEAR_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1])))->CCR, DMA_CCR_TCIE); |
EricLew | 0:80ee8f3b695e | 1779 | } |
EricLew | 0:80ee8f3b695e | 1780 | |
EricLew | 0:80ee8f3b695e | 1781 | /** |
EricLew | 0:80ee8f3b695e | 1782 | * @brief Disable Half transfer interrupt. |
EricLew | 0:80ee8f3b695e | 1783 | * @rmtoll CCR HTIE LL_DMA_DisableIT_HT |
EricLew | 0:80ee8f3b695e | 1784 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1785 | * @param Channel This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 1786 | * @arg @ref LL_DMA_CHANNEL_1 |
EricLew | 0:80ee8f3b695e | 1787 | * @arg @ref LL_DMA_CHANNEL_2 |
EricLew | 0:80ee8f3b695e | 1788 | * @arg @ref LL_DMA_CHANNEL_3 |
EricLew | 0:80ee8f3b695e | 1789 | * @arg @ref LL_DMA_CHANNEL_4 |
EricLew | 0:80ee8f3b695e | 1790 | * @arg @ref LL_DMA_CHANNEL_5 |
EricLew | 0:80ee8f3b695e | 1791 | * @arg @ref LL_DMA_CHANNEL_6 |
EricLew | 0:80ee8f3b695e | 1792 | * @arg @ref LL_DMA_CHANNEL_7 |
EricLew | 0:80ee8f3b695e | 1793 | * @retval None |
EricLew | 0:80ee8f3b695e | 1794 | */ |
EricLew | 0:80ee8f3b695e | 1795 | __STATIC_INLINE void LL_DMA_DisableIT_HT(DMA_TypeDef *DMAx, uint32_t Channel) |
EricLew | 0:80ee8f3b695e | 1796 | { |
EricLew | 0:80ee8f3b695e | 1797 | CLEAR_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1])))->CCR, DMA_CCR_HTIE); |
EricLew | 0:80ee8f3b695e | 1798 | } |
EricLew | 0:80ee8f3b695e | 1799 | |
EricLew | 0:80ee8f3b695e | 1800 | /** |
EricLew | 0:80ee8f3b695e | 1801 | * @brief Disable Transfer error interrupt. |
EricLew | 0:80ee8f3b695e | 1802 | * @rmtoll CCR TEIE LL_DMA_DisableIT_TE |
EricLew | 0:80ee8f3b695e | 1803 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1804 | * @param Channel This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 1805 | * @arg @ref LL_DMA_CHANNEL_1 |
EricLew | 0:80ee8f3b695e | 1806 | * @arg @ref LL_DMA_CHANNEL_2 |
EricLew | 0:80ee8f3b695e | 1807 | * @arg @ref LL_DMA_CHANNEL_3 |
EricLew | 0:80ee8f3b695e | 1808 | * @arg @ref LL_DMA_CHANNEL_4 |
EricLew | 0:80ee8f3b695e | 1809 | * @arg @ref LL_DMA_CHANNEL_5 |
EricLew | 0:80ee8f3b695e | 1810 | * @arg @ref LL_DMA_CHANNEL_6 |
EricLew | 0:80ee8f3b695e | 1811 | * @arg @ref LL_DMA_CHANNEL_7 |
EricLew | 0:80ee8f3b695e | 1812 | * @retval None |
EricLew | 0:80ee8f3b695e | 1813 | */ |
EricLew | 0:80ee8f3b695e | 1814 | __STATIC_INLINE void LL_DMA_DisableIT_TE(DMA_TypeDef *DMAx, uint32_t Channel) |
EricLew | 0:80ee8f3b695e | 1815 | { |
EricLew | 0:80ee8f3b695e | 1816 | CLEAR_BIT(((DMA_Channel_TypeDef *)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel - 1])))->CCR, DMA_CCR_TEIE); |
EricLew | 0:80ee8f3b695e | 1817 | } |
EricLew | 0:80ee8f3b695e | 1818 | |
EricLew | 0:80ee8f3b695e | 1819 | /** |
EricLew | 0:80ee8f3b695e | 1820 | * @brief Check if Transfer complete Interrup is enabled. |
EricLew | 0:80ee8f3b695e | 1821 | * @rmtoll CCR TCIE LL_DMA_IsEnabledIT_TC |
EricLew | 0:80ee8f3b695e | 1822 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1823 | * @param Channel This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 1824 | * @arg @ref LL_DMA_CHANNEL_1 |
EricLew | 0:80ee8f3b695e | 1825 | * @arg @ref LL_DMA_CHANNEL_2 |
EricLew | 0:80ee8f3b695e | 1826 | * @arg @ref LL_DMA_CHANNEL_3 |
EricLew | 0:80ee8f3b695e | 1827 | * @arg @ref LL_DMA_CHANNEL_4 |
EricLew | 0:80ee8f3b695e | 1828 | * @arg @ref LL_DMA_CHANNEL_5 |
EricLew | 0:80ee8f3b695e | 1829 | * @arg @ref LL_DMA_CHANNEL_6 |
EricLew | 0:80ee8f3b695e | 1830 | * @arg @ref LL_DMA_CHANNEL_7 |
EricLew | 0:80ee8f3b695e | 1831 | * @retval State of bit (1 or 0). |
EricLew | 0:80ee8f3b695e | 1832 | */ |
EricLew | 0:80ee8f3b695e | 1833 | __STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_TC(DMA_TypeDef *DMAx, uint32_t Channel) |
EricLew | 0:80ee8f3b695e | 1834 | { |
EricLew | 0:80ee8f3b695e | 1835 | return (READ_BIT(((DMA_Channel_TypeDef*)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel-1])))->CCR, DMA_CCR_TCIE) == (DMA_CCR_TCIE)); |
EricLew | 0:80ee8f3b695e | 1836 | } |
EricLew | 0:80ee8f3b695e | 1837 | |
EricLew | 0:80ee8f3b695e | 1838 | /** |
EricLew | 0:80ee8f3b695e | 1839 | * @brief Check if Half transfer Interrup is enabled. |
EricLew | 0:80ee8f3b695e | 1840 | * @rmtoll CCR HTIE LL_DMA_IsEnabledIT_HT |
EricLew | 0:80ee8f3b695e | 1841 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1842 | * @param Channel This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 1843 | * @arg @ref LL_DMA_CHANNEL_1 |
EricLew | 0:80ee8f3b695e | 1844 | * @arg @ref LL_DMA_CHANNEL_2 |
EricLew | 0:80ee8f3b695e | 1845 | * @arg @ref LL_DMA_CHANNEL_3 |
EricLew | 0:80ee8f3b695e | 1846 | * @arg @ref LL_DMA_CHANNEL_4 |
EricLew | 0:80ee8f3b695e | 1847 | * @arg @ref LL_DMA_CHANNEL_5 |
EricLew | 0:80ee8f3b695e | 1848 | * @arg @ref LL_DMA_CHANNEL_6 |
EricLew | 0:80ee8f3b695e | 1849 | * @arg @ref LL_DMA_CHANNEL_7 |
EricLew | 0:80ee8f3b695e | 1850 | * @retval State of bit (1 or 0). |
EricLew | 0:80ee8f3b695e | 1851 | */ |
EricLew | 0:80ee8f3b695e | 1852 | __STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_HT(DMA_TypeDef *DMAx, uint32_t Channel) |
EricLew | 0:80ee8f3b695e | 1853 | { |
EricLew | 0:80ee8f3b695e | 1854 | return (READ_BIT(((DMA_Channel_TypeDef*)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel-1])))->CCR, DMA_CCR_HTIE) == (DMA_CCR_HTIE)); |
EricLew | 0:80ee8f3b695e | 1855 | } |
EricLew | 0:80ee8f3b695e | 1856 | |
EricLew | 0:80ee8f3b695e | 1857 | /** |
EricLew | 0:80ee8f3b695e | 1858 | * @brief Check if Transfer error Interrup is enabled. |
EricLew | 0:80ee8f3b695e | 1859 | * @rmtoll CCR TEIE LL_DMA_IsEnabledIT_TE |
EricLew | 0:80ee8f3b695e | 1860 | * @param DMAx DMAx Instance |
EricLew | 0:80ee8f3b695e | 1861 | * @param Channel This parameter can be one of the following values: |
EricLew | 0:80ee8f3b695e | 1862 | * @arg @ref LL_DMA_CHANNEL_1 |
EricLew | 0:80ee8f3b695e | 1863 | * @arg @ref LL_DMA_CHANNEL_2 |
EricLew | 0:80ee8f3b695e | 1864 | * @arg @ref LL_DMA_CHANNEL_3 |
EricLew | 0:80ee8f3b695e | 1865 | * @arg @ref LL_DMA_CHANNEL_4 |
EricLew | 0:80ee8f3b695e | 1866 | * @arg @ref LL_DMA_CHANNEL_5 |
EricLew | 0:80ee8f3b695e | 1867 | * @arg @ref LL_DMA_CHANNEL_6 |
EricLew | 0:80ee8f3b695e | 1868 | * @arg @ref LL_DMA_CHANNEL_7 |
EricLew | 0:80ee8f3b695e | 1869 | * @retval State of bit (1 or 0). |
EricLew | 0:80ee8f3b695e | 1870 | */ |
EricLew | 0:80ee8f3b695e | 1871 | __STATIC_INLINE uint32_t LL_DMA_IsEnabledIT_TE(DMA_TypeDef *DMAx, uint32_t Channel) |
EricLew | 0:80ee8f3b695e | 1872 | { |
EricLew | 0:80ee8f3b695e | 1873 | return (READ_BIT(((DMA_Channel_TypeDef*)((uint32_t)((uint32_t)DMAx + CHANNEL_OFFSET_TAB[Channel-1])))->CCR, DMA_CCR_TEIE) == (DMA_CCR_TEIE)); |
EricLew | 0:80ee8f3b695e | 1874 | } |
EricLew | 0:80ee8f3b695e | 1875 | |
EricLew | 0:80ee8f3b695e | 1876 | /** |
EricLew | 0:80ee8f3b695e | 1877 | * @} |
EricLew | 0:80ee8f3b695e | 1878 | */ |
EricLew | 0:80ee8f3b695e | 1879 | |
EricLew | 0:80ee8f3b695e | 1880 | |
EricLew | 0:80ee8f3b695e | 1881 | /** |
EricLew | 0:80ee8f3b695e | 1882 | * @} |
EricLew | 0:80ee8f3b695e | 1883 | */ |
EricLew | 0:80ee8f3b695e | 1884 | |
EricLew | 0:80ee8f3b695e | 1885 | /** |
EricLew | 0:80ee8f3b695e | 1886 | * @} |
EricLew | 0:80ee8f3b695e | 1887 | */ |
EricLew | 0:80ee8f3b695e | 1888 | |
EricLew | 0:80ee8f3b695e | 1889 | #endif /* DMA1 || DMA2 */ |
EricLew | 0:80ee8f3b695e | 1890 | |
EricLew | 0:80ee8f3b695e | 1891 | /** |
EricLew | 0:80ee8f3b695e | 1892 | * @} |
EricLew | 0:80ee8f3b695e | 1893 | */ |
EricLew | 0:80ee8f3b695e | 1894 | |
EricLew | 0:80ee8f3b695e | 1895 | #ifdef __cplusplus |
EricLew | 0:80ee8f3b695e | 1896 | } |
EricLew | 0:80ee8f3b695e | 1897 | #endif |
EricLew | 0:80ee8f3b695e | 1898 | |
EricLew | 0:80ee8f3b695e | 1899 | #endif /* __STM32L4xx_LL_DMA_H */ |
EricLew | 0:80ee8f3b695e | 1900 | |
EricLew | 0:80ee8f3b695e | 1901 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
EricLew | 0:80ee8f3b695e | 1902 |