STM32L4xx_HAL_Driver - Hal Drivers for L4

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Hal Drivers for L4

Dependents: BSP OneHopeOnePrayer FINAL_AUDIO_RECORD AudioDemo

Fork of STM32L4xx_HAL_Driver by Senior Design: Sound Monitor

Inc/stm32l4xx_ll_dac.h@2:7aef7655b0a8, 2015-11-25 (annotated)

Committer:: EricLew
Date:: Wed Nov 25 17:30:43 2015 +0000
Revision:: 2:7aef7655b0a8
Parent:: 0:80ee8f3b695e

commit;

Who changed what in which revision?

User	Revision	Line number	New contents of line
EricLew	0:80ee8f3b695e	1	/**
EricLew	0:80ee8f3b695e	2	******************************************************************************
EricLew	0:80ee8f3b695e	3	* @file stm32l4xx_ll_dac.h
EricLew	0:80ee8f3b695e	4	* @author MCD Application Team
EricLew	0:80ee8f3b695e	5	* @version V1.1.0
EricLew	0:80ee8f3b695e	6	* @date 16-September-2015
EricLew	0:80ee8f3b695e	7	* @brief Header file of DAC LL module.
EricLew	0:80ee8f3b695e	8	******************************************************************************
EricLew	0:80ee8f3b695e	9	* @attention
EricLew	0:80ee8f3b695e	10	*
EricLew	0:80ee8f3b695e	11	* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
EricLew	0:80ee8f3b695e	12	*
EricLew	0:80ee8f3b695e	13	* Redistribution and use in source and binary forms, with or without modification,
EricLew	0:80ee8f3b695e	14	* are permitted provided that the following conditions are met:
EricLew	0:80ee8f3b695e	15	* 1. Redistributions of source code must retain the above copyright notice,
EricLew	0:80ee8f3b695e	16	* this list of conditions and the following disclaimer.
EricLew	0:80ee8f3b695e	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
EricLew	0:80ee8f3b695e	18	* this list of conditions and the following disclaimer in the documentation
EricLew	0:80ee8f3b695e	19	* and/or other materials provided with the distribution.
EricLew	0:80ee8f3b695e	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
EricLew	0:80ee8f3b695e	21	* may be used to endorse or promote products derived from this software
EricLew	0:80ee8f3b695e	22	* without specific prior written permission.
EricLew	0:80ee8f3b695e	23	*
EricLew	0:80ee8f3b695e	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
EricLew	0:80ee8f3b695e	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
EricLew	0:80ee8f3b695e	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
EricLew	0:80ee8f3b695e	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
EricLew	0:80ee8f3b695e	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
EricLew	0:80ee8f3b695e	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
EricLew	0:80ee8f3b695e	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
EricLew	0:80ee8f3b695e	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
EricLew	0:80ee8f3b695e	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
EricLew	0:80ee8f3b695e	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
EricLew	0:80ee8f3b695e	34	*
EricLew	0:80ee8f3b695e	35	******************************************************************************
EricLew	0:80ee8f3b695e	36	*/
EricLew	0:80ee8f3b695e	37
EricLew	0:80ee8f3b695e	38	/* Define to prevent recursive inclusion -------------------------------------*/
EricLew	0:80ee8f3b695e	39	#ifndef __STM32L4xx_LL_DAC_H
EricLew	0:80ee8f3b695e	40	#define __STM32L4xx_LL_DAC_H
EricLew	0:80ee8f3b695e	41
EricLew	0:80ee8f3b695e	42	#ifdef __cplusplus
EricLew	0:80ee8f3b695e	43	extern "C" {
EricLew	0:80ee8f3b695e	44	#endif
EricLew	0:80ee8f3b695e	45
EricLew	0:80ee8f3b695e	46	/* Includes ------------------------------------------------------------------*/
EricLew	0:80ee8f3b695e	47	#include "stm32l4xx.h"
EricLew	0:80ee8f3b695e	48
EricLew	0:80ee8f3b695e	49	/** @addtogroup STM32L4xx_LL_Driver
EricLew	0:80ee8f3b695e	50	* @{
EricLew	0:80ee8f3b695e	51	*/
EricLew	0:80ee8f3b695e	52
EricLew	0:80ee8f3b695e	53	#if defined (DAC1)
EricLew	0:80ee8f3b695e	54
EricLew	0:80ee8f3b695e	55	/** @defgroup DAC_LL DAC
EricLew	0:80ee8f3b695e	56	* @{
EricLew	0:80ee8f3b695e	57	*/
EricLew	0:80ee8f3b695e	58
EricLew	0:80ee8f3b695e	59	/* Private types -------------------------------------------------------------*/
EricLew	0:80ee8f3b695e	60	/* Private variables ---------------------------------------------------------*/
EricLew	0:80ee8f3b695e	61
EricLew	0:80ee8f3b695e	62	/* Private constants ---------------------------------------------------------*/
EricLew	0:80ee8f3b695e	63	/** @defgroup DAC_LL_Private_Constants DAC Private Constants
EricLew	0:80ee8f3b695e	64	* @{
EricLew	0:80ee8f3b695e	65	*/
EricLew	0:80ee8f3b695e	66
EricLew	0:80ee8f3b695e	67	/* Internal masks for DAC channels definition */
EricLew	0:80ee8f3b695e	68	/* To select into literal LL_DAC_CHANNEL_x the relevant bits for: */
EricLew	0:80ee8f3b695e	69	/* - channel bits position into registers CR, MCR, CCR, SHHR, SHRR */
EricLew	0:80ee8f3b695e	70	/* - channel bits position into register SWTRIG */
EricLew	0:80ee8f3b695e	71	/* - channel register offset of data holding register */
EricLew	0:80ee8f3b695e	72	/* - channel register offset of data output register */
EricLew	0:80ee8f3b695e	73	/* - channel register offset of sample-and-hold time register */
EricLew	0:80ee8f3b695e	74
EricLew	0:80ee8f3b695e	75	#define DAC_CR_CH1_BITOFFSET ((uint32_t) 0) /* Position of channel bits into registers CR, MCR, CCR, SHHR, SHRR of channel 1 */
EricLew	0:80ee8f3b695e	76	#define DAC_CR_CH2_BITOFFSET ((uint32_t)16) /* Position of channel bits into registers CR, MCR, CCR, SHHR, SHRR of channel 2 */
EricLew	0:80ee8f3b695e	77	#define DAC_CR_CHx_BITOFFSET_MASK (DAC_CR_CH1_BITOFFSET \| DAC_CR_CH2_BITOFFSET)
EricLew	0:80ee8f3b695e	78
EricLew	0:80ee8f3b695e	79	#define DAC_SWTR_CH1 (DAC_SWTRIGR_SWTRIG1) /* Channel bit into register SWTRIGR of channel 1. This bit is into area of LL_DAC_CR_CHx_BITOFFSET but excluded by mask DAC_CR_CHx_BITOFFSET_MASK (done to be enable to trig SW start of both DAC channels simultaneously). */
EricLew	0:80ee8f3b695e	80	#define DAC_SWTR_CH2 (DAC_SWTRIGR_SWTRIG2) /* Channel bit into register SWTRIGR of channel 2. This bit is into area of LL_DAC_CR_CHx_BITOFFSET but excluded by mask DAC_CR_CHx_BITOFFSET_MASK (done to be enable to trig SW start of both DAC channels simultaneously). */
EricLew	0:80ee8f3b695e	81	#define DAC_SWTR_CHX_MASK (DAC_SWTR_CH1 \| DAC_SWTR_CH2)
EricLew	0:80ee8f3b695e	82
EricLew	0:80ee8f3b695e	83	#define DAC_REG_DHR12R1_REGOFFSET ((uint32_t)0x00000000) /* Register DHR12Rx channel 1 taken as reference */
EricLew	0:80ee8f3b695e	84	#define DAC_REG_DHR12R2_REGOFFSET ((uint32_t)0x00030000) /* Register offset of DHR12Lx channel 2 versus DHR12Rx channel 1 (shifted left of 16 bits) */
EricLew	0:80ee8f3b695e	85	#define DAC_REG_DHR12L1_REGOFFSET ((uint32_t)0x00100000) /* Register offset of DHR12Lx channel 1 versus DHR12Rx channel 1 (shifted left of 20 bits) */
EricLew	0:80ee8f3b695e	86	#define DAC_REG_DHR12L2_REGOFFSET ((uint32_t)0x00400000) /* Register offset of DHR12Lx channel 2 versus DHR12Rx channel 1 (shifted left of 20 bits) */
EricLew	0:80ee8f3b695e	87	#define DAC_REG_DHR8R1_REGOFFSET ((uint32_t)0x02000000) /* Register offset of DHR8Rx channel 1 versus DHR12Rx channel 1 (shifted left of 24 bits) */
EricLew	0:80ee8f3b695e	88	#define DAC_REG_DHR8R2_REGOFFSET ((uint32_t)0x05000000) /* Register offset of DHR8Rx channel 2 versus DHR12Rx channel 1 (shifted left of 24 bits) */
EricLew	0:80ee8f3b695e	89	#define DAC_REG_DHR12Rx_REGOFFSET_MASK (DAC_REG_DHR12R1_REGOFFSET \| DAC_REG_DHR12R2_REGOFFSET)
EricLew	0:80ee8f3b695e	90	#define DAC_REG_DHR12Lx_REGOFFSET_MASK (DAC_REG_DHR12L1_REGOFFSET \| DAC_REG_DHR12L2_REGOFFSET)
EricLew	0:80ee8f3b695e	91	#define DAC_REG_DHR8Rx_REGOFFSET_MASK (DAC_REG_DHR8R1_REGOFFSET \| DAC_REG_DHR8R2_REGOFFSET)
EricLew	0:80ee8f3b695e	92	#define DAC_REG_DHRx_REGOFFSET_MASK (DAC_REG_DHR12Rx_REGOFFSET_MASK \| DAC_REG_DHR12Lx_REGOFFSET_MASK \| DAC_REG_DHR8Rx_REGOFFSET_MASK)
EricLew	0:80ee8f3b695e	93
EricLew	0:80ee8f3b695e	94	#define DAC_REG_DOR1_REGOFFSET ((uint32_t)0x00000000) /* Register DORx channel 1 taken as reference */
EricLew	0:80ee8f3b695e	95	#define DAC_REG_DOR2_REGOFFSET ((uint32_t)0x10000000) /* Register offset of DORx channel 1 versus DORx channel 2 (shifted left of 28 bits) */
EricLew	0:80ee8f3b695e	96	#define DAC_REG_DORx_REGOFFSET_MASK (DAC_REG_DOR1_REGOFFSET \| DAC_REG_DOR2_REGOFFSET)
EricLew	0:80ee8f3b695e	97
EricLew	0:80ee8f3b695e	98	#define DAC_REG_SHSR1_REGOFFSET ((uint32_t)0x00000000) /* Register SHSRx channel 1 taken as reference */
EricLew	0:80ee8f3b695e	99	#define DAC_REG_SHSR2_REGOFFSET ((uint32_t)0x00001000) /* Register offset of SHSRx channel 1 versus SHSRx channel 2 (shifted left of 12 bits) */
EricLew	0:80ee8f3b695e	100	#define DAC_REG_SHSRx_REGOFFSET_MASK (DAC_REG_SHSR1_REGOFFSET \| DAC_REG_SHSR2_REGOFFSET)
EricLew	0:80ee8f3b695e	101
EricLew	0:80ee8f3b695e	102	/* Miscellaneous data */
EricLew	0:80ee8f3b695e	103	#define DAC_DIGITAL_SCALE_12BITS ((uint32_t)4095) /* Full-scale digital value with a resolution of 12 bits (voltage range determined by analog voltage references Vref+ and Vref-, refer to reference manual) */
EricLew	0:80ee8f3b695e	104
EricLew	0:80ee8f3b695e	105	/**
EricLew	0:80ee8f3b695e	106	* @}
EricLew	0:80ee8f3b695e	107	*/
EricLew	0:80ee8f3b695e	108
EricLew	0:80ee8f3b695e	109
EricLew	0:80ee8f3b695e	110	/* Private macros ------------------------------------------------------------*/
EricLew	0:80ee8f3b695e	111	/** @defgroup DAC_LL_Private_Macros DAC Private Macros
EricLew	0:80ee8f3b695e	112	* @{
EricLew	0:80ee8f3b695e	113	*/
EricLew	0:80ee8f3b695e	114
EricLew	0:80ee8f3b695e	115	/**
EricLew	0:80ee8f3b695e	116	* @brief Driver macro reserved for internal use: isolate bits with the
EricLew	0:80ee8f3b695e	117	* selected mask and shift them to the register LSB
EricLew	0:80ee8f3b695e	118	* (shift mask on register position bit 0).
EricLew	0:80ee8f3b695e	119	* @param __BITS__ Bits in register 32 bits
EricLew	0:80ee8f3b695e	120	* @param __MASK__ Mask in register 32 bits
EricLew	0:80ee8f3b695e	121	* @retval Bits in register 32 bits
EricLew	0:80ee8f3b695e	122	*/
EricLew	0:80ee8f3b695e	123	#define __DAC_MASK_SHIFT(__BITS__, __MASK__) \
EricLew	0:80ee8f3b695e	124	(((__BITS__) & (__MASK__)) >> POSITION_VAL((__MASK__)))
EricLew	0:80ee8f3b695e	125
EricLew	0:80ee8f3b695e	126	/**
EricLew	0:80ee8f3b695e	127	* @brief Driver macro reserved for internal use: set a pointer to
EricLew	0:80ee8f3b695e	128	* a register from a register basis from which an offset
EricLew	0:80ee8f3b695e	129	* is applied.
EricLew	0:80ee8f3b695e	130	* @param __REG__ Register basis from which the offset is applied.
EricLew	0:80ee8f3b695e	131	* @param __REG_OFFFSET__ Offset to be applied (unit: number of registers).
EricLew	0:80ee8f3b695e	132	* @retval Pointer to register address
EricLew	0:80ee8f3b695e	133	*/
EricLew	0:80ee8f3b695e	134	#define __DAC_PTR_REG_OFFSET(__REG__, __REG_OFFFSET__) \
EricLew	0:80ee8f3b695e	135	((uint32_t *)((uint32_t) ((uint32_t)(&(__REG__)) + ((__REG_OFFFSET__) << 2))))
EricLew	0:80ee8f3b695e	136
EricLew	0:80ee8f3b695e	137	/**
EricLew	0:80ee8f3b695e	138	* @}
EricLew	0:80ee8f3b695e	139	*/
EricLew	0:80ee8f3b695e	140
EricLew	0:80ee8f3b695e	141
EricLew	0:80ee8f3b695e	142	/* Exported types ------------------------------------------------------------*/
EricLew	0:80ee8f3b695e	143	/* Exported constants --------------------------------------------------------*/
EricLew	0:80ee8f3b695e	144	/** @defgroup DAC_LL_Exported_Constants DAC Exported Constants
EricLew	0:80ee8f3b695e	145	* @{
EricLew	0:80ee8f3b695e	146	*/
EricLew	0:80ee8f3b695e	147
EricLew	0:80ee8f3b695e	148	/** @defgroup DAC_LL_EC_GET_FLAG DAC flags
EricLew	0:80ee8f3b695e	149	* @brief Flags defines which can be used with LL_DAC_ReadReg function
EricLew	0:80ee8f3b695e	150	* @{
EricLew	0:80ee8f3b695e	151	*/
EricLew	0:80ee8f3b695e	152	#define LL_DAC_SR_CAL_FLAG1 (DAC_SR_CAL_FLAG1)
EricLew	0:80ee8f3b695e	153	#define LL_DAC_SR_CAL_FLAG2 (DAC_SR_CAL_FLAG2)
EricLew	0:80ee8f3b695e	154	#define LL_DAC_SR_BWST1 (DAC_SR_BWST1)
EricLew	0:80ee8f3b695e	155	#define LL_DAC_SR_BWST2 (DAC_SR_BWST2)
EricLew	0:80ee8f3b695e	156	#define LL_DAC_SR_DMAUDR1 (DAC_SR_DMAUDR1)
EricLew	0:80ee8f3b695e	157	#define LL_DAC_SR_DMAUDR2 (DAC_SR_DMAUDR2)
EricLew	0:80ee8f3b695e	158	/**
EricLew	0:80ee8f3b695e	159	* @}
EricLew	0:80ee8f3b695e	160	*/
EricLew	0:80ee8f3b695e	161
EricLew	0:80ee8f3b695e	162	/** @defgroup DAC_LL_EC_IT DAC interruptions
EricLew	0:80ee8f3b695e	163	* @brief IT defines which can be used with LL_DAC_ReadReg and LL_DAC_WriteReg functions
EricLew	0:80ee8f3b695e	164	* @{
EricLew	0:80ee8f3b695e	165	*/
EricLew	0:80ee8f3b695e	166	#define LL_DAC_CR_DMAUDRIE1 (DAC_CR_DMAUDRIE1) /!< DAC channel 1 interruption DMA underrun /
EricLew	0:80ee8f3b695e	167	#define LL_DAC_CR_DMAUDRIE2 (DAC_CR_DMAUDRIE2) /!< DAC channel 2 interruption DMA underrun /
EricLew	0:80ee8f3b695e	168	/**
EricLew	0:80ee8f3b695e	169	* @}
EricLew	0:80ee8f3b695e	170	*/
EricLew	0:80ee8f3b695e	171
EricLew	0:80ee8f3b695e	172	/** @defgroup DAC_LL_EC_CHANNEL DAC channels
EricLew	0:80ee8f3b695e	173	* @{
EricLew	0:80ee8f3b695e	174	*/
EricLew	0:80ee8f3b695e	175	#define LL_DAC_CHANNEL_1 (DAC_REG_SHSR1_REGOFFSET \| DAC_REG_DOR1_REGOFFSET \| DAC_REG_DHR12R1_REGOFFSET \| DAC_REG_DHR12L1_REGOFFSET \| DAC_REG_DHR8R1_REGOFFSET \| DAC_CR_CH1_BITOFFSET \| DAC_SWTR_CH1) /!< DAC channel 1 /
EricLew	0:80ee8f3b695e	176	#define LL_DAC_CHANNEL_2 (DAC_REG_SHSR2_REGOFFSET \| DAC_REG_DOR2_REGOFFSET \| DAC_REG_DHR12R2_REGOFFSET \| DAC_REG_DHR12L2_REGOFFSET \| DAC_REG_DHR8R2_REGOFFSET \| DAC_CR_CH2_BITOFFSET \| DAC_SWTR_CH2) /!< DAC channel 2 /
EricLew	0:80ee8f3b695e	177	/**
EricLew	0:80ee8f3b695e	178	* @}
EricLew	0:80ee8f3b695e	179	*/
EricLew	0:80ee8f3b695e	180
EricLew	0:80ee8f3b695e	181	/** @defgroup DAC_LL_EC_MODE DAC operating mode
EricLew	0:80ee8f3b695e	182	* @{
EricLew	0:80ee8f3b695e	183	*/
EricLew	0:80ee8f3b695e	184	#define LL_DAC_MODE_NORMAL_OPERATION ((uint32_t)0x00000000) /!< DAC channel in mode normal operation /
EricLew	0:80ee8f3b695e	185	#define LL_DAC_MODE_CALIBRATION (DAC_CR_CEN1) /!< DAC channel in mode calibration /
EricLew	0:80ee8f3b695e	186	/**
EricLew	0:80ee8f3b695e	187	* @}
EricLew	0:80ee8f3b695e	188	*/
EricLew	0:80ee8f3b695e	189
EricLew	0:80ee8f3b695e	190	/** @defgroup DAC_LL_EC_TRIGGER_SOURCE DAC trigger source
EricLew	0:80ee8f3b695e	191	* @{
EricLew	0:80ee8f3b695e	192	*/
EricLew	0:80ee8f3b695e	193	#define LL_DAC_TRIGGER_TIM2_TRGO (DAC_CR_TSEL1_2 ) /!< Conversion trigger selected as external trigger from TIM2 TRGO for the selected DAC channel /
EricLew	0:80ee8f3b695e	194	#define LL_DAC_TRIGGER_TIM4_TRGO (DAC_CR_TSEL1_2 \| DAC_CR_TSEL1_0) /!< Conversion trigger selected as external trigger from TIM4 TRGO for the selected DAC channel /
EricLew	0:80ee8f3b695e	195	#define LL_DAC_TRIGGER_TIM5_TRGO ( DAC_CR_TSEL1_1 \| DAC_CR_TSEL1_0) /!< Conversion trigger selected as external trigger from TIM5 TRGO for the selected DAC channel /
EricLew	0:80ee8f3b695e	196	#define LL_DAC_TRIGGER_TIM6_TRGO ((uint32_t)0x00000000) /!< Conversion trigger selected as external trigger from TIM6 TRGO for the selected DAC channel /
EricLew	0:80ee8f3b695e	197	#define LL_DAC_TRIGGER_TIM7_TRGO ( DAC_CR_TSEL1_1 ) /!< Conversion trigger selected as external trigger from TIM7 TRGO for the selected DAC channel /
EricLew	0:80ee8f3b695e	198	#define LL_DAC_TRIGGER_TIM8_TRGO ( DAC_CR_TSEL1_0) /!< Conversion trigger selected as external trigger from TIM8 TRGO for the selected DAC channel /
EricLew	0:80ee8f3b695e	199	#define LL_DAC_TRIGGER_EXT_IT9 (DAC_CR_TSEL1_2 \| DAC_CR_TSEL1_1 ) /!< Conversion trigger selected as external trigger from EXTI Line9 event for the selected DAC channel /
EricLew	0:80ee8f3b695e	200	#define LL_DAC_TRIGGER_SOFTWARE (DAC_CR_TSEL1_2 \| DAC_CR_TSEL1_1 \| DAC_CR_TSEL1_0) /!< Conversion trigger selected as internal SW start for the selected DAC channel /
EricLew	0:80ee8f3b695e	201	/**
EricLew	0:80ee8f3b695e	202	* @}
EricLew	0:80ee8f3b695e	203	*/
EricLew	0:80ee8f3b695e	204
EricLew	0:80ee8f3b695e	205	/** @defgroup DAC_LL_EC_WAVE_GENERATION_MODE DAC wave generation mode
EricLew	0:80ee8f3b695e	206	* @{
EricLew	0:80ee8f3b695e	207	*/
EricLew	0:80ee8f3b695e	208	#define LL_DAC_WAVEGENERATION_NONE ((uint32_t)0x00000000) /!< DAC channel wave generation mode disabled. /
EricLew	0:80ee8f3b695e	209	#define LL_DAC_WAVEGENERATION_NOISE (DAC_CR_WAVE1_0) /!< DAC channel wave generation mode enabled, set generated noise wave. /
EricLew	0:80ee8f3b695e	210	#define LL_DAC_WAVEGENERATION_TRIANGLE (DAC_CR_WAVE1_1) /!< DAC channel wave generation mode enabled, set generated triangle wave. /
EricLew	0:80ee8f3b695e	211	/**
EricLew	0:80ee8f3b695e	212	* @}
EricLew	0:80ee8f3b695e	213	*/
EricLew	0:80ee8f3b695e	214
EricLew	0:80ee8f3b695e	215	/** @defgroup DAC_LL_EC_NOISE_LFSR_UNMASK_BITS DAC wave generation - Noise LFSR unmask bits
EricLew	0:80ee8f3b695e	216	* @{
EricLew	0:80ee8f3b695e	217	*/
EricLew	0:80ee8f3b695e	218	#define LL_DAC_NOISE_LFSR_UNMASK_BIT0 ((uint32_t)0x00000000) /!< Noise wave generation, unmask LFSR bit0, for the selected DAC channel /
EricLew	0:80ee8f3b695e	219	#define LL_DAC_NOISE_LFSR_UNMASK_BITS1_0 ( DAC_CR_MAMP1_0) /!< Noise wave generation, unmask LFSR bits[1:0], for the selected DAC channel /
EricLew	0:80ee8f3b695e	220	#define LL_DAC_NOISE_LFSR_UNMASK_BITS2_0 ( DAC_CR_MAMP1_1 ) /!< Noise wave generation, unmask LFSR bits[2:0], for the selected DAC channel /
EricLew	0:80ee8f3b695e	221	#define LL_DAC_NOISE_LFSR_UNMASK_BITS3_0 ( DAC_CR_MAMP1_1 \| DAC_CR_MAMP1_0) /!< Noise wave generation, unmask LFSR bits[3:0], for the selected DAC channel /
EricLew	0:80ee8f3b695e	222	#define LL_DAC_NOISE_LFSR_UNMASK_BITS4_0 ( DAC_CR_MAMP1_2 ) /!< Noise wave generation, unmask LFSR bits[4:0], for the selected DAC channel /
EricLew	0:80ee8f3b695e	223	#define LL_DAC_NOISE_LFSR_UNMASK_BITS5_0 ( DAC_CR_MAMP1_2 \| DAC_CR_MAMP1_0) /!< Noise wave generation, unmask LFSR bits[5:0], for the selected DAC channel /
EricLew	0:80ee8f3b695e	224	#define LL_DAC_NOISE_LFSR_UNMASK_BITS6_0 ( DAC_CR_MAMP1_2 \| DAC_CR_MAMP1_1 ) /!< Noise wave generation, unmask LFSR bits[6:0], for the selected DAC channel /
EricLew	0:80ee8f3b695e	225	#define LL_DAC_NOISE_LFSR_UNMASK_BITS7_0 ( DAC_CR_MAMP1_2 \| DAC_CR_MAMP1_1 \| DAC_CR_MAMP1_0) /!< Noise wave generation, unmask LFSR bits[7:0], for the selected DAC channel /
EricLew	0:80ee8f3b695e	226	#define LL_DAC_NOISE_LFSR_UNMASK_BITS8_0 (DAC_CR_MAMP1_3 ) /!< Noise wave generation, unmask LFSR bits[8:0], for the selected DAC channel /
EricLew	0:80ee8f3b695e	227	#define LL_DAC_NOISE_LFSR_UNMASK_BITS9_0 (DAC_CR_MAMP1_3 \| DAC_CR_MAMP1_0) /!< Noise wave generation, unmask LFSR bits[9:0], for the selected DAC channel /
EricLew	0:80ee8f3b695e	228	#define LL_DAC_NOISE_LFSR_UNMASK_BITS10_0 (DAC_CR_MAMP1_3 \| DAC_CR_MAMP1_1 ) /!< Noise wave generation, unmask LFSR bits[10:0], for the selected DAC channel /
EricLew	0:80ee8f3b695e	229	#define LL_DAC_NOISE_LFSR_UNMASK_BITS11_0 (DAC_CR_MAMP1_3 \| DAC_CR_MAMP1_1 \| DAC_CR_MAMP1_0) /!< Noise wave generation, unmask LFSR bits[11:0], for the selected DAC channel /
EricLew	0:80ee8f3b695e	230	/**
EricLew	0:80ee8f3b695e	231	* @}
EricLew	0:80ee8f3b695e	232	*/
EricLew	0:80ee8f3b695e	233
EricLew	0:80ee8f3b695e	234	/** @defgroup DAC_LL_EC_TRIANGLE_AMPLITUDE DAC wave generation - Triangle amplitude
EricLew	0:80ee8f3b695e	235	* @{
EricLew	0:80ee8f3b695e	236	*/
EricLew	0:80ee8f3b695e	237	#define LL_DAC_TRIANGLE_AMPLITUDE_1 ((uint32_t)0x00000000) /!< Triangle wave generation, amplitude of 1 LSB of DAC output range, for the selected DAC channel /
EricLew	0:80ee8f3b695e	238	#define LL_DAC_TRIANGLE_AMPLITUDE_3 ( DAC_CR_MAMP1_0) /!< Triangle wave generation, amplitude of 3 LSB of DAC output range, for the selected DAC channel /
EricLew	0:80ee8f3b695e	239	#define LL_DAC_TRIANGLE_AMPLITUDE_7 ( DAC_CR_MAMP1_1 ) /!< Triangle wave generation, amplitude of 7 LSB of DAC output range, for the selected DAC channel /
EricLew	0:80ee8f3b695e	240	#define LL_DAC_TRIANGLE_AMPLITUDE_15 ( DAC_CR_MAMP1_1 \| DAC_CR_MAMP1_0) /!< Triangle wave generation, amplitude of 15 LSB of DAC output range, for the selected DAC channel /
EricLew	0:80ee8f3b695e	241	#define LL_DAC_TRIANGLE_AMPLITUDE_31 ( DAC_CR_MAMP1_2 ) /!< Triangle wave generation, amplitude of 31 LSB of DAC output range, for the selected DAC channel /
EricLew	0:80ee8f3b695e	242	#define LL_DAC_TRIANGLE_AMPLITUDE_63 ( DAC_CR_MAMP1_2 \| DAC_CR_MAMP1_0) /!< Triangle wave generation, amplitude of 63 LSB of DAC output range, for the selected DAC channel /
EricLew	0:80ee8f3b695e	243	#define LL_DAC_TRIANGLE_AMPLITUDE_127 ( DAC_CR_MAMP1_2 \| DAC_CR_MAMP1_1 ) /!< Triangle wave generation, amplitude of 127 LSB of DAC output range, for the selected DAC channel /
EricLew	0:80ee8f3b695e	244	#define LL_DAC_TRIANGLE_AMPLITUDE_255 ( DAC_CR_MAMP1_2 \| DAC_CR_MAMP1_1 \| DAC_CR_MAMP1_0) /!< Triangle wave generation, amplitude of 255 LSB of DAC output range, for the selected DAC channel /
EricLew	0:80ee8f3b695e	245	#define LL_DAC_TRIANGLE_AMPLITUDE_511 (DAC_CR_MAMP1_3 ) /!< Triangle wave generation, amplitude of 512 LSB of DAC output range, for the selected DAC channel /
EricLew	0:80ee8f3b695e	246	#define LL_DAC_TRIANGLE_AMPLITUDE_1023 (DAC_CR_MAMP1_3 \| DAC_CR_MAMP1_0) /!< Triangle wave generation, amplitude of 1023 LSB of DAC output range, for the selected DAC channel /
EricLew	0:80ee8f3b695e	247	#define LL_DAC_TRIANGLE_AMPLITUDE_2047 (DAC_CR_MAMP1_3 \| DAC_CR_MAMP1_1 ) /!< Triangle wave generation, amplitude of 2047 LSB of DAC output range, for the selected DAC channel /
EricLew	0:80ee8f3b695e	248	#define LL_DAC_TRIANGLE_AMPLITUDE_4095 (DAC_CR_MAMP1_3 \| DAC_CR_MAMP1_1 \| DAC_CR_MAMP1_0) /!< Triangle wave generation, amplitude of 4095 LSB of DAC output range, for the selected DAC channel /
EricLew	0:80ee8f3b695e	249	/**
EricLew	0:80ee8f3b695e	250	* @}
EricLew	0:80ee8f3b695e	251	*/
EricLew	0:80ee8f3b695e	252
EricLew	0:80ee8f3b695e	253	/** @defgroup DAC_LL_EC_OUTPUT_MODE DAC channel output mode
EricLew	0:80ee8f3b695e	254	* @{
EricLew	0:80ee8f3b695e	255	*/
EricLew	0:80ee8f3b695e	256	#define LL_DAC_OUTPUT_MODE_NORMAL ((uint32_t)0x00000000) /!< The selected DAC channel output is on normal mode /
EricLew	0:80ee8f3b695e	257	#define LL_DAC_OUTPUT_MODE_SAMPLE_AND_HOLD (DAC_MCR_MODE1_2) /!< The selected DAC channel output is on sample-and-hold mode /
EricLew	0:80ee8f3b695e	258	/**
EricLew	0:80ee8f3b695e	259	* @}
EricLew	0:80ee8f3b695e	260	*/
EricLew	0:80ee8f3b695e	261
EricLew	0:80ee8f3b695e	262	/** @defgroup DAC_LL_EC_OUTPUT_BUFFER DAC channel output buffer
EricLew	0:80ee8f3b695e	263	* @{
EricLew	0:80ee8f3b695e	264	*/
EricLew	0:80ee8f3b695e	265	#define LL_DAC_OUTPUT_BUFFER_ENABLE ((uint32_t)0x00000000) /!< The selected DAC channel output is buffered: higher drive current capability, but also higher current consumption /
EricLew	0:80ee8f3b695e	266	#define LL_DAC_OUTPUT_BUFFER_DISABLE (DAC_MCR_MODE1_1) /!< The selected DAC channel output is not buffered: lower drive current capability, but also lower current consumption /
EricLew	0:80ee8f3b695e	267	/**
EricLew	0:80ee8f3b695e	268	* @}
EricLew	0:80ee8f3b695e	269	*/
EricLew	0:80ee8f3b695e	270
EricLew	0:80ee8f3b695e	271	/** @defgroup DAC_LL_EC_OUTPUT_CONNECTION DAC channel output connection
EricLew	0:80ee8f3b695e	272	* @{
EricLew	0:80ee8f3b695e	273	*/
EricLew	0:80ee8f3b695e	274	#define LL_DAC_CONNECT_GPIO ((uint32_t)0x00000000) /!< The selected DAC channel output is connected to external pin /
EricLew	0:80ee8f3b695e	275	#define LL_DAC_CONNECT_INTERNAL (DAC_MCR_MODE1_0) /!< The selected DAC channel output is connected to on-chip peripherals via internal paths. On STM32L4, output connection depends on output mode (normal or sample and hold) and output buffer state. Refer to comments of function @ref LL_DAC_SetOutputConnection(). /
EricLew	0:80ee8f3b695e	276	/**
EricLew	0:80ee8f3b695e	277	* @}
EricLew	0:80ee8f3b695e	278	*/
EricLew	0:80ee8f3b695e	279
EricLew	0:80ee8f3b695e	280	/** @defgroup DAC_LL_EC_REGISTERS Registers compliant with specific purpose
EricLew	0:80ee8f3b695e	281	* @{
EricLew	0:80ee8f3b695e	282	*/
EricLew	0:80ee8f3b695e	283	/* List of DAC registers intended to be used (most commonly) with */
EricLew	0:80ee8f3b695e	284	/* DMA transfer. */
EricLew	0:80ee8f3b695e	285	/* Refer to function @ref LL_DAC_DMA_GetRegAddr(). */
EricLew	0:80ee8f3b695e	286	#define LL_DAC_DMA_REG_DATA_12BITS_RIGHT_ALIGNED DAC_REG_DHR12Rx_REGOFFSET_MASK /!< DAC channel data holding register 12 bits right aligned /
EricLew	0:80ee8f3b695e	287	#define LL_DAC_DMA_REG_DATA_12BITS_LEFT_ALIGNED DAC_REG_DHR12Lx_REGOFFSET_MASK /!< DAC channel data holding register 12 bits left aligned /
EricLew	0:80ee8f3b695e	288	#define LL_DAC_DMA_REG_DATA_8BITS_RIGHT_ALIGNED DAC_REG_DHR8Rx_REGOFFSET_MASK /!< DAC channel data holding register 8 bits right aligned /
EricLew	0:80ee8f3b695e	289	/**
EricLew	0:80ee8f3b695e	290	* @}
EricLew	0:80ee8f3b695e	291	*/
EricLew	0:80ee8f3b695e	292
EricLew	0:80ee8f3b695e	293	/**
EricLew	0:80ee8f3b695e	294	* @}
EricLew	0:80ee8f3b695e	295	*/
EricLew	0:80ee8f3b695e	296
EricLew	0:80ee8f3b695e	297	/* Exported macro ------------------------------------------------------------*/
EricLew	0:80ee8f3b695e	298	/** @defgroup DAC_LL_Exported_Macros DAC Exported Macros
EricLew	0:80ee8f3b695e	299	* @{
EricLew	0:80ee8f3b695e	300	*/
EricLew	0:80ee8f3b695e	301
EricLew	0:80ee8f3b695e	302	/** @defgroup DAC_LL_EM_WRITE_READ Common write and read registers macros
EricLew	0:80ee8f3b695e	303	* @{
EricLew	0:80ee8f3b695e	304	*/
EricLew	0:80ee8f3b695e	305
EricLew	0:80ee8f3b695e	306	/**
EricLew	0:80ee8f3b695e	307	* @brief Write a value in DAC register
EricLew	0:80ee8f3b695e	308	* @param __INSTANCE__ DAC Instance
EricLew	0:80ee8f3b695e	309	* @param __REG__ Register to be written
EricLew	0:80ee8f3b695e	310	* @param __VALUE__ Value to be written in the register
EricLew	0:80ee8f3b695e	311	* @retval None
EricLew	0:80ee8f3b695e	312	*/
EricLew	0:80ee8f3b695e	313	#define LL_DAC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
EricLew	0:80ee8f3b695e	314
EricLew	0:80ee8f3b695e	315	/**
EricLew	0:80ee8f3b695e	316	* @brief Read a value in DAC register
EricLew	0:80ee8f3b695e	317	* @param __INSTANCE__ DAC Instance
EricLew	0:80ee8f3b695e	318	* @param __REG__ Register to be read
EricLew	0:80ee8f3b695e	319	* @retval Register value
EricLew	0:80ee8f3b695e	320	*/
EricLew	0:80ee8f3b695e	321	#define LL_DAC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
EricLew	0:80ee8f3b695e	322
EricLew	0:80ee8f3b695e	323	/**
EricLew	0:80ee8f3b695e	324	* @}
EricLew	0:80ee8f3b695e	325	*/
EricLew	0:80ee8f3b695e	326
EricLew	0:80ee8f3b695e	327	/** @defgroup DAC_LL_EM_HELPER_MACRO DAC helper macro
EricLew	0:80ee8f3b695e	328	* @{
EricLew	0:80ee8f3b695e	329	*/
EricLew	0:80ee8f3b695e	330
EricLew	0:80ee8f3b695e	331	/**
EricLew	0:80ee8f3b695e	332	* @brief Helper macro to get DAC channel number in decimal format
EricLew	0:80ee8f3b695e	333	* from literals LL_DAC_CHANNEL_x.
EricLew	0:80ee8f3b695e	334	* Example:
EricLew	0:80ee8f3b695e	335	* __LL_DAC_CHANNEL_TO_DECIMAL_NB(LL_DAC_CHANNEL_1)
EricLew	0:80ee8f3b695e	336	* will return decimal number "1".
EricLew	0:80ee8f3b695e	337	* @note The input can be a value from functions where a channel
EricLew	0:80ee8f3b695e	338	* number is returned.
EricLew	0:80ee8f3b695e	339	* @param __CHANNEL__ This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	340	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	341	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	342	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	343	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	344	* @retval 1...2 (value "2" depending on DAC channel 2 availability)
EricLew	0:80ee8f3b695e	345	*/
EricLew	0:80ee8f3b695e	346	#define __LL_DAC_CHANNEL_TO_DECIMAL_NB(__CHANNEL__) \
EricLew	0:80ee8f3b695e	347	((__CHANNEL__) & DAC_SWTR_CHX_MASK)
EricLew	0:80ee8f3b695e	348
EricLew	0:80ee8f3b695e	349	/**
EricLew	0:80ee8f3b695e	350	* @brief Helper macro to get DAC channel in literal format LL_DAC_CHANNEL_x
EricLew	0:80ee8f3b695e	351	* from number in decimal format.
EricLew	0:80ee8f3b695e	352	* Example:
EricLew	0:80ee8f3b695e	353	* __LL_DAC_DECIMAL_NB_TO_CHANNEL(1)
EricLew	0:80ee8f3b695e	354	* will return a data equivalent to "LL_DAC_CHANNEL_1".
EricLew	0:80ee8f3b695e	355	* @param __DECIMAL_NB__ 1...2 (value "2" depending on DAC channel 2 availability)
EricLew	0:80ee8f3b695e	356	* @retval Returned value can be one of the following values:
EricLew	0:80ee8f3b695e	357	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	358	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	359	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	360	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	361	*/
EricLew	0:80ee8f3b695e	362	#define __LL_DAC_DECIMAL_NB_TO_CHANNEL(__DECIMAL_NB__) \
EricLew	0:80ee8f3b695e	363	(((__DECIMAL_NB__) == 1) \
EricLew	0:80ee8f3b695e	364	? ( \
EricLew	0:80ee8f3b695e	365	LL_DAC_CHANNEL_1 \
EricLew	0:80ee8f3b695e	366	) \
EricLew	0:80ee8f3b695e	367	: \
EricLew	0:80ee8f3b695e	368	( \
EricLew	0:80ee8f3b695e	369	LL_DAC_CHANNEL_2 \
EricLew	0:80ee8f3b695e	370	) \
EricLew	0:80ee8f3b695e	371	)
EricLew	0:80ee8f3b695e	372
EricLew	0:80ee8f3b695e	373	/**
EricLew	0:80ee8f3b695e	374	* @brief Helper macro to calculate the DAC conversion data (unit: digital
EricLew	0:80ee8f3b695e	375	* value) corresponding to a voltage (unit: mVolt).
EricLew	0:80ee8f3b695e	376	* @note DAC conversion data is set with a resolution of 12bits
EricLew	0:80ee8f3b695e	377	* (full scale digital value 4095), right aligned.
EricLew	0:80ee8f3b695e	378	* The data is formatted to be used with function
EricLew	0:80ee8f3b695e	379	* @ref LL_DAC_ConvertData12RightAligned().
EricLew	0:80ee8f3b695e	380	* @note Analog reference voltage (Vref+) must be either known from
EricLew	0:80ee8f3b695e	381	* user board environment or can be calculated using ADC measurement
EricLew	0:80ee8f3b695e	382	* and ADC helper macro "__LL_ADC_CALC_VREF_VOLTAGE()".
EricLew	0:80ee8f3b695e	383	* @param __VREF_VOLTAGE__ Analog reference voltage (unit: mV)
EricLew	0:80ee8f3b695e	384	* @param __DAC_VOLTAGE__ Voltage to be generated by DAC channel
EricLew	0:80ee8f3b695e	385	* (unit: mVolt).
EricLew	0:80ee8f3b695e	386	* @retval DAC conversion data (unit: digital value)
EricLew	0:80ee8f3b695e	387	*/
EricLew	0:80ee8f3b695e	388	#define __LL_DAC_CALC_DATA_VOLTAGE(__VREF_VOLTAGE__, __DAC_VOLTAGE__) \
EricLew	0:80ee8f3b695e	389	((__DAC_VOLTAGE__) * DAC_DIGITAL_SCALE_12BITS / (__VREF_VOLTAGE__))
EricLew	0:80ee8f3b695e	390
EricLew	0:80ee8f3b695e	391	/**
EricLew	0:80ee8f3b695e	392	* @}
EricLew	0:80ee8f3b695e	393	*/
EricLew	0:80ee8f3b695e	394
EricLew	0:80ee8f3b695e	395	/**
EricLew	0:80ee8f3b695e	396	* @}
EricLew	0:80ee8f3b695e	397	*/
EricLew	0:80ee8f3b695e	398
EricLew	0:80ee8f3b695e	399
EricLew	0:80ee8f3b695e	400	/* Exported functions --------------------------------------------------------*/
EricLew	0:80ee8f3b695e	401	/** @defgroup DAC_LL_Exported_Functions DAC Exported Functions
EricLew	0:80ee8f3b695e	402	* @{
EricLew	0:80ee8f3b695e	403	*/
EricLew	0:80ee8f3b695e	404	/** @defgroup DAC_LL_EF_Configuration Configuration of DAC channels
EricLew	0:80ee8f3b695e	405	* @{
EricLew	0:80ee8f3b695e	406	*/
EricLew	0:80ee8f3b695e	407
EricLew	0:80ee8f3b695e	408	/**
EricLew	0:80ee8f3b695e	409	* @brief Set the mode for the selected DAC channel: calibration or normal mode.
EricLew	0:80ee8f3b695e	410	* @rmtoll CR CEN1 LL_DAC_SetMode\n
EricLew	0:80ee8f3b695e	411	* CR CEN2 LL_DAC_SetMode
EricLew	0:80ee8f3b695e	412	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	413	* @param DAC_Channel This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	414	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	415	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	416	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	417	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	418	* @param ChannelMode This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	419	* @arg @ref LL_DAC_MODE_NORMAL_OPERATION
EricLew	0:80ee8f3b695e	420	* @arg @ref LL_DAC_MODE_CALIBRATION
EricLew	0:80ee8f3b695e	421	* @retval None
EricLew	0:80ee8f3b695e	422	*/
EricLew	0:80ee8f3b695e	423	__STATIC_INLINE void LL_DAC_SetMode(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t ChannelMode)
EricLew	0:80ee8f3b695e	424	{
EricLew	0:80ee8f3b695e	425	MODIFY_REG(DACx->CR,
EricLew	0:80ee8f3b695e	426	DAC_CR_CEN1 << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK),
EricLew	0:80ee8f3b695e	427	ChannelMode << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK));
EricLew	0:80ee8f3b695e	428	}
EricLew	0:80ee8f3b695e	429
EricLew	0:80ee8f3b695e	430	/**
EricLew	0:80ee8f3b695e	431	* @brief Get the mode for the selected DAC channel: calibration or normal mode.
EricLew	0:80ee8f3b695e	432	* @rmtoll CR CEN1 LL_DAC_GetMode\n
EricLew	0:80ee8f3b695e	433	* CR CEN2 LL_DAC_GetMode
EricLew	0:80ee8f3b695e	434	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	435	* @param DAC_Channel This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	436	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	437	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	438	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	439	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	440	* @retval Returned value can be one of the following values:
EricLew	0:80ee8f3b695e	441	* @arg @ref LL_DAC_MODE_NORMAL_OPERATION
EricLew	0:80ee8f3b695e	442	* @arg @ref LL_DAC_MODE_CALIBRATION
EricLew	0:80ee8f3b695e	443	*/
EricLew	0:80ee8f3b695e	444	__STATIC_INLINE uint32_t LL_DAC_GetMode(DAC_TypeDef *DACx, uint32_t DAC_Channel)
EricLew	0:80ee8f3b695e	445	{
EricLew	0:80ee8f3b695e	446	return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_CEN1 << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK))
EricLew	0:80ee8f3b695e	447	>> (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK)
EricLew	0:80ee8f3b695e	448	);
EricLew	0:80ee8f3b695e	449	}
EricLew	0:80ee8f3b695e	450
EricLew	0:80ee8f3b695e	451	/**
EricLew	0:80ee8f3b695e	452	* @brief Set the offset trimming value for the selected DAC channel.
EricLew	0:80ee8f3b695e	453	* Trimming has an impact when output buffer is enabled
EricLew	0:80ee8f3b695e	454	* and is intended to replace factory calibration default values.
EricLew	0:80ee8f3b695e	455	* @rmtoll CCR OTRIM1 LL_DAC_SetTrimmingValue\n
EricLew	0:80ee8f3b695e	456	* CCR OTRIM2 LL_DAC_SetTrimmingValue
EricLew	0:80ee8f3b695e	457	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	458	* @param DAC_Channel This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	459	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	460	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	461	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	462	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	463	* @param TrimmingValue 0x00...0x1F
EricLew	0:80ee8f3b695e	464	* @retval None
EricLew	0:80ee8f3b695e	465	*/
EricLew	0:80ee8f3b695e	466	__STATIC_INLINE void LL_DAC_SetTrimmingValue(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t TrimmingValue)
EricLew	0:80ee8f3b695e	467	{
EricLew	0:80ee8f3b695e	468	MODIFY_REG(DACx->CCR,
EricLew	0:80ee8f3b695e	469	DAC_CCR_OTRIM1 << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK),
EricLew	0:80ee8f3b695e	470	TrimmingValue << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK));
EricLew	0:80ee8f3b695e	471	}
EricLew	0:80ee8f3b695e	472
EricLew	0:80ee8f3b695e	473	/**
EricLew	0:80ee8f3b695e	474	* @brief Get the offset trimming value for the selected DAC channel.
EricLew	0:80ee8f3b695e	475	* Trimming has an impact when output buffer is enabled
EricLew	0:80ee8f3b695e	476	* and is intended to replace factory calibration default values.
EricLew	0:80ee8f3b695e	477	* @rmtoll CCR OTRIM1 LL_DAC_GetTrimmingValue\n
EricLew	0:80ee8f3b695e	478	* CCR OTRIM2 LL_DAC_GetTrimmingValue
EricLew	0:80ee8f3b695e	479	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	480	* @param DAC_Channel This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	481	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	482	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	483	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	484	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	485	* @retval TrimmingValue 0x00...0x1F
EricLew	0:80ee8f3b695e	486	*/
EricLew	0:80ee8f3b695e	487	__STATIC_INLINE uint32_t LL_DAC_GetTrimmingValue(DAC_TypeDef *DACx, uint32_t DAC_Channel)
EricLew	0:80ee8f3b695e	488	{
EricLew	0:80ee8f3b695e	489	return (uint32_t)(READ_BIT(DACx->CCR, DAC_CCR_OTRIM1 << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK))
EricLew	0:80ee8f3b695e	490	>> (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK)
EricLew	0:80ee8f3b695e	491	);
EricLew	0:80ee8f3b695e	492	}
EricLew	0:80ee8f3b695e	493
EricLew	0:80ee8f3b695e	494	/**
EricLew	0:80ee8f3b695e	495	* @brief Set the conversion trigger source for the selected DAC channel.
EricLew	0:80ee8f3b695e	496	* @note For conversion trigger source to be effective, DAC trigger
EricLew	0:80ee8f3b695e	497	* must be enabled using function @ref LL_DAC_EnableTrigger().
EricLew	0:80ee8f3b695e	498	* @note To set conversion trigger source, DAC channel must be disabled.
EricLew	0:80ee8f3b695e	499	* Otherwise, the setting is discarded.
EricLew	0:80ee8f3b695e	500	* @rmtoll CR TSEL1 LL_DAC_SetTriggerSource\n
EricLew	0:80ee8f3b695e	501	* CR TSEL2 LL_DAC_SetTriggerSource
EricLew	0:80ee8f3b695e	502	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	503	* @param DAC_Channel This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	504	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	505	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	506	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	507	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	508	* @param DAC_Trigger This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	509	* @arg @ref LL_DAC_TRIGGER_TIM2_TRGO
EricLew	0:80ee8f3b695e	510	* @arg @ref LL_DAC_TRIGGER_TIM4_TRGO
EricLew	0:80ee8f3b695e	511	* @arg @ref LL_DAC_TRIGGER_TIM5_TRGO
EricLew	0:80ee8f3b695e	512	* @arg @ref LL_DAC_TRIGGER_TIM6_TRGO
EricLew	0:80ee8f3b695e	513	* @arg @ref LL_DAC_TRIGGER_TIM7_TRGO
EricLew	0:80ee8f3b695e	514	* @arg @ref LL_DAC_TRIGGER_TIM8_TRGO
EricLew	0:80ee8f3b695e	515	* @arg @ref LL_DAC_TRIGGER_EXT_IT9
EricLew	0:80ee8f3b695e	516	* @arg @ref LL_DAC_TRIGGER_SOFTWARE
EricLew	0:80ee8f3b695e	517	* @retval None
EricLew	0:80ee8f3b695e	518	*/
EricLew	0:80ee8f3b695e	519	__STATIC_INLINE void LL_DAC_SetTriggerSource(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t DAC_Trigger)
EricLew	0:80ee8f3b695e	520	{
EricLew	0:80ee8f3b695e	521	MODIFY_REG(DACx->CR,
EricLew	0:80ee8f3b695e	522	DAC_CR_TSEL1 << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK),
EricLew	0:80ee8f3b695e	523	DAC_Trigger << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK));
EricLew	0:80ee8f3b695e	524	}
EricLew	0:80ee8f3b695e	525
EricLew	0:80ee8f3b695e	526	/**
EricLew	0:80ee8f3b695e	527	* @brief Get the conversion trigger source for the selected DAC channel.
EricLew	0:80ee8f3b695e	528	* @note For conversion trigger source to be effective, DAC trigger
EricLew	0:80ee8f3b695e	529	* must be enabled using function @ref LL_DAC_EnableTrigger().
EricLew	0:80ee8f3b695e	530	* @rmtoll CR TSEL1 LL_DAC_GetTriggerSource\n
EricLew	0:80ee8f3b695e	531	* CR TSEL2 LL_DAC_GetTriggerSource
EricLew	0:80ee8f3b695e	532	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	533	* @param DAC_Channel This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	534	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	535	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	536	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	537	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	538	* @retval Returned value can be one of the following values:
EricLew	0:80ee8f3b695e	539	* @arg @ref LL_DAC_TRIGGER_TIM2_TRGO
EricLew	0:80ee8f3b695e	540	* @arg @ref LL_DAC_TRIGGER_TIM4_TRGO
EricLew	0:80ee8f3b695e	541	* @arg @ref LL_DAC_TRIGGER_TIM5_TRGO
EricLew	0:80ee8f3b695e	542	* @arg @ref LL_DAC_TRIGGER_TIM6_TRGO
EricLew	0:80ee8f3b695e	543	* @arg @ref LL_DAC_TRIGGER_TIM7_TRGO
EricLew	0:80ee8f3b695e	544	* @arg @ref LL_DAC_TRIGGER_TIM8_TRGO
EricLew	0:80ee8f3b695e	545	* @arg @ref LL_DAC_TRIGGER_EXT_IT9
EricLew	0:80ee8f3b695e	546	* @arg @ref LL_DAC_TRIGGER_SOFTWARE
EricLew	0:80ee8f3b695e	547	*/
EricLew	0:80ee8f3b695e	548	__STATIC_INLINE uint32_t LL_DAC_GetTriggerSource(DAC_TypeDef *DACx, uint32_t DAC_Channel)
EricLew	0:80ee8f3b695e	549	{
EricLew	0:80ee8f3b695e	550	return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_TSEL1 << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK))
EricLew	0:80ee8f3b695e	551	>> (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK)
EricLew	0:80ee8f3b695e	552	);
EricLew	0:80ee8f3b695e	553	}
EricLew	0:80ee8f3b695e	554
EricLew	0:80ee8f3b695e	555	/**
EricLew	0:80ee8f3b695e	556	* @brief Set the wave generation mode for the selected DAC channel.
EricLew	0:80ee8f3b695e	557	* @rmtoll CR WAVE1 LL_DAC_SetWaveMode\n
EricLew	0:80ee8f3b695e	558	* CR WAVE2 LL_DAC_SetWaveMode
EricLew	0:80ee8f3b695e	559	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	560	* @param DAC_Channel This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	561	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	562	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	563	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	564	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	565	* @param WaveMode This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	566	* @arg @ref LL_DAC_WAVEGENERATION_NONE
EricLew	0:80ee8f3b695e	567	* @arg @ref LL_DAC_WAVEGENERATION_NOISE
EricLew	0:80ee8f3b695e	568	* @arg @ref LL_DAC_WAVEGENERATION_TRIANGLE
EricLew	0:80ee8f3b695e	569	* @retval None
EricLew	0:80ee8f3b695e	570	*/
EricLew	0:80ee8f3b695e	571	__STATIC_INLINE void LL_DAC_SetWaveMode(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t WaveMode)
EricLew	0:80ee8f3b695e	572	{
EricLew	0:80ee8f3b695e	573	MODIFY_REG(DACx->CR,
EricLew	0:80ee8f3b695e	574	DAC_CR_WAVE1 << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK),
EricLew	0:80ee8f3b695e	575	WaveMode << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK));
EricLew	0:80ee8f3b695e	576	}
EricLew	0:80ee8f3b695e	577
EricLew	0:80ee8f3b695e	578	/**
EricLew	0:80ee8f3b695e	579	* @brief Get the wave generation mode for the selected DAC channel.
EricLew	0:80ee8f3b695e	580	* @rmtoll CR WAVE1 LL_DAC_GetWaveMode\n
EricLew	0:80ee8f3b695e	581	* CR WAVE2 LL_DAC_GetWaveMode
EricLew	0:80ee8f3b695e	582	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	583	* @param DAC_Channel This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	584	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	585	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	586	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	587	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	588	* @retval Returned value can be one of the following values:
EricLew	0:80ee8f3b695e	589	* @arg @ref LL_DAC_WAVEGENERATION_NONE
EricLew	0:80ee8f3b695e	590	* @arg @ref LL_DAC_WAVEGENERATION_NOISE
EricLew	0:80ee8f3b695e	591	* @arg @ref LL_DAC_WAVEGENERATION_TRIANGLE
EricLew	0:80ee8f3b695e	592	*/
EricLew	0:80ee8f3b695e	593	__STATIC_INLINE uint32_t LL_DAC_GetWaveMode(DAC_TypeDef *DACx, uint32_t DAC_Channel)
EricLew	0:80ee8f3b695e	594	{
EricLew	0:80ee8f3b695e	595	return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_WAVE1 << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK))
EricLew	0:80ee8f3b695e	596	>> (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK)
EricLew	0:80ee8f3b695e	597	);
EricLew	0:80ee8f3b695e	598	}
EricLew	0:80ee8f3b695e	599
EricLew	0:80ee8f3b695e	600	/**
EricLew	0:80ee8f3b695e	601	* @brief Set the noise generation for the selected DAC channel:
EricLew	0:80ee8f3b695e	602	* Noise mode and parameters LFSR (linear feedback shift register).
EricLew	0:80ee8f3b695e	603	* @note For wave generation to be effective, DAC channel wave generation
EricLew	0:80ee8f3b695e	604	* mode must be enabled using function @ref LL_DAC_SetWaveMode().
EricLew	0:80ee8f3b695e	605	* @note This setting can be set when the selected DAC channel is disabled
EricLew	0:80ee8f3b695e	606	* (otherwise, the setting operation is ignored).
EricLew	0:80ee8f3b695e	607	* @rmtoll CR MAMP1 LL_DAC_SetWaveNoiseLFSR\n
EricLew	0:80ee8f3b695e	608	* CR MAMP2 LL_DAC_SetWaveNoiseLFSR
EricLew	0:80ee8f3b695e	609	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	610	* @param DAC_Channel This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	611	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	612	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	613	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	614	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	615	* @param NoiseLFSRMask This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	616	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BIT0
EricLew	0:80ee8f3b695e	617	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS1_0
EricLew	0:80ee8f3b695e	618	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS2_0
EricLew	0:80ee8f3b695e	619	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS3_0
EricLew	0:80ee8f3b695e	620	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS4_0
EricLew	0:80ee8f3b695e	621	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS5_0
EricLew	0:80ee8f3b695e	622	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS6_0
EricLew	0:80ee8f3b695e	623	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS7_0
EricLew	0:80ee8f3b695e	624	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS8_0
EricLew	0:80ee8f3b695e	625	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS9_0
EricLew	0:80ee8f3b695e	626	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS10_0
EricLew	0:80ee8f3b695e	627	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS11_0
EricLew	0:80ee8f3b695e	628	* @retval None
EricLew	0:80ee8f3b695e	629	*/
EricLew	0:80ee8f3b695e	630	__STATIC_INLINE void LL_DAC_SetWaveNoiseLFSR(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t NoiseLFSRMask)
EricLew	0:80ee8f3b695e	631	{
EricLew	0:80ee8f3b695e	632	MODIFY_REG(DACx->CR,
EricLew	0:80ee8f3b695e	633	DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK),
EricLew	0:80ee8f3b695e	634	NoiseLFSRMask << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK));
EricLew	0:80ee8f3b695e	635	}
EricLew	0:80ee8f3b695e	636
EricLew	0:80ee8f3b695e	637	/**
EricLew	0:80ee8f3b695e	638	* @brief Set the noise generation for the selected DAC channel:
EricLew	0:80ee8f3b695e	639	* Noise mode and parameters LFSR (linear feedback shift register).
EricLew	0:80ee8f3b695e	640	* @rmtoll CR MAMP1 LL_DAC_GetWaveNoiseLFSR\n
EricLew	0:80ee8f3b695e	641	* CR MAMP2 LL_DAC_GetWaveNoiseLFSR
EricLew	0:80ee8f3b695e	642	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	643	* @param DAC_Channel This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	644	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	645	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	646	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	647	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	648	* @retval Returned value can be one of the following values:
EricLew	0:80ee8f3b695e	649	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BIT0
EricLew	0:80ee8f3b695e	650	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS1_0
EricLew	0:80ee8f3b695e	651	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS2_0
EricLew	0:80ee8f3b695e	652	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS3_0
EricLew	0:80ee8f3b695e	653	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS4_0
EricLew	0:80ee8f3b695e	654	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS5_0
EricLew	0:80ee8f3b695e	655	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS6_0
EricLew	0:80ee8f3b695e	656	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS7_0
EricLew	0:80ee8f3b695e	657	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS8_0
EricLew	0:80ee8f3b695e	658	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS9_0
EricLew	0:80ee8f3b695e	659	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS10_0
EricLew	0:80ee8f3b695e	660	* @arg @ref LL_DAC_NOISE_LFSR_UNMASK_BITS11_0
EricLew	0:80ee8f3b695e	661	*/
EricLew	0:80ee8f3b695e	662	__STATIC_INLINE uint32_t LL_DAC_GetWaveNoiseLFSR(DAC_TypeDef *DACx, uint32_t DAC_Channel)
EricLew	0:80ee8f3b695e	663	{
EricLew	0:80ee8f3b695e	664	return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK))
EricLew	0:80ee8f3b695e	665	>> (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK)
EricLew	0:80ee8f3b695e	666	);
EricLew	0:80ee8f3b695e	667	}
EricLew	0:80ee8f3b695e	668
EricLew	0:80ee8f3b695e	669	/**
EricLew	0:80ee8f3b695e	670	* @brief Set the triangle generation for the selected DAC channel:
EricLew	0:80ee8f3b695e	671	* triangle mode and amplitude.
EricLew	0:80ee8f3b695e	672	* @note For wave generation to be effective, DAC channel wave generation
EricLew	0:80ee8f3b695e	673	* mode must be enabled using function @ref LL_DAC_SetWaveMode().
EricLew	0:80ee8f3b695e	674	* @note This setting can be set when the selected DAC channel is disabled
EricLew	0:80ee8f3b695e	675	* (otherwise, the setting operation is ignored).
EricLew	0:80ee8f3b695e	676	* @rmtoll CR MAMP1 LL_DAC_SetWaveTriangleAmplitude\n
EricLew	0:80ee8f3b695e	677	* CR MAMP2 LL_DAC_SetWaveTriangleAmplitude
EricLew	0:80ee8f3b695e	678	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	679	* @param DAC_Channel This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	680	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	681	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	682	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	683	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	684	* @param TriangleAmplitude This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	685	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_1
EricLew	0:80ee8f3b695e	686	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_3
EricLew	0:80ee8f3b695e	687	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_7
EricLew	0:80ee8f3b695e	688	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_15
EricLew	0:80ee8f3b695e	689	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_31
EricLew	0:80ee8f3b695e	690	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_63
EricLew	0:80ee8f3b695e	691	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_127
EricLew	0:80ee8f3b695e	692	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_255
EricLew	0:80ee8f3b695e	693	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_511
EricLew	0:80ee8f3b695e	694	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_1023
EricLew	0:80ee8f3b695e	695	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_2047
EricLew	0:80ee8f3b695e	696	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_4095
EricLew	0:80ee8f3b695e	697	* @retval None
EricLew	0:80ee8f3b695e	698	*/
EricLew	0:80ee8f3b695e	699	__STATIC_INLINE void LL_DAC_SetWaveTriangleAmplitude(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t TriangleAmplitude)
EricLew	0:80ee8f3b695e	700	{
EricLew	0:80ee8f3b695e	701	MODIFY_REG(DACx->CR,
EricLew	0:80ee8f3b695e	702	DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK),
EricLew	0:80ee8f3b695e	703	TriangleAmplitude << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK));
EricLew	0:80ee8f3b695e	704	}
EricLew	0:80ee8f3b695e	705
EricLew	0:80ee8f3b695e	706	/**
EricLew	0:80ee8f3b695e	707	* @brief Set the triangle generation for the selected DAC channel:
EricLew	0:80ee8f3b695e	708	* triangle mode and amplitude.
EricLew	0:80ee8f3b695e	709	* @rmtoll CR MAMP1 LL_DAC_GetWaveTriangleAmplitude\n
EricLew	0:80ee8f3b695e	710	* CR MAMP2 LL_DAC_GetWaveTriangleAmplitude
EricLew	0:80ee8f3b695e	711	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	712	* @param DAC_Channel This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	713	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	714	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	715	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	716	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	717	* @retval Returned value can be one of the following values:
EricLew	0:80ee8f3b695e	718	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_1
EricLew	0:80ee8f3b695e	719	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_3
EricLew	0:80ee8f3b695e	720	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_7
EricLew	0:80ee8f3b695e	721	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_15
EricLew	0:80ee8f3b695e	722	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_31
EricLew	0:80ee8f3b695e	723	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_63
EricLew	0:80ee8f3b695e	724	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_127
EricLew	0:80ee8f3b695e	725	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_255
EricLew	0:80ee8f3b695e	726	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_511
EricLew	0:80ee8f3b695e	727	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_1023
EricLew	0:80ee8f3b695e	728	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_2047
EricLew	0:80ee8f3b695e	729	* @arg @ref LL_DAC_TRIANGLE_AMPLITUDE_4095
EricLew	0:80ee8f3b695e	730	*/
EricLew	0:80ee8f3b695e	731	__STATIC_INLINE uint32_t LL_DAC_GetWaveTriangleAmplitude(DAC_TypeDef *DACx, uint32_t DAC_Channel)
EricLew	0:80ee8f3b695e	732	{
EricLew	0:80ee8f3b695e	733	return (uint32_t)(READ_BIT(DACx->CR, DAC_CR_MAMP1 << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK))
EricLew	0:80ee8f3b695e	734	>> (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK)
EricLew	0:80ee8f3b695e	735	);
EricLew	0:80ee8f3b695e	736	}
EricLew	0:80ee8f3b695e	737
EricLew	0:80ee8f3b695e	738	/**
EricLew	0:80ee8f3b695e	739	* @brief Set the output for the selected DAC channel:
EricLew	0:80ee8f3b695e	740	* * mode normal or sample-and-hold
EricLew	0:80ee8f3b695e	741	* * buffer
EricLew	0:80ee8f3b695e	742	* * connection to GPIO or internal path.
EricLew	0:80ee8f3b695e	743	* @note these settings can also be set individually using
EricLew	0:80ee8f3b695e	744	* dedicated functions:
EricLew	0:80ee8f3b695e	745	* - @ref LL_DAC_SetOutputBuffer()
EricLew	0:80ee8f3b695e	746	* - @ref LL_DAC_SetOutputMode()
EricLew	0:80ee8f3b695e	747	* - @ref LL_DAC_SetOutputConnection()
EricLew	0:80ee8f3b695e	748	* @note On this STM32 family, output connection depends on output mode (normal or
EricLew	0:80ee8f3b695e	749	* sample and hold) and output buffer state.
EricLew	0:80ee8f3b695e	750	* - if output connection is set to internal path and output buffer
EricLew	0:80ee8f3b695e	751	* is enabled (whatever output mode):
EricLew	0:80ee8f3b695e	752	* output connection is also connected to GPIO pin
EricLew	0:80ee8f3b695e	753	* (both connections to GPIO pin and internal path).
EricLew	0:80ee8f3b695e	754	* - if output connection is set to GPIO pin, output buffer
EricLew	0:80ee8f3b695e	755	* is disabled, output mode set to sample and hold:
EricLew	0:80ee8f3b695e	756	* output connection is also connected to internal path
EricLew	0:80ee8f3b695e	757	* (both connections to GPIO pin and internal path).
EricLew	0:80ee8f3b695e	758	* @rmtoll CR MODE1 LL_DAC_ConfigOutput\n
EricLew	0:80ee8f3b695e	759	* CR MODE2 LL_DAC_ConfigOutput
EricLew	0:80ee8f3b695e	760	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	761	* @param DAC_Channel This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	762	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	763	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	764	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	765	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	766	* @param OutputMode This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	767	* @arg @ref LL_DAC_OUTPUT_MODE_NORMAL
EricLew	0:80ee8f3b695e	768	* @arg @ref LL_DAC_OUTPUT_MODE_SAMPLE_AND_HOLD
EricLew	0:80ee8f3b695e	769	* @param OutputBuffer This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	770	* @arg @ref LL_DAC_OUTPUT_BUFFER_ENABLE
EricLew	0:80ee8f3b695e	771	* @arg @ref LL_DAC_OUTPUT_BUFFER_DISABLE
EricLew	0:80ee8f3b695e	772	* @param OutputConnection This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	773	* @arg @ref LL_DAC_CONNECT_GPIO
EricLew	0:80ee8f3b695e	774	* @arg @ref LL_DAC_CONNECT_INTERNAL
EricLew	0:80ee8f3b695e	775	* @retval None
EricLew	0:80ee8f3b695e	776	*/
EricLew	0:80ee8f3b695e	777	__STATIC_INLINE void LL_DAC_ConfigOutput(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t OutputMode, uint32_t OutputBuffer, uint32_t OutputConnection)
EricLew	0:80ee8f3b695e	778	{
EricLew	0:80ee8f3b695e	779	MODIFY_REG(DACx->MCR,
EricLew	0:80ee8f3b695e	780	(DAC_MCR_MODE1_2 \| DAC_MCR_MODE1_1 \| DAC_MCR_MODE1_0) << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK),
EricLew	0:80ee8f3b695e	781	(OutputMode \| OutputBuffer \| OutputConnection) << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK));
EricLew	0:80ee8f3b695e	782	}
EricLew	0:80ee8f3b695e	783
EricLew	0:80ee8f3b695e	784	/**
EricLew	0:80ee8f3b695e	785	* @brief Set the output mode normal or sample-and-hold for the selected DAC channel.
EricLew	0:80ee8f3b695e	786	* @rmtoll CR MODE1 LL_DAC_SetOutputMode\n
EricLew	0:80ee8f3b695e	787	* CR MODE2 LL_DAC_SetOutputMode
EricLew	0:80ee8f3b695e	788	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	789	* @param DAC_Channel This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	790	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	791	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	792	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	793	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	794	* @param OutputMode This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	795	* @arg @ref LL_DAC_OUTPUT_MODE_NORMAL
EricLew	0:80ee8f3b695e	796	* @arg @ref LL_DAC_OUTPUT_MODE_SAMPLE_AND_HOLD
EricLew	0:80ee8f3b695e	797	* @retval None
EricLew	0:80ee8f3b695e	798	*/
EricLew	0:80ee8f3b695e	799	__STATIC_INLINE void LL_DAC_SetOutputMode(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t OutputMode)
EricLew	0:80ee8f3b695e	800	{
EricLew	0:80ee8f3b695e	801	MODIFY_REG(DACx->MCR,
EricLew	0:80ee8f3b695e	802	DAC_MCR_MODE1_2 << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK),
EricLew	0:80ee8f3b695e	803	OutputMode << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK));
EricLew	0:80ee8f3b695e	804	}
EricLew	0:80ee8f3b695e	805
EricLew	0:80ee8f3b695e	806	/**
EricLew	0:80ee8f3b695e	807	* @brief Get the output mode normal or sample-and-hold for the selected DAC channel.
EricLew	0:80ee8f3b695e	808	* @rmtoll CR MODE1 LL_DAC_GetOutputMode\n
EricLew	0:80ee8f3b695e	809	* CR MODE2 LL_DAC_GetOutputMode
EricLew	0:80ee8f3b695e	810	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	811	* @param DAC_Channel This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	812	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	813	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	814	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	815	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	816	* @retval Returned value can be one of the following values:
EricLew	0:80ee8f3b695e	817	* @arg @ref LL_DAC_OUTPUT_MODE_NORMAL
EricLew	0:80ee8f3b695e	818	* @arg @ref LL_DAC_OUTPUT_MODE_SAMPLE_AND_HOLD
EricLew	0:80ee8f3b695e	819	*/
EricLew	0:80ee8f3b695e	820	__STATIC_INLINE uint32_t LL_DAC_GetOutputMode(DAC_TypeDef *DACx, uint32_t DAC_Channel)
EricLew	0:80ee8f3b695e	821	{
EricLew	0:80ee8f3b695e	822	return (uint32_t)(READ_BIT(DACx->MCR, DAC_MCR_MODE1_2 << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK))
EricLew	0:80ee8f3b695e	823	>> (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK)
EricLew	0:80ee8f3b695e	824	);
EricLew	0:80ee8f3b695e	825	}
EricLew	0:80ee8f3b695e	826
EricLew	0:80ee8f3b695e	827	/**
EricLew	0:80ee8f3b695e	828	* @brief Set the output buffer for the selected DAC channel.
EricLew	0:80ee8f3b695e	829	* @note On this STM32 family, when buffer is enabled, its offset can be
EricLew	0:80ee8f3b695e	830	* trimmed: factory calibration default values can be
EricLew	0:80ee8f3b695e	831	* replaced by user trimming values, using function
EricLew	0:80ee8f3b695e	832	* @ref LL_DAC_SetTrimmingValue().
EricLew	0:80ee8f3b695e	833	* @rmtoll CR MODE1 LL_DAC_SetOutputBuffer\n
EricLew	0:80ee8f3b695e	834	* CR MODE2 LL_DAC_SetOutputBuffer
EricLew	0:80ee8f3b695e	835	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	836	* @param DAC_Channel This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	837	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	838	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	839	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	840	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	841	* @param OutputBuffer This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	842	* @arg @ref LL_DAC_OUTPUT_BUFFER_ENABLE
EricLew	0:80ee8f3b695e	843	* @arg @ref LL_DAC_OUTPUT_BUFFER_DISABLE
EricLew	0:80ee8f3b695e	844	* @retval None
EricLew	0:80ee8f3b695e	845	*/
EricLew	0:80ee8f3b695e	846	__STATIC_INLINE void LL_DAC_SetOutputBuffer(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t OutputBuffer)
EricLew	0:80ee8f3b695e	847	{
EricLew	0:80ee8f3b695e	848	MODIFY_REG(DACx->MCR,
EricLew	0:80ee8f3b695e	849	DAC_MCR_MODE1_1 << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK),
EricLew	0:80ee8f3b695e	850	OutputBuffer << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK));
EricLew	0:80ee8f3b695e	851	}
EricLew	0:80ee8f3b695e	852
EricLew	0:80ee8f3b695e	853	/**
EricLew	0:80ee8f3b695e	854	* @brief Get the output buffer state for the selected DAC channel.
EricLew	0:80ee8f3b695e	855	* @rmtoll CR MODE1 LL_DAC_GetOutputBuffer\n
EricLew	0:80ee8f3b695e	856	* CR MODE2 LL_DAC_GetOutputBuffer
EricLew	0:80ee8f3b695e	857	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	858	* @param DAC_Channel This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	859	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	860	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	861	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	862	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	863	* @retval Returned value can be one of the following values:
EricLew	0:80ee8f3b695e	864	* @arg @ref LL_DAC_OUTPUT_BUFFER_ENABLE
EricLew	0:80ee8f3b695e	865	* @arg @ref LL_DAC_OUTPUT_BUFFER_DISABLE
EricLew	0:80ee8f3b695e	866	*/
EricLew	0:80ee8f3b695e	867	__STATIC_INLINE uint32_t LL_DAC_GetOutputBuffer(DAC_TypeDef *DACx, uint32_t DAC_Channel)
EricLew	0:80ee8f3b695e	868	{
EricLew	0:80ee8f3b695e	869	return (uint32_t)(READ_BIT(DACx->MCR, DAC_MCR_MODE1_1 << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK))
EricLew	0:80ee8f3b695e	870	>> (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK)
EricLew	0:80ee8f3b695e	871	);
EricLew	0:80ee8f3b695e	872	}
EricLew	0:80ee8f3b695e	873
EricLew	0:80ee8f3b695e	874	/**
EricLew	0:80ee8f3b695e	875	* @brief Set the output connection for the selected DAC channel.
EricLew	0:80ee8f3b695e	876	* @note On this STM32 family, output connection depends on output mode (normal or
EricLew	0:80ee8f3b695e	877	* sample and hold) and output buffer state.
EricLew	0:80ee8f3b695e	878	* - if output connection is set to internal path and output buffer
EricLew	0:80ee8f3b695e	879	* is enabled (whatever output mode):
EricLew	0:80ee8f3b695e	880	* output connection is also connected to GPIO pin
EricLew	0:80ee8f3b695e	881	* (both connections to GPIO pin and internal path).
EricLew	0:80ee8f3b695e	882	* - if output connection is set to GPIO pin, output buffer
EricLew	0:80ee8f3b695e	883	* is disabled, output mode set to sample and hold:
EricLew	0:80ee8f3b695e	884	* output connection is also connected to internal path
EricLew	0:80ee8f3b695e	885	* (both connections to GPIO pin and internal path).
EricLew	0:80ee8f3b695e	886	* @rmtoll CR MODE1 LL_DAC_SetOutputConnection\n
EricLew	0:80ee8f3b695e	887	* CR MODE2 LL_DAC_SetOutputConnection
EricLew	0:80ee8f3b695e	888	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	889	* @param DAC_Channel This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	890	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	891	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	892	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	893	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	894	* @param OutputConnection This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	895	* @arg @ref LL_DAC_CONNECT_GPIO
EricLew	0:80ee8f3b695e	896	* @arg @ref LL_DAC_CONNECT_INTERNAL
EricLew	0:80ee8f3b695e	897	* @retval None
EricLew	0:80ee8f3b695e	898	*/
EricLew	0:80ee8f3b695e	899	__STATIC_INLINE void LL_DAC_SetOutputConnection(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t OutputConnection)
EricLew	0:80ee8f3b695e	900	{
EricLew	0:80ee8f3b695e	901	MODIFY_REG(DACx->MCR,
EricLew	0:80ee8f3b695e	902	DAC_MCR_MODE1_0 << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK),
EricLew	0:80ee8f3b695e	903	OutputConnection << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK));
EricLew	0:80ee8f3b695e	904	}
EricLew	0:80ee8f3b695e	905
EricLew	0:80ee8f3b695e	906	/**
EricLew	0:80ee8f3b695e	907	* @brief Get the output connection for the selected DAC channel.
EricLew	0:80ee8f3b695e	908	* @note On this STM32 family, output connection depends on output mode (normal or
EricLew	0:80ee8f3b695e	909	* sample and hold) and output buffer state.
EricLew	0:80ee8f3b695e	910	* - if output connection is set to internal path and output buffer
EricLew	0:80ee8f3b695e	911	* is enabled (whatever output mode):
EricLew	0:80ee8f3b695e	912	* output connection is also connected to GPIO pin
EricLew	0:80ee8f3b695e	913	* (both connections to GPIO pin and internal path).
EricLew	0:80ee8f3b695e	914	* - if output connection is set to GPIO pin, output buffer
EricLew	0:80ee8f3b695e	915	* is disabled, output mode set to sample and hold:
EricLew	0:80ee8f3b695e	916	* output connection is also connected to internal path
EricLew	0:80ee8f3b695e	917	* (both connections to GPIO pin and internal path).
EricLew	0:80ee8f3b695e	918	* @rmtoll CR MODE1 LL_DAC_GetOutputConnection\n
EricLew	0:80ee8f3b695e	919	* CR MODE2 LL_DAC_GetOutputConnection
EricLew	0:80ee8f3b695e	920	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	921	* @param DAC_Channel This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	922	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	923	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	924	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	925	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	926	* @retval Returned value can be one of the following values:
EricLew	0:80ee8f3b695e	927	* @arg @ref LL_DAC_CONNECT_GPIO
EricLew	0:80ee8f3b695e	928	* @arg @ref LL_DAC_CONNECT_INTERNAL
EricLew	0:80ee8f3b695e	929	*/
EricLew	0:80ee8f3b695e	930	__STATIC_INLINE uint32_t LL_DAC_GetOutputConnection(DAC_TypeDef *DACx, uint32_t DAC_Channel)
EricLew	0:80ee8f3b695e	931	{
EricLew	0:80ee8f3b695e	932	return (uint32_t)(READ_BIT(DACx->MCR, DAC_MCR_MODE1_0 << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK))
EricLew	0:80ee8f3b695e	933	>> (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK)
EricLew	0:80ee8f3b695e	934	);
EricLew	0:80ee8f3b695e	935	}
EricLew	0:80ee8f3b695e	936
EricLew	0:80ee8f3b695e	937	/**
EricLew	0:80ee8f3b695e	938	* @brief Set the sample-and-hold timing for the selected DAC channel:
EricLew	0:80ee8f3b695e	939	* sample time
EricLew	0:80ee8f3b695e	940	* @note Sample time must be set when DAC channel is disabled
EricLew	0:80ee8f3b695e	941	* or during DAC operation when DAC channel flag BWSTx is reset,
EricLew	0:80ee8f3b695e	942	* otherwise the setting is ignored.
EricLew	0:80ee8f3b695e	943	* Check BWSTx flag state using function "LL_DAC_IsActiveFlag_BWSTx()".
EricLew	0:80ee8f3b695e	944	* @rmtoll SHSR1 TSAMPLE1 LL_DAC_SetSampleAndHoldSampleTime\n
EricLew	0:80ee8f3b695e	945	* SHSR2 TSAMPLE2 LL_DAC_SetSampleAndHoldSampleTime
EricLew	0:80ee8f3b695e	946	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	947	* @param DAC_Channel This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	948	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	949	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	950	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	951	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	952	* @param SampleTime 0x000...0x3FF
EricLew	0:80ee8f3b695e	953	* @retval None
EricLew	0:80ee8f3b695e	954	*/
EricLew	0:80ee8f3b695e	955	__STATIC_INLINE void LL_DAC_SetSampleAndHoldSampleTime(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t SampleTime)
EricLew	0:80ee8f3b695e	956	{
EricLew	0:80ee8f3b695e	957	register uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->SHSR1, __DAC_MASK_SHIFT(DAC_Channel, DAC_REG_SHSRx_REGOFFSET_MASK));
EricLew	0:80ee8f3b695e	958
EricLew	0:80ee8f3b695e	959	MODIFY_REG(*preg,
EricLew	0:80ee8f3b695e	960	DAC_SHSR1_TSAMPLE1,
EricLew	0:80ee8f3b695e	961	SampleTime);
EricLew	0:80ee8f3b695e	962	}
EricLew	0:80ee8f3b695e	963
EricLew	0:80ee8f3b695e	964	/**
EricLew	0:80ee8f3b695e	965	* @brief Get the sample-and-hold timing for the selected DAC channel:
EricLew	0:80ee8f3b695e	966	* sample time
EricLew	0:80ee8f3b695e	967	* @rmtoll SHSR1 TSAMPLE1 LL_DAC_GetSampleAndHoldSampleTime\n
EricLew	0:80ee8f3b695e	968	* SHSR2 TSAMPLE2 LL_DAC_GetSampleAndHoldSampleTime
EricLew	0:80ee8f3b695e	969	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	970	* @param DAC_Channel This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	971	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	972	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	973	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	974	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	975	* @retval 0x000...0x3FF
EricLew	0:80ee8f3b695e	976	*/
EricLew	0:80ee8f3b695e	977	__STATIC_INLINE uint32_t LL_DAC_GetSampleAndHoldSampleTime(DAC_TypeDef *DACx, uint32_t DAC_Channel)
EricLew	0:80ee8f3b695e	978	{
EricLew	0:80ee8f3b695e	979	register uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->SHSR1, __DAC_MASK_SHIFT(DAC_Channel, DAC_REG_SHSRx_REGOFFSET_MASK));
EricLew	0:80ee8f3b695e	980
EricLew	0:80ee8f3b695e	981	return (uint32_t) READ_BIT(*preg, DAC_SHSR1_TSAMPLE1);
EricLew	0:80ee8f3b695e	982	}
EricLew	0:80ee8f3b695e	983
EricLew	0:80ee8f3b695e	984	/**
EricLew	0:80ee8f3b695e	985	* @brief Set the sample-and-hold timing for the selected DAC channel:
EricLew	0:80ee8f3b695e	986	* hold time
EricLew	0:80ee8f3b695e	987	* @rmtoll SHHR THOLD1 LL_DAC_SetSampleAndHoldHoldTime\n
EricLew	0:80ee8f3b695e	988	* SHHR THOLD2 LL_DAC_SetSampleAndHoldHoldTime
EricLew	0:80ee8f3b695e	989	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	990	* @param DAC_Channel This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	991	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	992	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	993	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	994	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	995	* @param HoldTime 0x000...0x3FF
EricLew	0:80ee8f3b695e	996	* @retval None
EricLew	0:80ee8f3b695e	997	*/
EricLew	0:80ee8f3b695e	998	__STATIC_INLINE void LL_DAC_SetSampleAndHoldHoldTime(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t HoldTime)
EricLew	0:80ee8f3b695e	999	{
EricLew	0:80ee8f3b695e	1000	MODIFY_REG(DACx->SHHR,
EricLew	0:80ee8f3b695e	1001	DAC_SHHR_THOLD1 << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK),
EricLew	0:80ee8f3b695e	1002	HoldTime << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK));
EricLew	0:80ee8f3b695e	1003	}
EricLew	0:80ee8f3b695e	1004
EricLew	0:80ee8f3b695e	1005	/**
EricLew	0:80ee8f3b695e	1006	* @brief Get the sample-and-hold timing for the selected DAC channel:
EricLew	0:80ee8f3b695e	1007	* hold time
EricLew	0:80ee8f3b695e	1008	* @rmtoll SHHR THOLD1 LL_DAC_GetSampleAndHoldHoldTime\n
EricLew	0:80ee8f3b695e	1009	* SHHR THOLD2 LL_DAC_GetSampleAndHoldHoldTime
EricLew	0:80ee8f3b695e	1010	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	1011	* @param DAC_Channel This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1012	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	1013	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	1014	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	1015	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	1016	* @retval 0x000...0x3FF
EricLew	0:80ee8f3b695e	1017	*/
EricLew	0:80ee8f3b695e	1018	__STATIC_INLINE uint32_t LL_DAC_GetSampleAndHoldHoldTime(DAC_TypeDef *DACx, uint32_t DAC_Channel)
EricLew	0:80ee8f3b695e	1019	{
EricLew	0:80ee8f3b695e	1020	return (uint32_t)(READ_BIT(DACx->SHHR, DAC_SHHR_THOLD1 << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK))
EricLew	0:80ee8f3b695e	1021	>> (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK)
EricLew	0:80ee8f3b695e	1022	);
EricLew	0:80ee8f3b695e	1023	}
EricLew	0:80ee8f3b695e	1024
EricLew	0:80ee8f3b695e	1025	/**
EricLew	0:80ee8f3b695e	1026	* @brief Set the sample-and-hold timing for the selected DAC channel:
EricLew	0:80ee8f3b695e	1027	* refresh time
EricLew	0:80ee8f3b695e	1028	* @rmtoll SHRR TREFRESH1 LL_DAC_SetSampleAndHoldRefreshTime\n
EricLew	0:80ee8f3b695e	1029	* SHRR TREFRESH2 LL_DAC_SetSampleAndHoldRefreshTime
EricLew	0:80ee8f3b695e	1030	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	1031	* @param DAC_Channel This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1032	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	1033	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	1034	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	1035	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	1036	* @param RefreshTime 0x00...0xFF
EricLew	0:80ee8f3b695e	1037	* @retval None
EricLew	0:80ee8f3b695e	1038	*/
EricLew	0:80ee8f3b695e	1039	__STATIC_INLINE void LL_DAC_SetSampleAndHoldRefreshTime(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t RefreshTime)
EricLew	0:80ee8f3b695e	1040	{
EricLew	0:80ee8f3b695e	1041	MODIFY_REG(DACx->SHRR,
EricLew	0:80ee8f3b695e	1042	DAC_SHRR_TREFRESH1 << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK),
EricLew	0:80ee8f3b695e	1043	RefreshTime << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK));
EricLew	0:80ee8f3b695e	1044	}
EricLew	0:80ee8f3b695e	1045
EricLew	0:80ee8f3b695e	1046	/**
EricLew	0:80ee8f3b695e	1047	* @brief Get the sample-and-hold timing for the selected DAC channel:
EricLew	0:80ee8f3b695e	1048	* refresh time
EricLew	0:80ee8f3b695e	1049	* @rmtoll SHRR TREFRESH1 LL_DAC_GetSampleAndHoldRefreshTime\n
EricLew	0:80ee8f3b695e	1050	* SHRR TREFRESH2 LL_DAC_GetSampleAndHoldRefreshTime
EricLew	0:80ee8f3b695e	1051	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	1052	* @param DAC_Channel This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1053	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	1054	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	1055	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	1056	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	1057	* @retval 0x00...0xFF
EricLew	0:80ee8f3b695e	1058	*/
EricLew	0:80ee8f3b695e	1059	__STATIC_INLINE uint32_t LL_DAC_GetSampleAndHoldRefreshTime(DAC_TypeDef *DACx, uint32_t DAC_Channel)
EricLew	0:80ee8f3b695e	1060	{
EricLew	0:80ee8f3b695e	1061	return (uint32_t)(READ_BIT(DACx->SHRR, DAC_SHRR_TREFRESH1 << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK))
EricLew	0:80ee8f3b695e	1062	>> (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK)
EricLew	0:80ee8f3b695e	1063	);
EricLew	0:80ee8f3b695e	1064	}
EricLew	0:80ee8f3b695e	1065
EricLew	0:80ee8f3b695e	1066	/**
EricLew	0:80ee8f3b695e	1067	* @}
EricLew	0:80ee8f3b695e	1068	*/
EricLew	0:80ee8f3b695e	1069
EricLew	0:80ee8f3b695e	1070	/** @defgroup DAC_LL_EF_DMA_Management DMA_Management
EricLew	0:80ee8f3b695e	1071	* @{
EricLew	0:80ee8f3b695e	1072	*/
EricLew	0:80ee8f3b695e	1073
EricLew	0:80ee8f3b695e	1074	/**
EricLew	0:80ee8f3b695e	1075	* @brief Enable DAC DMA transfer request of the selected channel.
EricLew	0:80ee8f3b695e	1076	* @note To configure DMA source address (peripheral address),
EricLew	0:80ee8f3b695e	1077	* use function @ref LL_DAC_DMA_GetRegAddr().
EricLew	0:80ee8f3b695e	1078	* @rmtoll CR DMAEN1 LL_DAC_EnableDMAReq\n
EricLew	0:80ee8f3b695e	1079	* CR DMAEN2 LL_DAC_EnableDMAReq
EricLew	0:80ee8f3b695e	1080	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	1081	* @param DAC_Channel This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1082	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	1083	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	1084	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	1085	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	1086	* @retval None
EricLew	0:80ee8f3b695e	1087	*/
EricLew	0:80ee8f3b695e	1088	__STATIC_INLINE void LL_DAC_EnableDMAReq(DAC_TypeDef *DACx, uint32_t DAC_Channel)
EricLew	0:80ee8f3b695e	1089	{
EricLew	0:80ee8f3b695e	1090	SET_BIT(DACx->CR,
EricLew	0:80ee8f3b695e	1091	DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK));
EricLew	0:80ee8f3b695e	1092	}
EricLew	0:80ee8f3b695e	1093
EricLew	0:80ee8f3b695e	1094	/**
EricLew	0:80ee8f3b695e	1095	* @brief Disable DAC DMA transfer request of the selected channel.
EricLew	0:80ee8f3b695e	1096	* @note To configure DMA source address (peripheral address),
EricLew	0:80ee8f3b695e	1097	* use function @ref LL_DAC_DMA_GetRegAddr().
EricLew	0:80ee8f3b695e	1098	* @rmtoll CR DMAEN1 LL_DAC_DisableDMAReq\n
EricLew	0:80ee8f3b695e	1099	* CR DMAEN2 LL_DAC_DisableDMAReq
EricLew	0:80ee8f3b695e	1100	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	1101	* @param DAC_Channel This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1102	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	1103	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	1104	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	1105	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	1106	* @retval None
EricLew	0:80ee8f3b695e	1107	*/
EricLew	0:80ee8f3b695e	1108	__STATIC_INLINE void LL_DAC_DisableDMAReq(DAC_TypeDef *DACx, uint32_t DAC_Channel)
EricLew	0:80ee8f3b695e	1109	{
EricLew	0:80ee8f3b695e	1110	CLEAR_BIT(DACx->CR,
EricLew	0:80ee8f3b695e	1111	DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK));
EricLew	0:80ee8f3b695e	1112	}
EricLew	0:80ee8f3b695e	1113
EricLew	0:80ee8f3b695e	1114	/**
EricLew	0:80ee8f3b695e	1115	* @brief Get DAC DMA transfer request state of the selected channel.
EricLew	0:80ee8f3b695e	1116	* (0: DAC DMA transfer request is disabled, 1: DAC DMA transfer request is enabled)
EricLew	0:80ee8f3b695e	1117	* @rmtoll CR DMAEN1 LL_DAC_IsDMAReqEnabled\n
EricLew	0:80ee8f3b695e	1118	* CR DMAEN2 LL_DAC_IsDMAReqEnabled
EricLew	0:80ee8f3b695e	1119	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	1120	* @param DAC_Channel This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1121	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	1122	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	1123	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	1124	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	1125	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1126	*/
EricLew	0:80ee8f3b695e	1127	__STATIC_INLINE uint32_t LL_DAC_IsDMAReqEnabled(DAC_TypeDef *DACx, uint32_t DAC_Channel)
EricLew	0:80ee8f3b695e	1128	{
EricLew	0:80ee8f3b695e	1129	return (READ_BIT(DACx->CR,
EricLew	0:80ee8f3b695e	1130	DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK))
EricLew	0:80ee8f3b695e	1131	== (DAC_CR_DMAEN1 << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK)));
EricLew	0:80ee8f3b695e	1132	}
EricLew	0:80ee8f3b695e	1133
EricLew	0:80ee8f3b695e	1134	/**
EricLew	0:80ee8f3b695e	1135	* @brief Function to help to configure DMA transfer to DAC: retrieve the
EricLew	0:80ee8f3b695e	1136	* DAC register address from DAC instance and a list of DAC registers
EricLew	0:80ee8f3b695e	1137	* intended to be used (most commonly) with DMA transfer.
EricLew	0:80ee8f3b695e	1138	* These DAC registers are data holding registers:
EricLew	0:80ee8f3b695e	1139	* when DAC conversion is requested, DAC generates a DMA transfer
EricLew	0:80ee8f3b695e	1140	* request to have data available in DAC data holding registers.
EricLew	0:80ee8f3b695e	1141	* @note This macro is intended to be used with LL DMA driver, refer to
EricLew	0:80ee8f3b695e	1142	* function "LL_DMA_ConfigAddresses()".
EricLew	0:80ee8f3b695e	1143	* Example:
EricLew	0:80ee8f3b695e	1144	* LL_DMA_ConfigAddresses(DMA1,
EricLew	0:80ee8f3b695e	1145	* LL_DMA_CHANNEL_1,
EricLew	0:80ee8f3b695e	1146	* (uint32_t)&< array or variable >,
EricLew	0:80ee8f3b695e	1147	* LL_DAC_DMA_GetRegAddr(DAC1, LL_DAC_CHANNEL_1, LL_DAC_DMA_REG_DATA_12BITS_RIGHT_ALIGNED),
EricLew	0:80ee8f3b695e	1148	* LL_DMA_DIRECTION_MEMORY_TO_PERIPH);
EricLew	0:80ee8f3b695e	1149	* @rmtoll DHR12R1 DACC1DHR LL_DAC_DMA_GetRegAddr\n
EricLew	0:80ee8f3b695e	1150	* DHR12L1 DACC1DHR LL_DAC_DMA_GetRegAddr\n
EricLew	0:80ee8f3b695e	1151	* DHR8R1 DACC1DHR LL_DAC_DMA_GetRegAddr\n
EricLew	0:80ee8f3b695e	1152	* DHR12R2 DACC2DHR LL_DAC_DMA_GetRegAddr\n
EricLew	0:80ee8f3b695e	1153	* DHR12L2 DACC2DHR LL_DAC_DMA_GetRegAddr\n
EricLew	0:80ee8f3b695e	1154	* DHR8R2 DACC2DHR LL_DAC_DMA_GetRegAddr
EricLew	0:80ee8f3b695e	1155	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	1156	* @param DAC_Channel This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1157	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	1158	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	1159	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	1160	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	1161	* @param Register This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1162	* @arg @ref LL_DAC_DMA_REG_DATA_12BITS_RIGHT_ALIGNED
EricLew	0:80ee8f3b695e	1163	* @arg @ref LL_DAC_DMA_REG_DATA_12BITS_LEFT_ALIGNED
EricLew	0:80ee8f3b695e	1164	* @arg @ref LL_DAC_DMA_REG_DATA_8BITS_RIGHT_ALIGNED
EricLew	0:80ee8f3b695e	1165	* @retval DAC register address
EricLew	0:80ee8f3b695e	1166	*/
EricLew	0:80ee8f3b695e	1167	__STATIC_INLINE uint32_t LL_DAC_DMA_GetRegAddr(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Register)
EricLew	0:80ee8f3b695e	1168	{
EricLew	0:80ee8f3b695e	1169	/* Retrieve address of register DHR12Rx, DHR12Lx or DHR8Rx depending on */
EricLew	0:80ee8f3b695e	1170	/* DAC channel selected. */
EricLew	0:80ee8f3b695e	1171	return ((uint32_t)(__DAC_PTR_REG_OFFSET((DACx)->DHR12R1, __DAC_MASK_SHIFT(DAC_Channel, Register))));
EricLew	0:80ee8f3b695e	1172	}
EricLew	0:80ee8f3b695e	1173	/**
EricLew	0:80ee8f3b695e	1174	* @}
EricLew	0:80ee8f3b695e	1175	*/
EricLew	0:80ee8f3b695e	1176
EricLew	0:80ee8f3b695e	1177	/** @defgroup DAC_LL_EF_Operation Operation on DAC channels
EricLew	0:80ee8f3b695e	1178	* @{
EricLew	0:80ee8f3b695e	1179	*/
EricLew	0:80ee8f3b695e	1180
EricLew	0:80ee8f3b695e	1181	/**
EricLew	0:80ee8f3b695e	1182	* @brief Enable DAC selected channel.
EricLew	0:80ee8f3b695e	1183	* @rmtoll CR EN1 LL_DAC_Enable\n
EricLew	0:80ee8f3b695e	1184	* CR EN2 LL_DAC_Enable
EricLew	0:80ee8f3b695e	1185	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	1186	* @param DAC_Channel This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1187	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	1188	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	1189	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	1190	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	1191	* @retval None
EricLew	0:80ee8f3b695e	1192	*/
EricLew	0:80ee8f3b695e	1193	__STATIC_INLINE void LL_DAC_Enable(DAC_TypeDef *DACx, uint32_t DAC_Channel)
EricLew	0:80ee8f3b695e	1194	{
EricLew	0:80ee8f3b695e	1195	SET_BIT(DACx->CR,
EricLew	0:80ee8f3b695e	1196	DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK));
EricLew	0:80ee8f3b695e	1197	}
EricLew	0:80ee8f3b695e	1198
EricLew	0:80ee8f3b695e	1199	/**
EricLew	0:80ee8f3b695e	1200	* @brief Disable DAC selected channel.
EricLew	0:80ee8f3b695e	1201	* @rmtoll CR EN1 LL_DAC_Disable\n
EricLew	0:80ee8f3b695e	1202	* CR EN2 LL_DAC_Disable
EricLew	0:80ee8f3b695e	1203	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	1204	* @param DAC_Channel This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1205	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	1206	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	1207	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	1208	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	1209	* @retval None
EricLew	0:80ee8f3b695e	1210	*/
EricLew	0:80ee8f3b695e	1211	__STATIC_INLINE void LL_DAC_Disable(DAC_TypeDef *DACx, uint32_t DAC_Channel)
EricLew	0:80ee8f3b695e	1212	{
EricLew	0:80ee8f3b695e	1213	CLEAR_BIT(DACx->CR,
EricLew	0:80ee8f3b695e	1214	DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK));
EricLew	0:80ee8f3b695e	1215	}
EricLew	0:80ee8f3b695e	1216
EricLew	0:80ee8f3b695e	1217	/**
EricLew	0:80ee8f3b695e	1218	* @brief Get DAC enable state of the selected channel.
EricLew	0:80ee8f3b695e	1219	* (0: DAC channel is disabled, 1: DAC channel is enabled)
EricLew	0:80ee8f3b695e	1220	* @rmtoll CR EN1 LL_DAC_IsEnabled\n
EricLew	0:80ee8f3b695e	1221	* CR EN2 LL_DAC_IsEnabled
EricLew	0:80ee8f3b695e	1222	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	1223	* @param DAC_Channel This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1224	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	1225	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	1226	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	1227	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	1228	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1229	*/
EricLew	0:80ee8f3b695e	1230	__STATIC_INLINE uint32_t LL_DAC_IsEnabled(DAC_TypeDef *DACx, uint32_t DAC_Channel)
EricLew	0:80ee8f3b695e	1231	{
EricLew	0:80ee8f3b695e	1232	return (READ_BIT(DACx->CR,
EricLew	0:80ee8f3b695e	1233	DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK))
EricLew	0:80ee8f3b695e	1234	== (DAC_CR_EN1 << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK)));
EricLew	0:80ee8f3b695e	1235	}
EricLew	0:80ee8f3b695e	1236
EricLew	0:80ee8f3b695e	1237	/**
EricLew	0:80ee8f3b695e	1238	* @brief Enable DAC trigger of the selected channel.
EricLew	0:80ee8f3b695e	1239	* - If DAC trigger is disabled, DAC conversion is performed
EricLew	0:80ee8f3b695e	1240	* automatically once the data holding register is updated,
EricLew	0:80ee8f3b695e	1241	* using functions "LL_DAC_ConvertData{8; 12}{Right; Left} Aligned()":
EricLew	0:80ee8f3b695e	1242	* @ref LL_DAC_ConvertData12RightAligned(), ...
EricLew	0:80ee8f3b695e	1243	* - If DAC trigger is enabled, DAC conversion is performed
EricLew	0:80ee8f3b695e	1244	* only when a hardware of software trigger event is occurring.
EricLew	0:80ee8f3b695e	1245	* Select trigger source using
EricLew	0:80ee8f3b695e	1246	* function @ref LL_DAC_SetTriggerSource().
EricLew	0:80ee8f3b695e	1247	* @rmtoll CR TEN1 LL_DAC_EnableTrigger\n
EricLew	0:80ee8f3b695e	1248	* CR TEN2 LL_DAC_EnableTrigger
EricLew	0:80ee8f3b695e	1249	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	1250	* @param DAC_Channel This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1251	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	1252	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	1253	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	1254	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	1255	* @retval None
EricLew	0:80ee8f3b695e	1256	*/
EricLew	0:80ee8f3b695e	1257	__STATIC_INLINE void LL_DAC_EnableTrigger(DAC_TypeDef *DACx, uint32_t DAC_Channel)
EricLew	0:80ee8f3b695e	1258	{
EricLew	0:80ee8f3b695e	1259	SET_BIT(DACx->CR,
EricLew	0:80ee8f3b695e	1260	DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK));
EricLew	0:80ee8f3b695e	1261	}
EricLew	0:80ee8f3b695e	1262
EricLew	0:80ee8f3b695e	1263	/**
EricLew	0:80ee8f3b695e	1264	* @brief Disable DAC trigger of the selected channel.
EricLew	0:80ee8f3b695e	1265	* @rmtoll CR TEN1 LL_DAC_DisableTrigger\n
EricLew	0:80ee8f3b695e	1266	* CR TEN2 LL_DAC_DisableTrigger
EricLew	0:80ee8f3b695e	1267	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	1268	* @param DAC_Channel This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1269	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	1270	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	1271	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	1272	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	1273	* @retval None
EricLew	0:80ee8f3b695e	1274	*/
EricLew	0:80ee8f3b695e	1275	__STATIC_INLINE void LL_DAC_DisableTrigger(DAC_TypeDef *DACx, uint32_t DAC_Channel)
EricLew	0:80ee8f3b695e	1276	{
EricLew	0:80ee8f3b695e	1277	CLEAR_BIT(DACx->CR,
EricLew	0:80ee8f3b695e	1278	DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK));
EricLew	0:80ee8f3b695e	1279	}
EricLew	0:80ee8f3b695e	1280
EricLew	0:80ee8f3b695e	1281	/**
EricLew	0:80ee8f3b695e	1282	* @brief Get DAC trigger state of the selected channel.
EricLew	0:80ee8f3b695e	1283	* (0: DAC trigger is disabled, 1: DAC trigger is enabled)
EricLew	0:80ee8f3b695e	1284	* @rmtoll CR TEN1 LL_DAC_IsTriggerEnabled\n
EricLew	0:80ee8f3b695e	1285	* CR TEN2 LL_DAC_IsTriggerEnabled
EricLew	0:80ee8f3b695e	1286	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	1287	* @param DAC_Channel This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1288	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	1289	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	1290	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	1291	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	1292	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1293	*/
EricLew	0:80ee8f3b695e	1294	__STATIC_INLINE uint32_t LL_DAC_IsTriggerEnabled(DAC_TypeDef *DACx, uint32_t DAC_Channel)
EricLew	0:80ee8f3b695e	1295	{
EricLew	0:80ee8f3b695e	1296	return (READ_BIT(DACx->CR,
EricLew	0:80ee8f3b695e	1297	DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK))
EricLew	0:80ee8f3b695e	1298	== (DAC_CR_TEN1 << (DAC_Channel & DAC_CR_CHx_BITOFFSET_MASK)));
EricLew	0:80ee8f3b695e	1299	}
EricLew	0:80ee8f3b695e	1300
EricLew	0:80ee8f3b695e	1301	/**
EricLew	0:80ee8f3b695e	1302	* @brief Trig DAC conversion by software for the selected DAC channel.
EricLew	0:80ee8f3b695e	1303	* @note Preliminarily, DAC trigger must be set to software trigger
EricLew	0:80ee8f3b695e	1304	* using function @ref LL_DAC_SetTriggerSource()
EricLew	0:80ee8f3b695e	1305	* with parameter "LL_DAC_TRIGGER_SOFTWARE".
EricLew	0:80ee8f3b695e	1306	* and DAC trigger must be enabled using
EricLew	0:80ee8f3b695e	1307	* function @ref LL_DAC_EnableTrigger().
EricLew	0:80ee8f3b695e	1308	* @note For devices featuring DAC with 2 channels: this function
EricLew	0:80ee8f3b695e	1309	* can perform a SW start of both DAC channels simultaneously.
EricLew	0:80ee8f3b695e	1310	* Two channels can be selected as parameter.
EricLew	0:80ee8f3b695e	1311	* Example: (LL_DAC_CHANNEL_1 \| LL_DAC_CHANNEL_2)
EricLew	0:80ee8f3b695e	1312	* @rmtoll SWTRIGR SWTRIG1 LL_DAC_TrigSWConversion\n
EricLew	0:80ee8f3b695e	1313	* SWTRIGR SWTRIG2 LL_DAC_TrigSWConversion
EricLew	0:80ee8f3b695e	1314	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	1315	* @param DAC_Channel This parameter can a combination of the following values:
EricLew	0:80ee8f3b695e	1316	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	1317	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	1318	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	1319	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	1320	* @retval None
EricLew	0:80ee8f3b695e	1321	*/
EricLew	0:80ee8f3b695e	1322	__STATIC_INLINE void LL_DAC_TrigSWConversion(DAC_TypeDef *DACx, uint32_t DAC_Channel)
EricLew	0:80ee8f3b695e	1323	{
EricLew	0:80ee8f3b695e	1324	SET_BIT(DACx->SWTRIGR,
EricLew	0:80ee8f3b695e	1325	(DAC_Channel & DAC_SWTR_CHX_MASK));
EricLew	0:80ee8f3b695e	1326	}
EricLew	0:80ee8f3b695e	1327
EricLew	0:80ee8f3b695e	1328	/**
EricLew	0:80ee8f3b695e	1329	* @brief Set the data to be loaded in the data holding register
EricLew	0:80ee8f3b695e	1330	* in format 12 bits left alignment (LSB aligned on bit 0),
EricLew	0:80ee8f3b695e	1331	* for the selected DAC channel.
EricLew	0:80ee8f3b695e	1332	* @rmtoll DHR12R1 DACC1DHR LL_DAC_ConvertData12RightAligned\n
EricLew	0:80ee8f3b695e	1333	* DHR12R2 DACC2DHR LL_DAC_ConvertData12RightAligned
EricLew	0:80ee8f3b695e	1334	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	1335	* @param DAC_Channel This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1336	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	1337	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	1338	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	1339	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	1340	* @param Data 0x000...0xFFF
EricLew	0:80ee8f3b695e	1341	* @retval None
EricLew	0:80ee8f3b695e	1342	*/
EricLew	0:80ee8f3b695e	1343	__STATIC_INLINE void LL_DAC_ConvertData12RightAligned(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Data)
EricLew	0:80ee8f3b695e	1344	{
EricLew	0:80ee8f3b695e	1345	register uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DHR12R1, __DAC_MASK_SHIFT(DAC_Channel, DAC_REG_DHR12Rx_REGOFFSET_MASK));
EricLew	0:80ee8f3b695e	1346
EricLew	0:80ee8f3b695e	1347	MODIFY_REG(*preg,
EricLew	0:80ee8f3b695e	1348	DAC_DHR12R1_DACC1DHR,
EricLew	0:80ee8f3b695e	1349	Data);
EricLew	0:80ee8f3b695e	1350	}
EricLew	0:80ee8f3b695e	1351
EricLew	0:80ee8f3b695e	1352	/**
EricLew	0:80ee8f3b695e	1353	* @brief Set the data to be loaded in the data holding register
EricLew	0:80ee8f3b695e	1354	* in format 12 bits left alignment (MSB aligned on bit 15),
EricLew	0:80ee8f3b695e	1355	* for the selected DAC channel.
EricLew	0:80ee8f3b695e	1356	* @rmtoll DHR12L1 DACC1DHR LL_DAC_ConvertData12LeftAligned\n
EricLew	0:80ee8f3b695e	1357	* DHR12L2 DACC2DHR LL_DAC_ConvertData12LeftAligned
EricLew	0:80ee8f3b695e	1358	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	1359	* @param DAC_Channel This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1360	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	1361	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	1362	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	1363	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	1364	* @param Data 0x0000...0xFFFF
EricLew	0:80ee8f3b695e	1365	* @retval None
EricLew	0:80ee8f3b695e	1366	*/
EricLew	0:80ee8f3b695e	1367	__STATIC_INLINE void LL_DAC_ConvertData12LeftAligned(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Data)
EricLew	0:80ee8f3b695e	1368	{
EricLew	0:80ee8f3b695e	1369	register uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DHR12R1, __DAC_MASK_SHIFT(DAC_Channel, DAC_REG_DHR12Lx_REGOFFSET_MASK));
EricLew	0:80ee8f3b695e	1370
EricLew	0:80ee8f3b695e	1371	MODIFY_REG(*preg,
EricLew	0:80ee8f3b695e	1372	DAC_DHR12L1_DACC1DHR,
EricLew	0:80ee8f3b695e	1373	Data);
EricLew	0:80ee8f3b695e	1374	}
EricLew	0:80ee8f3b695e	1375
EricLew	0:80ee8f3b695e	1376	/**
EricLew	0:80ee8f3b695e	1377	* @brief Set the data to be loaded in the data holding register
EricLew	0:80ee8f3b695e	1378	* in format 8 bits left alignment (LSB aligned on bit 0),
EricLew	0:80ee8f3b695e	1379	* for the selected DAC channel.
EricLew	0:80ee8f3b695e	1380	* @rmtoll DHR8R1 DACC1DHR LL_DAC_ConvertData8RightAligned\n
EricLew	0:80ee8f3b695e	1381	* DHR8R2 DACC2DHR LL_DAC_ConvertData8RightAligned
EricLew	0:80ee8f3b695e	1382	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	1383	* @param DAC_Channel This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1384	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	1385	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	1386	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	1387	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	1388	* @param Data 0x00...0xFF
EricLew	0:80ee8f3b695e	1389	* @retval None
EricLew	0:80ee8f3b695e	1390	*/
EricLew	0:80ee8f3b695e	1391	__STATIC_INLINE void LL_DAC_ConvertData8RightAligned(DAC_TypeDef *DACx, uint32_t DAC_Channel, uint32_t Data)
EricLew	0:80ee8f3b695e	1392	{
EricLew	0:80ee8f3b695e	1393	register uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DHR12R1, __DAC_MASK_SHIFT(DAC_Channel, DAC_REG_DHR8Rx_REGOFFSET_MASK));
EricLew	0:80ee8f3b695e	1394
EricLew	0:80ee8f3b695e	1395	MODIFY_REG(*preg,
EricLew	0:80ee8f3b695e	1396	DAC_DHR8R1_DACC1DHR,
EricLew	0:80ee8f3b695e	1397	Data);
EricLew	0:80ee8f3b695e	1398	}
EricLew	0:80ee8f3b695e	1399
EricLew	0:80ee8f3b695e	1400	/**
EricLew	0:80ee8f3b695e	1401	* @brief Set the data to be loaded in the data holding register
EricLew	0:80ee8f3b695e	1402	* in format 12 bits left alignment (LSB aligned on bit 0),
EricLew	0:80ee8f3b695e	1403	* for both DAC channels.
EricLew	0:80ee8f3b695e	1404	* @rmtoll DHR12RD DACC1DHR LL_DAC_ConvertDualData12RightAligned\n
EricLew	0:80ee8f3b695e	1405	* DHR12RD DACC2DHR LL_DAC_ConvertDualData12RightAligned
EricLew	0:80ee8f3b695e	1406	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	1407	* @param DataChannel1 0x000...0xFFF
EricLew	0:80ee8f3b695e	1408	* @param DataChannel2 0x000...0xFFF
EricLew	0:80ee8f3b695e	1409	* @retval None
EricLew	0:80ee8f3b695e	1410	*/
EricLew	0:80ee8f3b695e	1411	__STATIC_INLINE void LL_DAC_ConvertDualData12RightAligned(DAC_TypeDef *DACx, uint32_t DataChannel1, uint32_t DataChannel2)
EricLew	0:80ee8f3b695e	1412	{
EricLew	0:80ee8f3b695e	1413	MODIFY_REG(DACx->DHR12RD,
EricLew	0:80ee8f3b695e	1414	(DAC_DHR12RD_DACC2DHR \| DAC_DHR12RD_DACC1DHR),
EricLew	0:80ee8f3b695e	1415	((DataChannel2 << POSITION_VAL(DAC_DHR12RD_DACC2DHR)) \| DataChannel1));
EricLew	0:80ee8f3b695e	1416	}
EricLew	0:80ee8f3b695e	1417
EricLew	0:80ee8f3b695e	1418	/**
EricLew	0:80ee8f3b695e	1419	* @brief Set the data to be loaded in the data holding register
EricLew	0:80ee8f3b695e	1420	* in format 12 bits left alignment (MSB aligned on bit 15),
EricLew	0:80ee8f3b695e	1421	* for both DAC channels.
EricLew	0:80ee8f3b695e	1422	* @rmtoll DHR12LD DACC1DHR LL_DAC_ConvertDualData12LeftAligned\n
EricLew	0:80ee8f3b695e	1423	* DHR12LD DACC2DHR LL_DAC_ConvertDualData12LeftAligned
EricLew	0:80ee8f3b695e	1424	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	1425	* @param DataChannel1 0x000...0xFFFF
EricLew	0:80ee8f3b695e	1426	* @param DataChannel2 0x000...0xFFFF
EricLew	0:80ee8f3b695e	1427	* @retval None
EricLew	0:80ee8f3b695e	1428	*/
EricLew	0:80ee8f3b695e	1429	__STATIC_INLINE void LL_DAC_ConvertDualData12LeftAligned(DAC_TypeDef *DACx, uint32_t DataChannel1, uint32_t DataChannel2)
EricLew	0:80ee8f3b695e	1430	{
EricLew	0:80ee8f3b695e	1431	/* Note: Data of DAC channel 2 shift value subtracted of 4 because */
EricLew	0:80ee8f3b695e	1432	/* data on 16 bits and DAC channel 2 bits field is on the 12 MSB, */
EricLew	0:80ee8f3b695e	1433	/* the 4 LSB must be taken into account for the shift value. */
EricLew	0:80ee8f3b695e	1434	MODIFY_REG(DACx->DHR12LD,
EricLew	0:80ee8f3b695e	1435	(DAC_DHR12LD_DACC2DHR \| DAC_DHR12LD_DACC1DHR),
EricLew	0:80ee8f3b695e	1436	((DataChannel2 << (POSITION_VAL(DAC_DHR12LD_DACC2DHR) - 4)) \| DataChannel1));
EricLew	0:80ee8f3b695e	1437	}
EricLew	0:80ee8f3b695e	1438
EricLew	0:80ee8f3b695e	1439	/**
EricLew	0:80ee8f3b695e	1440	* @brief Set the data to be loaded in the data holding register
EricLew	0:80ee8f3b695e	1441	* in format 8 bits left alignment (LSB aligned on bit 0),
EricLew	0:80ee8f3b695e	1442	* for both DAC channels.
EricLew	0:80ee8f3b695e	1443	* @rmtoll DHR8RD DACC1DHR LL_DAC_ConvertDualData8RightAligned\n
EricLew	0:80ee8f3b695e	1444	* DHR8RD DACC2DHR LL_DAC_ConvertDualData8RightAligned
EricLew	0:80ee8f3b695e	1445	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	1446	* @param DataChannel1 0x00...0xFF
EricLew	0:80ee8f3b695e	1447	* @param DataChannel2 0x00...0xFF
EricLew	0:80ee8f3b695e	1448	* @retval None
EricLew	0:80ee8f3b695e	1449	*/
EricLew	0:80ee8f3b695e	1450	__STATIC_INLINE void LL_DAC_ConvertDualData8RightAligned(DAC_TypeDef *DACx, uint32_t DataChannel1, uint32_t DataChannel2)
EricLew	0:80ee8f3b695e	1451	{
EricLew	0:80ee8f3b695e	1452	MODIFY_REG(DACx->DHR8RD,
EricLew	0:80ee8f3b695e	1453	(DAC_DHR8RD_DACC2DHR \| DAC_DHR8RD_DACC1DHR),
EricLew	0:80ee8f3b695e	1454	((DataChannel2 << POSITION_VAL(DAC_DHR8RD_DACC2DHR)) \| DataChannel1));
EricLew	0:80ee8f3b695e	1455	}
EricLew	0:80ee8f3b695e	1456
EricLew	0:80ee8f3b695e	1457	/**
EricLew	0:80ee8f3b695e	1458	* @brief Retrieve output data currently generated for the selected DAC channel.
EricLew	0:80ee8f3b695e	1459	* @note Whatever alignment and resolution settings
EricLew	0:80ee8f3b695e	1460	* (using functions "LL_DAC_ConvertData{8; 12}{Right; Left} Aligned()":
EricLew	0:80ee8f3b695e	1461	* @ref LL_DAC_ConvertData12RightAligned(), ...),
EricLew	0:80ee8f3b695e	1462	* output data format is 12 bits right aligned (LSB aligned on bit 0).
EricLew	0:80ee8f3b695e	1463	* @rmtoll DOR1 DACC1DOR LL_DAC_RetrieveOutputData\n
EricLew	0:80ee8f3b695e	1464	* DOR2 DACC2DOR LL_DAC_RetrieveOutputData
EricLew	0:80ee8f3b695e	1465	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	1466	* @param DAC_Channel This parameter can be one of the following values:
EricLew	0:80ee8f3b695e	1467	* @arg @ref LL_DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	1468	* @arg @ref LL_DAC_CHANNEL_2 (1)
EricLew	0:80ee8f3b695e	1469	* (1) On this STM32 family, parameter not available on all devices.
EricLew	0:80ee8f3b695e	1470	* Refer to device datasheet for channels availability.
EricLew	0:80ee8f3b695e	1471	* @retval 0x000...0xFFF
EricLew	0:80ee8f3b695e	1472	*/
EricLew	0:80ee8f3b695e	1473	__STATIC_INLINE uint32_t LL_DAC_RetrieveOutputData(DAC_TypeDef *DACx, uint32_t DAC_Channel)
EricLew	0:80ee8f3b695e	1474	{
EricLew	0:80ee8f3b695e	1475	register uint32_t *preg = __DAC_PTR_REG_OFFSET(DACx->DOR1, __DAC_MASK_SHIFT(DAC_Channel, DAC_REG_SHSRx_REGOFFSET_MASK));
EricLew	0:80ee8f3b695e	1476
EricLew	0:80ee8f3b695e	1477	return (uint16_t) READ_BIT(*preg, DAC_DOR1_DACC1DOR);
EricLew	0:80ee8f3b695e	1478	}
EricLew	0:80ee8f3b695e	1479
EricLew	0:80ee8f3b695e	1480	/**
EricLew	0:80ee8f3b695e	1481	* @}
EricLew	0:80ee8f3b695e	1482	*/
EricLew	0:80ee8f3b695e	1483
EricLew	0:80ee8f3b695e	1484	/** @defgroup DAC_LL_EF_FLAG_Management FLAG_Management
EricLew	0:80ee8f3b695e	1485	* @{
EricLew	0:80ee8f3b695e	1486	*/
EricLew	0:80ee8f3b695e	1487	/**
EricLew	0:80ee8f3b695e	1488	* @brief Get DAC calibration offset flag for DAC channel 1
EricLew	0:80ee8f3b695e	1489	* @rmtoll SR CAL_FLAG1 LL_DAC_IsActiveFlag_CAL1
EricLew	0:80ee8f3b695e	1490	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	1491	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1492	*/
EricLew	0:80ee8f3b695e	1493	__STATIC_INLINE uint32_t LL_DAC_IsActiveFlag_CAL1(DAC_TypeDef *DACx)
EricLew	0:80ee8f3b695e	1494	{
EricLew	0:80ee8f3b695e	1495	return (READ_BIT(DACx->SR, DAC_SR_CAL_FLAG1) == (DAC_SR_CAL_FLAG1));
EricLew	0:80ee8f3b695e	1496	}
EricLew	0:80ee8f3b695e	1497
EricLew	0:80ee8f3b695e	1498	/**
EricLew	0:80ee8f3b695e	1499	* @brief Get DAC calibration offset flag for DAC channel 2
EricLew	0:80ee8f3b695e	1500	* @rmtoll SR CAL_FLAG2 LL_DAC_IsActiveFlag_CAL2
EricLew	0:80ee8f3b695e	1501	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	1502	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1503	*/
EricLew	0:80ee8f3b695e	1504	__STATIC_INLINE uint32_t LL_DAC_IsActiveFlag_CAL2(DAC_TypeDef *DACx)
EricLew	0:80ee8f3b695e	1505	{
EricLew	0:80ee8f3b695e	1506	return (READ_BIT(DACx->SR, DAC_SR_CAL_FLAG2) == (DAC_SR_CAL_FLAG2));
EricLew	0:80ee8f3b695e	1507	}
EricLew	0:80ee8f3b695e	1508
EricLew	0:80ee8f3b695e	1509	/**
EricLew	0:80ee8f3b695e	1510	* @brief Get DAC busy writing sample time flag for DAC channel 1
EricLew	0:80ee8f3b695e	1511	* @rmtoll SR BWST1 LL_DAC_IsActiveFlag_BWST1
EricLew	0:80ee8f3b695e	1512	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	1513	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1514	*/
EricLew	0:80ee8f3b695e	1515	__STATIC_INLINE uint32_t LL_DAC_IsActiveFlag_BWST1(DAC_TypeDef *DACx)
EricLew	0:80ee8f3b695e	1516	{
EricLew	0:80ee8f3b695e	1517	return (READ_BIT(DACx->SR, DAC_SR_BWST1) == (DAC_SR_BWST1));
EricLew	0:80ee8f3b695e	1518	}
EricLew	0:80ee8f3b695e	1519
EricLew	0:80ee8f3b695e	1520	/**
EricLew	0:80ee8f3b695e	1521	* @brief Get DAC busy writing sample time flag for DAC channel 2
EricLew	0:80ee8f3b695e	1522	* @rmtoll SR BWST2 LL_DAC_IsActiveFlag_BWST2
EricLew	0:80ee8f3b695e	1523	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	1524	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1525	*/
EricLew	0:80ee8f3b695e	1526	__STATIC_INLINE uint32_t LL_DAC_IsActiveFlag_BWST2(DAC_TypeDef *DACx)
EricLew	0:80ee8f3b695e	1527	{
EricLew	0:80ee8f3b695e	1528	return (READ_BIT(DACx->SR, DAC_SR_BWST2) == (DAC_SR_BWST2));
EricLew	0:80ee8f3b695e	1529	}
EricLew	0:80ee8f3b695e	1530
EricLew	0:80ee8f3b695e	1531	/**
EricLew	0:80ee8f3b695e	1532	* @brief Get DAC underrun flag for DAC channel 1
EricLew	0:80ee8f3b695e	1533	* @rmtoll SR DMAUDR1 LL_DAC_IsActiveFlag_DMAUDR1
EricLew	0:80ee8f3b695e	1534	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	1535	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1536	*/
EricLew	0:80ee8f3b695e	1537	__STATIC_INLINE uint32_t LL_DAC_IsActiveFlag_DMAUDR1(DAC_TypeDef *DACx)
EricLew	0:80ee8f3b695e	1538	{
EricLew	0:80ee8f3b695e	1539	return (READ_BIT(DACx->SR, DAC_SR_DMAUDR1) == (DAC_SR_DMAUDR1));
EricLew	0:80ee8f3b695e	1540	}
EricLew	0:80ee8f3b695e	1541
EricLew	0:80ee8f3b695e	1542	/**
EricLew	0:80ee8f3b695e	1543	* @brief Get DAC underrun flag for DAC channel 2
EricLew	0:80ee8f3b695e	1544	* @rmtoll SR DMAUDR2 LL_DAC_IsActiveFlag_DMAUDR2
EricLew	0:80ee8f3b695e	1545	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	1546	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1547	*/
EricLew	0:80ee8f3b695e	1548	__STATIC_INLINE uint32_t LL_DAC_IsActiveFlag_DMAUDR2(DAC_TypeDef *DACx)
EricLew	0:80ee8f3b695e	1549	{
EricLew	0:80ee8f3b695e	1550	return (READ_BIT(DACx->SR, DAC_SR_DMAUDR2) == (DAC_SR_DMAUDR2));
EricLew	0:80ee8f3b695e	1551	}
EricLew	0:80ee8f3b695e	1552
EricLew	0:80ee8f3b695e	1553	/**
EricLew	0:80ee8f3b695e	1554	* @brief Clear DAC underrun flag for DAC channel 1
EricLew	0:80ee8f3b695e	1555	* @rmtoll SR DMAUDR1 LL_DAC_ClearFlag_DMAUDR1
EricLew	0:80ee8f3b695e	1556	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	1557	* @retval None
EricLew	0:80ee8f3b695e	1558	*/
EricLew	0:80ee8f3b695e	1559	__STATIC_INLINE void LL_DAC_ClearFlag_DMAUDR1(DAC_TypeDef *DACx)
EricLew	0:80ee8f3b695e	1560	{
EricLew	0:80ee8f3b695e	1561	WRITE_REG(DACx->SR, DAC_SR_DMAUDR1);
EricLew	0:80ee8f3b695e	1562	}
EricLew	0:80ee8f3b695e	1563
EricLew	0:80ee8f3b695e	1564	/**
EricLew	0:80ee8f3b695e	1565	* @brief Clear DAC underrun flag for DAC channel 2
EricLew	0:80ee8f3b695e	1566	* @rmtoll SR DMAUDR2 LL_DAC_ClearFlag_DMAUDR2
EricLew	0:80ee8f3b695e	1567	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	1568	* @retval None
EricLew	0:80ee8f3b695e	1569	*/
EricLew	0:80ee8f3b695e	1570	__STATIC_INLINE void LL_DAC_ClearFlag_DMAUDR2(DAC_TypeDef *DACx)
EricLew	0:80ee8f3b695e	1571	{
EricLew	0:80ee8f3b695e	1572	WRITE_REG(DACx->SR, DAC_SR_DMAUDR2);
EricLew	0:80ee8f3b695e	1573	}
EricLew	0:80ee8f3b695e	1574
EricLew	0:80ee8f3b695e	1575	/**
EricLew	0:80ee8f3b695e	1576	* @}
EricLew	0:80ee8f3b695e	1577	*/
EricLew	0:80ee8f3b695e	1578
EricLew	0:80ee8f3b695e	1579	/** @defgroup DAC_LL_EF_IT_Management IT_Management
EricLew	0:80ee8f3b695e	1580	* @{
EricLew	0:80ee8f3b695e	1581	*/
EricLew	0:80ee8f3b695e	1582
EricLew	0:80ee8f3b695e	1583	/**
EricLew	0:80ee8f3b695e	1584	* @brief Enable DMA underrun interrupt for DAC channel 1
EricLew	0:80ee8f3b695e	1585	* @rmtoll CR DMAUDRIE1 LL_DAC_EnableIT_DMAUDR1
EricLew	0:80ee8f3b695e	1586	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	1587	* @retval None
EricLew	0:80ee8f3b695e	1588	*/
EricLew	0:80ee8f3b695e	1589	__STATIC_INLINE void LL_DAC_EnableIT_DMAUDR1(DAC_TypeDef *DACx)
EricLew	0:80ee8f3b695e	1590	{
EricLew	0:80ee8f3b695e	1591	SET_BIT(DACx->CR, DAC_CR_DMAUDRIE1);
EricLew	0:80ee8f3b695e	1592	}
EricLew	0:80ee8f3b695e	1593
EricLew	0:80ee8f3b695e	1594	/**
EricLew	0:80ee8f3b695e	1595	* @brief Enable DMA underrun interrupt for DAC channel 2
EricLew	0:80ee8f3b695e	1596	* @rmtoll CR DMAUDRIE2 LL_DAC_EnableIT_DMAUDR2
EricLew	0:80ee8f3b695e	1597	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	1598	* @retval None
EricLew	0:80ee8f3b695e	1599	*/
EricLew	0:80ee8f3b695e	1600	__STATIC_INLINE void LL_DAC_EnableIT_DMAUDR2(DAC_TypeDef *DACx)
EricLew	0:80ee8f3b695e	1601	{
EricLew	0:80ee8f3b695e	1602	SET_BIT(DACx->CR, DAC_CR_DMAUDRIE2);
EricLew	0:80ee8f3b695e	1603	}
EricLew	0:80ee8f3b695e	1604
EricLew	0:80ee8f3b695e	1605	/**
EricLew	0:80ee8f3b695e	1606	* @brief Disable DMA underrun interrupt for DAC channel 1
EricLew	0:80ee8f3b695e	1607	* @rmtoll CR DMAUDRIE1 LL_DAC_DisableIT_DMAUDR1
EricLew	0:80ee8f3b695e	1608	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	1609	* @retval None
EricLew	0:80ee8f3b695e	1610	*/
EricLew	0:80ee8f3b695e	1611	__STATIC_INLINE void LL_DAC_DisableIT_DMAUDR1(DAC_TypeDef *DACx)
EricLew	0:80ee8f3b695e	1612	{
EricLew	0:80ee8f3b695e	1613	CLEAR_BIT(DACx->CR, DAC_CR_DMAUDRIE1);
EricLew	0:80ee8f3b695e	1614	}
EricLew	0:80ee8f3b695e	1615
EricLew	0:80ee8f3b695e	1616	/**
EricLew	0:80ee8f3b695e	1617	* @brief Disable DMA underrun interrupt for DAC channel 2
EricLew	0:80ee8f3b695e	1618	* @rmtoll CR DMAUDRIE2 LL_DAC_DisableIT_DMAUDR2
EricLew	0:80ee8f3b695e	1619	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	1620	* @retval None
EricLew	0:80ee8f3b695e	1621	*/
EricLew	0:80ee8f3b695e	1622	__STATIC_INLINE void LL_DAC_DisableIT_DMAUDR2(DAC_TypeDef *DACx)
EricLew	0:80ee8f3b695e	1623	{
EricLew	0:80ee8f3b695e	1624	CLEAR_BIT(DACx->CR, DAC_CR_DMAUDRIE2);
EricLew	0:80ee8f3b695e	1625	}
EricLew	0:80ee8f3b695e	1626
EricLew	0:80ee8f3b695e	1627	/**
EricLew	0:80ee8f3b695e	1628	* @brief Get DMA underrun interrupt for DAC channel 1
EricLew	0:80ee8f3b695e	1629	* @rmtoll CR DMAUDRIE1 LL_DAC_IsEnabledIT_DMAUDR1
EricLew	0:80ee8f3b695e	1630	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	1631	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1632	*/
EricLew	0:80ee8f3b695e	1633	__STATIC_INLINE uint32_t LL_DAC_IsEnabledIT_DMAUDR1(DAC_TypeDef *DACx)
EricLew	0:80ee8f3b695e	1634	{
EricLew	0:80ee8f3b695e	1635	return (READ_BIT(DACx->CR, DAC_CR_DMAUDRIE1) == (DAC_CR_DMAUDRIE1));
EricLew	0:80ee8f3b695e	1636	}
EricLew	0:80ee8f3b695e	1637
EricLew	0:80ee8f3b695e	1638	/**
EricLew	0:80ee8f3b695e	1639	* @brief Get DMA underrun interrupt for DAC channel 2
EricLew	0:80ee8f3b695e	1640	* @rmtoll CR DMAUDRIE2 LL_DAC_IsEnabledIT_DMAUDR2
EricLew	0:80ee8f3b695e	1641	* @param DACx DAC instance
EricLew	0:80ee8f3b695e	1642	* @retval State of bit (1 or 0).
EricLew	0:80ee8f3b695e	1643	*/
EricLew	0:80ee8f3b695e	1644	__STATIC_INLINE uint32_t LL_DAC_IsEnabledIT_DMAUDR2(DAC_TypeDef *DACx)
EricLew	0:80ee8f3b695e	1645	{
EricLew	0:80ee8f3b695e	1646	return (READ_BIT(DACx->CR, DAC_CR_DMAUDRIE2) == (DAC_CR_DMAUDRIE2));
EricLew	0:80ee8f3b695e	1647	}
EricLew	0:80ee8f3b695e	1648
EricLew	0:80ee8f3b695e	1649	/**
EricLew	0:80ee8f3b695e	1650	* @}
EricLew	0:80ee8f3b695e	1651	*/
EricLew	0:80ee8f3b695e	1652
EricLew	0:80ee8f3b695e	1653
EricLew	0:80ee8f3b695e	1654	/**
EricLew	0:80ee8f3b695e	1655	* @}
EricLew	0:80ee8f3b695e	1656	*/
EricLew	0:80ee8f3b695e	1657
EricLew	0:80ee8f3b695e	1658	/**
EricLew	0:80ee8f3b695e	1659	* @}
EricLew	0:80ee8f3b695e	1660	*/
EricLew	0:80ee8f3b695e	1661
EricLew	0:80ee8f3b695e	1662	#endif /* DAC1 */
EricLew	0:80ee8f3b695e	1663
EricLew	0:80ee8f3b695e	1664	/**
EricLew	0:80ee8f3b695e	1665	* @}
EricLew	0:80ee8f3b695e	1666	*/
EricLew	0:80ee8f3b695e	1667
EricLew	0:80ee8f3b695e	1668	#ifdef __cplusplus
EricLew	0:80ee8f3b695e	1669	}
EricLew	0:80ee8f3b695e	1670	#endif
EricLew	0:80ee8f3b695e	1671
EricLew	0:80ee8f3b695e	1672	#endif /* __STM32L4xx_LL_DAC_H */
EricLew	0:80ee8f3b695e	1673
EricLew	0:80ee8f3b695e	1674	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/
EricLew	0:80ee8f3b695e	1675

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Type:	Library
Created:	12 Nov 2015
Imports:	198
Forks:	0
Commits:	3
Dependents:	4
Dependencies:	0
Followers:	14

Inc/stm32l4xx_ll_dac.h@2:7aef7655b0a8, 2015-11-25 (annotated)

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