Hal Drivers for L4

Dependents:   BSP OneHopeOnePrayer FINAL_AUDIO_RECORD AudioDemo

Fork of STM32L4xx_HAL_Driver by Senior Design: Sound Monitor

Committer:
EricLew
Date:
Wed Nov 25 17:30:43 2015 +0000
Revision:
2:7aef7655b0a8
Parent:
0:80ee8f3b695e
commit;

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EricLew 0:80ee8f3b695e 1 /**
EricLew 0:80ee8f3b695e 2 ******************************************************************************
EricLew 0:80ee8f3b695e 3 * @file stm32l4xx_hal_spi.h
EricLew 0:80ee8f3b695e 4 * @author MCD Application Team
EricLew 0:80ee8f3b695e 5 * @version V1.1.0
EricLew 0:80ee8f3b695e 6 * @date 16-September-2015
EricLew 0:80ee8f3b695e 7 * @brief Header file of SPI HAL module.
EricLew 0:80ee8f3b695e 8 ******************************************************************************
EricLew 0:80ee8f3b695e 9 * @attention
EricLew 0:80ee8f3b695e 10 *
EricLew 0:80ee8f3b695e 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
EricLew 0:80ee8f3b695e 12 *
EricLew 0:80ee8f3b695e 13 * Redistribution and use in source and binary forms, with or without modification,
EricLew 0:80ee8f3b695e 14 * are permitted provided that the following conditions are met:
EricLew 0:80ee8f3b695e 15 * 1. Redistributions of source code must retain the above copyright notice,
EricLew 0:80ee8f3b695e 16 * this list of conditions and the following disclaimer.
EricLew 0:80ee8f3b695e 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
EricLew 0:80ee8f3b695e 18 * this list of conditions and the following disclaimer in the documentation
EricLew 0:80ee8f3b695e 19 * and/or other materials provided with the distribution.
EricLew 0:80ee8f3b695e 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
EricLew 0:80ee8f3b695e 21 * may be used to endorse or promote products derived from this software
EricLew 0:80ee8f3b695e 22 * without specific prior written permission.
EricLew 0:80ee8f3b695e 23 *
EricLew 0:80ee8f3b695e 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
EricLew 0:80ee8f3b695e 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
EricLew 0:80ee8f3b695e 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
EricLew 0:80ee8f3b695e 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
EricLew 0:80ee8f3b695e 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
EricLew 0:80ee8f3b695e 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
EricLew 0:80ee8f3b695e 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
EricLew 0:80ee8f3b695e 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
EricLew 0:80ee8f3b695e 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
EricLew 0:80ee8f3b695e 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
EricLew 0:80ee8f3b695e 34 *
EricLew 0:80ee8f3b695e 35 ******************************************************************************
EricLew 0:80ee8f3b695e 36 */
EricLew 0:80ee8f3b695e 37
EricLew 0:80ee8f3b695e 38 /* Define to prevent recursive inclusion -------------------------------------*/
EricLew 0:80ee8f3b695e 39 #ifndef __STM32L4xx_HAL_SPI_H
EricLew 0:80ee8f3b695e 40 #define __STM32L4xx_HAL_SPI_H
EricLew 0:80ee8f3b695e 41
EricLew 0:80ee8f3b695e 42 #ifdef __cplusplus
EricLew 0:80ee8f3b695e 43 extern "C" {
EricLew 0:80ee8f3b695e 44 #endif
EricLew 0:80ee8f3b695e 45
EricLew 0:80ee8f3b695e 46 /* Includes ------------------------------------------------------------------*/
EricLew 0:80ee8f3b695e 47 #include "stm32l4xx_hal_def.h"
EricLew 0:80ee8f3b695e 48
EricLew 0:80ee8f3b695e 49 /** @addtogroup STM32L4xx_HAL_Driver
EricLew 0:80ee8f3b695e 50 * @{
EricLew 0:80ee8f3b695e 51 */
EricLew 0:80ee8f3b695e 52
EricLew 0:80ee8f3b695e 53 /** @addtogroup SPI
EricLew 0:80ee8f3b695e 54 * @{
EricLew 0:80ee8f3b695e 55 */
EricLew 0:80ee8f3b695e 56
EricLew 0:80ee8f3b695e 57 /* Exported types ------------------------------------------------------------*/
EricLew 0:80ee8f3b695e 58 /** @defgroup SPI_Exported_Types SPI Exported Types
EricLew 0:80ee8f3b695e 59 * @{
EricLew 0:80ee8f3b695e 60 */
EricLew 0:80ee8f3b695e 61
EricLew 0:80ee8f3b695e 62 /**
EricLew 0:80ee8f3b695e 63 * @brief SPI Configuration Structure definition
EricLew 0:80ee8f3b695e 64 */
EricLew 0:80ee8f3b695e 65 typedef struct
EricLew 0:80ee8f3b695e 66 {
EricLew 0:80ee8f3b695e 67 uint32_t Mode; /*!< Specifies the SPI operating mode.
EricLew 0:80ee8f3b695e 68 This parameter can be a value of @ref SPI_Mode */
EricLew 0:80ee8f3b695e 69
EricLew 0:80ee8f3b695e 70 uint32_t Direction; /*!< Specifies the SPI bidirectional mode state.
EricLew 0:80ee8f3b695e 71 This parameter can be a value of @ref SPI_Direction */
EricLew 0:80ee8f3b695e 72
EricLew 0:80ee8f3b695e 73 uint32_t DataSize; /*!< Specifies the SPI data size.
EricLew 0:80ee8f3b695e 74 This parameter can be a value of @ref SPI_Data_Size */
EricLew 0:80ee8f3b695e 75
EricLew 0:80ee8f3b695e 76 uint32_t CLKPolarity; /*!< Specifies the serial clock steady state.
EricLew 0:80ee8f3b695e 77 This parameter can be a value of @ref SPI_Clock_Polarity */
EricLew 0:80ee8f3b695e 78
EricLew 0:80ee8f3b695e 79 uint32_t CLKPhase; /*!< Specifies the clock active edge for the bit capture.
EricLew 0:80ee8f3b695e 80 This parameter can be a value of @ref SPI_Clock_Phase */
EricLew 0:80ee8f3b695e 81
EricLew 0:80ee8f3b695e 82 uint32_t NSS; /*!< Specifies whether the NSS signal is managed by
EricLew 0:80ee8f3b695e 83 hardware (NSS pin) or by software using the SSI bit.
EricLew 0:80ee8f3b695e 84 This parameter can be a value of @ref SPI_Slave_Select_management */
EricLew 0:80ee8f3b695e 85
EricLew 0:80ee8f3b695e 86 uint32_t BaudRatePrescaler; /*!< Specifies the Baud Rate prescaler value which will be
EricLew 0:80ee8f3b695e 87 used to configure the transmit and receive SCK clock.
EricLew 0:80ee8f3b695e 88 This parameter can be a value of @ref SPI_BaudRate_Prescaler
EricLew 0:80ee8f3b695e 89 @note The communication clock is derived from the master
EricLew 0:80ee8f3b695e 90 clock. The slave clock does not need to be set. */
EricLew 0:80ee8f3b695e 91
EricLew 0:80ee8f3b695e 92 uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
EricLew 0:80ee8f3b695e 93 This parameter can be a value of @ref SPI_MSB_LSB_transmission */
EricLew 0:80ee8f3b695e 94
EricLew 0:80ee8f3b695e 95 uint32_t TIMode; /*!< Specifies if the TI mode is enabled or not .
EricLew 0:80ee8f3b695e 96 This parameter can be a value of @ref SPI_TI_mode */
EricLew 0:80ee8f3b695e 97
EricLew 0:80ee8f3b695e 98 uint32_t CRCCalculation; /*!< Specifies if the CRC calculation is enabled or not.
EricLew 0:80ee8f3b695e 99 This parameter can be a value of @ref SPI_CRC_Calculation */
EricLew 0:80ee8f3b695e 100
EricLew 0:80ee8f3b695e 101 uint32_t CRCPolynomial; /*!< Specifies the polynomial used for the CRC calculation.
EricLew 0:80ee8f3b695e 102 This parameter must be a number between Min_Data = 0 and Max_Data = 65535 */
EricLew 0:80ee8f3b695e 103
EricLew 0:80ee8f3b695e 104 uint32_t CRCLength; /*!< Specifies the CRC Length used for the CRC calculation.
EricLew 0:80ee8f3b695e 105 CRC Length is only used with Data8 and Data16, not other data size
EricLew 0:80ee8f3b695e 106 This parameter can be a value of @ref SPI_CRC_length */
EricLew 0:80ee8f3b695e 107
EricLew 0:80ee8f3b695e 108 uint32_t NSSPMode; /*!< Specifies whether the NSSP signal is enabled or not .
EricLew 0:80ee8f3b695e 109 This parameter can be a value of @ref SPI_NSSP_Mode
EricLew 0:80ee8f3b695e 110 This mode is activated by the NSSP bit in the SPIx_CR2 register and
EricLew 0:80ee8f3b695e 111 it takes effect only if the SPI interface is configured as Motorola SPI
EricLew 0:80ee8f3b695e 112 master (FRF=0) with capture on the first edge (SPIx_CR1 CPHA = 0,
EricLew 0:80ee8f3b695e 113 CPOL setting is ignored).. */
EricLew 0:80ee8f3b695e 114 } SPI_InitTypeDef;
EricLew 0:80ee8f3b695e 115
EricLew 0:80ee8f3b695e 116 /**
EricLew 0:80ee8f3b695e 117 * @brief HAL State structures definition
EricLew 0:80ee8f3b695e 118 */
EricLew 0:80ee8f3b695e 119 typedef enum
EricLew 0:80ee8f3b695e 120 {
EricLew 0:80ee8f3b695e 121 HAL_SPI_STATE_RESET = 0x00, /*!< Peripheral not Initialized */
EricLew 0:80ee8f3b695e 122 HAL_SPI_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
EricLew 0:80ee8f3b695e 123 HAL_SPI_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
EricLew 0:80ee8f3b695e 124 HAL_SPI_STATE_BUSY_TX = 0x03, /*!< Data Transmission process is ongoing */
EricLew 0:80ee8f3b695e 125 HAL_SPI_STATE_BUSY_RX = 0x04, /*!< Data Reception process is ongoing */
EricLew 0:80ee8f3b695e 126 HAL_SPI_STATE_BUSY_TX_RX = 0x05, /*!< Data Transmission and Reception process is ongoing*/
EricLew 0:80ee8f3b695e 127 HAL_SPI_STATE_ERROR = 0x06 /*!< SPI error state */
EricLew 0:80ee8f3b695e 128 }HAL_SPI_StateTypeDef;
EricLew 0:80ee8f3b695e 129
EricLew 0:80ee8f3b695e 130 /**
EricLew 0:80ee8f3b695e 131 * @brief SPI handle Structure definition
EricLew 0:80ee8f3b695e 132 */
EricLew 0:80ee8f3b695e 133 typedef struct __SPI_HandleTypeDef
EricLew 0:80ee8f3b695e 134 {
EricLew 0:80ee8f3b695e 135 SPI_TypeDef *Instance; /* SPI registers base address */
EricLew 0:80ee8f3b695e 136
EricLew 0:80ee8f3b695e 137 SPI_InitTypeDef Init; /* SPI communication parameters */
EricLew 0:80ee8f3b695e 138
EricLew 0:80ee8f3b695e 139 uint8_t *pTxBuffPtr; /* Pointer to SPI Tx transfer Buffer */
EricLew 0:80ee8f3b695e 140
EricLew 0:80ee8f3b695e 141 uint16_t TxXferSize; /* SPI Tx Transfer size */
EricLew 0:80ee8f3b695e 142
EricLew 0:80ee8f3b695e 143 uint16_t TxXferCount; /* SPI Tx Transfer Counter */
EricLew 0:80ee8f3b695e 144
EricLew 0:80ee8f3b695e 145 uint8_t *pRxBuffPtr; /* Pointer to SPI Rx transfer Buffer */
EricLew 0:80ee8f3b695e 146
EricLew 0:80ee8f3b695e 147 uint16_t RxXferSize; /* SPI Rx Transfer size */
EricLew 0:80ee8f3b695e 148
EricLew 0:80ee8f3b695e 149 uint16_t RxXferCount; /* SPI Rx Transfer Counter */
EricLew 0:80ee8f3b695e 150
EricLew 0:80ee8f3b695e 151 uint32_t CRCSize; /* SPI CRC size used for the transfer */
EricLew 0:80ee8f3b695e 152
EricLew 0:80ee8f3b695e 153 void (*RxISR)(struct __SPI_HandleTypeDef *hspi); /* function pointer on Rx IRQ handler */
EricLew 0:80ee8f3b695e 154
EricLew 0:80ee8f3b695e 155 void (*TxISR)(struct __SPI_HandleTypeDef *hspi); /* function pointer on Tx IRQ handler */
EricLew 0:80ee8f3b695e 156
EricLew 0:80ee8f3b695e 157 DMA_HandleTypeDef *hdmatx; /* SPI Tx DMA Handle parameters */
EricLew 0:80ee8f3b695e 158
EricLew 0:80ee8f3b695e 159 DMA_HandleTypeDef *hdmarx; /* SPI Rx DMA Handle parameters */
EricLew 0:80ee8f3b695e 160
EricLew 0:80ee8f3b695e 161 HAL_LockTypeDef Lock; /* Locking object */
EricLew 0:80ee8f3b695e 162
EricLew 0:80ee8f3b695e 163 HAL_SPI_StateTypeDef State; /* SPI communication state */
EricLew 0:80ee8f3b695e 164
EricLew 0:80ee8f3b695e 165 uint32_t ErrorCode; /* SPI Error code */
EricLew 0:80ee8f3b695e 166
EricLew 0:80ee8f3b695e 167 }SPI_HandleTypeDef;
EricLew 0:80ee8f3b695e 168
EricLew 0:80ee8f3b695e 169 /**
EricLew 0:80ee8f3b695e 170 * @}
EricLew 0:80ee8f3b695e 171 */
EricLew 0:80ee8f3b695e 172
EricLew 0:80ee8f3b695e 173 /* Exported constants --------------------------------------------------------*/
EricLew 0:80ee8f3b695e 174
EricLew 0:80ee8f3b695e 175 /** @defgroup SPI_Exported_Constants SPI Exported Constants
EricLew 0:80ee8f3b695e 176 * @{
EricLew 0:80ee8f3b695e 177 */
EricLew 0:80ee8f3b695e 178
EricLew 0:80ee8f3b695e 179 /** @defgroup SPI_Error_Code SPI Error Code
EricLew 0:80ee8f3b695e 180 * @{
EricLew 0:80ee8f3b695e 181 */
EricLew 0:80ee8f3b695e 182 #define HAL_SPI_ERROR_NONE (uint32_t)0x00000000 /*!< No error */
EricLew 0:80ee8f3b695e 183 #define HAL_SPI_ERROR_MODF (uint32_t)0x00000001 /*!< MODF error */
EricLew 0:80ee8f3b695e 184 #define HAL_SPI_ERROR_CRC (uint32_t)0x00000002 /*!< CRC error */
EricLew 0:80ee8f3b695e 185 #define HAL_SPI_ERROR_OVR (uint32_t)0x00000004 /*!< OVR error */
EricLew 0:80ee8f3b695e 186 #define HAL_SPI_ERROR_FRE (uint32_t)0x00000008 /*!< FRE error */
EricLew 0:80ee8f3b695e 187 #define HAL_SPI_ERROR_DMA (uint32_t)0x00000010 /*!< DMA transfer error */
EricLew 0:80ee8f3b695e 188 #define HAL_SPI_ERROR_FLAG (uint32_t)0x00000020 /*!< Error on BSY/TXE/FTLVL/FRLVL Flag */
EricLew 0:80ee8f3b695e 189 #define HAL_SPI_ERROR_UNKNOW (uint32_t)0x00000040 /*!< Unknown error */
EricLew 0:80ee8f3b695e 190 /**
EricLew 0:80ee8f3b695e 191 * @}
EricLew 0:80ee8f3b695e 192 */
EricLew 0:80ee8f3b695e 193
EricLew 0:80ee8f3b695e 194
EricLew 0:80ee8f3b695e 195 /** @defgroup SPI_Mode SPI Mode
EricLew 0:80ee8f3b695e 196 * @{
EricLew 0:80ee8f3b695e 197 */
EricLew 0:80ee8f3b695e 198 #define SPI_MODE_SLAVE ((uint32_t)0x00000000)
EricLew 0:80ee8f3b695e 199 #define SPI_MODE_MASTER (SPI_CR1_MSTR | SPI_CR1_SSI)
EricLew 0:80ee8f3b695e 200 /**
EricLew 0:80ee8f3b695e 201 * @}
EricLew 0:80ee8f3b695e 202 */
EricLew 0:80ee8f3b695e 203
EricLew 0:80ee8f3b695e 204 /** @defgroup SPI_Direction SPI Direction Mode
EricLew 0:80ee8f3b695e 205 * @{
EricLew 0:80ee8f3b695e 206 */
EricLew 0:80ee8f3b695e 207 #define SPI_DIRECTION_2LINES ((uint32_t)0x00000000)
EricLew 0:80ee8f3b695e 208 #define SPI_DIRECTION_2LINES_RXONLY SPI_CR1_RXONLY
EricLew 0:80ee8f3b695e 209 #define SPI_DIRECTION_1LINE SPI_CR1_BIDIMODE
EricLew 0:80ee8f3b695e 210 /**
EricLew 0:80ee8f3b695e 211 * @}
EricLew 0:80ee8f3b695e 212 */
EricLew 0:80ee8f3b695e 213
EricLew 0:80ee8f3b695e 214 /** @defgroup SPI_Data_Size SPI Data Size
EricLew 0:80ee8f3b695e 215 * @{
EricLew 0:80ee8f3b695e 216 */
EricLew 0:80ee8f3b695e 217 #define SPI_DATASIZE_4BIT ((uint32_t)0x0300)
EricLew 0:80ee8f3b695e 218 #define SPI_DATASIZE_5BIT ((uint32_t)0x0400)
EricLew 0:80ee8f3b695e 219 #define SPI_DATASIZE_6BIT ((uint32_t)0x0500)
EricLew 0:80ee8f3b695e 220 #define SPI_DATASIZE_7BIT ((uint32_t)0x0600)
EricLew 0:80ee8f3b695e 221 #define SPI_DATASIZE_8BIT ((uint32_t)0x0700)
EricLew 0:80ee8f3b695e 222 #define SPI_DATASIZE_9BIT ((uint32_t)0x0800)
EricLew 0:80ee8f3b695e 223 #define SPI_DATASIZE_10BIT ((uint32_t)0x0900)
EricLew 0:80ee8f3b695e 224 #define SPI_DATASIZE_11BIT ((uint32_t)0x0A00)
EricLew 0:80ee8f3b695e 225 #define SPI_DATASIZE_12BIT ((uint32_t)0x0B00)
EricLew 0:80ee8f3b695e 226 #define SPI_DATASIZE_13BIT ((uint32_t)0x0C00)
EricLew 0:80ee8f3b695e 227 #define SPI_DATASIZE_14BIT ((uint32_t)0x0D00)
EricLew 0:80ee8f3b695e 228 #define SPI_DATASIZE_15BIT ((uint32_t)0x0E00)
EricLew 0:80ee8f3b695e 229 #define SPI_DATASIZE_16BIT ((uint32_t)0x0F00)
EricLew 0:80ee8f3b695e 230 /**
EricLew 0:80ee8f3b695e 231 * @}
EricLew 0:80ee8f3b695e 232 */
EricLew 0:80ee8f3b695e 233
EricLew 0:80ee8f3b695e 234 /** @defgroup SPI_Clock_Polarity SPI Clock Polarity
EricLew 0:80ee8f3b695e 235 * @{
EricLew 0:80ee8f3b695e 236 */
EricLew 0:80ee8f3b695e 237 #define SPI_POLARITY_LOW ((uint32_t)0x00000000)
EricLew 0:80ee8f3b695e 238 #define SPI_POLARITY_HIGH SPI_CR1_CPOL
EricLew 0:80ee8f3b695e 239 /**
EricLew 0:80ee8f3b695e 240 * @}
EricLew 0:80ee8f3b695e 241 */
EricLew 0:80ee8f3b695e 242
EricLew 0:80ee8f3b695e 243 /** @defgroup SPI_Clock_Phase SPI Clock Phase
EricLew 0:80ee8f3b695e 244 * @{
EricLew 0:80ee8f3b695e 245 */
EricLew 0:80ee8f3b695e 246 #define SPI_PHASE_1EDGE ((uint32_t)0x00000000)
EricLew 0:80ee8f3b695e 247 #define SPI_PHASE_2EDGE SPI_CR1_CPHA
EricLew 0:80ee8f3b695e 248 /**
EricLew 0:80ee8f3b695e 249 * @}
EricLew 0:80ee8f3b695e 250 */
EricLew 0:80ee8f3b695e 251
EricLew 0:80ee8f3b695e 252 /** @defgroup SPI_Slave_Select_management SPI Slave Select management
EricLew 0:80ee8f3b695e 253 * @{
EricLew 0:80ee8f3b695e 254 */
EricLew 0:80ee8f3b695e 255 #define SPI_NSS_SOFT SPI_CR1_SSM
EricLew 0:80ee8f3b695e 256 #define SPI_NSS_HARD_INPUT ((uint32_t)0x00000000)
EricLew 0:80ee8f3b695e 257 #define SPI_NSS_HARD_OUTPUT ((uint32_t)0x00040000)
EricLew 0:80ee8f3b695e 258 /**
EricLew 0:80ee8f3b695e 259 * @}
EricLew 0:80ee8f3b695e 260 */
EricLew 0:80ee8f3b695e 261
EricLew 0:80ee8f3b695e 262 /** @defgroup SPI_NSSP_Mode SPI NSS Pulse Mode
EricLew 0:80ee8f3b695e 263 * @{
EricLew 0:80ee8f3b695e 264 */
EricLew 0:80ee8f3b695e 265 #define SPI_NSS_PULSE_ENABLE SPI_CR2_NSSP
EricLew 0:80ee8f3b695e 266 #define SPI_NSS_PULSE_DISABLE ((uint32_t)0x00000000)
EricLew 0:80ee8f3b695e 267 /**
EricLew 0:80ee8f3b695e 268 * @}
EricLew 0:80ee8f3b695e 269 */
EricLew 0:80ee8f3b695e 270
EricLew 0:80ee8f3b695e 271 /** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler
EricLew 0:80ee8f3b695e 272 * @{
EricLew 0:80ee8f3b695e 273 */
EricLew 0:80ee8f3b695e 274 #define SPI_BAUDRATEPRESCALER_2 ((uint32_t)0x00000000)
EricLew 0:80ee8f3b695e 275 #define SPI_BAUDRATEPRESCALER_4 ((uint32_t)0x00000008)
EricLew 0:80ee8f3b695e 276 #define SPI_BAUDRATEPRESCALER_8 ((uint32_t)0x00000010)
EricLew 0:80ee8f3b695e 277 #define SPI_BAUDRATEPRESCALER_16 ((uint32_t)0x00000018)
EricLew 0:80ee8f3b695e 278 #define SPI_BAUDRATEPRESCALER_32 ((uint32_t)0x00000020)
EricLew 0:80ee8f3b695e 279 #define SPI_BAUDRATEPRESCALER_64 ((uint32_t)0x00000028)
EricLew 0:80ee8f3b695e 280 #define SPI_BAUDRATEPRESCALER_128 ((uint32_t)0x00000030)
EricLew 0:80ee8f3b695e 281 #define SPI_BAUDRATEPRESCALER_256 ((uint32_t)0x00000038)
EricLew 0:80ee8f3b695e 282 /**
EricLew 0:80ee8f3b695e 283 * @}
EricLew 0:80ee8f3b695e 284 */
EricLew 0:80ee8f3b695e 285
EricLew 0:80ee8f3b695e 286 /** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB transmission
EricLew 0:80ee8f3b695e 287 * @{
EricLew 0:80ee8f3b695e 288 */
EricLew 0:80ee8f3b695e 289 #define SPI_FIRSTBIT_MSB ((uint32_t)0x00000000)
EricLew 0:80ee8f3b695e 290 #define SPI_FIRSTBIT_LSB SPI_CR1_LSBFIRST
EricLew 0:80ee8f3b695e 291 /**
EricLew 0:80ee8f3b695e 292 * @}
EricLew 0:80ee8f3b695e 293 */
EricLew 0:80ee8f3b695e 294
EricLew 0:80ee8f3b695e 295 /** @defgroup SPI_TI_mode SPI TI mode
EricLew 0:80ee8f3b695e 296 * @{
EricLew 0:80ee8f3b695e 297 */
EricLew 0:80ee8f3b695e 298 #define SPI_TIMODE_DISABLE ((uint32_t)0x00000000)
EricLew 0:80ee8f3b695e 299 #define SPI_TIMODE_ENABLE SPI_CR2_FRF
EricLew 0:80ee8f3b695e 300 /**
EricLew 0:80ee8f3b695e 301 * @}
EricLew 0:80ee8f3b695e 302 */
EricLew 0:80ee8f3b695e 303
EricLew 0:80ee8f3b695e 304 /** @defgroup SPI_CRC_Calculation SPI CRC Calculation
EricLew 0:80ee8f3b695e 305 * @{
EricLew 0:80ee8f3b695e 306 */
EricLew 0:80ee8f3b695e 307 #define SPI_CRCCALCULATION_DISABLE ((uint32_t)0x00000000)
EricLew 0:80ee8f3b695e 308 #define SPI_CRCCALCULATION_ENABLE SPI_CR1_CRCEN
EricLew 0:80ee8f3b695e 309 /**
EricLew 0:80ee8f3b695e 310 * @}
EricLew 0:80ee8f3b695e 311 */
EricLew 0:80ee8f3b695e 312
EricLew 0:80ee8f3b695e 313 /** @defgroup SPI_CRC_length SPI CRC Length
EricLew 0:80ee8f3b695e 314 * @{
EricLew 0:80ee8f3b695e 315 * This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 316 * SPI_CRC_LENGTH_DATASIZE: aligned with the data size
EricLew 0:80ee8f3b695e 317 * SPI_CRC_LENGTH_8BIT : CRC 8bit
EricLew 0:80ee8f3b695e 318 * SPI_CRC_LENGTH_16BIT : CRC 16bit
EricLew 0:80ee8f3b695e 319 */
EricLew 0:80ee8f3b695e 320 #define SPI_CRC_LENGTH_DATASIZE ((uint32_t)0x00000000)
EricLew 0:80ee8f3b695e 321 #define SPI_CRC_LENGTH_8BIT ((uint32_t)0x00000001)
EricLew 0:80ee8f3b695e 322 #define SPI_CRC_LENGTH_16BIT ((uint32_t)0x00000002)
EricLew 0:80ee8f3b695e 323 /**
EricLew 0:80ee8f3b695e 324 * @}
EricLew 0:80ee8f3b695e 325 */
EricLew 0:80ee8f3b695e 326
EricLew 0:80ee8f3b695e 327 /** @defgroup SPI_FIFO_reception_threshold SPI FIFO Reception Threshold
EricLew 0:80ee8f3b695e 328 * @{
EricLew 0:80ee8f3b695e 329 * This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 330 * SPI_RXFIFO_THRESHOLD or SPI_RXFIFO_THRESHOLD_QF :
EricLew 0:80ee8f3b695e 331 * RXNE event is generated if the FIFO
EricLew 0:80ee8f3b695e 332 * level is greater or equal to 1/2(16-bits).
EricLew 0:80ee8f3b695e 333 * SPI_RXFIFO_THRESHOLD_HF: RXNE event is generated if the FIFO
EricLew 0:80ee8f3b695e 334 * level is greater or equal to 1/4(8 bits). */
EricLew 0:80ee8f3b695e 335 #define SPI_RXFIFO_THRESHOLD SPI_CR2_FRXTH
EricLew 0:80ee8f3b695e 336 #define SPI_RXFIFO_THRESHOLD_QF SPI_CR2_FRXTH
EricLew 0:80ee8f3b695e 337 #define SPI_RXFIFO_THRESHOLD_HF ((uint32_t)0x00000000)
EricLew 0:80ee8f3b695e 338
EricLew 0:80ee8f3b695e 339 /**
EricLew 0:80ee8f3b695e 340 * @}
EricLew 0:80ee8f3b695e 341 */
EricLew 0:80ee8f3b695e 342
EricLew 0:80ee8f3b695e 343 /** @defgroup SPI_Interrupt_configuration_definition SPI Interrupt configuration definition
EricLew 0:80ee8f3b695e 344 * @brief SPI Interrupt definition
EricLew 0:80ee8f3b695e 345 * Elements values convention: 0xXXXXXXXX
EricLew 0:80ee8f3b695e 346 * - XXXXXXXX : Interrupt control mask
EricLew 0:80ee8f3b695e 347 * @{
EricLew 0:80ee8f3b695e 348 */
EricLew 0:80ee8f3b695e 349 #define SPI_IT_TXE SPI_CR2_TXEIE
EricLew 0:80ee8f3b695e 350 #define SPI_IT_RXNE SPI_CR2_RXNEIE
EricLew 0:80ee8f3b695e 351 #define SPI_IT_ERR SPI_CR2_ERRIE
EricLew 0:80ee8f3b695e 352 /**
EricLew 0:80ee8f3b695e 353 * @}
EricLew 0:80ee8f3b695e 354 */
EricLew 0:80ee8f3b695e 355
EricLew 0:80ee8f3b695e 356
EricLew 0:80ee8f3b695e 357 /** @defgroup SPI_Flag_definition SPI Flag definition
EricLew 0:80ee8f3b695e 358 * @brief Flag definition
EricLew 0:80ee8f3b695e 359 * Elements values convention: 0xXXXXYYYY
EricLew 0:80ee8f3b695e 360 * - XXXX : Flag register Index
EricLew 0:80ee8f3b695e 361 * - YYYY : Flag mask
EricLew 0:80ee8f3b695e 362 * @{
EricLew 0:80ee8f3b695e 363 */
EricLew 0:80ee8f3b695e 364 #define SPI_FLAG_RXNE SPI_SR_RXNE /* SPI status flag: Rx buffer not empty flag */
EricLew 0:80ee8f3b695e 365 #define SPI_FLAG_TXE SPI_SR_TXE /* SPI status flag: Tx buffer empty flag */
EricLew 0:80ee8f3b695e 366 #define SPI_FLAG_BSY SPI_SR_BSY /* SPI status flag: Busy flag */
EricLew 0:80ee8f3b695e 367 #define SPI_FLAG_CRCERR SPI_SR_CRCERR /* SPI Error flag: CRC error flag */
EricLew 0:80ee8f3b695e 368 #define SPI_FLAG_MODF SPI_SR_MODF /* SPI Error flag: Mode fault flag */
EricLew 0:80ee8f3b695e 369 #define SPI_FLAG_OVR SPI_SR_OVR /* SPI Error flag: Overrun flag */
EricLew 0:80ee8f3b695e 370 #define SPI_FLAG_FRE SPI_SR_FRE /* SPI Error flag: TI mode frame format error flag */
EricLew 0:80ee8f3b695e 371 #define SPI_FLAG_FTLVL SPI_SR_FTLVL /* SPI fifo transmission level */
EricLew 0:80ee8f3b695e 372 #define SPI_FLAG_FRLVL SPI_SR_FRLVL /* SPI fifo reception level */
EricLew 0:80ee8f3b695e 373 /**
EricLew 0:80ee8f3b695e 374 * @}
EricLew 0:80ee8f3b695e 375 */
EricLew 0:80ee8f3b695e 376
EricLew 0:80ee8f3b695e 377 /** @defgroup SPI_transmission_fifo_status_level SPI Transmission FIFO Status Level
EricLew 0:80ee8f3b695e 378 * @{
EricLew 0:80ee8f3b695e 379 */
EricLew 0:80ee8f3b695e 380 #define SPI_FTLVL_EMPTY ((uint32_t)0x0000)
EricLew 0:80ee8f3b695e 381 #define SPI_FTLVL_QUARTER_FULL ((uint32_t)0x0800)
EricLew 0:80ee8f3b695e 382 #define SPI_FTLVL_HALF_FULL ((uint32_t)0x1000)
EricLew 0:80ee8f3b695e 383 #define SPI_FTLVL_FULL ((uint32_t)0x1800)
EricLew 0:80ee8f3b695e 384
EricLew 0:80ee8f3b695e 385 /**
EricLew 0:80ee8f3b695e 386 * @}
EricLew 0:80ee8f3b695e 387 */
EricLew 0:80ee8f3b695e 388
EricLew 0:80ee8f3b695e 389 /** @defgroup SPI_reception_fifo_status_level SPI Reception FIFO Status Level
EricLew 0:80ee8f3b695e 390 * @{
EricLew 0:80ee8f3b695e 391 */
EricLew 0:80ee8f3b695e 392 #define SPI_FRLVL_EMPTY ((uint32_t)0x0000)
EricLew 0:80ee8f3b695e 393 #define SPI_FRLVL_QUARTER_FULL ((uint32_t)0x0200)
EricLew 0:80ee8f3b695e 394 #define SPI_FRLVL_HALF_FULL ((uint32_t)0x0400)
EricLew 0:80ee8f3b695e 395 #define SPI_FRLVL_FULL ((uint32_t)0x0600)
EricLew 0:80ee8f3b695e 396 /**
EricLew 0:80ee8f3b695e 397 * @}
EricLew 0:80ee8f3b695e 398 */
EricLew 0:80ee8f3b695e 399
EricLew 0:80ee8f3b695e 400 /**
EricLew 0:80ee8f3b695e 401 * @}
EricLew 0:80ee8f3b695e 402 */
EricLew 0:80ee8f3b695e 403
EricLew 0:80ee8f3b695e 404 /* Exported macros ------------------------------------------------------------*/
EricLew 0:80ee8f3b695e 405 /** @defgroup SPI_Exported_Macros SPI Exported Macros
EricLew 0:80ee8f3b695e 406 * @{
EricLew 0:80ee8f3b695e 407 */
EricLew 0:80ee8f3b695e 408
EricLew 0:80ee8f3b695e 409 /** @brief Reset SPI handle state.
EricLew 0:80ee8f3b695e 410 * @param __HANDLE__: SPI handle.
EricLew 0:80ee8f3b695e 411 * @retval None
EricLew 0:80ee8f3b695e 412 */
EricLew 0:80ee8f3b695e 413 #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET)
EricLew 0:80ee8f3b695e 414
EricLew 0:80ee8f3b695e 415 /** @brief Enable or disable the specified SPI interrupts.
EricLew 0:80ee8f3b695e 416 * @param __HANDLE__: specifies the SPI Handle.
EricLew 0:80ee8f3b695e 417 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
EricLew 0:80ee8f3b695e 418 * @param __INTERRUPT__: specifies the interrupt source to enable or disable.
EricLew 0:80ee8f3b695e 419 * This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 420 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable
EricLew 0:80ee8f3b695e 421 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
EricLew 0:80ee8f3b695e 422 * @arg SPI_IT_ERR: Error interrupt enable
EricLew 0:80ee8f3b695e 423 * @retval None
EricLew 0:80ee8f3b695e 424 */
EricLew 0:80ee8f3b695e 425 #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
EricLew 0:80ee8f3b695e 426 #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= (~(__INTERRUPT__)))
EricLew 0:80ee8f3b695e 427
EricLew 0:80ee8f3b695e 428 /** @brief Check whether the specified SPI interrupt source is enabled or not.
EricLew 0:80ee8f3b695e 429 * @param __HANDLE__: specifies the SPI Handle.
EricLew 0:80ee8f3b695e 430 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
EricLew 0:80ee8f3b695e 431 * @param __INTERRUPT__: specifies the SPI interrupt source to check.
EricLew 0:80ee8f3b695e 432 * This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 433 * @arg SPI_IT_TXE: Tx buffer empty interrupt enable
EricLew 0:80ee8f3b695e 434 * @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
EricLew 0:80ee8f3b695e 435 * @arg SPI_IT_ERR: Error interrupt enable
EricLew 0:80ee8f3b695e 436 * @retval The new state of __IT__ (TRUE or FALSE).
EricLew 0:80ee8f3b695e 437 */
EricLew 0:80ee8f3b695e 438 #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
EricLew 0:80ee8f3b695e 439
EricLew 0:80ee8f3b695e 440 /** @brief Check whether the specified SPI flag is set or not.
EricLew 0:80ee8f3b695e 441 * @param __HANDLE__: specifies the SPI Handle.
EricLew 0:80ee8f3b695e 442 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
EricLew 0:80ee8f3b695e 443 * @param __FLAG__: specifies the flag to check.
EricLew 0:80ee8f3b695e 444 * This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 445 * @arg SPI_FLAG_RXNE: Receive buffer not empty flag
EricLew 0:80ee8f3b695e 446 * @arg SPI_FLAG_TXE: Transmit buffer empty flag
EricLew 0:80ee8f3b695e 447 * @arg SPI_FLAG_CRCERR: CRC error flag
EricLew 0:80ee8f3b695e 448 * @arg SPI_FLAG_MODF: Mode fault flag
EricLew 0:80ee8f3b695e 449 * @arg SPI_FLAG_OVR: Overrun flag
EricLew 0:80ee8f3b695e 450 * @arg SPI_FLAG_BSY: Busy flag
EricLew 0:80ee8f3b695e 451 * @arg SPI_FLAG_FRE: Frame format error flag
EricLew 0:80ee8f3b695e 452 * @arg SPI_FLAG_FTLVL: SPI fifo transmission level
EricLew 0:80ee8f3b695e 453 * @arg SPI_FLAG_FRLVL: SPI fifo reception level
EricLew 0:80ee8f3b695e 454 * @retval The new state of __FLAG__ (TRUE or FALSE).
EricLew 0:80ee8f3b695e 455 */
EricLew 0:80ee8f3b695e 456 #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
EricLew 0:80ee8f3b695e 457
EricLew 0:80ee8f3b695e 458 /** @brief Clear the SPI CRCERR pending flag.
EricLew 0:80ee8f3b695e 459 * @param __HANDLE__: specifies the SPI Handle.
EricLew 0:80ee8f3b695e 460 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
EricLew 0:80ee8f3b695e 461 * @retval None
EricLew 0:80ee8f3b695e 462 */
EricLew 0:80ee8f3b695e 463 #define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = (uint16_t)(~SPI_FLAG_CRCERR))
EricLew 0:80ee8f3b695e 464
EricLew 0:80ee8f3b695e 465 /** @brief Clear the SPI MODF pending flag.
EricLew 0:80ee8f3b695e 466 * @param __HANDLE__: specifies the SPI Handle.
EricLew 0:80ee8f3b695e 467 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
EricLew 0:80ee8f3b695e 468 *
EricLew 0:80ee8f3b695e 469 * @retval None
EricLew 0:80ee8f3b695e 470 */
EricLew 0:80ee8f3b695e 471 #define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__) \
EricLew 0:80ee8f3b695e 472 do{ \
EricLew 0:80ee8f3b695e 473 __IO uint32_t tmpreg; \
EricLew 0:80ee8f3b695e 474 tmpreg = (__HANDLE__)->Instance->SR; \
EricLew 0:80ee8f3b695e 475 (__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE); \
EricLew 0:80ee8f3b695e 476 UNUSED(tmpreg); \
EricLew 0:80ee8f3b695e 477 } while(0)
EricLew 0:80ee8f3b695e 478
EricLew 0:80ee8f3b695e 479 /** @brief Clear the SPI OVR pending flag.
EricLew 0:80ee8f3b695e 480 * @param __HANDLE__: specifies the SPI Handle.
EricLew 0:80ee8f3b695e 481 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
EricLew 0:80ee8f3b695e 482 *
EricLew 0:80ee8f3b695e 483 * @retval None
EricLew 0:80ee8f3b695e 484 */
EricLew 0:80ee8f3b695e 485 #define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__) \
EricLew 0:80ee8f3b695e 486 do{ \
EricLew 0:80ee8f3b695e 487 __IO uint32_t tmpreg; \
EricLew 0:80ee8f3b695e 488 tmpreg = (__HANDLE__)->Instance->DR; \
EricLew 0:80ee8f3b695e 489 tmpreg = (__HANDLE__)->Instance->SR; \
EricLew 0:80ee8f3b695e 490 UNUSED(tmpreg); \
EricLew 0:80ee8f3b695e 491 } while(0)
EricLew 0:80ee8f3b695e 492
EricLew 0:80ee8f3b695e 493 /** @brief Clear the SPI FRE pending flag.
EricLew 0:80ee8f3b695e 494 * @param __HANDLE__: specifies the SPI Handle.
EricLew 0:80ee8f3b695e 495 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
EricLew 0:80ee8f3b695e 496 *
EricLew 0:80ee8f3b695e 497 * @retval None
EricLew 0:80ee8f3b695e 498 */
EricLew 0:80ee8f3b695e 499 #define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__) \
EricLew 0:80ee8f3b695e 500 do{ \
EricLew 0:80ee8f3b695e 501 __IO uint32_t tmpreg; \
EricLew 0:80ee8f3b695e 502 tmpreg = (__HANDLE__)->Instance->SR; \
EricLew 0:80ee8f3b695e 503 UNUSED(tmpreg); \
EricLew 0:80ee8f3b695e 504 } while(0)
EricLew 0:80ee8f3b695e 505
EricLew 0:80ee8f3b695e 506 /** @brief Enable the SPI peripheral.
EricLew 0:80ee8f3b695e 507 * @param __HANDLE__: specifies the SPI Handle.
EricLew 0:80ee8f3b695e 508 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
EricLew 0:80ee8f3b695e 509 * @retval None
EricLew 0:80ee8f3b695e 510 */
EricLew 0:80ee8f3b695e 511 #define __HAL_SPI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_SPE)
EricLew 0:80ee8f3b695e 512
EricLew 0:80ee8f3b695e 513 /** @brief Disable the SPI peripheral.
EricLew 0:80ee8f3b695e 514 * @param __HANDLE__: specifies the SPI Handle.
EricLew 0:80ee8f3b695e 515 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
EricLew 0:80ee8f3b695e 516 * @retval None
EricLew 0:80ee8f3b695e 517 */
EricLew 0:80ee8f3b695e 518 #define __HAL_SPI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (~SPI_CR1_SPE))
EricLew 0:80ee8f3b695e 519
EricLew 0:80ee8f3b695e 520 /**
EricLew 0:80ee8f3b695e 521 * @}
EricLew 0:80ee8f3b695e 522 */
EricLew 0:80ee8f3b695e 523
EricLew 0:80ee8f3b695e 524 /* Private macros --------------------------------------------------------*/
EricLew 0:80ee8f3b695e 525 /** @defgroup SPI_Private_Macros SPI Private Macros
EricLew 0:80ee8f3b695e 526 * @{
EricLew 0:80ee8f3b695e 527 */
EricLew 0:80ee8f3b695e 528
EricLew 0:80ee8f3b695e 529 /** @brief Set the SPI transmit-only mode.
EricLew 0:80ee8f3b695e 530 * @param __HANDLE__: specifies the SPI Handle.
EricLew 0:80ee8f3b695e 531 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
EricLew 0:80ee8f3b695e 532 * @retval None
EricLew 0:80ee8f3b695e 533 */
EricLew 0:80ee8f3b695e 534 #define SPI_1LINE_TX(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SPI_CR1_BIDIOE)
EricLew 0:80ee8f3b695e 535
EricLew 0:80ee8f3b695e 536 /** @brief Set the SPI receive-only mode.
EricLew 0:80ee8f3b695e 537 * @param __HANDLE__: specifies the SPI Handle.
EricLew 0:80ee8f3b695e 538 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
EricLew 0:80ee8f3b695e 539 * @retval None
EricLew 0:80ee8f3b695e 540 */
EricLew 0:80ee8f3b695e 541 #define SPI_1LINE_RX(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= (~SPI_CR1_BIDIOE))
EricLew 0:80ee8f3b695e 542
EricLew 0:80ee8f3b695e 543 /** @brief Reset the CRC calculation of the SPI.
EricLew 0:80ee8f3b695e 544 * @param __HANDLE__: specifies the SPI Handle.
EricLew 0:80ee8f3b695e 545 * This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
EricLew 0:80ee8f3b695e 546 * @retval None
EricLew 0:80ee8f3b695e 547 */
EricLew 0:80ee8f3b695e 548 #define SPI_RESET_CRC(__HANDLE__) do{(__HANDLE__)->Instance->CR1 &= (uint16_t)(~SPI_CR1_CRCEN);\
EricLew 0:80ee8f3b695e 549 (__HANDLE__)->Instance->CR1 |= SPI_CR1_CRCEN;}while(0)
EricLew 0:80ee8f3b695e 550
EricLew 0:80ee8f3b695e 551 #define IS_SPI_MODE(MODE) (((MODE) == SPI_MODE_SLAVE) || \
EricLew 0:80ee8f3b695e 552 ((MODE) == SPI_MODE_MASTER))
EricLew 0:80ee8f3b695e 553
EricLew 0:80ee8f3b695e 554 #define IS_SPI_DIRECTION(MODE) (((MODE) == SPI_DIRECTION_2LINES) || \
EricLew 0:80ee8f3b695e 555 ((MODE) == SPI_DIRECTION_2LINES_RXONLY) ||\
EricLew 0:80ee8f3b695e 556 ((MODE) == SPI_DIRECTION_1LINE))
EricLew 0:80ee8f3b695e 557
EricLew 0:80ee8f3b695e 558 #define IS_SPI_DIRECTION_2LINES(MODE) ((MODE) == SPI_DIRECTION_2LINES)
EricLew 0:80ee8f3b695e 559
EricLew 0:80ee8f3b695e 560 #define IS_SPI_DIRECTION_2LINES_OR_1LINE(MODE) (((MODE) == SPI_DIRECTION_2LINES)|| \
EricLew 0:80ee8f3b695e 561 ((MODE) == SPI_DIRECTION_1LINE))
EricLew 0:80ee8f3b695e 562
EricLew 0:80ee8f3b695e 563 #define IS_SPI_DATASIZE(DATASIZE) (((DATASIZE) == SPI_DATASIZE_16BIT) || \
EricLew 0:80ee8f3b695e 564 ((DATASIZE) == SPI_DATASIZE_15BIT) || \
EricLew 0:80ee8f3b695e 565 ((DATASIZE) == SPI_DATASIZE_14BIT) || \
EricLew 0:80ee8f3b695e 566 ((DATASIZE) == SPI_DATASIZE_13BIT) || \
EricLew 0:80ee8f3b695e 567 ((DATASIZE) == SPI_DATASIZE_12BIT) || \
EricLew 0:80ee8f3b695e 568 ((DATASIZE) == SPI_DATASIZE_11BIT) || \
EricLew 0:80ee8f3b695e 569 ((DATASIZE) == SPI_DATASIZE_10BIT) || \
EricLew 0:80ee8f3b695e 570 ((DATASIZE) == SPI_DATASIZE_9BIT) || \
EricLew 0:80ee8f3b695e 571 ((DATASIZE) == SPI_DATASIZE_8BIT) || \
EricLew 0:80ee8f3b695e 572 ((DATASIZE) == SPI_DATASIZE_7BIT) || \
EricLew 0:80ee8f3b695e 573 ((DATASIZE) == SPI_DATASIZE_6BIT) || \
EricLew 0:80ee8f3b695e 574 ((DATASIZE) == SPI_DATASIZE_5BIT) || \
EricLew 0:80ee8f3b695e 575 ((DATASIZE) == SPI_DATASIZE_4BIT))
EricLew 0:80ee8f3b695e 576
EricLew 0:80ee8f3b695e 577 #define IS_SPI_CPOL(CPOL) (((CPOL) == SPI_POLARITY_LOW) || \
EricLew 0:80ee8f3b695e 578 ((CPOL) == SPI_POLARITY_HIGH))
EricLew 0:80ee8f3b695e 579
EricLew 0:80ee8f3b695e 580 #define IS_SPI_CPHA(CPHA) (((CPHA) == SPI_PHASE_1EDGE) || \
EricLew 0:80ee8f3b695e 581 ((CPHA) == SPI_PHASE_2EDGE))
EricLew 0:80ee8f3b695e 582
EricLew 0:80ee8f3b695e 583 #define IS_SPI_NSS(NSS) (((NSS) == SPI_NSS_SOFT) || \
EricLew 0:80ee8f3b695e 584 ((NSS) == SPI_NSS_HARD_INPUT) || \
EricLew 0:80ee8f3b695e 585 ((NSS) == SPI_NSS_HARD_OUTPUT))
EricLew 0:80ee8f3b695e 586
EricLew 0:80ee8f3b695e 587 #define IS_SPI_NSSP(NSSP) (((NSSP) == SPI_NSS_PULSE_ENABLE) || \
EricLew 0:80ee8f3b695e 588 ((NSSP) == SPI_NSS_PULSE_DISABLE))
EricLew 0:80ee8f3b695e 589
EricLew 0:80ee8f3b695e 590 #define IS_SPI_BAUDRATE_PRESCALER(PRESCALER) (((PRESCALER) == SPI_BAUDRATEPRESCALER_2) || \
EricLew 0:80ee8f3b695e 591 ((PRESCALER) == SPI_BAUDRATEPRESCALER_4) || \
EricLew 0:80ee8f3b695e 592 ((PRESCALER) == SPI_BAUDRATEPRESCALER_8) || \
EricLew 0:80ee8f3b695e 593 ((PRESCALER) == SPI_BAUDRATEPRESCALER_16) || \
EricLew 0:80ee8f3b695e 594 ((PRESCALER) == SPI_BAUDRATEPRESCALER_32) || \
EricLew 0:80ee8f3b695e 595 ((PRESCALER) == SPI_BAUDRATEPRESCALER_64) || \
EricLew 0:80ee8f3b695e 596 ((PRESCALER) == SPI_BAUDRATEPRESCALER_128) || \
EricLew 0:80ee8f3b695e 597 ((PRESCALER) == SPI_BAUDRATEPRESCALER_256))
EricLew 0:80ee8f3b695e 598
EricLew 0:80ee8f3b695e 599 #define IS_SPI_FIRST_BIT(BIT) (((BIT) == SPI_FIRSTBIT_MSB) || \
EricLew 0:80ee8f3b695e 600 ((BIT) == SPI_FIRSTBIT_LSB))
EricLew 0:80ee8f3b695e 601
EricLew 0:80ee8f3b695e 602 #define IS_SPI_TIMODE(MODE) (((MODE) == SPI_TIMODE_DISABLE) || \
EricLew 0:80ee8f3b695e 603 ((MODE) == SPI_TIMODE_ENABLE))
EricLew 0:80ee8f3b695e 604
EricLew 0:80ee8f3b695e 605 #define IS_SPI_CRC_CALCULATION(CALCULATION) (((CALCULATION) == SPI_CRCCALCULATION_DISABLE) || \
EricLew 0:80ee8f3b695e 606 ((CALCULATION) == SPI_CRCCALCULATION_ENABLE))
EricLew 0:80ee8f3b695e 607
EricLew 0:80ee8f3b695e 608 #define IS_SPI_CRC_LENGTH(LENGTH) (((LENGTH) == SPI_CRC_LENGTH_DATASIZE) ||\
EricLew 0:80ee8f3b695e 609 ((LENGTH) == SPI_CRC_LENGTH_8BIT) || \
EricLew 0:80ee8f3b695e 610 ((LENGTH) == SPI_CRC_LENGTH_16BIT))
EricLew 0:80ee8f3b695e 611
EricLew 0:80ee8f3b695e 612 #define IS_SPI_CRC_POLYNOMIAL(POLYNOMIAL) (((POLYNOMIAL) >= 0x1) && ((POLYNOMIAL) <= 0xFFFF))
EricLew 0:80ee8f3b695e 613
EricLew 0:80ee8f3b695e 614
EricLew 0:80ee8f3b695e 615 /**
EricLew 0:80ee8f3b695e 616 * @}
EricLew 0:80ee8f3b695e 617 */
EricLew 0:80ee8f3b695e 618
EricLew 0:80ee8f3b695e 619 /* Include SPI HAL Extended module */
EricLew 0:80ee8f3b695e 620 #include "stm32l4xx_hal_spi_ex.h"
EricLew 0:80ee8f3b695e 621
EricLew 0:80ee8f3b695e 622 /* Exported functions --------------------------------------------------------*/
EricLew 0:80ee8f3b695e 623 /** @addtogroup SPI_Exported_Functions
EricLew 0:80ee8f3b695e 624 * @{
EricLew 0:80ee8f3b695e 625 */
EricLew 0:80ee8f3b695e 626
EricLew 0:80ee8f3b695e 627 /* Initialization and de-initialization functions ****************************/
EricLew 0:80ee8f3b695e 628 /** @addtogroup SPI_Exported_Functions_Group1
EricLew 0:80ee8f3b695e 629 * @{
EricLew 0:80ee8f3b695e 630 */
EricLew 0:80ee8f3b695e 631 HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi);
EricLew 0:80ee8f3b695e 632 HAL_StatusTypeDef HAL_SPI_DeInit (SPI_HandleTypeDef *hspi);
EricLew 0:80ee8f3b695e 633 void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi);
EricLew 0:80ee8f3b695e 634 void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi);
EricLew 0:80ee8f3b695e 635 /**
EricLew 0:80ee8f3b695e 636 * @}
EricLew 0:80ee8f3b695e 637 */
EricLew 0:80ee8f3b695e 638
EricLew 0:80ee8f3b695e 639 /* IO operation functions *****************************************************/
EricLew 0:80ee8f3b695e 640 /** @addtogroup SPI_Exported_Functions_Group2
EricLew 0:80ee8f3b695e 641 * @{
EricLew 0:80ee8f3b695e 642 */
EricLew 0:80ee8f3b695e 643 HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
EricLew 0:80ee8f3b695e 644 HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
EricLew 0:80ee8f3b695e 645 HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
EricLew 0:80ee8f3b695e 646 HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
EricLew 0:80ee8f3b695e 647 HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
EricLew 0:80ee8f3b695e 648 HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
EricLew 0:80ee8f3b695e 649 HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
EricLew 0:80ee8f3b695e 650 HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
EricLew 0:80ee8f3b695e 651 HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
EricLew 0:80ee8f3b695e 652 HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi);
EricLew 0:80ee8f3b695e 653 HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi);
EricLew 0:80ee8f3b695e 654 HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi);
EricLew 0:80ee8f3b695e 655
EricLew 0:80ee8f3b695e 656 void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi);
EricLew 0:80ee8f3b695e 657 void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi);
EricLew 0:80ee8f3b695e 658 void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi);
EricLew 0:80ee8f3b695e 659 void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi);
EricLew 0:80ee8f3b695e 660 void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi);
EricLew 0:80ee8f3b695e 661 void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi);
EricLew 0:80ee8f3b695e 662 void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi);
EricLew 0:80ee8f3b695e 663 void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi);
EricLew 0:80ee8f3b695e 664 /**
EricLew 0:80ee8f3b695e 665 * @}
EricLew 0:80ee8f3b695e 666 */
EricLew 0:80ee8f3b695e 667
EricLew 0:80ee8f3b695e 668 /* Peripheral State and Error functions ***************************************/
EricLew 0:80ee8f3b695e 669 /** @addtogroup SPI_Exported_Functions_Group3
EricLew 0:80ee8f3b695e 670 * @{
EricLew 0:80ee8f3b695e 671 */
EricLew 0:80ee8f3b695e 672 HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi);
EricLew 0:80ee8f3b695e 673 uint32_t HAL_SPI_GetError(SPI_HandleTypeDef *hspi);
EricLew 0:80ee8f3b695e 674 /**
EricLew 0:80ee8f3b695e 675 * @}
EricLew 0:80ee8f3b695e 676 */
EricLew 0:80ee8f3b695e 677
EricLew 0:80ee8f3b695e 678 /**
EricLew 0:80ee8f3b695e 679 * @}
EricLew 0:80ee8f3b695e 680 */
EricLew 0:80ee8f3b695e 681
EricLew 0:80ee8f3b695e 682 /**
EricLew 0:80ee8f3b695e 683 * @}
EricLew 0:80ee8f3b695e 684 */
EricLew 0:80ee8f3b695e 685
EricLew 0:80ee8f3b695e 686 /**
EricLew 0:80ee8f3b695e 687 * @}
EricLew 0:80ee8f3b695e 688 */
EricLew 0:80ee8f3b695e 689
EricLew 0:80ee8f3b695e 690 #ifdef __cplusplus
EricLew 0:80ee8f3b695e 691 }
EricLew 0:80ee8f3b695e 692 #endif
EricLew 0:80ee8f3b695e 693
EricLew 0:80ee8f3b695e 694 #endif /* __STM32L4xx_HAL_SPI_H */
EricLew 0:80ee8f3b695e 695
EricLew 0:80ee8f3b695e 696 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
EricLew 0:80ee8f3b695e 697