Eric Lewiston / STM32L4xx_HAL_Driver

Hal Drivers for L4

Dependents:   BSP OneHopeOnePrayer FINAL_AUDIO_RECORD AudioDemo

Fork of STM32L4xx_HAL_Driver by Senior Design: Sound Monitor

Inc/stm32l4xx_hal_pwr_ex.h@2:7aef7655b0a8, 2015-11-25 (annotated)

Committer:
EricLew
Date:
Wed Nov 25 17:30:43 2015 +0000
Revision:
2:7aef7655b0a8
Parent:
0:80ee8f3b695e 
commit;

Who changed what in which revision?

UserRevisionLine numberNew contents of line
EricLew 0:80ee8f3b695e 1 /**
EricLew 0:80ee8f3b695e 2 ******************************************************************************
EricLew 0:80ee8f3b695e 3 * @file stm32l4xx_hal_pwr_ex.h
EricLew 0:80ee8f3b695e 4 * @author MCD Application Team
EricLew 0:80ee8f3b695e 5 * @version V1.1.0
EricLew 0:80ee8f3b695e 6 * @date 16-September-2015
EricLew 0:80ee8f3b695e 7 * @brief Header file of PWR HAL Extended module.
EricLew 0:80ee8f3b695e 8 ******************************************************************************
EricLew 0:80ee8f3b695e 9 * @attention
EricLew 0:80ee8f3b695e 10 *
EricLew 0:80ee8f3b695e 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
EricLew 0:80ee8f3b695e 12 *
EricLew 0:80ee8f3b695e 13 * Redistribution and use in source and binary forms, with or without modification,
EricLew 0:80ee8f3b695e 14 * are permitted provided that the following conditions are met:
EricLew 0:80ee8f3b695e 15 * 1. Redistributions of source code must retain the above copyright notice,
EricLew 0:80ee8f3b695e 16 * this list of conditions and the following disclaimer.
EricLew 0:80ee8f3b695e 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
EricLew 0:80ee8f3b695e 18 * this list of conditions and the following disclaimer in the documentation
EricLew 0:80ee8f3b695e 19 * and/or other materials provided with the distribution.
EricLew 0:80ee8f3b695e 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
EricLew 0:80ee8f3b695e 21 * may be used to endorse or promote products derived from this software
EricLew 0:80ee8f3b695e 22 * without specific prior written permission.
EricLew 0:80ee8f3b695e 23 *
EricLew 0:80ee8f3b695e 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
EricLew 0:80ee8f3b695e 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
EricLew 0:80ee8f3b695e 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
EricLew 0:80ee8f3b695e 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
EricLew 0:80ee8f3b695e 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
EricLew 0:80ee8f3b695e 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
EricLew 0:80ee8f3b695e 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
EricLew 0:80ee8f3b695e 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
EricLew 0:80ee8f3b695e 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
EricLew 0:80ee8f3b695e 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
EricLew 0:80ee8f3b695e 34 *
EricLew 0:80ee8f3b695e 35 ******************************************************************************
EricLew 0:80ee8f3b695e 36 */
EricLew 0:80ee8f3b695e 37
EricLew 0:80ee8f3b695e 38 /* Define to prevent recursive inclusion -------------------------------------*/
EricLew 0:80ee8f3b695e 39 #ifndef __STM32L4xx_HAL_PWR_EX_H
EricLew 0:80ee8f3b695e 40 #define __STM32L4xx_HAL_PWR_EX_H
EricLew 0:80ee8f3b695e 41
EricLew 0:80ee8f3b695e 42 #ifdef __cplusplus
EricLew 0:80ee8f3b695e 43 extern "C" {
EricLew 0:80ee8f3b695e 44 #endif
EricLew 0:80ee8f3b695e 45
EricLew 0:80ee8f3b695e 46 /* Includes ------------------------------------------------------------------*/
EricLew 0:80ee8f3b695e 47 #include "stm32l4xx_hal_def.h"
EricLew 0:80ee8f3b695e 48
EricLew 0:80ee8f3b695e 49 /** @addtogroup STM32L4xx_HAL_Driver
EricLew 0:80ee8f3b695e 50 * @{
EricLew 0:80ee8f3b695e 51 */
EricLew 0:80ee8f3b695e 52
EricLew 0:80ee8f3b695e 53 /** @addtogroup PWREx
EricLew 0:80ee8f3b695e 54 * @{
EricLew 0:80ee8f3b695e 55 */
EricLew 0:80ee8f3b695e 56
EricLew 0:80ee8f3b695e 57
EricLew 0:80ee8f3b695e 58 /* Exported types ------------------------------------------------------------*/
EricLew 0:80ee8f3b695e 59
EricLew 0:80ee8f3b695e 60 /** @defgroup PWREx_Exported_Types PWR Extended Exported Types
EricLew 0:80ee8f3b695e 61 * @{
EricLew 0:80ee8f3b695e 62 */
EricLew 0:80ee8f3b695e 63
EricLew 0:80ee8f3b695e 64
EricLew 0:80ee8f3b695e 65 /**
EricLew 0:80ee8f3b695e 66 * @brief PWR PVM configuration structure definition
EricLew 0:80ee8f3b695e 67 */
EricLew 0:80ee8f3b695e 68 typedef struct
EricLew 0:80ee8f3b695e 69 {
EricLew 0:80ee8f3b695e 70 uint32_t PVMType; /*!< PVMType: Specifies which voltage is monitored and against which threshold.
EricLew 0:80ee8f3b695e 71 This parameter can be a value of @ref PWREx_PVM_Type.
EricLew 0:80ee8f3b695e 72 @arg PWR_PVM_1: Peripheral Voltage Monitoring 1 enable: VDDUSB versus 1.2 V (applicable when USB feature is supported).
EricLew 0:80ee8f3b695e 73 @arg PWR_PVM_2: Peripheral Voltage Monitoring 2 enable: VDDIO2 versus 0.9 V (applicable when VDDIO2 is present on device).
EricLew 0:80ee8f3b695e 74 @arg PWR_PVM_3: Peripheral Voltage Monitoring 3 enable: VDDA versus 1.62 V.
EricLew 0:80ee8f3b695e 75 @arg PWR_PVM_4: Peripheral Voltage Monitoring 4 enable: VDDA versus 2.2 V. */
EricLew 0:80ee8f3b695e 76
EricLew 0:80ee8f3b695e 77 uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
EricLew 0:80ee8f3b695e 78 This parameter can be a value of @ref PWREx_PVM_Mode. */
EricLew 0:80ee8f3b695e 79 }PWR_PVMTypeDef;
EricLew 0:80ee8f3b695e 80
EricLew 0:80ee8f3b695e 81 /**
EricLew 0:80ee8f3b695e 82 * @}
EricLew 0:80ee8f3b695e 83 */
EricLew 0:80ee8f3b695e 84
EricLew 0:80ee8f3b695e 85 /* Exported constants --------------------------------------------------------*/
EricLew 0:80ee8f3b695e 86
EricLew 0:80ee8f3b695e 87 /** @defgroup PWREx_Exported_Constants PWR Extended Exported Constants
EricLew 0:80ee8f3b695e 88 * @{
EricLew 0:80ee8f3b695e 89 */
EricLew 0:80ee8f3b695e 90
EricLew 0:80ee8f3b695e 91 /** @defgroup PWREx_WUP_Polarity Shift to apply to retrieve polarity information from PWR_WAKEUP_PINy_xxx constants
EricLew 0:80ee8f3b695e 92 * @{
EricLew 0:80ee8f3b695e 93 */
EricLew 0:80ee8f3b695e 94 #define PWR_WUP_POLARITY_SHIFT 0x05 /*!< Internal constant used to retrieve wakeup pin polariry */
EricLew 0:80ee8f3b695e 95 /**
EricLew 0:80ee8f3b695e 96 * @}
EricLew 0:80ee8f3b695e 97 */
EricLew 0:80ee8f3b695e 98
EricLew 0:80ee8f3b695e 99
EricLew 0:80ee8f3b695e 100 /** @defgroup PWREx_WakeUp_Pins PWR wake-up pins
EricLew 0:80ee8f3b695e 101 * @{
EricLew 0:80ee8f3b695e 102 */
EricLew 0:80ee8f3b695e 103 #define PWR_WAKEUP_PIN1 PWR_CR3_EWUP1 /*!< Wakeup pin 1 (with high level polarity) */
EricLew 0:80ee8f3b695e 104 #define PWR_WAKEUP_PIN2 PWR_CR3_EWUP2 /*!< Wakeup pin 2 (with high level polarity) */
EricLew 0:80ee8f3b695e 105 #define PWR_WAKEUP_PIN3 PWR_CR3_EWUP3 /*!< Wakeup pin 3 (with high level polarity) */
EricLew 0:80ee8f3b695e 106 #define PWR_WAKEUP_PIN4 PWR_CR3_EWUP4 /*!< Wakeup pin 4 (with high level polarity) */
EricLew 0:80ee8f3b695e 107 #define PWR_WAKEUP_PIN5 PWR_CR3_EWUP5 /*!< Wakeup pin 5 (with high level polarity) */
EricLew 0:80ee8f3b695e 108 #define PWR_WAKEUP_PIN1_HIGH PWR_CR3_EWUP1 /*!< Wakeup pin 1 (with high level polarity) */
EricLew 0:80ee8f3b695e 109 #define PWR_WAKEUP_PIN2_HIGH PWR_CR3_EWUP2 /*!< Wakeup pin 2 (with high level polarity) */
EricLew 0:80ee8f3b695e 110 #define PWR_WAKEUP_PIN3_HIGH PWR_CR3_EWUP3 /*!< Wakeup pin 3 (with high level polarity) */
EricLew 0:80ee8f3b695e 111 #define PWR_WAKEUP_PIN4_HIGH PWR_CR3_EWUP4 /*!< Wakeup pin 4 (with high level polarity) */
EricLew 0:80ee8f3b695e 112 #define PWR_WAKEUP_PIN5_HIGH PWR_CR3_EWUP5 /*!< Wakeup pin 5 (with high level polarity) */
EricLew 0:80ee8f3b695e 113 #define PWR_WAKEUP_PIN1_LOW (uint32_t)((PWR_CR4_WP1<<PWR_WUP_POLARITY_SHIFT) | PWR_CR3_EWUP1) /*!< Wakeup pin 1 (with low level polarity) */
EricLew 0:80ee8f3b695e 114 #define PWR_WAKEUP_PIN2_LOW (uint32_t)((PWR_CR4_WP2<<PWR_WUP_POLARITY_SHIFT) | PWR_CR3_EWUP2) /*!< Wakeup pin 2 (with low level polarity) */
EricLew 0:80ee8f3b695e 115 #define PWR_WAKEUP_PIN3_LOW (uint32_t)((PWR_CR4_WP3<<PWR_WUP_POLARITY_SHIFT) | PWR_CR3_EWUP3) /*!< Wakeup pin 3 (with low level polarity) */
EricLew 0:80ee8f3b695e 116 #define PWR_WAKEUP_PIN4_LOW (uint32_t)((PWR_CR4_WP4<<PWR_WUP_POLARITY_SHIFT) | PWR_CR3_EWUP4) /*!< Wakeup pin 4 (with low level polarity) */
EricLew 0:80ee8f3b695e 117 #define PWR_WAKEUP_PIN5_LOW (uint32_t)((PWR_CR4_WP5<<PWR_WUP_POLARITY_SHIFT) | PWR_CR3_EWUP5) /*!< Wakeup pin 5 (with low level polarity) */
EricLew 0:80ee8f3b695e 118 /**
EricLew 0:80ee8f3b695e 119 * @}
EricLew 0:80ee8f3b695e 120 */
EricLew 0:80ee8f3b695e 121
EricLew 0:80ee8f3b695e 122 /** @defgroup PWREx_PVM_Type Peripheral Voltage Monitoring type
EricLew 0:80ee8f3b695e 123 * @{
EricLew 0:80ee8f3b695e 124 */
EricLew 0:80ee8f3b695e 125 #if defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
EricLew 0:80ee8f3b695e 126 #define PWR_PVM_1 PWR_CR2_PVME1 /*!< Peripheral Voltage Monitoring 1 enable: VDDUSB versus 1.2 V (applicable when USB feature is supported) */
EricLew 0:80ee8f3b695e 127 #endif /* defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) */
EricLew 0:80ee8f3b695e 128 #define PWR_PVM_2 PWR_CR2_PVME2 /*!< Peripheral Voltage Monitoring 2 enable: VDDIO2 versus 0.9 V (applicable when VDDIO2 is present on device) */
EricLew 0:80ee8f3b695e 129 #define PWR_PVM_3 PWR_CR2_PVME3 /*!< Peripheral Voltage Monitoring 3 enable: VDDA versus 1.62 V */
EricLew 0:80ee8f3b695e 130 #define PWR_PVM_4 PWR_CR2_PVME4 /*!< Peripheral Voltage Monitoring 4 enable: VDDA versus 2.2 V */
EricLew 0:80ee8f3b695e 131 /**
EricLew 0:80ee8f3b695e 132 * @}
EricLew 0:80ee8f3b695e 133 */
EricLew 0:80ee8f3b695e 134
EricLew 0:80ee8f3b695e 135 /** @defgroup PWREx_PVM_Mode PWR PVM interrupt and event mode
EricLew 0:80ee8f3b695e 136 * @{
EricLew 0:80ee8f3b695e 137 */
EricLew 0:80ee8f3b695e 138 #define PWR_PVM_MODE_NORMAL ((uint32_t)0x00000000) /*!< basic mode is used */
EricLew 0:80ee8f3b695e 139 #define PWR_PVM_MODE_IT_RISING ((uint32_t)0x00010001) /*!< External Interrupt Mode with Rising edge trigger detection */
EricLew 0:80ee8f3b695e 140 #define PWR_PVM_MODE_IT_FALLING ((uint32_t)0x00010002) /*!< External Interrupt Mode with Falling edge trigger detection */
EricLew 0:80ee8f3b695e 141 #define PWR_PVM_MODE_IT_RISING_FALLING ((uint32_t)0x00010003) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
EricLew 0:80ee8f3b695e 142 #define PWR_PVM_MODE_EVENT_RISING ((uint32_t)0x00020001) /*!< Event Mode with Rising edge trigger detection */
EricLew 0:80ee8f3b695e 143 #define PWR_PVM_MODE_EVENT_FALLING ((uint32_t)0x00020002) /*!< Event Mode with Falling edge trigger detection */
EricLew 0:80ee8f3b695e 144 #define PWR_PVM_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003) /*!< Event Mode with Rising/Falling edge trigger detection */
EricLew 0:80ee8f3b695e 145 /**
EricLew 0:80ee8f3b695e 146 * @}
EricLew 0:80ee8f3b695e 147 */
EricLew 0:80ee8f3b695e 148
EricLew 0:80ee8f3b695e 149
EricLew 0:80ee8f3b695e 150
EricLew 0:80ee8f3b695e 151 /** @defgroup PWREx_Regulator_Voltage_Scale PWR Regulator voltage scale
EricLew 0:80ee8f3b695e 152 * @{
EricLew 0:80ee8f3b695e 153 */
EricLew 0:80ee8f3b695e 154 #define PWR_REGULATOR_VOLTAGE_SCALE1 PWR_CR1_VOS_0 /*!< Voltage scaling range 1 */
EricLew 0:80ee8f3b695e 155 #define PWR_REGULATOR_VOLTAGE_SCALE2 PWR_CR1_VOS_1 /*!< Voltage scaling range 2 */
EricLew 0:80ee8f3b695e 156 /**
EricLew 0:80ee8f3b695e 157 * @}
EricLew 0:80ee8f3b695e 158 */
EricLew 0:80ee8f3b695e 159
EricLew 0:80ee8f3b695e 160
EricLew 0:80ee8f3b695e 161 /** @defgroup PWREx_VBAT_Battery_Charging_Selection PWR battery charging resistor selection
EricLew 0:80ee8f3b695e 162 * @{
EricLew 0:80ee8f3b695e 163 */
EricLew 0:80ee8f3b695e 164 #define PWR_BATTERY_CHARGING_RESISTOR_5 ((uint32_t)0x00000000) /*!< VBAT charging through a 5 kOhms resistor */
EricLew 0:80ee8f3b695e 165 #define PWR_BATTERY_CHARGING_RESISTOR_1_5 PWR_CR4_VBRS /*!< VBAT charging through a 1.5 kOhms resistor */
EricLew 0:80ee8f3b695e 166 /**
EricLew 0:80ee8f3b695e 167 * @}
EricLew 0:80ee8f3b695e 168 */
EricLew 0:80ee8f3b695e 169
EricLew 0:80ee8f3b695e 170 /** @defgroup PWREx_VBAT_Battery_Charging PWR battery charging
EricLew 0:80ee8f3b695e 171 * @{
EricLew 0:80ee8f3b695e 172 */
EricLew 0:80ee8f3b695e 173 #define PWR_BATTERY_CHARGING_DISABLE ((uint32_t)0x00000000)
EricLew 0:80ee8f3b695e 174 #define PWR_BATTERY_CHARGING_ENABLE PWR_CR4_VBE
EricLew 0:80ee8f3b695e 175 /**
EricLew 0:80ee8f3b695e 176 * @}
EricLew 0:80ee8f3b695e 177 */
EricLew 0:80ee8f3b695e 178
EricLew 0:80ee8f3b695e 179 /** @defgroup PWREx_GPIO_Bit_Number GPIO bit number for I/O setting in standby/shutdown mode
EricLew 0:80ee8f3b695e 180 * @{
EricLew 0:80ee8f3b695e 181 */
EricLew 0:80ee8f3b695e 182 #define PWR_GPIO_BIT_0 PWR_PUCRB_PB0 /*!< GPIO port I/O pin 0 */
EricLew 0:80ee8f3b695e 183 #define PWR_GPIO_BIT_1 PWR_PUCRB_PB1 /*!< GPIO port I/O pin 1 */
EricLew 0:80ee8f3b695e 184 #define PWR_GPIO_BIT_2 PWR_PUCRB_PB2 /*!< GPIO port I/O pin 2 */
EricLew 0:80ee8f3b695e 185 #define PWR_GPIO_BIT_3 PWR_PUCRB_PB3 /*!< GPIO port I/O pin 3 */
EricLew 0:80ee8f3b695e 186 #define PWR_GPIO_BIT_4 PWR_PUCRB_PB4 /*!< GPIO port I/O pin 4 */
EricLew 0:80ee8f3b695e 187 #define PWR_GPIO_BIT_5 PWR_PUCRB_PB5 /*!< GPIO port I/O pin 5 */
EricLew 0:80ee8f3b695e 188 #define PWR_GPIO_BIT_6 PWR_PUCRB_PB6 /*!< GPIO port I/O pin 6 */
EricLew 0:80ee8f3b695e 189 #define PWR_GPIO_BIT_7 PWR_PUCRB_PB7 /*!< GPIO port I/O pin 7 */
EricLew 0:80ee8f3b695e 190 #define PWR_GPIO_BIT_8 PWR_PUCRB_PB8 /*!< GPIO port I/O pin 8 */
EricLew 0:80ee8f3b695e 191 #define PWR_GPIO_BIT_9 PWR_PUCRB_PB9 /*!< GPIO port I/O pin 9 */
EricLew 0:80ee8f3b695e 192 #define PWR_GPIO_BIT_10 PWR_PUCRB_PB10 /*!< GPIO port I/O pin 10 */
EricLew 0:80ee8f3b695e 193 #define PWR_GPIO_BIT_11 PWR_PUCRB_PB11 /*!< GPIO port I/O pin 11 */
EricLew 0:80ee8f3b695e 194 #define PWR_GPIO_BIT_12 PWR_PUCRB_PB12 /*!< GPIO port I/O pin 12 */
EricLew 0:80ee8f3b695e 195 #define PWR_GPIO_BIT_13 PWR_PUCRB_PB13 /*!< GPIO port I/O pin 13 */
EricLew 0:80ee8f3b695e 196 #define PWR_GPIO_BIT_14 PWR_PUCRB_PB14 /*!< GPIO port I/O pin 14 */
EricLew 0:80ee8f3b695e 197 #define PWR_GPIO_BIT_15 PWR_PUCRB_PB15 /*!< GPIO port I/O pin15 */
EricLew 0:80ee8f3b695e 198 /**
EricLew 0:80ee8f3b695e 199 * @}
EricLew 0:80ee8f3b695e 200 */
EricLew 0:80ee8f3b695e 201
EricLew 0:80ee8f3b695e 202 /** @defgroup PWREx_GPIO GPIO port
EricLew 0:80ee8f3b695e 203 * @{
EricLew 0:80ee8f3b695e 204 */
EricLew 0:80ee8f3b695e 205 #define PWR_GPIO_A 0x00000000 /*!< GPIO port A */
EricLew 0:80ee8f3b695e 206 #define PWR_GPIO_B 0x00000001 /*!< GPIO port B */
EricLew 0:80ee8f3b695e 207 #define PWR_GPIO_C 0x00000002 /*!< GPIO port C */
EricLew 0:80ee8f3b695e 208 #define PWR_GPIO_D 0x00000003 /*!< GPIO port D */
EricLew 0:80ee8f3b695e 209 #define PWR_GPIO_E 0x00000004 /*!< GPIO port E */
EricLew 0:80ee8f3b695e 210 #define PWR_GPIO_F 0x00000005 /*!< GPIO port F */
EricLew 0:80ee8f3b695e 211 #define PWR_GPIO_G 0x00000006 /*!< GPIO port G */
EricLew 0:80ee8f3b695e 212 #define PWR_GPIO_H 0x00000007 /*!< GPIO port H */
EricLew 0:80ee8f3b695e 213 /**
EricLew 0:80ee8f3b695e 214 * @}
EricLew 0:80ee8f3b695e 215 */
EricLew 0:80ee8f3b695e 216
EricLew 0:80ee8f3b695e 217 /** @defgroup PWREx_PVM_EXTI_LINE PWR PVM external interrupts lines
EricLew 0:80ee8f3b695e 218 * @{
EricLew 0:80ee8f3b695e 219 */
EricLew 0:80ee8f3b695e 220 #if defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
EricLew 0:80ee8f3b695e 221 #define PWR_EXTI_LINE_PVM1 ((uint32_t)0x00000008) /*!< External interrupt line 35 Connected to the PVM1 EXTI Line */
EricLew 0:80ee8f3b695e 222 #endif /* defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) */
EricLew 0:80ee8f3b695e 223
EricLew 0:80ee8f3b695e 224 #define PWR_EXTI_LINE_PVM2 ((uint32_t)0x00000010) /*!< External interrupt line 36 Connected to the PVM2 EXTI Line */
EricLew 0:80ee8f3b695e 225 #define PWR_EXTI_LINE_PVM3 ((uint32_t)0x00000020) /*!< External interrupt line 37 Connected to the PVM3 EXTI Line */
EricLew 0:80ee8f3b695e 226 #define PWR_EXTI_LINE_PVM4 ((uint32_t)0x00000040) /*!< External interrupt line 38 Connected to the PVM4 EXTI Line */
EricLew 0:80ee8f3b695e 227 /**
EricLew 0:80ee8f3b695e 228 * @}
EricLew 0:80ee8f3b695e 229 */
EricLew 0:80ee8f3b695e 230
EricLew 0:80ee8f3b695e 231 /** @defgroup PWREx_PVM_EVENT_LINE PWR PVM event lines
EricLew 0:80ee8f3b695e 232 * @{
EricLew 0:80ee8f3b695e 233 */
EricLew 0:80ee8f3b695e 234 #if defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
EricLew 0:80ee8f3b695e 235 #define PWR_EVENT_LINE_PVM1 ((uint32_t)0x00000008) /*!< Event line 35 Connected to the PVM1 EXTI Line */
EricLew 0:80ee8f3b695e 236 #endif /* defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) */
EricLew 0:80ee8f3b695e 237 #define PWR_EVENT_LINE_PVM2 ((uint32_t)0x00000010) /*!< Event line 36 Connected to the PVM2 EXTI Line */
EricLew 0:80ee8f3b695e 238 #define PWR_EVENT_LINE_PVM3 ((uint32_t)0x00000020) /*!< Event line 37 Connected to the PVM3 EXTI Line */
EricLew 0:80ee8f3b695e 239 #define PWR_EVENT_LINE_PVM4 ((uint32_t)0x00000040) /*!< Event line 38 Connected to the PVM4 EXTI Line */
EricLew 0:80ee8f3b695e 240 /**
EricLew 0:80ee8f3b695e 241 * @}
EricLew 0:80ee8f3b695e 242 */
EricLew 0:80ee8f3b695e 243
EricLew 0:80ee8f3b695e 244 /** @defgroup PWREx_Flag PWR Status Flags
EricLew 0:80ee8f3b695e 245 * Elements values convention: 0000 0000 0XXY YYYYb
EricLew 0:80ee8f3b695e 246 * - Y YYYY : Flag position in the XX register (5 bits)
EricLew 0:80ee8f3b695e 247 * - XX : Status register (2 bits)
EricLew 0:80ee8f3b695e 248 * - 01: SR1 register
EricLew 0:80ee8f3b695e 249 * - 10: SR2 register
EricLew 0:80ee8f3b695e 250 * The only exception is PWR_FLAG_WU, encompassing all
EricLew 0:80ee8f3b695e 251 * wake-up flags and set to PWR_SR1_WUF.
EricLew 0:80ee8f3b695e 252 * @{
EricLew 0:80ee8f3b695e 253 */
EricLew 0:80ee8f3b695e 254 #define PWR_FLAG_WUF1 ((uint32_t)0x0020) /*!< Wakeup event on wakeup pin 1 */
EricLew 0:80ee8f3b695e 255 #define PWR_FLAG_WUF2 ((uint32_t)0x0021) /*!< Wakeup event on wakeup pin 2 */
EricLew 0:80ee8f3b695e 256 #define PWR_FLAG_WUF3 ((uint32_t)0x0022) /*!< Wakeup event on wakeup pin 3 */
EricLew 0:80ee8f3b695e 257 #define PWR_FLAG_WUF4 ((uint32_t)0x0023) /*!< Wakeup event on wakeup pin 4 */
EricLew 0:80ee8f3b695e 258 #define PWR_FLAG_WUF5 ((uint32_t)0x0024) /*!< Wakeup event on wakeup pin 5 */
EricLew 0:80ee8f3b695e 259 #define PWR_FLAG_WU PWR_SR1_WUF /*!< Encompass wakeup event on all wakeup pins */
EricLew 0:80ee8f3b695e 260 #define PWR_FLAG_SB ((uint32_t)0x0028) /*!< Standby flag */
EricLew 0:80ee8f3b695e 261 #define PWR_FLAG_WUFI ((uint32_t)0x002F) /*!< Wakeup on internal wakeup line */
EricLew 0:80ee8f3b695e 262
EricLew 0:80ee8f3b695e 263 #define PWR_FLAG_REGLPS ((uint32_t)0x0048) /*!< Low-power regulator start flag */
EricLew 0:80ee8f3b695e 264 #define PWR_FLAG_REGLPF ((uint32_t)0x0049) /*!< Low-power regulator flag */
EricLew 0:80ee8f3b695e 265 #define PWR_FLAG_VOSF ((uint32_t)0x004A) /*!< Voltage scaling flag */
EricLew 0:80ee8f3b695e 266 #define PWR_FLAG_PVDO ((uint32_t)0x004B) /*!< Power Voltage Detector output flag */
EricLew 0:80ee8f3b695e 267 #if defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
EricLew 0:80ee8f3b695e 268 #define PWR_FLAG_PVMO1 ((uint32_t)0x004C) /*!< Power Voltage Monitoring 1 output flag */
EricLew 0:80ee8f3b695e 269 #endif /* defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) */
EricLew 0:80ee8f3b695e 270 #define PWR_FLAG_PVMO2 ((uint32_t)0x004D) /*!< Power Voltage Monitoring 2 output flag */
EricLew 0:80ee8f3b695e 271 #define PWR_FLAG_PVMO3 ((uint32_t)0x004E) /*!< Power Voltage Monitoring 3 output flag */
EricLew 0:80ee8f3b695e 272 #define PWR_FLAG_PVMO4 ((uint32_t)0x004F) /*!< Power Voltage Monitoring 4 output flag */
EricLew 0:80ee8f3b695e 273 /**
EricLew 0:80ee8f3b695e 274 * @}
EricLew 0:80ee8f3b695e 275 */
EricLew 0:80ee8f3b695e 276
EricLew 0:80ee8f3b695e 277 /**
EricLew 0:80ee8f3b695e 278 * @}
EricLew 0:80ee8f3b695e 279 */
EricLew 0:80ee8f3b695e 280
EricLew 0:80ee8f3b695e 281 /* Exported macros -----------------------------------------------------------*/
EricLew 0:80ee8f3b695e 282 /** @defgroup PWREx_Exported_Macros PWR Extended Exported Macros
EricLew 0:80ee8f3b695e 283 * @{
EricLew 0:80ee8f3b695e 284 */
EricLew 0:80ee8f3b695e 285
EricLew 0:80ee8f3b695e 286 #if defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
EricLew 0:80ee8f3b695e 287 /**
EricLew 0:80ee8f3b695e 288 * @brief Enable the PVM1 Extended Interrupt Line.
EricLew 0:80ee8f3b695e 289 * @retval None
EricLew 0:80ee8f3b695e 290 */
EricLew 0:80ee8f3b695e 291 #define __HAL_PWR_PVM1_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM1)
EricLew 0:80ee8f3b695e 292
EricLew 0:80ee8f3b695e 293 /**
EricLew 0:80ee8f3b695e 294 * @brief Disable the PVM1 Extended Interrupt Line.
EricLew 0:80ee8f3b695e 295 * @retval None
EricLew 0:80ee8f3b695e 296 */
EricLew 0:80ee8f3b695e 297 #define __HAL_PWR_PVM1_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM1)
EricLew 0:80ee8f3b695e 298
EricLew 0:80ee8f3b695e 299 /**
EricLew 0:80ee8f3b695e 300 * @brief Enable the PVM1 Event Line.
EricLew 0:80ee8f3b695e 301 * @retval None
EricLew 0:80ee8f3b695e 302 */
EricLew 0:80ee8f3b695e 303 #define __HAL_PWR_PVM1_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM1)
EricLew 0:80ee8f3b695e 304
EricLew 0:80ee8f3b695e 305 /**
EricLew 0:80ee8f3b695e 306 * @brief Disable the PVM1 Event Line.
EricLew 0:80ee8f3b695e 307 * @retval None
EricLew 0:80ee8f3b695e 308 */
EricLew 0:80ee8f3b695e 309 #define __HAL_PWR_PVM1_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM1)
EricLew 0:80ee8f3b695e 310
EricLew 0:80ee8f3b695e 311 /**
EricLew 0:80ee8f3b695e 312 * @brief Enable the PVM1 Extended Interrupt Rising Trigger.
EricLew 0:80ee8f3b695e 313 * @retval None
EricLew 0:80ee8f3b695e 314 */
EricLew 0:80ee8f3b695e 315 #define __HAL_PWR_PVM1_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM1)
EricLew 0:80ee8f3b695e 316
EricLew 0:80ee8f3b695e 317 /**
EricLew 0:80ee8f3b695e 318 * @brief Disable the PVM1 Extended Interrupt Rising Trigger.
EricLew 0:80ee8f3b695e 319 * @retval None
EricLew 0:80ee8f3b695e 320 */
EricLew 0:80ee8f3b695e 321 #define __HAL_PWR_PVM1_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM1)
EricLew 0:80ee8f3b695e 322
EricLew 0:80ee8f3b695e 323 /**
EricLew 0:80ee8f3b695e 324 * @brief Enable the PVM1 Extended Interrupt Falling Trigger.
EricLew 0:80ee8f3b695e 325 * @retval None
EricLew 0:80ee8f3b695e 326 */
EricLew 0:80ee8f3b695e 327 #define __HAL_PWR_PVM1_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM1)
EricLew 0:80ee8f3b695e 328
EricLew 0:80ee8f3b695e 329
EricLew 0:80ee8f3b695e 330 /**
EricLew 0:80ee8f3b695e 331 * @brief Disable the PVM1 Extended Interrupt Falling Trigger.
EricLew 0:80ee8f3b695e 332 * @retval None
EricLew 0:80ee8f3b695e 333 */
EricLew 0:80ee8f3b695e 334 #define __HAL_PWR_PVM1_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM1)
EricLew 0:80ee8f3b695e 335
EricLew 0:80ee8f3b695e 336
EricLew 0:80ee8f3b695e 337 /**
EricLew 0:80ee8f3b695e 338 * @brief PVM1 EXTI line configuration: set rising & falling edge trigger.
EricLew 0:80ee8f3b695e 339 * @retval None
EricLew 0:80ee8f3b695e 340 */
EricLew 0:80ee8f3b695e 341 #define __HAL_PWR_PVM1_EXTI_ENABLE_RISING_FALLING_EDGE() \
EricLew 0:80ee8f3b695e 342 do { \
EricLew 0:80ee8f3b695e 343 __HAL_PWR_PVM1_EXTI_ENABLE_RISING_EDGE(); \
EricLew 0:80ee8f3b695e 344 __HAL_PWR_PVM1_EXTI_ENABLE_FALLING_EDGE(); \
EricLew 0:80ee8f3b695e 345 } while(0)
EricLew 0:80ee8f3b695e 346
EricLew 0:80ee8f3b695e 347 /**
EricLew 0:80ee8f3b695e 348 * @brief Disable the PVM1 Extended Interrupt Rising & Falling Trigger.
EricLew 0:80ee8f3b695e 349 * @retval None
EricLew 0:80ee8f3b695e 350 */
EricLew 0:80ee8f3b695e 351 #define __HAL_PWR_PVM1_EXTI_DISABLE_RISING_FALLING_EDGE() \
EricLew 0:80ee8f3b695e 352 do { \
EricLew 0:80ee8f3b695e 353 __HAL_PWR_PVM1_EXTI_DISABLE_RISING_EDGE(); \
EricLew 0:80ee8f3b695e 354 __HAL_PWR_PVM1_EXTI_DISABLE_FALLING_EDGE(); \
EricLew 0:80ee8f3b695e 355 } while(0)
EricLew 0:80ee8f3b695e 356
EricLew 0:80ee8f3b695e 357 /**
EricLew 0:80ee8f3b695e 358 * @brief Generate a Software interrupt on selected EXTI line.
EricLew 0:80ee8f3b695e 359 * @retval None
EricLew 0:80ee8f3b695e 360 */
EricLew 0:80ee8f3b695e 361 #define __HAL_PWR_PVM1_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER2, PWR_EXTI_LINE_PVM1)
EricLew 0:80ee8f3b695e 362
EricLew 0:80ee8f3b695e 363 /**
EricLew 0:80ee8f3b695e 364 * @brief Check whether the specified PVM1 EXTI interrupt flag is set or not.
EricLew 0:80ee8f3b695e 365 * @retval EXTI PVM1 Line Status.
EricLew 0:80ee8f3b695e 366 */
EricLew 0:80ee8f3b695e 367 #define __HAL_PWR_PVM1_EXTI_GET_FLAG() (EXTI->PR2 & PWR_EXTI_LINE_PVM1)
EricLew 0:80ee8f3b695e 368
EricLew 0:80ee8f3b695e 369 /**
EricLew 0:80ee8f3b695e 370 * @brief Clear the PVM1 EXTI flag.
EricLew 0:80ee8f3b695e 371 * @retval None
EricLew 0:80ee8f3b695e 372 */
EricLew 0:80ee8f3b695e 373 #define __HAL_PWR_PVM1_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR2, PWR_EXTI_LINE_PVM1)
EricLew 0:80ee8f3b695e 374
EricLew 0:80ee8f3b695e 375 #endif /* defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) */
EricLew 0:80ee8f3b695e 376
EricLew 0:80ee8f3b695e 377
EricLew 0:80ee8f3b695e 378 /**
EricLew 0:80ee8f3b695e 379 * @brief Enable the PVM2 Extended Interrupt Line.
EricLew 0:80ee8f3b695e 380 * @retval None
EricLew 0:80ee8f3b695e 381 */
EricLew 0:80ee8f3b695e 382 #define __HAL_PWR_PVM2_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM2)
EricLew 0:80ee8f3b695e 383
EricLew 0:80ee8f3b695e 384 /**
EricLew 0:80ee8f3b695e 385 * @brief Disable the PVM2 Extended Interrupt Line.
EricLew 0:80ee8f3b695e 386 * @retval None
EricLew 0:80ee8f3b695e 387 */
EricLew 0:80ee8f3b695e 388 #define __HAL_PWR_PVM2_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM2)
EricLew 0:80ee8f3b695e 389
EricLew 0:80ee8f3b695e 390 /**
EricLew 0:80ee8f3b695e 391 * @brief Enable the PVM2 Event Line.
EricLew 0:80ee8f3b695e 392 * @retval None
EricLew 0:80ee8f3b695e 393 */
EricLew 0:80ee8f3b695e 394 #define __HAL_PWR_PVM2_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM2)
EricLew 0:80ee8f3b695e 395
EricLew 0:80ee8f3b695e 396 /**
EricLew 0:80ee8f3b695e 397 * @brief Disable the PVM2 Event Line.
EricLew 0:80ee8f3b695e 398 * @retval None
EricLew 0:80ee8f3b695e 399 */
EricLew 0:80ee8f3b695e 400 #define __HAL_PWR_PVM2_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM2)
EricLew 0:80ee8f3b695e 401
EricLew 0:80ee8f3b695e 402 /**
EricLew 0:80ee8f3b695e 403 * @brief Enable the PVM2 Extended Interrupt Rising Trigger.
EricLew 0:80ee8f3b695e 404 * @retval None
EricLew 0:80ee8f3b695e 405 */
EricLew 0:80ee8f3b695e 406 #define __HAL_PWR_PVM2_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM2)
EricLew 0:80ee8f3b695e 407
EricLew 0:80ee8f3b695e 408 /**
EricLew 0:80ee8f3b695e 409 * @brief Disable the PVM2 Extended Interrupt Rising Trigger.
EricLew 0:80ee8f3b695e 410 * @retval None
EricLew 0:80ee8f3b695e 411 */
EricLew 0:80ee8f3b695e 412 #define __HAL_PWR_PVM2_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM2)
EricLew 0:80ee8f3b695e 413
EricLew 0:80ee8f3b695e 414 /**
EricLew 0:80ee8f3b695e 415 * @brief Enable the PVM2 Extended Interrupt Falling Trigger.
EricLew 0:80ee8f3b695e 416 * @retval None
EricLew 0:80ee8f3b695e 417 */
EricLew 0:80ee8f3b695e 418 #define __HAL_PWR_PVM2_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM2)
EricLew 0:80ee8f3b695e 419
EricLew 0:80ee8f3b695e 420
EricLew 0:80ee8f3b695e 421 /**
EricLew 0:80ee8f3b695e 422 * @brief Disable the PVM2 Extended Interrupt Falling Trigger.
EricLew 0:80ee8f3b695e 423 * @retval None
EricLew 0:80ee8f3b695e 424 */
EricLew 0:80ee8f3b695e 425 #define __HAL_PWR_PVM2_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM2)
EricLew 0:80ee8f3b695e 426
EricLew 0:80ee8f3b695e 427
EricLew 0:80ee8f3b695e 428 /**
EricLew 0:80ee8f3b695e 429 * @brief PVM2 EXTI line configuration: set rising & falling edge trigger.
EricLew 0:80ee8f3b695e 430 * @retval None
EricLew 0:80ee8f3b695e 431 */
EricLew 0:80ee8f3b695e 432 #define __HAL_PWR_PVM2_EXTI_ENABLE_RISING_FALLING_EDGE() \
EricLew 0:80ee8f3b695e 433 do { \
EricLew 0:80ee8f3b695e 434 __HAL_PWR_PVM2_EXTI_ENABLE_RISING_EDGE(); \
EricLew 0:80ee8f3b695e 435 __HAL_PWR_PVM2_EXTI_ENABLE_FALLING_EDGE(); \
EricLew 0:80ee8f3b695e 436 } while(0)
EricLew 0:80ee8f3b695e 437
EricLew 0:80ee8f3b695e 438 /**
EricLew 0:80ee8f3b695e 439 * @brief Disable the PVM2 Extended Interrupt Rising & Falling Trigger.
EricLew 0:80ee8f3b695e 440 * @retval None
EricLew 0:80ee8f3b695e 441 */
EricLew 0:80ee8f3b695e 442 #define __HAL_PWR_PVM2_EXTI_DISABLE_RISING_FALLING_EDGE() \
EricLew 0:80ee8f3b695e 443 do { \
EricLew 0:80ee8f3b695e 444 __HAL_PWR_PVM2_EXTI_DISABLE_RISING_EDGE(); \
EricLew 0:80ee8f3b695e 445 __HAL_PWR_PVM2_EXTI_DISABLE_FALLING_EDGE(); \
EricLew 0:80ee8f3b695e 446 } while(0)
EricLew 0:80ee8f3b695e 447
EricLew 0:80ee8f3b695e 448 /**
EricLew 0:80ee8f3b695e 449 * @brief Generate a Software interrupt on selected EXTI line.
EricLew 0:80ee8f3b695e 450 * @retval None
EricLew 0:80ee8f3b695e 451 */
EricLew 0:80ee8f3b695e 452 #define __HAL_PWR_PVM2_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER2, PWR_EXTI_LINE_PVM2)
EricLew 0:80ee8f3b695e 453
EricLew 0:80ee8f3b695e 454 /**
EricLew 0:80ee8f3b695e 455 * @brief Check whether the specified PVM2 EXTI interrupt flag is set or not.
EricLew 0:80ee8f3b695e 456 * @retval EXTI PVM2 Line Status.
EricLew 0:80ee8f3b695e 457 */
EricLew 0:80ee8f3b695e 458 #define __HAL_PWR_PVM2_EXTI_GET_FLAG() (EXTI->PR2 & PWR_EXTI_LINE_PVM2)
EricLew 0:80ee8f3b695e 459
EricLew 0:80ee8f3b695e 460 /**
EricLew 0:80ee8f3b695e 461 * @brief Clear the PVM2 EXTI flag.
EricLew 0:80ee8f3b695e 462 * @retval None
EricLew 0:80ee8f3b695e 463 */
EricLew 0:80ee8f3b695e 464 #define __HAL_PWR_PVM2_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR2, PWR_EXTI_LINE_PVM2)
EricLew 0:80ee8f3b695e 465
EricLew 0:80ee8f3b695e 466 /**
EricLew 0:80ee8f3b695e 467 * @brief Enable the PVM3 Extended Interrupt Line.
EricLew 0:80ee8f3b695e 468 * @retval None
EricLew 0:80ee8f3b695e 469 */
EricLew 0:80ee8f3b695e 470 #define __HAL_PWR_PVM3_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM3)
EricLew 0:80ee8f3b695e 471
EricLew 0:80ee8f3b695e 472 /**
EricLew 0:80ee8f3b695e 473 * @brief Disable the PVM3 Extended Interrupt Line.
EricLew 0:80ee8f3b695e 474 * @retval None
EricLew 0:80ee8f3b695e 475 */
EricLew 0:80ee8f3b695e 476 #define __HAL_PWR_PVM3_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM3)
EricLew 0:80ee8f3b695e 477
EricLew 0:80ee8f3b695e 478 /**
EricLew 0:80ee8f3b695e 479 * @brief Enable the PVM3 Event Line.
EricLew 0:80ee8f3b695e 480 * @retval None
EricLew 0:80ee8f3b695e 481 */
EricLew 0:80ee8f3b695e 482 #define __HAL_PWR_PVM3_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM3)
EricLew 0:80ee8f3b695e 483
EricLew 0:80ee8f3b695e 484 /**
EricLew 0:80ee8f3b695e 485 * @brief Disable the PVM3 Event Line.
EricLew 0:80ee8f3b695e 486 * @retval None
EricLew 0:80ee8f3b695e 487 */
EricLew 0:80ee8f3b695e 488 #define __HAL_PWR_PVM3_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM3)
EricLew 0:80ee8f3b695e 489
EricLew 0:80ee8f3b695e 490 /**
EricLew 0:80ee8f3b695e 491 * @brief Enable the PVM3 Extended Interrupt Rising Trigger.
EricLew 0:80ee8f3b695e 492 * @retval None
EricLew 0:80ee8f3b695e 493 */
EricLew 0:80ee8f3b695e 494 #define __HAL_PWR_PVM3_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM3)
EricLew 0:80ee8f3b695e 495
EricLew 0:80ee8f3b695e 496 /**
EricLew 0:80ee8f3b695e 497 * @brief Disable the PVM3 Extended Interrupt Rising Trigger.
EricLew 0:80ee8f3b695e 498 * @retval None
EricLew 0:80ee8f3b695e 499 */
EricLew 0:80ee8f3b695e 500 #define __HAL_PWR_PVM3_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM3)
EricLew 0:80ee8f3b695e 501
EricLew 0:80ee8f3b695e 502 /**
EricLew 0:80ee8f3b695e 503 * @brief Enable the PVM3 Extended Interrupt Falling Trigger.
EricLew 0:80ee8f3b695e 504 * @retval None
EricLew 0:80ee8f3b695e 505 */
EricLew 0:80ee8f3b695e 506 #define __HAL_PWR_PVM3_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM3)
EricLew 0:80ee8f3b695e 507
EricLew 0:80ee8f3b695e 508
EricLew 0:80ee8f3b695e 509 /**
EricLew 0:80ee8f3b695e 510 * @brief Disable the PVM3 Extended Interrupt Falling Trigger.
EricLew 0:80ee8f3b695e 511 * @retval None
EricLew 0:80ee8f3b695e 512 */
EricLew 0:80ee8f3b695e 513 #define __HAL_PWR_PVM3_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM3)
EricLew 0:80ee8f3b695e 514
EricLew 0:80ee8f3b695e 515
EricLew 0:80ee8f3b695e 516 /**
EricLew 0:80ee8f3b695e 517 * @brief PVM3 EXTI line configuration: set rising & falling edge trigger.
EricLew 0:80ee8f3b695e 518 * @retval None
EricLew 0:80ee8f3b695e 519 */
EricLew 0:80ee8f3b695e 520 #define __HAL_PWR_PVM3_EXTI_ENABLE_RISING_FALLING_EDGE() \
EricLew 0:80ee8f3b695e 521 do { \
EricLew 0:80ee8f3b695e 522 __HAL_PWR_PVM3_EXTI_ENABLE_RISING_EDGE(); \
EricLew 0:80ee8f3b695e 523 __HAL_PWR_PVM3_EXTI_ENABLE_FALLING_EDGE(); \
EricLew 0:80ee8f3b695e 524 } while(0)
EricLew 0:80ee8f3b695e 525
EricLew 0:80ee8f3b695e 526 /**
EricLew 0:80ee8f3b695e 527 * @brief Disable the PVM3 Extended Interrupt Rising & Falling Trigger.
EricLew 0:80ee8f3b695e 528 * @retval None
EricLew 0:80ee8f3b695e 529 */
EricLew 0:80ee8f3b695e 530 #define __HAL_PWR_PVM3_EXTI_DISABLE_RISING_FALLING_EDGE() \
EricLew 0:80ee8f3b695e 531 do { \
EricLew 0:80ee8f3b695e 532 __HAL_PWR_PVM3_EXTI_DISABLE_RISING_EDGE(); \
EricLew 0:80ee8f3b695e 533 __HAL_PWR_PVM3_EXTI_DISABLE_FALLING_EDGE(); \
EricLew 0:80ee8f3b695e 534 } while(0)
EricLew 0:80ee8f3b695e 535
EricLew 0:80ee8f3b695e 536 /**
EricLew 0:80ee8f3b695e 537 * @brief Generate a Software interrupt on selected EXTI line.
EricLew 0:80ee8f3b695e 538 * @retval None
EricLew 0:80ee8f3b695e 539 */
EricLew 0:80ee8f3b695e 540 #define __HAL_PWR_PVM3_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER2, PWR_EXTI_LINE_PVM3)
EricLew 0:80ee8f3b695e 541
EricLew 0:80ee8f3b695e 542 /**
EricLew 0:80ee8f3b695e 543 * @brief Check whether the specified PVM3 EXTI interrupt flag is set or not.
EricLew 0:80ee8f3b695e 544 * @retval EXTI PVM3 Line Status.
EricLew 0:80ee8f3b695e 545 */
EricLew 0:80ee8f3b695e 546 #define __HAL_PWR_PVM3_EXTI_GET_FLAG() (EXTI->PR2 & PWR_EXTI_LINE_PVM3)
EricLew 0:80ee8f3b695e 547
EricLew 0:80ee8f3b695e 548 /**
EricLew 0:80ee8f3b695e 549 * @brief Clear the PVM3 EXTI flag.
EricLew 0:80ee8f3b695e 550 * @retval None
EricLew 0:80ee8f3b695e 551 */
EricLew 0:80ee8f3b695e 552 #define __HAL_PWR_PVM3_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR2, PWR_EXTI_LINE_PVM3)
EricLew 0:80ee8f3b695e 553
EricLew 0:80ee8f3b695e 554
EricLew 0:80ee8f3b695e 555
EricLew 0:80ee8f3b695e 556
EricLew 0:80ee8f3b695e 557 /**
EricLew 0:80ee8f3b695e 558 * @brief Enable the PVM4 Extended Interrupt Line.
EricLew 0:80ee8f3b695e 559 * @retval None
EricLew 0:80ee8f3b695e 560 */
EricLew 0:80ee8f3b695e 561 #define __HAL_PWR_PVM4_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM4)
EricLew 0:80ee8f3b695e 562
EricLew 0:80ee8f3b695e 563 /**
EricLew 0:80ee8f3b695e 564 * @brief Disable the PVM4 Extended Interrupt Line.
EricLew 0:80ee8f3b695e 565 * @retval None
EricLew 0:80ee8f3b695e 566 */
EricLew 0:80ee8f3b695e 567 #define __HAL_PWR_PVM4_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR2, PWR_EXTI_LINE_PVM4)
EricLew 0:80ee8f3b695e 568
EricLew 0:80ee8f3b695e 569 /**
EricLew 0:80ee8f3b695e 570 * @brief Enable the PVM4 Event Line.
EricLew 0:80ee8f3b695e 571 * @retval None
EricLew 0:80ee8f3b695e 572 */
EricLew 0:80ee8f3b695e 573 #define __HAL_PWR_PVM4_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM4)
EricLew 0:80ee8f3b695e 574
EricLew 0:80ee8f3b695e 575 /**
EricLew 0:80ee8f3b695e 576 * @brief Disable the PVM4 Event Line.
EricLew 0:80ee8f3b695e 577 * @retval None
EricLew 0:80ee8f3b695e 578 */
EricLew 0:80ee8f3b695e 579 #define __HAL_PWR_PVM4_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR2, PWR_EVENT_LINE_PVM4)
EricLew 0:80ee8f3b695e 580
EricLew 0:80ee8f3b695e 581 /**
EricLew 0:80ee8f3b695e 582 * @brief Enable the PVM4 Extended Interrupt Rising Trigger.
EricLew 0:80ee8f3b695e 583 * @retval None
EricLew 0:80ee8f3b695e 584 */
EricLew 0:80ee8f3b695e 585 #define __HAL_PWR_PVM4_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM4)
EricLew 0:80ee8f3b695e 586
EricLew 0:80ee8f3b695e 587 /**
EricLew 0:80ee8f3b695e 588 * @brief Disable the PVM4 Extended Interrupt Rising Trigger.
EricLew 0:80ee8f3b695e 589 * @retval None
EricLew 0:80ee8f3b695e 590 */
EricLew 0:80ee8f3b695e 591 #define __HAL_PWR_PVM4_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR2, PWR_EXTI_LINE_PVM4)
EricLew 0:80ee8f3b695e 592
EricLew 0:80ee8f3b695e 593 /**
EricLew 0:80ee8f3b695e 594 * @brief Enable the PVM4 Extended Interrupt Falling Trigger.
EricLew 0:80ee8f3b695e 595 * @retval None
EricLew 0:80ee8f3b695e 596 */
EricLew 0:80ee8f3b695e 597 #define __HAL_PWR_PVM4_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM4)
EricLew 0:80ee8f3b695e 598
EricLew 0:80ee8f3b695e 599
EricLew 0:80ee8f3b695e 600 /**
EricLew 0:80ee8f3b695e 601 * @brief Disable the PVM4 Extended Interrupt Falling Trigger.
EricLew 0:80ee8f3b695e 602 * @retval None
EricLew 0:80ee8f3b695e 603 */
EricLew 0:80ee8f3b695e 604 #define __HAL_PWR_PVM4_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR2, PWR_EXTI_LINE_PVM4)
EricLew 0:80ee8f3b695e 605
EricLew 0:80ee8f3b695e 606
EricLew 0:80ee8f3b695e 607 /**
EricLew 0:80ee8f3b695e 608 * @brief PVM4 EXTI line configuration: set rising & falling edge trigger.
EricLew 0:80ee8f3b695e 609 * @retval None
EricLew 0:80ee8f3b695e 610 */
EricLew 0:80ee8f3b695e 611 #define __HAL_PWR_PVM4_EXTI_ENABLE_RISING_FALLING_EDGE() \
EricLew 0:80ee8f3b695e 612 do { \
EricLew 0:80ee8f3b695e 613 __HAL_PWR_PVM4_EXTI_ENABLE_RISING_EDGE(); \
EricLew 0:80ee8f3b695e 614 __HAL_PWR_PVM4_EXTI_ENABLE_FALLING_EDGE(); \
EricLew 0:80ee8f3b695e 615 } while(0)
EricLew 0:80ee8f3b695e 616
EricLew 0:80ee8f3b695e 617 /**
EricLew 0:80ee8f3b695e 618 * @brief Disable the PVM4 Extended Interrupt Rising & Falling Trigger.
EricLew 0:80ee8f3b695e 619 * @retval None
EricLew 0:80ee8f3b695e 620 */
EricLew 0:80ee8f3b695e 621 #define __HAL_PWR_PVM4_EXTI_DISABLE_RISING_FALLING_EDGE() \
EricLew 0:80ee8f3b695e 622 do { \
EricLew 0:80ee8f3b695e 623 __HAL_PWR_PVM4_EXTI_DISABLE_RISING_EDGE(); \
EricLew 0:80ee8f3b695e 624 __HAL_PWR_PVM4_EXTI_DISABLE_FALLING_EDGE(); \
EricLew 0:80ee8f3b695e 625 } while(0)
EricLew 0:80ee8f3b695e 626
EricLew 0:80ee8f3b695e 627 /**
EricLew 0:80ee8f3b695e 628 * @brief Generate a Software interrupt on selected EXTI line.
EricLew 0:80ee8f3b695e 629 * @retval None
EricLew 0:80ee8f3b695e 630 */
EricLew 0:80ee8f3b695e 631 #define __HAL_PWR_PVM4_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER2, PWR_EXTI_LINE_PVM4)
EricLew 0:80ee8f3b695e 632
EricLew 0:80ee8f3b695e 633 /**
EricLew 0:80ee8f3b695e 634 * @brief Check whether or not the specified PVM4 EXTI interrupt flag is set.
EricLew 0:80ee8f3b695e 635 * @retval EXTI PVM4 Line Status.
EricLew 0:80ee8f3b695e 636 */
EricLew 0:80ee8f3b695e 637 #define __HAL_PWR_PVM4_EXTI_GET_FLAG() (EXTI->PR2 & PWR_EXTI_LINE_PVM4)
EricLew 0:80ee8f3b695e 638
EricLew 0:80ee8f3b695e 639 /**
EricLew 0:80ee8f3b695e 640 * @brief Clear the PVM4 EXTI flag.
EricLew 0:80ee8f3b695e 641 * @retval None
EricLew 0:80ee8f3b695e 642 */
EricLew 0:80ee8f3b695e 643 #define __HAL_PWR_PVM4_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR2, PWR_EXTI_LINE_PVM4)
EricLew 0:80ee8f3b695e 644
EricLew 0:80ee8f3b695e 645
EricLew 0:80ee8f3b695e 646 /**
EricLew 0:80ee8f3b695e 647 * @brief Configure the main internal regulator output voltage.
EricLew 0:80ee8f3b695e 648 * @param __REGULATOR__: specifies the regulator output voltage to achieve
EricLew 0:80ee8f3b695e 649 * a tradeoff between performance and power consumption.
EricLew 0:80ee8f3b695e 650 * This parameter can be one of the following values:
EricLew 0:80ee8f3b695e 651 * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output range 1 mode,
EricLew 0:80ee8f3b695e 652 * typical output voltage at 1.2 V,
EricLew 0:80ee8f3b695e 653 * system frequency up to 80 MHz.
EricLew 0:80ee8f3b695e 654 * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output range 2 mode,
EricLew 0:80ee8f3b695e 655 * typical output voltage at 1.0 V,
EricLew 0:80ee8f3b695e 656 * system frequency up to 26 MHz.
EricLew 0:80ee8f3b695e 657 * @note This macro is similar to HAL_PWREx_ControlVoltageScaling() API but doesn't check
EricLew 0:80ee8f3b695e 658 * whether or not VOSF flag is cleared when moving from range 2 to range 1. User
EricLew 0:80ee8f3b695e 659 * may resort to __HAL_PWR_GET_FLAG() macro to check VOSF bit resetting.
EricLew 0:80ee8f3b695e 660 * @retval None
EricLew 0:80ee8f3b695e 661 */
EricLew 0:80ee8f3b695e 662 #define __HAL_PWR_VOLTAGESCALING_CONFIG(__REGULATOR__) do { \
EricLew 0:80ee8f3b695e 663 __IO uint32_t tmpreg; \
EricLew 0:80ee8f3b695e 664 MODIFY_REG(PWR->CR1, PWR_CR1_VOS, (__REGULATOR__)); \
EricLew 0:80ee8f3b695e 665 /* Delay after an RCC peripheral clock enabling */ \
EricLew 0:80ee8f3b695e 666 tmpreg = READ_BIT(PWR->CR1, PWR_CR1_VOS); \
EricLew 0:80ee8f3b695e 667 UNUSED(tmpreg); \
EricLew 0:80ee8f3b695e 668 } while(0)
EricLew 0:80ee8f3b695e 669
EricLew 0:80ee8f3b695e 670 /**
EricLew 0:80ee8f3b695e 671 * @}
EricLew 0:80ee8f3b695e 672 */
EricLew 0:80ee8f3b695e 673
EricLew 0:80ee8f3b695e 674 /* Private macros --------------------------------------------------------*/
EricLew 0:80ee8f3b695e 675 /** @addtogroup PWREx_Private_Macros PWR Extended Private Macros
EricLew 0:80ee8f3b695e 676 * @{
EricLew 0:80ee8f3b695e 677 */
EricLew 0:80ee8f3b695e 678
EricLew 0:80ee8f3b695e 679 #define IS_PWR_WAKEUP_PIN(PIN) (((PIN) == PWR_WAKEUP_PIN1) || \
EricLew 0:80ee8f3b695e 680 ((PIN) == PWR_WAKEUP_PIN2) || \
EricLew 0:80ee8f3b695e 681 ((PIN) == PWR_WAKEUP_PIN3) || \
EricLew 0:80ee8f3b695e 682 ((PIN) == PWR_WAKEUP_PIN4) || \
EricLew 0:80ee8f3b695e 683 ((PIN) == PWR_WAKEUP_PIN5) || \
EricLew 0:80ee8f3b695e 684 ((PIN) == PWR_WAKEUP_PIN1_HIGH) || \
EricLew 0:80ee8f3b695e 685 ((PIN) == PWR_WAKEUP_PIN2_HIGH) || \
EricLew 0:80ee8f3b695e 686 ((PIN) == PWR_WAKEUP_PIN3_HIGH) || \
EricLew 0:80ee8f3b695e 687 ((PIN) == PWR_WAKEUP_PIN4_HIGH) || \
EricLew 0:80ee8f3b695e 688 ((PIN) == PWR_WAKEUP_PIN5_HIGH) || \
EricLew 0:80ee8f3b695e 689 ((PIN) == PWR_WAKEUP_PIN1_LOW) || \
EricLew 0:80ee8f3b695e 690 ((PIN) == PWR_WAKEUP_PIN2_LOW) || \
EricLew 0:80ee8f3b695e 691 ((PIN) == PWR_WAKEUP_PIN3_LOW) || \
EricLew 0:80ee8f3b695e 692 ((PIN) == PWR_WAKEUP_PIN4_LOW) || \
EricLew 0:80ee8f3b695e 693 ((PIN) == PWR_WAKEUP_PIN5_LOW))
EricLew 0:80ee8f3b695e 694
EricLew 0:80ee8f3b695e 695 #define IS_PWR_PVM_TYPE(TYPE) (((TYPE) & PWR_CR2_PVME) != RESET)
EricLew 0:80ee8f3b695e 696
EricLew 0:80ee8f3b695e 697 #define IS_PWR_PVM_MODE(MODE) (((MODE) == PWR_PVM_MODE_NORMAL) ||\
EricLew 0:80ee8f3b695e 698 ((MODE) == PWR_PVM_MODE_IT_RISING) ||\
EricLew 0:80ee8f3b695e 699 ((MODE) == PWR_PVM_MODE_IT_FALLING) ||\
EricLew 0:80ee8f3b695e 700 ((MODE) == PWR_PVM_MODE_IT_RISING_FALLING) ||\
EricLew 0:80ee8f3b695e 701 ((MODE) == PWR_PVM_MODE_EVENT_RISING) ||\
EricLew 0:80ee8f3b695e 702 ((MODE) == PWR_PVM_MODE_EVENT_FALLING) ||\
EricLew 0:80ee8f3b695e 703 ((MODE) == PWR_PVM_MODE_EVENT_RISING_FALLING))
EricLew 0:80ee8f3b695e 704
EricLew 0:80ee8f3b695e 705 #define IS_PWR_VOLTAGE_SCALING_RANGE(RANGE) (((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE1) || \
EricLew 0:80ee8f3b695e 706 ((RANGE) == PWR_REGULATOR_VOLTAGE_SCALE2))
EricLew 0:80ee8f3b695e 707
EricLew 0:80ee8f3b695e 708 #define IS_PWR_BATTERY_RESISTOR_SELECT(RESISTOR) (((RESISTOR) == PWR_BATTERY_CHARGING_RESISTOR_5) ||\
EricLew 0:80ee8f3b695e 709 ((RESISTOR) == PWR_BATTERY_CHARGING_RESISTOR_1_5))
EricLew 0:80ee8f3b695e 710
EricLew 0:80ee8f3b695e 711 #define IS_PWR_BATTERY_CHARGING(CHARGING) (((CHARGING) == PWR_BATTERY_CHARGING_DISABLE) ||\
EricLew 0:80ee8f3b695e 712 ((CHARGING) == PWR_BATTERY_CHARGING_ENABLE))
EricLew 0:80ee8f3b695e 713
EricLew 0:80ee8f3b695e 714 #define IS_PWR_GPIO_BIT_NUMBER(BIT_NUMBER) (((BIT_NUMBER) & GPIO_PIN_MASK) != (uint32_t)0x00)
EricLew 0:80ee8f3b695e 715
EricLew 0:80ee8f3b695e 716
EricLew 0:80ee8f3b695e 717 #define IS_PWR_GPIO(GPIO) (((GPIO) == PWR_GPIO_A) ||\
EricLew 0:80ee8f3b695e 718 ((GPIO) == PWR_GPIO_B) ||\
EricLew 0:80ee8f3b695e 719 ((GPIO) == PWR_GPIO_C) ||\
EricLew 0:80ee8f3b695e 720 ((GPIO) == PWR_GPIO_D) ||\
EricLew 0:80ee8f3b695e 721 ((GPIO) == PWR_GPIO_E) ||\
EricLew 0:80ee8f3b695e 722 ((GPIO) == PWR_GPIO_F) ||\
EricLew 0:80ee8f3b695e 723 ((GPIO) == PWR_GPIO_G) ||\
EricLew 0:80ee8f3b695e 724 ((GPIO) == PWR_GPIO_H))
EricLew 0:80ee8f3b695e 725
EricLew 0:80ee8f3b695e 726
EricLew 0:80ee8f3b695e 727 /**
EricLew 0:80ee8f3b695e 728 * @}
EricLew 0:80ee8f3b695e 729 */
EricLew 0:80ee8f3b695e 730
EricLew 0:80ee8f3b695e 731
EricLew 0:80ee8f3b695e 732 /** @addtogroup PWREx_Exported_Functions PWR Extended Exported Functions
EricLew 0:80ee8f3b695e 733 * @{
EricLew 0:80ee8f3b695e 734 */
EricLew 0:80ee8f3b695e 735
EricLew 0:80ee8f3b695e 736 /** @addtogroup PWREx_Exported_Functions_Group1 Extended Peripheral Control functions
EricLew 0:80ee8f3b695e 737 * @{
EricLew 0:80ee8f3b695e 738 */
EricLew 0:80ee8f3b695e 739
EricLew 0:80ee8f3b695e 740
EricLew 0:80ee8f3b695e 741 /* Peripheral Control functions **********************************************/
EricLew 0:80ee8f3b695e 742 uint32_t HAL_PWREx_GetVoltageRange(void);
EricLew 0:80ee8f3b695e 743 HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling);
EricLew 0:80ee8f3b695e 744 void HAL_PWREx_EnableBatteryCharging(uint32_t ResistorSelection);
EricLew 0:80ee8f3b695e 745 void HAL_PWREx_DisableBatteryCharging(void);
EricLew 0:80ee8f3b695e 746 #if defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
EricLew 0:80ee8f3b695e 747 void HAL_PWREx_EnableVddUSB(void);
EricLew 0:80ee8f3b695e 748 void HAL_PWREx_DisableVddUSB(void);
EricLew 0:80ee8f3b695e 749 #endif /* defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) */
EricLew 0:80ee8f3b695e 750 void HAL_PWREx_EnableVddIO2(void);
EricLew 0:80ee8f3b695e 751 void HAL_PWREx_DisableVddIO2(void);
EricLew 0:80ee8f3b695e 752 void HAL_PWREx_EnableInternalWakeUpLine(void);
EricLew 0:80ee8f3b695e 753 void HAL_PWREx_DisableInternalWakeUpLine(void);
EricLew 0:80ee8f3b695e 754 HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber);
EricLew 0:80ee8f3b695e 755 HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullUp(uint32_t GPIO, uint32_t GPIONumber);
EricLew 0:80ee8f3b695e 756 HAL_StatusTypeDef HAL_PWREx_EnableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber);
EricLew 0:80ee8f3b695e 757 HAL_StatusTypeDef HAL_PWREx_DisableGPIOPullDown(uint32_t GPIO, uint32_t GPIONumber);
EricLew 0:80ee8f3b695e 758 void HAL_PWREx_EnablePullUpPullDownConfig(void);
EricLew 0:80ee8f3b695e 759 void HAL_PWREx_DisablePullUpPullDownConfig(void);
EricLew 0:80ee8f3b695e 760 void HAL_PWREx_EnableSRAM2ContentRetention(void);
EricLew 0:80ee8f3b695e 761 void HAL_PWREx_DisableSRAM2ContentRetention(void);
EricLew 0:80ee8f3b695e 762 #if defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
EricLew 0:80ee8f3b695e 763 void HAL_PWREx_EnablePVM1(void);
EricLew 0:80ee8f3b695e 764 void HAL_PWREx_DisablePVM1(void);
EricLew 0:80ee8f3b695e 765 #endif /* defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) */
EricLew 0:80ee8f3b695e 766 void HAL_PWREx_EnablePVM2(void);
EricLew 0:80ee8f3b695e 767 void HAL_PWREx_DisablePVM2(void);
EricLew 0:80ee8f3b695e 768 void HAL_PWREx_EnablePVM3(void);
EricLew 0:80ee8f3b695e 769 void HAL_PWREx_DisablePVM3(void);
EricLew 0:80ee8f3b695e 770 void HAL_PWREx_EnablePVM4(void);
EricLew 0:80ee8f3b695e 771 void HAL_PWREx_DisablePVM4(void);
EricLew 0:80ee8f3b695e 772 HAL_StatusTypeDef HAL_PWREx_ConfigPVM(PWR_PVMTypeDef *sConfigPVM);
EricLew 0:80ee8f3b695e 773
EricLew 0:80ee8f3b695e 774
EricLew 0:80ee8f3b695e 775 /* Low Power modes configuration functions ************************************/
EricLew 0:80ee8f3b695e 776 void HAL_PWREx_EnableLowPowerRunMode(void);
EricLew 0:80ee8f3b695e 777 HAL_StatusTypeDef HAL_PWREx_DisableLowPowerRunMode(void);
EricLew 0:80ee8f3b695e 778 void HAL_PWREx_EnterSTOP1Mode(uint32_t Regulator, uint8_t STOPEntry);
EricLew 0:80ee8f3b695e 779 void HAL_PWREx_EnterSTOP2Mode(uint8_t STOPEntry);
EricLew 0:80ee8f3b695e 780 void HAL_PWREx_EnterSHUTDOWNMode(void);
EricLew 0:80ee8f3b695e 781
EricLew 0:80ee8f3b695e 782 void HAL_PWREx_PVD_PVM_IRQHandler(void);
EricLew 0:80ee8f3b695e 783 #if defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx)
EricLew 0:80ee8f3b695e 784 void HAL_PWREx_PVM1Callback(void);
EricLew 0:80ee8f3b695e 785 #endif /* defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) */
EricLew 0:80ee8f3b695e 786 void HAL_PWREx_PVM2Callback(void);
EricLew 0:80ee8f3b695e 787 void HAL_PWREx_PVM3Callback(void);
EricLew 0:80ee8f3b695e 788 void HAL_PWREx_PVM4Callback(void);
EricLew 0:80ee8f3b695e 789
EricLew 0:80ee8f3b695e 790
EricLew 0:80ee8f3b695e 791 /**
EricLew 0:80ee8f3b695e 792 * @}
EricLew 0:80ee8f3b695e 793 */
EricLew 0:80ee8f3b695e 794
EricLew 0:80ee8f3b695e 795 /**
EricLew 0:80ee8f3b695e 796 * @}
EricLew 0:80ee8f3b695e 797 */
EricLew 0:80ee8f3b695e 798
EricLew 0:80ee8f3b695e 799 /**
EricLew 0:80ee8f3b695e 800 * @}
EricLew 0:80ee8f3b695e 801 */
EricLew 0:80ee8f3b695e 802
EricLew 0:80ee8f3b695e 803 /**
EricLew 0:80ee8f3b695e 804 * @}
EricLew 0:80ee8f3b695e 805 */
EricLew 0:80ee8f3b695e 806
EricLew 0:80ee8f3b695e 807 #ifdef __cplusplus
EricLew 0:80ee8f3b695e 808 }
EricLew 0:80ee8f3b695e 809 #endif
EricLew 0:80ee8f3b695e 810
EricLew 0:80ee8f3b695e 811
EricLew 0:80ee8f3b695e 812 #endif /* __STM32L4xx_HAL_PWR_EX_H */
EricLew 0:80ee8f3b695e 813
EricLew 0:80ee8f3b695e 814 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
EricLew 0:80ee8f3b695e 815