Hal Drivers for L4

Dependents:   BSP OneHopeOnePrayer FINAL_AUDIO_RECORD AudioDemo

Fork of STM32L4xx_HAL_Driver by Senior Design: Sound Monitor

Committer:
EricLew
Date:
Wed Nov 25 17:30:43 2015 +0000
Revision:
2:7aef7655b0a8
Parent:
0:80ee8f3b695e
commit;

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EricLew 0:80ee8f3b695e 1 /**
EricLew 0:80ee8f3b695e 2 ******************************************************************************
EricLew 0:80ee8f3b695e 3 * @file stm32l4xx_hal_dfsdm.h
EricLew 0:80ee8f3b695e 4 * @author MCD Application Team
EricLew 0:80ee8f3b695e 5 * @version V1.1.0
EricLew 0:80ee8f3b695e 6 * @date 16-September-2015
EricLew 0:80ee8f3b695e 7 * @brief Header file of DFSDM HAL module.
EricLew 0:80ee8f3b695e 8 ******************************************************************************
EricLew 0:80ee8f3b695e 9 * @attention
EricLew 0:80ee8f3b695e 10 *
EricLew 0:80ee8f3b695e 11 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
EricLew 0:80ee8f3b695e 12 *
EricLew 0:80ee8f3b695e 13 * Redistribution and use in source and binary forms, with or without modification,
EricLew 0:80ee8f3b695e 14 * are permitted provided that the following conditions are met:
EricLew 0:80ee8f3b695e 15 * 1. Redistributions of source code must retain the above copyright notice,
EricLew 0:80ee8f3b695e 16 * this list of conditions and the following disclaimer.
EricLew 0:80ee8f3b695e 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
EricLew 0:80ee8f3b695e 18 * this list of conditions and the following disclaimer in the documentation
EricLew 0:80ee8f3b695e 19 * and/or other materials provided with the distribution.
EricLew 0:80ee8f3b695e 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
EricLew 0:80ee8f3b695e 21 * may be used to endorse or promote products derived from this software
EricLew 0:80ee8f3b695e 22 * without specific prior written permission.
EricLew 0:80ee8f3b695e 23 *
EricLew 0:80ee8f3b695e 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
EricLew 0:80ee8f3b695e 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
EricLew 0:80ee8f3b695e 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
EricLew 0:80ee8f3b695e 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
EricLew 0:80ee8f3b695e 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
EricLew 0:80ee8f3b695e 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
EricLew 0:80ee8f3b695e 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
EricLew 0:80ee8f3b695e 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
EricLew 0:80ee8f3b695e 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
EricLew 0:80ee8f3b695e 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
EricLew 0:80ee8f3b695e 34 *
EricLew 0:80ee8f3b695e 35 ******************************************************************************
EricLew 0:80ee8f3b695e 36 */
EricLew 0:80ee8f3b695e 37
EricLew 0:80ee8f3b695e 38 /* Define to prevent recursive inclusion -------------------------------------*/
EricLew 0:80ee8f3b695e 39 #ifndef __STM32L4xx_HAL_DFSDM_H
EricLew 0:80ee8f3b695e 40 #define __STM32L4xx_HAL_DFSDM_H
EricLew 0:80ee8f3b695e 41
EricLew 0:80ee8f3b695e 42 #ifdef __cplusplus
EricLew 0:80ee8f3b695e 43 extern "C" {
EricLew 0:80ee8f3b695e 44 #endif
EricLew 0:80ee8f3b695e 45
EricLew 0:80ee8f3b695e 46 /* Includes ------------------------------------------------------------------*/
EricLew 0:80ee8f3b695e 47 #include "stm32l4xx_hal_def.h"
EricLew 0:80ee8f3b695e 48
EricLew 0:80ee8f3b695e 49 /** @addtogroup STM32L4xx_HAL_Driver
EricLew 0:80ee8f3b695e 50 * @{
EricLew 0:80ee8f3b695e 51 */
EricLew 0:80ee8f3b695e 52
EricLew 0:80ee8f3b695e 53 /** @addtogroup DFSDM
EricLew 0:80ee8f3b695e 54 * @{
EricLew 0:80ee8f3b695e 55 */
EricLew 0:80ee8f3b695e 56
EricLew 0:80ee8f3b695e 57 /* Exported types ------------------------------------------------------------*/
EricLew 0:80ee8f3b695e 58 /** @defgroup DFSDM_Exported_Types DFSDM Exported Types
EricLew 0:80ee8f3b695e 59 * @{
EricLew 0:80ee8f3b695e 60 */
EricLew 0:80ee8f3b695e 61
EricLew 0:80ee8f3b695e 62 /**
EricLew 0:80ee8f3b695e 63 * @brief HAL DFSDM Channel states definition
EricLew 0:80ee8f3b695e 64 */
EricLew 0:80ee8f3b695e 65 typedef enum
EricLew 0:80ee8f3b695e 66 {
EricLew 0:80ee8f3b695e 67 HAL_DFSDM_CHANNEL_STATE_RESET = 0x00, /*!< DFSDM channel not initialized */
EricLew 0:80ee8f3b695e 68 HAL_DFSDM_CHANNEL_STATE_READY = 0x01, /*!< DFSDM channel initialized and ready for use */
EricLew 0:80ee8f3b695e 69 HAL_DFSDM_CHANNEL_STATE_ERROR = 0xFF /*!< DFSDM channel state error */
EricLew 0:80ee8f3b695e 70 }HAL_DFSDM_Channel_StateTypeDef;
EricLew 0:80ee8f3b695e 71
EricLew 0:80ee8f3b695e 72 /**
EricLew 0:80ee8f3b695e 73 * @brief DFSDM channel output clock structure definition
EricLew 0:80ee8f3b695e 74 */
EricLew 0:80ee8f3b695e 75 typedef struct
EricLew 0:80ee8f3b695e 76 {
EricLew 0:80ee8f3b695e 77 FunctionalState Activation; /*!< Output clock enable/disable */
EricLew 0:80ee8f3b695e 78 uint32_t Selection; /*!< Output clock is system clock or audio clock.
EricLew 0:80ee8f3b695e 79 This parameter can be a value of @ref DFSDM_Channel_OuputClock */
EricLew 0:80ee8f3b695e 80 uint32_t Divider; /*!< Output clock divider.
EricLew 0:80ee8f3b695e 81 This parameter must be a number between Min_Data = 2 and Max_Data = 256 */
EricLew 0:80ee8f3b695e 82 }DFSDM_Channel_OutputClockTypeDef;
EricLew 0:80ee8f3b695e 83
EricLew 0:80ee8f3b695e 84 /**
EricLew 0:80ee8f3b695e 85 * @brief DFSDM channel input structure definition
EricLew 0:80ee8f3b695e 86 */
EricLew 0:80ee8f3b695e 87 typedef struct
EricLew 0:80ee8f3b695e 88 {
EricLew 0:80ee8f3b695e 89 uint32_t Multiplexer; /*!< Input is external serial inputs or internal register.
EricLew 0:80ee8f3b695e 90 This parameter can be a value of @ref DFSDM_Channel_InputMultiplexer */
EricLew 0:80ee8f3b695e 91 uint32_t DataPacking; /*!< Standard, interleaved or dual mode for internal register.
EricLew 0:80ee8f3b695e 92 This parameter can be a value of @ref DFSDM_Channel_DataPacking */
EricLew 0:80ee8f3b695e 93 uint32_t Pins; /*!< Input pins are taken from same or following channel.
EricLew 0:80ee8f3b695e 94 This parameter can be a value of @ref DFSDM_Channel_InputPins */
EricLew 0:80ee8f3b695e 95 }DFSDM_Channel_InputTypeDef;
EricLew 0:80ee8f3b695e 96
EricLew 0:80ee8f3b695e 97 /**
EricLew 0:80ee8f3b695e 98 * @brief DFSDM channel serial interface structure definition
EricLew 0:80ee8f3b695e 99 */
EricLew 0:80ee8f3b695e 100 typedef struct
EricLew 0:80ee8f3b695e 101 {
EricLew 0:80ee8f3b695e 102 uint32_t Type; /*!< SPI or Manchester modes.
EricLew 0:80ee8f3b695e 103 This parameter can be a value of @ref DFSDM_Channel_SerialInterfaceType */
EricLew 0:80ee8f3b695e 104 uint32_t SpiClock; /*!< SPI clock select (external or internal with different sampling point).
EricLew 0:80ee8f3b695e 105 This parameter can be a value of @ref DFSDM_Channel_SpiClock */
EricLew 0:80ee8f3b695e 106 }DFSDM_Channel_SerialInterfaceTypeDef;
EricLew 0:80ee8f3b695e 107
EricLew 0:80ee8f3b695e 108 /**
EricLew 0:80ee8f3b695e 109 * @brief DFSDM channel analog watchdog structure definition
EricLew 0:80ee8f3b695e 110 */
EricLew 0:80ee8f3b695e 111 typedef struct
EricLew 0:80ee8f3b695e 112 {
EricLew 0:80ee8f3b695e 113 uint32_t FilterOrder; /*!< Analog watchdog Sinc filter order.
EricLew 0:80ee8f3b695e 114 This parameter can be a value of @ref DFSDM_Channel_AwdFilterOrder */
EricLew 0:80ee8f3b695e 115 uint32_t Oversampling; /*!< Analog watchdog filter oversampling ratio.
EricLew 0:80ee8f3b695e 116 This parameter must be a number between Min_Data = 1 and Max_Data = 32 */
EricLew 0:80ee8f3b695e 117 }DFSDM_Channel_AwdTypeDef;
EricLew 0:80ee8f3b695e 118
EricLew 0:80ee8f3b695e 119 /**
EricLew 0:80ee8f3b695e 120 * @brief DFSDM channel init structure definition
EricLew 0:80ee8f3b695e 121 */
EricLew 0:80ee8f3b695e 122 typedef struct
EricLew 0:80ee8f3b695e 123 {
EricLew 0:80ee8f3b695e 124 DFSDM_Channel_OutputClockTypeDef OutputClock; /*!< DFSDM channel output clock parameters */
EricLew 0:80ee8f3b695e 125 DFSDM_Channel_InputTypeDef Input; /*!< DFSDM channel input parameters */
EricLew 0:80ee8f3b695e 126 DFSDM_Channel_SerialInterfaceTypeDef SerialInterface; /*!< DFSDM channel serial interface parameters */
EricLew 0:80ee8f3b695e 127 DFSDM_Channel_AwdTypeDef Awd; /*!< DFSDM channel analog watchdog parameters */
EricLew 0:80ee8f3b695e 128 int32_t Offset; /*!< DFSDM channel offset.
EricLew 0:80ee8f3b695e 129 This parameter must be a number between Min_Data = -8388608 and Max_Data = 8388607 */
EricLew 0:80ee8f3b695e 130 uint32_t RightBitShift; /*!< DFSDM channel right bit shift.
EricLew 0:80ee8f3b695e 131 This parameter must be a number between Min_Data = 0x00 and Max_Data = 0x1F */
EricLew 0:80ee8f3b695e 132 }DFSDM_Channel_InitTypeDef;
EricLew 0:80ee8f3b695e 133
EricLew 0:80ee8f3b695e 134 /**
EricLew 0:80ee8f3b695e 135 * @brief DFSDM channel handle structure definition
EricLew 0:80ee8f3b695e 136 */
EricLew 0:80ee8f3b695e 137 typedef struct
EricLew 0:80ee8f3b695e 138 {
EricLew 0:80ee8f3b695e 139 DFSDM_Channel_TypeDef *Instance; /*!< DFSDM channel instance */
EricLew 0:80ee8f3b695e 140 DFSDM_Channel_InitTypeDef Init; /*!< DFSDM channel init parameters */
EricLew 0:80ee8f3b695e 141 HAL_DFSDM_Channel_StateTypeDef State; /*!< DFSDM channel state */
EricLew 0:80ee8f3b695e 142 }DFSDM_Channel_HandleTypeDef;
EricLew 0:80ee8f3b695e 143
EricLew 0:80ee8f3b695e 144 /**
EricLew 0:80ee8f3b695e 145 * @brief HAL DFSDM Filter states definition
EricLew 0:80ee8f3b695e 146 */
EricLew 0:80ee8f3b695e 147 typedef enum
EricLew 0:80ee8f3b695e 148 {
EricLew 0:80ee8f3b695e 149 HAL_DFSDM_FILTER_STATE_RESET = 0x00, /*!< DFSDM filter not initialized */
EricLew 0:80ee8f3b695e 150 HAL_DFSDM_FILTER_STATE_READY = 0x01, /*!< DFSDM filter initialized and ready for use */
EricLew 0:80ee8f3b695e 151 HAL_DFSDM_FILTER_STATE_REG = 0x02, /*!< DFSDM filter regular conversion in progress */
EricLew 0:80ee8f3b695e 152 HAL_DFSDM_FILTER_STATE_INJ = 0x03, /*!< DFSDM filter injected conversion in progress */
EricLew 0:80ee8f3b695e 153 HAL_DFSDM_FILTER_STATE_REG_INJ = 0x04, /*!< DFSDM filter regular and injected conversions in progress */
EricLew 0:80ee8f3b695e 154 HAL_DFSDM_FILTER_STATE_ERROR = 0xFF /*!< DFSDM filter state error */
EricLew 0:80ee8f3b695e 155 }HAL_DFSDM_Filter_StateTypeDef;
EricLew 0:80ee8f3b695e 156
EricLew 0:80ee8f3b695e 157 /**
EricLew 0:80ee8f3b695e 158 * @brief DFSDM filter regular conversion parameters structure definition
EricLew 0:80ee8f3b695e 159 */
EricLew 0:80ee8f3b695e 160 typedef struct
EricLew 0:80ee8f3b695e 161 {
EricLew 0:80ee8f3b695e 162 uint32_t Trigger; /*!< Trigger used to start regular conversion: software or synchronous.
EricLew 0:80ee8f3b695e 163 This parameter can be a value of @ref DFSDM_Filter_Trigger */
EricLew 0:80ee8f3b695e 164 FunctionalState FastMode; /*!< Enable/disable fast mode for regular conversion */
EricLew 0:80ee8f3b695e 165 FunctionalState DmaMode; /*!< Enable/disable DMA for regular conversion */
EricLew 0:80ee8f3b695e 166 }DFSDM_Filter_RegularParamTypeDef;
EricLew 0:80ee8f3b695e 167
EricLew 0:80ee8f3b695e 168 /**
EricLew 0:80ee8f3b695e 169 * @brief DFSDM filter injected conversion parameters structure definition
EricLew 0:80ee8f3b695e 170 */
EricLew 0:80ee8f3b695e 171 typedef struct
EricLew 0:80ee8f3b695e 172 {
EricLew 0:80ee8f3b695e 173 uint32_t Trigger; /*!< Trigger used to start injected conversion: software, external or synchronous.
EricLew 0:80ee8f3b695e 174 This parameter can be a value of @ref DFSDM_Filter_Trigger */
EricLew 0:80ee8f3b695e 175 FunctionalState ScanMode; /*!< Enable/disable scanning mode for injected conversion */
EricLew 0:80ee8f3b695e 176 FunctionalState DmaMode; /*!< Enable/disable DMA for injected conversion */
EricLew 0:80ee8f3b695e 177 uint32_t ExtTrigger; /*!< External trigger.
EricLew 0:80ee8f3b695e 178 This parameter can be a value of @ref DFSDM_Filter_ExtTrigger */
EricLew 0:80ee8f3b695e 179 uint32_t ExtTriggerEdge; /*!< External trigger edge: rising, falling or both.
EricLew 0:80ee8f3b695e 180 This parameter can be a value of @ref DFSDM_Filter_ExtTriggerEdge */
EricLew 0:80ee8f3b695e 181 }DFSDM_Filter_InjectedParamTypeDef;
EricLew 0:80ee8f3b695e 182
EricLew 0:80ee8f3b695e 183 /**
EricLew 0:80ee8f3b695e 184 * @brief DFSDM filter parameters structure definition
EricLew 0:80ee8f3b695e 185 */
EricLew 0:80ee8f3b695e 186 typedef struct
EricLew 0:80ee8f3b695e 187 {
EricLew 0:80ee8f3b695e 188 uint32_t SincOrder; /*!< Sinc filter order.
EricLew 0:80ee8f3b695e 189 This parameter can be a value of @ref DFSDM_Filter_SincOrder */
EricLew 0:80ee8f3b695e 190 uint32_t Oversampling; /*!< Filter oversampling ratio.
EricLew 0:80ee8f3b695e 191 This parameter must be a number between Min_Data = 1 and Max_Data = 1024 */
EricLew 0:80ee8f3b695e 192 uint32_t IntOversampling; /*!< Integrator oversampling ratio.
EricLew 0:80ee8f3b695e 193 This parameter must be a number between Min_Data = 1 and Max_Data = 256 */
EricLew 0:80ee8f3b695e 194 }DFSDM_Filter_FilterParamTypeDef;
EricLew 0:80ee8f3b695e 195
EricLew 0:80ee8f3b695e 196 /**
EricLew 0:80ee8f3b695e 197 * @brief DFSDM filter init structure definition
EricLew 0:80ee8f3b695e 198 */
EricLew 0:80ee8f3b695e 199 typedef struct
EricLew 0:80ee8f3b695e 200 {
EricLew 0:80ee8f3b695e 201 DFSDM_Filter_RegularParamTypeDef RegularParam; /*!< DFSDM regular conversion parameters */
EricLew 0:80ee8f3b695e 202 DFSDM_Filter_InjectedParamTypeDef InjectedParam; /*!< DFSDM injected conversion parameters */
EricLew 0:80ee8f3b695e 203 DFSDM_Filter_FilterParamTypeDef FilterParam; /*!< DFSDM filter parameters */
EricLew 0:80ee8f3b695e 204 }DFSDM_Filter_InitTypeDef;
EricLew 0:80ee8f3b695e 205
EricLew 0:80ee8f3b695e 206 /**
EricLew 0:80ee8f3b695e 207 * @brief DFSDM filter handle structure definition
EricLew 0:80ee8f3b695e 208 */
EricLew 0:80ee8f3b695e 209 typedef struct
EricLew 0:80ee8f3b695e 210 {
EricLew 0:80ee8f3b695e 211 DFSDM_Filter_TypeDef *Instance; /*!< DFSDM filter instance */
EricLew 0:80ee8f3b695e 212 DFSDM_Filter_InitTypeDef Init; /*!< DFSDM filter init parameters */
EricLew 0:80ee8f3b695e 213 DMA_HandleTypeDef *hdmaReg; /*!< Pointer on DMA handler for regular conversions */
EricLew 0:80ee8f3b695e 214 DMA_HandleTypeDef *hdmaInj; /*!< Pointer on DMA handler for injected conversions */
EricLew 0:80ee8f3b695e 215 uint32_t RegularContMode; /*!< Regular conversion continuous mode */
EricLew 0:80ee8f3b695e 216 uint32_t RegularTrigger; /*!< Trigger used for regular conversion */
EricLew 0:80ee8f3b695e 217 uint32_t InjectedTrigger; /*!< Trigger used for injected conversion */
EricLew 0:80ee8f3b695e 218 uint32_t ExtTriggerEdge; /*!< Rising, falling or both edges selected */
EricLew 0:80ee8f3b695e 219 FunctionalState InjectedScanMode; /*!< Injected scanning mode */
EricLew 0:80ee8f3b695e 220 uint32_t InjectedChannelsNbr; /*!< Number of channels in injected sequence */
EricLew 0:80ee8f3b695e 221 uint32_t InjConvRemaining; /*!< Injected conversions remaining */
EricLew 0:80ee8f3b695e 222 HAL_DFSDM_Filter_StateTypeDef State; /*!< DFSDM filter state */
EricLew 0:80ee8f3b695e 223 uint32_t ErrorCode; /*!< DFSDM filter error code */
EricLew 0:80ee8f3b695e 224 }DFSDM_Filter_HandleTypeDef;
EricLew 0:80ee8f3b695e 225
EricLew 0:80ee8f3b695e 226 /**
EricLew 0:80ee8f3b695e 227 * @brief DFSDM filter analog watchdog parameters structure definition
EricLew 0:80ee8f3b695e 228 */
EricLew 0:80ee8f3b695e 229 typedef struct
EricLew 0:80ee8f3b695e 230 {
EricLew 0:80ee8f3b695e 231 uint32_t DataSource; /*!< Values from digital filter or from channel watchdog filter.
EricLew 0:80ee8f3b695e 232 This parameter can be a value of @ref DFSDM_Filter_AwdDataSource */
EricLew 0:80ee8f3b695e 233 uint32_t Channel; /*!< Analog watchdog channel selection.
EricLew 0:80ee8f3b695e 234 This parameter can be a values combination of @ref DFSDM_Channel_Selection */
EricLew 0:80ee8f3b695e 235 int32_t HighThreshold; /*!< High threshold for the analog watchdog.
EricLew 0:80ee8f3b695e 236 This parameter must be a number between Min_Data = -8388608 and Max_Data = 8388607 */
EricLew 0:80ee8f3b695e 237 int32_t LowThreshold; /*!< Low threshold for the analog watchdog.
EricLew 0:80ee8f3b695e 238 This parameter must be a number between Min_Data = -8388608 and Max_Data = 8388607 */
EricLew 0:80ee8f3b695e 239 uint32_t HighBreakSignal; /*!< Break signal assigned to analog watchdog high threshold event.
EricLew 0:80ee8f3b695e 240 This parameter can be a values combination of @ref DFSDM_BreakSignals */
EricLew 0:80ee8f3b695e 241 uint32_t LowBreakSignal; /*!< Break signal assigned to analog watchdog low threshold event.
EricLew 0:80ee8f3b695e 242 This parameter can be a values combination of @ref DFSDM_BreakSignals */
EricLew 0:80ee8f3b695e 243 }DFSDM_Filter_AwdParamTypeDef;
EricLew 0:80ee8f3b695e 244
EricLew 0:80ee8f3b695e 245 /**
EricLew 0:80ee8f3b695e 246 * @}
EricLew 0:80ee8f3b695e 247 */
EricLew 0:80ee8f3b695e 248 /* End of exported types -----------------------------------------------------*/
EricLew 0:80ee8f3b695e 249
EricLew 0:80ee8f3b695e 250 /* Exported constants --------------------------------------------------------*/
EricLew 0:80ee8f3b695e 251 /** @defgroup DFSDM_Exported_Constants DFSDM Exported Constants
EricLew 0:80ee8f3b695e 252 * @{
EricLew 0:80ee8f3b695e 253 */
EricLew 0:80ee8f3b695e 254
EricLew 0:80ee8f3b695e 255 /** @defgroup DFSDM_Channel_OuputClock DFSDM channel output clock selection
EricLew 0:80ee8f3b695e 256 * @{
EricLew 0:80ee8f3b695e 257 */
EricLew 0:80ee8f3b695e 258 #define DFSDM_CHANNEL_OUTPUT_CLOCK_SYSTEM ((uint32_t)0x00000000) /*!< Source for ouput clock is system clock */
EricLew 0:80ee8f3b695e 259 #define DFSDM_CHANNEL_OUTPUT_CLOCK_AUDIO DFSDM_CHCFGR1_CKOUTSRC /*!< Source for ouput clock is audio clock */
EricLew 0:80ee8f3b695e 260 /**
EricLew 0:80ee8f3b695e 261 * @}
EricLew 0:80ee8f3b695e 262 */
EricLew 0:80ee8f3b695e 263
EricLew 0:80ee8f3b695e 264 /** @defgroup DFSDM_Channel_InputMultiplexer DFSDM channel input multiplexer
EricLew 0:80ee8f3b695e 265 * @{
EricLew 0:80ee8f3b695e 266 */
EricLew 0:80ee8f3b695e 267 #define DFSDM_CHANNEL_EXTERNAL_INPUTS ((uint32_t)0x00000000) /*!< Data are taken from external inputs */
EricLew 0:80ee8f3b695e 268 #define DFSDM_CHANNEL_INTERNAL_REGISTER DFSDM_CHCFGR1_DATMPX_1 /*!< Data are taken from internal register */
EricLew 0:80ee8f3b695e 269 /**
EricLew 0:80ee8f3b695e 270 * @}
EricLew 0:80ee8f3b695e 271 */
EricLew 0:80ee8f3b695e 272
EricLew 0:80ee8f3b695e 273 /** @defgroup DFSDM_Channel_DataPacking DFSDM channel input data packing
EricLew 0:80ee8f3b695e 274 * @{
EricLew 0:80ee8f3b695e 275 */
EricLew 0:80ee8f3b695e 276 #define DFSDM_CHANNEL_STANDARD_MODE ((uint32_t)0x00000000) /*!< Standard data packing mode */
EricLew 0:80ee8f3b695e 277 #define DFSDM_CHANNEL_INTERLEAVED_MODE DFSDM_CHCFGR1_DATPACK_0 /*!< Interleaved data packing mode */
EricLew 0:80ee8f3b695e 278 #define DFSDM_CHANNEL_DUAL_MODE DFSDM_CHCFGR1_DATPACK_1 /*!< Dual data packing mode */
EricLew 0:80ee8f3b695e 279 /**
EricLew 0:80ee8f3b695e 280 * @}
EricLew 0:80ee8f3b695e 281 */
EricLew 0:80ee8f3b695e 282
EricLew 0:80ee8f3b695e 283 /** @defgroup DFSDM_Channel_InputPins DFSDM channel input pins
EricLew 0:80ee8f3b695e 284 * @{
EricLew 0:80ee8f3b695e 285 */
EricLew 0:80ee8f3b695e 286 #define DFSDM_CHANNEL_SAME_CHANNEL_PINS ((uint32_t)0x00000000) /*!< Input from pins on same channel */
EricLew 0:80ee8f3b695e 287 #define DFSDM_CHANNEL_FOLLOWING_CHANNEL_PINS DFSDM_CHCFGR1_CHINSEL /*!< Input from pins on following channel */
EricLew 0:80ee8f3b695e 288 /**
EricLew 0:80ee8f3b695e 289 * @}
EricLew 0:80ee8f3b695e 290 */
EricLew 0:80ee8f3b695e 291
EricLew 0:80ee8f3b695e 292 /** @defgroup DFSDM_Channel_SerialInterfaceType DFSDM channel serial interface type
EricLew 0:80ee8f3b695e 293 * @{
EricLew 0:80ee8f3b695e 294 */
EricLew 0:80ee8f3b695e 295 #define DFSDM_CHANNEL_SPI_RISING ((uint32_t)0x00000000) /*!< SPI with rising edge */
EricLew 0:80ee8f3b695e 296 #define DFSDM_CHANNEL_SPI_FALLING DFSDM_CHCFGR1_SITP_0 /*!< SPI with falling edge */
EricLew 0:80ee8f3b695e 297 #define DFSDM_CHANNEL_MANCHESTER_RISING DFSDM_CHCFGR1_SITP_1 /*!< Manchester with rising edge */
EricLew 0:80ee8f3b695e 298 #define DFSDM_CHANNEL_MANCHESTER_FALLING DFSDM_CHCFGR1_SITP /*!< Manchester with falling edge */
EricLew 0:80ee8f3b695e 299 /**
EricLew 0:80ee8f3b695e 300 * @}
EricLew 0:80ee8f3b695e 301 */
EricLew 0:80ee8f3b695e 302
EricLew 0:80ee8f3b695e 303 /** @defgroup DFSDM_Channel_SpiClock DFSDM channel SPI clock selection
EricLew 0:80ee8f3b695e 304 * @{
EricLew 0:80ee8f3b695e 305 */
EricLew 0:80ee8f3b695e 306 #define DFSDM_CHANNEL_SPI_CLOCK_EXTERNAL ((uint32_t)0x00000000) /*!< External SPI clock */
EricLew 0:80ee8f3b695e 307 #define DFSDM_CHANNEL_SPI_CLOCK_INTERNAL DFSDM_CHCFGR1_SPICKSEL_0 /*!< Internal SPI clock */
EricLew 0:80ee8f3b695e 308 #define DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_FALLING DFSDM_CHCFGR1_SPICKSEL_1 /*!< Internal SPI clock divided by 2, falling edge */
EricLew 0:80ee8f3b695e 309 #define DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_RISING DFSDM_CHCFGR1_SPICKSEL /*!< Internal SPI clock divided by 2, rising edge */
EricLew 0:80ee8f3b695e 310 /**
EricLew 0:80ee8f3b695e 311 * @}
EricLew 0:80ee8f3b695e 312 */
EricLew 0:80ee8f3b695e 313
EricLew 0:80ee8f3b695e 314 /** @defgroup DFSDM_Channel_AwdFilterOrder DFSDM channel analog watchdog filter order
EricLew 0:80ee8f3b695e 315 * @{
EricLew 0:80ee8f3b695e 316 */
EricLew 0:80ee8f3b695e 317 #define DFSDM_CHANNEL_FASTSINC_ORDER ((uint32_t)0x00000000) /*!< FastSinc filter type */
EricLew 0:80ee8f3b695e 318 #define DFSDM_CHANNEL_SINC1_ORDER DFSDM_AWSCDR_AWFORD_0 /*!< Sinc 1 filter type */
EricLew 0:80ee8f3b695e 319 #define DFSDM_CHANNEL_SINC2_ORDER DFSDM_AWSCDR_AWFORD_1 /*!< Sinc 2 filter type */
EricLew 0:80ee8f3b695e 320 #define DFSDM_CHANNEL_SINC3_ORDER DFSDM_AWSCDR_AWFORD /*!< Sinc 3 filter type */
EricLew 0:80ee8f3b695e 321 /**
EricLew 0:80ee8f3b695e 322 * @}
EricLew 0:80ee8f3b695e 323 */
EricLew 0:80ee8f3b695e 324
EricLew 0:80ee8f3b695e 325 /** @defgroup DFSDM_Filter_Trigger DFSDM filter conversion trigger
EricLew 0:80ee8f3b695e 326 * @{
EricLew 0:80ee8f3b695e 327 */
EricLew 0:80ee8f3b695e 328 #define DFSDM_FILTER_SW_TRIGGER ((uint32_t)0x00000000) /*!< Software trigger */
EricLew 0:80ee8f3b695e 329 #define DFSDM_FILTER_SYNC_TRIGGER ((uint32_t)0x00000001) /*!< Synchronous with DFSDM0 */
EricLew 0:80ee8f3b695e 330 #define DFSDM_FILTER_EXT_TRIGGER ((uint32_t)0x00000002) /*!< External trigger (only for injected conversion) */
EricLew 0:80ee8f3b695e 331 /**
EricLew 0:80ee8f3b695e 332 * @}
EricLew 0:80ee8f3b695e 333 */
EricLew 0:80ee8f3b695e 334
EricLew 0:80ee8f3b695e 335 /** @defgroup DFSDM_Filter_ExtTrigger DFSDM filter external trigger
EricLew 0:80ee8f3b695e 336 * @{
EricLew 0:80ee8f3b695e 337 */
EricLew 0:80ee8f3b695e 338 #define DFSDM_FILTER_EXT_TRIG_TIM1_TRGO ((uint32_t)0x00000000) /*!< For DFSDM 0, 1, 2 and 3 */
EricLew 0:80ee8f3b695e 339 #define DFSDM_FILTER_EXT_TRIG_TIM1_TRGO2 DFSDM_CR1_JEXTSEL_0 /*!< For DFSDM 0, 1, 2 and 3 */
EricLew 0:80ee8f3b695e 340 #define DFSDM_FILTER_EXT_TRIG_TIM8_TRGO DFSDM_CR1_JEXTSEL_1 /*!< For DFSDM 0, 1, 2 and 3 */
EricLew 0:80ee8f3b695e 341 #define DFSDM_FILTER_EXT_TRIG_TIM8_TRGO2 (DFSDM_CR1_JEXTSEL_0 | DFSDM_CR1_JEXTSEL_1) /*!< For DFSDM 0, 1 and 2 */
EricLew 0:80ee8f3b695e 342 #define DFSDM_FILTER_EXT_TRIG_TIM3_TRGO (DFSDM_CR1_JEXTSEL_0 | DFSDM_CR1_JEXTSEL_1) /*!< For DFSDM 3 */
EricLew 0:80ee8f3b695e 343 #define DFSDM_FILTER_EXT_TRIG_TIM4_TRGO DFSDM_CR1_JEXTSEL_2 /*!< For DFSDM 0, 1 and 2 */
EricLew 0:80ee8f3b695e 344 #define DFSDM_FILTER_EXT_TRIG_TIM16_OC1 DFSDM_CR1_JEXTSEL_2 /*!< For DFSDM 3 */
EricLew 0:80ee8f3b695e 345 #define DFSDM_FILTER_EXT_TRIG_TIM6_TRGO (DFSDM_CR1_JEXTSEL_0 | DFSDM_CR1_JEXTSEL_2) /*!< For DFSDM 0 and 1 */
EricLew 0:80ee8f3b695e 346 #define DFSDM_FILTER_EXT_TRIG_TIM7_TRGO (DFSDM_CR1_JEXTSEL_0 | DFSDM_CR1_JEXTSEL_2) /*!< For DFSDM 2 and 3 */
EricLew 0:80ee8f3b695e 347 #define DFSDM_FILTER_EXT_TRIG_EXTI11 (DFSDM_CR1_JEXTSEL_1 | DFSDM_CR1_JEXTSEL_2) /*!< For DFSDM 0, 1, 2 and 3 */
EricLew 0:80ee8f3b695e 348 #define DFSDM_FILTER_EXT_TRIG_EXTI15 DFSDM_CR1_JEXTSEL /*!< For DFSDM 0, 1, 2 and 3 */
EricLew 0:80ee8f3b695e 349 /**
EricLew 0:80ee8f3b695e 350 * @}
EricLew 0:80ee8f3b695e 351 */
EricLew 0:80ee8f3b695e 352
EricLew 0:80ee8f3b695e 353 /** @defgroup DFSDM_Filter_ExtTriggerEdge DFSDM filter external trigger edge
EricLew 0:80ee8f3b695e 354 * @{
EricLew 0:80ee8f3b695e 355 */
EricLew 0:80ee8f3b695e 356 #define DFSDM_FILTER_EXT_TRIG_RISING_EDGE DFSDM_CR1_JEXTEN_0 /*!< External rising edge */
EricLew 0:80ee8f3b695e 357 #define DFSDM_FILTER_EXT_TRIG_FALLING_EDGE DFSDM_CR1_JEXTEN_1 /*!< External falling edge */
EricLew 0:80ee8f3b695e 358 #define DFSDM_FILTER_EXT_TRIG_BOTH_EDGES DFSDM_CR1_JEXTEN /*!< External rising and falling edges */
EricLew 0:80ee8f3b695e 359 /**
EricLew 0:80ee8f3b695e 360 * @}
EricLew 0:80ee8f3b695e 361 */
EricLew 0:80ee8f3b695e 362
EricLew 0:80ee8f3b695e 363 /** @defgroup DFSDM_Filter_SincOrder DFSDM filter sinc order
EricLew 0:80ee8f3b695e 364 * @{
EricLew 0:80ee8f3b695e 365 */
EricLew 0:80ee8f3b695e 366 #define DFSDM_FILTER_FASTSINC_ORDER ((uint32_t)0x00000000) /*!< FastSinc filter type */
EricLew 0:80ee8f3b695e 367 #define DFSDM_FILTER_SINC1_ORDER DFSDM_FCR_FORD_0 /*!< Sinc 1 filter type */
EricLew 0:80ee8f3b695e 368 #define DFSDM_FILTER_SINC2_ORDER DFSDM_FCR_FORD_1 /*!< Sinc 2 filter type */
EricLew 0:80ee8f3b695e 369 #define DFSDM_FILTER_SINC3_ORDER (DFSDM_FCR_FORD_0 | DFSDM_FCR_FORD_1) /*!< Sinc 3 filter type */
EricLew 0:80ee8f3b695e 370 #define DFSDM_FILTER_SINC4_ORDER DFSDM_FCR_FORD_2 /*!< Sinc 4 filter type */
EricLew 0:80ee8f3b695e 371 #define DFSDM_FILTER_SINC5_ORDER (DFSDM_FCR_FORD_0 | DFSDM_FCR_FORD_2) /*!< Sinc 5 filter type */
EricLew 0:80ee8f3b695e 372 /**
EricLew 0:80ee8f3b695e 373 * @}
EricLew 0:80ee8f3b695e 374 */
EricLew 0:80ee8f3b695e 375
EricLew 0:80ee8f3b695e 376 /** @defgroup DFSDM_Filter_AwdDataSource DFSDM filter analog watchdog data source
EricLew 0:80ee8f3b695e 377 * @{
EricLew 0:80ee8f3b695e 378 */
EricLew 0:80ee8f3b695e 379 #define DFSDM_FILTER_AWD_FILTER_DATA ((uint32_t)0x00000000) /*!< From digital filter */
EricLew 0:80ee8f3b695e 380 #define DFSDM_FILTER_AWD_CHANNEL_DATA DFSDM_CR1_AWFSEL /*!< From analog watchdog channel */
EricLew 0:80ee8f3b695e 381 /**
EricLew 0:80ee8f3b695e 382 * @}
EricLew 0:80ee8f3b695e 383 */
EricLew 0:80ee8f3b695e 384
EricLew 0:80ee8f3b695e 385 /** @defgroup DFSDM_Filter_ErrorCode DFSDM filter error code
EricLew 0:80ee8f3b695e 386 * @{
EricLew 0:80ee8f3b695e 387 */
EricLew 0:80ee8f3b695e 388 #define DFSDM_FILTER_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
EricLew 0:80ee8f3b695e 389 #define DFSDM_FILTER_ERROR_REGULAR_OVERRUN ((uint32_t)0x00000001) /*!< Overrun occurs during regular conversion */
EricLew 0:80ee8f3b695e 390 #define DFSDM_FILTER_ERROR_INJECTED_OVERRUN ((uint32_t)0x00000002) /*!< Overrun occurs during injected conversion */
EricLew 0:80ee8f3b695e 391 #define DFSDM_FILTER_ERROR_DMA ((uint32_t)0x00000003) /*!< DMA error occurs */
EricLew 0:80ee8f3b695e 392 /**
EricLew 0:80ee8f3b695e 393 * @}
EricLew 0:80ee8f3b695e 394 */
EricLew 0:80ee8f3b695e 395
EricLew 0:80ee8f3b695e 396 /** @defgroup DFSDM_BreakSignals DFSDM break signals
EricLew 0:80ee8f3b695e 397 * @{
EricLew 0:80ee8f3b695e 398 */
EricLew 0:80ee8f3b695e 399 #define DFSDM_NO_BREAK_SIGNAL ((uint32_t)0x00000000) /*!< No break signal */
EricLew 0:80ee8f3b695e 400 #define DFSDM_BREAK_SIGNAL_0 ((uint32_t)0x00000001) /*!< Break signal 0 */
EricLew 0:80ee8f3b695e 401 #define DFSDM_BREAK_SIGNAL_1 ((uint32_t)0x00000002) /*!< Break signal 1 */
EricLew 0:80ee8f3b695e 402 #define DFSDM_BREAK_SIGNAL_2 ((uint32_t)0x00000004) /*!< Break signal 2 */
EricLew 0:80ee8f3b695e 403 #define DFSDM_BREAK_SIGNAL_3 ((uint32_t)0x00000008) /*!< Break signal 3 */
EricLew 0:80ee8f3b695e 404 /**
EricLew 0:80ee8f3b695e 405 * @}
EricLew 0:80ee8f3b695e 406 */
EricLew 0:80ee8f3b695e 407
EricLew 0:80ee8f3b695e 408 /** @defgroup DFSDM_Channel_Selection DFSDM Channel Selection
EricLew 0:80ee8f3b695e 409 * @{
EricLew 0:80ee8f3b695e 410 */
EricLew 0:80ee8f3b695e 411 /* DFSDM Channels ------------------------------------------------------------*/
EricLew 0:80ee8f3b695e 412 /* The DFSDM channels are defined as follows:
EricLew 0:80ee8f3b695e 413 - in 16-bit LSB the channel mask is set
EricLew 0:80ee8f3b695e 414 - in 16-bit MSB the channel number is set
EricLew 0:80ee8f3b695e 415 e.g. for channel 5 definition:
EricLew 0:80ee8f3b695e 416 - the channel mask is 0x00000020 (bit 5 is set)
EricLew 0:80ee8f3b695e 417 - the channel number 5 is 0x00050000
EricLew 0:80ee8f3b695e 418 --> Consequently, channel 5 definition is 0x00000020 | 0x00050000 = 0x00050020 */
EricLew 0:80ee8f3b695e 419 #define DFSDM_CHANNEL_0 ((uint32_t)0x00000001)
EricLew 0:80ee8f3b695e 420 #define DFSDM_CHANNEL_1 ((uint32_t)0x00010002)
EricLew 0:80ee8f3b695e 421 #define DFSDM_CHANNEL_2 ((uint32_t)0x00020004)
EricLew 0:80ee8f3b695e 422 #define DFSDM_CHANNEL_3 ((uint32_t)0x00030008)
EricLew 0:80ee8f3b695e 423 #define DFSDM_CHANNEL_4 ((uint32_t)0x00040010)
EricLew 0:80ee8f3b695e 424 #define DFSDM_CHANNEL_5 ((uint32_t)0x00050020)
EricLew 0:80ee8f3b695e 425 #define DFSDM_CHANNEL_6 ((uint32_t)0x00060040)
EricLew 0:80ee8f3b695e 426 #define DFSDM_CHANNEL_7 ((uint32_t)0x00070080)
EricLew 0:80ee8f3b695e 427 /**
EricLew 0:80ee8f3b695e 428 * @}
EricLew 0:80ee8f3b695e 429 */
EricLew 0:80ee8f3b695e 430
EricLew 0:80ee8f3b695e 431 /** @defgroup DFSDM_ContinuousMode DFSDM Continuous Mode
EricLew 0:80ee8f3b695e 432 * @{
EricLew 0:80ee8f3b695e 433 */
EricLew 0:80ee8f3b695e 434 #define DFSDM_CONTINUOUS_CONV_OFF ((uint32_t)0x00000000) /*!< Conversion are not continuous */
EricLew 0:80ee8f3b695e 435 #define DFSDM_CONTINUOUS_CONV_ON ((uint32_t)0x00000001) /*!< Conversion are continuous */
EricLew 0:80ee8f3b695e 436 /**
EricLew 0:80ee8f3b695e 437 * @}
EricLew 0:80ee8f3b695e 438 */
EricLew 0:80ee8f3b695e 439
EricLew 0:80ee8f3b695e 440 /** @defgroup DFSDM_AwdThreshold DFSDM analog watchdog threshold
EricLew 0:80ee8f3b695e 441 * @{
EricLew 0:80ee8f3b695e 442 */
EricLew 0:80ee8f3b695e 443 #define DFSDM_AWD_HIGH_THRESHOLD ((uint32_t)0x00000000) /*!< Analog watchdog high threshold */
EricLew 0:80ee8f3b695e 444 #define DFSDM_AWD_LOW_THRESHOLD ((uint32_t)0x00000001) /*!< Analog watchdog low threshold */
EricLew 0:80ee8f3b695e 445 /**
EricLew 0:80ee8f3b695e 446 * @}
EricLew 0:80ee8f3b695e 447 */
EricLew 0:80ee8f3b695e 448
EricLew 0:80ee8f3b695e 449 /**
EricLew 0:80ee8f3b695e 450 * @}
EricLew 0:80ee8f3b695e 451 */
EricLew 0:80ee8f3b695e 452 /* End of exported constants -------------------------------------------------*/
EricLew 0:80ee8f3b695e 453
EricLew 0:80ee8f3b695e 454 /* Exported macros -----------------------------------------------------------*/
EricLew 0:80ee8f3b695e 455 /** @defgroup DFSDM_Exported_Macros DFSDM Exported Macros
EricLew 0:80ee8f3b695e 456 * @{
EricLew 0:80ee8f3b695e 457 */
EricLew 0:80ee8f3b695e 458
EricLew 0:80ee8f3b695e 459 /** @brief Reset DFSDM channel handle state.
EricLew 0:80ee8f3b695e 460 * @param __HANDLE__: DFSDM channel handle.
EricLew 0:80ee8f3b695e 461 * @retval None
EricLew 0:80ee8f3b695e 462 */
EricLew 0:80ee8f3b695e 463 #define __HAL_DFSDM_CHANNEL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DFSDM_CHANNEL_STATE_RESET)
EricLew 0:80ee8f3b695e 464
EricLew 0:80ee8f3b695e 465 /** @brief Reset DFSDM filter handle state.
EricLew 0:80ee8f3b695e 466 * @param __HANDLE__: DFSDM filter handle.
EricLew 0:80ee8f3b695e 467 * @retval None
EricLew 0:80ee8f3b695e 468 */
EricLew 0:80ee8f3b695e 469 #define __HAL_DFSDM_FILTER_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DFSDM_FILTER_STATE_RESET)
EricLew 0:80ee8f3b695e 470
EricLew 0:80ee8f3b695e 471 /**
EricLew 0:80ee8f3b695e 472 * @}
EricLew 0:80ee8f3b695e 473 */
EricLew 0:80ee8f3b695e 474 /* End of exported macros ----------------------------------------------------*/
EricLew 0:80ee8f3b695e 475
EricLew 0:80ee8f3b695e 476 /* Exported functions --------------------------------------------------------*/
EricLew 0:80ee8f3b695e 477 /** @addtogroup DFSDM_Exported_Functions DFSDM Exported Functions
EricLew 0:80ee8f3b695e 478 * @{
EricLew 0:80ee8f3b695e 479 */
EricLew 0:80ee8f3b695e 480
EricLew 0:80ee8f3b695e 481 /** @addtogroup DFSDM_Exported_Functions_Group1_Channel Channel initialization and de-initialization functions
EricLew 0:80ee8f3b695e 482 * @{
EricLew 0:80ee8f3b695e 483 */
EricLew 0:80ee8f3b695e 484 /* Channel initialization and de-initialization functions *********************/
EricLew 0:80ee8f3b695e 485 HAL_StatusTypeDef HAL_DFSDM_ChannelInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
EricLew 0:80ee8f3b695e 486 HAL_StatusTypeDef HAL_DFSDM_ChannelDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
EricLew 0:80ee8f3b695e 487 void HAL_DFSDM_ChannelMspInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
EricLew 0:80ee8f3b695e 488 void HAL_DFSDM_ChannelMspDeInit(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
EricLew 0:80ee8f3b695e 489 /**
EricLew 0:80ee8f3b695e 490 * @}
EricLew 0:80ee8f3b695e 491 */
EricLew 0:80ee8f3b695e 492
EricLew 0:80ee8f3b695e 493 /** @addtogroup DFSDM_Exported_Functions_Group2_Channel Channel operation functions
EricLew 0:80ee8f3b695e 494 * @{
EricLew 0:80ee8f3b695e 495 */
EricLew 0:80ee8f3b695e 496 /* Channel operation functions ************************************************/
EricLew 0:80ee8f3b695e 497 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
EricLew 0:80ee8f3b695e 498 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
EricLew 0:80ee8f3b695e 499 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
EricLew 0:80ee8f3b695e 500 HAL_StatusTypeDef HAL_DFSDM_ChannelCkabStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
EricLew 0:80ee8f3b695e 501
EricLew 0:80ee8f3b695e 502 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t Threshold, uint32_t BreakSignal);
EricLew 0:80ee8f3b695e 503 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStart_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t Threshold, uint32_t BreakSignal);
EricLew 0:80ee8f3b695e 504 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
EricLew 0:80ee8f3b695e 505 HAL_StatusTypeDef HAL_DFSDM_ChannelScdStop_IT(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
EricLew 0:80ee8f3b695e 506
EricLew 0:80ee8f3b695e 507 int16_t HAL_DFSDM_ChannelGetAwdValue(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
EricLew 0:80ee8f3b695e 508 HAL_StatusTypeDef HAL_DFSDM_ChannelModifyOffset(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, int32_t Offset);
EricLew 0:80ee8f3b695e 509
EricLew 0:80ee8f3b695e 510 HAL_StatusTypeDef HAL_DFSDM_ChannelPollForCkab(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t Timeout);
EricLew 0:80ee8f3b695e 511 HAL_StatusTypeDef HAL_DFSDM_ChannelPollForScd(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t Timeout);
EricLew 0:80ee8f3b695e 512
EricLew 0:80ee8f3b695e 513 void HAL_DFSDM_ChannelCkabCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
EricLew 0:80ee8f3b695e 514 void HAL_DFSDM_ChannelScdCallback(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
EricLew 0:80ee8f3b695e 515 /**
EricLew 0:80ee8f3b695e 516 * @}
EricLew 0:80ee8f3b695e 517 */
EricLew 0:80ee8f3b695e 518
EricLew 0:80ee8f3b695e 519 /** @defgroup DFSDM_Exported_Functions_Group3_Channel Channel state function
EricLew 0:80ee8f3b695e 520 * @{
EricLew 0:80ee8f3b695e 521 */
EricLew 0:80ee8f3b695e 522 /* Channel state function *****************************************************/
EricLew 0:80ee8f3b695e 523 HAL_DFSDM_Channel_StateTypeDef HAL_DFSDM_ChannelGetState(DFSDM_Channel_HandleTypeDef *hdfsdm_channel);
EricLew 0:80ee8f3b695e 524 /**
EricLew 0:80ee8f3b695e 525 * @}
EricLew 0:80ee8f3b695e 526 */
EricLew 0:80ee8f3b695e 527
EricLew 0:80ee8f3b695e 528 /** @addtogroup DFSDM_Exported_Functions_Group1_Filter Filter initialization and de-initialization functions
EricLew 0:80ee8f3b695e 529 * @{
EricLew 0:80ee8f3b695e 530 */
EricLew 0:80ee8f3b695e 531 /* Filter initialization and de-initialization functions *********************/
EricLew 0:80ee8f3b695e 532 HAL_StatusTypeDef HAL_DFSDM_FilterInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
EricLew 0:80ee8f3b695e 533 HAL_StatusTypeDef HAL_DFSDM_FilterDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
EricLew 0:80ee8f3b695e 534 void HAL_DFSDM_FilterMspInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
EricLew 0:80ee8f3b695e 535 void HAL_DFSDM_FilterMspDeInit(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
EricLew 0:80ee8f3b695e 536 /**
EricLew 0:80ee8f3b695e 537 * @}
EricLew 0:80ee8f3b695e 538 */
EricLew 0:80ee8f3b695e 539
EricLew 0:80ee8f3b695e 540 /** @addtogroup DFSDM_Exported_Functions_Group2_Filter Filter control functions
EricLew 0:80ee8f3b695e 541 * @{
EricLew 0:80ee8f3b695e 542 */
EricLew 0:80ee8f3b695e 543 /* Filter control functions *********************/
EricLew 0:80ee8f3b695e 544 HAL_StatusTypeDef HAL_DFSDM_FilterConfigRegChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
EricLew 0:80ee8f3b695e 545 uint32_t Channel,
EricLew 0:80ee8f3b695e 546 uint32_t ContinuousMode);
EricLew 0:80ee8f3b695e 547 HAL_StatusTypeDef HAL_DFSDM_FilterConfigInjChannel(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
EricLew 0:80ee8f3b695e 548 uint32_t Channel);
EricLew 0:80ee8f3b695e 549 /**
EricLew 0:80ee8f3b695e 550 * @}
EricLew 0:80ee8f3b695e 551 */
EricLew 0:80ee8f3b695e 552
EricLew 0:80ee8f3b695e 553 /** @addtogroup DFSDM_Exported_Functions_Group3_Filter Filter operation functions
EricLew 0:80ee8f3b695e 554 * @{
EricLew 0:80ee8f3b695e 555 */
EricLew 0:80ee8f3b695e 556 /* Filter operation functions *********************/
EricLew 0:80ee8f3b695e 557 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
EricLew 0:80ee8f3b695e 558 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
EricLew 0:80ee8f3b695e 559 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, int32_t *pData, uint32_t Length);
EricLew 0:80ee8f3b695e 560 HAL_StatusTypeDef HAL_DFSDM_FilterRegularMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, int16_t *pData, uint32_t Length);
EricLew 0:80ee8f3b695e 561 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
EricLew 0:80ee8f3b695e 562 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
EricLew 0:80ee8f3b695e 563 HAL_StatusTypeDef HAL_DFSDM_FilterRegularStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
EricLew 0:80ee8f3b695e 564 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
EricLew 0:80ee8f3b695e 565 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
EricLew 0:80ee8f3b695e 566 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, int32_t *pData, uint32_t Length);
EricLew 0:80ee8f3b695e 567 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedMsbStart_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, int16_t *pData, uint32_t Length);
EricLew 0:80ee8f3b695e 568 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
EricLew 0:80ee8f3b695e 569 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
EricLew 0:80ee8f3b695e 570 HAL_StatusTypeDef HAL_DFSDM_FilterInjectedStop_DMA(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
EricLew 0:80ee8f3b695e 571 HAL_StatusTypeDef HAL_DFSDM_FilterAwdStart_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter,
EricLew 0:80ee8f3b695e 572 DFSDM_Filter_AwdParamTypeDef* awdParam);
EricLew 0:80ee8f3b695e 573 HAL_StatusTypeDef HAL_DFSDM_FilterAwdStop_IT(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
EricLew 0:80ee8f3b695e 574 HAL_StatusTypeDef HAL_DFSDM_FilterExdStart(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Channel);
EricLew 0:80ee8f3b695e 575 HAL_StatusTypeDef HAL_DFSDM_FilterExdStop(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
EricLew 0:80ee8f3b695e 576
EricLew 0:80ee8f3b695e 577 int32_t HAL_DFSDM_FilterGetRegularValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t* Channel);
EricLew 0:80ee8f3b695e 578 int32_t HAL_DFSDM_FilterGetInjectedValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t* Channel);
EricLew 0:80ee8f3b695e 579 int32_t HAL_DFSDM_FilterGetExdMaxValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t* Channel);
EricLew 0:80ee8f3b695e 580 int32_t HAL_DFSDM_FilterGetExdMinValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t* Channel);
EricLew 0:80ee8f3b695e 581 uint32_t HAL_DFSDM_FilterGetConvTimeValue(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
EricLew 0:80ee8f3b695e 582
EricLew 0:80ee8f3b695e 583 void HAL_DFSDM_IRQHandler(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
EricLew 0:80ee8f3b695e 584
EricLew 0:80ee8f3b695e 585 HAL_StatusTypeDef HAL_DFSDM_FilterPollForRegConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Timeout);
EricLew 0:80ee8f3b695e 586 HAL_StatusTypeDef HAL_DFSDM_FilterPollForInjConversion(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Timeout);
EricLew 0:80ee8f3b695e 587
EricLew 0:80ee8f3b695e 588 void HAL_DFSDM_FilterRegConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
EricLew 0:80ee8f3b695e 589 void HAL_DFSDM_FilterRegConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
EricLew 0:80ee8f3b695e 590 void HAL_DFSDM_FilterInjConvCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
EricLew 0:80ee8f3b695e 591 void HAL_DFSDM_FilterInjConvHalfCpltCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
EricLew 0:80ee8f3b695e 592 void HAL_DFSDM_FilterAwdCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter, uint32_t Channel, uint32_t Threshold);
EricLew 0:80ee8f3b695e 593 void HAL_DFSDM_FilterErrorCallback(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
EricLew 0:80ee8f3b695e 594 /**
EricLew 0:80ee8f3b695e 595 * @}
EricLew 0:80ee8f3b695e 596 */
EricLew 0:80ee8f3b695e 597
EricLew 0:80ee8f3b695e 598 /** @defgroup DFSDM_Exported_Functions_Group4_Filter Filter state functions
EricLew 0:80ee8f3b695e 599 * @{
EricLew 0:80ee8f3b695e 600 */
EricLew 0:80ee8f3b695e 601 /* Filter state functions *****************************************************/
EricLew 0:80ee8f3b695e 602 HAL_DFSDM_Filter_StateTypeDef HAL_DFSDM_FilterGetState(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
EricLew 0:80ee8f3b695e 603 uint32_t HAL_DFSDM_FilterGetError(DFSDM_Filter_HandleTypeDef *hdfsdm_filter);
EricLew 0:80ee8f3b695e 604 /**
EricLew 0:80ee8f3b695e 605 * @}
EricLew 0:80ee8f3b695e 606 */
EricLew 0:80ee8f3b695e 607
EricLew 0:80ee8f3b695e 608 /**
EricLew 0:80ee8f3b695e 609 * @}
EricLew 0:80ee8f3b695e 610 */
EricLew 0:80ee8f3b695e 611 /* End of exported functions -------------------------------------------------*/
EricLew 0:80ee8f3b695e 612
EricLew 0:80ee8f3b695e 613 /* Private macros ------------------------------------------------------------*/
EricLew 0:80ee8f3b695e 614 /** @defgroup DFSDM_Private_Macros DFSDM Private Macros
EricLew 0:80ee8f3b695e 615 * @{
EricLew 0:80ee8f3b695e 616 */
EricLew 0:80ee8f3b695e 617 #define IS_DFSDM_CHANNEL_OUTPUT_CLOCK(CLOCK) (((CLOCK) == DFSDM_CHANNEL_OUTPUT_CLOCK_SYSTEM) || \
EricLew 0:80ee8f3b695e 618 ((CLOCK) == DFSDM_CHANNEL_OUTPUT_CLOCK_AUDIO))
EricLew 0:80ee8f3b695e 619 #define IS_DFSDM_CHANNEL_OUTPUT_CLOCK_DIVIDER(DIVIDER) ((2 <= (DIVIDER)) && ((DIVIDER) <= 256))
EricLew 0:80ee8f3b695e 620 #define IS_DFSDM_CHANNEL_INPUT(INPUT) (((INPUT) == DFSDM_CHANNEL_EXTERNAL_INPUTS) || \
EricLew 0:80ee8f3b695e 621 ((INPUT) == DFSDM_CHANNEL_INTERNAL_REGISTER))
EricLew 0:80ee8f3b695e 622 #define IS_DFSDM_CHANNEL_DATA_PACKING(MODE) (((MODE) == DFSDM_CHANNEL_STANDARD_MODE) || \
EricLew 0:80ee8f3b695e 623 ((MODE) == DFSDM_CHANNEL_INTERLEAVED_MODE) || \
EricLew 0:80ee8f3b695e 624 ((MODE) == DFSDM_CHANNEL_DUAL_MODE))
EricLew 0:80ee8f3b695e 625 #define IS_DFSDM_CHANNEL_INPUT_PINS(PINS) (((PINS) == DFSDM_CHANNEL_SAME_CHANNEL_PINS) || \
EricLew 0:80ee8f3b695e 626 ((PINS) == DFSDM_CHANNEL_FOLLOWING_CHANNEL_PINS))
EricLew 0:80ee8f3b695e 627 #define IS_DFSDM_CHANNEL_SERIAL_INTERFACE_TYPE(MODE) (((MODE) == DFSDM_CHANNEL_SPI_RISING) || \
EricLew 0:80ee8f3b695e 628 ((MODE) == DFSDM_CHANNEL_SPI_FALLING) || \
EricLew 0:80ee8f3b695e 629 ((MODE) == DFSDM_CHANNEL_MANCHESTER_RISING) || \
EricLew 0:80ee8f3b695e 630 ((MODE) == DFSDM_CHANNEL_MANCHESTER_FALLING))
EricLew 0:80ee8f3b695e 631 #define IS_DFSDM_CHANNEL_SPI_CLOCK(TYPE) (((TYPE) == DFSDM_CHANNEL_SPI_CLOCK_EXTERNAL) || \
EricLew 0:80ee8f3b695e 632 ((TYPE) == DFSDM_CHANNEL_SPI_CLOCK_INTERNAL) || \
EricLew 0:80ee8f3b695e 633 ((TYPE) == DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_FALLING) || \
EricLew 0:80ee8f3b695e 634 ((TYPE) == DFSDM_CHANNEL_SPI_CLOCK_INTERNAL_DIV2_RISING))
EricLew 0:80ee8f3b695e 635 #define IS_DFSDM_CHANNEL_FILTER_ORDER(ORDER) (((ORDER) == DFSDM_CHANNEL_FASTSINC_ORDER) || \
EricLew 0:80ee8f3b695e 636 ((ORDER) == DFSDM_CHANNEL_SINC1_ORDER) || \
EricLew 0:80ee8f3b695e 637 ((ORDER) == DFSDM_CHANNEL_SINC2_ORDER) || \
EricLew 0:80ee8f3b695e 638 ((ORDER) == DFSDM_CHANNEL_SINC3_ORDER))
EricLew 0:80ee8f3b695e 639 #define IS_DFSDM_CHANNEL_FILTER_OVS_RATIO(RATIO) ((1 <= (RATIO)) && ((RATIO) <= 32))
EricLew 0:80ee8f3b695e 640 #define IS_DFSDM_CHANNEL_OFFSET(VALUE) ((-8388608 <= (VALUE)) && ((VALUE) <= 8388607))
EricLew 0:80ee8f3b695e 641 #define IS_DFSDM_CHANNEL_RIGHT_BIT_SHIFT(VALUE) ((VALUE) <= 0x1F)
EricLew 0:80ee8f3b695e 642 #define IS_DFSDM_CHANNEL_SCD_THRESHOLD(VALUE) ((VALUE) <= 0xFF)
EricLew 0:80ee8f3b695e 643 #define IS_DFSDM_FILTER_REG_TRIGGER(TRIG) (((TRIG) == DFSDM_FILTER_SW_TRIGGER) || \
EricLew 0:80ee8f3b695e 644 ((TRIG) == DFSDM_FILTER_SYNC_TRIGGER))
EricLew 0:80ee8f3b695e 645 #define IS_DFSDM_FILTER_INJ_TRIGGER(TRIG) (((TRIG) == DFSDM_FILTER_SW_TRIGGER) || \
EricLew 0:80ee8f3b695e 646 ((TRIG) == DFSDM_FILTER_SYNC_TRIGGER) || \
EricLew 0:80ee8f3b695e 647 ((TRIG) == DFSDM_FILTER_EXT_TRIGGER))
EricLew 0:80ee8f3b695e 648 #define IS_DFSDM_FILTER_EXT_TRIG(TRIG) (((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM1_TRGO) || \
EricLew 0:80ee8f3b695e 649 ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM1_TRGO2) || \
EricLew 0:80ee8f3b695e 650 ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM8_TRGO) || \
EricLew 0:80ee8f3b695e 651 ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM8_TRGO2) || \
EricLew 0:80ee8f3b695e 652 ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM3_TRGO) || \
EricLew 0:80ee8f3b695e 653 ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM4_TRGO) || \
EricLew 0:80ee8f3b695e 654 ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM16_OC1) || \
EricLew 0:80ee8f3b695e 655 ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM6_TRGO) || \
EricLew 0:80ee8f3b695e 656 ((TRIG) == DFSDM_FILTER_EXT_TRIG_TIM7_TRGO) || \
EricLew 0:80ee8f3b695e 657 ((TRIG) == DFSDM_FILTER_EXT_TRIG_EXTI11) || \
EricLew 0:80ee8f3b695e 658 ((TRIG) == DFSDM_FILTER_EXT_TRIG_EXTI15))
EricLew 0:80ee8f3b695e 659 #define IS_DFSDM_FILTER_EXT_TRIG_EDGE(EDGE) (((EDGE) == DFSDM_FILTER_EXT_TRIG_RISING_EDGE) || \
EricLew 0:80ee8f3b695e 660 ((EDGE) == DFSDM_FILTER_EXT_TRIG_FALLING_EDGE) || \
EricLew 0:80ee8f3b695e 661 ((EDGE) == DFSDM_FILTER_EXT_TRIG_BOTH_EDGES))
EricLew 0:80ee8f3b695e 662 #define IS_DFSDM_FILTER_SINC_ORDER(ORDER) (((ORDER) == DFSDM_FILTER_FASTSINC_ORDER) || \
EricLew 0:80ee8f3b695e 663 ((ORDER) == DFSDM_FILTER_SINC1_ORDER) || \
EricLew 0:80ee8f3b695e 664 ((ORDER) == DFSDM_FILTER_SINC2_ORDER) || \
EricLew 0:80ee8f3b695e 665 ((ORDER) == DFSDM_FILTER_SINC3_ORDER) || \
EricLew 0:80ee8f3b695e 666 ((ORDER) == DFSDM_FILTER_SINC4_ORDER) || \
EricLew 0:80ee8f3b695e 667 ((ORDER) == DFSDM_FILTER_SINC5_ORDER))
EricLew 0:80ee8f3b695e 668 #define IS_DFSDM_FILTER_OVS_RATIO(RATIO) ((1 <= (RATIO)) && ((RATIO) <= 1024))
EricLew 0:80ee8f3b695e 669 #define IS_DFSDM_FILTER_INTEGRATOR_OVS_RATIO(RATIO) ((1 <= (RATIO)) && ((RATIO) <= 256))
EricLew 0:80ee8f3b695e 670 #define IS_DFSDM_FILTER_AWD_DATA_SOURCE(DATA) (((DATA) == DFSDM_FILTER_AWD_FILTER_DATA) || \
EricLew 0:80ee8f3b695e 671 ((DATA) == DFSDM_FILTER_AWD_CHANNEL_DATA))
EricLew 0:80ee8f3b695e 672 #define IS_DFSDM_FILTER_AWD_THRESHOLD(VALUE) ((-8388608 <= (VALUE)) && ((VALUE) <= 8388607))
EricLew 0:80ee8f3b695e 673 #define IS_DFSDM_BREAK_SIGNALS(VALUE) ((VALUE) <= 0xF)
EricLew 0:80ee8f3b695e 674 #define IS_DFSDM_REGULAR_CHANNEL(CHANNEL) (((CHANNEL) == DFSDM_CHANNEL_0) || \
EricLew 0:80ee8f3b695e 675 ((CHANNEL) == DFSDM_CHANNEL_1) || \
EricLew 0:80ee8f3b695e 676 ((CHANNEL) == DFSDM_CHANNEL_2) || \
EricLew 0:80ee8f3b695e 677 ((CHANNEL) == DFSDM_CHANNEL_3) || \
EricLew 0:80ee8f3b695e 678 ((CHANNEL) == DFSDM_CHANNEL_4) || \
EricLew 0:80ee8f3b695e 679 ((CHANNEL) == DFSDM_CHANNEL_5) || \
EricLew 0:80ee8f3b695e 680 ((CHANNEL) == DFSDM_CHANNEL_6) || \
EricLew 0:80ee8f3b695e 681 ((CHANNEL) == DFSDM_CHANNEL_7))
EricLew 0:80ee8f3b695e 682 #define IS_DFSDM_INJECTED_CHANNEL(CHANNEL) (((CHANNEL) != 0) && ((CHANNEL) <= 0x000F00FF))
EricLew 0:80ee8f3b695e 683 #define IS_DFSDM_CONTINUOUS_MODE(MODE) (((MODE) == DFSDM_CONTINUOUS_CONV_OFF) || \
EricLew 0:80ee8f3b695e 684 ((MODE) == DFSDM_CONTINUOUS_CONV_ON))
EricLew 0:80ee8f3b695e 685 /**
EricLew 0:80ee8f3b695e 686 * @}
EricLew 0:80ee8f3b695e 687 */
EricLew 0:80ee8f3b695e 688 /* End of private macros -----------------------------------------------------*/
EricLew 0:80ee8f3b695e 689
EricLew 0:80ee8f3b695e 690 /**
EricLew 0:80ee8f3b695e 691 * @}
EricLew 0:80ee8f3b695e 692 */
EricLew 0:80ee8f3b695e 693
EricLew 0:80ee8f3b695e 694 /**
EricLew 0:80ee8f3b695e 695 * @}
EricLew 0:80ee8f3b695e 696 */
EricLew 0:80ee8f3b695e 697
EricLew 0:80ee8f3b695e 698 #ifdef __cplusplus
EricLew 0:80ee8f3b695e 699 }
EricLew 0:80ee8f3b695e 700 #endif
EricLew 0:80ee8f3b695e 701
EricLew 0:80ee8f3b695e 702 #endif /* __STM32L4xx_HAL_DFSDM_H */
EricLew 0:80ee8f3b695e 703
EricLew 0:80ee8f3b695e 704 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
EricLew 0:80ee8f3b695e 705