STM32L4xx_HAL_Driver - Hal Drivers for L4

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Hal Drivers for L4

Dependents: BSP OneHopeOnePrayer FINAL_AUDIO_RECORD AudioDemo

Fork of STM32L4xx_HAL_Driver by Senior Design: Sound Monitor

Inc/stm32_hal_legacy.h@2:7aef7655b0a8, 2015-11-25 (annotated)

Committer:: EricLew
Date:: Wed Nov 25 17:30:43 2015 +0000
Revision:: 2:7aef7655b0a8
Parent:: 0:80ee8f3b695e

commit;

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User	Revision	Line number	New contents of line
EricLew	0:80ee8f3b695e	1	/**
EricLew	0:80ee8f3b695e	2	******************************************************************************
EricLew	0:80ee8f3b695e	3	* @file stm32_hal_legacy.h
EricLew	0:80ee8f3b695e	4	* @author MCD Application Team
EricLew	0:80ee8f3b695e	5	* @version V1.1.0
EricLew	0:80ee8f3b695e	6	* @date 16-September-2015
EricLew	0:80ee8f3b695e	7	* @brief This file contains aliases definition for the STM32Cube HAL constants
EricLew	0:80ee8f3b695e	8	* macros and functions maintained for legacy purpose.
EricLew	0:80ee8f3b695e	9	******************************************************************************
EricLew	0:80ee8f3b695e	10	* @attention
EricLew	0:80ee8f3b695e	11	*
EricLew	0:80ee8f3b695e	12	* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
EricLew	0:80ee8f3b695e	13	*
EricLew	0:80ee8f3b695e	14	* Redistribution and use in source and binary forms, with or without modification,
EricLew	0:80ee8f3b695e	15	* are permitted provided that the following conditions are met:
EricLew	0:80ee8f3b695e	16	* 1. Redistributions of source code must retain the above copyright notice,
EricLew	0:80ee8f3b695e	17	* this list of conditions and the following disclaimer.
EricLew	0:80ee8f3b695e	18	* 2. Redistributions in binary form must reproduce the above copyright notice,
EricLew	0:80ee8f3b695e	19	* this list of conditions and the following disclaimer in the documentation
EricLew	0:80ee8f3b695e	20	* and/or other materials provided with the distribution.
EricLew	0:80ee8f3b695e	21	* 3. Neither the name of STMicroelectronics nor the names of its contributors
EricLew	0:80ee8f3b695e	22	* may be used to endorse or promote products derived from this software
EricLew	0:80ee8f3b695e	23	* without specific prior written permission.
EricLew	0:80ee8f3b695e	24	*
EricLew	0:80ee8f3b695e	25	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
EricLew	0:80ee8f3b695e	26	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
EricLew	0:80ee8f3b695e	27	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
EricLew	0:80ee8f3b695e	28	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
EricLew	0:80ee8f3b695e	29	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
EricLew	0:80ee8f3b695e	30	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
EricLew	0:80ee8f3b695e	31	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
EricLew	0:80ee8f3b695e	32	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
EricLew	0:80ee8f3b695e	33	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
EricLew	0:80ee8f3b695e	34	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
EricLew	0:80ee8f3b695e	35	*
EricLew	0:80ee8f3b695e	36	******************************************************************************
EricLew	0:80ee8f3b695e	37	*/
EricLew	0:80ee8f3b695e	38
EricLew	0:80ee8f3b695e	39	/* Define to prevent recursive inclusion -------------------------------------*/
EricLew	0:80ee8f3b695e	40	#ifndef __STM32_HAL_LEGACY
EricLew	0:80ee8f3b695e	41	#define __STM32_HAL_LEGACY
EricLew	0:80ee8f3b695e	42
EricLew	0:80ee8f3b695e	43	#ifdef __cplusplus
EricLew	0:80ee8f3b695e	44	extern "C" {
EricLew	0:80ee8f3b695e	45	#endif
EricLew	0:80ee8f3b695e	46
EricLew	0:80ee8f3b695e	47	/* Includes ------------------------------------------------------------------*/
EricLew	0:80ee8f3b695e	48	/* Exported types ------------------------------------------------------------*/
EricLew	0:80ee8f3b695e	49	/* Exported constants --------------------------------------------------------*/
EricLew	0:80ee8f3b695e	50
EricLew	0:80ee8f3b695e	51	/** @defgroup HAL_AES_Aliased_Defines HAL CRYP Aliased Defines maintained for legacy purpose
EricLew	0:80ee8f3b695e	52	* @{
EricLew	0:80ee8f3b695e	53	*/
EricLew	0:80ee8f3b695e	54	#define AES_FLAG_RDERR CRYP_FLAG_RDERR
EricLew	0:80ee8f3b695e	55	#define AES_FLAG_WRERR CRYP_FLAG_WRERR
EricLew	0:80ee8f3b695e	56	#define AES_CLEARFLAG_CCF CRYP_CLEARFLAG_CCF
EricLew	0:80ee8f3b695e	57	#define AES_CLEARFLAG_RDERR CRYP_CLEARFLAG_RDERR
EricLew	0:80ee8f3b695e	58	#define AES_CLEARFLAG_WRERR CRYP_CLEARFLAG_WRERR
EricLew	0:80ee8f3b695e	59
EricLew	0:80ee8f3b695e	60	/**
EricLew	0:80ee8f3b695e	61	* @}
EricLew	0:80ee8f3b695e	62	*/
EricLew	0:80ee8f3b695e	63
EricLew	0:80ee8f3b695e	64	/** @defgroup HAL_ADC_Aliased_Defines HAL ADC Aliased Defines maintained for legacy purpose
EricLew	0:80ee8f3b695e	65	* @{
EricLew	0:80ee8f3b695e	66	*/
EricLew	0:80ee8f3b695e	67	#define ADC_RESOLUTION12b ADC_RESOLUTION_12B
EricLew	0:80ee8f3b695e	68	#define ADC_RESOLUTION10b ADC_RESOLUTION_10B
EricLew	0:80ee8f3b695e	69	#define ADC_RESOLUTION8b ADC_RESOLUTION_8B
EricLew	0:80ee8f3b695e	70	#define ADC_RESOLUTION6b ADC_RESOLUTION_6B
EricLew	0:80ee8f3b695e	71	#define OVR_DATA_OVERWRITTEN ADC_OVR_DATA_OVERWRITTEN
EricLew	0:80ee8f3b695e	72	#define OVR_DATA_PRESERVED ADC_OVR_DATA_PRESERVED
EricLew	0:80ee8f3b695e	73	#define EOC_SINGLE_CONV ADC_EOC_SINGLE_CONV
EricLew	0:80ee8f3b695e	74	#define EOC_SEQ_CONV ADC_EOC_SEQ_CONV
EricLew	0:80ee8f3b695e	75	#define EOC_SINGLE_SEQ_CONV ADC_EOC_SINGLE_SEQ_CONV
EricLew	0:80ee8f3b695e	76	#define REGULAR_GROUP ADC_REGULAR_GROUP
EricLew	0:80ee8f3b695e	77	#define INJECTED_GROUP ADC_INJECTED_GROUP
EricLew	0:80ee8f3b695e	78	#define REGULAR_INJECTED_GROUP ADC_REGULAR_INJECTED_GROUP
EricLew	0:80ee8f3b695e	79	#define AWD_EVENT ADC_AWD_EVENT
EricLew	0:80ee8f3b695e	80	#define AWD1_EVENT ADC_AWD1_EVENT
EricLew	0:80ee8f3b695e	81	#define AWD2_EVENT ADC_AWD2_EVENT
EricLew	0:80ee8f3b695e	82	#define AWD3_EVENT ADC_AWD3_EVENT
EricLew	0:80ee8f3b695e	83	#define OVR_EVENT ADC_OVR_EVENT
EricLew	0:80ee8f3b695e	84	#define JQOVF_EVENT ADC_JQOVF_EVENT
EricLew	0:80ee8f3b695e	85	#define ALL_CHANNELS ADC_ALL_CHANNELS
EricLew	0:80ee8f3b695e	86	#define REGULAR_CHANNELS ADC_REGULAR_CHANNELS
EricLew	0:80ee8f3b695e	87	#define INJECTED_CHANNELS ADC_INJECTED_CHANNELS
EricLew	0:80ee8f3b695e	88	#define SYSCFG_FLAG_SENSOR_ADC ADC_FLAG_SENSOR
EricLew	0:80ee8f3b695e	89	#define SYSCFG_FLAG_VREF_ADC ADC_FLAG_VREFINT
EricLew	0:80ee8f3b695e	90	#define ADC_CLOCKPRESCALER_PCLK_DIV1 ADC_CLOCK_SYNC_PCLK_DIV1
EricLew	0:80ee8f3b695e	91	#define ADC_CLOCKPRESCALER_PCLK_DIV2 ADC_CLOCK_SYNC_PCLK_DIV2
EricLew	0:80ee8f3b695e	92	#define ADC_CLOCKPRESCALER_PCLK_DIV4 ADC_CLOCK_SYNC_PCLK_DIV4
EricLew	0:80ee8f3b695e	93	#define ADC_CLOCKPRESCALER_PCLK_DIV6 ADC_CLOCK_SYNC_PCLK_DIV6
EricLew	0:80ee8f3b695e	94	#define ADC_CLOCKPRESCALER_PCLK_DIV8 ADC_CLOCK_SYNC_PCLK_DIV8
EricLew	0:80ee8f3b695e	95	#define ADC_EXTERNALTRIG0_T6_TRGO ADC_EXTERNALTRIGCONV_T6_TRGO
EricLew	0:80ee8f3b695e	96	#define ADC_EXTERNALTRIG1_T21_CC2 ADC_EXTERNALTRIGCONV_T21_CC2
EricLew	0:80ee8f3b695e	97	#define ADC_EXTERNALTRIG2_T2_TRGO ADC_EXTERNALTRIGCONV_T2_TRGO
EricLew	0:80ee8f3b695e	98	#define ADC_EXTERNALTRIG3_T2_CC4 ADC_EXTERNALTRIGCONV_T2_CC4
EricLew	0:80ee8f3b695e	99	#define ADC_EXTERNALTRIG4_T22_TRGO ADC_EXTERNALTRIGCONV_T22_TRGO
EricLew	0:80ee8f3b695e	100	#define ADC_EXTERNALTRIG7_EXT_IT11 ADC_EXTERNALTRIGCONV_EXT_IT11
EricLew	0:80ee8f3b695e	101	#define ADC_CLOCK_ASYNC ADC_CLOCK_ASYNC_DIV1
EricLew	0:80ee8f3b695e	102	#define ADC_EXTERNALTRIG_EDGE_NONE ADC_EXTERNALTRIGCONVEDGE_NONE
EricLew	0:80ee8f3b695e	103	#define ADC_EXTERNALTRIG_EDGE_RISING ADC_EXTERNALTRIGCONVEDGE_RISING
EricLew	0:80ee8f3b695e	104	#define ADC_EXTERNALTRIG_EDGE_FALLING ADC_EXTERNALTRIGCONVEDGE_FALLING
EricLew	0:80ee8f3b695e	105	#define ADC_EXTERNALTRIG_EDGE_RISINGFALLING ADC_EXTERNALTRIGCONVEDGE_RISINGFALLING
EricLew	0:80ee8f3b695e	106
EricLew	0:80ee8f3b695e	107	#define HAL_ADC_STATE_BUSY_REG HAL_ADC_STATE_REG_BUSY
EricLew	0:80ee8f3b695e	108	#define HAL_ADC_STATE_BUSY_INJ HAL_ADC_STATE_INJ_BUSY
EricLew	0:80ee8f3b695e	109	#define HAL_ADC_STATE_EOC_REG HAL_ADC_STATE_REG_EOC
EricLew	0:80ee8f3b695e	110	#define HAL_ADC_STATE_EOC_INJ HAL_ADC_STATE_INJ_EOC
EricLew	0:80ee8f3b695e	111	#define HAL_ADC_STATE_ERROR HAL_ADC_STATE_ERROR_INTERNAL
EricLew	0:80ee8f3b695e	112	#define HAL_ADC_STATE_BUSY HAL_ADC_STATE_BUSY_INTERNAL
EricLew	0:80ee8f3b695e	113	#define HAL_ADC_STATE_AWD HAL_ADC_STATE_AWD1
EricLew	0:80ee8f3b695e	114	/**
EricLew	0:80ee8f3b695e	115	* @}
EricLew	0:80ee8f3b695e	116	*/
EricLew	0:80ee8f3b695e	117
EricLew	0:80ee8f3b695e	118	/** @defgroup HAL_CEC_Aliased_Defines HAL CEC Aliased Defines maintained for legacy purpose
EricLew	0:80ee8f3b695e	119	* @{
EricLew	0:80ee8f3b695e	120	*/
EricLew	0:80ee8f3b695e	121
EricLew	0:80ee8f3b695e	122	#define __HAL_CEC_GET_IT __HAL_CEC_GET_FLAG
EricLew	0:80ee8f3b695e	123
EricLew	0:80ee8f3b695e	124	/**
EricLew	0:80ee8f3b695e	125	* @}
EricLew	0:80ee8f3b695e	126	*/
EricLew	0:80ee8f3b695e	127
EricLew	0:80ee8f3b695e	128	/** @defgroup HAL_COMP_Aliased_Defines HAL COMP Aliased Defines maintained for legacy purpose
EricLew	0:80ee8f3b695e	129	* @{
EricLew	0:80ee8f3b695e	130	*/
EricLew	0:80ee8f3b695e	131
EricLew	0:80ee8f3b695e	132	#define COMP_WINDOWMODE_DISABLED COMP_WINDOWMODE_DISABLE
EricLew	0:80ee8f3b695e	133	#define COMP_WINDOWMODE_ENABLED COMP_WINDOWMODE_ENABLE
EricLew	0:80ee8f3b695e	134	#define COMP_EXTI_LINE_COMP1_EVENT COMP_EXTI_LINE_COMP1
EricLew	0:80ee8f3b695e	135	#define COMP_EXTI_LINE_COMP2_EVENT COMP_EXTI_LINE_COMP2
EricLew	0:80ee8f3b695e	136	#define COMP_EXTI_LINE_COMP3_EVENT COMP_EXTI_LINE_COMP3
EricLew	0:80ee8f3b695e	137	#define COMP_EXTI_LINE_COMP4_EVENT COMP_EXTI_LINE_COMP4
EricLew	0:80ee8f3b695e	138	#define COMP_EXTI_LINE_COMP5_EVENT COMP_EXTI_LINE_COMP5
EricLew	0:80ee8f3b695e	139	#define COMP_EXTI_LINE_COMP6_EVENT COMP_EXTI_LINE_COMP6
EricLew	0:80ee8f3b695e	140	#define COMP_EXTI_LINE_COMP7_EVENT COMP_EXTI_LINE_COMP7
EricLew	0:80ee8f3b695e	141	#define COMP_OUTPUT_COMP6TIM2OCREFCLR COMP_OUTPUT_COMP6_TIM2OCREFCLR
EricLew	0:80ee8f3b695e	142	#if defined(STM32F373xC) \|\| defined(STM32F378xx)
EricLew	0:80ee8f3b695e	143	#define COMP_OUTPUT_TIM3IC1 COMP_OUTPUT_COMP1_TIM3IC1
EricLew	0:80ee8f3b695e	144	#define COMP_OUTPUT_TIM3OCREFCLR COMP_OUTPUT_COMP1_TIM3OCREFCLR
EricLew	0:80ee8f3b695e	145	#endif /* STM32F373xC \|\| STM32F378xx */
EricLew	0:80ee8f3b695e	146	/**
EricLew	0:80ee8f3b695e	147	* @}
EricLew	0:80ee8f3b695e	148	*/
EricLew	0:80ee8f3b695e	149
EricLew	0:80ee8f3b695e	150	/** @defgroup HAL_CRC_Aliased_Defines HAL CRC Aliased Defines maintained for legacy purpose
EricLew	0:80ee8f3b695e	151	* @{
EricLew	0:80ee8f3b695e	152	*/
EricLew	0:80ee8f3b695e	153
EricLew	0:80ee8f3b695e	154	#define CRC_OUTPUTDATA_INVERSION_DISABLED CRC_OUTPUTDATA_INVERSION_DISABLE
EricLew	0:80ee8f3b695e	155	#define CRC_OUTPUTDATA_INVERSION_ENABLED CRC_OUTPUTDATA_INVERSION_ENABLE
EricLew	0:80ee8f3b695e	156
EricLew	0:80ee8f3b695e	157	/**
EricLew	0:80ee8f3b695e	158	* @}
EricLew	0:80ee8f3b695e	159	*/
EricLew	0:80ee8f3b695e	160
EricLew	0:80ee8f3b695e	161	/** @defgroup HAL_DAC_Aliased_Defines HAL DAC Aliased Defines maintained for legacy purpose
EricLew	0:80ee8f3b695e	162	* @{
EricLew	0:80ee8f3b695e	163	*/
EricLew	0:80ee8f3b695e	164
EricLew	0:80ee8f3b695e	165	#define DAC1_CHANNEL_1 DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	166	#define DAC1_CHANNEL_2 DAC_CHANNEL_2
EricLew	0:80ee8f3b695e	167	#define DAC2_CHANNEL_1 DAC_CHANNEL_1
EricLew	0:80ee8f3b695e	168	#define DAC_WAVE_NONE ((uint32_t)0x00000000)
EricLew	0:80ee8f3b695e	169	#define DAC_WAVE_NOISE ((uint32_t)DAC_CR_WAVE1_0)
EricLew	0:80ee8f3b695e	170	#define DAC_WAVE_TRIANGLE ((uint32_t)DAC_CR_WAVE1_1)
EricLew	0:80ee8f3b695e	171	#define DAC_WAVEGENERATION_NONE DAC_WAVE_NONE
EricLew	0:80ee8f3b695e	172	#define DAC_WAVEGENERATION_NOISE DAC_WAVE_NOISE
EricLew	0:80ee8f3b695e	173	#define DAC_WAVEGENERATION_TRIANGLE DAC_WAVE_TRIANGLE
EricLew	0:80ee8f3b695e	174
EricLew	0:80ee8f3b695e	175	/**
EricLew	0:80ee8f3b695e	176	* @}
EricLew	0:80ee8f3b695e	177	*/
EricLew	0:80ee8f3b695e	178
EricLew	0:80ee8f3b695e	179	/** @defgroup HAL_DMA_Aliased_Defines HAL DMA Aliased Defines maintained for legacy purpose
EricLew	0:80ee8f3b695e	180	* @{
EricLew	0:80ee8f3b695e	181	*/
EricLew	0:80ee8f3b695e	182	#define HAL_REMAPDMA_ADC_DMA_CH2 DMA_REMAP_ADC_DMA_CH2
EricLew	0:80ee8f3b695e	183	#define HAL_REMAPDMA_USART1_TX_DMA_CH4 DMA_REMAP_USART1_TX_DMA_CH4
EricLew	0:80ee8f3b695e	184	#define HAL_REMAPDMA_USART1_RX_DMA_CH5 DMA_REMAP_USART1_RX_DMA_CH5
EricLew	0:80ee8f3b695e	185	#define HAL_REMAPDMA_TIM16_DMA_CH4 DMA_REMAP_TIM16_DMA_CH4
EricLew	0:80ee8f3b695e	186	#define HAL_REMAPDMA_TIM17_DMA_CH2 DMA_REMAP_TIM17_DMA_CH2
EricLew	0:80ee8f3b695e	187	#define HAL_REMAPDMA_USART3_DMA_CH32 DMA_REMAP_USART3_DMA_CH32
EricLew	0:80ee8f3b695e	188	#define HAL_REMAPDMA_TIM16_DMA_CH6 DMA_REMAP_TIM16_DMA_CH6
EricLew	0:80ee8f3b695e	189	#define HAL_REMAPDMA_TIM17_DMA_CH7 DMA_REMAP_TIM17_DMA_CH7
EricLew	0:80ee8f3b695e	190	#define HAL_REMAPDMA_SPI2_DMA_CH67 DMA_REMAP_SPI2_DMA_CH67
EricLew	0:80ee8f3b695e	191	#define HAL_REMAPDMA_USART2_DMA_CH67 DMA_REMAP_USART2_DMA_CH67
EricLew	0:80ee8f3b695e	192	#define HAL_REMAPDMA_USART3_DMA_CH32 DMA_REMAP_USART3_DMA_CH32
EricLew	0:80ee8f3b695e	193	#define HAL_REMAPDMA_I2C1_DMA_CH76 DMA_REMAP_I2C1_DMA_CH76
EricLew	0:80ee8f3b695e	194	#define HAL_REMAPDMA_TIM1_DMA_CH6 DMA_REMAP_TIM1_DMA_CH6
EricLew	0:80ee8f3b695e	195	#define HAL_REMAPDMA_TIM2_DMA_CH7 DMA_REMAP_TIM2_DMA_CH7
EricLew	0:80ee8f3b695e	196	#define HAL_REMAPDMA_TIM3_DMA_CH6 DMA_REMAP_TIM3_DMA_CH6
EricLew	0:80ee8f3b695e	197
EricLew	0:80ee8f3b695e	198	#define IS_HAL_REMAPDMA IS_DMA_REMAP
EricLew	0:80ee8f3b695e	199	#define __HAL_REMAPDMA_CHANNEL_ENABLE __HAL_DMA_REMAP_CHANNEL_ENABLE
EricLew	0:80ee8f3b695e	200	#define __HAL_REMAPDMA_CHANNEL_DISABLE __HAL_DMA_REMAP_CHANNEL_DISABLE
EricLew	0:80ee8f3b695e	201
EricLew	0:80ee8f3b695e	202
EricLew	0:80ee8f3b695e	203
EricLew	0:80ee8f3b695e	204	/**
EricLew	0:80ee8f3b695e	205	* @}
EricLew	0:80ee8f3b695e	206	*/
EricLew	0:80ee8f3b695e	207
EricLew	0:80ee8f3b695e	208	/** @defgroup HAL_FLASH_Aliased_Defines HAL FLASH Aliased Defines maintained for legacy purpose
EricLew	0:80ee8f3b695e	209	* @{
EricLew	0:80ee8f3b695e	210	*/
EricLew	0:80ee8f3b695e	211
EricLew	0:80ee8f3b695e	212	#define TYPEPROGRAM_BYTE FLASH_TYPEPROGRAM_BYTE
EricLew	0:80ee8f3b695e	213	#define TYPEPROGRAM_HALFWORD FLASH_TYPEPROGRAM_HALFWORD
EricLew	0:80ee8f3b695e	214	#define TYPEPROGRAM_WORD FLASH_TYPEPROGRAM_WORD
EricLew	0:80ee8f3b695e	215	#define TYPEPROGRAM_DOUBLEWORD FLASH_TYPEPROGRAM_DOUBLEWORD
EricLew	0:80ee8f3b695e	216	#define TYPEERASE_SECTORS FLASH_TYPEERASE_SECTORS
EricLew	0:80ee8f3b695e	217	#define TYPEERASE_PAGES FLASH_TYPEERASE_PAGES
EricLew	0:80ee8f3b695e	218	#define TYPEERASE_PAGEERASE FLASH_TYPEERASE_PAGES
EricLew	0:80ee8f3b695e	219	#define TYPEERASE_MASSERASE FLASH_TYPEERASE_MASSERASE
EricLew	0:80ee8f3b695e	220	#define WRPSTATE_DISABLE OB_WRPSTATE_DISABLE
EricLew	0:80ee8f3b695e	221	#define WRPSTATE_ENABLE OB_WRPSTATE_ENABLE
EricLew	0:80ee8f3b695e	222	#define HAL_FLASH_TIMEOUT_VALUE FLASH_TIMEOUT_VALUE
EricLew	0:80ee8f3b695e	223	#define OBEX_PCROP OPTIONBYTE_PCROP
EricLew	0:80ee8f3b695e	224	#define OBEX_BOOTCONFIG OPTIONBYTE_BOOTCONFIG
EricLew	0:80ee8f3b695e	225	#define PCROPSTATE_DISABLE OB_PCROP_STATE_DISABLE
EricLew	0:80ee8f3b695e	226	#define PCROPSTATE_ENABLE OB_PCROP_STATE_ENABLE
EricLew	0:80ee8f3b695e	227	#define TYPEERASEDATA_BYTE FLASH_TYPEERASEDATA_BYTE
EricLew	0:80ee8f3b695e	228	#define TYPEERASEDATA_HALFWORD FLASH_TYPEERASEDATA_HALFWORD
EricLew	0:80ee8f3b695e	229	#define TYPEERASEDATA_WORD FLASH_TYPEERASEDATA_WORD
EricLew	0:80ee8f3b695e	230	#define TYPEPROGRAMDATA_BYTE FLASH_TYPEPROGRAMDATA_BYTE
EricLew	0:80ee8f3b695e	231	#define TYPEPROGRAMDATA_HALFWORD FLASH_TYPEPROGRAMDATA_HALFWORD
EricLew	0:80ee8f3b695e	232	#define TYPEPROGRAMDATA_WORD FLASH_TYPEPROGRAMDATA_WORD
EricLew	0:80ee8f3b695e	233	#define TYPEPROGRAMDATA_FASTBYTE FLASH_TYPEPROGRAMDATA_FASTBYTE
EricLew	0:80ee8f3b695e	234	#define TYPEPROGRAMDATA_FASTHALFWORD FLASH_TYPEPROGRAMDATA_FASTHALFWORD
EricLew	0:80ee8f3b695e	235	#define TYPEPROGRAMDATA_FASTWORD FLASH_TYPEPROGRAMDATA_FASTWORD
EricLew	0:80ee8f3b695e	236	#define PAGESIZE FLASH_PAGE_SIZE
EricLew	0:80ee8f3b695e	237	#define TYPEPROGRAM_FASTBYTE FLASH_TYPEPROGRAM_BYTE
EricLew	0:80ee8f3b695e	238	#define TYPEPROGRAM_FASTHALFWORD FLASH_TYPEPROGRAM_HALFWORD
EricLew	0:80ee8f3b695e	239	#define TYPEPROGRAM_FASTWORD FLASH_TYPEPROGRAM_WORD
EricLew	0:80ee8f3b695e	240	#define VOLTAGE_RANGE_1 FLASH_VOLTAGE_RANGE_1
EricLew	0:80ee8f3b695e	241	#define VOLTAGE_RANGE_2 FLASH_VOLTAGE_RANGE_2
EricLew	0:80ee8f3b695e	242	#define VOLTAGE_RANGE_3 FLASH_VOLTAGE_RANGE_3
EricLew	0:80ee8f3b695e	243	#define VOLTAGE_RANGE_4 FLASH_VOLTAGE_RANGE_4
EricLew	0:80ee8f3b695e	244	#define TYPEPROGRAM_FAST FLASH_TYPEPROGRAM_FAST
EricLew	0:80ee8f3b695e	245	#define TYPEPROGRAM_FAST_AND_LAST FLASH_TYPEPROGRAM_FAST_AND_LAST
EricLew	0:80ee8f3b695e	246	#define WRPAREA_BANK1_AREAA OB_WRPAREA_BANK1_AREAA
EricLew	0:80ee8f3b695e	247	#define WRPAREA_BANK1_AREAB OB_WRPAREA_BANK1_AREAB
EricLew	0:80ee8f3b695e	248	#define WRPAREA_BANK2_AREAA OB_WRPAREA_BANK2_AREAA
EricLew	0:80ee8f3b695e	249	#define WRPAREA_BANK2_AREAB OB_WRPAREA_BANK2_AREAB
EricLew	0:80ee8f3b695e	250	#define IWDG_STDBY_FREEZE OB_IWDG_STDBY_FREEZE
EricLew	0:80ee8f3b695e	251	#define IWDG_STDBY_ACTIVE OB_IWDG_STDBY_RUN
EricLew	0:80ee8f3b695e	252	#define IWDG_STOP_FREEZE OB_IWDG_STOP_FREEZE
EricLew	0:80ee8f3b695e	253	#define IWDG_STOP_ACTIVE OB_IWDG_STOP_RUN
EricLew	0:80ee8f3b695e	254	#define FLASH_ERROR_NONE HAL_FLASH_ERROR_NONE
EricLew	0:80ee8f3b695e	255	#define FLASH_ERROR_RD HAL_FLASH_ERROR_RD
EricLew	0:80ee8f3b695e	256	#define FLASH_ERROR_PG HAL_FLASH_ERROR_PROG
EricLew	0:80ee8f3b695e	257	#define FLASH_ERROR_PGP HAL_FLASH_ERROR_PGS
EricLew	0:80ee8f3b695e	258	#define FLASH_ERROR_WRP HAL_FLASH_ERROR_WRP
EricLew	0:80ee8f3b695e	259	#define FLASH_ERROR_OPTV HAL_FLASH_ERROR_OPTV
EricLew	0:80ee8f3b695e	260	#define FLASH_ERROR_OPTVUSR HAL_FLASH_ERROR_OPTVUSR
EricLew	0:80ee8f3b695e	261	#define FLASH_ERROR_PROG HAL_FLASH_ERROR_PROG
EricLew	0:80ee8f3b695e	262	#define FLASH_ERROR_OP HAL_FLASH_ERROR_OPERATION
EricLew	0:80ee8f3b695e	263	#define FLASH_ERROR_PGA HAL_FLASH_ERROR_PGA
EricLew	0:80ee8f3b695e	264	#define FLASH_ERROR_SIZE HAL_FLASH_ERROR_SIZE
EricLew	0:80ee8f3b695e	265	#define FLASH_ERROR_SIZ HAL_FLASH_ERROR_SIZE
EricLew	0:80ee8f3b695e	266	#define FLASH_ERROR_PGS HAL_FLASH_ERROR_PGS
EricLew	0:80ee8f3b695e	267	#define FLASH_ERROR_MIS HAL_FLASH_ERROR_MIS
EricLew	0:80ee8f3b695e	268	#define FLASH_ERROR_FAST HAL_FLASH_ERROR_FAST
EricLew	0:80ee8f3b695e	269	#define FLASH_ERROR_FWWERR HAL_FLASH_ERROR_FWWERR
EricLew	0:80ee8f3b695e	270	#define FLASH_ERROR_NOTZERO HAL_FLASH_ERROR_NOTZERO
EricLew	0:80ee8f3b695e	271	#define FLASH_ERROR_OPERATION HAL_FLASH_ERROR_OPERATION
EricLew	0:80ee8f3b695e	272	#define FLASH_ERROR_ERS HAL_FLASH_ERROR_ERS
EricLew	0:80ee8f3b695e	273	#define OB_WDG_SW OB_IWDG_SW
EricLew	0:80ee8f3b695e	274	#define OB_WDG_HW OB_IWDG_HW
EricLew	0:80ee8f3b695e	275	#define OB_SDADC12_VDD_MONITOR_SET OB_SDACD_VDD_MONITOR_SET
EricLew	0:80ee8f3b695e	276	#define OB_SDADC12_VDD_MONITOR_RESET OB_SDACD_VDD_MONITOR_RESET
EricLew	0:80ee8f3b695e	277	#define OB_RAM_PARITY_CHECK_SET OB_SRAM_PARITY_SET
EricLew	0:80ee8f3b695e	278	#define OB_RAM_PARITY_CHECK_RESET OB_SRAM_PARITY_RESET
EricLew	0:80ee8f3b695e	279	#define IS_OB_SDADC12_VDD_MONITOR IS_OB_SDACD_VDD_MONITOR
EricLew	0:80ee8f3b695e	280	#define OB_RDP_LEVEL0 OB_RDP_LEVEL_0
EricLew	0:80ee8f3b695e	281	#define OB_RDP_LEVEL1 OB_RDP_LEVEL_1
EricLew	0:80ee8f3b695e	282	#define OB_RDP_LEVEL2 OB_RDP_LEVEL_2
EricLew	0:80ee8f3b695e	283	/**
EricLew	0:80ee8f3b695e	284	* @}
EricLew	0:80ee8f3b695e	285	*/
EricLew	0:80ee8f3b695e	286
EricLew	0:80ee8f3b695e	287	/** @defgroup HAL_SYSCFG_Aliased_Defines HAL SYSCFG Aliased Defines maintained for legacy purpose
EricLew	0:80ee8f3b695e	288	* @{
EricLew	0:80ee8f3b695e	289	*/
EricLew	0:80ee8f3b695e	290
EricLew	0:80ee8f3b695e	291	#define HAL_SYSCFG_FASTMODEPLUS_I2C_PA9 I2C_FASTMODEPLUS_PA9
EricLew	0:80ee8f3b695e	292	#define HAL_SYSCFG_FASTMODEPLUS_I2C_PA10 I2C_FASTMODEPLUS_PA10
EricLew	0:80ee8f3b695e	293	#define HAL_SYSCFG_FASTMODEPLUS_I2C_PB6 I2C_FASTMODEPLUS_PB6
EricLew	0:80ee8f3b695e	294	#define HAL_SYSCFG_FASTMODEPLUS_I2C_PB7 I2C_FASTMODEPLUS_PB7
EricLew	0:80ee8f3b695e	295	#define HAL_SYSCFG_FASTMODEPLUS_I2C_PB8 I2C_FASTMODEPLUS_PB8
EricLew	0:80ee8f3b695e	296	#define HAL_SYSCFG_FASTMODEPLUS_I2C_PB9 I2C_FASTMODEPLUS_PB9
EricLew	0:80ee8f3b695e	297	#define HAL_SYSCFG_FASTMODEPLUS_I2C1 I2C_FASTMODEPLUS_I2C1
EricLew	0:80ee8f3b695e	298	#define HAL_SYSCFG_FASTMODEPLUS_I2C2 I2C_FASTMODEPLUS_I2C2
EricLew	0:80ee8f3b695e	299	#define HAL_SYSCFG_FASTMODEPLUS_I2C3 I2C_FASTMODEPLUS_I2C3
EricLew	0:80ee8f3b695e	300	/**
EricLew	0:80ee8f3b695e	301	* @}
EricLew	0:80ee8f3b695e	302	*/
EricLew	0:80ee8f3b695e	303
EricLew	0:80ee8f3b695e	304
EricLew	0:80ee8f3b695e	305	/** @defgroup LL_FMC_Aliased_Defines LL FMC Aliased Defines maintained for compatibility purpose
EricLew	0:80ee8f3b695e	306	* @{
EricLew	0:80ee8f3b695e	307	*/
EricLew	0:80ee8f3b695e	308	#if defined(STM32L4) \|\| defined(STM32F7)
EricLew	0:80ee8f3b695e	309	#define FMC_NAND_PCC_WAIT_FEATURE_DISABLE FMC_NAND_WAIT_FEATURE_DISABLE
EricLew	0:80ee8f3b695e	310	#define FMC_NAND_PCC_WAIT_FEATURE_ENABLE FMC_NAND_WAIT_FEATURE_ENABLE
EricLew	0:80ee8f3b695e	311	#define FMC_NAND_PCC_MEM_BUS_WIDTH_8 FMC_NAND_MEM_BUS_WIDTH_8
EricLew	0:80ee8f3b695e	312	#define FMC_NAND_PCC_MEM_BUS_WIDTH_16 FMC_NAND_MEM_BUS_WIDTH_16
EricLew	0:80ee8f3b695e	313	#else
EricLew	0:80ee8f3b695e	314	#define FMC_NAND_WAIT_FEATURE_DISABLE FMC_NAND_PCC_WAIT_FEATURE_DISABLE
EricLew	0:80ee8f3b695e	315	#define FMC_NAND_WAIT_FEATURE_ENABLE FMC_NAND_PCC_WAIT_FEATURE_ENABLE
EricLew	0:80ee8f3b695e	316	#define FMC_NAND_MEM_BUS_WIDTH_8 FMC_NAND_PCC_MEM_BUS_WIDTH_8
EricLew	0:80ee8f3b695e	317	#define FMC_NAND_MEM_BUS_WIDTH_16 FMC_NAND_PCC_MEM_BUS_WIDTH_16
EricLew	0:80ee8f3b695e	318	#endif
EricLew	0:80ee8f3b695e	319	/**
EricLew	0:80ee8f3b695e	320	* @}
EricLew	0:80ee8f3b695e	321	*/
EricLew	0:80ee8f3b695e	322
EricLew	0:80ee8f3b695e	323	/** @defgroup LL_FSMC_Aliased_Defines LL FSMC Aliased Defines maintained for legacy purpose
EricLew	0:80ee8f3b695e	324	* @{
EricLew	0:80ee8f3b695e	325	*/
EricLew	0:80ee8f3b695e	326
EricLew	0:80ee8f3b695e	327	#define FSMC_NORSRAM_TYPEDEF FSMC_NORSRAM_TypeDef
EricLew	0:80ee8f3b695e	328	#define FSMC_NORSRAM_EXTENDED_TYPEDEF FSMC_NORSRAM_EXTENDED_TypeDef
EricLew	0:80ee8f3b695e	329	/**
EricLew	0:80ee8f3b695e	330	* @}
EricLew	0:80ee8f3b695e	331	*/
EricLew	0:80ee8f3b695e	332
EricLew	0:80ee8f3b695e	333	/** @defgroup HAL_GPIO_Aliased_Macros HAL GPIO Aliased Macros maintained for legacy purpose
EricLew	0:80ee8f3b695e	334	* @{
EricLew	0:80ee8f3b695e	335	*/
EricLew	0:80ee8f3b695e	336	#define GET_GPIO_SOURCE GPIO_GET_INDEX
EricLew	0:80ee8f3b695e	337	#define GET_GPIO_INDEX GPIO_GET_INDEX
EricLew	0:80ee8f3b695e	338
EricLew	0:80ee8f3b695e	339	#if defined(STM32F4)
EricLew	0:80ee8f3b695e	340	#define GPIO_AF12_SDMMC GPIO_AF12_SDIO
EricLew	0:80ee8f3b695e	341	#define GPIO_AF12_SDMMC1 GPIO_AF12_SDIO
EricLew	0:80ee8f3b695e	342	#endif
EricLew	0:80ee8f3b695e	343
EricLew	0:80ee8f3b695e	344	#if defined(STM32F7)
EricLew	0:80ee8f3b695e	345	#define GPIO_AF12_SDIO GPIO_AF12_SDMMC1
EricLew	0:80ee8f3b695e	346	#define GPIO_AF12_SDMMC GPIO_AF12_SDMMC1
EricLew	0:80ee8f3b695e	347	#endif
EricLew	0:80ee8f3b695e	348
EricLew	0:80ee8f3b695e	349	#if defined(STM32L4)
EricLew	0:80ee8f3b695e	350	#define GPIO_AF12_SDIO GPIO_AF12_SDMMC1
EricLew	0:80ee8f3b695e	351	#define GPIO_AF12_SDMMC GPIO_AF12_SDMMC1
EricLew	0:80ee8f3b695e	352	#endif
EricLew	0:80ee8f3b695e	353
EricLew	0:80ee8f3b695e	354	#define GPIO_AF0_LPTIM GPIO_AF0_LPTIM1
EricLew	0:80ee8f3b695e	355	#define GPIO_AF1_LPTIM GPIO_AF1_LPTIM1
EricLew	0:80ee8f3b695e	356	#define GPIO_AF2_LPTIM GPIO_AF2_LPTIM1
EricLew	0:80ee8f3b695e	357
EricLew	0:80ee8f3b695e	358	#if defined(STM32L0) \|\| defined(STM32L4) \|\| defined(STM32F4) \|\| defined(STM32F2)
EricLew	0:80ee8f3b695e	359	#define GPIO_SPEED_LOW GPIO_SPEED_FREQ_LOW
EricLew	0:80ee8f3b695e	360	#define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_MEDIUM
EricLew	0:80ee8f3b695e	361	#define GPIO_SPEED_FAST GPIO_SPEED_FREQ_HIGH
EricLew	0:80ee8f3b695e	362	#define GPIO_SPEED_HIGH GPIO_SPEED_FREQ_VERY_HIGH
EricLew	0:80ee8f3b695e	363	#endif /* STM32L0 \|\| STM32L4 \|\| STM32F4 \|\| STM32F2 */
EricLew	0:80ee8f3b695e	364
EricLew	0:80ee8f3b695e	365	#if defined(STM32L1)
EricLew	0:80ee8f3b695e	366	#define GPIO_SPEED_VERY_LOW GPIO_SPEED_FREQ_LOW
EricLew	0:80ee8f3b695e	367	#define GPIO_SPEED_LOW GPIO_SPEED_FREQ_MEDIUM
EricLew	0:80ee8f3b695e	368	#define GPIO_SPEED_MEDIUM GPIO_SPEED_FREQ_HIGH
EricLew	0:80ee8f3b695e	369	#define GPIO_SPEED_HIGH GPIO_SPEED_FREQ_VERY_HIGH
EricLew	0:80ee8f3b695e	370	#endif /* STM32L1 */
EricLew	0:80ee8f3b695e	371
EricLew	0:80ee8f3b695e	372	/**
EricLew	0:80ee8f3b695e	373	* @}
EricLew	0:80ee8f3b695e	374	*/
EricLew	0:80ee8f3b695e	375
EricLew	0:80ee8f3b695e	376	/** @defgroup HAL_HRTIM_Aliased_Macros HAL HRTIM Aliased Macros maintained for legacy purpose
EricLew	0:80ee8f3b695e	377	* @{
EricLew	0:80ee8f3b695e	378	*/
EricLew	0:80ee8f3b695e	379	#define HRTIM_TIMDELAYEDPROTECTION_DISABLED HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DISABLED
EricLew	0:80ee8f3b695e	380	#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT1_EEV6
EricLew	0:80ee8f3b695e	381	#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT2_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT2_EEV6
EricLew	0:80ee8f3b695e	382	#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDBOTH_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDBOTH_EEV6
EricLew	0:80ee8f3b695e	383	#define HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV68 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV6
EricLew	0:80ee8f3b695e	384	#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT1_DEEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT1_DEEV7
EricLew	0:80ee8f3b695e	385	#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDOUT2_DEEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDOUT2_DEEV7
EricLew	0:80ee8f3b695e	386	#define HRTIM_TIMDELAYEDPROTECTION_DELAYEDBOTH_EEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_DELAYEDBOTH_EEV7
EricLew	0:80ee8f3b695e	387	#define HRTIM_TIMDELAYEDPROTECTION_BALANCED_EEV79 HRTIM_TIMER_A_B_C_DELAYEDPROTECTION_BALANCED_EEV7
EricLew	0:80ee8f3b695e	388
EricLew	0:80ee8f3b695e	389	#define __HAL_HRTIM_SetCounter __HAL_HRTIM_SETCOUNTER
EricLew	0:80ee8f3b695e	390	#define __HAL_HRTIM_GetCounter __HAL_HRTIM_GETCOUNTER
EricLew	0:80ee8f3b695e	391	#define __HAL_HRTIM_SetPeriod __HAL_HRTIM_SETPERIOD
EricLew	0:80ee8f3b695e	392	#define __HAL_HRTIM_GetPeriod __HAL_HRTIM_GETPERIOD
EricLew	0:80ee8f3b695e	393	#define __HAL_HRTIM_SetClockPrescaler __HAL_HRTIM_SETCLOCKPRESCALER
EricLew	0:80ee8f3b695e	394	#define __HAL_HRTIM_GetClockPrescaler __HAL_HRTIM_GETCLOCKPRESCALER
EricLew	0:80ee8f3b695e	395	#define __HAL_HRTIM_SetCompare __HAL_HRTIM_SETCOMPARE
EricLew	0:80ee8f3b695e	396	#define __HAL_HRTIM_GetCompare __HAL_HRTIM_GETCOMPARE
EricLew	0:80ee8f3b695e	397	/**
EricLew	0:80ee8f3b695e	398	* @}
EricLew	0:80ee8f3b695e	399	*/
EricLew	0:80ee8f3b695e	400
EricLew	0:80ee8f3b695e	401	/** @defgroup HAL_I2C_Aliased_Defines HAL I2C Aliased Defines maintained for legacy purpose
EricLew	0:80ee8f3b695e	402	* @{
EricLew	0:80ee8f3b695e	403	*/
EricLew	0:80ee8f3b695e	404	#define I2C_DUALADDRESS_DISABLED I2C_DUALADDRESS_DISABLE
EricLew	0:80ee8f3b695e	405	#define I2C_DUALADDRESS_ENABLED I2C_DUALADDRESS_ENABLE
EricLew	0:80ee8f3b695e	406	#define I2C_GENERALCALL_DISABLED I2C_GENERALCALL_DISABLE
EricLew	0:80ee8f3b695e	407	#define I2C_GENERALCALL_ENABLED I2C_GENERALCALL_ENABLE
EricLew	0:80ee8f3b695e	408	#define I2C_NOSTRETCH_DISABLED I2C_NOSTRETCH_DISABLE
EricLew	0:80ee8f3b695e	409	#define I2C_NOSTRETCH_ENABLED I2C_NOSTRETCH_ENABLE
EricLew	0:80ee8f3b695e	410	#define I2C_ANALOGFILTER_ENABLED I2C_ANALOGFILTER_ENABLE
EricLew	0:80ee8f3b695e	411	#define I2C_ANALOGFILTER_DISABLED I2C_ANALOGFILTER_DISABLE
EricLew	0:80ee8f3b695e	412	/**
EricLew	0:80ee8f3b695e	413	* @}
EricLew	0:80ee8f3b695e	414	*/
EricLew	0:80ee8f3b695e	415
EricLew	0:80ee8f3b695e	416	/** @defgroup HAL_IRDA_Aliased_Defines HAL IRDA Aliased Defines maintained for legacy purpose
EricLew	0:80ee8f3b695e	417	* @{
EricLew	0:80ee8f3b695e	418	*/
EricLew	0:80ee8f3b695e	419	#define IRDA_ONE_BIT_SAMPLE_DISABLED IRDA_ONE_BIT_SAMPLE_DISABLE
EricLew	0:80ee8f3b695e	420	#define IRDA_ONE_BIT_SAMPLE_ENABLED IRDA_ONE_BIT_SAMPLE_ENABLE
EricLew	0:80ee8f3b695e	421
EricLew	0:80ee8f3b695e	422	/**
EricLew	0:80ee8f3b695e	423	* @}
EricLew	0:80ee8f3b695e	424	*/
EricLew	0:80ee8f3b695e	425
EricLew	0:80ee8f3b695e	426	/** @defgroup HAL_IWDG_Aliased_Defines HAL IWDG Aliased Defines maintained for legacy purpose
EricLew	0:80ee8f3b695e	427	* @{
EricLew	0:80ee8f3b695e	428	*/
EricLew	0:80ee8f3b695e	429	#define KR_KEY_RELOAD IWDG_KEY_RELOAD
EricLew	0:80ee8f3b695e	430	#define KR_KEY_ENABLE IWDG_KEY_ENABLE
EricLew	0:80ee8f3b695e	431	#define KR_KEY_EWA IWDG_KEY_WRITE_ACCESS_ENABLE
EricLew	0:80ee8f3b695e	432	#define KR_KEY_DWA IWDG_KEY_WRITE_ACCESS_DISABLE
EricLew	0:80ee8f3b695e	433	/**
EricLew	0:80ee8f3b695e	434	* @}
EricLew	0:80ee8f3b695e	435	*/
EricLew	0:80ee8f3b695e	436
EricLew	0:80ee8f3b695e	437	/** @defgroup HAL_LPTIM_Aliased_Defines HAL LPTIM Aliased Defines maintained for legacy purpose
EricLew	0:80ee8f3b695e	438	* @{
EricLew	0:80ee8f3b695e	439	*/
EricLew	0:80ee8f3b695e	440
EricLew	0:80ee8f3b695e	441	#define LPTIM_CLOCKSAMPLETIME_DIRECTTRANSISTION LPTIM_CLOCKSAMPLETIME_DIRECTTRANSITION
EricLew	0:80ee8f3b695e	442	#define LPTIM_CLOCKSAMPLETIME_2TRANSISTIONS LPTIM_CLOCKSAMPLETIME_2TRANSITIONS
EricLew	0:80ee8f3b695e	443	#define LPTIM_CLOCKSAMPLETIME_4TRANSISTIONS LPTIM_CLOCKSAMPLETIME_4TRANSITIONS
EricLew	0:80ee8f3b695e	444	#define LPTIM_CLOCKSAMPLETIME_8TRANSISTIONS LPTIM_CLOCKSAMPLETIME_8TRANSITIONS
EricLew	0:80ee8f3b695e	445
EricLew	0:80ee8f3b695e	446	#define LPTIM_CLOCKPOLARITY_RISINGEDGE LPTIM_CLOCKPOLARITY_RISING
EricLew	0:80ee8f3b695e	447	#define LPTIM_CLOCKPOLARITY_FALLINGEDGE LPTIM_CLOCKPOLARITY_FALLING
EricLew	0:80ee8f3b695e	448	#define LPTIM_CLOCKPOLARITY_BOTHEDGES LPTIM_CLOCKPOLARITY_RISING_FALLING
EricLew	0:80ee8f3b695e	449
EricLew	0:80ee8f3b695e	450	#define LPTIM_TRIGSAMPLETIME_DIRECTTRANSISTION LPTIM_TRIGSAMPLETIME_DIRECTTRANSITION
EricLew	0:80ee8f3b695e	451	#define LPTIM_TRIGSAMPLETIME_2TRANSISTIONS LPTIM_TRIGSAMPLETIME_2TRANSITIONS
EricLew	0:80ee8f3b695e	452	#define LPTIM_TRIGSAMPLETIME_4TRANSISTIONS LPTIM_TRIGSAMPLETIME_4TRANSITIONS
EricLew	0:80ee8f3b695e	453	#define LPTIM_TRIGSAMPLETIME_8TRANSISTIONS LPTIM_TRIGSAMPLETIME_8TRANSITIONS
EricLew	0:80ee8f3b695e	454
EricLew	0:80ee8f3b695e	455	/* The following 3 definition have also been present in a temporary version of lptim.h */
EricLew	0:80ee8f3b695e	456	/* They need to be renamed also to the right name, just in case */
EricLew	0:80ee8f3b695e	457	#define LPTIM_TRIGSAMPLETIME_2TRANSITION LPTIM_TRIGSAMPLETIME_2TRANSITIONS
EricLew	0:80ee8f3b695e	458	#define LPTIM_TRIGSAMPLETIME_4TRANSITION LPTIM_TRIGSAMPLETIME_4TRANSITIONS
EricLew	0:80ee8f3b695e	459	#define LPTIM_TRIGSAMPLETIME_8TRANSITION LPTIM_TRIGSAMPLETIME_8TRANSITIONS
EricLew	0:80ee8f3b695e	460
EricLew	0:80ee8f3b695e	461	/**
EricLew	0:80ee8f3b695e	462	* @}
EricLew	0:80ee8f3b695e	463	*/
EricLew	0:80ee8f3b695e	464
EricLew	0:80ee8f3b695e	465	/** @defgroup HAL_NAND_Aliased_Defines HAL NAND Aliased Defines maintained for legacy purpose
EricLew	0:80ee8f3b695e	466	* @{
EricLew	0:80ee8f3b695e	467	*/
EricLew	0:80ee8f3b695e	468	#define NAND_AddressTypedef NAND_AddressTypeDef
EricLew	0:80ee8f3b695e	469
EricLew	0:80ee8f3b695e	470	#define __ARRAY_ADDRESS ARRAY_ADDRESS
EricLew	0:80ee8f3b695e	471	#define __ADDR_1st_CYCLE ADDR_1ST_CYCLE
EricLew	0:80ee8f3b695e	472	#define __ADDR_2nd_CYCLE ADDR_2ND_CYCLE
EricLew	0:80ee8f3b695e	473	#define __ADDR_3rd_CYCLE ADDR_3RD_CYCLE
EricLew	0:80ee8f3b695e	474	#define __ADDR_4th_CYCLE ADDR_4TH_CYCLE
EricLew	0:80ee8f3b695e	475	/**
EricLew	0:80ee8f3b695e	476	* @}
EricLew	0:80ee8f3b695e	477	*/
EricLew	0:80ee8f3b695e	478
EricLew	0:80ee8f3b695e	479	/** @defgroup HAL_NOR_Aliased_Defines HAL NOR Aliased Defines maintained for legacy purpose
EricLew	0:80ee8f3b695e	480	* @{
EricLew	0:80ee8f3b695e	481	*/
EricLew	0:80ee8f3b695e	482	#define NOR_StatusTypedef HAL_NOR_StatusTypeDef
EricLew	0:80ee8f3b695e	483	#define NOR_SUCCESS HAL_NOR_STATUS_SUCCESS
EricLew	0:80ee8f3b695e	484	#define NOR_ONGOING HAL_NOR_STATUS_ONGOING
EricLew	0:80ee8f3b695e	485	#define NOR_ERROR HAL_NOR_STATUS_ERROR
EricLew	0:80ee8f3b695e	486	#define NOR_TIMEOUT HAL_NOR_STATUS_TIMEOUT
EricLew	0:80ee8f3b695e	487
EricLew	0:80ee8f3b695e	488	#define __NOR_WRITE NOR_WRITE
EricLew	0:80ee8f3b695e	489	#define __NOR_ADDR_SHIFT NOR_ADDR_SHIFT
EricLew	0:80ee8f3b695e	490	/**
EricLew	0:80ee8f3b695e	491	* @}
EricLew	0:80ee8f3b695e	492	*/
EricLew	0:80ee8f3b695e	493
EricLew	0:80ee8f3b695e	494	/** @defgroup HAL_OPAMP_Aliased_Defines HAL OPAMP Aliased Defines maintained for legacy purpose
EricLew	0:80ee8f3b695e	495	* @{
EricLew	0:80ee8f3b695e	496	*/
EricLew	0:80ee8f3b695e	497
EricLew	0:80ee8f3b695e	498	#define OPAMP_NONINVERTINGINPUT_VP0 OPAMP_NONINVERTINGINPUT_IO0
EricLew	0:80ee8f3b695e	499	#define OPAMP_NONINVERTINGINPUT_VP1 OPAMP_NONINVERTINGINPUT_IO1
EricLew	0:80ee8f3b695e	500	#define OPAMP_NONINVERTINGINPUT_VP2 OPAMP_NONINVERTINGINPUT_IO2
EricLew	0:80ee8f3b695e	501	#define OPAMP_NONINVERTINGINPUT_VP3 OPAMP_NONINVERTINGINPUT_IO3
EricLew	0:80ee8f3b695e	502
EricLew	0:80ee8f3b695e	503	#define OPAMP_SEC_NONINVERTINGINPUT_VP0 OPAMP_SEC_NONINVERTINGINPUT_IO0
EricLew	0:80ee8f3b695e	504	#define OPAMP_SEC_NONINVERTINGINPUT_VP1 OPAMP_SEC_NONINVERTINGINPUT_IO1
EricLew	0:80ee8f3b695e	505	#define OPAMP_SEC_NONINVERTINGINPUT_VP2 OPAMP_SEC_NONINVERTINGINPUT_IO2
EricLew	0:80ee8f3b695e	506	#define OPAMP_SEC_NONINVERTINGINPUT_VP3 OPAMP_SEC_NONINVERTINGINPUT_IO3
EricLew	0:80ee8f3b695e	507
EricLew	0:80ee8f3b695e	508	#define OPAMP_INVERTINGINPUT_VM0 OPAMP_INVERTINGINPUT_IO0
EricLew	0:80ee8f3b695e	509	#define OPAMP_INVERTINGINPUT_VM1 OPAMP_INVERTINGINPUT_IO1
EricLew	0:80ee8f3b695e	510
EricLew	0:80ee8f3b695e	511	#define IOPAMP_INVERTINGINPUT_VM0 OPAMP_INVERTINGINPUT_IO0
EricLew	0:80ee8f3b695e	512	#define IOPAMP_INVERTINGINPUT_VM1 OPAMP_INVERTINGINPUT_IO1
EricLew	0:80ee8f3b695e	513
EricLew	0:80ee8f3b695e	514	#define OPAMP_SEC_INVERTINGINPUT_VM0 OPAMP_SEC_INVERTINGINPUT_IO0
EricLew	0:80ee8f3b695e	515	#define OPAMP_SEC_INVERTINGINPUT_VM1 OPAMP_SEC_INVERTINGINPUT_IO1
EricLew	0:80ee8f3b695e	516
EricLew	0:80ee8f3b695e	517	#define OPAMP_INVERTINGINPUT_VINM OPAMP_SEC_INVERTINGINPUT_IO1
EricLew	0:80ee8f3b695e	518
EricLew	0:80ee8f3b695e	519	#define OPAMP_PGACONNECT_NO OPAMP_PGA_CONNECT_INVERTINGINPUT_NO
EricLew	0:80ee8f3b695e	520	#define OPAMP_PGACONNECT_VM0 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0
EricLew	0:80ee8f3b695e	521	#define OPAMP_PGACONNECT_VM1 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO1
EricLew	0:80ee8f3b695e	522
EricLew	0:80ee8f3b695e	523	/**
EricLew	0:80ee8f3b695e	524	* @}
EricLew	0:80ee8f3b695e	525	*/
EricLew	0:80ee8f3b695e	526
EricLew	0:80ee8f3b695e	527	/** @defgroup HAL_I2S_Aliased_Defines HAL I2S Aliased Defines maintained for legacy purpose
EricLew	0:80ee8f3b695e	528	* @{
EricLew	0:80ee8f3b695e	529	*/
EricLew	0:80ee8f3b695e	530	#define I2S_STANDARD_PHILLIPS I2S_STANDARD_PHILIPS
EricLew	0:80ee8f3b695e	531	/**
EricLew	0:80ee8f3b695e	532	* @}
EricLew	0:80ee8f3b695e	533	*/
EricLew	0:80ee8f3b695e	534
EricLew	0:80ee8f3b695e	535	/** @defgroup HAL_PCCARD_Aliased_Defines HAL PCCARD Aliased Defines maintained for legacy purpose
EricLew	0:80ee8f3b695e	536	* @{
EricLew	0:80ee8f3b695e	537	*/
EricLew	0:80ee8f3b695e	538
EricLew	0:80ee8f3b695e	539	/* Compact Flash-ATA registers description */
EricLew	0:80ee8f3b695e	540	#define CF_DATA ATA_DATA
EricLew	0:80ee8f3b695e	541	#define CF_SECTOR_COUNT ATA_SECTOR_COUNT
EricLew	0:80ee8f3b695e	542	#define CF_SECTOR_NUMBER ATA_SECTOR_NUMBER
EricLew	0:80ee8f3b695e	543	#define CF_CYLINDER_LOW ATA_CYLINDER_LOW
EricLew	0:80ee8f3b695e	544	#define CF_CYLINDER_HIGH ATA_CYLINDER_HIGH
EricLew	0:80ee8f3b695e	545	#define CF_CARD_HEAD ATA_CARD_HEAD
EricLew	0:80ee8f3b695e	546	#define CF_STATUS_CMD ATA_STATUS_CMD
EricLew	0:80ee8f3b695e	547	#define CF_STATUS_CMD_ALTERNATE ATA_STATUS_CMD_ALTERNATE
EricLew	0:80ee8f3b695e	548	#define CF_COMMON_DATA_AREA ATA_COMMON_DATA_AREA
EricLew	0:80ee8f3b695e	549
EricLew	0:80ee8f3b695e	550	/* Compact Flash-ATA commands */
EricLew	0:80ee8f3b695e	551	#define CF_READ_SECTOR_CMD ATA_READ_SECTOR_CMD
EricLew	0:80ee8f3b695e	552	#define CF_WRITE_SECTOR_CMD ATA_WRITE_SECTOR_CMD
EricLew	0:80ee8f3b695e	553	#define CF_ERASE_SECTOR_CMD ATA_ERASE_SECTOR_CMD
EricLew	0:80ee8f3b695e	554	#define CF_IDENTIFY_CMD ATA_IDENTIFY_CMD
EricLew	0:80ee8f3b695e	555
EricLew	0:80ee8f3b695e	556	#define PCCARD_StatusTypedef HAL_PCCARD_StatusTypeDef
EricLew	0:80ee8f3b695e	557	#define PCCARD_SUCCESS HAL_PCCARD_STATUS_SUCCESS
EricLew	0:80ee8f3b695e	558	#define PCCARD_ONGOING HAL_PCCARD_STATUS_ONGOING
EricLew	0:80ee8f3b695e	559	#define PCCARD_ERROR HAL_PCCARD_STATUS_ERROR
EricLew	0:80ee8f3b695e	560	#define PCCARD_TIMEOUT HAL_PCCARD_STATUS_TIMEOUT
EricLew	0:80ee8f3b695e	561	/**
EricLew	0:80ee8f3b695e	562	* @}
EricLew	0:80ee8f3b695e	563	*/
EricLew	0:80ee8f3b695e	564
EricLew	0:80ee8f3b695e	565	/** @defgroup HAL_RTC_Aliased_Defines HAL RTC Aliased Defines maintained for legacy purpose
EricLew	0:80ee8f3b695e	566	* @{
EricLew	0:80ee8f3b695e	567	*/
EricLew	0:80ee8f3b695e	568
EricLew	0:80ee8f3b695e	569	#define FORMAT_BIN RTC_FORMAT_BIN
EricLew	0:80ee8f3b695e	570	#define FORMAT_BCD RTC_FORMAT_BCD
EricLew	0:80ee8f3b695e	571
EricLew	0:80ee8f3b695e	572	#define RTC_ALARMSUBSECONDMASK_None RTC_ALARMSUBSECONDMASK_NONE
EricLew	0:80ee8f3b695e	573	#define RTC_TAMPERERASEBACKUP_ENABLED RTC_TAMPER_ERASE_BACKUP_ENABLE
EricLew	0:80ee8f3b695e	574	#define RTC_TAMPERERASEBACKUP_DISABLED RTC_TAMPER_ERASE_BACKUP_DISABLE
EricLew	0:80ee8f3b695e	575	#define RTC_TAMPERMASK_FLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE
EricLew	0:80ee8f3b695e	576	#define RTC_TAMPERMASK_FLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE
EricLew	0:80ee8f3b695e	577
EricLew	0:80ee8f3b695e	578	#define RTC_MASKTAMPERFLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE
EricLew	0:80ee8f3b695e	579	#define RTC_MASKTAMPERFLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE
EricLew	0:80ee8f3b695e	580	#define RTC_TAMPERERASEBACKUP_ENABLED RTC_TAMPER_ERASE_BACKUP_ENABLE
EricLew	0:80ee8f3b695e	581	#define RTC_TAMPERERASEBACKUP_DISABLED RTC_TAMPER_ERASE_BACKUP_DISABLE
EricLew	0:80ee8f3b695e	582	#define RTC_MASKTAMPERFLAG_DISABLED RTC_TAMPERMASK_FLAG_DISABLE
EricLew	0:80ee8f3b695e	583	#define RTC_MASKTAMPERFLAG_ENABLED RTC_TAMPERMASK_FLAG_ENABLE
EricLew	0:80ee8f3b695e	584	#define RTC_TAMPER1_2_INTERRUPT RTC_ALL_TAMPER_INTERRUPT
EricLew	0:80ee8f3b695e	585	#define RTC_TAMPER1_2_3_INTERRUPT RTC_ALL_TAMPER_INTERRUPT
EricLew	0:80ee8f3b695e	586
EricLew	0:80ee8f3b695e	587	#define RTC_TIMESTAMPPIN_PC13 RTC_TIMESTAMPPIN_DEFAULT
EricLew	0:80ee8f3b695e	588	#define RTC_TIMESTAMPPIN_PA0 RTC_TIMESTAMPPIN_POS1
EricLew	0:80ee8f3b695e	589	#define RTC_TIMESTAMPPIN_PI8 RTC_TIMESTAMPPIN_POS1
EricLew	0:80ee8f3b695e	590	#define RTC_TIMESTAMPPIN_PC1 RTC_TIMESTAMPPIN_POS2
EricLew	0:80ee8f3b695e	591
EricLew	0:80ee8f3b695e	592	#define RTC_OUTPUT_REMAP_PC13 RTC_OUTPUT_REMAP_NONE
EricLew	0:80ee8f3b695e	593	#define RTC_OUTPUT_REMAP_PB14 RTC_OUTPUT_REMAP_POS1
EricLew	0:80ee8f3b695e	594	#define RTC_OUTPUT_REMAP_PB2 RTC_OUTPUT_REMAP_POS1
EricLew	0:80ee8f3b695e	595
EricLew	0:80ee8f3b695e	596	#define RTC_TAMPERPIN_PC13 RTC_TAMPERPIN_DEFAULT
EricLew	0:80ee8f3b695e	597	#define RTC_TAMPERPIN_PA0 RTC_TAMPERPIN_POS1
EricLew	0:80ee8f3b695e	598	#define RTC_TAMPERPIN_PI8 RTC_TAMPERPIN_POS1
EricLew	0:80ee8f3b695e	599
EricLew	0:80ee8f3b695e	600	/**
EricLew	0:80ee8f3b695e	601	* @}
EricLew	0:80ee8f3b695e	602	*/
EricLew	0:80ee8f3b695e	603
EricLew	0:80ee8f3b695e	604
EricLew	0:80ee8f3b695e	605	/** @defgroup HAL_SMARTCARD_Aliased_Defines HAL SMARTCARD Aliased Defines maintained for legacy purpose
EricLew	0:80ee8f3b695e	606	* @{
EricLew	0:80ee8f3b695e	607	*/
EricLew	0:80ee8f3b695e	608	#define SMARTCARD_NACK_ENABLED SMARTCARD_NACK_ENABLE
EricLew	0:80ee8f3b695e	609	#define SMARTCARD_NACK_DISABLED SMARTCARD_NACK_DISABLE
EricLew	0:80ee8f3b695e	610
EricLew	0:80ee8f3b695e	611	#define SMARTCARD_ONEBIT_SAMPLING_DISABLED SMARTCARD_ONE_BIT_SAMPLE_DISABLE
EricLew	0:80ee8f3b695e	612	#define SMARTCARD_ONEBIT_SAMPLING_ENABLED SMARTCARD_ONE_BIT_SAMPLE_ENABLE
EricLew	0:80ee8f3b695e	613	#define SMARTCARD_ONEBIT_SAMPLING_DISABLE SMARTCARD_ONE_BIT_SAMPLE_DISABLE
EricLew	0:80ee8f3b695e	614	#define SMARTCARD_ONEBIT_SAMPLING_ENABLE SMARTCARD_ONE_BIT_SAMPLE_ENABLE
EricLew	0:80ee8f3b695e	615
EricLew	0:80ee8f3b695e	616	#define SMARTCARD_TIMEOUT_DISABLED SMARTCARD_TIMEOUT_DISABLE
EricLew	0:80ee8f3b695e	617	#define SMARTCARD_TIMEOUT_ENABLED SMARTCARD_TIMEOUT_ENABLE
EricLew	0:80ee8f3b695e	618
EricLew	0:80ee8f3b695e	619	#define SMARTCARD_LASTBIT_DISABLED SMARTCARD_LASTBIT_DISABLE
EricLew	0:80ee8f3b695e	620	#define SMARTCARD_LASTBIT_ENABLED SMARTCARD_LASTBIT_ENABLE
EricLew	0:80ee8f3b695e	621	/**
EricLew	0:80ee8f3b695e	622	* @}
EricLew	0:80ee8f3b695e	623	*/
EricLew	0:80ee8f3b695e	624
EricLew	0:80ee8f3b695e	625
EricLew	0:80ee8f3b695e	626	/** @defgroup HAL_SMBUS_Aliased_Defines HAL SMBUS Aliased Defines maintained for legacy purpose
EricLew	0:80ee8f3b695e	627	* @{
EricLew	0:80ee8f3b695e	628	*/
EricLew	0:80ee8f3b695e	629	#define SMBUS_DUALADDRESS_DISABLED SMBUS_DUALADDRESS_DISABLE
EricLew	0:80ee8f3b695e	630	#define SMBUS_DUALADDRESS_ENABLED SMBUS_DUALADDRESS_ENABLE
EricLew	0:80ee8f3b695e	631	#define SMBUS_GENERALCALL_DISABLED SMBUS_GENERALCALL_DISABLE
EricLew	0:80ee8f3b695e	632	#define SMBUS_GENERALCALL_ENABLED SMBUS_GENERALCALL_ENABLE
EricLew	0:80ee8f3b695e	633	#define SMBUS_NOSTRETCH_DISABLED SMBUS_NOSTRETCH_DISABLE
EricLew	0:80ee8f3b695e	634	#define SMBUS_NOSTRETCH_ENABLED SMBUS_NOSTRETCH_ENABLE
EricLew	0:80ee8f3b695e	635	#define SMBUS_ANALOGFILTER_ENABLED SMBUS_ANALOGFILTER_ENABLE
EricLew	0:80ee8f3b695e	636	#define SMBUS_ANALOGFILTER_DISABLED SMBUS_ANALOGFILTER_DISABLE
EricLew	0:80ee8f3b695e	637	#define SMBUS_PEC_DISABLED SMBUS_PEC_DISABLE
EricLew	0:80ee8f3b695e	638	#define SMBUS_PEC_ENABLED SMBUS_PEC_ENABLE
EricLew	0:80ee8f3b695e	639	#define HAL_SMBUS_STATE_SLAVE_LISTEN HAL_SMBUS_STATE_LISTEN
EricLew	0:80ee8f3b695e	640	/**
EricLew	0:80ee8f3b695e	641	* @}
EricLew	0:80ee8f3b695e	642	*/
EricLew	0:80ee8f3b695e	643
EricLew	0:80ee8f3b695e	644	/** @defgroup HAL_SPI_Aliased_Defines HAL SPI Aliased Defines maintained for legacy purpose
EricLew	0:80ee8f3b695e	645	* @{
EricLew	0:80ee8f3b695e	646	*/
EricLew	0:80ee8f3b695e	647	#define SPI_TIMODE_DISABLED SPI_TIMODE_DISABLE
EricLew	0:80ee8f3b695e	648	#define SPI_TIMODE_ENABLED SPI_TIMODE_ENABLE
EricLew	0:80ee8f3b695e	649
EricLew	0:80ee8f3b695e	650	#define SPI_CRCCALCULATION_DISABLED SPI_CRCCALCULATION_DISABLE
EricLew	0:80ee8f3b695e	651	#define SPI_CRCCALCULATION_ENABLED SPI_CRCCALCULATION_ENABLE
EricLew	0:80ee8f3b695e	652
EricLew	0:80ee8f3b695e	653	#define SPI_NSS_PULSE_DISABLED SPI_NSS_PULSE_DISABLE
EricLew	0:80ee8f3b695e	654	#define SPI_NSS_PULSE_ENABLED SPI_NSS_PULSE_ENABLE
EricLew	0:80ee8f3b695e	655
EricLew	0:80ee8f3b695e	656	/**
EricLew	0:80ee8f3b695e	657	* @}
EricLew	0:80ee8f3b695e	658	*/
EricLew	0:80ee8f3b695e	659
EricLew	0:80ee8f3b695e	660	/** @defgroup HAL_TIM_Aliased_Defines HAL TIM Aliased Defines maintained for legacy purpose
EricLew	0:80ee8f3b695e	661	* @{
EricLew	0:80ee8f3b695e	662	*/
EricLew	0:80ee8f3b695e	663	#define CCER_CCxE_MASK TIM_CCER_CCxE_MASK
EricLew	0:80ee8f3b695e	664	#define CCER_CCxNE_MASK TIM_CCER_CCxNE_MASK
EricLew	0:80ee8f3b695e	665
EricLew	0:80ee8f3b695e	666	#define TIM_DMABase_CR1 TIM_DMABASE_CR1
EricLew	0:80ee8f3b695e	667	#define TIM_DMABase_CR2 TIM_DMABASE_CR2
EricLew	0:80ee8f3b695e	668	#define TIM_DMABase_SMCR TIM_DMABASE_SMCR
EricLew	0:80ee8f3b695e	669	#define TIM_DMABase_DIER TIM_DMABASE_DIER
EricLew	0:80ee8f3b695e	670	#define TIM_DMABase_SR TIM_DMABASE_SR
EricLew	0:80ee8f3b695e	671	#define TIM_DMABase_EGR TIM_DMABASE_EGR
EricLew	0:80ee8f3b695e	672	#define TIM_DMABase_CCMR1 TIM_DMABASE_CCMR1
EricLew	0:80ee8f3b695e	673	#define TIM_DMABase_CCMR2 TIM_DMABASE_CCMR2
EricLew	0:80ee8f3b695e	674	#define TIM_DMABase_CCER TIM_DMABASE_CCER
EricLew	0:80ee8f3b695e	675	#define TIM_DMABase_CNT TIM_DMABASE_CNT
EricLew	0:80ee8f3b695e	676	#define TIM_DMABase_PSC TIM_DMABASE_PSC
EricLew	0:80ee8f3b695e	677	#define TIM_DMABase_ARR TIM_DMABASE_ARR
EricLew	0:80ee8f3b695e	678	#define TIM_DMABase_RCR TIM_DMABASE_RCR
EricLew	0:80ee8f3b695e	679	#define TIM_DMABase_CCR1 TIM_DMABASE_CCR1
EricLew	0:80ee8f3b695e	680	#define TIM_DMABase_CCR2 TIM_DMABASE_CCR2
EricLew	0:80ee8f3b695e	681	#define TIM_DMABase_CCR3 TIM_DMABASE_CCR3
EricLew	0:80ee8f3b695e	682	#define TIM_DMABase_CCR4 TIM_DMABASE_CCR4
EricLew	0:80ee8f3b695e	683	#define TIM_DMABase_BDTR TIM_DMABASE_BDTR
EricLew	0:80ee8f3b695e	684	#define TIM_DMABase_DCR TIM_DMABASE_DCR
EricLew	0:80ee8f3b695e	685	#define TIM_DMABase_DMAR TIM_DMABASE_DMAR
EricLew	0:80ee8f3b695e	686	#define TIM_DMABase_OR1 TIM_DMABASE_OR1
EricLew	0:80ee8f3b695e	687	#define TIM_DMABase_CCMR3 TIM_DMABASE_CCMR3
EricLew	0:80ee8f3b695e	688	#define TIM_DMABase_CCR5 TIM_DMABASE_CCR5
EricLew	0:80ee8f3b695e	689	#define TIM_DMABase_CCR6 TIM_DMABASE_CCR6
EricLew	0:80ee8f3b695e	690	#define TIM_DMABase_OR2 TIM_DMABASE_OR2
EricLew	0:80ee8f3b695e	691	#define TIM_DMABase_OR3 TIM_DMABASE_OR3
EricLew	0:80ee8f3b695e	692	#define TIM_DMABase_OR TIM_DMABASE_OR
EricLew	0:80ee8f3b695e	693
EricLew	0:80ee8f3b695e	694	#define TIM_EventSource_Update TIM_EVENTSOURCE_UPDATE
EricLew	0:80ee8f3b695e	695	#define TIM_EventSource_CC1 TIM_EVENTSOURCE_CC1
EricLew	0:80ee8f3b695e	696	#define TIM_EventSource_CC2 TIM_EVENTSOURCE_CC2
EricLew	0:80ee8f3b695e	697	#define TIM_EventSource_CC3 TIM_EVENTSOURCE_CC3
EricLew	0:80ee8f3b695e	698	#define TIM_EventSource_CC4 TIM_EVENTSOURCE_CC4
EricLew	0:80ee8f3b695e	699	#define TIM_EventSource_COM TIM_EVENTSOURCE_COM
EricLew	0:80ee8f3b695e	700	#define TIM_EventSource_Trigger TIM_EVENTSOURCE_TRIGGER
EricLew	0:80ee8f3b695e	701	#define TIM_EventSource_Break TIM_EVENTSOURCE_BREAK
EricLew	0:80ee8f3b695e	702	#define TIM_EventSource_Break2 TIM_EVENTSOURCE_BREAK2
EricLew	0:80ee8f3b695e	703
EricLew	0:80ee8f3b695e	704	#define TIM_DMABurstLength_1Transfer TIM_DMABURSTLENGTH_1TRANSFER
EricLew	0:80ee8f3b695e	705	#define TIM_DMABurstLength_2Transfers TIM_DMABURSTLENGTH_2TRANSFERS
EricLew	0:80ee8f3b695e	706	#define TIM_DMABurstLength_3Transfers TIM_DMABURSTLENGTH_3TRANSFERS
EricLew	0:80ee8f3b695e	707	#define TIM_DMABurstLength_4Transfers TIM_DMABURSTLENGTH_4TRANSFERS
EricLew	0:80ee8f3b695e	708	#define TIM_DMABurstLength_5Transfers TIM_DMABURSTLENGTH_5TRANSFERS
EricLew	0:80ee8f3b695e	709	#define TIM_DMABurstLength_6Transfers TIM_DMABURSTLENGTH_6TRANSFERS
EricLew	0:80ee8f3b695e	710	#define TIM_DMABurstLength_7Transfers TIM_DMABURSTLENGTH_7TRANSFERS
EricLew	0:80ee8f3b695e	711	#define TIM_DMABurstLength_8Transfers TIM_DMABURSTLENGTH_8TRANSFERS
EricLew	0:80ee8f3b695e	712	#define TIM_DMABurstLength_9Transfers TIM_DMABURSTLENGTH_9TRANSFERS
EricLew	0:80ee8f3b695e	713	#define TIM_DMABurstLength_10Transfers TIM_DMABURSTLENGTH_10TRANSFERS
EricLew	0:80ee8f3b695e	714	#define TIM_DMABurstLength_11Transfers TIM_DMABURSTLENGTH_11TRANSFERS
EricLew	0:80ee8f3b695e	715	#define TIM_DMABurstLength_12Transfers TIM_DMABURSTLENGTH_12TRANSFERS
EricLew	0:80ee8f3b695e	716	#define TIM_DMABurstLength_13Transfers TIM_DMABURSTLENGTH_13TRANSFERS
EricLew	0:80ee8f3b695e	717	#define TIM_DMABurstLength_14Transfers TIM_DMABURSTLENGTH_14TRANSFERS
EricLew	0:80ee8f3b695e	718	#define TIM_DMABurstLength_15Transfers TIM_DMABURSTLENGTH_15TRANSFERS
EricLew	0:80ee8f3b695e	719	#define TIM_DMABurstLength_16Transfers TIM_DMABURSTLENGTH_16TRANSFERS
EricLew	0:80ee8f3b695e	720	#define TIM_DMABurstLength_17Transfers TIM_DMABURSTLENGTH_17TRANSFERS
EricLew	0:80ee8f3b695e	721	#define TIM_DMABurstLength_18Transfers TIM_DMABURSTLENGTH_18TRANSFERS
EricLew	0:80ee8f3b695e	722
EricLew	0:80ee8f3b695e	723	/**
EricLew	0:80ee8f3b695e	724	* @}
EricLew	0:80ee8f3b695e	725	*/
EricLew	0:80ee8f3b695e	726
EricLew	0:80ee8f3b695e	727	/** @defgroup HAL_TSC_Aliased_Defines HAL TSC Aliased Defines maintained for legacy purpose
EricLew	0:80ee8f3b695e	728	* @{
EricLew	0:80ee8f3b695e	729	*/
EricLew	0:80ee8f3b695e	730	#define TSC_SYNC_POL_FALL TSC_SYNC_POLARITY_FALLING
EricLew	0:80ee8f3b695e	731	#define TSC_SYNC_POL_RISE_HIGH TSC_SYNC_POLARITY_RISING
EricLew	0:80ee8f3b695e	732	/**
EricLew	0:80ee8f3b695e	733	* @}
EricLew	0:80ee8f3b695e	734	*/
EricLew	0:80ee8f3b695e	735
EricLew	0:80ee8f3b695e	736	/** @defgroup HAL_UART_Aliased_Defines HAL UART Aliased Defines maintained for legacy purpose
EricLew	0:80ee8f3b695e	737	* @{
EricLew	0:80ee8f3b695e	738	*/
EricLew	0:80ee8f3b695e	739	#define UART_ONEBIT_SAMPLING_DISABLED UART_ONE_BIT_SAMPLE_DISABLE
EricLew	0:80ee8f3b695e	740	#define UART_ONEBIT_SAMPLING_ENABLED UART_ONE_BIT_SAMPLE_ENABLE
EricLew	0:80ee8f3b695e	741	#define UART_ONE_BIT_SAMPLE_DISABLED UART_ONE_BIT_SAMPLE_DISABLE
EricLew	0:80ee8f3b695e	742	#define UART_ONE_BIT_SAMPLE_ENABLED UART_ONE_BIT_SAMPLE_ENABLE
EricLew	0:80ee8f3b695e	743
EricLew	0:80ee8f3b695e	744	#define __HAL_UART_ONEBIT_ENABLE __HAL_UART_ONE_BIT_SAMPLE_ENABLE
EricLew	0:80ee8f3b695e	745	#define __HAL_UART_ONEBIT_DISABLE __HAL_UART_ONE_BIT_SAMPLE_DISABLE
EricLew	0:80ee8f3b695e	746
EricLew	0:80ee8f3b695e	747	#define __DIV_SAMPLING16 UART_DIV_SAMPLING16
EricLew	0:80ee8f3b695e	748	#define __DIVMANT_SAMPLING16 UART_DIVMANT_SAMPLING16
EricLew	0:80ee8f3b695e	749	#define __DIVFRAQ_SAMPLING16 UART_DIVFRAQ_SAMPLING16
EricLew	0:80ee8f3b695e	750	#define __UART_BRR_SAMPLING16 UART_BRR_SAMPLING16
EricLew	0:80ee8f3b695e	751
EricLew	0:80ee8f3b695e	752	#define __DIV_SAMPLING8 UART_DIV_SAMPLING8
EricLew	0:80ee8f3b695e	753	#define __DIVMANT_SAMPLING8 UART_DIVMANT_SAMPLING8
EricLew	0:80ee8f3b695e	754	#define __DIVFRAQ_SAMPLING8 UART_DIVFRAQ_SAMPLING8
EricLew	0:80ee8f3b695e	755	#define __UART_BRR_SAMPLING8 UART_BRR_SAMPLING8
EricLew	0:80ee8f3b695e	756
EricLew	0:80ee8f3b695e	757	#define UART_WAKEUPMETHODE_IDLELINE UART_WAKEUPMETHOD_IDLELINE
EricLew	0:80ee8f3b695e	758	#define UART_WAKEUPMETHODE_ADDRESSMARK UART_WAKEUPMETHOD_ADDRESSMARK
EricLew	0:80ee8f3b695e	759
EricLew	0:80ee8f3b695e	760	/**
EricLew	0:80ee8f3b695e	761	* @}
EricLew	0:80ee8f3b695e	762	*/
EricLew	0:80ee8f3b695e	763
EricLew	0:80ee8f3b695e	764
EricLew	0:80ee8f3b695e	765	/** @defgroup HAL_USART_Aliased_Defines HAL USART Aliased Defines maintained for legacy purpose
EricLew	0:80ee8f3b695e	766	* @{
EricLew	0:80ee8f3b695e	767	*/
EricLew	0:80ee8f3b695e	768
EricLew	0:80ee8f3b695e	769	#define USART_CLOCK_DISABLED USART_CLOCK_DISABLE
EricLew	0:80ee8f3b695e	770	#define USART_CLOCK_ENABLED USART_CLOCK_ENABLE
EricLew	0:80ee8f3b695e	771
EricLew	0:80ee8f3b695e	772	#define USARTNACK_ENABLED USART_NACK_ENABLE
EricLew	0:80ee8f3b695e	773	#define USARTNACK_DISABLED USART_NACK_DISABLE
EricLew	0:80ee8f3b695e	774	/**
EricLew	0:80ee8f3b695e	775	* @}
EricLew	0:80ee8f3b695e	776	*/
EricLew	0:80ee8f3b695e	777
EricLew	0:80ee8f3b695e	778	/** @defgroup HAL_WWDG_Aliased_Defines HAL WWDG Aliased Defines maintained for legacy purpose
EricLew	0:80ee8f3b695e	779	* @{
EricLew	0:80ee8f3b695e	780	*/
EricLew	0:80ee8f3b695e	781	#define CFR_BASE WWDG_CFR_BASE
EricLew	0:80ee8f3b695e	782
EricLew	0:80ee8f3b695e	783	/**
EricLew	0:80ee8f3b695e	784	* @}
EricLew	0:80ee8f3b695e	785	*/
EricLew	0:80ee8f3b695e	786
EricLew	0:80ee8f3b695e	787	/** @defgroup HAL_CAN_Aliased_Defines HAL CAN Aliased Defines maintained for legacy purpose
EricLew	0:80ee8f3b695e	788	* @{
EricLew	0:80ee8f3b695e	789	*/
EricLew	0:80ee8f3b695e	790	#define CAN_FilterFIFO0 CAN_FILTER_FIFO0
EricLew	0:80ee8f3b695e	791	#define CAN_FilterFIFO1 CAN_FILTER_FIFO1
EricLew	0:80ee8f3b695e	792	#define CAN_IT_RQCP0 CAN_IT_TME
EricLew	0:80ee8f3b695e	793	#define CAN_IT_RQCP1 CAN_IT_TME
EricLew	0:80ee8f3b695e	794	#define CAN_IT_RQCP2 CAN_IT_TME
EricLew	0:80ee8f3b695e	795	#define INAK_TIMEOUT CAN_TIMEOUT_VALUE
EricLew	0:80ee8f3b695e	796	#define SLAK_TIMEOUT CAN_TIMEOUT_VALUE
EricLew	0:80ee8f3b695e	797	#define CAN_TXSTATUS_FAILED ((uint8_t)0x00)
EricLew	0:80ee8f3b695e	798	#define CAN_TXSTATUS_OK ((uint8_t)0x01)
EricLew	0:80ee8f3b695e	799	#define CAN_TXSTATUS_PENDING ((uint8_t)0x02)
EricLew	0:80ee8f3b695e	800
EricLew	0:80ee8f3b695e	801	/**
EricLew	0:80ee8f3b695e	802	* @}
EricLew	0:80ee8f3b695e	803	*/
EricLew	0:80ee8f3b695e	804
EricLew	0:80ee8f3b695e	805	/** @defgroup HAL_ETH_Aliased_Defines HAL ETH Aliased Defines maintained for legacy purpose
EricLew	0:80ee8f3b695e	806	* @{
EricLew	0:80ee8f3b695e	807	*/
EricLew	0:80ee8f3b695e	808
EricLew	0:80ee8f3b695e	809	#define VLAN_TAG ETH_VLAN_TAG
EricLew	0:80ee8f3b695e	810	#define MIN_ETH_PAYLOAD ETH_MIN_ETH_PAYLOAD
EricLew	0:80ee8f3b695e	811	#define MAX_ETH_PAYLOAD ETH_MAX_ETH_PAYLOAD
EricLew	0:80ee8f3b695e	812	#define JUMBO_FRAME_PAYLOAD ETH_JUMBO_FRAME_PAYLOAD
EricLew	0:80ee8f3b695e	813	#define MACMIIAR_CR_MASK ETH_MACMIIAR_CR_MASK
EricLew	0:80ee8f3b695e	814	#define MACCR_CLEAR_MASK ETH_MACCR_CLEAR_MASK
EricLew	0:80ee8f3b695e	815	#define MACFCR_CLEAR_MASK ETH_MACFCR_CLEAR_MASK
EricLew	0:80ee8f3b695e	816	#define DMAOMR_CLEAR_MASK ETH_DMAOMR_CLEAR_MASK
EricLew	0:80ee8f3b695e	817
EricLew	0:80ee8f3b695e	818	#define ETH_MMCCR ((uint32_t)0x00000100)
EricLew	0:80ee8f3b695e	819	#define ETH_MMCRIR ((uint32_t)0x00000104)
EricLew	0:80ee8f3b695e	820	#define ETH_MMCTIR ((uint32_t)0x00000108)
EricLew	0:80ee8f3b695e	821	#define ETH_MMCRIMR ((uint32_t)0x0000010C)
EricLew	0:80ee8f3b695e	822	#define ETH_MMCTIMR ((uint32_t)0x00000110)
EricLew	0:80ee8f3b695e	823	#define ETH_MMCTGFSCCR ((uint32_t)0x0000014C)
EricLew	0:80ee8f3b695e	824	#define ETH_MMCTGFMSCCR ((uint32_t)0x00000150)
EricLew	0:80ee8f3b695e	825	#define ETH_MMCTGFCR ((uint32_t)0x00000168)
EricLew	0:80ee8f3b695e	826	#define ETH_MMCRFCECR ((uint32_t)0x00000194)
EricLew	0:80ee8f3b695e	827	#define ETH_MMCRFAECR ((uint32_t)0x00000198)
EricLew	0:80ee8f3b695e	828	#define ETH_MMCRGUFCR ((uint32_t)0x000001C4)
EricLew	0:80ee8f3b695e	829
EricLew	0:80ee8f3b695e	830	/**
EricLew	0:80ee8f3b695e	831	* @}
EricLew	0:80ee8f3b695e	832	*/
EricLew	0:80ee8f3b695e	833
EricLew	0:80ee8f3b695e	834	/** @defgroup HAL_PPP_Aliased_Defines HAL PPP Aliased Defines maintained for legacy purpose
EricLew	0:80ee8f3b695e	835	* @{
EricLew	0:80ee8f3b695e	836	*/
EricLew	0:80ee8f3b695e	837
EricLew	0:80ee8f3b695e	838	/**
EricLew	0:80ee8f3b695e	839	* @}
EricLew	0:80ee8f3b695e	840	*/
EricLew	0:80ee8f3b695e	841
EricLew	0:80ee8f3b695e	842	/* Exported functions --------------------------------------------------------*/
EricLew	0:80ee8f3b695e	843
EricLew	0:80ee8f3b695e	844	/** @defgroup HAL_CRYP_Aliased_Functions HAL CRYP Aliased Functions maintained for legacy purpose
EricLew	0:80ee8f3b695e	845	* @{
EricLew	0:80ee8f3b695e	846	*/
EricLew	0:80ee8f3b695e	847	#define HAL_CRYP_ComputationCpltCallback HAL_CRYPEx_ComputationCpltCallback
EricLew	0:80ee8f3b695e	848	/**
EricLew	0:80ee8f3b695e	849	* @}
EricLew	0:80ee8f3b695e	850	*/
EricLew	0:80ee8f3b695e	851
EricLew	0:80ee8f3b695e	852	/** @defgroup HAL_HASH_Aliased_Functions HAL HASH Aliased Functions maintained for legacy purpose
EricLew	0:80ee8f3b695e	853	* @{
EricLew	0:80ee8f3b695e	854	*/
EricLew	0:80ee8f3b695e	855	#define HAL_HASH_STATETypeDef HAL_HASH_StateTypeDef
EricLew	0:80ee8f3b695e	856	#define HAL_HASHPhaseTypeDef HAL_HASH_PhaseTypeDef
EricLew	0:80ee8f3b695e	857	#define HAL_HMAC_MD5_Finish HAL_HASH_MD5_Finish
EricLew	0:80ee8f3b695e	858	#define HAL_HMAC_SHA1_Finish HAL_HASH_SHA1_Finish
EricLew	0:80ee8f3b695e	859	#define HAL_HMAC_SHA224_Finish HAL_HASH_SHA224_Finish
EricLew	0:80ee8f3b695e	860	#define HAL_HMAC_SHA256_Finish HAL_HASH_SHA256_Finish
EricLew	0:80ee8f3b695e	861
EricLew	0:80ee8f3b695e	862	/HASH Algorithm Selection/
EricLew	0:80ee8f3b695e	863
EricLew	0:80ee8f3b695e	864	#define HASH_AlgoSelection_SHA1 HASH_ALGOSELECTION_SHA1
EricLew	0:80ee8f3b695e	865	#define HASH_AlgoSelection_SHA224 HASH_ALGOSELECTION_SHA224
EricLew	0:80ee8f3b695e	866	#define HASH_AlgoSelection_SHA256 HASH_ALGOSELECTION_SHA256
EricLew	0:80ee8f3b695e	867	#define HASH_AlgoSelection_MD5 HASH_ALGOSELECTION_MD5
EricLew	0:80ee8f3b695e	868
EricLew	0:80ee8f3b695e	869	#define HASH_AlgoMode_HASH HASH_ALGOMODE_HASH
EricLew	0:80ee8f3b695e	870	#define HASH_AlgoMode_HMAC HASH_ALGOMODE_HMAC
EricLew	0:80ee8f3b695e	871
EricLew	0:80ee8f3b695e	872	#define HASH_HMACKeyType_ShortKey HASH_HMAC_KEYTYPE_SHORTKEY
EricLew	0:80ee8f3b695e	873	#define HASH_HMACKeyType_LongKey HASH_HMAC_KEYTYPE_LONGKEY
EricLew	0:80ee8f3b695e	874	/**
EricLew	0:80ee8f3b695e	875	* @}
EricLew	0:80ee8f3b695e	876	*/
EricLew	0:80ee8f3b695e	877
EricLew	0:80ee8f3b695e	878	/** @defgroup HAL_Aliased_Functions HAL Generic Aliased Functions maintained for legacy purpose
EricLew	0:80ee8f3b695e	879	* @{
EricLew	0:80ee8f3b695e	880	*/
EricLew	0:80ee8f3b695e	881	#define HAL_EnableDBGSleepMode HAL_DBGMCU_EnableDBGSleepMode
EricLew	0:80ee8f3b695e	882	#define HAL_DisableDBGSleepMode HAL_DBGMCU_DisableDBGSleepMode
EricLew	0:80ee8f3b695e	883	#define HAL_EnableDBGStopMode HAL_DBGMCU_EnableDBGStopMode
EricLew	0:80ee8f3b695e	884	#define HAL_DisableDBGStopMode HAL_DBGMCU_DisableDBGStopMode
EricLew	0:80ee8f3b695e	885	#define HAL_EnableDBGStandbyMode HAL_DBGMCU_EnableDBGStandbyMode
EricLew	0:80ee8f3b695e	886	#define HAL_DisableDBGStandbyMode HAL_DBGMCU_DisableDBGStandbyMode
EricLew	0:80ee8f3b695e	887	#define HAL_DBG_LowPowerConfig(Periph, cmd) (((cmd)==ENABLE)? HAL_DBGMCU_DBG_EnableLowPowerConfig(Periph) : HAL_DBGMCU_DBG_DisableLowPowerConfig(Periph))
EricLew	0:80ee8f3b695e	888	#define HAL_VREFINT_OutputSelect HAL_SYSCFG_VREFINT_OutputSelect
EricLew	0:80ee8f3b695e	889	#define HAL_Lock_Cmd(cmd) (((cmd)==ENABLE) ? HAL_SYSCFG_Enable_Lock_VREFINT() : HAL_SYSCFG_Disable_Lock_VREFINT())
EricLew	0:80ee8f3b695e	890	#define HAL_VREFINT_Cmd(cmd) (((cmd)==ENABLE)? HAL_SYSCFG_EnableVREFINT() : HAL_SYSCFG_DisableVREFINT())
EricLew	0:80ee8f3b695e	891	#define HAL_ADC_EnableBuffer_Cmd(cmd) (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINT() : HAL_ADCEx_DisableVREFINT())
EricLew	0:80ee8f3b695e	892	#define HAL_ADC_EnableBufferSensor_Cmd(cmd) (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINTTempSensor() : HAL_ADCEx_DisableVREFINTTempSensor())
EricLew	0:80ee8f3b695e	893	/**
EricLew	0:80ee8f3b695e	894	* @}
EricLew	0:80ee8f3b695e	895	*/
EricLew	0:80ee8f3b695e	896
EricLew	0:80ee8f3b695e	897	/** @defgroup HAL_FLASH_Aliased_Functions HAL FLASH Aliased Functions maintained for legacy purpose
EricLew	0:80ee8f3b695e	898	* @{
EricLew	0:80ee8f3b695e	899	*/
EricLew	0:80ee8f3b695e	900	#define FLASH_HalfPageProgram HAL_FLASHEx_HalfPageProgram
EricLew	0:80ee8f3b695e	901	#define FLASH_EnableRunPowerDown HAL_FLASHEx_EnableRunPowerDown
EricLew	0:80ee8f3b695e	902	#define FLASH_DisableRunPowerDown HAL_FLASHEx_DisableRunPowerDown
EricLew	0:80ee8f3b695e	903	#define HAL_DATA_EEPROMEx_Unlock HAL_FLASHEx_DATAEEPROM_Unlock
EricLew	0:80ee8f3b695e	904	#define HAL_DATA_EEPROMEx_Lock HAL_FLASHEx_DATAEEPROM_Lock
EricLew	0:80ee8f3b695e	905	#define HAL_DATA_EEPROMEx_Erase HAL_FLASHEx_DATAEEPROM_Erase
EricLew	0:80ee8f3b695e	906	#define HAL_DATA_EEPROMEx_Program HAL_FLASHEx_DATAEEPROM_Program
EricLew	0:80ee8f3b695e	907
EricLew	0:80ee8f3b695e	908	/**
EricLew	0:80ee8f3b695e	909	* @}
EricLew	0:80ee8f3b695e	910	*/
EricLew	0:80ee8f3b695e	911
EricLew	0:80ee8f3b695e	912	/** @defgroup HAL_I2C_Aliased_Functions HAL I2C Aliased Functions maintained for legacy purpose
EricLew	0:80ee8f3b695e	913	* @{
EricLew	0:80ee8f3b695e	914	*/
EricLew	0:80ee8f3b695e	915	#define HAL_I2CEx_AnalogFilter_Config HAL_I2CEx_ConfigAnalogFilter
EricLew	0:80ee8f3b695e	916	#define HAL_I2CEx_DigitalFilter_Config HAL_I2CEx_ConfigDigitalFilter
EricLew	0:80ee8f3b695e	917
EricLew	0:80ee8f3b695e	918	#define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) (((cmd)==ENABLE)? HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus))
EricLew	0:80ee8f3b695e	919	/**
EricLew	0:80ee8f3b695e	920	* @}
EricLew	0:80ee8f3b695e	921	*/
EricLew	0:80ee8f3b695e	922
EricLew	0:80ee8f3b695e	923	/** @defgroup HAL_PWR_Aliased HAL PWR Aliased maintained for legacy purpose
EricLew	0:80ee8f3b695e	924	* @{
EricLew	0:80ee8f3b695e	925	*/
EricLew	0:80ee8f3b695e	926	#define HAL_PWR_PVDConfig HAL_PWR_ConfigPVD
EricLew	0:80ee8f3b695e	927	#define HAL_PWR_DisableBkUpReg HAL_PWREx_DisableBkUpReg
EricLew	0:80ee8f3b695e	928	#define HAL_PWR_DisableFlashPowerDown HAL_PWREx_DisableFlashPowerDown
EricLew	0:80ee8f3b695e	929	#define HAL_PWR_DisableVddio2Monitor HAL_PWREx_DisableVddio2Monitor
EricLew	0:80ee8f3b695e	930	#define HAL_PWR_EnableBkUpReg HAL_PWREx_EnableBkUpReg
EricLew	0:80ee8f3b695e	931	#define HAL_PWR_EnableFlashPowerDown HAL_PWREx_EnableFlashPowerDown
EricLew	0:80ee8f3b695e	932	#define HAL_PWR_EnableVddio2Monitor HAL_PWREx_EnableVddio2Monitor
EricLew	0:80ee8f3b695e	933	#define HAL_PWR_PVD_PVM_IRQHandler HAL_PWREx_PVD_PVM_IRQHandler
EricLew	0:80ee8f3b695e	934	#define HAL_PWR_PVDLevelConfig HAL_PWR_ConfigPVD
EricLew	0:80ee8f3b695e	935	#define HAL_PWR_Vddio2Monitor_IRQHandler HAL_PWREx_Vddio2Monitor_IRQHandler
EricLew	0:80ee8f3b695e	936	#define HAL_PWR_Vddio2MonitorCallback HAL_PWREx_Vddio2MonitorCallback
EricLew	0:80ee8f3b695e	937	#define HAL_PWREx_ActivateOverDrive HAL_PWREx_EnableOverDrive
EricLew	0:80ee8f3b695e	938	#define HAL_PWREx_DeactivateOverDrive HAL_PWREx_DisableOverDrive
EricLew	0:80ee8f3b695e	939	#define HAL_PWREx_DisableSDADCAnalog HAL_PWREx_DisableSDADC
EricLew	0:80ee8f3b695e	940	#define HAL_PWREx_EnableSDADCAnalog HAL_PWREx_EnableSDADC
EricLew	0:80ee8f3b695e	941	#define HAL_PWREx_PVMConfig HAL_PWREx_ConfigPVM
EricLew	0:80ee8f3b695e	942
EricLew	0:80ee8f3b695e	943	#define PWR_MODE_NORMAL PWR_PVD_MODE_NORMAL
EricLew	0:80ee8f3b695e	944	#define PWR_MODE_IT_RISING PWR_PVD_MODE_IT_RISING
EricLew	0:80ee8f3b695e	945	#define PWR_MODE_IT_FALLING PWR_PVD_MODE_IT_FALLING
EricLew	0:80ee8f3b695e	946	#define PWR_MODE_IT_RISING_FALLING PWR_PVD_MODE_IT_RISING_FALLING
EricLew	0:80ee8f3b695e	947	#define PWR_MODE_EVENT_RISING PWR_PVD_MODE_EVENT_RISING
EricLew	0:80ee8f3b695e	948	#define PWR_MODE_EVENT_FALLING PWR_PVD_MODE_EVENT_FALLING
EricLew	0:80ee8f3b695e	949	#define PWR_MODE_EVENT_RISING_FALLING PWR_PVD_MODE_EVENT_RISING_FALLING
EricLew	0:80ee8f3b695e	950
EricLew	0:80ee8f3b695e	951	#define CR_OFFSET_BB PWR_CR_OFFSET_BB
EricLew	0:80ee8f3b695e	952	#define CSR_OFFSET_BB PWR_CSR_OFFSET_BB
EricLew	0:80ee8f3b695e	953
EricLew	0:80ee8f3b695e	954	#define DBP_BitNumber DBP_BIT_NUMBER
EricLew	0:80ee8f3b695e	955	#define PVDE_BitNumber PVDE_BIT_NUMBER
EricLew	0:80ee8f3b695e	956	#define PMODE_BitNumber PMODE_BIT_NUMBER
EricLew	0:80ee8f3b695e	957	#define EWUP_BitNumber EWUP_BIT_NUMBER
EricLew	0:80ee8f3b695e	958	#define FPDS_BitNumber FPDS_BIT_NUMBER
EricLew	0:80ee8f3b695e	959	#define ODEN_BitNumber ODEN_BIT_NUMBER
EricLew	0:80ee8f3b695e	960	#define ODSWEN_BitNumber ODSWEN_BIT_NUMBER
EricLew	0:80ee8f3b695e	961	#define MRLVDS_BitNumber MRLVDS_BIT_NUMBER
EricLew	0:80ee8f3b695e	962	#define LPLVDS_BitNumber LPLVDS_BIT_NUMBER
EricLew	0:80ee8f3b695e	963	#define BRE_BitNumber BRE_BIT_NUMBER
EricLew	0:80ee8f3b695e	964
EricLew	0:80ee8f3b695e	965	#define PWR_MODE_EVT PWR_PVD_MODE_NORMAL
EricLew	0:80ee8f3b695e	966
EricLew	0:80ee8f3b695e	967	/**
EricLew	0:80ee8f3b695e	968	* @}
EricLew	0:80ee8f3b695e	969	*/
EricLew	0:80ee8f3b695e	970
EricLew	0:80ee8f3b695e	971	/** @defgroup HAL_SMBUS_Aliased_Functions HAL SMBUS Aliased Functions maintained for legacy purpose
EricLew	0:80ee8f3b695e	972	* @{
EricLew	0:80ee8f3b695e	973	*/
EricLew	0:80ee8f3b695e	974	#define HAL_SMBUS_Slave_Listen_IT HAL_SMBUS_EnableListen_IT
EricLew	0:80ee8f3b695e	975	#define HAL_SMBUS_SlaveAddrCallback HAL_SMBUS_AddrCallback
EricLew	0:80ee8f3b695e	976	#define HAL_SMBUS_SlaveListenCpltCallback HAL_SMBUS_ListenCpltCallback
EricLew	0:80ee8f3b695e	977	/**
EricLew	0:80ee8f3b695e	978	* @}
EricLew	0:80ee8f3b695e	979	*/
EricLew	0:80ee8f3b695e	980
EricLew	0:80ee8f3b695e	981	/** @defgroup HAL_SPI_Aliased_Functions HAL SPI Aliased Functions maintained for legacy purpose
EricLew	0:80ee8f3b695e	982	* @{
EricLew	0:80ee8f3b695e	983	*/
EricLew	0:80ee8f3b695e	984	#define HAL_SPI_FlushRxFifo HAL_SPIEx_FlushRxFifo
EricLew	0:80ee8f3b695e	985	/**
EricLew	0:80ee8f3b695e	986	* @}
EricLew	0:80ee8f3b695e	987	*/
EricLew	0:80ee8f3b695e	988
EricLew	0:80ee8f3b695e	989	/** @defgroup HAL_TIM_Aliased_Functions HAL TIM Aliased Functions maintained for legacy purpose
EricLew	0:80ee8f3b695e	990	* @{
EricLew	0:80ee8f3b695e	991	*/
EricLew	0:80ee8f3b695e	992	#define HAL_TIM_DMADelayPulseCplt TIM_DMADelayPulseCplt
EricLew	0:80ee8f3b695e	993	#define HAL_TIM_DMAError TIM_DMAError
EricLew	0:80ee8f3b695e	994	#define HAL_TIM_DMACaptureCplt TIM_DMACaptureCplt
EricLew	0:80ee8f3b695e	995	#define HAL_TIMEx_DMACommutationCplt TIMEx_DMACommutationCplt
EricLew	0:80ee8f3b695e	996	/**
EricLew	0:80ee8f3b695e	997	* @}
EricLew	0:80ee8f3b695e	998	*/
EricLew	0:80ee8f3b695e	999
EricLew	0:80ee8f3b695e	1000	/** @defgroup HAL_UART_Aliased_Functions HAL UART Aliased Functions maintained for legacy purpose
EricLew	0:80ee8f3b695e	1001	* @{
EricLew	0:80ee8f3b695e	1002	*/
EricLew	0:80ee8f3b695e	1003	#define HAL_UART_WakeupCallback HAL_UARTEx_WakeupCallback
EricLew	0:80ee8f3b695e	1004	/**
EricLew	0:80ee8f3b695e	1005	* @}
EricLew	0:80ee8f3b695e	1006	*/
EricLew	0:80ee8f3b695e	1007
EricLew	0:80ee8f3b695e	1008	/** @defgroup HAL_LTDC_Aliased_Functions HAL LTDC Aliased Functions maintained for legacy purpose
EricLew	0:80ee8f3b695e	1009	* @{
EricLew	0:80ee8f3b695e	1010	*/
EricLew	0:80ee8f3b695e	1011	#define HAL_LTDC_LineEvenCallback HAL_LTDC_LineEventCallback
EricLew	0:80ee8f3b695e	1012	/**
EricLew	0:80ee8f3b695e	1013	* @}
EricLew	0:80ee8f3b695e	1014	*/
EricLew	0:80ee8f3b695e	1015
EricLew	0:80ee8f3b695e	1016
EricLew	0:80ee8f3b695e	1017	/** @defgroup HAL_PPP_Aliased_Functions HAL PPP Aliased Functions maintained for legacy purpose
EricLew	0:80ee8f3b695e	1018	* @{
EricLew	0:80ee8f3b695e	1019	*/
EricLew	0:80ee8f3b695e	1020
EricLew	0:80ee8f3b695e	1021	/**
EricLew	0:80ee8f3b695e	1022	* @}
EricLew	0:80ee8f3b695e	1023	*/
EricLew	0:80ee8f3b695e	1024
EricLew	0:80ee8f3b695e	1025	/* Exported macros ------------------------------------------------------------*/
EricLew	0:80ee8f3b695e	1026
EricLew	0:80ee8f3b695e	1027	/** @defgroup HAL_AES_Aliased_Macros HAL CRYP Aliased Macros maintained for legacy purpose
EricLew	0:80ee8f3b695e	1028	* @{
EricLew	0:80ee8f3b695e	1029	*/
EricLew	0:80ee8f3b695e	1030	#define AES_IT_CC CRYP_IT_CC
EricLew	0:80ee8f3b695e	1031	#define AES_IT_ERR CRYP_IT_ERR
EricLew	0:80ee8f3b695e	1032	#define AES_FLAG_CCF CRYP_FLAG_CCF
EricLew	0:80ee8f3b695e	1033	/**
EricLew	0:80ee8f3b695e	1034	* @}
EricLew	0:80ee8f3b695e	1035	*/
EricLew	0:80ee8f3b695e	1036
EricLew	0:80ee8f3b695e	1037	/** @defgroup HAL_Aliased_Macros HAL Generic Aliased Macros maintained for legacy purpose
EricLew	0:80ee8f3b695e	1038	* @{
EricLew	0:80ee8f3b695e	1039	*/
EricLew	0:80ee8f3b695e	1040	#define __HAL_GET_BOOT_MODE __HAL_SYSCFG_GET_BOOT_MODE
EricLew	0:80ee8f3b695e	1041	#define __HAL_REMAPMEMORY_FLASH __HAL_SYSCFG_REMAPMEMORY_FLASH
EricLew	0:80ee8f3b695e	1042	#define __HAL_REMAPMEMORY_SYSTEMFLASH __HAL_SYSCFG_REMAPMEMORY_SYSTEMFLASH
EricLew	0:80ee8f3b695e	1043	#define __HAL_REMAPMEMORY_SRAM __HAL_SYSCFG_REMAPMEMORY_SRAM
EricLew	0:80ee8f3b695e	1044	#define __HAL_REMAPMEMORY_FMC __HAL_SYSCFG_REMAPMEMORY_FMC
EricLew	0:80ee8f3b695e	1045	#define __HAL_REMAPMEMORY_FMC_SDRAM __HAL_SYSCFG_REMAPMEMORY_FMC_SDRAM
EricLew	0:80ee8f3b695e	1046	#define __HAL_REMAPMEMORY_FSMC __HAL_SYSCFG_REMAPMEMORY_FSMC
EricLew	0:80ee8f3b695e	1047	#define __HAL_REMAPMEMORY_QUADSPI __HAL_SYSCFG_REMAPMEMORY_QUADSPI
EricLew	0:80ee8f3b695e	1048	#define __HAL_FMC_BANK __HAL_SYSCFG_FMC_BANK
EricLew	0:80ee8f3b695e	1049	#define __HAL_GET_FLAG __HAL_SYSCFG_GET_FLAG
EricLew	0:80ee8f3b695e	1050	#define __HAL_CLEAR_FLAG __HAL_SYSCFG_CLEAR_FLAG
EricLew	0:80ee8f3b695e	1051	#define __HAL_VREFINT_OUT_ENABLE __HAL_SYSCFG_VREFINT_OUT_ENABLE
EricLew	0:80ee8f3b695e	1052	#define __HAL_VREFINT_OUT_DISABLE __HAL_SYSCFG_VREFINT_OUT_DISABLE
EricLew	0:80ee8f3b695e	1053
EricLew	0:80ee8f3b695e	1054	#define SYSCFG_FLAG_VREF_READY SYSCFG_FLAG_VREFINT_READY
EricLew	0:80ee8f3b695e	1055	#define SYSCFG_FLAG_RC48 RCC_FLAG_HSI48
EricLew	0:80ee8f3b695e	1056	#define IS_SYSCFG_FASTMODEPLUS_CONFIG IS_I2C_FASTMODEPLUS
EricLew	0:80ee8f3b695e	1057	#define UFB_MODE_BitNumber UFB_MODE_BIT_NUMBER
EricLew	0:80ee8f3b695e	1058	#define CMP_PD_BitNumber CMP_PD_BIT_NUMBER
EricLew	0:80ee8f3b695e	1059
EricLew	0:80ee8f3b695e	1060	/**
EricLew	0:80ee8f3b695e	1061	* @}
EricLew	0:80ee8f3b695e	1062	*/
EricLew	0:80ee8f3b695e	1063
EricLew	0:80ee8f3b695e	1064
EricLew	0:80ee8f3b695e	1065	/** @defgroup HAL_ADC_Aliased_Macros HAL ADC Aliased Macros maintained for legacy purpose
EricLew	0:80ee8f3b695e	1066	* @{
EricLew	0:80ee8f3b695e	1067	*/
EricLew	0:80ee8f3b695e	1068	#define __ADC_ENABLE __HAL_ADC_ENABLE
EricLew	0:80ee8f3b695e	1069	#define __ADC_DISABLE __HAL_ADC_DISABLE
EricLew	0:80ee8f3b695e	1070	#define __HAL_ADC_ENABLING_CONDITIONS ADC_ENABLING_CONDITIONS
EricLew	0:80ee8f3b695e	1071	#define __HAL_ADC_DISABLING_CONDITIONS ADC_DISABLING_CONDITIONS
EricLew	0:80ee8f3b695e	1072	#define __HAL_ADC_IS_ENABLED ADC_IS_ENABLE
EricLew	0:80ee8f3b695e	1073	#define __ADC_IS_ENABLED ADC_IS_ENABLE
EricLew	0:80ee8f3b695e	1074	#define __HAL_ADC_IS_SOFTWARE_START_REGULAR ADC_IS_SOFTWARE_START_REGULAR
EricLew	0:80ee8f3b695e	1075	#define __HAL_ADC_IS_SOFTWARE_START_INJECTED ADC_IS_SOFTWARE_START_INJECTED
EricLew	0:80ee8f3b695e	1076	#define __HAL_ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED ADC_IS_CONVERSION_ONGOING_REGULAR_INJECTED
EricLew	0:80ee8f3b695e	1077	#define __HAL_ADC_IS_CONVERSION_ONGOING_REGULAR ADC_IS_CONVERSION_ONGOING_REGULAR
EricLew	0:80ee8f3b695e	1078	#define __HAL_ADC_IS_CONVERSION_ONGOING_INJECTED ADC_IS_CONVERSION_ONGOING_INJECTED
EricLew	0:80ee8f3b695e	1079	#define __HAL_ADC_IS_CONVERSION_ONGOING ADC_IS_CONVERSION_ONGOING
EricLew	0:80ee8f3b695e	1080	#define __HAL_ADC_CLEAR_ERRORCODE ADC_CLEAR_ERRORCODE
EricLew	0:80ee8f3b695e	1081
EricLew	0:80ee8f3b695e	1082	#define __HAL_ADC_GET_RESOLUTION ADC_GET_RESOLUTION
EricLew	0:80ee8f3b695e	1083	#define __HAL_ADC_JSQR_RK ADC_JSQR_RK
EricLew	0:80ee8f3b695e	1084	#define __HAL_ADC_CFGR_AWD1CH ADC_CFGR_AWD1CH_SHIFT
EricLew	0:80ee8f3b695e	1085	#define __HAL_ADC_CFGR_AWD23CR ADC_CFGR_AWD23CR
EricLew	0:80ee8f3b695e	1086	#define __HAL_ADC_CFGR_INJECT_AUTO_CONVERSION ADC_CFGR_INJECT_AUTO_CONVERSION
EricLew	0:80ee8f3b695e	1087	#define __HAL_ADC_CFGR_INJECT_CONTEXT_QUEUE ADC_CFGR_INJECT_CONTEXT_QUEUE
EricLew	0:80ee8f3b695e	1088	#define __HAL_ADC_CFGR_INJECT_DISCCONTINUOUS ADC_CFGR_INJECT_DISCCONTINUOUS
EricLew	0:80ee8f3b695e	1089	#define __HAL_ADC_CFGR_REG_DISCCONTINUOUS ADC_CFGR_REG_DISCCONTINUOUS
EricLew	0:80ee8f3b695e	1090	#define __HAL_ADC_CFGR_DISCONTINUOUS_NUM ADC_CFGR_DISCONTINUOUS_NUM
EricLew	0:80ee8f3b695e	1091	#define __HAL_ADC_CFGR_AUTOWAIT ADC_CFGR_AUTOWAIT
EricLew	0:80ee8f3b695e	1092	#define __HAL_ADC_CFGR_CONTINUOUS ADC_CFGR_CONTINUOUS
EricLew	0:80ee8f3b695e	1093	#define __HAL_ADC_CFGR_OVERRUN ADC_CFGR_OVERRUN
EricLew	0:80ee8f3b695e	1094	#define __HAL_ADC_CFGR_DMACONTREQ ADC_CFGR_DMACONTREQ
EricLew	0:80ee8f3b695e	1095	#define __HAL_ADC_CFGR_EXTSEL ADC_CFGR_EXTSEL_SET
EricLew	0:80ee8f3b695e	1096	#define __HAL_ADC_JSQR_JEXTSEL ADC_JSQR_JEXTSEL_SET
EricLew	0:80ee8f3b695e	1097	#define __HAL_ADC_OFR_CHANNEL ADC_OFR_CHANNEL
EricLew	0:80ee8f3b695e	1098	#define __HAL_ADC_DIFSEL_CHANNEL ADC_DIFSEL_CHANNEL
EricLew	0:80ee8f3b695e	1099	#define __HAL_ADC_CALFACT_DIFF_SET ADC_CALFACT_DIFF_SET
EricLew	0:80ee8f3b695e	1100	#define __HAL_ADC_CALFACT_DIFF_GET ADC_CALFACT_DIFF_GET
EricLew	0:80ee8f3b695e	1101	#define __HAL_ADC_TRX_HIGHTHRESHOLD ADC_TRX_HIGHTHRESHOLD
EricLew	0:80ee8f3b695e	1102
EricLew	0:80ee8f3b695e	1103	#define __HAL_ADC_OFFSET_SHIFT_RESOLUTION ADC_OFFSET_SHIFT_RESOLUTION
EricLew	0:80ee8f3b695e	1104	#define __HAL_ADC_AWD1THRESHOLD_SHIFT_RESOLUTION ADC_AWD1THRESHOLD_SHIFT_RESOLUTION
EricLew	0:80ee8f3b695e	1105	#define __HAL_ADC_AWD23THRESHOLD_SHIFT_RESOLUTION ADC_AWD23THRESHOLD_SHIFT_RESOLUTION
EricLew	0:80ee8f3b695e	1106	#define __HAL_ADC_COMMON_REGISTER ADC_COMMON_REGISTER
EricLew	0:80ee8f3b695e	1107	#define __HAL_ADC_COMMON_CCR_MULTI ADC_COMMON_CCR_MULTI
EricLew	0:80ee8f3b695e	1108	#define __HAL_ADC_MULTIMODE_IS_ENABLED ADC_MULTIMODE_IS_ENABLE
EricLew	0:80ee8f3b695e	1109	#define __ADC_MULTIMODE_IS_ENABLED ADC_MULTIMODE_IS_ENABLE
EricLew	0:80ee8f3b695e	1110	#define __HAL_ADC_NONMULTIMODE_OR_MULTIMODEMASTER ADC_NONMULTIMODE_OR_MULTIMODEMASTER
EricLew	0:80ee8f3b695e	1111	#define __HAL_ADC_COMMON_ADC_OTHER ADC_COMMON_ADC_OTHER
EricLew	0:80ee8f3b695e	1112	#define __HAL_ADC_MULTI_SLAVE ADC_MULTI_SLAVE
EricLew	0:80ee8f3b695e	1113
EricLew	0:80ee8f3b695e	1114	#define __HAL_ADC_SQR1_L ADC_SQR1_L_SHIFT
EricLew	0:80ee8f3b695e	1115	#define __HAL_ADC_JSQR_JL ADC_JSQR_JL_SHIFT
EricLew	0:80ee8f3b695e	1116	#define __HAL_ADC_JSQR_RK_JL ADC_JSQR_RK_JL
EricLew	0:80ee8f3b695e	1117	#define __HAL_ADC_CR1_DISCONTINUOUS_NUM ADC_CR1_DISCONTINUOUS_NUM
EricLew	0:80ee8f3b695e	1118	#define __HAL_ADC_CR1_SCAN ADC_CR1_SCAN_SET
EricLew	0:80ee8f3b695e	1119	#define __HAL_ADC_CONVCYCLES_MAX_RANGE ADC_CONVCYCLES_MAX_RANGE
EricLew	0:80ee8f3b695e	1120	#define __HAL_ADC_CLOCK_PRESCALER_RANGE ADC_CLOCK_PRESCALER_RANGE
EricLew	0:80ee8f3b695e	1121	#define __HAL_ADC_GET_CLOCK_PRESCALER ADC_GET_CLOCK_PRESCALER
EricLew	0:80ee8f3b695e	1122
EricLew	0:80ee8f3b695e	1123	#define __HAL_ADC_SQR1 ADC_SQR1
EricLew	0:80ee8f3b695e	1124	#define __HAL_ADC_SMPR1 ADC_SMPR1
EricLew	0:80ee8f3b695e	1125	#define __HAL_ADC_SMPR2 ADC_SMPR2
EricLew	0:80ee8f3b695e	1126	#define __HAL_ADC_SQR3_RK ADC_SQR3_RK
EricLew	0:80ee8f3b695e	1127	#define __HAL_ADC_SQR2_RK ADC_SQR2_RK
EricLew	0:80ee8f3b695e	1128	#define __HAL_ADC_SQR1_RK ADC_SQR1_RK
EricLew	0:80ee8f3b695e	1129	#define __HAL_ADC_CR2_CONTINUOUS ADC_CR2_CONTINUOUS
EricLew	0:80ee8f3b695e	1130	#define __HAL_ADC_CR1_DISCONTINUOUS ADC_CR1_DISCONTINUOUS
EricLew	0:80ee8f3b695e	1131	#define __HAL_ADC_CR1_SCANCONV ADC_CR1_SCANCONV
EricLew	0:80ee8f3b695e	1132	#define __HAL_ADC_CR2_EOCSelection ADC_CR2_EOCSelection
EricLew	0:80ee8f3b695e	1133	#define __HAL_ADC_CR2_DMAContReq ADC_CR2_DMAContReq
EricLew	0:80ee8f3b695e	1134	#define __HAL_ADC_GET_RESOLUTION ADC_GET_RESOLUTION
EricLew	0:80ee8f3b695e	1135	#define __HAL_ADC_JSQR ADC_JSQR
EricLew	0:80ee8f3b695e	1136
EricLew	0:80ee8f3b695e	1137	#define __HAL_ADC_CHSELR_CHANNEL ADC_CHSELR_CHANNEL
EricLew	0:80ee8f3b695e	1138	#define __HAL_ADC_CFGR1_REG_DISCCONTINUOUS ADC_CFGR1_REG_DISCCONTINUOUS
EricLew	0:80ee8f3b695e	1139	#define __HAL_ADC_CFGR1_AUTOOFF ADC_CFGR1_AUTOOFF
EricLew	0:80ee8f3b695e	1140	#define __HAL_ADC_CFGR1_AUTOWAIT ADC_CFGR1_AUTOWAIT
EricLew	0:80ee8f3b695e	1141	#define __HAL_ADC_CFGR1_CONTINUOUS ADC_CFGR1_CONTINUOUS
EricLew	0:80ee8f3b695e	1142	#define __HAL_ADC_CFGR1_OVERRUN ADC_CFGR1_OVERRUN
EricLew	0:80ee8f3b695e	1143	#define __HAL_ADC_CFGR1_SCANDIR ADC_CFGR1_SCANDIR
EricLew	0:80ee8f3b695e	1144	#define __HAL_ADC_CFGR1_DMACONTREQ ADC_CFGR1_DMACONTREQ
EricLew	0:80ee8f3b695e	1145
EricLew	0:80ee8f3b695e	1146	/**
EricLew	0:80ee8f3b695e	1147	* @}
EricLew	0:80ee8f3b695e	1148	*/
EricLew	0:80ee8f3b695e	1149
EricLew	0:80ee8f3b695e	1150	/** @defgroup HAL_DAC_Aliased_Macros HAL DAC Aliased Macros maintained for legacy purpose
EricLew	0:80ee8f3b695e	1151	* @{
EricLew	0:80ee8f3b695e	1152	*/
EricLew	0:80ee8f3b695e	1153	#define __HAL_DHR12R1_ALIGNEMENT DAC_DHR12R1_ALIGNMENT
EricLew	0:80ee8f3b695e	1154	#define __HAL_DHR12R2_ALIGNEMENT DAC_DHR12R2_ALIGNMENT
EricLew	0:80ee8f3b695e	1155	#define __HAL_DHR12RD_ALIGNEMENT DAC_DHR12RD_ALIGNMENT
EricLew	0:80ee8f3b695e	1156	#define IS_DAC_GENERATE_WAVE IS_DAC_WAVE
EricLew	0:80ee8f3b695e	1157
EricLew	0:80ee8f3b695e	1158	/**
EricLew	0:80ee8f3b695e	1159	* @}
EricLew	0:80ee8f3b695e	1160	*/
EricLew	0:80ee8f3b695e	1161
EricLew	0:80ee8f3b695e	1162	/** @defgroup HAL_DBGMCU_Aliased_Macros HAL DBGMCU Aliased Macros maintained for legacy purpose
EricLew	0:80ee8f3b695e	1163	* @{
EricLew	0:80ee8f3b695e	1164	*/
EricLew	0:80ee8f3b695e	1165	#define __HAL_FREEZE_TIM1_DBGMCU __HAL_DBGMCU_FREEZE_TIM1
EricLew	0:80ee8f3b695e	1166	#define __HAL_UNFREEZE_TIM1_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM1
EricLew	0:80ee8f3b695e	1167	#define __HAL_FREEZE_TIM2_DBGMCU __HAL_DBGMCU_FREEZE_TIM2
EricLew	0:80ee8f3b695e	1168	#define __HAL_UNFREEZE_TIM2_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM2
EricLew	0:80ee8f3b695e	1169	#define __HAL_FREEZE_TIM3_DBGMCU __HAL_DBGMCU_FREEZE_TIM3
EricLew	0:80ee8f3b695e	1170	#define __HAL_UNFREEZE_TIM3_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM3
EricLew	0:80ee8f3b695e	1171	#define __HAL_FREEZE_TIM4_DBGMCU __HAL_DBGMCU_FREEZE_TIM4
EricLew	0:80ee8f3b695e	1172	#define __HAL_UNFREEZE_TIM4_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM4
EricLew	0:80ee8f3b695e	1173	#define __HAL_FREEZE_TIM5_DBGMCU __HAL_DBGMCU_FREEZE_TIM5
EricLew	0:80ee8f3b695e	1174	#define __HAL_UNFREEZE_TIM5_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM5
EricLew	0:80ee8f3b695e	1175	#define __HAL_FREEZE_TIM6_DBGMCU __HAL_DBGMCU_FREEZE_TIM6
EricLew	0:80ee8f3b695e	1176	#define __HAL_UNFREEZE_TIM6_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM6
EricLew	0:80ee8f3b695e	1177	#define __HAL_FREEZE_TIM7_DBGMCU __HAL_DBGMCU_FREEZE_TIM7
EricLew	0:80ee8f3b695e	1178	#define __HAL_UNFREEZE_TIM7_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM7
EricLew	0:80ee8f3b695e	1179	#define __HAL_FREEZE_TIM8_DBGMCU __HAL_DBGMCU_FREEZE_TIM8
EricLew	0:80ee8f3b695e	1180	#define __HAL_UNFREEZE_TIM8_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM8
EricLew	0:80ee8f3b695e	1181
EricLew	0:80ee8f3b695e	1182	#define __HAL_FREEZE_TIM9_DBGMCU __HAL_DBGMCU_FREEZE_TIM9
EricLew	0:80ee8f3b695e	1183	#define __HAL_UNFREEZE_TIM9_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM9
EricLew	0:80ee8f3b695e	1184	#define __HAL_FREEZE_TIM10_DBGMCU __HAL_DBGMCU_FREEZE_TIM10
EricLew	0:80ee8f3b695e	1185	#define __HAL_UNFREEZE_TIM10_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM10
EricLew	0:80ee8f3b695e	1186	#define __HAL_FREEZE_TIM11_DBGMCU __HAL_DBGMCU_FREEZE_TIM11
EricLew	0:80ee8f3b695e	1187	#define __HAL_UNFREEZE_TIM11_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM11
EricLew	0:80ee8f3b695e	1188	#define __HAL_FREEZE_TIM12_DBGMCU __HAL_DBGMCU_FREEZE_TIM12
EricLew	0:80ee8f3b695e	1189	#define __HAL_UNFREEZE_TIM12_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM12
EricLew	0:80ee8f3b695e	1190	#define __HAL_FREEZE_TIM13_DBGMCU __HAL_DBGMCU_FREEZE_TIM13
EricLew	0:80ee8f3b695e	1191	#define __HAL_UNFREEZE_TIM13_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM13
EricLew	0:80ee8f3b695e	1192	#define __HAL_FREEZE_TIM14_DBGMCU __HAL_DBGMCU_FREEZE_TIM14
EricLew	0:80ee8f3b695e	1193	#define __HAL_UNFREEZE_TIM14_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM14
EricLew	0:80ee8f3b695e	1194	#define __HAL_FREEZE_CAN2_DBGMCU __HAL_DBGMCU_FREEZE_CAN2
EricLew	0:80ee8f3b695e	1195	#define __HAL_UNFREEZE_CAN2_DBGMCU __HAL_DBGMCU_UNFREEZE_CAN2
EricLew	0:80ee8f3b695e	1196
EricLew	0:80ee8f3b695e	1197
EricLew	0:80ee8f3b695e	1198	#define __HAL_FREEZE_TIM15_DBGMCU __HAL_DBGMCU_FREEZE_TIM15
EricLew	0:80ee8f3b695e	1199	#define __HAL_UNFREEZE_TIM15_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM15
EricLew	0:80ee8f3b695e	1200	#define __HAL_FREEZE_TIM16_DBGMCU __HAL_DBGMCU_FREEZE_TIM16
EricLew	0:80ee8f3b695e	1201	#define __HAL_UNFREEZE_TIM16_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM16
EricLew	0:80ee8f3b695e	1202	#define __HAL_FREEZE_TIM17_DBGMCU __HAL_DBGMCU_FREEZE_TIM17
EricLew	0:80ee8f3b695e	1203	#define __HAL_UNFREEZE_TIM17_DBGMCU __HAL_DBGMCU_UNFREEZE_TIM17
EricLew	0:80ee8f3b695e	1204	#define __HAL_FREEZE_RTC_DBGMCU __HAL_DBGMCU_FREEZE_RTC
EricLew	0:80ee8f3b695e	1205	#define __HAL_UNFREEZE_RTC_DBGMCU __HAL_DBGMCU_UNFREEZE_RTC
EricLew	0:80ee8f3b695e	1206	#define __HAL_FREEZE_WWDG_DBGMCU __HAL_DBGMCU_FREEZE_WWDG
EricLew	0:80ee8f3b695e	1207	#define __HAL_UNFREEZE_WWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_WWDG
EricLew	0:80ee8f3b695e	1208	#define __HAL_FREEZE_IWDG_DBGMCU __HAL_DBGMCU_FREEZE_IWDG
EricLew	0:80ee8f3b695e	1209	#define __HAL_UNFREEZE_IWDG_DBGMCU __HAL_DBGMCU_UNFREEZE_IWDG
EricLew	0:80ee8f3b695e	1210	#define __HAL_FREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C1_TIMEOUT
EricLew	0:80ee8f3b695e	1211	#define __HAL_UNFREEZE_I2C1_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C1_TIMEOUT
EricLew	0:80ee8f3b695e	1212	#define __HAL_FREEZE_I2C2_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C2_TIMEOUT
EricLew	0:80ee8f3b695e	1213	#define __HAL_UNFREEZE_I2C2_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C2_TIMEOUT
EricLew	0:80ee8f3b695e	1214	#define __HAL_FREEZE_I2C3_TIMEOUT_DBGMCU __HAL_DBGMCU_FREEZE_I2C3_TIMEOUT
EricLew	0:80ee8f3b695e	1215	#define __HAL_UNFREEZE_I2C3_TIMEOUT_DBGMCU __HAL_DBGMCU_UNFREEZE_I2C3_TIMEOUT
EricLew	0:80ee8f3b695e	1216	#define __HAL_FREEZE_CAN1_DBGMCU __HAL_DBGMCU_FREEZE_CAN1
EricLew	0:80ee8f3b695e	1217	#define __HAL_UNFREEZE_CAN1_DBGMCU __HAL_DBGMCU_UNFREEZE_CAN1
EricLew	0:80ee8f3b695e	1218	#define __HAL_FREEZE_LPTIM1_DBGMCU __HAL_DBGMCU_FREEZE_LPTIM1
EricLew	0:80ee8f3b695e	1219	#define __HAL_UNFREEZE_LPTIM1_DBGMCU __HAL_DBGMCU_UNFREEZE_LPTIM1
EricLew	0:80ee8f3b695e	1220	#define __HAL_FREEZE_LPTIM2_DBGMCU __HAL_DBGMCU_FREEZE_LPTIM2
EricLew	0:80ee8f3b695e	1221	#define __HAL_UNFREEZE_LPTIM2_DBGMCU __HAL_DBGMCU_UNFREEZE_LPTIM2
EricLew	0:80ee8f3b695e	1222
EricLew	0:80ee8f3b695e	1223	/**
EricLew	0:80ee8f3b695e	1224	* @}
EricLew	0:80ee8f3b695e	1225	*/
EricLew	0:80ee8f3b695e	1226
EricLew	0:80ee8f3b695e	1227	/** @defgroup HAL_COMP_Aliased_Macros HAL COMP Aliased Macros maintained for legacy purpose
EricLew	0:80ee8f3b695e	1228	* @{
EricLew	0:80ee8f3b695e	1229	*/
EricLew	0:80ee8f3b695e	1230	#if defined(STM32F3)
EricLew	0:80ee8f3b695e	1231	#define COMP_START __HAL_COMP_ENABLE
EricLew	0:80ee8f3b695e	1232	#define COMP_STOP __HAL_COMP_DISABLE
EricLew	0:80ee8f3b695e	1233	#define COMP_LOCK __HAL_COMP_LOCK
EricLew	0:80ee8f3b695e	1234
EricLew	0:80ee8f3b695e	1235	#if defined(STM32F301x8) \|\| defined(STM32F302x8) \|\| defined(STM32F318xx) \|\| defined(STM32F303x8) \|\| defined(STM32F334x8) \|\| defined(STM32F328xx)
EricLew	0:80ee8f3b695e	1236	#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \
EricLew	0:80ee8f3b695e	1237	((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \
EricLew	0:80ee8f3b695e	1238	__HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE())
EricLew	0:80ee8f3b695e	1239	#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() : \
EricLew	0:80ee8f3b695e	1240	((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() : \
EricLew	0:80ee8f3b695e	1241	__HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE())
EricLew	0:80ee8f3b695e	1242	#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() : \
EricLew	0:80ee8f3b695e	1243	((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() : \
EricLew	0:80ee8f3b695e	1244	__HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE())
EricLew	0:80ee8f3b695e	1245	#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() : \
EricLew	0:80ee8f3b695e	1246	((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() : \
EricLew	0:80ee8f3b695e	1247	__HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE())
EricLew	0:80ee8f3b695e	1248	#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() : \
EricLew	0:80ee8f3b695e	1249	((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() : \
EricLew	0:80ee8f3b695e	1250	__HAL_COMP_COMP6_EXTI_ENABLE_IT())
EricLew	0:80ee8f3b695e	1251	#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() : \
EricLew	0:80ee8f3b695e	1252	((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() : \
EricLew	0:80ee8f3b695e	1253	__HAL_COMP_COMP6_EXTI_DISABLE_IT())
EricLew	0:80ee8f3b695e	1254	#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() : \
EricLew	0:80ee8f3b695e	1255	((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() : \
EricLew	0:80ee8f3b695e	1256	__HAL_COMP_COMP6_EXTI_GET_FLAG())
EricLew	0:80ee8f3b695e	1257	#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \
EricLew	0:80ee8f3b695e	1258	((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \
EricLew	0:80ee8f3b695e	1259	__HAL_COMP_COMP6_EXTI_CLEAR_FLAG())
EricLew	0:80ee8f3b695e	1260	# endif
EricLew	0:80ee8f3b695e	1261	# if defined(STM32F302xE) \|\| defined(STM32F302xC)
EricLew	0:80ee8f3b695e	1262	#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
EricLew	0:80ee8f3b695e	1263	((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \
EricLew	0:80ee8f3b695e	1264	((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \
EricLew	0:80ee8f3b695e	1265	__HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE())
EricLew	0:80ee8f3b695e	1266	#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \
EricLew	0:80ee8f3b695e	1267	((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() : \
EricLew	0:80ee8f3b695e	1268	((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() : \
EricLew	0:80ee8f3b695e	1269	__HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE())
EricLew	0:80ee8f3b695e	1270	#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \
EricLew	0:80ee8f3b695e	1271	((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() : \
EricLew	0:80ee8f3b695e	1272	((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() : \
EricLew	0:80ee8f3b695e	1273	__HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE())
EricLew	0:80ee8f3b695e	1274	#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() : \
EricLew	0:80ee8f3b695e	1275	((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() : \
EricLew	0:80ee8f3b695e	1276	((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() : \
EricLew	0:80ee8f3b695e	1277	__HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE())
EricLew	0:80ee8f3b695e	1278	#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \
EricLew	0:80ee8f3b695e	1279	((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() : \
EricLew	0:80ee8f3b695e	1280	((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() : \
EricLew	0:80ee8f3b695e	1281	__HAL_COMP_COMP6_EXTI_ENABLE_IT())
EricLew	0:80ee8f3b695e	1282	#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \
EricLew	0:80ee8f3b695e	1283	((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() : \
EricLew	0:80ee8f3b695e	1284	((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() : \
EricLew	0:80ee8f3b695e	1285	__HAL_COMP_COMP6_EXTI_DISABLE_IT())
EricLew	0:80ee8f3b695e	1286	#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \
EricLew	0:80ee8f3b695e	1287	((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() : \
EricLew	0:80ee8f3b695e	1288	((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() : \
EricLew	0:80ee8f3b695e	1289	__HAL_COMP_COMP6_EXTI_GET_FLAG())
EricLew	0:80ee8f3b695e	1290	#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \
EricLew	0:80ee8f3b695e	1291	((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \
EricLew	0:80ee8f3b695e	1292	((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \
EricLew	0:80ee8f3b695e	1293	__HAL_COMP_COMP6_EXTI_CLEAR_FLAG())
EricLew	0:80ee8f3b695e	1294	# endif
EricLew	0:80ee8f3b695e	1295	# if defined(STM32F303xE) \|\| defined(STM32F398xx) \|\| defined(STM32F303xC) \|\| defined(STM32F358xx)
EricLew	0:80ee8f3b695e	1296	#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
EricLew	0:80ee8f3b695e	1297	((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE() : \
EricLew	0:80ee8f3b695e	1298	((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_RISING_EDGE() : \
EricLew	0:80ee8f3b695e	1299	((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_RISING_EDGE() : \
EricLew	0:80ee8f3b695e	1300	((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_RISING_EDGE() : \
EricLew	0:80ee8f3b695e	1301	((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_RISING_EDGE() : \
EricLew	0:80ee8f3b695e	1302	__HAL_COMP_COMP7_EXTI_ENABLE_RISING_EDGE())
EricLew	0:80ee8f3b695e	1303	#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \
EricLew	0:80ee8f3b695e	1304	((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE() : \
EricLew	0:80ee8f3b695e	1305	((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_RISING_EDGE() : \
EricLew	0:80ee8f3b695e	1306	((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_RISING_EDGE() : \
EricLew	0:80ee8f3b695e	1307	((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_RISING_EDGE() : \
EricLew	0:80ee8f3b695e	1308	((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_RISING_EDGE() : \
EricLew	0:80ee8f3b695e	1309	__HAL_COMP_COMP7_EXTI_DISABLE_RISING_EDGE())
EricLew	0:80ee8f3b695e	1310	#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \
EricLew	0:80ee8f3b695e	1311	((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE() : \
EricLew	0:80ee8f3b695e	1312	((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_FALLING_EDGE() : \
EricLew	0:80ee8f3b695e	1313	((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_FALLING_EDGE() : \
EricLew	0:80ee8f3b695e	1314	((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_FALLING_EDGE() : \
EricLew	0:80ee8f3b695e	1315	((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_FALLING_EDGE() : \
EricLew	0:80ee8f3b695e	1316	__HAL_COMP_COMP7_EXTI_ENABLE_FALLING_EDGE())
EricLew	0:80ee8f3b695e	1317	#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() : \
EricLew	0:80ee8f3b695e	1318	((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE() : \
EricLew	0:80ee8f3b695e	1319	((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_FALLING_EDGE() : \
EricLew	0:80ee8f3b695e	1320	((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_FALLING_EDGE() : \
EricLew	0:80ee8f3b695e	1321	((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_FALLING_EDGE() : \
EricLew	0:80ee8f3b695e	1322	((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_FALLING_EDGE() : \
EricLew	0:80ee8f3b695e	1323	__HAL_COMP_COMP7_EXTI_DISABLE_FALLING_EDGE())
EricLew	0:80ee8f3b695e	1324	#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \
EricLew	0:80ee8f3b695e	1325	((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_ENABLE_IT() : \
EricLew	0:80ee8f3b695e	1326	((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_ENABLE_IT() : \
EricLew	0:80ee8f3b695e	1327	((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_ENABLE_IT() : \
EricLew	0:80ee8f3b695e	1328	((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_ENABLE_IT() : \
EricLew	0:80ee8f3b695e	1329	((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_ENABLE_IT() : \
EricLew	0:80ee8f3b695e	1330	__HAL_COMP_COMP7_EXTI_ENABLE_IT())
EricLew	0:80ee8f3b695e	1331	#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \
EricLew	0:80ee8f3b695e	1332	((__EXTILINE__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_DISABLE_IT() : \
EricLew	0:80ee8f3b695e	1333	((__EXTILINE__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_DISABLE_IT() : \
EricLew	0:80ee8f3b695e	1334	((__EXTILINE__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_DISABLE_IT() : \
EricLew	0:80ee8f3b695e	1335	((__EXTILINE__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_DISABLE_IT() : \
EricLew	0:80ee8f3b695e	1336	((__EXTILINE__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_DISABLE_IT() : \
EricLew	0:80ee8f3b695e	1337	__HAL_COMP_COMP7_EXTI_DISABLE_IT())
EricLew	0:80ee8f3b695e	1338	#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \
EricLew	0:80ee8f3b695e	1339	((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_GET_FLAG() : \
EricLew	0:80ee8f3b695e	1340	((__FLAG__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_GET_FLAG() : \
EricLew	0:80ee8f3b695e	1341	((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_GET_FLAG() : \
EricLew	0:80ee8f3b695e	1342	((__FLAG__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_GET_FLAG() : \
EricLew	0:80ee8f3b695e	1343	((__FLAG__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_GET_FLAG() : \
EricLew	0:80ee8f3b695e	1344	__HAL_COMP_COMP7_EXTI_GET_FLAG())
EricLew	0:80ee8f3b695e	1345	#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \
EricLew	0:80ee8f3b695e	1346	((__FLAG__) == COMP_EXTI_LINE_COMP2) ? __HAL_COMP_COMP2_EXTI_CLEAR_FLAG() : \
EricLew	0:80ee8f3b695e	1347	((__FLAG__) == COMP_EXTI_LINE_COMP3) ? __HAL_COMP_COMP3_EXTI_CLEAR_FLAG() : \
EricLew	0:80ee8f3b695e	1348	((__FLAG__) == COMP_EXTI_LINE_COMP4) ? __HAL_COMP_COMP4_EXTI_CLEAR_FLAG() : \
EricLew	0:80ee8f3b695e	1349	((__FLAG__) == COMP_EXTI_LINE_COMP5) ? __HAL_COMP_COMP5_EXTI_CLEAR_FLAG() : \
EricLew	0:80ee8f3b695e	1350	((__FLAG__) == COMP_EXTI_LINE_COMP6) ? __HAL_COMP_COMP6_EXTI_CLEAR_FLAG() : \
EricLew	0:80ee8f3b695e	1351	__HAL_COMP_COMP7_EXTI_CLEAR_FLAG())
EricLew	0:80ee8f3b695e	1352	# endif
EricLew	0:80ee8f3b695e	1353	# if defined(STM32F373xC) \|\|defined(STM32F378xx)
EricLew	0:80ee8f3b695e	1354	#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
EricLew	0:80ee8f3b695e	1355	__HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE())
EricLew	0:80ee8f3b695e	1356	#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \
EricLew	0:80ee8f3b695e	1357	__HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE())
EricLew	0:80ee8f3b695e	1358	#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \
EricLew	0:80ee8f3b695e	1359	__HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE())
EricLew	0:80ee8f3b695e	1360	#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() : \
EricLew	0:80ee8f3b695e	1361	__HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE())
EricLew	0:80ee8f3b695e	1362	#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \
EricLew	0:80ee8f3b695e	1363	__HAL_COMP_COMP2_EXTI_ENABLE_IT())
EricLew	0:80ee8f3b695e	1364	#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \
EricLew	0:80ee8f3b695e	1365	__HAL_COMP_COMP2_EXTI_DISABLE_IT())
EricLew	0:80ee8f3b695e	1366	#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \
EricLew	0:80ee8f3b695e	1367	__HAL_COMP_COMP2_EXTI_GET_FLAG())
EricLew	0:80ee8f3b695e	1368	#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \
EricLew	0:80ee8f3b695e	1369	__HAL_COMP_COMP2_EXTI_CLEAR_FLAG())
EricLew	0:80ee8f3b695e	1370	# endif
EricLew	0:80ee8f3b695e	1371	#else
EricLew	0:80ee8f3b695e	1372	#define __HAL_COMP_EXTI_RISING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_RISING_EDGE() : \
EricLew	0:80ee8f3b695e	1373	__HAL_COMP_COMP2_EXTI_ENABLE_RISING_EDGE())
EricLew	0:80ee8f3b695e	1374	#define __HAL_COMP_EXTI_RISING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_RISING_EDGE() : \
EricLew	0:80ee8f3b695e	1375	__HAL_COMP_COMP2_EXTI_DISABLE_RISING_EDGE())
EricLew	0:80ee8f3b695e	1376	#define __HAL_COMP_EXTI_FALLING_IT_ENABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_FALLING_EDGE() : \
EricLew	0:80ee8f3b695e	1377	__HAL_COMP_COMP2_EXTI_ENABLE_FALLING_EDGE())
EricLew	0:80ee8f3b695e	1378	#define __HAL_COMP_EXTI_FALLING_IT_DISABLE(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_FALLING_EDGE() : \
EricLew	0:80ee8f3b695e	1379	__HAL_COMP_COMP2_EXTI_DISABLE_FALLING_EDGE())
EricLew	0:80ee8f3b695e	1380	#define __HAL_COMP_EXTI_ENABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_ENABLE_IT() : \
EricLew	0:80ee8f3b695e	1381	__HAL_COMP_COMP2_EXTI_ENABLE_IT())
EricLew	0:80ee8f3b695e	1382	#define __HAL_COMP_EXTI_DISABLE_IT(__EXTILINE__) (((__EXTILINE__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_DISABLE_IT() : \
EricLew	0:80ee8f3b695e	1383	__HAL_COMP_COMP2_EXTI_DISABLE_IT())
EricLew	0:80ee8f3b695e	1384	#define __HAL_COMP_EXTI_GET_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_GET_FLAG() : \
EricLew	0:80ee8f3b695e	1385	__HAL_COMP_COMP2_EXTI_GET_FLAG())
EricLew	0:80ee8f3b695e	1386	#define __HAL_COMP_EXTI_CLEAR_FLAG(__FLAG__) (((__FLAG__) == COMP_EXTI_LINE_COMP1) ? __HAL_COMP_COMP1_EXTI_CLEAR_FLAG() : \
EricLew	0:80ee8f3b695e	1387	__HAL_COMP_COMP2_EXTI_CLEAR_FLAG())
EricLew	0:80ee8f3b695e	1388	#endif
EricLew	0:80ee8f3b695e	1389
EricLew	0:80ee8f3b695e	1390	#define __HAL_COMP_GET_EXTI_LINE COMP_GET_EXTI_LINE
EricLew	0:80ee8f3b695e	1391
EricLew	0:80ee8f3b695e	1392	/**
EricLew	0:80ee8f3b695e	1393	* @}
EricLew	0:80ee8f3b695e	1394	*/
EricLew	0:80ee8f3b695e	1395
EricLew	0:80ee8f3b695e	1396	/** @defgroup HAL_DAC_Aliased_Macros HAL DAC Aliased Macros maintained for legacy purpose
EricLew	0:80ee8f3b695e	1397	* @{
EricLew	0:80ee8f3b695e	1398	*/
EricLew	0:80ee8f3b695e	1399
EricLew	0:80ee8f3b695e	1400	#define IS_DAC_WAVE(WAVE) (((WAVE) == DAC_WAVE_NONE) \|\| \
EricLew	0:80ee8f3b695e	1401	((WAVE) == DAC_WAVE_NOISE)\|\| \
EricLew	0:80ee8f3b695e	1402	((WAVE) == DAC_WAVE_TRIANGLE))
EricLew	0:80ee8f3b695e	1403
EricLew	0:80ee8f3b695e	1404	/**
EricLew	0:80ee8f3b695e	1405	* @}
EricLew	0:80ee8f3b695e	1406	*/
EricLew	0:80ee8f3b695e	1407
EricLew	0:80ee8f3b695e	1408	/** @defgroup HAL_FLASH_Aliased_Macros HAL FLASH Aliased Macros maintained for legacy purpose
EricLew	0:80ee8f3b695e	1409	* @{
EricLew	0:80ee8f3b695e	1410	*/
EricLew	0:80ee8f3b695e	1411
EricLew	0:80ee8f3b695e	1412	#define IS_WRPAREA IS_OB_WRPAREA
EricLew	0:80ee8f3b695e	1413	#define IS_TYPEPROGRAM IS_FLASH_TYPEPROGRAM
EricLew	0:80ee8f3b695e	1414	#define IS_TYPEPROGRAMFLASH IS_FLASH_TYPEPROGRAM
EricLew	0:80ee8f3b695e	1415	#define IS_TYPEERASE IS_FLASH_TYPEERASE
EricLew	0:80ee8f3b695e	1416	#define IS_NBSECTORS IS_FLASH_NBSECTORS
EricLew	0:80ee8f3b695e	1417	#define IS_OB_WDG_SOURCE IS_OB_IWDG_SOURCE
EricLew	0:80ee8f3b695e	1418
EricLew	0:80ee8f3b695e	1419	/**
EricLew	0:80ee8f3b695e	1420	* @}
EricLew	0:80ee8f3b695e	1421	*/
EricLew	0:80ee8f3b695e	1422
EricLew	0:80ee8f3b695e	1423	/** @defgroup HAL_I2C_Aliased_Macros HAL I2C Aliased Macros maintained for legacy purpose
EricLew	0:80ee8f3b695e	1424	* @{
EricLew	0:80ee8f3b695e	1425	*/
EricLew	0:80ee8f3b695e	1426
EricLew	0:80ee8f3b695e	1427	#define __HAL_I2C_RESET_CR2 I2C_RESET_CR2
EricLew	0:80ee8f3b695e	1428	#define __HAL_I2C_GENERATE_START I2C_GENERATE_START
EricLew	0:80ee8f3b695e	1429	#define __HAL_I2C_FREQ_RANGE I2C_FREQ_RANGE
EricLew	0:80ee8f3b695e	1430	#define __HAL_I2C_RISE_TIME I2C_RISE_TIME
EricLew	0:80ee8f3b695e	1431	#define __HAL_I2C_SPEED_STANDARD I2C_SPEED_STANDARD
EricLew	0:80ee8f3b695e	1432	#define __HAL_I2C_SPEED_FAST I2C_SPEED_FAST
EricLew	0:80ee8f3b695e	1433	#define __HAL_I2C_SPEED I2C_SPEED
EricLew	0:80ee8f3b695e	1434	#define __HAL_I2C_7BIT_ADD_WRITE I2C_7BIT_ADD_WRITE
EricLew	0:80ee8f3b695e	1435	#define __HAL_I2C_7BIT_ADD_READ I2C_7BIT_ADD_READ
EricLew	0:80ee8f3b695e	1436	#define __HAL_I2C_10BIT_ADDRESS I2C_10BIT_ADDRESS
EricLew	0:80ee8f3b695e	1437	#define __HAL_I2C_10BIT_HEADER_WRITE I2C_10BIT_HEADER_WRITE
EricLew	0:80ee8f3b695e	1438	#define __HAL_I2C_10BIT_HEADER_READ I2C_10BIT_HEADER_READ
EricLew	0:80ee8f3b695e	1439	#define __HAL_I2C_MEM_ADD_MSB I2C_MEM_ADD_MSB
EricLew	0:80ee8f3b695e	1440	#define __HAL_I2C_MEM_ADD_LSB I2C_MEM_ADD_LSB
EricLew	0:80ee8f3b695e	1441	#define __HAL_I2C_FREQRANGE I2C_FREQRANGE
EricLew	0:80ee8f3b695e	1442	/**
EricLew	0:80ee8f3b695e	1443	* @}
EricLew	0:80ee8f3b695e	1444	*/
EricLew	0:80ee8f3b695e	1445
EricLew	0:80ee8f3b695e	1446	/** @defgroup HAL_I2S_Aliased_Macros HAL I2S Aliased Macros maintained for legacy purpose
EricLew	0:80ee8f3b695e	1447	* @{
EricLew	0:80ee8f3b695e	1448	*/
EricLew	0:80ee8f3b695e	1449
EricLew	0:80ee8f3b695e	1450	#define IS_I2S_INSTANCE IS_I2S_ALL_INSTANCE
EricLew	0:80ee8f3b695e	1451	#define IS_I2S_INSTANCE_EXT IS_I2S_ALL_INSTANCE_EXT
EricLew	0:80ee8f3b695e	1452
EricLew	0:80ee8f3b695e	1453	/**
EricLew	0:80ee8f3b695e	1454	* @}
EricLew	0:80ee8f3b695e	1455	*/
EricLew	0:80ee8f3b695e	1456
EricLew	0:80ee8f3b695e	1457	/** @defgroup HAL_IRDA_Aliased_Macros HAL IRDA Aliased Macros maintained for legacy purpose
EricLew	0:80ee8f3b695e	1458	* @{
EricLew	0:80ee8f3b695e	1459	*/
EricLew	0:80ee8f3b695e	1460
EricLew	0:80ee8f3b695e	1461	#define __IRDA_DISABLE __HAL_IRDA_DISABLE
EricLew	0:80ee8f3b695e	1462	#define __IRDA_ENABLE __HAL_IRDA_ENABLE
EricLew	0:80ee8f3b695e	1463
EricLew	0:80ee8f3b695e	1464	#define __HAL_IRDA_GETCLOCKSOURCE IRDA_GETCLOCKSOURCE
EricLew	0:80ee8f3b695e	1465	#define __HAL_IRDA_MASK_COMPUTATION IRDA_MASK_COMPUTATION
EricLew	0:80ee8f3b695e	1466	#define __IRDA_GETCLOCKSOURCE IRDA_GETCLOCKSOURCE
EricLew	0:80ee8f3b695e	1467	#define __IRDA_MASK_COMPUTATION IRDA_MASK_COMPUTATION
EricLew	0:80ee8f3b695e	1468
EricLew	0:80ee8f3b695e	1469	#define IS_IRDA_ONEBIT_SAMPLE IS_IRDA_ONE_BIT_SAMPLE
EricLew	0:80ee8f3b695e	1470
EricLew	0:80ee8f3b695e	1471
EricLew	0:80ee8f3b695e	1472	/**
EricLew	0:80ee8f3b695e	1473	* @}
EricLew	0:80ee8f3b695e	1474	*/
EricLew	0:80ee8f3b695e	1475
EricLew	0:80ee8f3b695e	1476
EricLew	0:80ee8f3b695e	1477	/** @defgroup HAL_IWDG_Aliased_Macros HAL IWDG Aliased Macros maintained for legacy purpose
EricLew	0:80ee8f3b695e	1478	* @{
EricLew	0:80ee8f3b695e	1479	*/
EricLew	0:80ee8f3b695e	1480	#define __HAL_IWDG_ENABLE_WRITE_ACCESS IWDG_ENABLE_WRITE_ACCESS
EricLew	0:80ee8f3b695e	1481	#define __HAL_IWDG_DISABLE_WRITE_ACCESS IWDG_DISABLE_WRITE_ACCESS
EricLew	0:80ee8f3b695e	1482	/**
EricLew	0:80ee8f3b695e	1483	* @}
EricLew	0:80ee8f3b695e	1484	*/
EricLew	0:80ee8f3b695e	1485
EricLew	0:80ee8f3b695e	1486
EricLew	0:80ee8f3b695e	1487	/** @defgroup HAL_LPTIM_Aliased_Macros HAL LPTIM Aliased Macros maintained for legacy purpose
EricLew	0:80ee8f3b695e	1488	* @{
EricLew	0:80ee8f3b695e	1489	*/
EricLew	0:80ee8f3b695e	1490
EricLew	0:80ee8f3b695e	1491	#define __HAL_LPTIM_ENABLE_INTERRUPT __HAL_LPTIM_ENABLE_IT
EricLew	0:80ee8f3b695e	1492	#define __HAL_LPTIM_DISABLE_INTERRUPT __HAL_LPTIM_DISABLE_IT
EricLew	0:80ee8f3b695e	1493	#define __HAL_LPTIM_GET_ITSTATUS __HAL_LPTIM_GET_IT_SOURCE
EricLew	0:80ee8f3b695e	1494
EricLew	0:80ee8f3b695e	1495	/**
EricLew	0:80ee8f3b695e	1496	* @}
EricLew	0:80ee8f3b695e	1497	*/
EricLew	0:80ee8f3b695e	1498
EricLew	0:80ee8f3b695e	1499
EricLew	0:80ee8f3b695e	1500	/** @defgroup HAL_OPAMP_Aliased_Macros HAL OPAMP Aliased Macros maintained for legacy purpose
EricLew	0:80ee8f3b695e	1501	* @{
EricLew	0:80ee8f3b695e	1502	*/
EricLew	0:80ee8f3b695e	1503	#define __OPAMP_CSR_OPAXPD OPAMP_CSR_OPAXPD
EricLew	0:80ee8f3b695e	1504	#define __OPAMP_CSR_S3SELX OPAMP_CSR_S3SELX
EricLew	0:80ee8f3b695e	1505	#define __OPAMP_CSR_S4SELX OPAMP_CSR_S4SELX
EricLew	0:80ee8f3b695e	1506	#define __OPAMP_CSR_S5SELX OPAMP_CSR_S5SELX
EricLew	0:80ee8f3b695e	1507	#define __OPAMP_CSR_S6SELX OPAMP_CSR_S6SELX
EricLew	0:80ee8f3b695e	1508	#define __OPAMP_CSR_OPAXCAL_L OPAMP_CSR_OPAXCAL_L
EricLew	0:80ee8f3b695e	1509	#define __OPAMP_CSR_OPAXCAL_H OPAMP_CSR_OPAXCAL_H
EricLew	0:80ee8f3b695e	1510	#define __OPAMP_CSR_OPAXLPM OPAMP_CSR_OPAXLPM
EricLew	0:80ee8f3b695e	1511	#define __OPAMP_CSR_ALL_SWITCHES OPAMP_CSR_ALL_SWITCHES
EricLew	0:80ee8f3b695e	1512	#define __OPAMP_CSR_ANAWSELX OPAMP_CSR_ANAWSELX
EricLew	0:80ee8f3b695e	1513	#define __OPAMP_CSR_OPAXCALOUT OPAMP_CSR_OPAXCALOUT
EricLew	0:80ee8f3b695e	1514	#define __OPAMP_OFFSET_TRIM_BITSPOSITION OPAMP_OFFSET_TRIM_BITSPOSITION
EricLew	0:80ee8f3b695e	1515	#define __OPAMP_OFFSET_TRIM_SET OPAMP_OFFSET_TRIM_SET
EricLew	0:80ee8f3b695e	1516
EricLew	0:80ee8f3b695e	1517	/**
EricLew	0:80ee8f3b695e	1518	* @}
EricLew	0:80ee8f3b695e	1519	*/
EricLew	0:80ee8f3b695e	1520
EricLew	0:80ee8f3b695e	1521
EricLew	0:80ee8f3b695e	1522	/** @defgroup HAL_PWR_Aliased_Macros HAL PWR Aliased Macros maintained for legacy purpose
EricLew	0:80ee8f3b695e	1523	* @{
EricLew	0:80ee8f3b695e	1524	*/
EricLew	0:80ee8f3b695e	1525	#define __HAL_PVD_EVENT_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_EVENT
EricLew	0:80ee8f3b695e	1526	#define __HAL_PVD_EVENT_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_EVENT
EricLew	0:80ee8f3b695e	1527	#define __HAL_PVD_EXTI_FALLINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE
EricLew	0:80ee8f3b695e	1528	#define __HAL_PVD_EXTI_FALLINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE
EricLew	0:80ee8f3b695e	1529	#define __HAL_PVD_EXTI_RISINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE
EricLew	0:80ee8f3b695e	1530	#define __HAL_PVD_EXTI_RISINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
EricLew	0:80ee8f3b695e	1531	#define __HAL_PVM_EVENT_DISABLE __HAL_PWR_PVM_EVENT_DISABLE
EricLew	0:80ee8f3b695e	1532	#define __HAL_PVM_EVENT_ENABLE __HAL_PWR_PVM_EVENT_ENABLE
EricLew	0:80ee8f3b695e	1533	#define __HAL_PVM_EXTI_FALLINGTRIGGER_DISABLE __HAL_PWR_PVM_EXTI_FALLINGTRIGGER_DISABLE
EricLew	0:80ee8f3b695e	1534	#define __HAL_PVM_EXTI_FALLINGTRIGGER_ENABLE __HAL_PWR_PVM_EXTI_FALLINGTRIGGER_ENABLE
EricLew	0:80ee8f3b695e	1535	#define __HAL_PVM_EXTI_RISINGTRIGGER_DISABLE __HAL_PWR_PVM_EXTI_RISINGTRIGGER_DISABLE
EricLew	0:80ee8f3b695e	1536	#define __HAL_PVM_EXTI_RISINGTRIGGER_ENABLE __HAL_PWR_PVM_EXTI_RISINGTRIGGER_ENABLE
EricLew	0:80ee8f3b695e	1537	#define __HAL_PWR_INTERNALWAKEUP_DISABLE HAL_PWREx_DisableInternalWakeUpLine
EricLew	0:80ee8f3b695e	1538	#define __HAL_PWR_INTERNALWAKEUP_ENABLE HAL_PWREx_EnableInternalWakeUpLine
EricLew	0:80ee8f3b695e	1539	#define __HAL_PWR_PULL_UP_DOWN_CONFIG_DISABLE HAL_PWREx_DisablePullUpPullDownConfig
EricLew	0:80ee8f3b695e	1540	#define __HAL_PWR_PULL_UP_DOWN_CONFIG_ENABLE HAL_PWREx_EnablePullUpPullDownConfig
EricLew	0:80ee8f3b695e	1541	#define __HAL_PWR_PVD_EXTI_CLEAR_EGDE_TRIGGER() do { __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); } while(0)
EricLew	0:80ee8f3b695e	1542	#define __HAL_PWR_PVD_EXTI_EVENT_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_EVENT
EricLew	0:80ee8f3b695e	1543	#define __HAL_PWR_PVD_EXTI_EVENT_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_EVENT
EricLew	0:80ee8f3b695e	1544	#define __HAL_PWR_PVD_EXTI_FALLINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE
EricLew	0:80ee8f3b695e	1545	#define __HAL_PWR_PVD_EXTI_FALLINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE
EricLew	0:80ee8f3b695e	1546	#define __HAL_PWR_PVD_EXTI_RISINGTRIGGER_DISABLE __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE
EricLew	0:80ee8f3b695e	1547	#define __HAL_PWR_PVD_EXTI_RISINGTRIGGER_ENABLE __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
EricLew	0:80ee8f3b695e	1548	#define __HAL_PWR_PVD_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE
EricLew	0:80ee8f3b695e	1549	#define __HAL_PWR_PVD_EXTI_SET_RISING_EDGE_TRIGGER __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE
EricLew	0:80ee8f3b695e	1550	#define __HAL_PWR_PVM_DISABLE() do { HAL_PWREx_DisablePVM1();HAL_PWREx_DisablePVM2();HAL_PWREx_DisablePVM3();HAL_PWREx_DisablePVM4(); } while(0)
EricLew	0:80ee8f3b695e	1551	#define __HAL_PWR_PVM_ENABLE() do { HAL_PWREx_EnablePVM1();HAL_PWREx_EnablePVM2();HAL_PWREx_EnablePVM3();HAL_PWREx_EnablePVM4(); } while(0)
EricLew	0:80ee8f3b695e	1552	#define __HAL_PWR_SRAM2CONTENT_PRESERVE_DISABLE HAL_PWREx_DisableSRAM2ContentRetention
EricLew	0:80ee8f3b695e	1553	#define __HAL_PWR_SRAM2CONTENT_PRESERVE_ENABLE HAL_PWREx_EnableSRAM2ContentRetention
EricLew	0:80ee8f3b695e	1554	#define __HAL_PWR_VDDIO2_DISABLE HAL_PWREx_DisableVddIO2
EricLew	0:80ee8f3b695e	1555	#define __HAL_PWR_VDDIO2_ENABLE HAL_PWREx_EnableVddIO2
EricLew	0:80ee8f3b695e	1556	#define __HAL_PWR_VDDIO2_EXTI_CLEAR_EGDE_TRIGGER __HAL_PWR_VDDIO2_EXTI_DISABLE_FALLING_EDGE
EricLew	0:80ee8f3b695e	1557	#define __HAL_PWR_VDDIO2_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_PWR_VDDIO2_EXTI_ENABLE_FALLING_EDGE
EricLew	0:80ee8f3b695e	1558	#define __HAL_PWR_VDDUSB_DISABLE HAL_PWREx_DisableVddUSB
EricLew	0:80ee8f3b695e	1559	#define __HAL_PWR_VDDUSB_ENABLE HAL_PWREx_EnableVddUSB
EricLew	0:80ee8f3b695e	1560
EricLew	0:80ee8f3b695e	1561	#if defined (STM32F4)
EricLew	0:80ee8f3b695e	1562	#define __HAL_PVD_EXTI_ENABLE_IT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_ENABLE_IT()
EricLew	0:80ee8f3b695e	1563	#define __HAL_PVD_EXTI_DISABLE_IT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_DISABLE_IT()
EricLew	0:80ee8f3b695e	1564	#define __HAL_PVD_EXTI_GET_FLAG(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_GET_FLAG()
EricLew	0:80ee8f3b695e	1565	#define __HAL_PVD_EXTI_CLEAR_FLAG(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_CLEAR_FLAG()
EricLew	0:80ee8f3b695e	1566	#define __HAL_PVD_EXTI_GENERATE_SWIT(PWR_EXTI_LINE_PVD) __HAL_PWR_PVD_EXTI_GENERATE_SWIT()
EricLew	0:80ee8f3b695e	1567	#else
EricLew	0:80ee8f3b695e	1568	#define __HAL_PVD_EXTI_CLEAR_FLAG __HAL_PWR_PVD_EXTI_CLEAR_FLAG
EricLew	0:80ee8f3b695e	1569	#define __HAL_PVD_EXTI_DISABLE_IT __HAL_PWR_PVD_EXTI_DISABLE_IT
EricLew	0:80ee8f3b695e	1570	#define __HAL_PVD_EXTI_ENABLE_IT __HAL_PWR_PVD_EXTI_ENABLE_IT
EricLew	0:80ee8f3b695e	1571	#define __HAL_PVD_EXTI_GENERATE_SWIT __HAL_PWR_PVD_EXTI_GENERATE_SWIT
EricLew	0:80ee8f3b695e	1572	#define __HAL_PVD_EXTI_GET_FLAG __HAL_PWR_PVD_EXTI_GET_FLAG
EricLew	0:80ee8f3b695e	1573	#endif /* STM32F4 */
EricLew	0:80ee8f3b695e	1574	/**
EricLew	0:80ee8f3b695e	1575	* @}
EricLew	0:80ee8f3b695e	1576	*/
EricLew	0:80ee8f3b695e	1577
EricLew	0:80ee8f3b695e	1578
EricLew	0:80ee8f3b695e	1579	/** @defgroup HAL_RCC_Aliased HAL RCC Aliased maintained for legacy purpose
EricLew	0:80ee8f3b695e	1580	* @{
EricLew	0:80ee8f3b695e	1581	*/
EricLew	0:80ee8f3b695e	1582
EricLew	0:80ee8f3b695e	1583	#define RCC_StopWakeUpClock_MSI RCC_STOP_WAKEUPCLOCK_MSI
EricLew	0:80ee8f3b695e	1584	#define RCC_StopWakeUpClock_HSI RCC_STOP_WAKEUPCLOCK_HSI
EricLew	0:80ee8f3b695e	1585
EricLew	0:80ee8f3b695e	1586	#define HAL_RCC_CCSCallback HAL_RCC_CSSCallback
EricLew	0:80ee8f3b695e	1587	#define HAL_RC48_EnableBuffer_Cmd(cmd) (((cmd)==ENABLE) ? HAL_RCCEx_EnableHSI48_VREFINT() : HAL_RCCEx_DisableHSI48_VREFINT())
EricLew	0:80ee8f3b695e	1588
EricLew	0:80ee8f3b695e	1589	#define __ADC_CLK_DISABLE __HAL_RCC_ADC_CLK_DISABLE
EricLew	0:80ee8f3b695e	1590	#define __ADC_CLK_ENABLE __HAL_RCC_ADC_CLK_ENABLE
EricLew	0:80ee8f3b695e	1591	#define __ADC_CLK_SLEEP_DISABLE __HAL_RCC_ADC_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1592	#define __ADC_CLK_SLEEP_ENABLE __HAL_RCC_ADC_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1593	#define __ADC_FORCE_RESET __HAL_RCC_ADC_FORCE_RESET
EricLew	0:80ee8f3b695e	1594	#define __ADC_RELEASE_RESET __HAL_RCC_ADC_RELEASE_RESET
EricLew	0:80ee8f3b695e	1595	#define __ADC1_CLK_DISABLE __HAL_RCC_ADC1_CLK_DISABLE
EricLew	0:80ee8f3b695e	1596	#define __ADC1_CLK_ENABLE __HAL_RCC_ADC1_CLK_ENABLE
EricLew	0:80ee8f3b695e	1597	#define __ADC1_FORCE_RESET __HAL_RCC_ADC1_FORCE_RESET
EricLew	0:80ee8f3b695e	1598	#define __ADC1_RELEASE_RESET __HAL_RCC_ADC1_RELEASE_RESET
EricLew	0:80ee8f3b695e	1599	#define __ADC1_CLK_SLEEP_ENABLE __HAL_RCC_ADC1_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1600	#define __ADC1_CLK_SLEEP_DISABLE __HAL_RCC_ADC1_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1601	#define __ADC2_CLK_DISABLE __HAL_RCC_ADC2_CLK_DISABLE
EricLew	0:80ee8f3b695e	1602	#define __ADC2_CLK_ENABLE __HAL_RCC_ADC2_CLK_ENABLE
EricLew	0:80ee8f3b695e	1603	#define __ADC2_FORCE_RESET __HAL_RCC_ADC2_FORCE_RESET
EricLew	0:80ee8f3b695e	1604	#define __ADC2_RELEASE_RESET __HAL_RCC_ADC2_RELEASE_RESET
EricLew	0:80ee8f3b695e	1605	#define __ADC3_CLK_DISABLE __HAL_RCC_ADC3_CLK_DISABLE
EricLew	0:80ee8f3b695e	1606	#define __ADC3_CLK_ENABLE __HAL_RCC_ADC3_CLK_ENABLE
EricLew	0:80ee8f3b695e	1607	#define __ADC3_FORCE_RESET __HAL_RCC_ADC3_FORCE_RESET
EricLew	0:80ee8f3b695e	1608	#define __ADC3_RELEASE_RESET __HAL_RCC_ADC3_RELEASE_RESET
EricLew	0:80ee8f3b695e	1609	#define __AES_CLK_DISABLE __HAL_RCC_AES_CLK_DISABLE
EricLew	0:80ee8f3b695e	1610	#define __AES_CLK_ENABLE __HAL_RCC_AES_CLK_ENABLE
EricLew	0:80ee8f3b695e	1611	#define __AES_CLK_SLEEP_DISABLE __HAL_RCC_AES_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1612	#define __AES_CLK_SLEEP_ENABLE __HAL_RCC_AES_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1613	#define __AES_FORCE_RESET __HAL_RCC_AES_FORCE_RESET
EricLew	0:80ee8f3b695e	1614	#define __AES_RELEASE_RESET __HAL_RCC_AES_RELEASE_RESET
EricLew	0:80ee8f3b695e	1615	#define __CRYP_CLK_SLEEP_ENABLE __HAL_RCC_CRYP_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1616	#define __CRYP_CLK_SLEEP_DISABLE __HAL_RCC_CRYP_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1617	#define __CRYP_CLK_ENABLE __HAL_RCC_CRYP_CLK_ENABLE
EricLew	0:80ee8f3b695e	1618	#define __CRYP_CLK_DISABLE __HAL_RCC_CRYP_CLK_DISABLE
EricLew	0:80ee8f3b695e	1619	#define __CRYP_FORCE_RESET __HAL_RCC_CRYP_FORCE_RESET
EricLew	0:80ee8f3b695e	1620	#define __CRYP_RELEASE_RESET __HAL_RCC_CRYP_RELEASE_RESET
EricLew	0:80ee8f3b695e	1621	#define __AFIO_CLK_DISABLE __HAL_RCC_AFIO_CLK_DISABLE
EricLew	0:80ee8f3b695e	1622	#define __AFIO_CLK_ENABLE __HAL_RCC_AFIO_CLK_ENABLE
EricLew	0:80ee8f3b695e	1623	#define __AFIO_FORCE_RESET __HAL_RCC_AFIO_FORCE_RESET
EricLew	0:80ee8f3b695e	1624	#define __AFIO_RELEASE_RESET __HAL_RCC_AFIO_RELEASE_RESET
EricLew	0:80ee8f3b695e	1625	#define __AHB_FORCE_RESET __HAL_RCC_AHB_FORCE_RESET
EricLew	0:80ee8f3b695e	1626	#define __AHB_RELEASE_RESET __HAL_RCC_AHB_RELEASE_RESET
EricLew	0:80ee8f3b695e	1627	#define __AHB1_FORCE_RESET __HAL_RCC_AHB1_FORCE_RESET
EricLew	0:80ee8f3b695e	1628	#define __AHB1_RELEASE_RESET __HAL_RCC_AHB1_RELEASE_RESET
EricLew	0:80ee8f3b695e	1629	#define __AHB2_FORCE_RESET __HAL_RCC_AHB2_FORCE_RESET
EricLew	0:80ee8f3b695e	1630	#define __AHB2_RELEASE_RESET __HAL_RCC_AHB2_RELEASE_RESET
EricLew	0:80ee8f3b695e	1631	#define __AHB3_FORCE_RESET __HAL_RCC_AHB3_FORCE_RESET
EricLew	0:80ee8f3b695e	1632	#define __AHB3_RELEASE_RESET __HAL_RCC_AHB3_RELEASE_RESET
EricLew	0:80ee8f3b695e	1633	#define __APB1_FORCE_RESET __HAL_RCC_APB1_FORCE_RESET
EricLew	0:80ee8f3b695e	1634	#define __APB1_RELEASE_RESET __HAL_RCC_APB1_RELEASE_RESET
EricLew	0:80ee8f3b695e	1635	#define __APB2_FORCE_RESET __HAL_RCC_APB2_FORCE_RESET
EricLew	0:80ee8f3b695e	1636	#define __APB2_RELEASE_RESET __HAL_RCC_APB2_RELEASE_RESET
EricLew	0:80ee8f3b695e	1637	#define __BKP_CLK_DISABLE __HAL_RCC_BKP_CLK_DISABLE
EricLew	0:80ee8f3b695e	1638	#define __BKP_CLK_ENABLE __HAL_RCC_BKP_CLK_ENABLE
EricLew	0:80ee8f3b695e	1639	#define __BKP_FORCE_RESET __HAL_RCC_BKP_FORCE_RESET
EricLew	0:80ee8f3b695e	1640	#define __BKP_RELEASE_RESET __HAL_RCC_BKP_RELEASE_RESET
EricLew	0:80ee8f3b695e	1641	#define __CAN1_CLK_DISABLE __HAL_RCC_CAN1_CLK_DISABLE
EricLew	0:80ee8f3b695e	1642	#define __CAN1_CLK_ENABLE __HAL_RCC_CAN1_CLK_ENABLE
EricLew	0:80ee8f3b695e	1643	#define __CAN1_CLK_SLEEP_DISABLE __HAL_RCC_CAN1_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1644	#define __CAN1_CLK_SLEEP_ENABLE __HAL_RCC_CAN1_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1645	#define __CAN1_FORCE_RESET __HAL_RCC_CAN1_FORCE_RESET
EricLew	0:80ee8f3b695e	1646	#define __CAN1_RELEASE_RESET __HAL_RCC_CAN1_RELEASE_RESET
EricLew	0:80ee8f3b695e	1647	#define __CAN_CLK_DISABLE __HAL_RCC_CAN1_CLK_DISABLE
EricLew	0:80ee8f3b695e	1648	#define __CAN_CLK_ENABLE __HAL_RCC_CAN1_CLK_ENABLE
EricLew	0:80ee8f3b695e	1649	#define __CAN_FORCE_RESET __HAL_RCC_CAN1_FORCE_RESET
EricLew	0:80ee8f3b695e	1650	#define __CAN_RELEASE_RESET __HAL_RCC_CAN1_RELEASE_RESET
EricLew	0:80ee8f3b695e	1651	#define __CAN2_CLK_DISABLE __HAL_RCC_CAN2_CLK_DISABLE
EricLew	0:80ee8f3b695e	1652	#define __CAN2_CLK_ENABLE __HAL_RCC_CAN2_CLK_ENABLE
EricLew	0:80ee8f3b695e	1653	#define __CAN2_FORCE_RESET __HAL_RCC_CAN2_FORCE_RESET
EricLew	0:80ee8f3b695e	1654	#define __CAN2_RELEASE_RESET __HAL_RCC_CAN2_RELEASE_RESET
EricLew	0:80ee8f3b695e	1655	#define __CEC_CLK_DISABLE __HAL_RCC_CEC_CLK_DISABLE
EricLew	0:80ee8f3b695e	1656	#define __CEC_CLK_ENABLE __HAL_RCC_CEC_CLK_ENABLE
EricLew	0:80ee8f3b695e	1657	#define __COMP_CLK_DISABLE __HAL_RCC_COMP_CLK_DISABLE
EricLew	0:80ee8f3b695e	1658	#define __COMP_CLK_ENABLE __HAL_RCC_COMP_CLK_ENABLE
EricLew	0:80ee8f3b695e	1659	#define __COMP_FORCE_RESET __HAL_RCC_COMP_FORCE_RESET
EricLew	0:80ee8f3b695e	1660	#define __COMP_RELEASE_RESET __HAL_RCC_COMP_RELEASE_RESET
EricLew	0:80ee8f3b695e	1661	#define __COMP_CLK_SLEEP_ENABLE __HAL_RCC_COMP_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1662	#define __COMP_CLK_SLEEP_DISABLE __HAL_RCC_COMP_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1663	#define __CEC_FORCE_RESET __HAL_RCC_CEC_FORCE_RESET
EricLew	0:80ee8f3b695e	1664	#define __CEC_RELEASE_RESET __HAL_RCC_CEC_RELEASE_RESET
EricLew	0:80ee8f3b695e	1665	#define __CRC_CLK_DISABLE __HAL_RCC_CRC_CLK_DISABLE
EricLew	0:80ee8f3b695e	1666	#define __CRC_CLK_ENABLE __HAL_RCC_CRC_CLK_ENABLE
EricLew	0:80ee8f3b695e	1667	#define __CRC_CLK_SLEEP_DISABLE __HAL_RCC_CRC_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1668	#define __CRC_CLK_SLEEP_ENABLE __HAL_RCC_CRC_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1669	#define __CRC_FORCE_RESET __HAL_RCC_CRC_FORCE_RESET
EricLew	0:80ee8f3b695e	1670	#define __CRC_RELEASE_RESET __HAL_RCC_CRC_RELEASE_RESET
EricLew	0:80ee8f3b695e	1671	#define __DAC_CLK_DISABLE __HAL_RCC_DAC_CLK_DISABLE
EricLew	0:80ee8f3b695e	1672	#define __DAC_CLK_ENABLE __HAL_RCC_DAC_CLK_ENABLE
EricLew	0:80ee8f3b695e	1673	#define __DAC_FORCE_RESET __HAL_RCC_DAC_FORCE_RESET
EricLew	0:80ee8f3b695e	1674	#define __DAC_RELEASE_RESET __HAL_RCC_DAC_RELEASE_RESET
EricLew	0:80ee8f3b695e	1675	#define __DAC1_CLK_DISABLE __HAL_RCC_DAC1_CLK_DISABLE
EricLew	0:80ee8f3b695e	1676	#define __DAC1_CLK_ENABLE __HAL_RCC_DAC1_CLK_ENABLE
EricLew	0:80ee8f3b695e	1677	#define __DAC1_CLK_SLEEP_DISABLE __HAL_RCC_DAC1_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1678	#define __DAC1_CLK_SLEEP_ENABLE __HAL_RCC_DAC1_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1679	#define __DAC1_FORCE_RESET __HAL_RCC_DAC1_FORCE_RESET
EricLew	0:80ee8f3b695e	1680	#define __DAC1_RELEASE_RESET __HAL_RCC_DAC1_RELEASE_RESET
EricLew	0:80ee8f3b695e	1681	#define __DBGMCU_CLK_ENABLE __HAL_RCC_DBGMCU_CLK_ENABLE
EricLew	0:80ee8f3b695e	1682	#define __DBGMCU_CLK_DISABLE __HAL_RCC_DBGMCU_CLK_DISABLE
EricLew	0:80ee8f3b695e	1683	#define __DBGMCU_FORCE_RESET __HAL_RCC_DBGMCU_FORCE_RESET
EricLew	0:80ee8f3b695e	1684	#define __DBGMCU_RELEASE_RESET __HAL_RCC_DBGMCU_RELEASE_RESET
EricLew	0:80ee8f3b695e	1685	#define __DFSDM_CLK_DISABLE __HAL_RCC_DFSDM_CLK_DISABLE
EricLew	0:80ee8f3b695e	1686	#define __DFSDM_CLK_ENABLE __HAL_RCC_DFSDM_CLK_ENABLE
EricLew	0:80ee8f3b695e	1687	#define __DFSDM_CLK_SLEEP_DISABLE __HAL_RCC_DFSDM_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1688	#define __DFSDM_CLK_SLEEP_ENABLE __HAL_RCC_DFSDM_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1689	#define __DFSDM_FORCE_RESET __HAL_RCC_DFSDM_FORCE_RESET
EricLew	0:80ee8f3b695e	1690	#define __DFSDM_RELEASE_RESET __HAL_RCC_DFSDM_RELEASE_RESET
EricLew	0:80ee8f3b695e	1691	#define __DMA1_CLK_DISABLE __HAL_RCC_DMA1_CLK_DISABLE
EricLew	0:80ee8f3b695e	1692	#define __DMA1_CLK_ENABLE __HAL_RCC_DMA1_CLK_ENABLE
EricLew	0:80ee8f3b695e	1693	#define __DMA1_CLK_SLEEP_DISABLE __HAL_RCC_DMA1_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1694	#define __DMA1_CLK_SLEEP_ENABLE __HAL_RCC_DMA1_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1695	#define __DMA1_FORCE_RESET __HAL_RCC_DMA1_FORCE_RESET
EricLew	0:80ee8f3b695e	1696	#define __DMA1_RELEASE_RESET __HAL_RCC_DMA1_RELEASE_RESET
EricLew	0:80ee8f3b695e	1697	#define __DMA2_CLK_DISABLE __HAL_RCC_DMA2_CLK_DISABLE
EricLew	0:80ee8f3b695e	1698	#define __DMA2_CLK_ENABLE __HAL_RCC_DMA2_CLK_ENABLE
EricLew	0:80ee8f3b695e	1699	#define __DMA2_CLK_SLEEP_DISABLE __HAL_RCC_DMA2_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1700	#define __DMA2_CLK_SLEEP_ENABLE __HAL_RCC_DMA2_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1701	#define __DMA2_FORCE_RESET __HAL_RCC_DMA2_FORCE_RESET
EricLew	0:80ee8f3b695e	1702	#define __DMA2_RELEASE_RESET __HAL_RCC_DMA2_RELEASE_RESET
EricLew	0:80ee8f3b695e	1703	#define __ETHMAC_CLK_DISABLE __HAL_RCC_ETHMAC_CLK_DISABLE
EricLew	0:80ee8f3b695e	1704	#define __ETHMAC_CLK_ENABLE __HAL_RCC_ETHMAC_CLK_ENABLE
EricLew	0:80ee8f3b695e	1705	#define __ETHMAC_FORCE_RESET __HAL_RCC_ETHMAC_FORCE_RESET
EricLew	0:80ee8f3b695e	1706	#define __ETHMAC_RELEASE_RESET __HAL_RCC_ETHMAC_RELEASE_RESET
EricLew	0:80ee8f3b695e	1707	#define __ETHMACRX_CLK_DISABLE __HAL_RCC_ETHMACRX_CLK_DISABLE
EricLew	0:80ee8f3b695e	1708	#define __ETHMACRX_CLK_ENABLE __HAL_RCC_ETHMACRX_CLK_ENABLE
EricLew	0:80ee8f3b695e	1709	#define __ETHMACTX_CLK_DISABLE __HAL_RCC_ETHMACTX_CLK_DISABLE
EricLew	0:80ee8f3b695e	1710	#define __ETHMACTX_CLK_ENABLE __HAL_RCC_ETHMACTX_CLK_ENABLE
EricLew	0:80ee8f3b695e	1711	#define __FIREWALL_CLK_DISABLE __HAL_RCC_FIREWALL_CLK_DISABLE
EricLew	0:80ee8f3b695e	1712	#define __FIREWALL_CLK_ENABLE __HAL_RCC_FIREWALL_CLK_ENABLE
EricLew	0:80ee8f3b695e	1713	#define __FLASH_CLK_DISABLE __HAL_RCC_FLASH_CLK_DISABLE
EricLew	0:80ee8f3b695e	1714	#define __FLASH_CLK_ENABLE __HAL_RCC_FLASH_CLK_ENABLE
EricLew	0:80ee8f3b695e	1715	#define __FLASH_CLK_SLEEP_DISABLE __HAL_RCC_FLASH_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1716	#define __FLASH_CLK_SLEEP_ENABLE __HAL_RCC_FLASH_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1717	#define __FLASH_FORCE_RESET __HAL_RCC_FLASH_FORCE_RESET
EricLew	0:80ee8f3b695e	1718	#define __FLASH_RELEASE_RESET __HAL_RCC_FLASH_RELEASE_RESET
EricLew	0:80ee8f3b695e	1719	#define __FLITF_CLK_DISABLE __HAL_RCC_FLITF_CLK_DISABLE
EricLew	0:80ee8f3b695e	1720	#define __FLITF_CLK_ENABLE __HAL_RCC_FLITF_CLK_ENABLE
EricLew	0:80ee8f3b695e	1721	#define __FLITF_FORCE_RESET __HAL_RCC_FLITF_FORCE_RESET
EricLew	0:80ee8f3b695e	1722	#define __FLITF_RELEASE_RESET __HAL_RCC_FLITF_RELEASE_RESET
EricLew	0:80ee8f3b695e	1723	#define __FLITF_CLK_SLEEP_ENABLE __HAL_RCC_FLITF_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1724	#define __FLITF_CLK_SLEEP_DISABLE __HAL_RCC_FLITF_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1725	#define __FMC_CLK_DISABLE __HAL_RCC_FMC_CLK_DISABLE
EricLew	0:80ee8f3b695e	1726	#define __FMC_CLK_ENABLE __HAL_RCC_FMC_CLK_ENABLE
EricLew	0:80ee8f3b695e	1727	#define __FMC_CLK_SLEEP_DISABLE __HAL_RCC_FMC_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1728	#define __FMC_CLK_SLEEP_ENABLE __HAL_RCC_FMC_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1729	#define __FMC_FORCE_RESET __HAL_RCC_FMC_FORCE_RESET
EricLew	0:80ee8f3b695e	1730	#define __FMC_RELEASE_RESET __HAL_RCC_FMC_RELEASE_RESET
EricLew	0:80ee8f3b695e	1731	#define __FSMC_CLK_DISABLE __HAL_RCC_FSMC_CLK_DISABLE
EricLew	0:80ee8f3b695e	1732	#define __FSMC_CLK_ENABLE __HAL_RCC_FSMC_CLK_ENABLE
EricLew	0:80ee8f3b695e	1733	#define __GPIOA_CLK_DISABLE __HAL_RCC_GPIOA_CLK_DISABLE
EricLew	0:80ee8f3b695e	1734	#define __GPIOA_CLK_ENABLE __HAL_RCC_GPIOA_CLK_ENABLE
EricLew	0:80ee8f3b695e	1735	#define __GPIOA_CLK_SLEEP_DISABLE __HAL_RCC_GPIOA_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1736	#define __GPIOA_CLK_SLEEP_ENABLE __HAL_RCC_GPIOA_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1737	#define __GPIOA_FORCE_RESET __HAL_RCC_GPIOA_FORCE_RESET
EricLew	0:80ee8f3b695e	1738	#define __GPIOA_RELEASE_RESET __HAL_RCC_GPIOA_RELEASE_RESET
EricLew	0:80ee8f3b695e	1739	#define __GPIOB_CLK_DISABLE __HAL_RCC_GPIOB_CLK_DISABLE
EricLew	0:80ee8f3b695e	1740	#define __GPIOB_CLK_ENABLE __HAL_RCC_GPIOB_CLK_ENABLE
EricLew	0:80ee8f3b695e	1741	#define __GPIOB_CLK_SLEEP_DISABLE __HAL_RCC_GPIOB_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1742	#define __GPIOB_CLK_SLEEP_ENABLE __HAL_RCC_GPIOB_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1743	#define __GPIOB_FORCE_RESET __HAL_RCC_GPIOB_FORCE_RESET
EricLew	0:80ee8f3b695e	1744	#define __GPIOB_RELEASE_RESET __HAL_RCC_GPIOB_RELEASE_RESET
EricLew	0:80ee8f3b695e	1745	#define __GPIOC_CLK_DISABLE __HAL_RCC_GPIOC_CLK_DISABLE
EricLew	0:80ee8f3b695e	1746	#define __GPIOC_CLK_ENABLE __HAL_RCC_GPIOC_CLK_ENABLE
EricLew	0:80ee8f3b695e	1747	#define __GPIOC_CLK_SLEEP_DISABLE __HAL_RCC_GPIOC_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1748	#define __GPIOC_CLK_SLEEP_ENABLE __HAL_RCC_GPIOC_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1749	#define __GPIOC_FORCE_RESET __HAL_RCC_GPIOC_FORCE_RESET
EricLew	0:80ee8f3b695e	1750	#define __GPIOC_RELEASE_RESET __HAL_RCC_GPIOC_RELEASE_RESET
EricLew	0:80ee8f3b695e	1751	#define __GPIOD_CLK_DISABLE __HAL_RCC_GPIOD_CLK_DISABLE
EricLew	0:80ee8f3b695e	1752	#define __GPIOD_CLK_ENABLE __HAL_RCC_GPIOD_CLK_ENABLE
EricLew	0:80ee8f3b695e	1753	#define __GPIOD_CLK_SLEEP_DISABLE __HAL_RCC_GPIOD_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1754	#define __GPIOD_CLK_SLEEP_ENABLE __HAL_RCC_GPIOD_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1755	#define __GPIOD_FORCE_RESET __HAL_RCC_GPIOD_FORCE_RESET
EricLew	0:80ee8f3b695e	1756	#define __GPIOD_RELEASE_RESET __HAL_RCC_GPIOD_RELEASE_RESET
EricLew	0:80ee8f3b695e	1757	#define __GPIOE_CLK_DISABLE __HAL_RCC_GPIOE_CLK_DISABLE
EricLew	0:80ee8f3b695e	1758	#define __GPIOE_CLK_ENABLE __HAL_RCC_GPIOE_CLK_ENABLE
EricLew	0:80ee8f3b695e	1759	#define __GPIOE_CLK_SLEEP_DISABLE __HAL_RCC_GPIOE_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1760	#define __GPIOE_CLK_SLEEP_ENABLE __HAL_RCC_GPIOE_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1761	#define __GPIOE_FORCE_RESET __HAL_RCC_GPIOE_FORCE_RESET
EricLew	0:80ee8f3b695e	1762	#define __GPIOE_RELEASE_RESET __HAL_RCC_GPIOE_RELEASE_RESET
EricLew	0:80ee8f3b695e	1763	#define __GPIOF_CLK_DISABLE __HAL_RCC_GPIOF_CLK_DISABLE
EricLew	0:80ee8f3b695e	1764	#define __GPIOF_CLK_ENABLE __HAL_RCC_GPIOF_CLK_ENABLE
EricLew	0:80ee8f3b695e	1765	#define __GPIOF_CLK_SLEEP_DISABLE __HAL_RCC_GPIOF_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1766	#define __GPIOF_CLK_SLEEP_ENABLE __HAL_RCC_GPIOF_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1767	#define __GPIOF_FORCE_RESET __HAL_RCC_GPIOF_FORCE_RESET
EricLew	0:80ee8f3b695e	1768	#define __GPIOF_RELEASE_RESET __HAL_RCC_GPIOF_RELEASE_RESET
EricLew	0:80ee8f3b695e	1769	#define __GPIOG_CLK_DISABLE __HAL_RCC_GPIOG_CLK_DISABLE
EricLew	0:80ee8f3b695e	1770	#define __GPIOG_CLK_ENABLE __HAL_RCC_GPIOG_CLK_ENABLE
EricLew	0:80ee8f3b695e	1771	#define __GPIOG_CLK_SLEEP_DISABLE __HAL_RCC_GPIOG_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1772	#define __GPIOG_CLK_SLEEP_ENABLE __HAL_RCC_GPIOG_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1773	#define __GPIOG_FORCE_RESET __HAL_RCC_GPIOG_FORCE_RESET
EricLew	0:80ee8f3b695e	1774	#define __GPIOG_RELEASE_RESET __HAL_RCC_GPIOG_RELEASE_RESET
EricLew	0:80ee8f3b695e	1775	#define __GPIOH_CLK_DISABLE __HAL_RCC_GPIOH_CLK_DISABLE
EricLew	0:80ee8f3b695e	1776	#define __GPIOH_CLK_ENABLE __HAL_RCC_GPIOH_CLK_ENABLE
EricLew	0:80ee8f3b695e	1777	#define __GPIOH_CLK_SLEEP_DISABLE __HAL_RCC_GPIOH_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1778	#define __GPIOH_CLK_SLEEP_ENABLE __HAL_RCC_GPIOH_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1779	#define __GPIOH_FORCE_RESET __HAL_RCC_GPIOH_FORCE_RESET
EricLew	0:80ee8f3b695e	1780	#define __GPIOH_RELEASE_RESET __HAL_RCC_GPIOH_RELEASE_RESET
EricLew	0:80ee8f3b695e	1781	#define __I2C1_CLK_DISABLE __HAL_RCC_I2C1_CLK_DISABLE
EricLew	0:80ee8f3b695e	1782	#define __I2C1_CLK_ENABLE __HAL_RCC_I2C1_CLK_ENABLE
EricLew	0:80ee8f3b695e	1783	#define __I2C1_CLK_SLEEP_DISABLE __HAL_RCC_I2C1_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1784	#define __I2C1_CLK_SLEEP_ENABLE __HAL_RCC_I2C1_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1785	#define __I2C1_FORCE_RESET __HAL_RCC_I2C1_FORCE_RESET
EricLew	0:80ee8f3b695e	1786	#define __I2C1_RELEASE_RESET __HAL_RCC_I2C1_RELEASE_RESET
EricLew	0:80ee8f3b695e	1787	#define __I2C2_CLK_DISABLE __HAL_RCC_I2C2_CLK_DISABLE
EricLew	0:80ee8f3b695e	1788	#define __I2C2_CLK_ENABLE __HAL_RCC_I2C2_CLK_ENABLE
EricLew	0:80ee8f3b695e	1789	#define __I2C2_CLK_SLEEP_DISABLE __HAL_RCC_I2C2_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1790	#define __I2C2_CLK_SLEEP_ENABLE __HAL_RCC_I2C2_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1791	#define __I2C2_FORCE_RESET __HAL_RCC_I2C2_FORCE_RESET
EricLew	0:80ee8f3b695e	1792	#define __I2C2_RELEASE_RESET __HAL_RCC_I2C2_RELEASE_RESET
EricLew	0:80ee8f3b695e	1793	#define __I2C3_CLK_DISABLE __HAL_RCC_I2C3_CLK_DISABLE
EricLew	0:80ee8f3b695e	1794	#define __I2C3_CLK_ENABLE __HAL_RCC_I2C3_CLK_ENABLE
EricLew	0:80ee8f3b695e	1795	#define __I2C3_CLK_SLEEP_DISABLE __HAL_RCC_I2C3_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1796	#define __I2C3_CLK_SLEEP_ENABLE __HAL_RCC_I2C3_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1797	#define __I2C3_FORCE_RESET __HAL_RCC_I2C3_FORCE_RESET
EricLew	0:80ee8f3b695e	1798	#define __I2C3_RELEASE_RESET __HAL_RCC_I2C3_RELEASE_RESET
EricLew	0:80ee8f3b695e	1799	#define __LCD_CLK_DISABLE __HAL_RCC_LCD_CLK_DISABLE
EricLew	0:80ee8f3b695e	1800	#define __LCD_CLK_ENABLE __HAL_RCC_LCD_CLK_ENABLE
EricLew	0:80ee8f3b695e	1801	#define __LCD_CLK_SLEEP_DISABLE __HAL_RCC_LCD_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1802	#define __LCD_CLK_SLEEP_ENABLE __HAL_RCC_LCD_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1803	#define __LCD_FORCE_RESET __HAL_RCC_LCD_FORCE_RESET
EricLew	0:80ee8f3b695e	1804	#define __LCD_RELEASE_RESET __HAL_RCC_LCD_RELEASE_RESET
EricLew	0:80ee8f3b695e	1805	#define __LPTIM1_CLK_DISABLE __HAL_RCC_LPTIM1_CLK_DISABLE
EricLew	0:80ee8f3b695e	1806	#define __LPTIM1_CLK_ENABLE __HAL_RCC_LPTIM1_CLK_ENABLE
EricLew	0:80ee8f3b695e	1807	#define __LPTIM1_CLK_SLEEP_DISABLE __HAL_RCC_LPTIM1_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1808	#define __LPTIM1_CLK_SLEEP_ENABLE __HAL_RCC_LPTIM1_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1809	#define __LPTIM1_FORCE_RESET __HAL_RCC_LPTIM1_FORCE_RESET
EricLew	0:80ee8f3b695e	1810	#define __LPTIM1_RELEASE_RESET __HAL_RCC_LPTIM1_RELEASE_RESET
EricLew	0:80ee8f3b695e	1811	#define __LPTIM2_CLK_DISABLE __HAL_RCC_LPTIM2_CLK_DISABLE
EricLew	0:80ee8f3b695e	1812	#define __LPTIM2_CLK_ENABLE __HAL_RCC_LPTIM2_CLK_ENABLE
EricLew	0:80ee8f3b695e	1813	#define __LPTIM2_CLK_SLEEP_DISABLE __HAL_RCC_LPTIM2_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1814	#define __LPTIM2_CLK_SLEEP_ENABLE __HAL_RCC_LPTIM2_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1815	#define __LPTIM2_FORCE_RESET __HAL_RCC_LPTIM2_FORCE_RESET
EricLew	0:80ee8f3b695e	1816	#define __LPTIM2_RELEASE_RESET __HAL_RCC_LPTIM2_RELEASE_RESET
EricLew	0:80ee8f3b695e	1817	#define __LPUART1_CLK_DISABLE __HAL_RCC_LPUART1_CLK_DISABLE
EricLew	0:80ee8f3b695e	1818	#define __LPUART1_CLK_ENABLE __HAL_RCC_LPUART1_CLK_ENABLE
EricLew	0:80ee8f3b695e	1819	#define __LPUART1_CLK_SLEEP_DISABLE __HAL_RCC_LPUART1_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1820	#define __LPUART1_CLK_SLEEP_ENABLE __HAL_RCC_LPUART1_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1821	#define __LPUART1_FORCE_RESET __HAL_RCC_LPUART1_FORCE_RESET
EricLew	0:80ee8f3b695e	1822	#define __LPUART1_RELEASE_RESET __HAL_RCC_LPUART1_RELEASE_RESET
EricLew	0:80ee8f3b695e	1823	#define __OPAMP_CLK_DISABLE __HAL_RCC_OPAMP_CLK_DISABLE
EricLew	0:80ee8f3b695e	1824	#define __OPAMP_CLK_ENABLE __HAL_RCC_OPAMP_CLK_ENABLE
EricLew	0:80ee8f3b695e	1825	#define __OPAMP_CLK_SLEEP_DISABLE __HAL_RCC_OPAMP_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1826	#define __OPAMP_CLK_SLEEP_ENABLE __HAL_RCC_OPAMP_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1827	#define __OPAMP_FORCE_RESET __HAL_RCC_OPAMP_FORCE_RESET
EricLew	0:80ee8f3b695e	1828	#define __OPAMP_RELEASE_RESET __HAL_RCC_OPAMP_RELEASE_RESET
EricLew	0:80ee8f3b695e	1829	#define __OTGFS_CLK_DISABLE __HAL_RCC_OTGFS_CLK_DISABLE
EricLew	0:80ee8f3b695e	1830	#define __OTGFS_CLK_ENABLE __HAL_RCC_OTGFS_CLK_ENABLE
EricLew	0:80ee8f3b695e	1831	#define __OTGFS_CLK_SLEEP_DISABLE __HAL_RCC_OTGFS_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1832	#define __OTGFS_CLK_SLEEP_ENABLE __HAL_RCC_OTGFS_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1833	#define __OTGFS_FORCE_RESET __HAL_RCC_OTGFS_FORCE_RESET
EricLew	0:80ee8f3b695e	1834	#define __OTGFS_RELEASE_RESET __HAL_RCC_OTGFS_RELEASE_RESET
EricLew	0:80ee8f3b695e	1835	#define __PWR_CLK_DISABLE __HAL_RCC_PWR_CLK_DISABLE
EricLew	0:80ee8f3b695e	1836	#define __PWR_CLK_ENABLE __HAL_RCC_PWR_CLK_ENABLE
EricLew	0:80ee8f3b695e	1837	#define __PWR_CLK_SLEEP_DISABLE __HAL_RCC_PWR_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1838	#define __PWR_CLK_SLEEP_ENABLE __HAL_RCC_PWR_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1839	#define __PWR_FORCE_RESET __HAL_RCC_PWR_FORCE_RESET
EricLew	0:80ee8f3b695e	1840	#define __PWR_RELEASE_RESET __HAL_RCC_PWR_RELEASE_RESET
EricLew	0:80ee8f3b695e	1841	#define __QSPI_CLK_DISABLE __HAL_RCC_QSPI_CLK_DISABLE
EricLew	0:80ee8f3b695e	1842	#define __QSPI_CLK_ENABLE __HAL_RCC_QSPI_CLK_ENABLE
EricLew	0:80ee8f3b695e	1843	#define __QSPI_CLK_SLEEP_DISABLE __HAL_RCC_QSPI_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1844	#define __QSPI_CLK_SLEEP_ENABLE __HAL_RCC_QSPI_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1845	#define __QSPI_FORCE_RESET __HAL_RCC_QSPI_FORCE_RESET
EricLew	0:80ee8f3b695e	1846	#define __QSPI_RELEASE_RESET __HAL_RCC_QSPI_RELEASE_RESET
EricLew	0:80ee8f3b695e	1847	#define __RNG_CLK_DISABLE __HAL_RCC_RNG_CLK_DISABLE
EricLew	0:80ee8f3b695e	1848	#define __RNG_CLK_ENABLE __HAL_RCC_RNG_CLK_ENABLE
EricLew	0:80ee8f3b695e	1849	#define __RNG_CLK_SLEEP_DISABLE __HAL_RCC_RNG_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1850	#define __RNG_CLK_SLEEP_ENABLE __HAL_RCC_RNG_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1851	#define __RNG_FORCE_RESET __HAL_RCC_RNG_FORCE_RESET
EricLew	0:80ee8f3b695e	1852	#define __RNG_RELEASE_RESET __HAL_RCC_RNG_RELEASE_RESET
EricLew	0:80ee8f3b695e	1853	#define __SAI1_CLK_DISABLE __HAL_RCC_SAI1_CLK_DISABLE
EricLew	0:80ee8f3b695e	1854	#define __SAI1_CLK_ENABLE __HAL_RCC_SAI1_CLK_ENABLE
EricLew	0:80ee8f3b695e	1855	#define __SAI1_CLK_SLEEP_DISABLE __HAL_RCC_SAI1_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1856	#define __SAI1_CLK_SLEEP_ENABLE __HAL_RCC_SAI1_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1857	#define __SAI1_FORCE_RESET __HAL_RCC_SAI1_FORCE_RESET
EricLew	0:80ee8f3b695e	1858	#define __SAI1_RELEASE_RESET __HAL_RCC_SAI1_RELEASE_RESET
EricLew	0:80ee8f3b695e	1859	#define __SAI2_CLK_DISABLE __HAL_RCC_SAI2_CLK_DISABLE
EricLew	0:80ee8f3b695e	1860	#define __SAI2_CLK_ENABLE __HAL_RCC_SAI2_CLK_ENABLE
EricLew	0:80ee8f3b695e	1861	#define __SAI2_CLK_SLEEP_DISABLE __HAL_RCC_SAI2_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1862	#define __SAI2_CLK_SLEEP_ENABLE __HAL_RCC_SAI2_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1863	#define __SAI2_FORCE_RESET __HAL_RCC_SAI2_FORCE_RESET
EricLew	0:80ee8f3b695e	1864	#define __SAI2_RELEASE_RESET __HAL_RCC_SAI2_RELEASE_RESET
EricLew	0:80ee8f3b695e	1865	#define __SDIO_CLK_DISABLE __HAL_RCC_SDIO_CLK_DISABLE
EricLew	0:80ee8f3b695e	1866	#define __SDIO_CLK_ENABLE __HAL_RCC_SDIO_CLK_ENABLE
EricLew	0:80ee8f3b695e	1867	#define __SDMMC_CLK_DISABLE __HAL_RCC_SDMMC_CLK_DISABLE
EricLew	0:80ee8f3b695e	1868	#define __SDMMC_CLK_ENABLE __HAL_RCC_SDMMC_CLK_ENABLE
EricLew	0:80ee8f3b695e	1869	#define __SDMMC_CLK_SLEEP_DISABLE __HAL_RCC_SDMMC_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1870	#define __SDMMC_CLK_SLEEP_ENABLE __HAL_RCC_SDMMC_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1871	#define __SDMMC_FORCE_RESET __HAL_RCC_SDMMC_FORCE_RESET
EricLew	0:80ee8f3b695e	1872	#define __SDMMC_RELEASE_RESET __HAL_RCC_SDMMC_RELEASE_RESET
EricLew	0:80ee8f3b695e	1873	#define __SPI1_CLK_DISABLE __HAL_RCC_SPI1_CLK_DISABLE
EricLew	0:80ee8f3b695e	1874	#define __SPI1_CLK_ENABLE __HAL_RCC_SPI1_CLK_ENABLE
EricLew	0:80ee8f3b695e	1875	#define __SPI1_CLK_SLEEP_DISABLE __HAL_RCC_SPI1_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1876	#define __SPI1_CLK_SLEEP_ENABLE __HAL_RCC_SPI1_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1877	#define __SPI1_FORCE_RESET __HAL_RCC_SPI1_FORCE_RESET
EricLew	0:80ee8f3b695e	1878	#define __SPI1_RELEASE_RESET __HAL_RCC_SPI1_RELEASE_RESET
EricLew	0:80ee8f3b695e	1879	#define __SPI2_CLK_DISABLE __HAL_RCC_SPI2_CLK_DISABLE
EricLew	0:80ee8f3b695e	1880	#define __SPI2_CLK_ENABLE __HAL_RCC_SPI2_CLK_ENABLE
EricLew	0:80ee8f3b695e	1881	#define __SPI2_CLK_SLEEP_DISABLE __HAL_RCC_SPI2_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1882	#define __SPI2_CLK_SLEEP_ENABLE __HAL_RCC_SPI2_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1883	#define __SPI2_FORCE_RESET __HAL_RCC_SPI2_FORCE_RESET
EricLew	0:80ee8f3b695e	1884	#define __SPI2_RELEASE_RESET __HAL_RCC_SPI2_RELEASE_RESET
EricLew	0:80ee8f3b695e	1885	#define __SPI3_CLK_DISABLE __HAL_RCC_SPI3_CLK_DISABLE
EricLew	0:80ee8f3b695e	1886	#define __SPI3_CLK_ENABLE __HAL_RCC_SPI3_CLK_ENABLE
EricLew	0:80ee8f3b695e	1887	#define __SPI3_CLK_SLEEP_DISABLE __HAL_RCC_SPI3_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1888	#define __SPI3_CLK_SLEEP_ENABLE __HAL_RCC_SPI3_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1889	#define __SPI3_FORCE_RESET __HAL_RCC_SPI3_FORCE_RESET
EricLew	0:80ee8f3b695e	1890	#define __SPI3_RELEASE_RESET __HAL_RCC_SPI3_RELEASE_RESET
EricLew	0:80ee8f3b695e	1891	#define __SRAM_CLK_DISABLE __HAL_RCC_SRAM_CLK_DISABLE
EricLew	0:80ee8f3b695e	1892	#define __SRAM_CLK_ENABLE __HAL_RCC_SRAM_CLK_ENABLE
EricLew	0:80ee8f3b695e	1893	#define __SRAM1_CLK_SLEEP_DISABLE __HAL_RCC_SRAM1_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1894	#define __SRAM1_CLK_SLEEP_ENABLE __HAL_RCC_SRAM1_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1895	#define __SRAM2_CLK_SLEEP_DISABLE __HAL_RCC_SRAM2_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1896	#define __SRAM2_CLK_SLEEP_ENABLE __HAL_RCC_SRAM2_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1897	#define __SWPMI1_CLK_DISABLE __HAL_RCC_SWPMI1_CLK_DISABLE
EricLew	0:80ee8f3b695e	1898	#define __SWPMI1_CLK_ENABLE __HAL_RCC_SWPMI1_CLK_ENABLE
EricLew	0:80ee8f3b695e	1899	#define __SWPMI1_CLK_SLEEP_DISABLE __HAL_RCC_SWPMI1_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1900	#define __SWPMI1_CLK_SLEEP_ENABLE __HAL_RCC_SWPMI1_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1901	#define __SWPMI1_FORCE_RESET __HAL_RCC_SWPMI1_FORCE_RESET
EricLew	0:80ee8f3b695e	1902	#define __SWPMI1_RELEASE_RESET __HAL_RCC_SWPMI1_RELEASE_RESET
EricLew	0:80ee8f3b695e	1903	#define __SYSCFG_CLK_DISABLE __HAL_RCC_SYSCFG_CLK_DISABLE
EricLew	0:80ee8f3b695e	1904	#define __SYSCFG_CLK_ENABLE __HAL_RCC_SYSCFG_CLK_ENABLE
EricLew	0:80ee8f3b695e	1905	#define __SYSCFG_CLK_SLEEP_DISABLE __HAL_RCC_SYSCFG_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1906	#define __SYSCFG_CLK_SLEEP_ENABLE __HAL_RCC_SYSCFG_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1907	#define __SYSCFG_FORCE_RESET __HAL_RCC_SYSCFG_FORCE_RESET
EricLew	0:80ee8f3b695e	1908	#define __SYSCFG_RELEASE_RESET __HAL_RCC_SYSCFG_RELEASE_RESET
EricLew	0:80ee8f3b695e	1909	#define __TIM1_CLK_DISABLE __HAL_RCC_TIM1_CLK_DISABLE
EricLew	0:80ee8f3b695e	1910	#define __TIM1_CLK_ENABLE __HAL_RCC_TIM1_CLK_ENABLE
EricLew	0:80ee8f3b695e	1911	#define __TIM1_CLK_SLEEP_DISABLE __HAL_RCC_TIM1_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1912	#define __TIM1_CLK_SLEEP_ENABLE __HAL_RCC_TIM1_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1913	#define __TIM1_FORCE_RESET __HAL_RCC_TIM1_FORCE_RESET
EricLew	0:80ee8f3b695e	1914	#define __TIM1_RELEASE_RESET __HAL_RCC_TIM1_RELEASE_RESET
EricLew	0:80ee8f3b695e	1915	#define __TIM10_CLK_DISABLE __HAL_RCC_TIM10_CLK_DISABLE
EricLew	0:80ee8f3b695e	1916	#define __TIM10_CLK_ENABLE __HAL_RCC_TIM10_CLK_ENABLE
EricLew	0:80ee8f3b695e	1917	#define __TIM10_FORCE_RESET __HAL_RCC_TIM10_FORCE_RESET
EricLew	0:80ee8f3b695e	1918	#define __TIM10_RELEASE_RESET __HAL_RCC_TIM10_RELEASE_RESET
EricLew	0:80ee8f3b695e	1919	#define __TIM11_CLK_DISABLE __HAL_RCC_TIM11_CLK_DISABLE
EricLew	0:80ee8f3b695e	1920	#define __TIM11_CLK_ENABLE __HAL_RCC_TIM11_CLK_ENABLE
EricLew	0:80ee8f3b695e	1921	#define __TIM11_FORCE_RESET __HAL_RCC_TIM11_FORCE_RESET
EricLew	0:80ee8f3b695e	1922	#define __TIM11_RELEASE_RESET __HAL_RCC_TIM11_RELEASE_RESET
EricLew	0:80ee8f3b695e	1923	#define __TIM12_CLK_DISABLE __HAL_RCC_TIM12_CLK_DISABLE
EricLew	0:80ee8f3b695e	1924	#define __TIM12_CLK_ENABLE __HAL_RCC_TIM12_CLK_ENABLE
EricLew	0:80ee8f3b695e	1925	#define __TIM12_FORCE_RESET __HAL_RCC_TIM12_FORCE_RESET
EricLew	0:80ee8f3b695e	1926	#define __TIM12_RELEASE_RESET __HAL_RCC_TIM12_RELEASE_RESET
EricLew	0:80ee8f3b695e	1927	#define __TIM13_CLK_DISABLE __HAL_RCC_TIM13_CLK_DISABLE
EricLew	0:80ee8f3b695e	1928	#define __TIM13_CLK_ENABLE __HAL_RCC_TIM13_CLK_ENABLE
EricLew	0:80ee8f3b695e	1929	#define __TIM13_FORCE_RESET __HAL_RCC_TIM13_FORCE_RESET
EricLew	0:80ee8f3b695e	1930	#define __TIM13_RELEASE_RESET __HAL_RCC_TIM13_RELEASE_RESET
EricLew	0:80ee8f3b695e	1931	#define __TIM14_CLK_DISABLE __HAL_RCC_TIM14_CLK_DISABLE
EricLew	0:80ee8f3b695e	1932	#define __TIM14_CLK_ENABLE __HAL_RCC_TIM14_CLK_ENABLE
EricLew	0:80ee8f3b695e	1933	#define __TIM14_FORCE_RESET __HAL_RCC_TIM14_FORCE_RESET
EricLew	0:80ee8f3b695e	1934	#define __TIM14_RELEASE_RESET __HAL_RCC_TIM14_RELEASE_RESET
EricLew	0:80ee8f3b695e	1935	#define __TIM15_CLK_DISABLE __HAL_RCC_TIM15_CLK_DISABLE
EricLew	0:80ee8f3b695e	1936	#define __TIM15_CLK_ENABLE __HAL_RCC_TIM15_CLK_ENABLE
EricLew	0:80ee8f3b695e	1937	#define __TIM15_CLK_SLEEP_DISABLE __HAL_RCC_TIM15_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1938	#define __TIM15_CLK_SLEEP_ENABLE __HAL_RCC_TIM15_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1939	#define __TIM15_FORCE_RESET __HAL_RCC_TIM15_FORCE_RESET
EricLew	0:80ee8f3b695e	1940	#define __TIM15_RELEASE_RESET __HAL_RCC_TIM15_RELEASE_RESET
EricLew	0:80ee8f3b695e	1941	#define __TIM16_CLK_DISABLE __HAL_RCC_TIM16_CLK_DISABLE
EricLew	0:80ee8f3b695e	1942	#define __TIM16_CLK_ENABLE __HAL_RCC_TIM16_CLK_ENABLE
EricLew	0:80ee8f3b695e	1943	#define __TIM16_CLK_SLEEP_DISABLE __HAL_RCC_TIM16_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1944	#define __TIM16_CLK_SLEEP_ENABLE __HAL_RCC_TIM16_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1945	#define __TIM16_FORCE_RESET __HAL_RCC_TIM16_FORCE_RESET
EricLew	0:80ee8f3b695e	1946	#define __TIM16_RELEASE_RESET __HAL_RCC_TIM16_RELEASE_RESET
EricLew	0:80ee8f3b695e	1947	#define __TIM17_CLK_DISABLE __HAL_RCC_TIM17_CLK_DISABLE
EricLew	0:80ee8f3b695e	1948	#define __TIM17_CLK_ENABLE __HAL_RCC_TIM17_CLK_ENABLE
EricLew	0:80ee8f3b695e	1949	#define __TIM17_CLK_SLEEP_DISABLE __HAL_RCC_TIM17_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1950	#define __TIM17_CLK_SLEEP_ENABLE __HAL_RCC_TIM17_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1951	#define __TIM17_FORCE_RESET __HAL_RCC_TIM17_FORCE_RESET
EricLew	0:80ee8f3b695e	1952	#define __TIM17_RELEASE_RESET __HAL_RCC_TIM17_RELEASE_RESET
EricLew	0:80ee8f3b695e	1953	#define __TIM2_CLK_DISABLE __HAL_RCC_TIM2_CLK_DISABLE
EricLew	0:80ee8f3b695e	1954	#define __TIM2_CLK_ENABLE __HAL_RCC_TIM2_CLK_ENABLE
EricLew	0:80ee8f3b695e	1955	#define __TIM2_CLK_SLEEP_DISABLE __HAL_RCC_TIM2_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1956	#define __TIM2_CLK_SLEEP_ENABLE __HAL_RCC_TIM2_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1957	#define __TIM2_FORCE_RESET __HAL_RCC_TIM2_FORCE_RESET
EricLew	0:80ee8f3b695e	1958	#define __TIM2_RELEASE_RESET __HAL_RCC_TIM2_RELEASE_RESET
EricLew	0:80ee8f3b695e	1959	#define __TIM3_CLK_DISABLE __HAL_RCC_TIM3_CLK_DISABLE
EricLew	0:80ee8f3b695e	1960	#define __TIM3_CLK_ENABLE __HAL_RCC_TIM3_CLK_ENABLE
EricLew	0:80ee8f3b695e	1961	#define __TIM3_CLK_SLEEP_DISABLE __HAL_RCC_TIM3_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1962	#define __TIM3_CLK_SLEEP_ENABLE __HAL_RCC_TIM3_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1963	#define __TIM3_FORCE_RESET __HAL_RCC_TIM3_FORCE_RESET
EricLew	0:80ee8f3b695e	1964	#define __TIM3_RELEASE_RESET __HAL_RCC_TIM3_RELEASE_RESET
EricLew	0:80ee8f3b695e	1965	#define __TIM4_CLK_DISABLE __HAL_RCC_TIM4_CLK_DISABLE
EricLew	0:80ee8f3b695e	1966	#define __TIM4_CLK_ENABLE __HAL_RCC_TIM4_CLK_ENABLE
EricLew	0:80ee8f3b695e	1967	#define __TIM4_CLK_SLEEP_DISABLE __HAL_RCC_TIM4_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1968	#define __TIM4_CLK_SLEEP_ENABLE __HAL_RCC_TIM4_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1969	#define __TIM4_FORCE_RESET __HAL_RCC_TIM4_FORCE_RESET
EricLew	0:80ee8f3b695e	1970	#define __TIM4_RELEASE_RESET __HAL_RCC_TIM4_RELEASE_RESET
EricLew	0:80ee8f3b695e	1971	#define __TIM5_CLK_DISABLE __HAL_RCC_TIM5_CLK_DISABLE
EricLew	0:80ee8f3b695e	1972	#define __TIM5_CLK_ENABLE __HAL_RCC_TIM5_CLK_ENABLE
EricLew	0:80ee8f3b695e	1973	#define __TIM5_CLK_SLEEP_DISABLE __HAL_RCC_TIM5_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1974	#define __TIM5_CLK_SLEEP_ENABLE __HAL_RCC_TIM5_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1975	#define __TIM5_FORCE_RESET __HAL_RCC_TIM5_FORCE_RESET
EricLew	0:80ee8f3b695e	1976	#define __TIM5_RELEASE_RESET __HAL_RCC_TIM5_RELEASE_RESET
EricLew	0:80ee8f3b695e	1977	#define __TIM6_CLK_DISABLE __HAL_RCC_TIM6_CLK_DISABLE
EricLew	0:80ee8f3b695e	1978	#define __TIM6_CLK_ENABLE __HAL_RCC_TIM6_CLK_ENABLE
EricLew	0:80ee8f3b695e	1979	#define __TIM6_CLK_SLEEP_DISABLE __HAL_RCC_TIM6_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1980	#define __TIM6_CLK_SLEEP_ENABLE __HAL_RCC_TIM6_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1981	#define __TIM6_FORCE_RESET __HAL_RCC_TIM6_FORCE_RESET
EricLew	0:80ee8f3b695e	1982	#define __TIM6_RELEASE_RESET __HAL_RCC_TIM6_RELEASE_RESET
EricLew	0:80ee8f3b695e	1983	#define __TIM7_CLK_DISABLE __HAL_RCC_TIM7_CLK_DISABLE
EricLew	0:80ee8f3b695e	1984	#define __TIM7_CLK_ENABLE __HAL_RCC_TIM7_CLK_ENABLE
EricLew	0:80ee8f3b695e	1985	#define __TIM7_CLK_SLEEP_DISABLE __HAL_RCC_TIM7_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1986	#define __TIM7_CLK_SLEEP_ENABLE __HAL_RCC_TIM7_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1987	#define __TIM7_FORCE_RESET __HAL_RCC_TIM7_FORCE_RESET
EricLew	0:80ee8f3b695e	1988	#define __TIM7_RELEASE_RESET __HAL_RCC_TIM7_RELEASE_RESET
EricLew	0:80ee8f3b695e	1989	#define __TIM8_CLK_DISABLE __HAL_RCC_TIM8_CLK_DISABLE
EricLew	0:80ee8f3b695e	1990	#define __TIM8_CLK_ENABLE __HAL_RCC_TIM8_CLK_ENABLE
EricLew	0:80ee8f3b695e	1991	#define __TIM8_CLK_SLEEP_DISABLE __HAL_RCC_TIM8_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	1992	#define __TIM8_CLK_SLEEP_ENABLE __HAL_RCC_TIM8_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	1993	#define __TIM8_FORCE_RESET __HAL_RCC_TIM8_FORCE_RESET
EricLew	0:80ee8f3b695e	1994	#define __TIM8_RELEASE_RESET __HAL_RCC_TIM8_RELEASE_RESET
EricLew	0:80ee8f3b695e	1995	#define __TIM9_CLK_DISABLE __HAL_RCC_TIM9_CLK_DISABLE
EricLew	0:80ee8f3b695e	1996	#define __TIM9_CLK_ENABLE __HAL_RCC_TIM9_CLK_ENABLE
EricLew	0:80ee8f3b695e	1997	#define __TIM9_FORCE_RESET __HAL_RCC_TIM9_FORCE_RESET
EricLew	0:80ee8f3b695e	1998	#define __TIM9_RELEASE_RESET __HAL_RCC_TIM9_RELEASE_RESET
EricLew	0:80ee8f3b695e	1999	#define __TSC_CLK_DISABLE __HAL_RCC_TSC_CLK_DISABLE
EricLew	0:80ee8f3b695e	2000	#define __TSC_CLK_ENABLE __HAL_RCC_TSC_CLK_ENABLE
EricLew	0:80ee8f3b695e	2001	#define __TSC_CLK_SLEEP_DISABLE __HAL_RCC_TSC_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2002	#define __TSC_CLK_SLEEP_ENABLE __HAL_RCC_TSC_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2003	#define __TSC_FORCE_RESET __HAL_RCC_TSC_FORCE_RESET
EricLew	0:80ee8f3b695e	2004	#define __TSC_RELEASE_RESET __HAL_RCC_TSC_RELEASE_RESET
EricLew	0:80ee8f3b695e	2005	#define __UART4_CLK_DISABLE __HAL_RCC_UART4_CLK_DISABLE
EricLew	0:80ee8f3b695e	2006	#define __UART4_CLK_ENABLE __HAL_RCC_UART4_CLK_ENABLE
EricLew	0:80ee8f3b695e	2007	#define __UART4_CLK_SLEEP_DISABLE __HAL_RCC_UART4_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2008	#define __UART4_CLK_SLEEP_ENABLE __HAL_RCC_UART4_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2009	#define __UART4_FORCE_RESET __HAL_RCC_UART4_FORCE_RESET
EricLew	0:80ee8f3b695e	2010	#define __UART4_RELEASE_RESET __HAL_RCC_UART4_RELEASE_RESET
EricLew	0:80ee8f3b695e	2011	#define __UART5_CLK_DISABLE __HAL_RCC_UART5_CLK_DISABLE
EricLew	0:80ee8f3b695e	2012	#define __UART5_CLK_ENABLE __HAL_RCC_UART5_CLK_ENABLE
EricLew	0:80ee8f3b695e	2013	#define __UART5_CLK_SLEEP_DISABLE __HAL_RCC_UART5_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2014	#define __UART5_CLK_SLEEP_ENABLE __HAL_RCC_UART5_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2015	#define __UART5_FORCE_RESET __HAL_RCC_UART5_FORCE_RESET
EricLew	0:80ee8f3b695e	2016	#define __UART5_RELEASE_RESET __HAL_RCC_UART5_RELEASE_RESET
EricLew	0:80ee8f3b695e	2017	#define __USART1_CLK_DISABLE __HAL_RCC_USART1_CLK_DISABLE
EricLew	0:80ee8f3b695e	2018	#define __USART1_CLK_ENABLE __HAL_RCC_USART1_CLK_ENABLE
EricLew	0:80ee8f3b695e	2019	#define __USART1_CLK_SLEEP_DISABLE __HAL_RCC_USART1_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2020	#define __USART1_CLK_SLEEP_ENABLE __HAL_RCC_USART1_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2021	#define __USART1_FORCE_RESET __HAL_RCC_USART1_FORCE_RESET
EricLew	0:80ee8f3b695e	2022	#define __USART1_RELEASE_RESET __HAL_RCC_USART1_RELEASE_RESET
EricLew	0:80ee8f3b695e	2023	#define __USART2_CLK_DISABLE __HAL_RCC_USART2_CLK_DISABLE
EricLew	0:80ee8f3b695e	2024	#define __USART2_CLK_ENABLE __HAL_RCC_USART2_CLK_ENABLE
EricLew	0:80ee8f3b695e	2025	#define __USART2_CLK_SLEEP_DISABLE __HAL_RCC_USART2_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2026	#define __USART2_CLK_SLEEP_ENABLE __HAL_RCC_USART2_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2027	#define __USART2_FORCE_RESET __HAL_RCC_USART2_FORCE_RESET
EricLew	0:80ee8f3b695e	2028	#define __USART2_RELEASE_RESET __HAL_RCC_USART2_RELEASE_RESET
EricLew	0:80ee8f3b695e	2029	#define __USART3_CLK_DISABLE __HAL_RCC_USART3_CLK_DISABLE
EricLew	0:80ee8f3b695e	2030	#define __USART3_CLK_ENABLE __HAL_RCC_USART3_CLK_ENABLE
EricLew	0:80ee8f3b695e	2031	#define __USART3_CLK_SLEEP_DISABLE __HAL_RCC_USART3_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2032	#define __USART3_CLK_SLEEP_ENABLE __HAL_RCC_USART3_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2033	#define __USART3_FORCE_RESET __HAL_RCC_USART3_FORCE_RESET
EricLew	0:80ee8f3b695e	2034	#define __USART3_RELEASE_RESET __HAL_RCC_USART3_RELEASE_RESET
EricLew	0:80ee8f3b695e	2035	#define __USART4_CLK_DISABLE __HAL_RCC_USART4_CLK_DISABLE
EricLew	0:80ee8f3b695e	2036	#define __USART4_CLK_ENABLE __HAL_RCC_USART4_CLK_ENABLE
EricLew	0:80ee8f3b695e	2037	#define __USART4_CLK_SLEEP_ENABLE __HAL_RCC_USART4_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2038	#define __USART4_CLK_SLEEP_DISABLE __HAL_RCC_USART4_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2039	#define __USART4_FORCE_RESET __HAL_RCC_USART4_FORCE_RESET
EricLew	0:80ee8f3b695e	2040	#define __USART4_RELEASE_RESET __HAL_RCC_USART4_RELEASE_RESET
EricLew	0:80ee8f3b695e	2041	#define __USART5_CLK_DISABLE __HAL_RCC_USART5_CLK_DISABLE
EricLew	0:80ee8f3b695e	2042	#define __USART5_CLK_ENABLE __HAL_RCC_USART5_CLK_ENABLE
EricLew	0:80ee8f3b695e	2043	#define __USART5_CLK_SLEEP_ENABLE __HAL_RCC_USART5_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2044	#define __USART5_CLK_SLEEP_DISABLE __HAL_RCC_USART5_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2045	#define __USART5_FORCE_RESET __HAL_RCC_USART5_FORCE_RESET
EricLew	0:80ee8f3b695e	2046	#define __USART5_RELEASE_RESET __HAL_RCC_USART5_RELEASE_RESET
EricLew	0:80ee8f3b695e	2047	#define __USART7_CLK_DISABLE __HAL_RCC_USART7_CLK_DISABLE
EricLew	0:80ee8f3b695e	2048	#define __USART7_CLK_ENABLE __HAL_RCC_USART7_CLK_ENABLE
EricLew	0:80ee8f3b695e	2049	#define __USART7_FORCE_RESET __HAL_RCC_USART7_FORCE_RESET
EricLew	0:80ee8f3b695e	2050	#define __USART7_RELEASE_RESET __HAL_RCC_USART7_RELEASE_RESET
EricLew	0:80ee8f3b695e	2051	#define __USART8_CLK_DISABLE __HAL_RCC_USART8_CLK_DISABLE
EricLew	0:80ee8f3b695e	2052	#define __USART8_CLK_ENABLE __HAL_RCC_USART8_CLK_ENABLE
EricLew	0:80ee8f3b695e	2053	#define __USART8_FORCE_RESET __HAL_RCC_USART8_FORCE_RESET
EricLew	0:80ee8f3b695e	2054	#define __USART8_RELEASE_RESET __HAL_RCC_USART8_RELEASE_RESET
EricLew	0:80ee8f3b695e	2055	#define __USB_CLK_DISABLE __HAL_RCC_USB_CLK_DISABLE
EricLew	0:80ee8f3b695e	2056	#define __USB_CLK_ENABLE __HAL_RCC_USB_CLK_ENABLE
EricLew	0:80ee8f3b695e	2057	#define __USB_FORCE_RESET __HAL_RCC_USB_FORCE_RESET
EricLew	0:80ee8f3b695e	2058	#define __USB_CLK_SLEEP_ENABLE __HAL_RCC_USB_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2059	#define __USB_CLK_SLEEP_DISABLE __HAL_RCC_USB_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2060	#define __USB_OTG_FS_CLK_DISABLE __HAL_RCC_USB_OTG_FS_CLK_DISABLE
EricLew	0:80ee8f3b695e	2061	#define __USB_OTG_FS_CLK_ENABLE __HAL_RCC_USB_OTG_FS_CLK_ENABLE
EricLew	0:80ee8f3b695e	2062	#define __USB_RELEASE_RESET __HAL_RCC_USB_RELEASE_RESET
EricLew	0:80ee8f3b695e	2063	#define __WWDG_CLK_DISABLE __HAL_RCC_WWDG_CLK_DISABLE
EricLew	0:80ee8f3b695e	2064	#define __WWDG_CLK_ENABLE __HAL_RCC_WWDG_CLK_ENABLE
EricLew	0:80ee8f3b695e	2065	#define __WWDG_CLK_SLEEP_DISABLE __HAL_RCC_WWDG_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2066	#define __WWDG_CLK_SLEEP_ENABLE __HAL_RCC_WWDG_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2067	#define __WWDG_FORCE_RESET __HAL_RCC_WWDG_FORCE_RESET
EricLew	0:80ee8f3b695e	2068	#define __WWDG_RELEASE_RESET __HAL_RCC_WWDG_RELEASE_RESET
EricLew	0:80ee8f3b695e	2069	#define __TIM21_CLK_ENABLE __HAL_RCC_TIM21_CLK_ENABLE
EricLew	0:80ee8f3b695e	2070	#define __TIM21_CLK_DISABLE __HAL_RCC_TIM21_CLK_DISABLE
EricLew	0:80ee8f3b695e	2071	#define __TIM21_FORCE_RESET __HAL_RCC_TIM21_FORCE_RESET
EricLew	0:80ee8f3b695e	2072	#define __TIM21_RELEASE_RESET __HAL_RCC_TIM21_RELEASE_RESET
EricLew	0:80ee8f3b695e	2073	#define __TIM21_CLK_SLEEP_ENABLE __HAL_RCC_TIM21_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2074	#define __TIM21_CLK_SLEEP_DISABLE __HAL_RCC_TIM21_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2075	#define __TIM22_CLK_ENABLE __HAL_RCC_TIM22_CLK_ENABLE
EricLew	0:80ee8f3b695e	2076	#define __TIM22_CLK_DISABLE __HAL_RCC_TIM22_CLK_DISABLE
EricLew	0:80ee8f3b695e	2077	#define __TIM22_FORCE_RESET __HAL_RCC_TIM22_FORCE_RESET
EricLew	0:80ee8f3b695e	2078	#define __TIM22_RELEASE_RESET __HAL_RCC_TIM22_RELEASE_RESET
EricLew	0:80ee8f3b695e	2079	#define __TIM22_CLK_SLEEP_ENABLE __HAL_RCC_TIM22_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2080	#define __TIM22_CLK_SLEEP_DISABLE __HAL_RCC_TIM22_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2081	#define __CRS_CLK_DISABLE __HAL_RCC_CRS_CLK_DISABLE
EricLew	0:80ee8f3b695e	2082	#define __CRS_CLK_ENABLE __HAL_RCC_CRS_CLK_ENABLE
EricLew	0:80ee8f3b695e	2083	#define __CRS_CLK_SLEEP_DISABLE __HAL_RCC_CRS_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2084	#define __CRS_CLK_SLEEP_ENABLE __HAL_RCC_CRS_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2085	#define __CRS_FORCE_RESET __HAL_RCC_CRS_FORCE_RESET
EricLew	0:80ee8f3b695e	2086	#define __CRS_RELEASE_RESET __HAL_RCC_CRS_RELEASE_RESET
EricLew	0:80ee8f3b695e	2087	#define __RCC_BACKUPRESET_FORCE __HAL_RCC_BACKUPRESET_FORCE
EricLew	0:80ee8f3b695e	2088	#define __RCC_BACKUPRESET_RELEASE __HAL_RCC_BACKUPRESET_RELEASE
EricLew	0:80ee8f3b695e	2089
EricLew	0:80ee8f3b695e	2090	#define __USB_OTG_FS_FORCE_RESET __HAL_RCC_USB_OTG_FS_FORCE_RESET
EricLew	0:80ee8f3b695e	2091	#define __USB_OTG_FS_RELEASE_RESET __HAL_RCC_USB_OTG_FS_RELEASE_RESET
EricLew	0:80ee8f3b695e	2092	#define __USB_OTG_FS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_FS_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2093	#define __USB_OTG_FS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_FS_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2094	#define __USB_OTG_HS_CLK_DISABLE __HAL_RCC_USB_OTG_HS_CLK_DISABLE
EricLew	0:80ee8f3b695e	2095	#define __USB_OTG_HS_CLK_ENABLE __HAL_RCC_USB_OTG_HS_CLK_ENABLE
EricLew	0:80ee8f3b695e	2096	#define __USB_OTG_HS_ULPI_CLK_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE
EricLew	0:80ee8f3b695e	2097	#define __USB_OTG_HS_ULPI_CLK_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_DISABLE
EricLew	0:80ee8f3b695e	2098	#define __TIM9_CLK_SLEEP_ENABLE __HAL_RCC_TIM9_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2099	#define __TIM9_CLK_SLEEP_DISABLE __HAL_RCC_TIM9_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2100	#define __TIM10_CLK_SLEEP_ENABLE __HAL_RCC_TIM10_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2101	#define __TIM10_CLK_SLEEP_DISABLE __HAL_RCC_TIM10_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2102	#define __TIM11_CLK_SLEEP_ENABLE __HAL_RCC_TIM11_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2103	#define __TIM11_CLK_SLEEP_DISABLE __HAL_RCC_TIM11_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2104	#define __ETHMACPTP_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACPTP_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2105	#define __ETHMACPTP_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACPTP_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2106	#define __ETHMACPTP_CLK_ENABLE __HAL_RCC_ETHMACPTP_CLK_ENABLE
EricLew	0:80ee8f3b695e	2107	#define __ETHMACPTP_CLK_DISABLE __HAL_RCC_ETHMACPTP_CLK_DISABLE
EricLew	0:80ee8f3b695e	2108	#define __HASH_CLK_ENABLE __HAL_RCC_HASH_CLK_ENABLE
EricLew	0:80ee8f3b695e	2109	#define __HASH_FORCE_RESET __HAL_RCC_HASH_FORCE_RESET
EricLew	0:80ee8f3b695e	2110	#define __HASH_RELEASE_RESET __HAL_RCC_HASH_RELEASE_RESET
EricLew	0:80ee8f3b695e	2111	#define __HASH_CLK_SLEEP_ENABLE __HAL_RCC_HASH_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2112	#define __HASH_CLK_SLEEP_DISABLE __HAL_RCC_HASH_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2113	#define __HASH_CLK_DISABLE __HAL_RCC_HASH_CLK_DISABLE
EricLew	0:80ee8f3b695e	2114	#define __SPI5_CLK_ENABLE __HAL_RCC_SPI5_CLK_ENABLE
EricLew	0:80ee8f3b695e	2115	#define __SPI5_CLK_DISABLE __HAL_RCC_SPI5_CLK_DISABLE
EricLew	0:80ee8f3b695e	2116	#define __SPI5_FORCE_RESET __HAL_RCC_SPI5_FORCE_RESET
EricLew	0:80ee8f3b695e	2117	#define __SPI5_RELEASE_RESET __HAL_RCC_SPI5_RELEASE_RESET
EricLew	0:80ee8f3b695e	2118	#define __SPI5_CLK_SLEEP_ENABLE __HAL_RCC_SPI5_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2119	#define __SPI5_CLK_SLEEP_DISABLE __HAL_RCC_SPI5_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2120	#define __SPI6_CLK_ENABLE __HAL_RCC_SPI6_CLK_ENABLE
EricLew	0:80ee8f3b695e	2121	#define __SPI6_CLK_DISABLE __HAL_RCC_SPI6_CLK_DISABLE
EricLew	0:80ee8f3b695e	2122	#define __SPI6_FORCE_RESET __HAL_RCC_SPI6_FORCE_RESET
EricLew	0:80ee8f3b695e	2123	#define __SPI6_RELEASE_RESET __HAL_RCC_SPI6_RELEASE_RESET
EricLew	0:80ee8f3b695e	2124	#define __SPI6_CLK_SLEEP_ENABLE __HAL_RCC_SPI6_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2125	#define __SPI6_CLK_SLEEP_DISABLE __HAL_RCC_SPI6_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2126	#define __LTDC_CLK_ENABLE __HAL_RCC_LTDC_CLK_ENABLE
EricLew	0:80ee8f3b695e	2127	#define __LTDC_CLK_DISABLE __HAL_RCC_LTDC_CLK_DISABLE
EricLew	0:80ee8f3b695e	2128	#define __LTDC_FORCE_RESET __HAL_RCC_LTDC_FORCE_RESET
EricLew	0:80ee8f3b695e	2129	#define __LTDC_RELEASE_RESET __HAL_RCC_LTDC_RELEASE_RESET
EricLew	0:80ee8f3b695e	2130	#define __LTDC_CLK_SLEEP_ENABLE __HAL_RCC_LTDC_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2131	#define __ETHMAC_CLK_SLEEP_ENABLE __HAL_RCC_ETHMAC_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2132	#define __ETHMAC_CLK_SLEEP_DISABLE __HAL_RCC_ETHMAC_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2133	#define __ETHMACTX_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACTX_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2134	#define __ETHMACTX_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACTX_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2135	#define __ETHMACRX_CLK_SLEEP_ENABLE __HAL_RCC_ETHMACRX_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2136	#define __ETHMACRX_CLK_SLEEP_DISABLE __HAL_RCC_ETHMACRX_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2137	#define __TIM12_CLK_SLEEP_ENABLE __HAL_RCC_TIM12_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2138	#define __TIM12_CLK_SLEEP_DISABLE __HAL_RCC_TIM12_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2139	#define __TIM13_CLK_SLEEP_ENABLE __HAL_RCC_TIM13_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2140	#define __TIM13_CLK_SLEEP_DISABLE __HAL_RCC_TIM13_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2141	#define __TIM14_CLK_SLEEP_ENABLE __HAL_RCC_TIM14_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2142	#define __TIM14_CLK_SLEEP_DISABLE __HAL_RCC_TIM14_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2143	#define __BKPSRAM_CLK_ENABLE __HAL_RCC_BKPSRAM_CLK_ENABLE
EricLew	0:80ee8f3b695e	2144	#define __BKPSRAM_CLK_DISABLE __HAL_RCC_BKPSRAM_CLK_DISABLE
EricLew	0:80ee8f3b695e	2145	#define __BKPSRAM_CLK_SLEEP_ENABLE __HAL_RCC_BKPSRAM_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2146	#define __BKPSRAM_CLK_SLEEP_DISABLE __HAL_RCC_BKPSRAM_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2147	#define __CCMDATARAMEN_CLK_ENABLE __HAL_RCC_CCMDATARAMEN_CLK_ENABLE
EricLew	0:80ee8f3b695e	2148	#define __CCMDATARAMEN_CLK_DISABLE __HAL_RCC_CCMDATARAMEN_CLK_DISABLE
EricLew	0:80ee8f3b695e	2149	#define __USART6_CLK_ENABLE __HAL_RCC_USART6_CLK_ENABLE
EricLew	0:80ee8f3b695e	2150	#define __USART6_CLK_DISABLE __HAL_RCC_USART6_CLK_DISABLE
EricLew	0:80ee8f3b695e	2151	#define __USART6_FORCE_RESET __HAL_RCC_USART6_FORCE_RESET
EricLew	0:80ee8f3b695e	2152	#define __USART6_RELEASE_RESET __HAL_RCC_USART6_RELEASE_RESET
EricLew	0:80ee8f3b695e	2153	#define __USART6_CLK_SLEEP_ENABLE __HAL_RCC_USART6_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2154	#define __USART6_CLK_SLEEP_DISABLE __HAL_RCC_USART6_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2155	#define __SPI4_CLK_ENABLE __HAL_RCC_SPI4_CLK_ENABLE
EricLew	0:80ee8f3b695e	2156	#define __SPI4_CLK_DISABLE __HAL_RCC_SPI4_CLK_DISABLE
EricLew	0:80ee8f3b695e	2157	#define __SPI4_FORCE_RESET __HAL_RCC_SPI4_FORCE_RESET
EricLew	0:80ee8f3b695e	2158	#define __SPI4_RELEASE_RESET __HAL_RCC_SPI4_RELEASE_RESET
EricLew	0:80ee8f3b695e	2159	#define __SPI4_CLK_SLEEP_ENABLE __HAL_RCC_SPI4_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2160	#define __SPI4_CLK_SLEEP_DISABLE __HAL_RCC_SPI4_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2161	#define __GPIOI_CLK_ENABLE __HAL_RCC_GPIOI_CLK_ENABLE
EricLew	0:80ee8f3b695e	2162	#define __GPIOI_CLK_DISABLE __HAL_RCC_GPIOI_CLK_DISABLE
EricLew	0:80ee8f3b695e	2163	#define __GPIOI_FORCE_RESET __HAL_RCC_GPIOI_FORCE_RESET
EricLew	0:80ee8f3b695e	2164	#define __GPIOI_RELEASE_RESET __HAL_RCC_GPIOI_RELEASE_RESET
EricLew	0:80ee8f3b695e	2165	#define __GPIOI_CLK_SLEEP_ENABLE __HAL_RCC_GPIOI_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2166	#define __GPIOI_CLK_SLEEP_DISABLE __HAL_RCC_GPIOI_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2167	#define __GPIOJ_CLK_ENABLE __HAL_RCC_GPIOJ_CLK_ENABLE
EricLew	0:80ee8f3b695e	2168	#define __GPIOJ_CLK_DISABLE __HAL_RCC_GPIOJ_CLK_DISABLE
EricLew	0:80ee8f3b695e	2169	#define __GPIOJ_FORCE_RESET __HAL_RCC_GPIOJ_FORCE_RESET
EricLew	0:80ee8f3b695e	2170	#define __GPIOJ_RELEASE_RESET __HAL_RCC_GPIOJ_RELEASE_RESET
EricLew	0:80ee8f3b695e	2171	#define __GPIOJ_CLK_SLEEP_ENABLE __HAL_RCC_GPIOJ_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2172	#define __GPIOJ_CLK_SLEEP_DISABLE __HAL_RCC_GPIOJ_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2173	#define __GPIOK_CLK_ENABLE __HAL_RCC_GPIOK_CLK_ENABLE
EricLew	0:80ee8f3b695e	2174	#define __GPIOK_CLK_DISABLE __HAL_RCC_GPIOK_CLK_DISABLE
EricLew	0:80ee8f3b695e	2175	#define __GPIOK_RELEASE_RESET __HAL_RCC_GPIOK_RELEASE_RESET
EricLew	0:80ee8f3b695e	2176	#define __GPIOK_CLK_SLEEP_ENABLE __HAL_RCC_GPIOK_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2177	#define __GPIOK_CLK_SLEEP_DISABLE __HAL_RCC_GPIOK_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2178	#define __ETH_CLK_ENABLE __HAL_RCC_ETH_CLK_ENABLE
EricLew	0:80ee8f3b695e	2179	#define __ETH_CLK_DISABLE __HAL_RCC_ETH_CLK_DISABLE
EricLew	0:80ee8f3b695e	2180	#define __DCMI_CLK_ENABLE __HAL_RCC_DCMI_CLK_ENABLE
EricLew	0:80ee8f3b695e	2181	#define __DCMI_CLK_DISABLE __HAL_RCC_DCMI_CLK_DISABLE
EricLew	0:80ee8f3b695e	2182	#define __DCMI_FORCE_RESET __HAL_RCC_DCMI_FORCE_RESET
EricLew	0:80ee8f3b695e	2183	#define __DCMI_RELEASE_RESET __HAL_RCC_DCMI_RELEASE_RESET
EricLew	0:80ee8f3b695e	2184	#define __DCMI_CLK_SLEEP_ENABLE __HAL_RCC_DCMI_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2185	#define __DCMI_CLK_SLEEP_DISABLE __HAL_RCC_DCMI_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2186	#define __UART7_CLK_ENABLE __HAL_RCC_UART7_CLK_ENABLE
EricLew	0:80ee8f3b695e	2187	#define __UART7_CLK_DISABLE __HAL_RCC_UART7_CLK_DISABLE
EricLew	0:80ee8f3b695e	2188	#define __UART7_RELEASE_RESET __HAL_RCC_UART7_RELEASE_RESET
EricLew	0:80ee8f3b695e	2189	#define __UART7_FORCE_RESET __HAL_RCC_UART7_FORCE_RESET
EricLew	0:80ee8f3b695e	2190	#define __UART7_CLK_SLEEP_ENABLE __HAL_RCC_UART7_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2191	#define __UART7_CLK_SLEEP_DISABLE __HAL_RCC_UART7_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2192	#define __UART8_CLK_ENABLE __HAL_RCC_UART8_CLK_ENABLE
EricLew	0:80ee8f3b695e	2193	#define __UART8_CLK_DISABLE __HAL_RCC_UART8_CLK_DISABLE
EricLew	0:80ee8f3b695e	2194	#define __UART8_FORCE_RESET __HAL_RCC_UART8_FORCE_RESET
EricLew	0:80ee8f3b695e	2195	#define __UART8_RELEASE_RESET __HAL_RCC_UART8_RELEASE_RESET
EricLew	0:80ee8f3b695e	2196	#define __UART8_CLK_SLEEP_ENABLE __HAL_RCC_UART8_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2197	#define __UART8_CLK_SLEEP_DISABLE __HAL_RCC_UART8_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2198	#define __OTGHS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2199	#define __OTGHS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2200	#define __OTGHS_FORCE_RESET __HAL_RCC_USB_OTG_HS_FORCE_RESET
EricLew	0:80ee8f3b695e	2201	#define __OTGHS_RELEASE_RESET __HAL_RCC_USB_OTG_HS_RELEASE_RESET
EricLew	0:80ee8f3b695e	2202	#define __OTGHSULPI_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2203	#define __OTGHSULPI_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2204	#define __HAL_RCC_OTGHS_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2205	#define __HAL_RCC_OTGHS_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2206	#define __HAL_RCC_OTGHS_IS_CLK_SLEEP_ENABLED __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_ENABLED
EricLew	0:80ee8f3b695e	2207	#define __HAL_RCC_OTGHS_IS_CLK_SLEEP_DISABLED __HAL_RCC_USB_OTG_HS_IS_CLK_SLEEP_DISABLED
EricLew	0:80ee8f3b695e	2208	#define __HAL_RCC_OTGHS_FORCE_RESET __HAL_RCC_USB_OTG_HS_FORCE_RESET
EricLew	0:80ee8f3b695e	2209	#define __HAL_RCC_OTGHS_RELEASE_RESET __HAL_RCC_USB_OTG_HS_RELEASE_RESET
EricLew	0:80ee8f3b695e	2210	#define __HAL_RCC_OTGHSULPI_CLK_SLEEP_ENABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2211	#define __HAL_RCC_OTGHSULPI_CLK_SLEEP_DISABLE __HAL_RCC_USB_OTG_HS_ULPI_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2212	#define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_ENABLED __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_ENABLED
EricLew	0:80ee8f3b695e	2213	#define __HAL_RCC_OTGHSULPI_IS_CLK_SLEEP_DISABLED __HAL_RCC_USB_OTG_HS_ULPI_IS_CLK_SLEEP_DISABLED
EricLew	0:80ee8f3b695e	2214	#define __CRYP_FORCE_RESET __HAL_RCC_CRYP_FORCE_RESET
EricLew	0:80ee8f3b695e	2215	#define __SRAM3_CLK_SLEEP_ENABLE __HAL_RCC_SRAM3_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2216	#define __CAN2_CLK_SLEEP_ENABLE __HAL_RCC_CAN2_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2217	#define __CAN2_CLK_SLEEP_DISABLE __HAL_RCC_CAN2_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2218	#define __DAC_CLK_SLEEP_ENABLE __HAL_RCC_DAC_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2219	#define __DAC_CLK_SLEEP_DISABLE __HAL_RCC_DAC_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2220	#define __ADC2_CLK_SLEEP_ENABLE __HAL_RCC_ADC2_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2221	#define __ADC2_CLK_SLEEP_DISABLE __HAL_RCC_ADC2_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2222	#define __ADC3_CLK_SLEEP_ENABLE __HAL_RCC_ADC3_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2223	#define __ADC3_CLK_SLEEP_DISABLE __HAL_RCC_ADC3_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2224	#define __FSMC_FORCE_RESET __HAL_RCC_FSMC_FORCE_RESET
EricLew	0:80ee8f3b695e	2225	#define __FSMC_RELEASE_RESET __HAL_RCC_FSMC_RELEASE_RESET
EricLew	0:80ee8f3b695e	2226	#define __FSMC_CLK_SLEEP_ENABLE __HAL_RCC_FSMC_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2227	#define __FSMC_CLK_SLEEP_DISABLE __HAL_RCC_FSMC_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2228	#define __SDIO_FORCE_RESET __HAL_RCC_SDIO_FORCE_RESET
EricLew	0:80ee8f3b695e	2229	#define __SDIO_RELEASE_RESET __HAL_RCC_SDIO_RELEASE_RESET
EricLew	0:80ee8f3b695e	2230	#define __SDIO_CLK_SLEEP_DISABLE __HAL_RCC_SDIO_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2231	#define __SDIO_CLK_SLEEP_ENABLE __HAL_RCC_SDIO_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2232	#define __DMA2D_CLK_ENABLE __HAL_RCC_DMA2D_CLK_ENABLE
EricLew	0:80ee8f3b695e	2233	#define __DMA2D_CLK_DISABLE __HAL_RCC_DMA2D_CLK_DISABLE
EricLew	0:80ee8f3b695e	2234	#define __DMA2D_FORCE_RESET __HAL_RCC_DMA2D_FORCE_RESET
EricLew	0:80ee8f3b695e	2235	#define __DMA2D_RELEASE_RESET __HAL_RCC_DMA2D_RELEASE_RESET
EricLew	0:80ee8f3b695e	2236	#define __DMA2D_CLK_SLEEP_ENABLE __HAL_RCC_DMA2D_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2237	#define __DMA2D_CLK_SLEEP_DISABLE __HAL_RCC_DMA2D_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2238
EricLew	0:80ee8f3b695e	2239	/* alias define maintained for legacy */
EricLew	0:80ee8f3b695e	2240	#define __HAL_RCC_OTGFS_FORCE_RESET __HAL_RCC_USB_OTG_FS_FORCE_RESET
EricLew	0:80ee8f3b695e	2241	#define __HAL_RCC_OTGFS_RELEASE_RESET __HAL_RCC_USB_OTG_FS_RELEASE_RESET
EricLew	0:80ee8f3b695e	2242
EricLew	0:80ee8f3b695e	2243	#define __ADC12_CLK_ENABLE __HAL_RCC_ADC12_CLK_ENABLE
EricLew	0:80ee8f3b695e	2244	#define __ADC12_CLK_DISABLE __HAL_RCC_ADC12_CLK_DISABLE
EricLew	0:80ee8f3b695e	2245	#define __ADC34_CLK_ENABLE __HAL_RCC_ADC34_CLK_ENABLE
EricLew	0:80ee8f3b695e	2246	#define __ADC34_CLK_DISABLE __HAL_RCC_ADC34_CLK_DISABLE
EricLew	0:80ee8f3b695e	2247	#define __ADC12_CLK_ENABLE __HAL_RCC_ADC12_CLK_ENABLE
EricLew	0:80ee8f3b695e	2248	#define __ADC12_CLK_DISABLE __HAL_RCC_ADC12_CLK_DISABLE
EricLew	0:80ee8f3b695e	2249	#define __DAC2_CLK_ENABLE __HAL_RCC_DAC2_CLK_ENABLE
EricLew	0:80ee8f3b695e	2250	#define __DAC2_CLK_DISABLE __HAL_RCC_DAC2_CLK_DISABLE
EricLew	0:80ee8f3b695e	2251	#define __TIM18_CLK_ENABLE __HAL_RCC_TIM18_CLK_ENABLE
EricLew	0:80ee8f3b695e	2252	#define __TIM18_CLK_DISABLE __HAL_RCC_TIM18_CLK_DISABLE
EricLew	0:80ee8f3b695e	2253	#define __TIM19_CLK_ENABLE __HAL_RCC_TIM19_CLK_ENABLE
EricLew	0:80ee8f3b695e	2254	#define __TIM19_CLK_DISABLE __HAL_RCC_TIM19_CLK_DISABLE
EricLew	0:80ee8f3b695e	2255	#define __TIM20_CLK_ENABLE __HAL_RCC_TIM20_CLK_ENABLE
EricLew	0:80ee8f3b695e	2256	#define __TIM20_CLK_DISABLE __HAL_RCC_TIM20_CLK_DISABLE
EricLew	0:80ee8f3b695e	2257	#define __HRTIM1_CLK_ENABLE __HAL_RCC_HRTIM1_CLK_ENABLE
EricLew	0:80ee8f3b695e	2258	#define __HRTIM1_CLK_DISABLE __HAL_RCC_HRTIM1_CLK_DISABLE
EricLew	0:80ee8f3b695e	2259	#define __SDADC1_CLK_ENABLE __HAL_RCC_SDADC1_CLK_ENABLE
EricLew	0:80ee8f3b695e	2260	#define __SDADC2_CLK_ENABLE __HAL_RCC_SDADC2_CLK_ENABLE
EricLew	0:80ee8f3b695e	2261	#define __SDADC3_CLK_ENABLE __HAL_RCC_SDADC3_CLK_ENABLE
EricLew	0:80ee8f3b695e	2262	#define __SDADC1_CLK_DISABLE __HAL_RCC_SDADC1_CLK_DISABLE
EricLew	0:80ee8f3b695e	2263	#define __SDADC2_CLK_DISABLE __HAL_RCC_SDADC2_CLK_DISABLE
EricLew	0:80ee8f3b695e	2264	#define __SDADC3_CLK_DISABLE __HAL_RCC_SDADC3_CLK_DISABLE
EricLew	0:80ee8f3b695e	2265
EricLew	0:80ee8f3b695e	2266	#define __ADC12_FORCE_RESET __HAL_RCC_ADC12_FORCE_RESET
EricLew	0:80ee8f3b695e	2267	#define __ADC12_RELEASE_RESET __HAL_RCC_ADC12_RELEASE_RESET
EricLew	0:80ee8f3b695e	2268	#define __ADC34_FORCE_RESET __HAL_RCC_ADC34_FORCE_RESET
EricLew	0:80ee8f3b695e	2269	#define __ADC34_RELEASE_RESET __HAL_RCC_ADC34_RELEASE_RESET
EricLew	0:80ee8f3b695e	2270	#define __ADC12_FORCE_RESET __HAL_RCC_ADC12_FORCE_RESET
EricLew	0:80ee8f3b695e	2271	#define __ADC12_RELEASE_RESET __HAL_RCC_ADC12_RELEASE_RESET
EricLew	0:80ee8f3b695e	2272	#define __DAC2_FORCE_RESET __HAL_RCC_DAC2_FORCE_RESET
EricLew	0:80ee8f3b695e	2273	#define __DAC2_RELEASE_RESET __HAL_RCC_DAC2_RELEASE_RESET
EricLew	0:80ee8f3b695e	2274	#define __TIM18_FORCE_RESET __HAL_RCC_TIM18_FORCE_RESET
EricLew	0:80ee8f3b695e	2275	#define __TIM18_RELEASE_RESET __HAL_RCC_TIM18_RELEASE_RESET
EricLew	0:80ee8f3b695e	2276	#define __TIM19_FORCE_RESET __HAL_RCC_TIM19_FORCE_RESET
EricLew	0:80ee8f3b695e	2277	#define __TIM19_RELEASE_RESET __HAL_RCC_TIM19_RELEASE_RESET
EricLew	0:80ee8f3b695e	2278	#define __TIM20_FORCE_RESET __HAL_RCC_TIM20_FORCE_RESET
EricLew	0:80ee8f3b695e	2279	#define __TIM20_RELEASE_RESET __HAL_RCC_TIM20_RELEASE_RESET
EricLew	0:80ee8f3b695e	2280	#define __HRTIM1_FORCE_RESET __HAL_RCC_HRTIM1_FORCE_RESET
EricLew	0:80ee8f3b695e	2281	#define __HRTIM1_RELEASE_RESET __HAL_RCC_HRTIM1_RELEASE_RESET
EricLew	0:80ee8f3b695e	2282	#define __SDADC1_FORCE_RESET __HAL_RCC_SDADC1_FORCE_RESET
EricLew	0:80ee8f3b695e	2283	#define __SDADC2_FORCE_RESET __HAL_RCC_SDADC2_FORCE_RESET
EricLew	0:80ee8f3b695e	2284	#define __SDADC3_FORCE_RESET __HAL_RCC_SDADC3_FORCE_RESET
EricLew	0:80ee8f3b695e	2285	#define __SDADC1_RELEASE_RESET __HAL_RCC_SDADC1_RELEASE_RESET
EricLew	0:80ee8f3b695e	2286	#define __SDADC2_RELEASE_RESET __HAL_RCC_SDADC2_RELEASE_RESET
EricLew	0:80ee8f3b695e	2287	#define __SDADC3_RELEASE_RESET __HAL_RCC_SDADC3_RELEASE_RESET
EricLew	0:80ee8f3b695e	2288
EricLew	0:80ee8f3b695e	2289	#define __ADC1_IS_CLK_ENABLED __HAL_RCC_ADC1_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2290	#define __ADC1_IS_CLK_DISABLED __HAL_RCC_ADC1_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2291	#define __ADC12_IS_CLK_ENABLED __HAL_RCC_ADC12_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2292	#define __ADC12_IS_CLK_DISABLED __HAL_RCC_ADC12_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2293	#define __ADC34_IS_CLK_ENABLED __HAL_RCC_ADC34_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2294	#define __ADC34_IS_CLK_DISABLED __HAL_RCC_ADC34_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2295	#define __CEC_IS_CLK_ENABLED __HAL_RCC_CEC_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2296	#define __CEC_IS_CLK_DISABLED __HAL_RCC_CEC_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2297	#define __CRC_IS_CLK_ENABLED __HAL_RCC_CRC_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2298	#define __CRC_IS_CLK_DISABLED __HAL_RCC_CRC_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2299	#define __DAC1_IS_CLK_ENABLED __HAL_RCC_DAC1_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2300	#define __DAC1_IS_CLK_DISABLED __HAL_RCC_DAC1_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2301	#define __DAC2_IS_CLK_ENABLED __HAL_RCC_DAC2_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2302	#define __DAC2_IS_CLK_DISABLED __HAL_RCC_DAC2_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2303	#define __DMA1_IS_CLK_ENABLED __HAL_RCC_DMA1_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2304	#define __DMA1_IS_CLK_DISABLED __HAL_RCC_DMA1_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2305	#define __DMA2_IS_CLK_ENABLED __HAL_RCC_DMA2_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2306	#define __DMA2_IS_CLK_DISABLED __HAL_RCC_DMA2_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2307	#define __FLITF_IS_CLK_ENABLED __HAL_RCC_FLITF_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2308	#define __FLITF_IS_CLK_DISABLED __HAL_RCC_FLITF_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2309	#define __FMC_IS_CLK_ENABLED __HAL_RCC_FMC_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2310	#define __FMC_IS_CLK_DISABLED __HAL_RCC_FMC_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2311	#define __GPIOA_IS_CLK_ENABLED __HAL_RCC_GPIOA_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2312	#define __GPIOA_IS_CLK_DISABLED __HAL_RCC_GPIOA_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2313	#define __GPIOB_IS_CLK_ENABLED __HAL_RCC_GPIOB_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2314	#define __GPIOB_IS_CLK_DISABLED __HAL_RCC_GPIOB_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2315	#define __GPIOC_IS_CLK_ENABLED __HAL_RCC_GPIOC_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2316	#define __GPIOC_IS_CLK_DISABLED __HAL_RCC_GPIOC_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2317	#define __GPIOD_IS_CLK_ENABLED __HAL_RCC_GPIOD_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2318	#define __GPIOD_IS_CLK_DISABLED __HAL_RCC_GPIOD_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2319	#define __GPIOE_IS_CLK_ENABLED __HAL_RCC_GPIOE_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2320	#define __GPIOE_IS_CLK_DISABLED __HAL_RCC_GPIOE_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2321	#define __GPIOF_IS_CLK_ENABLED __HAL_RCC_GPIOF_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2322	#define __GPIOF_IS_CLK_DISABLED __HAL_RCC_GPIOF_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2323	#define __GPIOG_IS_CLK_ENABLED __HAL_RCC_GPIOG_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2324	#define __GPIOG_IS_CLK_DISABLED __HAL_RCC_GPIOG_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2325	#define __GPIOH_IS_CLK_ENABLED __HAL_RCC_GPIOH_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2326	#define __GPIOH_IS_CLK_DISABLED __HAL_RCC_GPIOH_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2327	#define __HRTIM1_IS_CLK_ENABLED __HAL_RCC_HRTIM1_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2328	#define __HRTIM1_IS_CLK_DISABLED __HAL_RCC_HRTIM1_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2329	#define __I2C1_IS_CLK_ENABLED __HAL_RCC_I2C1_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2330	#define __I2C1_IS_CLK_DISABLED __HAL_RCC_I2C1_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2331	#define __I2C2_IS_CLK_ENABLED __HAL_RCC_I2C2_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2332	#define __I2C2_IS_CLK_DISABLED __HAL_RCC_I2C2_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2333	#define __I2C3_IS_CLK_ENABLED __HAL_RCC_I2C3_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2334	#define __I2C3_IS_CLK_DISABLED __HAL_RCC_I2C3_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2335	#define __PWR_IS_CLK_ENABLED __HAL_RCC_PWR_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2336	#define __PWR_IS_CLK_DISABLED __HAL_RCC_PWR_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2337	#define __SYSCFG_IS_CLK_ENABLED __HAL_RCC_SYSCFG_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2338	#define __SYSCFG_IS_CLK_DISABLED __HAL_RCC_SYSCFG_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2339	#define __SPI1_IS_CLK_ENABLED __HAL_RCC_SPI1_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2340	#define __SPI1_IS_CLK_DISABLED __HAL_RCC_SPI1_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2341	#define __SPI2_IS_CLK_ENABLED __HAL_RCC_SPI2_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2342	#define __SPI2_IS_CLK_DISABLED __HAL_RCC_SPI2_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2343	#define __SPI3_IS_CLK_ENABLED __HAL_RCC_SPI3_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2344	#define __SPI3_IS_CLK_DISABLED __HAL_RCC_SPI3_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2345	#define __SPI4_IS_CLK_ENABLED __HAL_RCC_SPI4_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2346	#define __SPI4_IS_CLK_DISABLED __HAL_RCC_SPI4_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2347	#define __SDADC1_IS_CLK_ENABLED __HAL_RCC_SDADC1_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2348	#define __SDADC1_IS_CLK_DISABLED __HAL_RCC_SDADC1_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2349	#define __SDADC2_IS_CLK_ENABLED __HAL_RCC_SDADC2_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2350	#define __SDADC2_IS_CLK_DISABLED __HAL_RCC_SDADC2_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2351	#define __SDADC3_IS_CLK_ENABLED __HAL_RCC_SDADC3_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2352	#define __SDADC3_IS_CLK_DISABLED __HAL_RCC_SDADC3_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2353	#define __SRAM_IS_CLK_ENABLED __HAL_RCC_SRAM_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2354	#define __SRAM_IS_CLK_DISABLED __HAL_RCC_SRAM_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2355	#define __TIM1_IS_CLK_ENABLED __HAL_RCC_TIM1_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2356	#define __TIM1_IS_CLK_DISABLED __HAL_RCC_TIM1_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2357	#define __TIM2_IS_CLK_ENABLED __HAL_RCC_TIM2_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2358	#define __TIM2_IS_CLK_DISABLED __HAL_RCC_TIM2_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2359	#define __TIM3_IS_CLK_ENABLED __HAL_RCC_TIM3_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2360	#define __TIM3_IS_CLK_DISABLED __HAL_RCC_TIM3_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2361	#define __TIM4_IS_CLK_ENABLED __HAL_RCC_TIM4_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2362	#define __TIM4_IS_CLK_DISABLED __HAL_RCC_TIM4_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2363	#define __TIM5_IS_CLK_ENABLED __HAL_RCC_TIM5_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2364	#define __TIM5_IS_CLK_DISABLED __HAL_RCC_TIM5_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2365	#define __TIM6_IS_CLK_ENABLED __HAL_RCC_TIM6_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2366	#define __TIM6_IS_CLK_DISABLED __HAL_RCC_TIM6_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2367	#define __TIM7_IS_CLK_ENABLED __HAL_RCC_TIM7_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2368	#define __TIM7_IS_CLK_DISABLED __HAL_RCC_TIM7_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2369	#define __TIM8_IS_CLK_ENABLED __HAL_RCC_TIM8_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2370	#define __TIM8_IS_CLK_DISABLED __HAL_RCC_TIM8_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2371	#define __TIM12_IS_CLK_ENABLED __HAL_RCC_TIM12_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2372	#define __TIM12_IS_CLK_DISABLED __HAL_RCC_TIM12_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2373	#define __TIM13_IS_CLK_ENABLED __HAL_RCC_TIM13_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2374	#define __TIM13_IS_CLK_DISABLED __HAL_RCC_TIM13_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2375	#define __TIM14_IS_CLK_ENABLED __HAL_RCC_TIM14_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2376	#define __TIM14_IS_CLK_DISABLED __HAL_RCC_TIM14_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2377	#define __TIM15_IS_CLK_ENABLED __HAL_RCC_TIM15_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2378	#define __TIM15_IS_CLK_DISABLED __HAL_RCC_TIM15_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2379	#define __TIM16_IS_CLK_ENABLED __HAL_RCC_TIM16_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2380	#define __TIM16_IS_CLK_DISABLED __HAL_RCC_TIM16_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2381	#define __TIM17_IS_CLK_ENABLED __HAL_RCC_TIM17_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2382	#define __TIM17_IS_CLK_DISABLED __HAL_RCC_TIM17_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2383	#define __TIM18_IS_CLK_ENABLED __HAL_RCC_TIM18_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2384	#define __TIM18_IS_CLK_DISABLED __HAL_RCC_TIM18_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2385	#define __TIM19_IS_CLK_ENABLED __HAL_RCC_TIM19_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2386	#define __TIM19_IS_CLK_DISABLED __HAL_RCC_TIM19_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2387	#define __TIM20_IS_CLK_ENABLED __HAL_RCC_TIM20_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2388	#define __TIM20_IS_CLK_DISABLED __HAL_RCC_TIM20_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2389	#define __TSC_IS_CLK_ENABLED __HAL_RCC_TSC_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2390	#define __TSC_IS_CLK_DISABLED __HAL_RCC_TSC_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2391	#define __UART4_IS_CLK_ENABLED __HAL_RCC_UART4_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2392	#define __UART4_IS_CLK_DISABLED __HAL_RCC_UART4_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2393	#define __UART5_IS_CLK_ENABLED __HAL_RCC_UART5_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2394	#define __UART5_IS_CLK_DISABLED __HAL_RCC_UART5_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2395	#define __USART1_IS_CLK_ENABLED __HAL_RCC_USART1_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2396	#define __USART1_IS_CLK_DISABLED __HAL_RCC_USART1_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2397	#define __USART2_IS_CLK_ENABLED __HAL_RCC_USART2_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2398	#define __USART2_IS_CLK_DISABLED __HAL_RCC_USART2_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2399	#define __USART3_IS_CLK_ENABLED __HAL_RCC_USART3_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2400	#define __USART3_IS_CLK_DISABLED __HAL_RCC_USART3_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2401	#define __USB_IS_CLK_ENABLED __HAL_RCC_USB_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2402	#define __USB_IS_CLK_DISABLED __HAL_RCC_USB_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2403	#define __WWDG_IS_CLK_ENABLED __HAL_RCC_WWDG_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2404	#define __WWDG_IS_CLK_DISABLED __HAL_RCC_WWDG_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2405
EricLew	0:80ee8f3b695e	2406	#if defined(STM32F4)
EricLew	0:80ee8f3b695e	2407	#define __HAL_RCC_SDMMC1_FORCE_RESET __HAL_RCC_SDIO_FORCE_RESET
EricLew	0:80ee8f3b695e	2408	#define __HAL_RCC_SDMMC1_RELEASE_RESET __HAL_RCC_SDIO_RELEASE_RESET
EricLew	0:80ee8f3b695e	2409	#define __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE __HAL_RCC_SDIO_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2410	#define __HAL_RCC_SDMMC1_CLK_SLEEP_DISABLE __HAL_RCC_SDIO_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2411	#define __HAL_RCC_SDMMC1_CLK_ENABLE __HAL_RCC_SDIO_CLK_ENABLE
EricLew	0:80ee8f3b695e	2412	#define __HAL_RCC_SDMMC1_CLK_DISABLE __HAL_RCC_SDIO_CLK_DISABLE
EricLew	0:80ee8f3b695e	2413	#define __HAL_RCC_SDMMC1_IS_CLK_ENABLED __HAL_RCC_SDIO_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2414	#define __HAL_RCC_SDMMC1_IS_CLK_DISABLED __HAL_RCC_SDIO_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2415	#define Sdmmc1ClockSelection SdioClockSelection
EricLew	0:80ee8f3b695e	2416	#define RCC_PERIPHCLK_SDMMC1 RCC_PERIPHCLK_SDIO
EricLew	0:80ee8f3b695e	2417	#define RCC_SDMMC1CLKSOURCE_CLK48 RCC_SDIOCLKSOURCE_CK48
EricLew	0:80ee8f3b695e	2418	#define RCC_SDMMC1CLKSOURCE_SYSCLK RCC_SDIOCLKSOURCE_SYSCLK
EricLew	0:80ee8f3b695e	2419	#define __HAL_RCC_SDMMC1_CONFIG __HAL_RCC_SDIO_CONFIG
EricLew	0:80ee8f3b695e	2420	#define __HAL_RCC_GET_SDMMC1_SOURCE __HAL_RCC_GET_SDIO_SOURCE
EricLew	0:80ee8f3b695e	2421	#endif
EricLew	0:80ee8f3b695e	2422
EricLew	0:80ee8f3b695e	2423	#if defined(STM32F7) \|\| defined(STM32L4)
EricLew	0:80ee8f3b695e	2424	#define __HAL_RCC_SDIO_FORCE_RESET __HAL_RCC_SDMMC1_FORCE_RESET
EricLew	0:80ee8f3b695e	2425	#define __HAL_RCC_SDIO_RELEASE_RESET __HAL_RCC_SDMMC1_RELEASE_RESET
EricLew	0:80ee8f3b695e	2426	#define __HAL_RCC_SDIO_CLK_SLEEP_ENABLE __HAL_RCC_SDMMC1_CLK_SLEEP_ENABLE
EricLew	0:80ee8f3b695e	2427	#define __HAL_RCC_SDIO_CLK_SLEEP_DISABLE __HAL_RCC_SDMMC1_CLK_SLEEP_DISABLE
EricLew	0:80ee8f3b695e	2428	#define __HAL_RCC_SDIO_CLK_ENABLE __HAL_RCC_SDMMC1_CLK_ENABLE
EricLew	0:80ee8f3b695e	2429	#define __HAL_RCC_SDIO_CLK_DISABLE __HAL_RCC_SDMMC1_CLK_DISABLE
EricLew	0:80ee8f3b695e	2430	#define __HAL_RCC_SDIO_IS_CLK_ENABLED __HAL_RCC_SDMMC1_IS_CLK_ENABLED
EricLew	0:80ee8f3b695e	2431	#define __HAL_RCC_SDIO_IS_CLK_DISABLED __HAL_RCC_SDMMC1_IS_CLK_DISABLED
EricLew	0:80ee8f3b695e	2432	#define SdioClockSelection Sdmmc1ClockSelection
EricLew	0:80ee8f3b695e	2433	#define RCC_PERIPHCLK_SDIO RCC_PERIPHCLK_SDMMC1
EricLew	0:80ee8f3b695e	2434	#define __HAL_RCC_SDIO_CONFIG __HAL_RCC_SDMMC1_CONFIG
EricLew	0:80ee8f3b695e	2435	#define __HAL_RCC_GET_SDIO_SOURCE __HAL_RCC_GET_SDMMC1_SOURCE
EricLew	0:80ee8f3b695e	2436	#endif
EricLew	0:80ee8f3b695e	2437
EricLew	0:80ee8f3b695e	2438	#if defined(STM32F7)
EricLew	0:80ee8f3b695e	2439	#define RCC_SDIOCLKSOURCE_CK48 RCC_SDMMC1CLKSOURCE_CLK48
EricLew	0:80ee8f3b695e	2440	#define RCC_SDIOCLKSOURCE_SYSCLK RCC_SDMMC1CLKSOURCE_SYSCLK
EricLew	0:80ee8f3b695e	2441	#endif
EricLew	0:80ee8f3b695e	2442
EricLew	0:80ee8f3b695e	2443	#define __HAL_RCC_I2SCLK __HAL_RCC_I2S_CONFIG
EricLew	0:80ee8f3b695e	2444	#define __HAL_RCC_I2SCLK_CONFIG __HAL_RCC_I2S_CONFIG
EricLew	0:80ee8f3b695e	2445
EricLew	0:80ee8f3b695e	2446	#define __RCC_PLLSRC RCC_GET_PLL_OSCSOURCE
EricLew	0:80ee8f3b695e	2447
EricLew	0:80ee8f3b695e	2448	#define IS_RCC_MSIRANGE IS_RCC_MSI_CLOCK_RANGE
EricLew	0:80ee8f3b695e	2449	#define IS_RCC_RTCCLK_SOURCE IS_RCC_RTCCLKSOURCE
EricLew	0:80ee8f3b695e	2450	#define IS_RCC_SYSCLK_DIV IS_RCC_HCLK
EricLew	0:80ee8f3b695e	2451	#define IS_RCC_HCLK_DIV IS_RCC_PCLK
EricLew	0:80ee8f3b695e	2452	#define IS_RCC_PERIPHCLK IS_RCC_PERIPHCLOCK
EricLew	0:80ee8f3b695e	2453
EricLew	0:80ee8f3b695e	2454	#define RCC_IT_HSI14 RCC_IT_HSI14RDY
EricLew	0:80ee8f3b695e	2455
EricLew	0:80ee8f3b695e	2456	#define IS_RCC_MCOSOURCE IS_RCC_MCO1SOURCE
EricLew	0:80ee8f3b695e	2457	#define __HAL_RCC_MCO_CONFIG __HAL_RCC_MCO1_CONFIG
EricLew	0:80ee8f3b695e	2458	#define RCC_MCO_NODIV RCC_MCODIV_1
EricLew	0:80ee8f3b695e	2459	#define RCC_MCO_DIV1 RCC_MCODIV_1
EricLew	0:80ee8f3b695e	2460	#define RCC_MCO_DIV2 RCC_MCODIV_2
EricLew	0:80ee8f3b695e	2461	#define RCC_MCO_DIV4 RCC_MCODIV_4
EricLew	0:80ee8f3b695e	2462	#define RCC_MCO_DIV8 RCC_MCODIV_8
EricLew	0:80ee8f3b695e	2463	#define RCC_MCO_DIV16 RCC_MCODIV_16
EricLew	0:80ee8f3b695e	2464	#define RCC_MCO_DIV32 RCC_MCODIV_32
EricLew	0:80ee8f3b695e	2465	#define RCC_MCO_DIV64 RCC_MCODIV_64
EricLew	0:80ee8f3b695e	2466	#define RCC_MCO_DIV128 RCC_MCODIV_128
EricLew	0:80ee8f3b695e	2467	#define RCC_MCOSOURCE_NONE RCC_MCO1SOURCE_NOCLOCK
EricLew	0:80ee8f3b695e	2468	#define RCC_MCOSOURCE_LSI RCC_MCO1SOURCE_LSI
EricLew	0:80ee8f3b695e	2469	#define RCC_MCOSOURCE_LSE RCC_MCO1SOURCE_LSE
EricLew	0:80ee8f3b695e	2470	#define RCC_MCOSOURCE_SYSCLK RCC_MCO1SOURCE_SYSCLK
EricLew	0:80ee8f3b695e	2471	#define RCC_MCOSOURCE_HSI RCC_MCO1SOURCE_HSI
EricLew	0:80ee8f3b695e	2472	#define RCC_MCOSOURCE_HSI14 RCC_MCO1SOURCE_HSI14
EricLew	0:80ee8f3b695e	2473	#define RCC_MCOSOURCE_HSI48 RCC_MCO1SOURCE_HSI48
EricLew	0:80ee8f3b695e	2474	#define RCC_MCOSOURCE_HSE RCC_MCO1SOURCE_HSE
EricLew	0:80ee8f3b695e	2475	#define RCC_MCOSOURCE_PLLCLK_DIV1 RCC_MCO1SOURCE_PLLCLK
EricLew	0:80ee8f3b695e	2476	#define RCC_MCOSOURCE_PLLCLK_NODIV RCC_MCO1SOURCE_PLLCLK
EricLew	0:80ee8f3b695e	2477	#define RCC_MCOSOURCE_PLLCLK_DIV2 RCC_MCO1SOURCE_PLLCLK_DIV2
EricLew	0:80ee8f3b695e	2478
EricLew	0:80ee8f3b695e	2479	#define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK
EricLew	0:80ee8f3b695e	2480
EricLew	0:80ee8f3b695e	2481	#define RCC_USBCLK_PLLSAI1 RCC_USBCLKSOURCE_PLLSAI1
EricLew	0:80ee8f3b695e	2482	#define RCC_USBCLK_PLL RCC_USBCLKSOURCE_PLL
EricLew	0:80ee8f3b695e	2483	#define RCC_USBCLK_MSI RCC_USBCLKSOURCE_MSI
EricLew	0:80ee8f3b695e	2484	#define RCC_USBCLKSOURCE_PLLCLK RCC_USBCLKSOURCE_PLL
EricLew	0:80ee8f3b695e	2485	#define RCC_USBPLLCLK_DIV1 RCC_USBCLKSOURCE_PLL
EricLew	0:80ee8f3b695e	2486	#define RCC_USBPLLCLK_DIV1_5 RCC_USBCLKSOURCE_PLL_DIV1_5
EricLew	0:80ee8f3b695e	2487	#define RCC_USBPLLCLK_DIV2 RCC_USBCLKSOURCE_PLL_DIV2
EricLew	0:80ee8f3b695e	2488	#define RCC_USBPLLCLK_DIV3 RCC_USBCLKSOURCE_PLL_DIV3
EricLew	0:80ee8f3b695e	2489
EricLew	0:80ee8f3b695e	2490	#define HSION_BitNumber RCC_HSION_BIT_NUMBER
EricLew	0:80ee8f3b695e	2491	#define HSION_BITNUMBER RCC_HSION_BIT_NUMBER
EricLew	0:80ee8f3b695e	2492	#define HSEON_BitNumber RCC_HSEON_BIT_NUMBER
EricLew	0:80ee8f3b695e	2493	#define HSEON_BITNUMBER RCC_HSEON_BIT_NUMBER
EricLew	0:80ee8f3b695e	2494	#define MSION_BITNUMBER RCC_MSION_BIT_NUMBER
EricLew	0:80ee8f3b695e	2495	#define CSSON_BitNumber RCC_CSSON_BIT_NUMBER
EricLew	0:80ee8f3b695e	2496	#define CSSON_BITNUMBER RCC_CSSON_BIT_NUMBER
EricLew	0:80ee8f3b695e	2497	#define PLLON_BitNumber RCC_PLLON_BIT_NUMBER
EricLew	0:80ee8f3b695e	2498	#define PLLON_BITNUMBER RCC_PLLON_BIT_NUMBER
EricLew	0:80ee8f3b695e	2499	#define PLLI2SON_BitNumber RCC_PLLI2SON_BIT_NUMBER
EricLew	0:80ee8f3b695e	2500	#define I2SSRC_BitNumber RCC_I2SSRC_BIT_NUMBER
EricLew	0:80ee8f3b695e	2501	#define RTCEN_BitNumber RCC_RTCEN_BIT_NUMBER
EricLew	0:80ee8f3b695e	2502	#define RTCEN_BITNUMBER RCC_RTCEN_BIT_NUMBER
EricLew	0:80ee8f3b695e	2503	#define BDRST_BitNumber RCC_BDRST_BIT_NUMBER
EricLew	0:80ee8f3b695e	2504	#define BDRST_BITNUMBER RCC_BDRST_BIT_NUMBER
EricLew	0:80ee8f3b695e	2505	#define RTCRST_BITNUMBER RCC_RTCRST_BIT_NUMBER
EricLew	0:80ee8f3b695e	2506	#define LSION_BitNumber RCC_LSION_BIT_NUMBER
EricLew	0:80ee8f3b695e	2507	#define LSION_BITNUMBER RCC_LSION_BIT_NUMBER
EricLew	0:80ee8f3b695e	2508	#define LSEON_BitNumber RCC_LSEON_BIT_NUMBER
EricLew	0:80ee8f3b695e	2509	#define LSEON_BITNUMBER RCC_LSEON_BIT_NUMBER
EricLew	0:80ee8f3b695e	2510	#define LSEBYP_BITNUMBER RCC_LSEBYP_BIT_NUMBER
EricLew	0:80ee8f3b695e	2511	#define PLLSAION_BitNumber RCC_PLLSAION_BIT_NUMBER
EricLew	0:80ee8f3b695e	2512	#define TIMPRE_BitNumber RCC_TIMPRE_BIT_NUMBER
EricLew	0:80ee8f3b695e	2513	#define RMVF_BitNumber RCC_RMVF_BIT_NUMBER
EricLew	0:80ee8f3b695e	2514	#define RMVF_BITNUMBER RCC_RMVF_BIT_NUMBER
EricLew	0:80ee8f3b695e	2515	#define RCC_CR2_HSI14TRIM_BitNumber RCC_HSI14TRIM_BIT_NUMBER
EricLew	0:80ee8f3b695e	2516	#define CR_BYTE2_ADDRESS RCC_CR_BYTE2_ADDRESS
EricLew	0:80ee8f3b695e	2517	#define CIR_BYTE1_ADDRESS RCC_CIR_BYTE1_ADDRESS
EricLew	0:80ee8f3b695e	2518	#define CIR_BYTE2_ADDRESS RCC_CIR_BYTE2_ADDRESS
EricLew	0:80ee8f3b695e	2519	#define BDCR_BYTE0_ADDRESS RCC_BDCR_BYTE0_ADDRESS
EricLew	0:80ee8f3b695e	2520	#define DBP_TIMEOUT_VALUE RCC_DBP_TIMEOUT_VALUE
EricLew	0:80ee8f3b695e	2521	#define LSE_TIMEOUT_VALUE RCC_LSE_TIMEOUT_VALUE
EricLew	0:80ee8f3b695e	2522
EricLew	0:80ee8f3b695e	2523	#define CR_HSION_BB RCC_CR_HSION_BB
EricLew	0:80ee8f3b695e	2524	#define CR_CSSON_BB RCC_CR_CSSON_BB
EricLew	0:80ee8f3b695e	2525	#define CR_PLLON_BB RCC_CR_PLLON_BB
EricLew	0:80ee8f3b695e	2526	#define CR_PLLI2SON_BB RCC_CR_PLLI2SON_BB
EricLew	0:80ee8f3b695e	2527	#define CR_MSION_BB RCC_CR_MSION_BB
EricLew	0:80ee8f3b695e	2528	#define CSR_LSION_BB RCC_CSR_LSION_BB
EricLew	0:80ee8f3b695e	2529	#define CSR_LSEON_BB RCC_CSR_LSEON_BB
EricLew	0:80ee8f3b695e	2530	#define CSR_LSEBYP_BB RCC_CSR_LSEBYP_BB
EricLew	0:80ee8f3b695e	2531	#define CSR_RTCEN_BB RCC_CSR_RTCEN_BB
EricLew	0:80ee8f3b695e	2532	#define CSR_RTCRST_BB RCC_CSR_RTCRST_BB
EricLew	0:80ee8f3b695e	2533	#define CFGR_I2SSRC_BB RCC_CFGR_I2SSRC_BB
EricLew	0:80ee8f3b695e	2534	#define BDCR_RTCEN_BB RCC_BDCR_RTCEN_BB
EricLew	0:80ee8f3b695e	2535	#define BDCR_BDRST_BB RCC_BDCR_BDRST_BB
EricLew	0:80ee8f3b695e	2536	#define CR_HSEON_BB RCC_CR_HSEON_BB
EricLew	0:80ee8f3b695e	2537	#define CSR_RMVF_BB RCC_CSR_RMVF_BB
EricLew	0:80ee8f3b695e	2538	#define CR_PLLSAION_BB RCC_CR_PLLSAION_BB
EricLew	0:80ee8f3b695e	2539	#define DCKCFGR_TIMPRE_BB RCC_DCKCFGR_TIMPRE_BB
EricLew	0:80ee8f3b695e	2540
EricLew	0:80ee8f3b695e	2541	#define __HAL_RCC_CRS_ENABLE_FREQ_ERROR_COUNTER __HAL_RCC_CRS_FREQ_ERROR_COUNTER_ENABLE
EricLew	0:80ee8f3b695e	2542	#define __HAL_RCC_CRS_DISABLE_FREQ_ERROR_COUNTER __HAL_RCC_CRS_FREQ_ERROR_COUNTER_DISABLE
EricLew	0:80ee8f3b695e	2543	#define __HAL_RCC_CRS_ENABLE_AUTOMATIC_CALIB __HAL_RCC_CRS_AUTOMATIC_CALIB_ENABLE
EricLew	0:80ee8f3b695e	2544	#define __HAL_RCC_CRS_DISABLE_AUTOMATIC_CALIB __HAL_RCC_CRS_AUTOMATIC_CALIB_DISABLE
EricLew	0:80ee8f3b695e	2545	#define __HAL_RCC_CRS_CALCULATE_RELOADVALUE __HAL_RCC_CRS_RELOADVALUE_CALCULATE
EricLew	0:80ee8f3b695e	2546
EricLew	0:80ee8f3b695e	2547	#define __HAL_RCC_GET_IT_SOURCE __HAL_RCC_GET_IT
EricLew	0:80ee8f3b695e	2548	/**
EricLew	0:80ee8f3b695e	2549	* @}
EricLew	0:80ee8f3b695e	2550	*/
EricLew	0:80ee8f3b695e	2551
EricLew	0:80ee8f3b695e	2552	/** @defgroup HAL_RNG_Aliased_Macros HAL RNG Aliased Macros maintained for legacy purpose
EricLew	0:80ee8f3b695e	2553	* @{
EricLew	0:80ee8f3b695e	2554	*/
EricLew	0:80ee8f3b695e	2555	#define HAL_RNG_ReadyCallback(__HANDLE__) HAL_RNG_ReadyDataCallback((__HANDLE__), uint32_t random32bit)
EricLew	0:80ee8f3b695e	2556
EricLew	0:80ee8f3b695e	2557	/**
EricLew	0:80ee8f3b695e	2558	* @}
EricLew	0:80ee8f3b695e	2559	*/
EricLew	0:80ee8f3b695e	2560
EricLew	0:80ee8f3b695e	2561	/** @defgroup HAL_RTC_Aliased_Macros HAL RTC Aliased Macros maintained for legacy purpose
EricLew	0:80ee8f3b695e	2562	* @{
EricLew	0:80ee8f3b695e	2563	*/
EricLew	0:80ee8f3b695e	2564
EricLew	0:80ee8f3b695e	2565	#define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG
EricLew	0:80ee8f3b695e	2566	#define __HAL_RTC_DISABLE_IT __HAL_RTC_EXTI_DISABLE_IT
EricLew	0:80ee8f3b695e	2567	#define __HAL_RTC_ENABLE_IT __HAL_RTC_EXTI_ENABLE_IT
EricLew	0:80ee8f3b695e	2568
EricLew	0:80ee8f3b695e	2569	#if defined (STM32F1)
EricLew	0:80ee8f3b695e	2570	#define __HAL_RTC_EXTI_CLEAR_FLAG(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_CLEAR_FLAG()
EricLew	0:80ee8f3b695e	2571
EricLew	0:80ee8f3b695e	2572	#define __HAL_RTC_EXTI_ENABLE_IT(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_ENABLE_IT()
EricLew	0:80ee8f3b695e	2573
EricLew	0:80ee8f3b695e	2574	#define __HAL_RTC_EXTI_DISABLE_IT(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_DISABLE_IT()
EricLew	0:80ee8f3b695e	2575
EricLew	0:80ee8f3b695e	2576	#define __HAL_RTC_EXTI_GET_FLAG(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_GET_FLAG()
EricLew	0:80ee8f3b695e	2577
EricLew	0:80ee8f3b695e	2578	#define __HAL_RTC_EXTI_GENERATE_SWIT(RTC_EXTI_LINE_ALARM_EVENT) __HAL_RTC_ALARM_EXTI_GENERATE_SWIT()
EricLew	0:80ee8f3b695e	2579	#else
EricLew	0:80ee8f3b695e	2580	#define __HAL_RTC_EXTI_CLEAR_FLAG(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_CLEAR_FLAG() : \
EricLew	0:80ee8f3b695e	2581	(((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_CLEAR_FLAG() : \
EricLew	0:80ee8f3b695e	2582	__HAL_RTC_TAMPER_TIMESTAMP_EXTI_CLEAR_FLAG()))
EricLew	0:80ee8f3b695e	2583	#define __HAL_RTC_EXTI_ENABLE_IT(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_ENABLE_IT() : \
EricLew	0:80ee8f3b695e	2584	(((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_ENABLE_IT() : \
EricLew	0:80ee8f3b695e	2585	__HAL_RTC_TAMPER_TIMESTAMP_EXTI_ENABLE_IT()))
EricLew	0:80ee8f3b695e	2586	#define __HAL_RTC_EXTI_DISABLE_IT(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_DISABLE_IT() : \
EricLew	0:80ee8f3b695e	2587	(((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_DISABLE_IT() : \
EricLew	0:80ee8f3b695e	2588	__HAL_RTC_TAMPER_TIMESTAMP_EXTI_DISABLE_IT()))
EricLew	0:80ee8f3b695e	2589	#define __HAL_RTC_EXTI_GET_FLAG(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_GET_FLAG() : \
EricLew	0:80ee8f3b695e	2590	(((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_GET_FLAG() : \
EricLew	0:80ee8f3b695e	2591	__HAL_RTC_TAMPER_TIMESTAMP_EXTI_GET_FLAG()))
EricLew	0:80ee8f3b695e	2592	#define __HAL_RTC_EXTI_GENERATE_SWIT(__EXTI_LINE__) (((__EXTI_LINE__) == RTC_EXTI_LINE_ALARM_EVENT) ? __HAL_RTC_ALARM_EXTI_GENERATE_SWIT() : \
EricLew	0:80ee8f3b695e	2593	(((__EXTI_LINE__) == RTC_EXTI_LINE_WAKEUPTIMER_EVENT) ? __HAL_RTC_WAKEUPTIMER_EXTI_GENERATE_SWIT() : \
EricLew	0:80ee8f3b695e	2594	__HAL_RTC_TAMPER_TIMESTAMP_EXTI_GENERATE_SWIT()))
EricLew	0:80ee8f3b695e	2595	#endif /* STM32F1 */
EricLew	0:80ee8f3b695e	2596
EricLew	0:80ee8f3b695e	2597	#define IS_ALARM IS_RTC_ALARM
EricLew	0:80ee8f3b695e	2598	#define IS_ALARM_MASK IS_RTC_ALARM_MASK
EricLew	0:80ee8f3b695e	2599	#define IS_TAMPER IS_RTC_TAMPER
EricLew	0:80ee8f3b695e	2600	#define IS_TAMPER_ERASE_MODE IS_RTC_TAMPER_ERASE_MODE
EricLew	0:80ee8f3b695e	2601	#define IS_TAMPER_FILTER IS_RTC_TAMPER_FILTER
EricLew	0:80ee8f3b695e	2602	#define IS_TAMPER_INTERRUPT IS_RTC_TAMPER_INTERRUPT
EricLew	0:80ee8f3b695e	2603	#define IS_TAMPER_MASKFLAG_STATE IS_RTC_TAMPER_MASKFLAG_STATE
EricLew	0:80ee8f3b695e	2604	#define IS_TAMPER_PRECHARGE_DURATION IS_RTC_TAMPER_PRECHARGE_DURATION
EricLew	0:80ee8f3b695e	2605	#define IS_TAMPER_PULLUP_STATE IS_RTC_TAMPER_PULLUP_STATE
EricLew	0:80ee8f3b695e	2606	#define IS_TAMPER_SAMPLING_FREQ IS_RTC_TAMPER_SAMPLING_FREQ
EricLew	0:80ee8f3b695e	2607	#define IS_TAMPER_TIMESTAMPONTAMPER_DETECTION IS_RTC_TAMPER_TIMESTAMPONTAMPER_DETECTION
EricLew	0:80ee8f3b695e	2608	#define IS_TAMPER_TRIGGER IS_RTC_TAMPER_TRIGGER
EricLew	0:80ee8f3b695e	2609	#define IS_WAKEUP_CLOCK IS_RTC_WAKEUP_CLOCK
EricLew	0:80ee8f3b695e	2610	#define IS_WAKEUP_COUNTER IS_RTC_WAKEUP_COUNTER
EricLew	0:80ee8f3b695e	2611
EricLew	0:80ee8f3b695e	2612	#define __RTC_WRITEPROTECTION_ENABLE __HAL_RTC_WRITEPROTECTION_ENABLE
EricLew	0:80ee8f3b695e	2613	#define __RTC_WRITEPROTECTION_DISABLE __HAL_RTC_WRITEPROTECTION_DISABLE
EricLew	0:80ee8f3b695e	2614
EricLew	0:80ee8f3b695e	2615	/**
EricLew	0:80ee8f3b695e	2616	* @}
EricLew	0:80ee8f3b695e	2617	*/
EricLew	0:80ee8f3b695e	2618
EricLew	0:80ee8f3b695e	2619	/** @defgroup HAL_SD_Aliased_Macros HAL SD Aliased Macros maintained for legacy purpose
EricLew	0:80ee8f3b695e	2620	* @{
EricLew	0:80ee8f3b695e	2621	*/
EricLew	0:80ee8f3b695e	2622
EricLew	0:80ee8f3b695e	2623	#define SD_OCR_CID_CSD_OVERWRIETE SD_OCR_CID_CSD_OVERWRITE
EricLew	0:80ee8f3b695e	2624	#define SD_CMD_SD_APP_STAUS SD_CMD_SD_APP_STATUS
EricLew	0:80ee8f3b695e	2625
EricLew	0:80ee8f3b695e	2626	#if defined(STM32F4)
EricLew	0:80ee8f3b695e	2627	#define SD_SDMMC_DISABLED SD_SDIO_DISABLED
EricLew	0:80ee8f3b695e	2628	#define SD_SDMMC_FUNCTION_BUSY SD_SDIO_FUNCTION_BUSY
EricLew	0:80ee8f3b695e	2629	#define SD_SDMMC_FUNCTION_FAILED SD_SDIO_FUNCTION_FAILED
EricLew	0:80ee8f3b695e	2630	#define SD_SDMMC_UNKNOWN_FUNCTION SD_SDIO_UNKNOWN_FUNCTION
EricLew	0:80ee8f3b695e	2631	#define SD_CMD_SDMMC_SEN_OP_COND SD_CMD_SDIO_SEN_OP_COND
EricLew	0:80ee8f3b695e	2632	#define SD_CMD_SDMMC_RW_DIRECT SD_CMD_SDIO_RW_DIRECT
EricLew	0:80ee8f3b695e	2633	#define SD_CMD_SDMMC_RW_EXTENDED SD_CMD_SDIO_RW_EXTENDED
EricLew	0:80ee8f3b695e	2634	#define __HAL_SD_SDMMC_ENABLE __HAL_SD_SDIO_ENABLE
EricLew	0:80ee8f3b695e	2635	#define __HAL_SD_SDMMC_DISABLE __HAL_SD_SDIO_DISABLE
EricLew	0:80ee8f3b695e	2636	#define __HAL_SD_SDMMC_DMA_ENABLE __HAL_SD_SDIO_DMA_ENABLE
EricLew	0:80ee8f3b695e	2637	#define __HAL_SD_SDMMC_DMA_DISABLE __HAL_SD_SDIO_DMA_DISABL
EricLew	0:80ee8f3b695e	2638	#define __HAL_SD_SDMMC_ENABLE_IT __HAL_SD_SDIO_ENABLE_IT
EricLew	0:80ee8f3b695e	2639	#define __HAL_SD_SDMMC_DISABLE_IT __HAL_SD_SDIO_DISABLE_IT
EricLew	0:80ee8f3b695e	2640	#define __HAL_SD_SDMMC_GET_FLAG __HAL_SD_SDIO_GET_FLAG
EricLew	0:80ee8f3b695e	2641	#define __HAL_SD_SDMMC_CLEAR_FLAG __HAL_SD_SDIO_CLEAR_FLAG
EricLew	0:80ee8f3b695e	2642	#define __HAL_SD_SDMMC_GET_IT __HAL_SD_SDIO_GET_IT
EricLew	0:80ee8f3b695e	2643	#define __HAL_SD_SDMMC_CLEAR_IT __HAL_SD_SDIO_CLEAR_IT
EricLew	0:80ee8f3b695e	2644	#define SDMMC_STATIC_FLAGS SDIO_STATIC_FLAGS
EricLew	0:80ee8f3b695e	2645	#define SDMMC_CMD0TIMEOUT SDIO_CMD0TIMEOUT
EricLew	0:80ee8f3b695e	2646	#define SD_SDMMC_SEND_IF_COND SD_SDIO_SEND_IF_COND
EricLew	0:80ee8f3b695e	2647	/* alias CMSIS */
EricLew	0:80ee8f3b695e	2648	#define SDMMC1_IRQn SDIO_IRQn
EricLew	0:80ee8f3b695e	2649	#define SDMMC1_IRQHandler SDIO_IRQHandler
EricLew	0:80ee8f3b695e	2650	#endif
EricLew	0:80ee8f3b695e	2651
EricLew	0:80ee8f3b695e	2652	#if defined(STM32F7) \|\| defined(STM32L4)
EricLew	0:80ee8f3b695e	2653	#define SD_SDIO_DISABLED SD_SDMMC_DISABLED
EricLew	0:80ee8f3b695e	2654	#define SD_SDIO_FUNCTION_BUSY SD_SDMMC_FUNCTION_BUSY
EricLew	0:80ee8f3b695e	2655	#define SD_SDIO_FUNCTION_FAILED SD_SDMMC_FUNCTION_FAILED
EricLew	0:80ee8f3b695e	2656	#define SD_SDIO_UNKNOWN_FUNCTION SD_SDMMC_UNKNOWN_FUNCTION
EricLew	0:80ee8f3b695e	2657	#define SD_CMD_SDIO_SEN_OP_COND SD_CMD_SDMMC_SEN_OP_COND
EricLew	0:80ee8f3b695e	2658	#define SD_CMD_SDIO_RW_DIRECT SD_CMD_SDMMC_RW_DIRECT
EricLew	0:80ee8f3b695e	2659	#define SD_CMD_SDIO_RW_EXTENDED SD_CMD_SDMMC_RW_EXTENDED
EricLew	0:80ee8f3b695e	2660	#define __HAL_SD_SDIO_ENABLE __HAL_SD_SDMMC_ENABLE
EricLew	0:80ee8f3b695e	2661	#define __HAL_SD_SDIO_DISABLE __HAL_SD_SDMMC_DISABLE
EricLew	0:80ee8f3b695e	2662	#define __HAL_SD_SDIO_DMA_ENABLE __HAL_SD_SDMMC_DMA_ENABLE
EricLew	0:80ee8f3b695e	2663	#define __HAL_SD_SDIO_DMA_DISABL __HAL_SD_SDMMC_DMA_DISABLE
EricLew	0:80ee8f3b695e	2664	#define __HAL_SD_SDIO_ENABLE_IT __HAL_SD_SDMMC_ENABLE_IT
EricLew	0:80ee8f3b695e	2665	#define __HAL_SD_SDIO_DISABLE_IT __HAL_SD_SDMMC_DISABLE_IT
EricLew	0:80ee8f3b695e	2666	#define __HAL_SD_SDIO_GET_FLAG __HAL_SD_SDMMC_GET_FLAG
EricLew	0:80ee8f3b695e	2667	#define __HAL_SD_SDIO_CLEAR_FLAG __HAL_SD_SDMMC_CLEAR_FLAG
EricLew	0:80ee8f3b695e	2668	#define __HAL_SD_SDIO_GET_IT __HAL_SD_SDMMC_GET_IT
EricLew	0:80ee8f3b695e	2669	#define __HAL_SD_SDIO_CLEAR_IT __HAL_SD_SDMMC_CLEAR_IT
EricLew	0:80ee8f3b695e	2670	#define SDIO_STATIC_FLAGS SDMMC_STATIC_FLAGS
EricLew	0:80ee8f3b695e	2671	#define SDIO_CMD0TIMEOUT SDMMC_CMD0TIMEOUT
EricLew	0:80ee8f3b695e	2672	#define SD_SDIO_SEND_IF_COND SD_SDMMC_SEND_IF_COND
EricLew	0:80ee8f3b695e	2673	/* alias CMSIS for compatibilities */
EricLew	0:80ee8f3b695e	2674	#define SDIO_IRQn SDMMC1_IRQn
EricLew	0:80ee8f3b695e	2675	#define SDIO_IRQHandler SDMMC1_IRQHandler
EricLew	0:80ee8f3b695e	2676	#endif
EricLew	0:80ee8f3b695e	2677	/**
EricLew	0:80ee8f3b695e	2678	* @}
EricLew	0:80ee8f3b695e	2679	*/
EricLew	0:80ee8f3b695e	2680
EricLew	0:80ee8f3b695e	2681	/** @defgroup HAL_SMARTCARD_Aliased_Macros HAL SMARTCARD Aliased Macros maintained for legacy purpose
EricLew	0:80ee8f3b695e	2682	* @{
EricLew	0:80ee8f3b695e	2683	*/
EricLew	0:80ee8f3b695e	2684
EricLew	0:80ee8f3b695e	2685	#define __SMARTCARD_ENABLE_IT __HAL_SMARTCARD_ENABLE_IT
EricLew	0:80ee8f3b695e	2686	#define __SMARTCARD_DISABLE_IT __HAL_SMARTCARD_DISABLE_IT
EricLew	0:80ee8f3b695e	2687	#define __SMARTCARD_ENABLE __HAL_SMARTCARD_ENABLE
EricLew	0:80ee8f3b695e	2688	#define __SMARTCARD_DISABLE __HAL_SMARTCARD_DISABLE
EricLew	0:80ee8f3b695e	2689	#define __SMARTCARD_DMA_REQUEST_ENABLE __HAL_SMARTCARD_DMA_REQUEST_ENABLE
EricLew	0:80ee8f3b695e	2690	#define __SMARTCARD_DMA_REQUEST_DISABLE __HAL_SMARTCARD_DMA_REQUEST_DISABLE
EricLew	0:80ee8f3b695e	2691
EricLew	0:80ee8f3b695e	2692	#define __HAL_SMARTCARD_GETCLOCKSOURCE SMARTCARD_GETCLOCKSOURCE
EricLew	0:80ee8f3b695e	2693	#define __SMARTCARD_GETCLOCKSOURCE SMARTCARD_GETCLOCKSOURCE
EricLew	0:80ee8f3b695e	2694
EricLew	0:80ee8f3b695e	2695	#define IS_SMARTCARD_ONEBIT_SAMPLING IS_SMARTCARD_ONE_BIT_SAMPLE
EricLew	0:80ee8f3b695e	2696
EricLew	0:80ee8f3b695e	2697	/**
EricLew	0:80ee8f3b695e	2698	* @}
EricLew	0:80ee8f3b695e	2699	*/
EricLew	0:80ee8f3b695e	2700
EricLew	0:80ee8f3b695e	2701	/** @defgroup HAL_SMBUS_Aliased_Macros HAL SMBUS Aliased Macros maintained for legacy purpose
EricLew	0:80ee8f3b695e	2702	* @{
EricLew	0:80ee8f3b695e	2703	*/
EricLew	0:80ee8f3b695e	2704	#define __HAL_SMBUS_RESET_CR1 SMBUS_RESET_CR1
EricLew	0:80ee8f3b695e	2705	#define __HAL_SMBUS_RESET_CR2 SMBUS_RESET_CR2
EricLew	0:80ee8f3b695e	2706	#define __HAL_SMBUS_GENERATE_START SMBUS_GENERATE_START
EricLew	0:80ee8f3b695e	2707	#define __HAL_SMBUS_GET_ADDR_MATCH SMBUS_GET_ADDR_MATCH
EricLew	0:80ee8f3b695e	2708	#define __HAL_SMBUS_GET_DIR SMBUS_GET_DIR
EricLew	0:80ee8f3b695e	2709	#define __HAL_SMBUS_GET_STOP_MODE SMBUS_GET_STOP_MODE
EricLew	0:80ee8f3b695e	2710	#define __HAL_SMBUS_GET_PEC_MODE SMBUS_GET_PEC_MODE
EricLew	0:80ee8f3b695e	2711	#define __HAL_SMBUS_GET_ALERT_ENABLED SMBUS_GET_ALERT_ENABLED
EricLew	0:80ee8f3b695e	2712	/**
EricLew	0:80ee8f3b695e	2713	* @}
EricLew	0:80ee8f3b695e	2714	*/
EricLew	0:80ee8f3b695e	2715
EricLew	0:80ee8f3b695e	2716	/** @defgroup HAL_SPI_Aliased_Macros HAL SPI Aliased Macros maintained for legacy purpose
EricLew	0:80ee8f3b695e	2717	* @{
EricLew	0:80ee8f3b695e	2718	*/
EricLew	0:80ee8f3b695e	2719
EricLew	0:80ee8f3b695e	2720	#define __HAL_SPI_1LINE_TX SPI_1LINE_TX
EricLew	0:80ee8f3b695e	2721	#define __HAL_SPI_1LINE_RX SPI_1LINE_RX
EricLew	0:80ee8f3b695e	2722	#define __HAL_SPI_RESET_CRC SPI_RESET_CRC
EricLew	0:80ee8f3b695e	2723
EricLew	0:80ee8f3b695e	2724	/**
EricLew	0:80ee8f3b695e	2725	* @}
EricLew	0:80ee8f3b695e	2726	*/
EricLew	0:80ee8f3b695e	2727
EricLew	0:80ee8f3b695e	2728	/** @defgroup HAL_UART_Aliased_Macros HAL UART Aliased Macros maintained for legacy purpose
EricLew	0:80ee8f3b695e	2729	* @{
EricLew	0:80ee8f3b695e	2730	*/
EricLew	0:80ee8f3b695e	2731
EricLew	0:80ee8f3b695e	2732	#define __HAL_UART_GETCLOCKSOURCE UART_GETCLOCKSOURCE
EricLew	0:80ee8f3b695e	2733	#define __HAL_UART_MASK_COMPUTATION UART_MASK_COMPUTATION
EricLew	0:80ee8f3b695e	2734	#define __UART_GETCLOCKSOURCE UART_GETCLOCKSOURCE
EricLew	0:80ee8f3b695e	2735	#define __UART_MASK_COMPUTATION UART_MASK_COMPUTATION
EricLew	0:80ee8f3b695e	2736
EricLew	0:80ee8f3b695e	2737	#define IS_UART_WAKEUPMETHODE IS_UART_WAKEUPMETHOD
EricLew	0:80ee8f3b695e	2738
EricLew	0:80ee8f3b695e	2739	#define IS_UART_ONEBIT_SAMPLE IS_UART_ONE_BIT_SAMPLE
EricLew	0:80ee8f3b695e	2740	#define IS_UART_ONEBIT_SAMPLING IS_UART_ONE_BIT_SAMPLE
EricLew	0:80ee8f3b695e	2741
EricLew	0:80ee8f3b695e	2742	/**
EricLew	0:80ee8f3b695e	2743	* @}
EricLew	0:80ee8f3b695e	2744	*/
EricLew	0:80ee8f3b695e	2745
EricLew	0:80ee8f3b695e	2746
EricLew	0:80ee8f3b695e	2747	/** @defgroup HAL_USART_Aliased_Macros HAL USART Aliased Macros maintained for legacy purpose
EricLew	0:80ee8f3b695e	2748	* @{
EricLew	0:80ee8f3b695e	2749	*/
EricLew	0:80ee8f3b695e	2750
EricLew	0:80ee8f3b695e	2751	#define __USART_ENABLE_IT __HAL_USART_ENABLE_IT
EricLew	0:80ee8f3b695e	2752	#define __USART_DISABLE_IT __HAL_USART_DISABLE_IT
EricLew	0:80ee8f3b695e	2753	#define __USART_ENABLE __HAL_USART_ENABLE
EricLew	0:80ee8f3b695e	2754	#define __USART_DISABLE __HAL_USART_DISABLE
EricLew	0:80ee8f3b695e	2755
EricLew	0:80ee8f3b695e	2756	#define __HAL_USART_GETCLOCKSOURCE USART_GETCLOCKSOURCE
EricLew	0:80ee8f3b695e	2757	#define __USART_GETCLOCKSOURCE USART_GETCLOCKSOURCE
EricLew	0:80ee8f3b695e	2758
EricLew	0:80ee8f3b695e	2759	/**
EricLew	0:80ee8f3b695e	2760	* @}
EricLew	0:80ee8f3b695e	2761	*/
EricLew	0:80ee8f3b695e	2762
EricLew	0:80ee8f3b695e	2763	/** @defgroup HAL_USB_Aliased_Macros HAL USB Aliased Macros maintained for legacy purpose
EricLew	0:80ee8f3b695e	2764	* @{
EricLew	0:80ee8f3b695e	2765	*/
EricLew	0:80ee8f3b695e	2766	#define USB_EXTI_LINE_WAKEUP USB_WAKEUP_EXTI_LINE
EricLew	0:80ee8f3b695e	2767
EricLew	0:80ee8f3b695e	2768	#define USB_FS_EXTI_TRIGGER_RISING_EDGE USB_OTG_FS_WAKEUP_EXTI_RISING_EDGE
EricLew	0:80ee8f3b695e	2769	#define USB_FS_EXTI_TRIGGER_FALLING_EDGE USB_OTG_FS_WAKEUP_EXTI_FALLING_EDGE
EricLew	0:80ee8f3b695e	2770	#define USB_FS_EXTI_TRIGGER_BOTH_EDGE USB_OTG_FS_WAKEUP_EXTI_RISING_FALLING_EDGE
EricLew	0:80ee8f3b695e	2771	#define USB_FS_EXTI_LINE_WAKEUP USB_OTG_FS_WAKEUP_EXTI_LINE
EricLew	0:80ee8f3b695e	2772
EricLew	0:80ee8f3b695e	2773	#define USB_HS_EXTI_TRIGGER_RISING_EDGE USB_OTG_HS_WAKEUP_EXTI_RISING_EDGE
EricLew	0:80ee8f3b695e	2774	#define USB_HS_EXTI_TRIGGER_FALLING_EDGE USB_OTG_HS_WAKEUP_EXTI_FALLING_EDGE
EricLew	0:80ee8f3b695e	2775	#define USB_HS_EXTI_TRIGGER_BOTH_EDGE USB_OTG_HS_WAKEUP_EXTI_RISING_FALLING_EDGE
EricLew	0:80ee8f3b695e	2776	#define USB_HS_EXTI_LINE_WAKEUP USB_OTG_HS_WAKEUP_EXTI_LINE
EricLew	0:80ee8f3b695e	2777
EricLew	0:80ee8f3b695e	2778	#define __HAL_USB_EXTI_ENABLE_IT __HAL_USB_WAKEUP_EXTI_ENABLE_IT
EricLew	0:80ee8f3b695e	2779	#define __HAL_USB_EXTI_DISABLE_IT __HAL_USB_WAKEUP_EXTI_DISABLE_IT
EricLew	0:80ee8f3b695e	2780	#define __HAL_USB_EXTI_GET_FLAG __HAL_USB_WAKEUP_EXTI_GET_FLAG
EricLew	0:80ee8f3b695e	2781	#define __HAL_USB_EXTI_CLEAR_FLAG __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG
EricLew	0:80ee8f3b695e	2782	#define __HAL_USB_EXTI_SET_RISING_EDGE_TRIGGER __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE
EricLew	0:80ee8f3b695e	2783	#define __HAL_USB_EXTI_SET_FALLING_EDGE_TRIGGER __HAL_USB_WAKEUP_EXTI_ENABLE_FALLING_EDGE
EricLew	0:80ee8f3b695e	2784	#define __HAL_USB_EXTI_SET_FALLINGRISING_TRIGGER __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE
EricLew	0:80ee8f3b695e	2785
EricLew	0:80ee8f3b695e	2786	#define __HAL_USB_FS_EXTI_ENABLE_IT __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_IT
EricLew	0:80ee8f3b695e	2787	#define __HAL_USB_FS_EXTI_DISABLE_IT __HAL_USB_OTG_FS_WAKEUP_EXTI_DISABLE_IT
EricLew	0:80ee8f3b695e	2788	#define __HAL_USB_FS_EXTI_GET_FLAG __HAL_USB_OTG_FS_WAKEUP_EXTI_GET_FLAG
EricLew	0:80ee8f3b695e	2789	#define __HAL_USB_FS_EXTI_CLEAR_FLAG __HAL_USB_OTG_FS_WAKEUP_EXTI_CLEAR_FLAG
EricLew	0:80ee8f3b695e	2790	#define __HAL_USB_FS_EXTI_SET_RISING_EGDE_TRIGGER __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_EDGE
EricLew	0:80ee8f3b695e	2791	#define __HAL_USB_FS_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_FALLING_EDGE
EricLew	0:80ee8f3b695e	2792	#define __HAL_USB_FS_EXTI_SET_FALLINGRISING_TRIGGER __HAL_USB_OTG_FS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE
EricLew	0:80ee8f3b695e	2793	#define __HAL_USB_FS_EXTI_GENERATE_SWIT __HAL_USB_OTG_FS_WAKEUP_EXTI_GENERATE_SWIT
EricLew	0:80ee8f3b695e	2794
EricLew	0:80ee8f3b695e	2795	#define __HAL_USB_HS_EXTI_ENABLE_IT __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_IT
EricLew	0:80ee8f3b695e	2796	#define __HAL_USB_HS_EXTI_DISABLE_IT __HAL_USB_OTG_HS_WAKEUP_EXTI_DISABLE_IT
EricLew	0:80ee8f3b695e	2797	#define __HAL_USB_HS_EXTI_GET_FLAG __HAL_USB_OTG_HS_WAKEUP_EXTI_GET_FLAG
EricLew	0:80ee8f3b695e	2798	#define __HAL_USB_HS_EXTI_CLEAR_FLAG __HAL_USB_OTG_HS_WAKEUP_EXTI_CLEAR_FLAG
EricLew	0:80ee8f3b695e	2799	#define __HAL_USB_HS_EXTI_SET_RISING_EGDE_TRIGGER __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_EDGE
EricLew	0:80ee8f3b695e	2800	#define __HAL_USB_HS_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_FALLING_EDGE
EricLew	0:80ee8f3b695e	2801	#define __HAL_USB_HS_EXTI_SET_FALLINGRISING_TRIGGER __HAL_USB_OTG_HS_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE
EricLew	0:80ee8f3b695e	2802	#define __HAL_USB_HS_EXTI_GENERATE_SWIT __HAL_USB_OTG_HS_WAKEUP_EXTI_GENERATE_SWIT
EricLew	0:80ee8f3b695e	2803
EricLew	0:80ee8f3b695e	2804	#define HAL_PCD_ActiveRemoteWakeup HAL_PCD_ActivateRemoteWakeup
EricLew	0:80ee8f3b695e	2805	#define HAL_PCD_DeActiveRemoteWakeup HAL_PCD_DeActivateRemoteWakeup
EricLew	0:80ee8f3b695e	2806
EricLew	0:80ee8f3b695e	2807	#define HAL_PCD_SetTxFiFo HAL_PCDEx_SetTxFiFo
EricLew	0:80ee8f3b695e	2808	#define HAL_PCD_SetRxFiFo HAL_PCDEx_SetRxFiFo
EricLew	0:80ee8f3b695e	2809	/**
EricLew	0:80ee8f3b695e	2810	* @}
EricLew	0:80ee8f3b695e	2811	*/
EricLew	0:80ee8f3b695e	2812
EricLew	0:80ee8f3b695e	2813	/** @defgroup HAL_TIM_Aliased_Macros HAL TIM Aliased Macros maintained for legacy purpose
EricLew	0:80ee8f3b695e	2814	* @{
EricLew	0:80ee8f3b695e	2815	*/
EricLew	0:80ee8f3b695e	2816	#define __HAL_TIM_SetICPrescalerValue TIM_SET_ICPRESCALERVALUE
EricLew	0:80ee8f3b695e	2817	#define __HAL_TIM_ResetICPrescalerValue TIM_RESET_ICPRESCALERVALUE
EricLew	0:80ee8f3b695e	2818
EricLew	0:80ee8f3b695e	2819	#define TIM_GET_ITSTATUS __HAL_TIM_GET_IT_SOURCE
EricLew	0:80ee8f3b695e	2820	#define TIM_GET_CLEAR_IT __HAL_TIM_CLEAR_IT
EricLew	0:80ee8f3b695e	2821
EricLew	0:80ee8f3b695e	2822	#define __HAL_TIM_GET_ITSTATUS __HAL_TIM_GET_IT_SOURCE
EricLew	0:80ee8f3b695e	2823
EricLew	0:80ee8f3b695e	2824	#define __HAL_TIM_DIRECTION_STATUS __HAL_TIM_IS_TIM_COUNTING_DOWN
EricLew	0:80ee8f3b695e	2825	#define __HAL_TIM_PRESCALER __HAL_TIM_SET_PRESCALER
EricLew	0:80ee8f3b695e	2826	#define __HAL_TIM_SetCounter __HAL_TIM_SET_COUNTER
EricLew	0:80ee8f3b695e	2827	#define __HAL_TIM_GetCounter __HAL_TIM_GET_COUNTER
EricLew	0:80ee8f3b695e	2828	#define __HAL_TIM_SetAutoreload __HAL_TIM_SET_AUTORELOAD
EricLew	0:80ee8f3b695e	2829	#define __HAL_TIM_GetAutoreload __HAL_TIM_GET_AUTORELOAD
EricLew	0:80ee8f3b695e	2830	#define __HAL_TIM_SetClockDivision __HAL_TIM_SET_CLOCKDIVISION
EricLew	0:80ee8f3b695e	2831	#define __HAL_TIM_GetClockDivision __HAL_TIM_GET_CLOCKDIVISION
EricLew	0:80ee8f3b695e	2832	#define __HAL_TIM_SetICPrescaler __HAL_TIM_SET_ICPRESCALER
EricLew	0:80ee8f3b695e	2833	#define __HAL_TIM_GetICPrescaler __HAL_TIM_GET_ICPRESCALER
EricLew	0:80ee8f3b695e	2834	#define __HAL_TIM_SetCompare __HAL_TIM_SET_COMPARE
EricLew	0:80ee8f3b695e	2835	#define __HAL_TIM_GetCompare __HAL_TIM_GET_COMPARE
EricLew	0:80ee8f3b695e	2836
EricLew	0:80ee8f3b695e	2837	#define TIM_TS_ITR0 ((uint32_t)0x0000)
EricLew	0:80ee8f3b695e	2838	#define TIM_TS_ITR1 ((uint32_t)0x0010)
EricLew	0:80ee8f3b695e	2839	#define TIM_TS_ITR2 ((uint32_t)0x0020)
EricLew	0:80ee8f3b695e	2840	#define TIM_TS_ITR3 ((uint32_t)0x0030)
EricLew	0:80ee8f3b695e	2841	#define IS_TIM_INTERNAL_TRIGGER_SELECTION(SELECTION) (((SELECTION) == TIM_TS_ITR0) \|\| \
EricLew	0:80ee8f3b695e	2842	((SELECTION) == TIM_TS_ITR1) \|\| \
EricLew	0:80ee8f3b695e	2843	((SELECTION) == TIM_TS_ITR2) \|\| \
EricLew	0:80ee8f3b695e	2844	((SELECTION) == TIM_TS_ITR3))
EricLew	0:80ee8f3b695e	2845
EricLew	0:80ee8f3b695e	2846	#define TIM_CHANNEL_1 ((uint32_t)0x0000)
EricLew	0:80ee8f3b695e	2847	#define TIM_CHANNEL_2 ((uint32_t)0x0004)
EricLew	0:80ee8f3b695e	2848	#define IS_TIM_PWMI_CHANNELS(CHANNEL) (((CHANNEL) == TIM_CHANNEL_1) \|\| \
EricLew	0:80ee8f3b695e	2849	((CHANNEL) == TIM_CHANNEL_2))
EricLew	0:80ee8f3b695e	2850
EricLew	0:80ee8f3b695e	2851	#define TIM_OUTPUTNSTATE_DISABLE ((uint32_t)0x0000)
EricLew	0:80ee8f3b695e	2852	#define TIM_OUTPUTNSTATE_ENABLE (TIM_CCER_CC1NE)
EricLew	0:80ee8f3b695e	2853
EricLew	0:80ee8f3b695e	2854	#define IS_TIM_OUTPUTN_STATE(STATE) (((STATE) == TIM_OUTPUTNSTATE_DISABLE) \|\| \
EricLew	0:80ee8f3b695e	2855	((STATE) == TIM_OUTPUTNSTATE_ENABLE))
EricLew	0:80ee8f3b695e	2856
EricLew	0:80ee8f3b695e	2857	#define TIM_OUTPUTSTATE_DISABLE ((uint32_t)0x0000)
EricLew	0:80ee8f3b695e	2858	#define TIM_OUTPUTSTATE_ENABLE (TIM_CCER_CC1E)
EricLew	0:80ee8f3b695e	2859
EricLew	0:80ee8f3b695e	2860	#define IS_TIM_OUTPUT_STATE(STATE) (((STATE) == TIM_OUTPUTSTATE_DISABLE) \|\| \
EricLew	0:80ee8f3b695e	2861	((STATE) == TIM_OUTPUTSTATE_ENABLE))
EricLew	0:80ee8f3b695e	2862	/**
EricLew	0:80ee8f3b695e	2863	* @}
EricLew	0:80ee8f3b695e	2864	*/
EricLew	0:80ee8f3b695e	2865
EricLew	0:80ee8f3b695e	2866	/** @defgroup HAL_ETH_Aliased_Macros HAL ETH Aliased Macros maintained for legacy purpose
EricLew	0:80ee8f3b695e	2867	* @{
EricLew	0:80ee8f3b695e	2868	*/
EricLew	0:80ee8f3b695e	2869
EricLew	0:80ee8f3b695e	2870	#define __HAL_ETH_EXTI_ENABLE_IT __HAL_ETH_WAKEUP_EXTI_ENABLE_IT
EricLew	0:80ee8f3b695e	2871	#define __HAL_ETH_EXTI_DISABLE_IT __HAL_ETH_WAKEUP_EXTI_DISABLE_IT
EricLew	0:80ee8f3b695e	2872	#define __HAL_ETH_EXTI_GET_FLAG __HAL_ETH_WAKEUP_EXTI_GET_FLAG
EricLew	0:80ee8f3b695e	2873	#define __HAL_ETH_EXTI_CLEAR_FLAG __HAL_ETH_WAKEUP_EXTI_CLEAR_FLAG
EricLew	0:80ee8f3b695e	2874	#define __HAL_ETH_EXTI_SET_RISING_EGDE_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_RISING_EDGE_TRIGGER
EricLew	0:80ee8f3b695e	2875	#define __HAL_ETH_EXTI_SET_FALLING_EGDE_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLING_EDGE_TRIGGER
EricLew	0:80ee8f3b695e	2876	#define __HAL_ETH_EXTI_SET_FALLINGRISING_TRIGGER __HAL_ETH_WAKEUP_EXTI_ENABLE_FALLINGRISING_TRIGGER
EricLew	0:80ee8f3b695e	2877
EricLew	0:80ee8f3b695e	2878	#define ETH_PROMISCIOUSMODE_ENABLE ETH_PROMISCUOUS_MODE_ENABLE
EricLew	0:80ee8f3b695e	2879	#define ETH_PROMISCIOUSMODE_DISABLE ETH_PROMISCUOUS_MODE_DISABLE
EricLew	0:80ee8f3b695e	2880	#define IS_ETH_PROMISCIOUS_MODE IS_ETH_PROMISCUOUS_MODE
EricLew	0:80ee8f3b695e	2881	/**
EricLew	0:80ee8f3b695e	2882	* @}
EricLew	0:80ee8f3b695e	2883	*/
EricLew	0:80ee8f3b695e	2884
EricLew	0:80ee8f3b695e	2885	/** @defgroup HAL_LTDC_Aliased_Macros HAL LTDC Aliased Macros maintained for legacy purpose
EricLew	0:80ee8f3b695e	2886	* @{
EricLew	0:80ee8f3b695e	2887	*/
EricLew	0:80ee8f3b695e	2888	#define __HAL_LTDC_LAYER LTDC_LAYER
EricLew	0:80ee8f3b695e	2889	/**
EricLew	0:80ee8f3b695e	2890	* @}
EricLew	0:80ee8f3b695e	2891	*/
EricLew	0:80ee8f3b695e	2892
EricLew	0:80ee8f3b695e	2893	/** @defgroup HAL_SAI_Aliased_Macros HAL SAI Aliased Macros maintained for legacy purpose
EricLew	0:80ee8f3b695e	2894	* @{
EricLew	0:80ee8f3b695e	2895	*/
EricLew	0:80ee8f3b695e	2896	#define SAI_OUTPUTDRIVE_DISABLED SAI_OUTPUTDRIVE_DISABLE
EricLew	0:80ee8f3b695e	2897	#define SAI_OUTPUTDRIVE_ENABLED SAI_OUTPUTDRIVE_ENABLE
EricLew	0:80ee8f3b695e	2898	#define SAI_MASTERDIVIDER_ENABLED SAI_MASTERDIVIDER_ENABLE
EricLew	0:80ee8f3b695e	2899	#define SAI_MASTERDIVIDER_DISABLED SAI_MASTERDIVIDER_DISABLE
EricLew	0:80ee8f3b695e	2900	#define SAI_STREOMODE SAI_STEREOMODE
EricLew	0:80ee8f3b695e	2901	#define SAI_FIFOStatus_Empty SAI_FIFOSTATUS_EMPTY
EricLew	0:80ee8f3b695e	2902	#define SAI_FIFOStatus_Less1QuarterFull SAI_FIFOSTATUS_LESS1QUARTERFULL
EricLew	0:80ee8f3b695e	2903	#define SAI_FIFOStatus_1QuarterFull SAI_FIFOSTATUS_1QUARTERFULL
EricLew	0:80ee8f3b695e	2904	#define SAI_FIFOStatus_HalfFull SAI_FIFOSTATUS_HALFFULL
EricLew	0:80ee8f3b695e	2905	#define SAI_FIFOStatus_3QuartersFull SAI_FIFOSTATUS_3QUARTERFULL
EricLew	0:80ee8f3b695e	2906	#define SAI_FIFOStatus_Full SAI_FIFOSTATUS_FULL
EricLew	0:80ee8f3b695e	2907	#define IS_SAI_BLOCK_MONO_STREO_MODE IS_SAI_BLOCK_MONO_STEREO_MODE
EricLew	0:80ee8f3b695e	2908
EricLew	0:80ee8f3b695e	2909	/**
EricLew	0:80ee8f3b695e	2910	* @}
EricLew	0:80ee8f3b695e	2911	*/
EricLew	0:80ee8f3b695e	2912
EricLew	0:80ee8f3b695e	2913
EricLew	0:80ee8f3b695e	2914	/** @defgroup HAL_PPP_Aliased_Macros HAL PPP Aliased Macros maintained for legacy purpose
EricLew	0:80ee8f3b695e	2915	* @{
EricLew	0:80ee8f3b695e	2916	*/
EricLew	0:80ee8f3b695e	2917
EricLew	0:80ee8f3b695e	2918	/**
EricLew	0:80ee8f3b695e	2919	* @}
EricLew	0:80ee8f3b695e	2920	*/
EricLew	0:80ee8f3b695e	2921
EricLew	0:80ee8f3b695e	2922	#ifdef __cplusplus
EricLew	0:80ee8f3b695e	2923	}
EricLew	0:80ee8f3b695e	2924	#endif
EricLew	0:80ee8f3b695e	2925
EricLew	0:80ee8f3b695e	2926	#endif /* ___STM32_HAL_LEGACY */
EricLew	0:80ee8f3b695e	2927
EricLew	0:80ee8f3b695e	2928	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/
EricLew	0:80ee8f3b695e	2929
EricLew	0:80ee8f3b695e	2930

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Type:	Library
Created:	12 Nov 2015
Imports:	198
Forks:	0
Commits:	3
Dependents:	4
Dependencies:	0
Followers:	14

Inc/stm32_hal_legacy.h@2:7aef7655b0a8, 2015-11-25 (annotated)

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